1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 635765d180SDon Brace #define HPSA_DRIVER_VERSION "3.4.18-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 1117f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 1167f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 117fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 118fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1293b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 13197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1363b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1373b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 138fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 142cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 143cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1478e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1488e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 149edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151edd16368SStephen M. Cameron {0,} 152edd16368SStephen M. Cameron }; 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155edd16368SStephen M. Cameron 156edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 157edd16368SStephen M. Cameron * product = Marketing Name for the board 158edd16368SStephen M. Cameron * access = Address of the struct of function pointers 159edd16368SStephen M. Cameron */ 160edd16368SStephen M. Cameron static struct board_type products[] = { 161edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 162edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 163edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 164edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 165edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 166163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 167163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1687d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 169fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 170fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 171fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 172fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 173fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 174fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 175fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1767f1974a7SDon Brace {0x1920103C, "Smart Array P430i", &SA5_access}, 1771fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1781fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1791fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1801fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1817f1974a7SDon Brace {0x1925103C, "Smart Array P831", &SA5_access}, 1821fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1831fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1841fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18527fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18627fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18727fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18827fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 189c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 19027fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 19127fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 19297b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 19327fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19427fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19527fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19627fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19797b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19927fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 2003b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 2013b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 20227fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 203fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 204cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 205cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 206cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 207cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 208cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2108e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2118e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2128e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2138e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 214edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 215edd16368SStephen M. Cameron }; 216edd16368SStephen M. Cameron 217d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 218d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 219d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 220d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 221d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 222d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 223d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 224d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 225d04e62b9SKevin Barnett struct sas_rphy *rphy); 226d04e62b9SKevin Barnett 227a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 228a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 229a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 230a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 231edd16368SStephen M. Cameron static int number_of_controllers; 232edd16368SStephen M. Cameron 23310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23542a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 236edd16368SStephen M. Cameron 237edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23842a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23942a91641SDon Brace void __user *arg); 240edd16368SStephen M. Cameron #endif 241edd16368SStephen M. Cameron 242edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 243edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24473153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24573153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24673153fe5SWebb Scales struct scsi_cmnd *scmd); 247a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 248b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 249edd16368SStephen M. Cameron int cmd_type); 2502c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 251b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 252b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 253edd16368SStephen M. Cameron 254f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 255a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 256a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 257a08a8471SStephen M. Cameron unsigned long elapsed_time); 2587c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 259edd16368SStephen M. Cameron 260edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 26175167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 262edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 26341ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 264edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 265edd16368SStephen M. Cameron 2668aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 267edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 268edd16368SStephen M. Cameron struct CommandList *c); 269edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 270edd16368SStephen M. Cameron struct CommandList *c); 271303932fdSDon Brace /* performant mode helper functions */ 272303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2732b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 274105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 275105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 276254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2776f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2786f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2791df8552aSStephen M. Cameron u64 *cfg_offset); 2806f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2811df8552aSStephen M. Cameron unsigned long *memory_bar); 2826f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 283bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 284bfd7546cSDon Brace unsigned char lunaddr[], 285bfd7546cSDon Brace int reply_queue); 2866f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2876f039790SGreg Kroah-Hartman int wait_for_ready); 28875167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 289c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 290fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 291fe5389c8SStephen M. Cameron #define BOARD_READY 1 29223100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 29376438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 294c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 295c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 29603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 297080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29825163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29925163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 300c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 301d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 302d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 3038383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3048383278dSScott Teel unsigned char scsi3addr[], u8 page); 30534592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 306ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 307ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 308ba74fdc4SDon Brace unsigned char *scsi3addr); 309edd16368SStephen M. Cameron 310edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 311edd16368SStephen M. Cameron { 312edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 313edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 314edd16368SStephen M. Cameron } 315edd16368SStephen M. Cameron 316a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 317a23513e8SStephen M. Cameron { 318a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 319a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 320a23513e8SStephen M. Cameron } 321a23513e8SStephen M. Cameron 322a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 323a58e7e53SWebb Scales { 324a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 325a58e7e53SWebb Scales } 326a58e7e53SWebb Scales 327d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 328d604f533SWebb Scales { 329d604f533SWebb Scales return c->abort_pending || c->reset_pending; 330d604f533SWebb Scales } 331d604f533SWebb Scales 3329437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3339437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3349437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3359437ac43SStephen Cameron { 3369437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3379437ac43SStephen Cameron bool rc; 3389437ac43SStephen Cameron 3399437ac43SStephen Cameron *sense_key = -1; 3409437ac43SStephen Cameron *asc = -1; 3419437ac43SStephen Cameron *ascq = -1; 3429437ac43SStephen Cameron 3439437ac43SStephen Cameron if (sense_data_len < 1) 3449437ac43SStephen Cameron return; 3459437ac43SStephen Cameron 3469437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3479437ac43SStephen Cameron if (rc) { 3489437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3499437ac43SStephen Cameron *asc = sshdr.asc; 3509437ac43SStephen Cameron *ascq = sshdr.ascq; 3519437ac43SStephen Cameron } 3529437ac43SStephen Cameron } 3539437ac43SStephen Cameron 354edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 355edd16368SStephen M. Cameron struct CommandList *c) 356edd16368SStephen M. Cameron { 3579437ac43SStephen Cameron u8 sense_key, asc, ascq; 3589437ac43SStephen Cameron int sense_len; 3599437ac43SStephen Cameron 3609437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3619437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3629437ac43SStephen Cameron else 3639437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3649437ac43SStephen Cameron 3659437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3669437ac43SStephen Cameron &sense_key, &asc, &ascq); 36781c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 368edd16368SStephen M. Cameron return 0; 369edd16368SStephen M. Cameron 3709437ac43SStephen Cameron switch (asc) { 371edd16368SStephen M. Cameron case STATE_CHANGED: 3729437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3732946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3742946e82bSRobert Elliott h->devname); 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case LUN_FAILED: 3777f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 379edd16368SStephen M. Cameron break; 380edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3817f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3822946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 383edd16368SStephen M. Cameron /* 3844f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3854f4eb9f1SScott Teel * target (array) devices. 386edd16368SStephen M. Cameron */ 387edd16368SStephen M. Cameron break; 388edd16368SStephen M. Cameron case POWER_OR_RESET: 3892946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3902946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3912946e82bSRobert Elliott h->devname); 392edd16368SStephen M. Cameron break; 393edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3942946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3952946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3962946e82bSRobert Elliott h->devname); 397edd16368SStephen M. Cameron break; 398edd16368SStephen M. Cameron default: 3992946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4002946e82bSRobert Elliott "%s: unknown unit attention detected\n", 4012946e82bSRobert Elliott h->devname); 402edd16368SStephen M. Cameron break; 403edd16368SStephen M. Cameron } 404edd16368SStephen M. Cameron return 1; 405edd16368SStephen M. Cameron } 406edd16368SStephen M. Cameron 407852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 408852af20aSMatt Bondurant { 409852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 410852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 411852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 412852af20aSMatt Bondurant return 0; 413852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 414852af20aSMatt Bondurant return 1; 415852af20aSMatt Bondurant } 416852af20aSMatt Bondurant 417e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 418e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 419e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 420e985c58fSStephen Cameron { 421e985c58fSStephen Cameron int ld; 422e985c58fSStephen Cameron struct ctlr_info *h; 423e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 424e985c58fSStephen Cameron 425e985c58fSStephen Cameron h = shost_to_hba(shost); 426e985c58fSStephen Cameron ld = lockup_detected(h); 427e985c58fSStephen Cameron 428e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 429e985c58fSStephen Cameron } 430e985c58fSStephen Cameron 431da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 432da0697bdSScott Teel struct device_attribute *attr, 433da0697bdSScott Teel const char *buf, size_t count) 434da0697bdSScott Teel { 435da0697bdSScott Teel int status, len; 436da0697bdSScott Teel struct ctlr_info *h; 437da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 438da0697bdSScott Teel char tmpbuf[10]; 439da0697bdSScott Teel 440da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 441da0697bdSScott Teel return -EACCES; 442da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 443da0697bdSScott Teel strncpy(tmpbuf, buf, len); 444da0697bdSScott Teel tmpbuf[len] = '\0'; 445da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 446da0697bdSScott Teel return -EINVAL; 447da0697bdSScott Teel h = shost_to_hba(shost); 448da0697bdSScott Teel h->acciopath_status = !!status; 449da0697bdSScott Teel dev_warn(&h->pdev->dev, 450da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 451da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 452da0697bdSScott Teel return count; 453da0697bdSScott Teel } 454da0697bdSScott Teel 4552ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4562ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4572ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4582ba8bfc8SStephen M. Cameron { 4592ba8bfc8SStephen M. Cameron int debug_level, len; 4602ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4612ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4622ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4632ba8bfc8SStephen M. Cameron 4642ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4652ba8bfc8SStephen M. Cameron return -EACCES; 4662ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4672ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4682ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4692ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4702ba8bfc8SStephen M. Cameron return -EINVAL; 4712ba8bfc8SStephen M. Cameron if (debug_level < 0) 4722ba8bfc8SStephen M. Cameron debug_level = 0; 4732ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4742ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4752ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4762ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4772ba8bfc8SStephen M. Cameron return count; 4782ba8bfc8SStephen M. Cameron } 4792ba8bfc8SStephen M. Cameron 480edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 481edd16368SStephen M. Cameron struct device_attribute *attr, 482edd16368SStephen M. Cameron const char *buf, size_t count) 483edd16368SStephen M. Cameron { 484edd16368SStephen M. Cameron struct ctlr_info *h; 485edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 486a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48731468401SMike Miller hpsa_scan_start(h->scsi_host); 488edd16368SStephen M. Cameron return count; 489edd16368SStephen M. Cameron } 490edd16368SStephen M. Cameron 491d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 492d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 493d28ce020SStephen M. Cameron { 494d28ce020SStephen M. Cameron struct ctlr_info *h; 495d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 496d28ce020SStephen M. Cameron unsigned char *fwrev; 497d28ce020SStephen M. Cameron 498d28ce020SStephen M. Cameron h = shost_to_hba(shost); 499d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 500d28ce020SStephen M. Cameron return 0; 501d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 502d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 503d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 504d28ce020SStephen M. Cameron } 505d28ce020SStephen M. Cameron 50694a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50794a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50894a13649SStephen M. Cameron { 50994a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 51094a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 51194a13649SStephen M. Cameron 5120cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5130cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 51494a13649SStephen M. Cameron } 51594a13649SStephen M. Cameron 516745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 517745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 518745a7a25SStephen M. Cameron { 519745a7a25SStephen M. Cameron struct ctlr_info *h; 520745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 521745a7a25SStephen M. Cameron 522745a7a25SStephen M. Cameron h = shost_to_hba(shost); 523745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 524960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 525745a7a25SStephen M. Cameron "performant" : "simple"); 526745a7a25SStephen M. Cameron } 527745a7a25SStephen M. Cameron 528da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 529da0697bdSScott Teel struct device_attribute *attr, char *buf) 530da0697bdSScott Teel { 531da0697bdSScott Teel struct ctlr_info *h; 532da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 533da0697bdSScott Teel 534da0697bdSScott Teel h = shost_to_hba(shost); 535da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 536da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 537da0697bdSScott Teel } 538da0697bdSScott Teel 53946380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 540941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 541941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 542941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 543941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 544941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 545941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 546941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 547941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 548941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 549941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 550941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 551941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 552941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5537af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 554941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 555941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5565a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5575a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5585a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5595a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5605a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5615a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 562941b1cdaSStephen M. Cameron }; 563941b1cdaSStephen M. Cameron 56446380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 56546380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5667af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5675a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5685a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5695a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5705a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5715a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5725a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 57346380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 57446380786SStephen M. Cameron * which share a battery backed cache module. One controls the 57546380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 57646380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57746380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57846380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57946380786SStephen M. Cameron */ 58046380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 58146380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 58246380786SStephen M. Cameron }; 58346380786SStephen M. Cameron 5849b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5859b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5869b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5879b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5889b5c48c2SStephen Cameron }; 5899b5c48c2SStephen Cameron 5909b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 591941b1cdaSStephen M. Cameron { 592941b1cdaSStephen M. Cameron int i; 593941b1cdaSStephen M. Cameron 5949b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5959b5c48c2SStephen Cameron if (a[i] == board_id) 596941b1cdaSStephen M. Cameron return 1; 5979b5c48c2SStephen Cameron return 0; 5989b5c48c2SStephen Cameron } 5999b5c48c2SStephen Cameron 6009b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 6019b5c48c2SStephen Cameron { 6029b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 6039b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 604941b1cdaSStephen M. Cameron } 605941b1cdaSStephen M. Cameron 60646380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60746380786SStephen M. Cameron { 6089b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6099b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 61046380786SStephen M. Cameron } 61146380786SStephen M. Cameron 61246380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 61346380786SStephen M. Cameron { 61446380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 61546380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 61646380786SStephen M. Cameron } 61746380786SStephen M. Cameron 6189b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6199b5c48c2SStephen Cameron { 6209b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6219b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6229b5c48c2SStephen Cameron } 6239b5c48c2SStephen Cameron 624941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 625941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 626941b1cdaSStephen M. Cameron { 627941b1cdaSStephen M. Cameron struct ctlr_info *h; 628941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 629941b1cdaSStephen M. Cameron 630941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 63146380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 632941b1cdaSStephen M. Cameron } 633941b1cdaSStephen M. Cameron 634edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 635edd16368SStephen M. Cameron { 636edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 637edd16368SStephen M. Cameron } 638edd16368SStephen M. Cameron 639f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6407c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 641edd16368SStephen M. Cameron }; 6426b80b18fSScott Teel #define HPSA_RAID_0 0 6436b80b18fSScott Teel #define HPSA_RAID_4 1 6446b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6456b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6466b80b18fSScott Teel #define HPSA_RAID_51 4 6476b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6486b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6497c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6507c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 651edd16368SStephen M. Cameron 652f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 653f3f01730SKevin Barnett { 654f3f01730SKevin Barnett return !device->physical_device; 655f3f01730SKevin Barnett } 656edd16368SStephen M. Cameron 657edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 658edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 659edd16368SStephen M. Cameron { 660edd16368SStephen M. Cameron ssize_t l = 0; 66182a72c0aSStephen M. Cameron unsigned char rlevel; 662edd16368SStephen M. Cameron struct ctlr_info *h; 663edd16368SStephen M. Cameron struct scsi_device *sdev; 664edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 665edd16368SStephen M. Cameron unsigned long flags; 666edd16368SStephen M. Cameron 667edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 668edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 669edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 670edd16368SStephen M. Cameron hdev = sdev->hostdata; 671edd16368SStephen M. Cameron if (!hdev) { 672edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 673edd16368SStephen M. Cameron return -ENODEV; 674edd16368SStephen M. Cameron } 675edd16368SStephen M. Cameron 676edd16368SStephen M. Cameron /* Is this even a logical drive? */ 677f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 678edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 679edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 680edd16368SStephen M. Cameron return l; 681edd16368SStephen M. Cameron } 682edd16368SStephen M. Cameron 683edd16368SStephen M. Cameron rlevel = hdev->raid_level; 684edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 68582a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 686edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 687edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 688edd16368SStephen M. Cameron return l; 689edd16368SStephen M. Cameron } 690edd16368SStephen M. Cameron 691edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 692edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 693edd16368SStephen M. Cameron { 694edd16368SStephen M. Cameron struct ctlr_info *h; 695edd16368SStephen M. Cameron struct scsi_device *sdev; 696edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 697edd16368SStephen M. Cameron unsigned long flags; 698edd16368SStephen M. Cameron unsigned char lunid[8]; 699edd16368SStephen M. Cameron 700edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 701edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 702edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 703edd16368SStephen M. Cameron hdev = sdev->hostdata; 704edd16368SStephen M. Cameron if (!hdev) { 705edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 706edd16368SStephen M. Cameron return -ENODEV; 707edd16368SStephen M. Cameron } 708edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 709edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 710609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 711edd16368SStephen M. Cameron } 712edd16368SStephen M. Cameron 713edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 714edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 715edd16368SStephen M. Cameron { 716edd16368SStephen M. Cameron struct ctlr_info *h; 717edd16368SStephen M. Cameron struct scsi_device *sdev; 718edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 719edd16368SStephen M. Cameron unsigned long flags; 720edd16368SStephen M. Cameron unsigned char sn[16]; 721edd16368SStephen M. Cameron 722edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 723edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 724edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 725edd16368SStephen M. Cameron hdev = sdev->hostdata; 726edd16368SStephen M. Cameron if (!hdev) { 727edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 728edd16368SStephen M. Cameron return -ENODEV; 729edd16368SStephen M. Cameron } 730edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 731edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 732edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 733edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 734edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 735edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 736edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 737edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 738edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 739edd16368SStephen M. Cameron } 740edd16368SStephen M. Cameron 741ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 742ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 743ded1be4aSJoseph T Handzik { 744ded1be4aSJoseph T Handzik struct ctlr_info *h; 745ded1be4aSJoseph T Handzik struct scsi_device *sdev; 746ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 747ded1be4aSJoseph T Handzik unsigned long flags; 748ded1be4aSJoseph T Handzik u64 sas_address; 749ded1be4aSJoseph T Handzik 750ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 751ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 752ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 753ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 754ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 755ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 756ded1be4aSJoseph T Handzik return -ENODEV; 757ded1be4aSJoseph T Handzik } 758ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 759ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 760ded1be4aSJoseph T Handzik 761ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 762ded1be4aSJoseph T Handzik } 763ded1be4aSJoseph T Handzik 764c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 765c1988684SScott Teel struct device_attribute *attr, char *buf) 766c1988684SScott Teel { 767c1988684SScott Teel struct ctlr_info *h; 768c1988684SScott Teel struct scsi_device *sdev; 769c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 770c1988684SScott Teel unsigned long flags; 771c1988684SScott Teel int offload_enabled; 772c1988684SScott Teel 773c1988684SScott Teel sdev = to_scsi_device(dev); 774c1988684SScott Teel h = sdev_to_hba(sdev); 775c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 776c1988684SScott Teel hdev = sdev->hostdata; 777c1988684SScott Teel if (!hdev) { 778c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 779c1988684SScott Teel return -ENODEV; 780c1988684SScott Teel } 781c1988684SScott Teel offload_enabled = hdev->offload_enabled; 782c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 783c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 784c1988684SScott Teel } 785c1988684SScott Teel 7868270b862SJoe Handzik #define MAX_PATHS 8 7878270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7888270b862SJoe Handzik struct device_attribute *attr, char *buf) 7898270b862SJoe Handzik { 7908270b862SJoe Handzik struct ctlr_info *h; 7918270b862SJoe Handzik struct scsi_device *sdev; 7928270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7938270b862SJoe Handzik unsigned long flags; 7948270b862SJoe Handzik int i; 7958270b862SJoe Handzik int output_len = 0; 7968270b862SJoe Handzik u8 box; 7978270b862SJoe Handzik u8 bay; 7988270b862SJoe Handzik u8 path_map_index = 0; 7998270b862SJoe Handzik char *active; 8008270b862SJoe Handzik unsigned char phys_connector[2]; 8018270b862SJoe Handzik 8028270b862SJoe Handzik sdev = to_scsi_device(dev); 8038270b862SJoe Handzik h = sdev_to_hba(sdev); 8048270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8058270b862SJoe Handzik hdev = sdev->hostdata; 8068270b862SJoe Handzik if (!hdev) { 8078270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8088270b862SJoe Handzik return -ENODEV; 8098270b862SJoe Handzik } 8108270b862SJoe Handzik 8118270b862SJoe Handzik bay = hdev->bay; 8128270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8138270b862SJoe Handzik path_map_index = 1<<i; 8148270b862SJoe Handzik if (i == hdev->active_path_index) 8158270b862SJoe Handzik active = "Active"; 8168270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8178270b862SJoe Handzik active = "Inactive"; 8188270b862SJoe Handzik else 8198270b862SJoe Handzik continue; 8208270b862SJoe Handzik 8211faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8221faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8231faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8248270b862SJoe Handzik h->scsi_host->host_no, 8258270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8268270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8278270b862SJoe Handzik 828cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8292708f295SDon Brace output_len += scnprintf(buf + output_len, 8301faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8311faf072cSRasmus Villemoes "%s\n", active); 8328270b862SJoe Handzik continue; 8338270b862SJoe Handzik } 8348270b862SJoe Handzik 8358270b862SJoe Handzik box = hdev->box[i]; 8368270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8378270b862SJoe Handzik sizeof(phys_connector)); 8388270b862SJoe Handzik if (phys_connector[0] < '0') 8398270b862SJoe Handzik phys_connector[0] = '0'; 8408270b862SJoe Handzik if (phys_connector[1] < '0') 8418270b862SJoe Handzik phys_connector[1] = '0'; 8422708f295SDon Brace output_len += scnprintf(buf + output_len, 8431faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8448270b862SJoe Handzik "PORT: %.2s ", 8458270b862SJoe Handzik phys_connector); 846af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 847af15ed36SDon Brace hdev->expose_device) { 8488270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8492708f295SDon Brace output_len += scnprintf(buf + output_len, 8501faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8518270b862SJoe Handzik "BAY: %hhu %s\n", 8528270b862SJoe Handzik bay, active); 8538270b862SJoe Handzik } else { 8542708f295SDon Brace output_len += scnprintf(buf + output_len, 8551faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8568270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8578270b862SJoe Handzik box, bay, active); 8588270b862SJoe Handzik } 8598270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8602708f295SDon Brace output_len += scnprintf(buf + output_len, 8611faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8628270b862SJoe Handzik box, active); 8638270b862SJoe Handzik } else 8642708f295SDon Brace output_len += scnprintf(buf + output_len, 8651faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8668270b862SJoe Handzik } 8678270b862SJoe Handzik 8688270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8691faf072cSRasmus Villemoes return output_len; 8708270b862SJoe Handzik } 8718270b862SJoe Handzik 87216961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 87316961204SHannes Reinecke struct device_attribute *attr, char *buf) 87416961204SHannes Reinecke { 87516961204SHannes Reinecke struct ctlr_info *h; 87616961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 87716961204SHannes Reinecke 87816961204SHannes Reinecke h = shost_to_hba(shost); 87916961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 88016961204SHannes Reinecke } 88116961204SHannes Reinecke 8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8833f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8843f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8853f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 886ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 887c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 888c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8898270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 890da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 891da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 892da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8932ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8942ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8953f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8963f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8973f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8983f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8993f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 9003f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 901941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 902941b1cdaSStephen M. Cameron host_show_resettable, NULL); 903e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 904e985c58fSStephen Cameron host_show_lockup_detected, NULL); 90516961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 90616961204SHannes Reinecke host_show_ctlr_num, NULL); 9073f5eac3aSStephen M. Cameron 9083f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 9093f5eac3aSStephen M. Cameron &dev_attr_raid_level, 9103f5eac3aSStephen M. Cameron &dev_attr_lunid, 9113f5eac3aSStephen M. Cameron &dev_attr_unique_id, 912c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9138270b862SJoe Handzik &dev_attr_path_info, 914ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9153f5eac3aSStephen M. Cameron NULL, 9163f5eac3aSStephen M. Cameron }; 9173f5eac3aSStephen M. Cameron 9183f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9193f5eac3aSStephen M. Cameron &dev_attr_rescan, 9203f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9213f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9223f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 923941b1cdaSStephen M. Cameron &dev_attr_resettable, 924da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9252ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 926fb53c439STomas Henzl &dev_attr_lockup_detected, 92716961204SHannes Reinecke &dev_attr_ctlr_num, 9283f5eac3aSStephen M. Cameron NULL, 9293f5eac3aSStephen M. Cameron }; 9303f5eac3aSStephen M. Cameron 93141ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 93241ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 93341ce4c35SStephen Cameron 9343f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9353f5eac3aSStephen M. Cameron .module = THIS_MODULE, 936f79cfec6SStephen M. Cameron .name = HPSA, 937f79cfec6SStephen M. Cameron .proc_name = HPSA, 9383f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9393f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9403f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9417c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9423f5eac3aSStephen M. Cameron .this_id = -1, 9433f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 94475167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9453f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9463f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9473f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 94841ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9493f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9503f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9513f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9523f5eac3aSStephen M. Cameron #endif 9533f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9543f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 955c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 95654b2b50cSMartin K. Petersen .no_write_same = 1, 9573f5eac3aSStephen M. Cameron }; 9583f5eac3aSStephen M. Cameron 959254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9603f5eac3aSStephen M. Cameron { 9613f5eac3aSStephen M. Cameron u32 a; 962072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9633f5eac3aSStephen M. Cameron 964e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 965e1f7de0cSMatt Gates return h->access.command_completed(h, q); 966e1f7de0cSMatt Gates 9673f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 968254f796bSMatt Gates return h->access.command_completed(h, q); 9693f5eac3aSStephen M. Cameron 970254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 971254f796bSMatt Gates a = rq->head[rq->current_entry]; 972254f796bSMatt Gates rq->current_entry++; 9730cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9743f5eac3aSStephen M. Cameron } else { 9753f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9763f5eac3aSStephen M. Cameron } 9773f5eac3aSStephen M. Cameron /* Check for wraparound */ 978254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 979254f796bSMatt Gates rq->current_entry = 0; 980254f796bSMatt Gates rq->wraparound ^= 1; 9813f5eac3aSStephen M. Cameron } 9823f5eac3aSStephen M. Cameron return a; 9833f5eac3aSStephen M. Cameron } 9843f5eac3aSStephen M. Cameron 985c349775eSScott Teel /* 986c349775eSScott Teel * There are some special bits in the bus address of the 987c349775eSScott Teel * command that we have to set for the controller to know 988c349775eSScott Teel * how to process the command: 989c349775eSScott Teel * 990c349775eSScott Teel * Normal performant mode: 991c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 992c349775eSScott Teel * bits 1-3 = block fetch table entry 993c349775eSScott Teel * bits 4-6 = command type (== 0) 994c349775eSScott Teel * 995c349775eSScott Teel * ioaccel1 mode: 996c349775eSScott Teel * bit 0 = "performant mode" bit. 997c349775eSScott Teel * bits 1-3 = block fetch table entry 998c349775eSScott Teel * bits 4-6 = command type (== 110) 999c349775eSScott Teel * (command type is needed because ioaccel1 mode 1000c349775eSScott Teel * commands are submitted through the same register as normal 1001c349775eSScott Teel * mode commands, so this is how the controller knows whether 1002c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 1003c349775eSScott Teel * 1004c349775eSScott Teel * ioaccel2 mode: 1005c349775eSScott Teel * bit 0 = "performant mode" bit. 1006c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1007c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1008c349775eSScott Teel * a separate special register for submitting commands. 1009c349775eSScott Teel */ 1010c349775eSScott Teel 101125163bd5SWebb Scales /* 101225163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10133f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10143f5eac3aSStephen M. Cameron * register number 10153f5eac3aSStephen M. Cameron */ 101625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 101725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 101825163bd5SWebb Scales int reply_queue) 10193f5eac3aSStephen M. Cameron { 1020254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10213f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1022bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 102325163bd5SWebb Scales return; 102425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1025254f796bSMatt Gates c->Header.ReplyQueue = 1026804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 102725163bd5SWebb Scales else 102825163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1029254f796bSMatt Gates } 10303f5eac3aSStephen M. Cameron } 10313f5eac3aSStephen M. Cameron 1032c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 103325163bd5SWebb Scales struct CommandList *c, 103425163bd5SWebb Scales int reply_queue) 1035c349775eSScott Teel { 1036c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1037c349775eSScott Teel 103825163bd5SWebb Scales /* 103925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1040c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1041c349775eSScott Teel */ 104225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1043c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 104425163bd5SWebb Scales else 104525163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 104625163bd5SWebb Scales /* 104725163bd5SWebb Scales * Set the bits in the address sent down to include: 1048c349775eSScott Teel * - performant mode bit (bit 0) 1049c349775eSScott Teel * - pull count (bits 1-3) 1050c349775eSScott Teel * - command type (bits 4-6) 1051c349775eSScott Teel */ 1052c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1053c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1054c349775eSScott Teel } 1055c349775eSScott Teel 10568be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10578be986ccSStephen Cameron struct CommandList *c, 10588be986ccSStephen Cameron int reply_queue) 10598be986ccSStephen Cameron { 10608be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10618be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10628be986ccSStephen Cameron 10638be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10648be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10658be986ccSStephen Cameron */ 10668be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10678be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10688be986ccSStephen Cameron else 10698be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10708be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10718be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10728be986ccSStephen Cameron * - pull count (bits 0-3) 10738be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10748be986ccSStephen Cameron */ 10758be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10768be986ccSStephen Cameron } 10778be986ccSStephen Cameron 1078c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 107925163bd5SWebb Scales struct CommandList *c, 108025163bd5SWebb Scales int reply_queue) 1081c349775eSScott Teel { 1082c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1083c349775eSScott Teel 108425163bd5SWebb Scales /* 108525163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1086c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1087c349775eSScott Teel */ 108825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1089c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 109025163bd5SWebb Scales else 109125163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 109225163bd5SWebb Scales /* 109325163bd5SWebb Scales * Set the bits in the address sent down to include: 1094c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1095c349775eSScott Teel * - pull count (bits 0-3) 1096c349775eSScott Teel * - command type isn't needed for ioaccel2 1097c349775eSScott Teel */ 1098c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1099c349775eSScott Teel } 1100c349775eSScott Teel 1101e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1102e85c5974SStephen M. Cameron { 1103e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1104e85c5974SStephen M. Cameron } 1105e85c5974SStephen M. Cameron 1106e85c5974SStephen M. Cameron /* 1107e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1108e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1109e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1110e85c5974SStephen M. Cameron */ 1111e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1112e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1113e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1114e85c5974SStephen M. Cameron struct CommandList *c) 1115e85c5974SStephen M. Cameron { 1116e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1117e85c5974SStephen M. Cameron return; 1118e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1119e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1120e85c5974SStephen M. Cameron } 1121e85c5974SStephen M. Cameron 1122e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1123e85c5974SStephen M. Cameron struct CommandList *c) 1124e85c5974SStephen M. Cameron { 1125e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1126e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1127e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1128e85c5974SStephen M. Cameron } 1129e85c5974SStephen M. Cameron 113025163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 113125163bd5SWebb Scales struct CommandList *c, int reply_queue) 11323f5eac3aSStephen M. Cameron { 1133c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1134c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1135c349775eSScott Teel switch (c->cmd_type) { 1136c349775eSScott Teel case CMD_IOACCEL1: 113725163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1138c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1139c349775eSScott Teel break; 1140c349775eSScott Teel case CMD_IOACCEL2: 114125163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1142c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1143c349775eSScott Teel break; 11448be986ccSStephen Cameron case IOACCEL2_TMF: 11458be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11468be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11478be986ccSStephen Cameron break; 1148c349775eSScott Teel default: 114925163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1150f2405db8SDon Brace h->access.submit_command(h, c); 11513f5eac3aSStephen M. Cameron } 1152c05e8866SStephen Cameron } 11533f5eac3aSStephen M. Cameron 1154a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 115525163bd5SWebb Scales { 1156d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1157a58e7e53SWebb Scales return finish_cmd(c); 1158a58e7e53SWebb Scales 115925163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 116025163bd5SWebb Scales } 116125163bd5SWebb Scales 11623f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11633f5eac3aSStephen M. Cameron { 11643f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11653f5eac3aSStephen M. Cameron } 11663f5eac3aSStephen M. Cameron 11673f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11683f5eac3aSStephen M. Cameron { 11693f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11703f5eac3aSStephen M. Cameron return 0; 11713f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11723f5eac3aSStephen M. Cameron return 1; 11733f5eac3aSStephen M. Cameron return 0; 11743f5eac3aSStephen M. Cameron } 11753f5eac3aSStephen M. Cameron 1176edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1177edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1178edd16368SStephen M. Cameron { 1179edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1180edd16368SStephen M. Cameron * assumes h->devlock is held 1181edd16368SStephen M. Cameron */ 1182edd16368SStephen M. Cameron int i, found = 0; 1183cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1184edd16368SStephen M. Cameron 1185263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1186edd16368SStephen M. Cameron 1187edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1188edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1189263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1190edd16368SStephen M. Cameron } 1191edd16368SStephen M. Cameron 1192263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1193263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1194edd16368SStephen M. Cameron /* *bus = 1; */ 1195edd16368SStephen M. Cameron *target = i; 1196edd16368SStephen M. Cameron *lun = 0; 1197edd16368SStephen M. Cameron found = 1; 1198edd16368SStephen M. Cameron } 1199edd16368SStephen M. Cameron return !found; 1200edd16368SStephen M. Cameron } 1201edd16368SStephen M. Cameron 12021d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 12030d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12040d96ef5fSWebb Scales { 12057c59a0d4SDon Brace #define LABEL_SIZE 25 12067c59a0d4SDon Brace char label[LABEL_SIZE]; 12077c59a0d4SDon Brace 12089975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12099975ec9dSDon Brace return; 12109975ec9dSDon Brace 12117c59a0d4SDon Brace switch (dev->devtype) { 12127c59a0d4SDon Brace case TYPE_RAID: 12137c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12147c59a0d4SDon Brace break; 12157c59a0d4SDon Brace case TYPE_ENCLOSURE: 12167c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12177c59a0d4SDon Brace break; 12187c59a0d4SDon Brace case TYPE_DISK: 1219af15ed36SDon Brace case TYPE_ZBC: 12207c59a0d4SDon Brace if (dev->external) 12217c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12227c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12237c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12247c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12257c59a0d4SDon Brace else 12267c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12277c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12287c59a0d4SDon Brace raid_label[dev->raid_level]); 12297c59a0d4SDon Brace break; 12307c59a0d4SDon Brace case TYPE_ROM: 12317c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12327c59a0d4SDon Brace break; 12337c59a0d4SDon Brace case TYPE_TAPE: 12347c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12357c59a0d4SDon Brace break; 12367c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12377c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12387c59a0d4SDon Brace break; 12397c59a0d4SDon Brace default: 12407c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12417c59a0d4SDon Brace break; 12427c59a0d4SDon Brace } 12437c59a0d4SDon Brace 12440d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12457c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12460d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12470d96ef5fSWebb Scales description, 12480d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12490d96ef5fSWebb Scales dev->vendor, 12500d96ef5fSWebb Scales dev->model, 12517c59a0d4SDon Brace label, 12520d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12530d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12542a168208SKevin Barnett dev->expose_device); 12550d96ef5fSWebb Scales } 12560d96ef5fSWebb Scales 1257edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12588aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1259edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1260edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1261edd16368SStephen M. Cameron { 1262edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1263edd16368SStephen M. Cameron int n = h->ndevices; 1264edd16368SStephen M. Cameron int i; 1265edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1266edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1267edd16368SStephen M. Cameron 1268cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1269edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1270edd16368SStephen M. Cameron "inaccessible.\n"); 1271edd16368SStephen M. Cameron return -1; 1272edd16368SStephen M. Cameron } 1273edd16368SStephen M. Cameron 1274edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1275edd16368SStephen M. Cameron if (device->lun != -1) 1276edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1277edd16368SStephen M. Cameron goto lun_assigned; 1278edd16368SStephen M. Cameron 1279edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1280edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12812b08b3e9SDon Brace * unit no, zero otherwise. 1282edd16368SStephen M. Cameron */ 1283edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1284edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1285edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1286edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1287edd16368SStephen M. Cameron return -1; 1288edd16368SStephen M. Cameron goto lun_assigned; 1289edd16368SStephen M. Cameron } 1290edd16368SStephen M. Cameron 1291edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1292edd16368SStephen M. Cameron * Search through our list and find the device which 12939a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1294edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1295edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1296edd16368SStephen M. Cameron */ 1297edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1298edd16368SStephen M. Cameron addr1[4] = 0; 12999a4178b7Sshane.seymour addr1[5] = 0; 1300edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1301edd16368SStephen M. Cameron sd = h->dev[i]; 1302edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1303edd16368SStephen M. Cameron addr2[4] = 0; 13049a4178b7Sshane.seymour addr2[5] = 0; 13059a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1306edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1307edd16368SStephen M. Cameron device->bus = sd->bus; 1308edd16368SStephen M. Cameron device->target = sd->target; 1309edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1310edd16368SStephen M. Cameron break; 1311edd16368SStephen M. Cameron } 1312edd16368SStephen M. Cameron } 1313edd16368SStephen M. Cameron if (device->lun == -1) { 1314edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1315edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1316edd16368SStephen M. Cameron "configuration.\n"); 1317edd16368SStephen M. Cameron return -1; 1318edd16368SStephen M. Cameron } 1319edd16368SStephen M. Cameron 1320edd16368SStephen M. Cameron lun_assigned: 1321edd16368SStephen M. Cameron 1322edd16368SStephen M. Cameron h->dev[n] = device; 1323edd16368SStephen M. Cameron h->ndevices++; 1324edd16368SStephen M. Cameron added[*nadded] = device; 1325edd16368SStephen M. Cameron (*nadded)++; 13260d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13272a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1328a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1329a473d86cSRobert Elliott device->offload_enabled = 0; 1330edd16368SStephen M. Cameron return 0; 1331edd16368SStephen M. Cameron } 1332edd16368SStephen M. Cameron 1333bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13348aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1335bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1336bd9244f7SScott Teel { 1337a473d86cSRobert Elliott int offload_enabled; 1338bd9244f7SScott Teel /* assumes h->devlock is held */ 1339bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1340bd9244f7SScott Teel 1341bd9244f7SScott Teel /* Raid level changed. */ 1342bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1343250fb125SStephen M. Cameron 134403383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 134503383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 134603383736SDon Brace /* 134703383736SDon Brace * if drive is newly offload_enabled, we want to copy the 134803383736SDon Brace * raid map data first. If previously offload_enabled and 134903383736SDon Brace * offload_config were set, raid map data had better be 135003383736SDon Brace * the same as it was before. if raid map data is changed 135103383736SDon Brace * then it had better be the case that 135203383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 135303383736SDon Brace */ 13549fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 135503383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 135603383736SDon Brace } 1357a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1358a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1359a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1360a3144e0bSJoe Handzik } 1361a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 136203383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 136303383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 136403383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1365250fb125SStephen M. Cameron 136641ce4c35SStephen Cameron /* 136741ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 136841ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 136941ce4c35SStephen Cameron * can't do that until all the devices are updated. 137041ce4c35SStephen Cameron */ 137141ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 137241ce4c35SStephen Cameron if (!new_entry->offload_enabled) 137341ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 137441ce4c35SStephen Cameron 1375a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1376a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13770d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1378a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1379bd9244f7SScott Teel } 1380bd9244f7SScott Teel 13812a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13828aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13832a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13842a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13852a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13862a8ccf31SStephen M. Cameron { 13872a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1388cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13892a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13902a8ccf31SStephen M. Cameron (*nremoved)++; 139101350d05SStephen M. Cameron 139201350d05SStephen M. Cameron /* 139301350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 139401350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 139501350d05SStephen M. Cameron */ 139601350d05SStephen M. Cameron if (new_entry->target == -1) { 139701350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 139801350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 139901350d05SStephen M. Cameron } 140001350d05SStephen M. Cameron 14012a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 14022a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 14032a8ccf31SStephen M. Cameron (*nadded)++; 14040d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1405a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1406a473d86cSRobert Elliott new_entry->offload_enabled = 0; 14072a8ccf31SStephen M. Cameron } 14082a8ccf31SStephen M. Cameron 1409edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14108aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1411edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1412edd16368SStephen M. Cameron { 1413edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1414edd16368SStephen M. Cameron int i; 1415edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1416edd16368SStephen M. Cameron 1417cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1418edd16368SStephen M. Cameron 1419edd16368SStephen M. Cameron sd = h->dev[entry]; 1420edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1421edd16368SStephen M. Cameron (*nremoved)++; 1422edd16368SStephen M. Cameron 1423edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1424edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1425edd16368SStephen M. Cameron h->ndevices--; 14260d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1427edd16368SStephen M. Cameron } 1428edd16368SStephen M. Cameron 1429edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1430edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1431edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1432edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1433edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1434edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1435edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1436edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1437edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1438edd16368SStephen M. Cameron 1439edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1440edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1441edd16368SStephen M. Cameron { 1442edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1443edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1444edd16368SStephen M. Cameron */ 1445edd16368SStephen M. Cameron unsigned long flags; 1446edd16368SStephen M. Cameron int i, j; 1447edd16368SStephen M. Cameron 1448edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1449edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1450edd16368SStephen M. Cameron if (h->dev[i] == added) { 1451edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1452edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1453edd16368SStephen M. Cameron h->ndevices--; 1454edd16368SStephen M. Cameron break; 1455edd16368SStephen M. Cameron } 1456edd16368SStephen M. Cameron } 1457edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1458edd16368SStephen M. Cameron kfree(added); 1459edd16368SStephen M. Cameron } 1460edd16368SStephen M. Cameron 1461edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1462edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1463edd16368SStephen M. Cameron { 1464edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1465edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1466edd16368SStephen M. Cameron * to differ first 1467edd16368SStephen M. Cameron */ 1468edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1469edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1470edd16368SStephen M. Cameron return 0; 1471edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1472edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1473edd16368SStephen M. Cameron return 0; 1474edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1475edd16368SStephen M. Cameron return 0; 1476edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1477edd16368SStephen M. Cameron return 0; 1478edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1479edd16368SStephen M. Cameron return 0; 1480edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1481edd16368SStephen M. Cameron return 0; 1482edd16368SStephen M. Cameron return 1; 1483edd16368SStephen M. Cameron } 1484edd16368SStephen M. Cameron 1485bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1486bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1487bd9244f7SScott Teel { 1488bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1489bd9244f7SScott Teel * that the device is a different device, nor that the OS 1490bd9244f7SScott Teel * needs to be told anything about the change. 1491bd9244f7SScott Teel */ 1492bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1493bd9244f7SScott Teel return 1; 1494250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1495250fb125SStephen M. Cameron return 1; 1496250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1497250fb125SStephen M. Cameron return 1; 149893849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 149903383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 150003383736SDon Brace return 1; 1501bd9244f7SScott Teel return 0; 1502bd9244f7SScott Teel } 1503bd9244f7SScott Teel 1504edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1505edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1506edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1507bd9244f7SScott Teel * location in *index. 1508bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1509bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1510bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1511edd16368SStephen M. Cameron */ 1512edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1513edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1514edd16368SStephen M. Cameron int *index) 1515edd16368SStephen M. Cameron { 1516edd16368SStephen M. Cameron int i; 1517edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1518edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1519edd16368SStephen M. Cameron #define DEVICE_SAME 2 1520bd9244f7SScott Teel #define DEVICE_UPDATED 3 15211d33d85dSDon Brace if (needle == NULL) 15221d33d85dSDon Brace return DEVICE_NOT_FOUND; 15231d33d85dSDon Brace 1524edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 152523231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 152623231048SStephen M. Cameron continue; 1527edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1528edd16368SStephen M. Cameron *index = i; 1529bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1530bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1531bd9244f7SScott Teel return DEVICE_UPDATED; 1532edd16368SStephen M. Cameron return DEVICE_SAME; 1533bd9244f7SScott Teel } else { 15349846590eSStephen M. Cameron /* Keep offline devices offline */ 15359846590eSStephen M. Cameron if (needle->volume_offline) 15369846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1537edd16368SStephen M. Cameron return DEVICE_CHANGED; 1538edd16368SStephen M. Cameron } 1539edd16368SStephen M. Cameron } 1540bd9244f7SScott Teel } 1541edd16368SStephen M. Cameron *index = -1; 1542edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1543edd16368SStephen M. Cameron } 1544edd16368SStephen M. Cameron 15459846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15469846590eSStephen M. Cameron unsigned char scsi3addr[]) 15479846590eSStephen M. Cameron { 15489846590eSStephen M. Cameron struct offline_device_entry *device; 15499846590eSStephen M. Cameron unsigned long flags; 15509846590eSStephen M. Cameron 15519846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15529846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15539846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15549846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15559846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15569846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15579846590eSStephen M. Cameron return; 15589846590eSStephen M. Cameron } 15599846590eSStephen M. Cameron } 15609846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15619846590eSStephen M. Cameron 15629846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15639846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15647e8a9486SAmit Kushwaha if (!device) 15659846590eSStephen M. Cameron return; 15667e8a9486SAmit Kushwaha 15679846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15689846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15699846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15709846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15719846590eSStephen M. Cameron } 15729846590eSStephen M. Cameron 15739846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15749846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15759846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15769846590eSStephen M. Cameron { 15779846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15789846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15799846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15809846590eSStephen M. Cameron h->scsi_host->host_no, 15819846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15829846590eSStephen M. Cameron switch (sd->volume_offline) { 15839846590eSStephen M. Cameron case HPSA_LV_OK: 15849846590eSStephen M. Cameron break; 15859846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15869846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15879846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15889846590eSStephen M. Cameron h->scsi_host->host_no, 15899846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15909846590eSStephen M. Cameron break; 15915ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15925ca01204SScott Benesh dev_info(&h->pdev->dev, 15935ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15945ca01204SScott Benesh h->scsi_host->host_no, 15955ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15965ca01204SScott Benesh break; 15979846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15989846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15995ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 16009846590eSStephen M. Cameron h->scsi_host->host_no, 16019846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16029846590eSStephen M. Cameron break; 16039846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16049846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16059846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16069846590eSStephen M. Cameron h->scsi_host->host_no, 16079846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16089846590eSStephen M. Cameron break; 16099846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16109846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16119846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16129846590eSStephen M. Cameron h->scsi_host->host_no, 16139846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16149846590eSStephen M. Cameron break; 16159846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16169846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16179846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16189846590eSStephen M. Cameron h->scsi_host->host_no, 16199846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16209846590eSStephen M. Cameron break; 16219846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16229846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16239846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16249846590eSStephen M. Cameron h->scsi_host->host_no, 16259846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16269846590eSStephen M. Cameron break; 16279846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16289846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16299846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16309846590eSStephen M. Cameron h->scsi_host->host_no, 16319846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16329846590eSStephen M. Cameron break; 16339846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16349846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16359846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16369846590eSStephen M. Cameron h->scsi_host->host_no, 16379846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16389846590eSStephen M. Cameron break; 16399846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16409846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16419846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16429846590eSStephen M. Cameron h->scsi_host->host_no, 16439846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16449846590eSStephen M. Cameron break; 16459846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16469846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16479846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16489846590eSStephen M. Cameron h->scsi_host->host_no, 16499846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16509846590eSStephen M. Cameron break; 16519846590eSStephen M. Cameron } 16529846590eSStephen M. Cameron } 16539846590eSStephen M. Cameron 165403383736SDon Brace /* 165503383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 165603383736SDon Brace * raid offload configured. 165703383736SDon Brace */ 165803383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 165903383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 166003383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 166103383736SDon Brace { 166203383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 166303383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 166403383736SDon Brace int i, j; 166503383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 166603383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 166703383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 166803383736SDon Brace le16_to_cpu(map->layout_map_count) * 166903383736SDon Brace total_disks_per_row; 167003383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 167103383736SDon Brace total_disks_per_row; 167203383736SDon Brace int qdepth; 167303383736SDon Brace 167403383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 167503383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 167603383736SDon Brace 1677d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1678d604f533SWebb Scales 167903383736SDon Brace qdepth = 0; 168003383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 168103383736SDon Brace logical_drive->phys_disk[i] = NULL; 168203383736SDon Brace if (!logical_drive->offload_config) 168303383736SDon Brace continue; 168403383736SDon Brace for (j = 0; j < ndevices; j++) { 16851d33d85dSDon Brace if (dev[j] == NULL) 16861d33d85dSDon Brace continue; 1687ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1688ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1689af15ed36SDon Brace continue; 1690f3f01730SKevin Barnett if (is_logical_device(dev[j])) 169103383736SDon Brace continue; 169203383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 169303383736SDon Brace continue; 169403383736SDon Brace 169503383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 169603383736SDon Brace if (i < nphys_disk) 169703383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 169803383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 169903383736SDon Brace break; 170003383736SDon Brace } 170103383736SDon Brace 170203383736SDon Brace /* 170303383736SDon Brace * This can happen if a physical drive is removed and 170403383736SDon Brace * the logical drive is degraded. In that case, the RAID 170503383736SDon Brace * map data will refer to a physical disk which isn't actually 170603383736SDon Brace * present. And in that case offload_enabled should already 170703383736SDon Brace * be 0, but we'll turn it off here just in case 170803383736SDon Brace */ 170903383736SDon Brace if (!logical_drive->phys_disk[i]) { 171003383736SDon Brace logical_drive->offload_enabled = 0; 171141ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 171241ce4c35SStephen Cameron logical_drive->queue_depth = 8; 171303383736SDon Brace } 171403383736SDon Brace } 171503383736SDon Brace if (nraid_map_entries) 171603383736SDon Brace /* 171703383736SDon Brace * This is correct for reads, too high for full stripe writes, 171803383736SDon Brace * way too high for partial stripe writes 171903383736SDon Brace */ 172003383736SDon Brace logical_drive->queue_depth = qdepth; 172103383736SDon Brace else 172203383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 172303383736SDon Brace } 172403383736SDon Brace 172503383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 172603383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 172703383736SDon Brace { 172803383736SDon Brace int i; 172903383736SDon Brace 173003383736SDon Brace for (i = 0; i < ndevices; i++) { 17311d33d85dSDon Brace if (dev[i] == NULL) 17321d33d85dSDon Brace continue; 1733ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1734ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1735af15ed36SDon Brace continue; 1736f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 173703383736SDon Brace continue; 173841ce4c35SStephen Cameron 173941ce4c35SStephen Cameron /* 174041ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 174141ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 174241ce4c35SStephen Cameron * and since it isn't changing, we do not need to 174341ce4c35SStephen Cameron * update it. 174441ce4c35SStephen Cameron */ 174541ce4c35SStephen Cameron if (dev[i]->offload_enabled) 174641ce4c35SStephen Cameron continue; 174741ce4c35SStephen Cameron 174803383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 174903383736SDon Brace } 175003383736SDon Brace } 175103383736SDon Brace 1752096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1753096ccff4SKevin Barnett { 1754096ccff4SKevin Barnett int rc = 0; 1755096ccff4SKevin Barnett 1756096ccff4SKevin Barnett if (!h->scsi_host) 1757096ccff4SKevin Barnett return 1; 1758096ccff4SKevin Barnett 1759d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1760096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1761096ccff4SKevin Barnett device->target, device->lun); 1762d04e62b9SKevin Barnett else /* HBA */ 1763d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1764d04e62b9SKevin Barnett 1765096ccff4SKevin Barnett return rc; 1766096ccff4SKevin Barnett } 1767096ccff4SKevin Barnett 1768ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1769ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1770ba74fdc4SDon Brace { 1771ba74fdc4SDon Brace int i; 1772ba74fdc4SDon Brace int count = 0; 1773ba74fdc4SDon Brace 1774ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1775ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1776ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1777ba74fdc4SDon Brace 1778ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1779ba74fdc4SDon Brace dev->scsi3addr)) { 1780ba74fdc4SDon Brace unsigned long flags; 1781ba74fdc4SDon Brace 1782ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1783ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1784ba74fdc4SDon Brace ++count; 1785ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1786ba74fdc4SDon Brace } 1787ba74fdc4SDon Brace 1788ba74fdc4SDon Brace cmd_free(h, c); 1789ba74fdc4SDon Brace } 1790ba74fdc4SDon Brace 1791ba74fdc4SDon Brace return count; 1792ba74fdc4SDon Brace } 1793ba74fdc4SDon Brace 1794ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1795ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1796ba74fdc4SDon Brace { 1797ba74fdc4SDon Brace int cmds = 0; 1798ba74fdc4SDon Brace int waits = 0; 1799ba74fdc4SDon Brace 1800ba74fdc4SDon Brace while (1) { 1801ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1802ba74fdc4SDon Brace if (cmds == 0) 1803ba74fdc4SDon Brace break; 1804ba74fdc4SDon Brace if (++waits > 20) 1805ba74fdc4SDon Brace break; 1806ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1807ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1808ba74fdc4SDon Brace __func__, cmds); 1809ba74fdc4SDon Brace msleep(1000); 1810ba74fdc4SDon Brace } 1811ba74fdc4SDon Brace } 1812ba74fdc4SDon Brace 1813096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1814096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1815096ccff4SKevin Barnett { 1816096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1817096ccff4SKevin Barnett 1818096ccff4SKevin Barnett if (!h->scsi_host) 1819096ccff4SKevin Barnett return; 1820096ccff4SKevin Barnett 1821d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1822096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1823096ccff4SKevin Barnett device->target, device->lun); 1824096ccff4SKevin Barnett if (sdev) { 1825096ccff4SKevin Barnett scsi_remove_device(sdev); 1826096ccff4SKevin Barnett scsi_device_put(sdev); 1827096ccff4SKevin Barnett } else { 1828096ccff4SKevin Barnett /* 1829096ccff4SKevin Barnett * We don't expect to get here. Future commands 1830096ccff4SKevin Barnett * to this device will get a selection timeout as 1831096ccff4SKevin Barnett * if the device were gone. 1832096ccff4SKevin Barnett */ 1833096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1834096ccff4SKevin Barnett "didn't find device for removal."); 1835096ccff4SKevin Barnett } 1836ba74fdc4SDon Brace } else { /* HBA */ 1837ba74fdc4SDon Brace 1838ba74fdc4SDon Brace device->removed = 1; 1839ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1840ba74fdc4SDon Brace 1841d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1842096ccff4SKevin Barnett } 1843ba74fdc4SDon Brace } 1844096ccff4SKevin Barnett 18458aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1846edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1847edd16368SStephen M. Cameron { 1848edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1849edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1850edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1851edd16368SStephen M. Cameron */ 1852edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1853edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1854edd16368SStephen M. Cameron unsigned long flags; 1855edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1856edd16368SStephen M. Cameron int nadded, nremoved; 1857edd16368SStephen M. Cameron 1858da03ded0SDon Brace /* 1859da03ded0SDon Brace * A reset can cause a device status to change 1860da03ded0SDon Brace * re-schedule the scan to see what happened. 1861da03ded0SDon Brace */ 1862da03ded0SDon Brace if (h->reset_in_progress) { 1863da03ded0SDon Brace h->drv_req_rescan = 1; 1864da03ded0SDon Brace return; 1865da03ded0SDon Brace } 1866edd16368SStephen M. Cameron 1867cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1868cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1869edd16368SStephen M. Cameron 1870edd16368SStephen M. Cameron if (!added || !removed) { 1871edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1872edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1873edd16368SStephen M. Cameron goto free_and_out; 1874edd16368SStephen M. Cameron } 1875edd16368SStephen M. Cameron 1876edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1877edd16368SStephen M. Cameron 1878edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1879edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1880edd16368SStephen M. Cameron * devices which have changed, remove the old device 1881edd16368SStephen M. Cameron * info and add the new device info. 1882bd9244f7SScott Teel * If minor device attributes change, just update 1883bd9244f7SScott Teel * the existing device structure. 1884edd16368SStephen M. Cameron */ 1885edd16368SStephen M. Cameron i = 0; 1886edd16368SStephen M. Cameron nremoved = 0; 1887edd16368SStephen M. Cameron nadded = 0; 1888edd16368SStephen M. Cameron while (i < h->ndevices) { 1889edd16368SStephen M. Cameron csd = h->dev[i]; 1890edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1891edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1892edd16368SStephen M. Cameron changes++; 18938aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1894edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1895edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1896edd16368SStephen M. Cameron changes++; 18978aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18982a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1899c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1900c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1901c7f172dcSStephen M. Cameron */ 1902c7f172dcSStephen M. Cameron sd[entry] = NULL; 1903bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19048aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1905edd16368SStephen M. Cameron } 1906edd16368SStephen M. Cameron i++; 1907edd16368SStephen M. Cameron } 1908edd16368SStephen M. Cameron 1909edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1910edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1911edd16368SStephen M. Cameron */ 1912edd16368SStephen M. Cameron 1913edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1914edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1915edd16368SStephen M. Cameron continue; 19169846590eSStephen M. Cameron 19179846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19189846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19199846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19209846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19219846590eSStephen M. Cameron */ 19229846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19239846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19240d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19259846590eSStephen M. Cameron continue; 19269846590eSStephen M. Cameron } 19279846590eSStephen M. Cameron 1928edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1929edd16368SStephen M. Cameron h->ndevices, &entry); 1930edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1931edd16368SStephen M. Cameron changes++; 19328aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1933edd16368SStephen M. Cameron break; 1934edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1935edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1936edd16368SStephen M. Cameron /* should never happen... */ 1937edd16368SStephen M. Cameron changes++; 1938edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1939edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1940edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1941edd16368SStephen M. Cameron } 1942edd16368SStephen M. Cameron } 194341ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 194441ce4c35SStephen Cameron 194541ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 194641ce4c35SStephen Cameron * any logical drives that need it enabled. 194741ce4c35SStephen Cameron */ 19481d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19491d33d85dSDon Brace if (h->dev[i] == NULL) 19501d33d85dSDon Brace continue; 195141ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19521d33d85dSDon Brace } 195341ce4c35SStephen Cameron 1954edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1955edd16368SStephen M. Cameron 19569846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19579846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19589846590eSStephen M. Cameron * so don't touch h->dev[] 19599846590eSStephen M. Cameron */ 19609846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19619846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19629846590eSStephen M. Cameron continue; 19639846590eSStephen M. Cameron if (sd[i]->volume_offline) 19649846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19659846590eSStephen M. Cameron } 19669846590eSStephen M. Cameron 1967edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1968edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1969edd16368SStephen M. Cameron * first time through. 1970edd16368SStephen M. Cameron */ 19718aa60681SDon Brace if (!changes) 1972edd16368SStephen M. Cameron goto free_and_out; 1973edd16368SStephen M. Cameron 1974edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1975edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19761d33d85dSDon Brace if (removed[i] == NULL) 19771d33d85dSDon Brace continue; 1978096ccff4SKevin Barnett if (removed[i]->expose_device) 1979096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1980edd16368SStephen M. Cameron kfree(removed[i]); 1981edd16368SStephen M. Cameron removed[i] = NULL; 1982edd16368SStephen M. Cameron } 1983edd16368SStephen M. Cameron 1984edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1985edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1986096ccff4SKevin Barnett int rc = 0; 1987096ccff4SKevin Barnett 19881d33d85dSDon Brace if (added[i] == NULL) 198941ce4c35SStephen Cameron continue; 19902a168208SKevin Barnett if (!(added[i]->expose_device)) 1991edd16368SStephen M. Cameron continue; 1992096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1993096ccff4SKevin Barnett if (!rc) 1994edd16368SStephen M. Cameron continue; 1995096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1996096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1997edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1998edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1999edd16368SStephen M. Cameron */ 2000edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 2001853633e8SDon Brace h->drv_req_rescan = 1; 2002edd16368SStephen M. Cameron } 2003edd16368SStephen M. Cameron 2004edd16368SStephen M. Cameron free_and_out: 2005edd16368SStephen M. Cameron kfree(added); 2006edd16368SStephen M. Cameron kfree(removed); 2007edd16368SStephen M. Cameron } 2008edd16368SStephen M. Cameron 2009edd16368SStephen M. Cameron /* 20109e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2011edd16368SStephen M. Cameron * Assume's h->devlock is held. 2012edd16368SStephen M. Cameron */ 2013edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2014edd16368SStephen M. Cameron int bus, int target, int lun) 2015edd16368SStephen M. Cameron { 2016edd16368SStephen M. Cameron int i; 2017edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2018edd16368SStephen M. Cameron 2019edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2020edd16368SStephen M. Cameron sd = h->dev[i]; 2021edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2022edd16368SStephen M. Cameron return sd; 2023edd16368SStephen M. Cameron } 2024edd16368SStephen M. Cameron return NULL; 2025edd16368SStephen M. Cameron } 2026edd16368SStephen M. Cameron 2027edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2028edd16368SStephen M. Cameron { 20297630b3a5SHannes Reinecke struct hpsa_scsi_dev_t *sd = NULL; 2030edd16368SStephen M. Cameron unsigned long flags; 2031edd16368SStephen M. Cameron struct ctlr_info *h; 2032edd16368SStephen M. Cameron 2033edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2034edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2035d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2036d04e62b9SKevin Barnett struct scsi_target *starget; 2037d04e62b9SKevin Barnett struct sas_rphy *rphy; 2038d04e62b9SKevin Barnett 2039d04e62b9SKevin Barnett starget = scsi_target(sdev); 2040d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2041d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2042d04e62b9SKevin Barnett if (sd) { 2043d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2044d04e62b9SKevin Barnett sd->lun = sdev->lun; 2045d04e62b9SKevin Barnett } 20467630b3a5SHannes Reinecke } 20477630b3a5SHannes Reinecke if (!sd) 2048edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2049edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2050d04e62b9SKevin Barnett 2051d04e62b9SKevin Barnett if (sd && sd->expose_device) { 205203383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2053d04e62b9SKevin Barnett sdev->hostdata = sd; 205441ce4c35SStephen Cameron } else 205541ce4c35SStephen Cameron sdev->hostdata = NULL; 2056edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2057edd16368SStephen M. Cameron return 0; 2058edd16368SStephen M. Cameron } 2059edd16368SStephen M. Cameron 206041ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 206141ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 206241ce4c35SStephen Cameron { 206341ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 206441ce4c35SStephen Cameron int queue_depth; 206541ce4c35SStephen Cameron 206641ce4c35SStephen Cameron sd = sdev->hostdata; 20672a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 206841ce4c35SStephen Cameron 206941ce4c35SStephen Cameron if (sd) 207041ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 207141ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 207241ce4c35SStephen Cameron else 207341ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 207441ce4c35SStephen Cameron 207541ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 207641ce4c35SStephen Cameron 207741ce4c35SStephen Cameron return 0; 207841ce4c35SStephen Cameron } 207941ce4c35SStephen Cameron 2080edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2081edd16368SStephen M. Cameron { 2082bcc44255SStephen M. Cameron /* nothing to do. */ 2083edd16368SStephen M. Cameron } 2084edd16368SStephen M. Cameron 2085d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2086d9a729f3SWebb Scales { 2087d9a729f3SWebb Scales int i; 2088d9a729f3SWebb Scales 2089d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2090d9a729f3SWebb Scales return; 2091d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2092d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2093d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2094d9a729f3SWebb Scales } 2095d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2096d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2097d9a729f3SWebb Scales } 2098d9a729f3SWebb Scales 2099d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2100d9a729f3SWebb Scales { 2101d9a729f3SWebb Scales int i; 2102d9a729f3SWebb Scales 2103d9a729f3SWebb Scales if (h->chainsize <= 0) 2104d9a729f3SWebb Scales return 0; 2105d9a729f3SWebb Scales 2106d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2107d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2108d9a729f3SWebb Scales GFP_KERNEL); 2109d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2110d9a729f3SWebb Scales return -ENOMEM; 2111d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2112d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2113d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2114d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2115d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2116d9a729f3SWebb Scales goto clean; 2117d9a729f3SWebb Scales } 2118d9a729f3SWebb Scales return 0; 2119d9a729f3SWebb Scales 2120d9a729f3SWebb Scales clean: 2121d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2122d9a729f3SWebb Scales return -ENOMEM; 2123d9a729f3SWebb Scales } 2124d9a729f3SWebb Scales 212533a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 212633a2ffceSStephen M. Cameron { 212733a2ffceSStephen M. Cameron int i; 212833a2ffceSStephen M. Cameron 212933a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 213033a2ffceSStephen M. Cameron return; 213133a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 213233a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 213333a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 213433a2ffceSStephen M. Cameron } 213533a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 213633a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 213733a2ffceSStephen M. Cameron } 213833a2ffceSStephen M. Cameron 2139105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 214033a2ffceSStephen M. Cameron { 214133a2ffceSStephen M. Cameron int i; 214233a2ffceSStephen M. Cameron 214333a2ffceSStephen M. Cameron if (h->chainsize <= 0) 214433a2ffceSStephen M. Cameron return 0; 214533a2ffceSStephen M. Cameron 214633a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 214733a2ffceSStephen M. Cameron GFP_KERNEL); 21487e8a9486SAmit Kushwaha if (!h->cmd_sg_list) 214933a2ffceSStephen M. Cameron return -ENOMEM; 21507e8a9486SAmit Kushwaha 215133a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 215233a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 215333a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21547e8a9486SAmit Kushwaha if (!h->cmd_sg_list[i]) 215533a2ffceSStephen M. Cameron goto clean; 21567e8a9486SAmit Kushwaha 21573d4e6af8SRobert Elliott } 215833a2ffceSStephen M. Cameron return 0; 215933a2ffceSStephen M. Cameron 216033a2ffceSStephen M. Cameron clean: 216133a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 216233a2ffceSStephen M. Cameron return -ENOMEM; 216333a2ffceSStephen M. Cameron } 216433a2ffceSStephen M. Cameron 2165d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2166d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2167d9a729f3SWebb Scales { 2168d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2169d9a729f3SWebb Scales u64 temp64; 2170d9a729f3SWebb Scales u32 chain_size; 2171d9a729f3SWebb Scales 2172d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2173a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2174d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2175d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2176d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2177d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2178d9a729f3SWebb Scales cp->sg->address = 0; 2179d9a729f3SWebb Scales return -1; 2180d9a729f3SWebb Scales } 2181d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2182d9a729f3SWebb Scales return 0; 2183d9a729f3SWebb Scales } 2184d9a729f3SWebb Scales 2185d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2186d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2187d9a729f3SWebb Scales { 2188d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2189d9a729f3SWebb Scales u64 temp64; 2190d9a729f3SWebb Scales u32 chain_size; 2191d9a729f3SWebb Scales 2192d9a729f3SWebb Scales chain_sg = cp->sg; 2193d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2194a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2195d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2196d9a729f3SWebb Scales } 2197d9a729f3SWebb Scales 2198e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 219933a2ffceSStephen M. Cameron struct CommandList *c) 220033a2ffceSStephen M. Cameron { 220133a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 220233a2ffceSStephen M. Cameron u64 temp64; 220350a0decfSStephen M. Cameron u32 chain_len; 220433a2ffceSStephen M. Cameron 220533a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 220633a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 220750a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 220850a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22092b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 221050a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 221150a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 221233a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2213e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2214e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 221550a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2216e2bea6dfSStephen M. Cameron return -1; 2217e2bea6dfSStephen M. Cameron } 221850a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2219e2bea6dfSStephen M. Cameron return 0; 222033a2ffceSStephen M. Cameron } 222133a2ffceSStephen M. Cameron 222233a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 222333a2ffceSStephen M. Cameron struct CommandList *c) 222433a2ffceSStephen M. Cameron { 222533a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 222633a2ffceSStephen M. Cameron 222750a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 222833a2ffceSStephen M. Cameron return; 222933a2ffceSStephen M. Cameron 223033a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 223150a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 223250a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 223333a2ffceSStephen M. Cameron } 223433a2ffceSStephen M. Cameron 2235a09c1441SScott Teel 2236a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2237a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2238a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2239a09c1441SScott Teel */ 2240a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2241c349775eSScott Teel struct CommandList *c, 2242c349775eSScott Teel struct scsi_cmnd *cmd, 2243ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2244ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2245c349775eSScott Teel { 2246c349775eSScott Teel int data_len; 2247a09c1441SScott Teel int retry = 0; 2248c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2249c349775eSScott Teel 2250c349775eSScott Teel switch (c2->error_data.serv_response) { 2251c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2252c349775eSScott Teel switch (c2->error_data.status) { 2253c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2254c349775eSScott Teel break; 2255c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2256ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2257c349775eSScott Teel if (c2->error_data.data_present != 2258ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2259ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2260ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2261c349775eSScott Teel break; 2262ee6b1889SStephen M. Cameron } 2263c349775eSScott Teel /* copy the sense data */ 2264c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2265c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2266c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2267c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2268c349775eSScott Teel data_len = 2269c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2270c349775eSScott Teel memcpy(cmd->sense_buffer, 2271c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2272a09c1441SScott Teel retry = 1; 2273c349775eSScott Teel break; 2274c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2275a09c1441SScott Teel retry = 1; 2276c349775eSScott Teel break; 2277c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2278a09c1441SScott Teel retry = 1; 2279c349775eSScott Teel break; 2280c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22814a8da22bSStephen Cameron retry = 1; 2282c349775eSScott Teel break; 2283c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2284a09c1441SScott Teel retry = 1; 2285c349775eSScott Teel break; 2286c349775eSScott Teel default: 2287a09c1441SScott Teel retry = 1; 2288c349775eSScott Teel break; 2289c349775eSScott Teel } 2290c349775eSScott Teel break; 2291c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2292c40820d5SJoe Handzik switch (c2->error_data.status) { 2293c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2294c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2295c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2296c40820d5SJoe Handzik retry = 1; 2297c40820d5SJoe Handzik break; 2298c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2299c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2300c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2301c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2302c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2303c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2304c40820d5SJoe Handzik break; 2305c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2306c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2307c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2308ba74fdc4SDon Brace /* 2309ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2310ba74fdc4SDon Brace * get a state change event from the controller but 2311ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2312ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2313ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2314ba74fdc4SDon Brace * of the disk to get the same device node. 2315ba74fdc4SDon Brace */ 2316ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2317ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2318ba74fdc4SDon Brace dev->removed = 1; 2319ba74fdc4SDon Brace h->drv_req_rescan = 1; 2320ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2321ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2322ba74fdc4SDon Brace } else 2323ba74fdc4SDon Brace /* 2324ba74fdc4SDon Brace * Retry by sending down the RAID path. 2325ba74fdc4SDon Brace * We will get an event from ctlr to 2326ba74fdc4SDon Brace * trigger rescan regardless. 2327ba74fdc4SDon Brace */ 2328c40820d5SJoe Handzik retry = 1; 2329c40820d5SJoe Handzik break; 2330c40820d5SJoe Handzik default: 2331c40820d5SJoe Handzik retry = 1; 2332c40820d5SJoe Handzik } 2333c349775eSScott Teel break; 2334c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2335c349775eSScott Teel break; 2336c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2337c349775eSScott Teel break; 2338c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2339a09c1441SScott Teel retry = 1; 2340c349775eSScott Teel break; 2341c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2342c349775eSScott Teel break; 2343c349775eSScott Teel default: 2344a09c1441SScott Teel retry = 1; 2345c349775eSScott Teel break; 2346c349775eSScott Teel } 2347a09c1441SScott Teel 2348a09c1441SScott Teel return retry; /* retry on raid path? */ 2349c349775eSScott Teel } 2350c349775eSScott Teel 2351a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2352a58e7e53SWebb Scales struct CommandList *c) 2353a58e7e53SWebb Scales { 2354d604f533SWebb Scales bool do_wake = false; 2355d604f533SWebb Scales 2356a58e7e53SWebb Scales /* 2357a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2358a58e7e53SWebb Scales * 2359a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2360a58e7e53SWebb Scales * 2. The SCSI command completes 2361a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2362a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2363a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2364a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2365a58e7e53SWebb Scales * Now we have aborted the wrong command. 2366a58e7e53SWebb Scales * 2367d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2368d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2369a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2370a58e7e53SWebb Scales */ 2371a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2372d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2373a58e7e53SWebb Scales if (c->abort_pending) { 2374d604f533SWebb Scales do_wake = true; 2375a58e7e53SWebb Scales c->abort_pending = false; 2376a58e7e53SWebb Scales } 2377d604f533SWebb Scales if (c->reset_pending) { 2378d604f533SWebb Scales unsigned long flags; 2379d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2380d604f533SWebb Scales 2381d604f533SWebb Scales /* 2382d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2383d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2384d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2385d604f533SWebb Scales */ 2386d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2387d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2388d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2389d604f533SWebb Scales do_wake = true; 2390d604f533SWebb Scales c->reset_pending = NULL; 2391d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2392d604f533SWebb Scales } 2393d604f533SWebb Scales 2394d604f533SWebb Scales if (do_wake) 2395d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2396a58e7e53SWebb Scales } 2397a58e7e53SWebb Scales 239873153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 239973153fe5SWebb Scales struct CommandList *c) 240073153fe5SWebb Scales { 240173153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 240273153fe5SWebb Scales cmd_tagged_free(h, c); 240373153fe5SWebb Scales } 240473153fe5SWebb Scales 24058a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24068a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24078a0ff92cSWebb Scales { 240873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2409d49c2077SDon Brace if (cmd && cmd->scsi_done) 24108a0ff92cSWebb Scales cmd->scsi_done(cmd); 24118a0ff92cSWebb Scales } 24128a0ff92cSWebb Scales 24138a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24148a0ff92cSWebb Scales { 24158a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24168a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24178a0ff92cSWebb Scales } 24188a0ff92cSWebb Scales 2419a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2420a58e7e53SWebb Scales { 2421a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2422a58e7e53SWebb Scales } 2423a58e7e53SWebb Scales 2424a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2425a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2426a58e7e53SWebb Scales { 2427a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2428a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2429a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 243073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2431a58e7e53SWebb Scales } 2432a58e7e53SWebb Scales 2433c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2434c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2435c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2436c349775eSScott Teel { 2437c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2438c349775eSScott Teel 2439c349775eSScott Teel /* check for good status */ 2440c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24418a0ff92cSWebb Scales c2->error_data.status == 0)) 24428a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2443c349775eSScott Teel 24448a0ff92cSWebb Scales /* 24458a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2446c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2447c349775eSScott Teel * wrong. 2448c349775eSScott Teel */ 2449f3f01730SKevin Barnett if (is_logical_device(dev) && 2450c349775eSScott Teel c2->error_data.serv_response == 2451c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2452080ef1ccSDon Brace if (c2->error_data.status == 2453064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2454c349775eSScott Teel dev->offload_enabled = 0; 2455064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2456064d1b1dSDon Brace } 24578a0ff92cSWebb Scales 24588a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2459080ef1ccSDon Brace } 2460080ef1ccSDon Brace 2461ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24628a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2463080ef1ccSDon Brace 24648a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2465c349775eSScott Teel } 2466c349775eSScott Teel 24679437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24689437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24699437ac43SStephen Cameron struct CommandList *cp) 24709437ac43SStephen Cameron { 24719437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24729437ac43SStephen Cameron 24739437ac43SStephen Cameron switch (tmf_status) { 24749437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24759437ac43SStephen Cameron /* 24769437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24779437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24789437ac43SStephen Cameron */ 24799437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24809437ac43SStephen Cameron return 0; 24819437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24829437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24839437ac43SStephen Cameron case CISS_TMF_FAILED: 24849437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24859437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24869437ac43SStephen Cameron break; 24879437ac43SStephen Cameron default: 24889437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24899437ac43SStephen Cameron tmf_status); 24909437ac43SStephen Cameron break; 24919437ac43SStephen Cameron } 24929437ac43SStephen Cameron return -tmf_status; 24939437ac43SStephen Cameron } 24949437ac43SStephen Cameron 24951fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2496edd16368SStephen M. Cameron { 2497edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2498edd16368SStephen M. Cameron struct ctlr_info *h; 2499edd16368SStephen M. Cameron struct ErrorInfo *ei; 2500283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2501d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2502edd16368SStephen M. Cameron 25039437ac43SStephen Cameron u8 sense_key; 25049437ac43SStephen Cameron u8 asc; /* additional sense code */ 25059437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2506db111e18SStephen M. Cameron unsigned long sense_data_size; 2507edd16368SStephen M. Cameron 2508edd16368SStephen M. Cameron ei = cp->err_info; 25097fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2510edd16368SStephen M. Cameron h = cp->h; 2511d49c2077SDon Brace 2512d49c2077SDon Brace if (!cmd->device) { 2513d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2514d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2515d49c2077SDon Brace } 2516d49c2077SDon Brace 2517283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 251845e596cdSDon Brace if (!dev) { 251945e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 252045e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 252145e596cdSDon Brace } 2522d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2523edd16368SStephen M. Cameron 2524edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2525e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25262b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 252733a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2528edd16368SStephen M. Cameron 2529d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2530d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2531d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2532d9a729f3SWebb Scales 2533edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2534edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2535c349775eSScott Teel 2536d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2537d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2538d49c2077SDon Brace dev->removed) { 2539d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2540d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2541d49c2077SDon Brace } 2542d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 254303383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2544d49c2077SDon Brace } 254503383736SDon Brace 254625163bd5SWebb Scales /* 254725163bd5SWebb Scales * We check for lockup status here as it may be set for 254825163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 254925163bd5SWebb Scales * fail_all_oustanding_cmds() 255025163bd5SWebb Scales */ 255125163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 255225163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 255325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25548a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 255525163bd5SWebb Scales } 255625163bd5SWebb Scales 2557d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2558d604f533SWebb Scales if (cp->reset_pending) 2559bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2560d604f533SWebb Scales if (cp->abort_pending) 2561d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2562d604f533SWebb Scales } 2563d604f533SWebb Scales 2564c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2565c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2566c349775eSScott Teel 25676aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25688a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25698a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25706aa4c361SRobert Elliott 2571e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2572e1f7de0cSMatt Gates * CISS header used below for error handling. 2573e1f7de0cSMatt Gates */ 2574e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2575e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25762b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25772b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25782b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25792b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 258050a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2581e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2582e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2583283b4a9bSStephen M. Cameron 2584283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2585283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2586283b4a9bSStephen M. Cameron * wrong. 2587283b4a9bSStephen M. Cameron */ 2588f3f01730SKevin Barnett if (is_logical_device(dev)) { 2589283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2590283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25918a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2592283b4a9bSStephen M. Cameron } 2593e1f7de0cSMatt Gates } 2594e1f7de0cSMatt Gates 2595edd16368SStephen M. Cameron /* an error has occurred */ 2596edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2597edd16368SStephen M. Cameron 2598edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25999437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 26009437ac43SStephen Cameron /* copy the sense data */ 26019437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 26029437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 26039437ac43SStephen Cameron else 26049437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26059437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26069437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26079437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26089437ac43SStephen Cameron if (ei->ScsiStatus) 26099437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26109437ac43SStephen Cameron &sense_key, &asc, &ascq); 2611edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 26121d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 26132e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26141d3b3609SMatt Gates break; 26151d3b3609SMatt Gates } 2616edd16368SStephen M. Cameron break; 2617edd16368SStephen M. Cameron } 2618edd16368SStephen M. Cameron /* Problem was not a check condition 2619edd16368SStephen M. Cameron * Pass it up to the upper layers... 2620edd16368SStephen M. Cameron */ 2621edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2622edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2623edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2624edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2625edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2626edd16368SStephen M. Cameron sense_key, asc, ascq, 2627edd16368SStephen M. Cameron cmd->result); 2628edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2629edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2630edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2631edd16368SStephen M. Cameron 2632edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2633edd16368SStephen M. Cameron * but there is a bug in some released firmware 2634edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2635edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2636edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2637edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2638edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2639edd16368SStephen M. Cameron * look like selection timeout since that is 2640edd16368SStephen M. Cameron * the most common reason for this to occur, 2641edd16368SStephen M. Cameron * and it's severe enough. 2642edd16368SStephen M. Cameron */ 2643edd16368SStephen M. Cameron 2644edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2645edd16368SStephen M. Cameron } 2646edd16368SStephen M. Cameron break; 2647edd16368SStephen M. Cameron 2648edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2649edd16368SStephen M. Cameron break; 2650edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2651f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2652f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2653edd16368SStephen M. Cameron break; 2654edd16368SStephen M. Cameron case CMD_INVALID: { 2655edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2656edd16368SStephen M. Cameron print_cmd(cp); */ 2657edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2658edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2659edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2660edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2661edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2662edd16368SStephen M. Cameron * missing target. */ 2663edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2664edd16368SStephen M. Cameron } 2665edd16368SStephen M. Cameron break; 2666edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2667256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2668f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2669f42e81e1SStephen Cameron cp->Request.CDB); 2670edd16368SStephen M. Cameron break; 2671edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2672edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2673f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2674f42e81e1SStephen Cameron cp->Request.CDB); 2675edd16368SStephen M. Cameron break; 2676edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2677edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2678f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2679f42e81e1SStephen Cameron cp->Request.CDB); 2680edd16368SStephen M. Cameron break; 2681edd16368SStephen M. Cameron case CMD_ABORTED: 2682a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2683a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2684edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2685edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2686f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2687f42e81e1SStephen Cameron cp->Request.CDB); 2688edd16368SStephen M. Cameron break; 2689edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2690f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2691f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2692f42e81e1SStephen Cameron cp->Request.CDB); 2693edd16368SStephen M. Cameron break; 2694edd16368SStephen M. Cameron case CMD_TIMEOUT: 2695edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2696f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2697f42e81e1SStephen Cameron cp->Request.CDB); 2698edd16368SStephen M. Cameron break; 26991d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 27001d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 27011d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 27021d5e2ed0SStephen M. Cameron break; 27039437ac43SStephen Cameron case CMD_TMF_STATUS: 27049437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27059437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27069437ac43SStephen Cameron break; 2707283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2708283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2709283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2710283b4a9bSStephen M. Cameron */ 2711283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2712283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2713283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2714283b4a9bSStephen M. Cameron break; 2715edd16368SStephen M. Cameron default: 2716edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2717edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2718edd16368SStephen M. Cameron cp, ei->CommandStatus); 2719edd16368SStephen M. Cameron } 27208a0ff92cSWebb Scales 27218a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2722edd16368SStephen M. Cameron } 2723edd16368SStephen M. Cameron 2724edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2725edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2726edd16368SStephen M. Cameron { 2727edd16368SStephen M. Cameron int i; 2728edd16368SStephen M. Cameron 272950a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 273050a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 273150a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2732edd16368SStephen M. Cameron data_direction); 2733edd16368SStephen M. Cameron } 2734edd16368SStephen M. Cameron 2735a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2736edd16368SStephen M. Cameron struct CommandList *cp, 2737edd16368SStephen M. Cameron unsigned char *buf, 2738edd16368SStephen M. Cameron size_t buflen, 2739edd16368SStephen M. Cameron int data_direction) 2740edd16368SStephen M. Cameron { 274101a02ffcSStephen M. Cameron u64 addr64; 2742edd16368SStephen M. Cameron 2743edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2744edd16368SStephen M. Cameron cp->Header.SGList = 0; 274550a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2746a2dac136SStephen M. Cameron return 0; 2747edd16368SStephen M. Cameron } 2748edd16368SStephen M. Cameron 274950a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2750eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2751a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2752eceaae18SShuah Khan cp->Header.SGList = 0; 275350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2754a2dac136SStephen M. Cameron return -1; 2755eceaae18SShuah Khan } 275650a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 275750a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 275850a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 275950a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 276050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2761a2dac136SStephen M. Cameron return 0; 2762edd16368SStephen M. Cameron } 2763edd16368SStephen M. Cameron 276425163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 276525163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 276625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 276725163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2768edd16368SStephen M. Cameron { 2769edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2770edd16368SStephen M. Cameron 2771edd16368SStephen M. Cameron c->waiting = &wait; 277225163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 277325163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 277425163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 277525163bd5SWebb Scales wait_for_completion_io(&wait); 277625163bd5SWebb Scales return IO_OK; 277725163bd5SWebb Scales } 277825163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 277925163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 278025163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 278125163bd5SWebb Scales return -ETIMEDOUT; 278225163bd5SWebb Scales } 278325163bd5SWebb Scales return IO_OK; 278425163bd5SWebb Scales } 278525163bd5SWebb Scales 278625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 278725163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 278825163bd5SWebb Scales { 278925163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 279025163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 279125163bd5SWebb Scales return IO_OK; 279225163bd5SWebb Scales } 279325163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2794edd16368SStephen M. Cameron } 2795edd16368SStephen M. Cameron 2796094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2797094963daSStephen M. Cameron { 2798094963daSStephen M. Cameron int cpu; 2799094963daSStephen M. Cameron u32 rc, *lockup_detected; 2800094963daSStephen M. Cameron 2801094963daSStephen M. Cameron cpu = get_cpu(); 2802094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2803094963daSStephen M. Cameron rc = *lockup_detected; 2804094963daSStephen M. Cameron put_cpu(); 2805094963daSStephen M. Cameron return rc; 2806094963daSStephen M. Cameron } 2807094963daSStephen M. Cameron 28089c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 280925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 281025163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2811edd16368SStephen M. Cameron { 28129c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 281325163bd5SWebb Scales int rc; 2814edd16368SStephen M. Cameron 2815edd16368SStephen M. Cameron do { 28167630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 281725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 281825163bd5SWebb Scales timeout_msecs); 281925163bd5SWebb Scales if (rc) 282025163bd5SWebb Scales break; 2821edd16368SStephen M. Cameron retry_count++; 28229c2fc160SStephen M. Cameron if (retry_count > 3) { 28239c2fc160SStephen M. Cameron msleep(backoff_time); 28249c2fc160SStephen M. Cameron if (backoff_time < 1000) 28259c2fc160SStephen M. Cameron backoff_time *= 2; 28269c2fc160SStephen M. Cameron } 2827852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28289c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28299c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2830edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 283125163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 283225163bd5SWebb Scales rc = -EIO; 283325163bd5SWebb Scales return rc; 2834edd16368SStephen M. Cameron } 2835edd16368SStephen M. Cameron 2836d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2837d1e8beacSStephen M. Cameron struct CommandList *c) 2838edd16368SStephen M. Cameron { 2839d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2840d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2841edd16368SStephen M. Cameron 2842609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2843609a70dfSRasmus Villemoes txt, lun, cdb); 2844d1e8beacSStephen M. Cameron } 2845d1e8beacSStephen M. Cameron 2846d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2847d1e8beacSStephen M. Cameron struct CommandList *cp) 2848d1e8beacSStephen M. Cameron { 2849d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2850d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28519437ac43SStephen Cameron u8 sense_key, asc, ascq; 28529437ac43SStephen Cameron int sense_len; 2853d1e8beacSStephen M. Cameron 2854edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2855edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28569437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28579437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28589437ac43SStephen Cameron else 28599437ac43SStephen Cameron sense_len = ei->SenseLen; 28609437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28619437ac43SStephen Cameron &sense_key, &asc, &ascq); 2862d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2863d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28649437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28659437ac43SStephen Cameron sense_key, asc, ascq); 2866d1e8beacSStephen M. Cameron else 28679437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2868edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2869edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2870edd16368SStephen M. Cameron "(probably indicates selection timeout " 2871edd16368SStephen M. Cameron "reported incorrectly due to a known " 2872edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2873edd16368SStephen M. Cameron break; 2874edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2875edd16368SStephen M. Cameron break; 2876edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2877d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2878edd16368SStephen M. Cameron break; 2879edd16368SStephen M. Cameron case CMD_INVALID: { 2880edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2881edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2882edd16368SStephen M. Cameron */ 2883d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2884d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2885edd16368SStephen M. Cameron } 2886edd16368SStephen M. Cameron break; 2887edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2888d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2889edd16368SStephen M. Cameron break; 2890edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2891d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2892edd16368SStephen M. Cameron break; 2893edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2894d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2895edd16368SStephen M. Cameron break; 2896edd16368SStephen M. Cameron case CMD_ABORTED: 2897d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2898edd16368SStephen M. Cameron break; 2899edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2900d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2901edd16368SStephen M. Cameron break; 2902edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2903d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2904edd16368SStephen M. Cameron break; 2905edd16368SStephen M. Cameron case CMD_TIMEOUT: 2906d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2907edd16368SStephen M. Cameron break; 29081d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2909d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29101d5e2ed0SStephen M. Cameron break; 291125163bd5SWebb Scales case CMD_CTLR_LOCKUP: 291225163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 291325163bd5SWebb Scales break; 2914edd16368SStephen M. Cameron default: 2915d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2916d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2917edd16368SStephen M. Cameron ei->CommandStatus); 2918edd16368SStephen M. Cameron } 2919edd16368SStephen M. Cameron } 2920edd16368SStephen M. Cameron 2921edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2922b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2923edd16368SStephen M. Cameron unsigned char bufsize) 2924edd16368SStephen M. Cameron { 2925edd16368SStephen M. Cameron int rc = IO_OK; 2926edd16368SStephen M. Cameron struct CommandList *c; 2927edd16368SStephen M. Cameron struct ErrorInfo *ei; 2928edd16368SStephen M. Cameron 292945fcb86eSStephen Cameron c = cmd_alloc(h); 2930edd16368SStephen M. Cameron 2931a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2932a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2933a2dac136SStephen M. Cameron rc = -1; 2934a2dac136SStephen M. Cameron goto out; 2935a2dac136SStephen M. Cameron } 293625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2937c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 293825163bd5SWebb Scales if (rc) 293925163bd5SWebb Scales goto out; 2940edd16368SStephen M. Cameron ei = c->err_info; 2941edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2942d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2943edd16368SStephen M. Cameron rc = -1; 2944edd16368SStephen M. Cameron } 2945a2dac136SStephen M. Cameron out: 294645fcb86eSStephen Cameron cmd_free(h, c); 2947edd16368SStephen M. Cameron return rc; 2948edd16368SStephen M. Cameron } 2949edd16368SStephen M. Cameron 2950bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 295125163bd5SWebb Scales u8 reset_type, int reply_queue) 2952edd16368SStephen M. Cameron { 2953edd16368SStephen M. Cameron int rc = IO_OK; 2954edd16368SStephen M. Cameron struct CommandList *c; 2955edd16368SStephen M. Cameron struct ErrorInfo *ei; 2956edd16368SStephen M. Cameron 295745fcb86eSStephen Cameron c = cmd_alloc(h); 2958edd16368SStephen M. Cameron 2959edd16368SStephen M. Cameron 2960a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29610b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2962bf711ac6SScott Teel scsi3addr, TYPE_MSG); 29632ef28849SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 296425163bd5SWebb Scales if (rc) { 296525163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 296625163bd5SWebb Scales goto out; 296725163bd5SWebb Scales } 2968edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2969edd16368SStephen M. Cameron 2970edd16368SStephen M. Cameron ei = c->err_info; 2971edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2972d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2973edd16368SStephen M. Cameron rc = -1; 2974edd16368SStephen M. Cameron } 297525163bd5SWebb Scales out: 297645fcb86eSStephen Cameron cmd_free(h, c); 2977edd16368SStephen M. Cameron return rc; 2978edd16368SStephen M. Cameron } 2979edd16368SStephen M. Cameron 2980d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2981d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2982d604f533SWebb Scales unsigned char *scsi3addr) 2983d604f533SWebb Scales { 2984d604f533SWebb Scales int i; 2985d604f533SWebb Scales bool match = false; 2986d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2987d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2988d604f533SWebb Scales 2989d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2990d604f533SWebb Scales return false; 2991d604f533SWebb Scales 2992d604f533SWebb Scales switch (c->cmd_type) { 2993d604f533SWebb Scales case CMD_SCSI: 2994d604f533SWebb Scales case CMD_IOCTL_PEND: 2995d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2996d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2997d604f533SWebb Scales break; 2998d604f533SWebb Scales 2999d604f533SWebb Scales case CMD_IOACCEL1: 3000d604f533SWebb Scales case CMD_IOACCEL2: 3001d604f533SWebb Scales if (c->phys_disk == dev) { 3002d604f533SWebb Scales /* HBA mode match */ 3003d604f533SWebb Scales match = true; 3004d604f533SWebb Scales } else { 3005d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3006d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3007d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3008d604f533SWebb Scales * instead. */ 3009d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3010d604f533SWebb Scales /* FIXME: an alternate test might be 3011d604f533SWebb Scales * 3012d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3013d604f533SWebb Scales * == c2->scsi_nexus; */ 3014d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3015d604f533SWebb Scales } 3016d604f533SWebb Scales } 3017d604f533SWebb Scales break; 3018d604f533SWebb Scales 3019d604f533SWebb Scales case IOACCEL2_TMF: 3020d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3021d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3022d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3023d604f533SWebb Scales } 3024d604f533SWebb Scales break; 3025d604f533SWebb Scales 3026d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3027d604f533SWebb Scales match = false; 3028d604f533SWebb Scales break; 3029d604f533SWebb Scales 3030d604f533SWebb Scales default: 3031d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3032d604f533SWebb Scales c->cmd_type); 3033d604f533SWebb Scales BUG(); 3034d604f533SWebb Scales } 3035d604f533SWebb Scales 3036d604f533SWebb Scales return match; 3037d604f533SWebb Scales } 3038d604f533SWebb Scales 3039d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3040d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3041d604f533SWebb Scales { 3042d604f533SWebb Scales int i; 3043d604f533SWebb Scales int rc = 0; 3044d604f533SWebb Scales 3045d604f533SWebb Scales /* We can really only handle one reset at a time */ 3046d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3047d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3048d604f533SWebb Scales return -EINTR; 3049d604f533SWebb Scales } 3050d604f533SWebb Scales 3051d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3052d604f533SWebb Scales 3053d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3054d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3055d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3056d604f533SWebb Scales 3057d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3058d604f533SWebb Scales unsigned long flags; 3059d604f533SWebb Scales 3060d604f533SWebb Scales /* 3061d604f533SWebb Scales * Mark the target command as having a reset pending, 3062d604f533SWebb Scales * then lock a lock so that the command cannot complete 3063d604f533SWebb Scales * while we're considering it. If the command is not 3064d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3065d604f533SWebb Scales */ 3066d604f533SWebb Scales c->reset_pending = dev; 3067d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3068d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3069d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3070d604f533SWebb Scales else 3071d604f533SWebb Scales c->reset_pending = NULL; 3072d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3073d604f533SWebb Scales } 3074d604f533SWebb Scales 3075d604f533SWebb Scales cmd_free(h, c); 3076d604f533SWebb Scales } 3077d604f533SWebb Scales 3078d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3079d604f533SWebb Scales if (!rc) 3080d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3081d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3082d604f533SWebb Scales lockup_detected(h)); 3083d604f533SWebb Scales 3084d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3085d604f533SWebb Scales dev_warn(&h->pdev->dev, 3086d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3087d604f533SWebb Scales rc = -ENODEV; 3088d604f533SWebb Scales } 3089d604f533SWebb Scales 3090d604f533SWebb Scales if (unlikely(rc)) 3091d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3092bfd7546cSDon Brace else 3093bfd7546cSDon Brace wait_for_device_to_become_ready(h, scsi3addr, 0); 3094d604f533SWebb Scales 3095d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3096d604f533SWebb Scales return rc; 3097d604f533SWebb Scales } 3098d604f533SWebb Scales 3099edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3100edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3101edd16368SStephen M. Cameron { 3102edd16368SStephen M. Cameron int rc; 3103edd16368SStephen M. Cameron unsigned char *buf; 3104edd16368SStephen M. Cameron 3105edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3106edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3107edd16368SStephen M. Cameron if (!buf) 3108edd16368SStephen M. Cameron return; 31098383278dSScott Teel 31108383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 31118383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 31128383278dSScott Teel goto exit; 31138383278dSScott Teel 31148383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 31158383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 31168383278dSScott Teel 3117edd16368SStephen M. Cameron if (rc == 0) 3118edd16368SStephen M. Cameron *raid_level = buf[8]; 3119edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3120edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 31218383278dSScott Teel exit: 3122edd16368SStephen M. Cameron kfree(buf); 3123edd16368SStephen M. Cameron return; 3124edd16368SStephen M. Cameron } 3125edd16368SStephen M. Cameron 3126283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3127283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3128283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3129283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3130283b4a9bSStephen M. Cameron { 3131283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3132283b4a9bSStephen M. Cameron int map, row, col; 3133283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3134283b4a9bSStephen M. Cameron 3135283b4a9bSStephen M. Cameron if (rc != 0) 3136283b4a9bSStephen M. Cameron return; 3137283b4a9bSStephen M. Cameron 31382ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31392ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31402ba8bfc8SStephen M. Cameron return; 31412ba8bfc8SStephen M. Cameron 3142283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3143283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3144283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3145283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3146283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3147283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3148283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3149283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3150283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3151283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3152283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3153283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3154283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3155283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3156283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3157283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3158283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3159283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3160283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3161283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3162283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3163283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3164283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3165283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31662b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3167dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31682b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31692b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31702b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3171dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3172dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3173283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3174283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3175283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3176283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3177283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3178283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3179283b4a9bSStephen M. Cameron disks_per_row = 3180283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3181283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3182283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3183283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3184283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3185283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3186283b4a9bSStephen M. Cameron disks_per_row = 3187283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3188283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3189283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3190283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3191283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3192283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3193283b4a9bSStephen M. Cameron } 3194283b4a9bSStephen M. Cameron } 3195283b4a9bSStephen M. Cameron } 3196283b4a9bSStephen M. Cameron #else 3197283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3198283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3199283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3200283b4a9bSStephen M. Cameron { 3201283b4a9bSStephen M. Cameron } 3202283b4a9bSStephen M. Cameron #endif 3203283b4a9bSStephen M. Cameron 3204283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3205283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3206283b4a9bSStephen M. Cameron { 3207283b4a9bSStephen M. Cameron int rc = 0; 3208283b4a9bSStephen M. Cameron struct CommandList *c; 3209283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3210283b4a9bSStephen M. Cameron 321145fcb86eSStephen Cameron c = cmd_alloc(h); 3212bf43caf3SRobert Elliott 3213283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3214283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3215283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 32162dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 32172dd02d74SRobert Elliott cmd_free(h, c); 32182dd02d74SRobert Elliott return -1; 3219283b4a9bSStephen M. Cameron } 322025163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3221c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 322225163bd5SWebb Scales if (rc) 322325163bd5SWebb Scales goto out; 3224283b4a9bSStephen M. Cameron ei = c->err_info; 3225283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3226d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 322725163bd5SWebb Scales rc = -1; 322825163bd5SWebb Scales goto out; 3229283b4a9bSStephen M. Cameron } 323045fcb86eSStephen Cameron cmd_free(h, c); 3231283b4a9bSStephen M. Cameron 3232283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3233283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3234283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3235283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3236283b4a9bSStephen M. Cameron rc = -1; 3237283b4a9bSStephen M. Cameron } 3238283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3239283b4a9bSStephen M. Cameron return rc; 324025163bd5SWebb Scales out: 324125163bd5SWebb Scales cmd_free(h, c); 324225163bd5SWebb Scales return rc; 3243283b4a9bSStephen M. Cameron } 3244283b4a9bSStephen M. Cameron 3245d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3246d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3247d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3248d04e62b9SKevin Barnett { 3249d04e62b9SKevin Barnett int rc = IO_OK; 3250d04e62b9SKevin Barnett struct CommandList *c; 3251d04e62b9SKevin Barnett struct ErrorInfo *ei; 3252d04e62b9SKevin Barnett 3253d04e62b9SKevin Barnett c = cmd_alloc(h); 3254d04e62b9SKevin Barnett 3255d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3256d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3257d04e62b9SKevin Barnett if (rc) 3258d04e62b9SKevin Barnett goto out; 3259d04e62b9SKevin Barnett 3260d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3261d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3262d04e62b9SKevin Barnett 3263d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3264c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3265d04e62b9SKevin Barnett if (rc) 3266d04e62b9SKevin Barnett goto out; 3267d04e62b9SKevin Barnett ei = c->err_info; 3268d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3269d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3270d04e62b9SKevin Barnett rc = -1; 3271d04e62b9SKevin Barnett } 3272d04e62b9SKevin Barnett out: 3273d04e62b9SKevin Barnett cmd_free(h, c); 3274d04e62b9SKevin Barnett return rc; 3275d04e62b9SKevin Barnett } 3276d04e62b9SKevin Barnett 327766749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 327866749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 327966749d0dSScott Teel { 328066749d0dSScott Teel int rc = IO_OK; 328166749d0dSScott Teel struct CommandList *c; 328266749d0dSScott Teel struct ErrorInfo *ei; 328366749d0dSScott Teel 328466749d0dSScott Teel c = cmd_alloc(h); 328566749d0dSScott Teel 328666749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 328766749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 328866749d0dSScott Teel if (rc) 328966749d0dSScott Teel goto out; 329066749d0dSScott Teel 329166749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3292c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 329366749d0dSScott Teel if (rc) 329466749d0dSScott Teel goto out; 329566749d0dSScott Teel ei = c->err_info; 329666749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 329766749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 329866749d0dSScott Teel rc = -1; 329966749d0dSScott Teel } 330066749d0dSScott Teel out: 330166749d0dSScott Teel cmd_free(h, c); 330266749d0dSScott Teel return rc; 330366749d0dSScott Teel } 330466749d0dSScott Teel 330503383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 330603383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 330703383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 330803383736SDon Brace { 330903383736SDon Brace int rc = IO_OK; 331003383736SDon Brace struct CommandList *c; 331103383736SDon Brace struct ErrorInfo *ei; 331203383736SDon Brace 331303383736SDon Brace c = cmd_alloc(h); 331403383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 331503383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 331603383736SDon Brace if (rc) 331703383736SDon Brace goto out; 331803383736SDon Brace 331903383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 332003383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 332103383736SDon Brace 332225163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3323c448ecfaSDon Brace DEFAULT_TIMEOUT); 332403383736SDon Brace ei = c->err_info; 332503383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 332603383736SDon Brace hpsa_scsi_interpret_error(h, c); 332703383736SDon Brace rc = -1; 332803383736SDon Brace } 332903383736SDon Brace out: 333003383736SDon Brace cmd_free(h, c); 3331d04e62b9SKevin Barnett 333203383736SDon Brace return rc; 333303383736SDon Brace } 333403383736SDon Brace 3335cca8f13bSDon Brace /* 3336cca8f13bSDon Brace * get enclosure information 3337cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3338cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3339cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3340cca8f13bSDon Brace */ 3341cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3342cca8f13bSDon Brace unsigned char *scsi3addr, 3343cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3344cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3345cca8f13bSDon Brace { 3346cca8f13bSDon Brace int rc = -1; 3347cca8f13bSDon Brace struct CommandList *c = NULL; 3348cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3349cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3350cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3351cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3352cca8f13bSDon Brace u16 bmic_device_index = 0; 3353cca8f13bSDon Brace 3354cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3355cca8f13bSDon Brace 3356*5ac517b8SDon Brace if (encl_dev->target == -1 || encl_dev->lun == -1) { 3357*5ac517b8SDon Brace rc = IO_OK; 3358*5ac517b8SDon Brace goto out; 3359*5ac517b8SDon Brace } 3360*5ac517b8SDon Brace 336117a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 336217a9e54aSDon Brace rc = IO_OK; 3363cca8f13bSDon Brace goto out; 336417a9e54aSDon Brace } 3365cca8f13bSDon Brace 3366cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3367cca8f13bSDon Brace if (!bssbp) 3368cca8f13bSDon Brace goto out; 3369cca8f13bSDon Brace 3370cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3371cca8f13bSDon Brace if (!id_phys) 3372cca8f13bSDon Brace goto out; 3373cca8f13bSDon Brace 3374cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3375cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3376cca8f13bSDon Brace if (rc) { 3377cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3378cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3379cca8f13bSDon Brace goto out; 3380cca8f13bSDon Brace } 3381cca8f13bSDon Brace 3382cca8f13bSDon Brace c = cmd_alloc(h); 3383cca8f13bSDon Brace 3384cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3385cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3386cca8f13bSDon Brace 3387cca8f13bSDon Brace if (rc) 3388cca8f13bSDon Brace goto out; 3389cca8f13bSDon Brace 3390cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3391cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3392cca8f13bSDon Brace else 3393cca8f13bSDon Brace c->Request.CDB[5] = 0; 3394cca8f13bSDon Brace 3395cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3396c448ecfaSDon Brace DEFAULT_TIMEOUT); 3397cca8f13bSDon Brace if (rc) 3398cca8f13bSDon Brace goto out; 3399cca8f13bSDon Brace 3400cca8f13bSDon Brace ei = c->err_info; 3401cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3402cca8f13bSDon Brace rc = -1; 3403cca8f13bSDon Brace goto out; 3404cca8f13bSDon Brace } 3405cca8f13bSDon Brace 3406cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3407cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3408cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3409cca8f13bSDon Brace 3410cca8f13bSDon Brace rc = IO_OK; 3411cca8f13bSDon Brace out: 3412cca8f13bSDon Brace kfree(bssbp); 3413cca8f13bSDon Brace kfree(id_phys); 3414cca8f13bSDon Brace 3415cca8f13bSDon Brace if (c) 3416cca8f13bSDon Brace cmd_free(h, c); 3417cca8f13bSDon Brace 3418cca8f13bSDon Brace if (rc != IO_OK) 3419cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3420cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3421cca8f13bSDon Brace } 3422cca8f13bSDon Brace 3423d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3424d04e62b9SKevin Barnett unsigned char *scsi3addr) 3425d04e62b9SKevin Barnett { 3426d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3427d04e62b9SKevin Barnett u32 nphysicals; 3428d04e62b9SKevin Barnett u64 sa = 0; 3429d04e62b9SKevin Barnett int i; 3430d04e62b9SKevin Barnett 3431d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3432d04e62b9SKevin Barnett if (!physdev) 3433d04e62b9SKevin Barnett return 0; 3434d04e62b9SKevin Barnett 3435d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3436d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3437d04e62b9SKevin Barnett kfree(physdev); 3438d04e62b9SKevin Barnett return 0; 3439d04e62b9SKevin Barnett } 3440d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3441d04e62b9SKevin Barnett 3442d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3443d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3444d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3445d04e62b9SKevin Barnett break; 3446d04e62b9SKevin Barnett } 3447d04e62b9SKevin Barnett 3448d04e62b9SKevin Barnett kfree(physdev); 3449d04e62b9SKevin Barnett 3450d04e62b9SKevin Barnett return sa; 3451d04e62b9SKevin Barnett } 3452d04e62b9SKevin Barnett 3453d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3454d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3455d04e62b9SKevin Barnett { 3456d04e62b9SKevin Barnett int rc; 3457d04e62b9SKevin Barnett u64 sa = 0; 3458d04e62b9SKevin Barnett 3459d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3460d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3461d04e62b9SKevin Barnett 3462d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 34637e8a9486SAmit Kushwaha if (!ssi) 3464d04e62b9SKevin Barnett return; 3465d04e62b9SKevin Barnett 3466d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3467d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3468d04e62b9SKevin Barnett if (rc == 0) { 3469d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3470d04e62b9SKevin Barnett h->sas_address = sa; 3471d04e62b9SKevin Barnett } 3472d04e62b9SKevin Barnett 3473d04e62b9SKevin Barnett kfree(ssi); 3474d04e62b9SKevin Barnett } else 3475d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3476d04e62b9SKevin Barnett 3477d04e62b9SKevin Barnett dev->sas_address = sa; 3478d04e62b9SKevin Barnett } 3479d04e62b9SKevin Barnett 3480d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34818383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34821b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34831b70150aSStephen M. Cameron { 34841b70150aSStephen M. Cameron int rc; 34851b70150aSStephen M. Cameron int i; 34861b70150aSStephen M. Cameron int pages; 34871b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34881b70150aSStephen M. Cameron 34891b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34901b70150aSStephen M. Cameron if (!buf) 34918383278dSScott Teel return false; 34921b70150aSStephen M. Cameron 34931b70150aSStephen M. Cameron /* Get the size of the page list first */ 34941b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34951b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34961b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34971b70150aSStephen M. Cameron if (rc != 0) 34981b70150aSStephen M. Cameron goto exit_unsupported; 34991b70150aSStephen M. Cameron pages = buf[3]; 35001b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 35011b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 35021b70150aSStephen M. Cameron else 35031b70150aSStephen M. Cameron bufsize = 255; 35041b70150aSStephen M. Cameron 35051b70150aSStephen M. Cameron /* Get the whole VPD page list */ 35061b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 35071b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 35081b70150aSStephen M. Cameron buf, bufsize); 35091b70150aSStephen M. Cameron if (rc != 0) 35101b70150aSStephen M. Cameron goto exit_unsupported; 35111b70150aSStephen M. Cameron 35121b70150aSStephen M. Cameron pages = buf[3]; 35131b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 35141b70150aSStephen M. Cameron if (buf[3 + i] == page) 35151b70150aSStephen M. Cameron goto exit_supported; 35161b70150aSStephen M. Cameron exit_unsupported: 35171b70150aSStephen M. Cameron kfree(buf); 35188383278dSScott Teel return false; 35191b70150aSStephen M. Cameron exit_supported: 35201b70150aSStephen M. Cameron kfree(buf); 35218383278dSScott Teel return true; 35221b70150aSStephen M. Cameron } 35231b70150aSStephen M. Cameron 3524283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3525283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3526283b4a9bSStephen M. Cameron { 3527283b4a9bSStephen M. Cameron int rc; 3528283b4a9bSStephen M. Cameron unsigned char *buf; 3529283b4a9bSStephen M. Cameron u8 ioaccel_status; 3530283b4a9bSStephen M. Cameron 3531283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3532283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 353341ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3534283b4a9bSStephen M. Cameron 3535283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3536283b4a9bSStephen M. Cameron if (!buf) 3537283b4a9bSStephen M. Cameron return; 35381b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35391b70150aSStephen M. Cameron goto out; 3540283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3541b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3542283b4a9bSStephen M. Cameron if (rc != 0) 3543283b4a9bSStephen M. Cameron goto out; 3544283b4a9bSStephen M. Cameron 3545283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3546283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3547283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3548283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3549283b4a9bSStephen M. Cameron this_device->offload_config = 3550283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3551283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3552283b4a9bSStephen M. Cameron this_device->offload_enabled = 3553283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3554283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3555283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3556283b4a9bSStephen M. Cameron } 355741ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3558283b4a9bSStephen M. Cameron out: 3559283b4a9bSStephen M. Cameron kfree(buf); 3560283b4a9bSStephen M. Cameron return; 3561283b4a9bSStephen M. Cameron } 3562283b4a9bSStephen M. Cameron 3563edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3564edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 356575d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3566edd16368SStephen M. Cameron { 3567edd16368SStephen M. Cameron int rc; 3568edd16368SStephen M. Cameron unsigned char *buf; 3569edd16368SStephen M. Cameron 35708383278dSScott Teel /* Does controller have VPD for device id? */ 35718383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 35728383278dSScott Teel return 1; /* not supported */ 35738383278dSScott Teel 3574edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3575edd16368SStephen M. Cameron if (!buf) 3576a84d794dSStephen M. Cameron return -ENOMEM; 35778383278dSScott Teel 35788383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 35798383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 35808383278dSScott Teel if (rc == 0) { 35818383278dSScott Teel if (buflen > 16) 35828383278dSScott Teel buflen = 16; 35838383278dSScott Teel memcpy(device_id, &buf[8], buflen); 35848383278dSScott Teel } 358575d23d89SDon Brace 3586edd16368SStephen M. Cameron kfree(buf); 358775d23d89SDon Brace 35888383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3589edd16368SStephen M. Cameron } 3590edd16368SStephen M. Cameron 3591edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 359203383736SDon Brace void *buf, int bufsize, 3593edd16368SStephen M. Cameron int extended_response) 3594edd16368SStephen M. Cameron { 3595edd16368SStephen M. Cameron int rc = IO_OK; 3596edd16368SStephen M. Cameron struct CommandList *c; 3597edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3598edd16368SStephen M. Cameron struct ErrorInfo *ei; 3599edd16368SStephen M. Cameron 360045fcb86eSStephen Cameron c = cmd_alloc(h); 3601bf43caf3SRobert Elliott 3602e89c0ae7SStephen M. Cameron /* address the controller */ 3603e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3604a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3605a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3606a2dac136SStephen M. Cameron rc = -1; 3607a2dac136SStephen M. Cameron goto out; 3608a2dac136SStephen M. Cameron } 3609edd16368SStephen M. Cameron if (extended_response) 3610edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 361125163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3612c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 361325163bd5SWebb Scales if (rc) 361425163bd5SWebb Scales goto out; 3615edd16368SStephen M. Cameron ei = c->err_info; 3616edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3617edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3618d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3619edd16368SStephen M. Cameron rc = -1; 3620283b4a9bSStephen M. Cameron } else { 362103383736SDon Brace struct ReportLUNdata *rld = buf; 362203383736SDon Brace 362303383736SDon Brace if (rld->extended_response_flag != extended_response) { 3624283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3625283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3626283b4a9bSStephen M. Cameron extended_response, 362703383736SDon Brace rld->extended_response_flag); 3628283b4a9bSStephen M. Cameron rc = -1; 3629283b4a9bSStephen M. Cameron } 3630edd16368SStephen M. Cameron } 3631a2dac136SStephen M. Cameron out: 363245fcb86eSStephen Cameron cmd_free(h, c); 3633edd16368SStephen M. Cameron return rc; 3634edd16368SStephen M. Cameron } 3635edd16368SStephen M. Cameron 3636edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 363703383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3638edd16368SStephen M. Cameron { 36392a80d545SHannes Reinecke int rc; 36402a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 36412a80d545SHannes Reinecke 36422a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 364303383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 36442a80d545SHannes Reinecke if (!rc || !hpsa_allow_any) 36452a80d545SHannes Reinecke return rc; 36462a80d545SHannes Reinecke 36472a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 36482a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 36492a80d545SHannes Reinecke if (!lbuf) 36502a80d545SHannes Reinecke return -ENOMEM; 36512a80d545SHannes Reinecke 36522a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 36532a80d545SHannes Reinecke if (!rc) { 36542a80d545SHannes Reinecke int i; 36552a80d545SHannes Reinecke u32 nphys; 36562a80d545SHannes Reinecke 36572a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 36582a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 36592a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 36602a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 36612a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 36622a80d545SHannes Reinecke } 36632a80d545SHannes Reinecke kfree(lbuf); 36642a80d545SHannes Reinecke return rc; 3665edd16368SStephen M. Cameron } 3666edd16368SStephen M. Cameron 3667edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3668edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3669edd16368SStephen M. Cameron { 3670edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3671edd16368SStephen M. Cameron } 3672edd16368SStephen M. Cameron 3673edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3674edd16368SStephen M. Cameron int bus, int target, int lun) 3675edd16368SStephen M. Cameron { 3676edd16368SStephen M. Cameron device->bus = bus; 3677edd16368SStephen M. Cameron device->target = target; 3678edd16368SStephen M. Cameron device->lun = lun; 3679edd16368SStephen M. Cameron } 3680edd16368SStephen M. Cameron 36819846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36829846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36839846590eSStephen M. Cameron unsigned char scsi3addr[]) 36849846590eSStephen M. Cameron { 36859846590eSStephen M. Cameron int rc; 36869846590eSStephen M. Cameron int status; 36879846590eSStephen M. Cameron int size; 36889846590eSStephen M. Cameron unsigned char *buf; 36899846590eSStephen M. Cameron 36909846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36919846590eSStephen M. Cameron if (!buf) 36929846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36939846590eSStephen M. Cameron 36949846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 369524a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36969846590eSStephen M. Cameron goto exit_failed; 36979846590eSStephen M. Cameron 36989846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36999846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 37009846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 370124a4b078SStephen M. Cameron if (rc != 0) 37029846590eSStephen M. Cameron goto exit_failed; 37039846590eSStephen M. Cameron size = buf[3]; 37049846590eSStephen M. Cameron 37059846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 37069846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 37079846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 370824a4b078SStephen M. Cameron if (rc != 0) 37099846590eSStephen M. Cameron goto exit_failed; 37109846590eSStephen M. Cameron status = buf[4]; /* status byte */ 37119846590eSStephen M. Cameron 37129846590eSStephen M. Cameron kfree(buf); 37139846590eSStephen M. Cameron return status; 37149846590eSStephen M. Cameron exit_failed: 37159846590eSStephen M. Cameron kfree(buf); 37169846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 37179846590eSStephen M. Cameron } 37189846590eSStephen M. Cameron 37199846590eSStephen M. Cameron /* Determine offline status of a volume. 37209846590eSStephen M. Cameron * Return either: 37219846590eSStephen M. Cameron * 0 (not offline) 372267955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 37239846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 37249846590eSStephen M. Cameron * describing why a volume is to be kept offline) 37259846590eSStephen M. Cameron */ 372685b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h, 37279846590eSStephen M. Cameron unsigned char scsi3addr[]) 37289846590eSStephen M. Cameron { 37299846590eSStephen M. Cameron struct CommandList *c; 37309437ac43SStephen Cameron unsigned char *sense; 37319437ac43SStephen Cameron u8 sense_key, asc, ascq; 37329437ac43SStephen Cameron int sense_len; 373325163bd5SWebb Scales int rc, ldstat = 0; 37349846590eSStephen M. Cameron u16 cmd_status; 37359846590eSStephen M. Cameron u8 scsi_status; 37369846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 37379846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 37389846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 37399846590eSStephen M. Cameron 37409846590eSStephen M. Cameron c = cmd_alloc(h); 3741bf43caf3SRobert Elliott 37429846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3743c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3744c448ecfaSDon Brace DEFAULT_TIMEOUT); 374525163bd5SWebb Scales if (rc) { 374625163bd5SWebb Scales cmd_free(h, c); 374785b29008SDon Brace return HPSA_VPD_LV_STATUS_UNSUPPORTED; 374825163bd5SWebb Scales } 37499846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37509437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37519437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37529437ac43SStephen Cameron else 37539437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37549437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37559846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37569846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37579846590eSStephen M. Cameron cmd_free(h, c); 37589846590eSStephen M. Cameron 37599846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37609846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37619846590eSStephen M. Cameron 37629846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37639846590eSStephen M. Cameron switch (ldstat) { 376485b29008SDon Brace case HPSA_LV_FAILED: 37659846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37665ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37679846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37689846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37699846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37709846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37719846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37729846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37739846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37749846590eSStephen M. Cameron return ldstat; 37759846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37769846590eSStephen M. Cameron /* If VPD status page isn't available, 37779846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37789846590eSStephen M. Cameron */ 37799846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37809846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37819846590eSStephen M. Cameron return ldstat; 37829846590eSStephen M. Cameron break; 37839846590eSStephen M. Cameron default: 37849846590eSStephen M. Cameron break; 37859846590eSStephen M. Cameron } 378685b29008SDon Brace return HPSA_LV_OK; 37879846590eSStephen M. Cameron } 37889846590eSStephen M. Cameron 37899b5c48c2SStephen Cameron /* 37909b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37919b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37929b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37939b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37949b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37959b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37969b5c48c2SStephen Cameron */ 37979b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37989b5c48c2SStephen Cameron unsigned char *scsi3addr) 37999b5c48c2SStephen Cameron { 38009b5c48c2SStephen Cameron struct CommandList *c; 38019b5c48c2SStephen Cameron struct ErrorInfo *ei; 38029b5c48c2SStephen Cameron int rc = 0; 38039b5c48c2SStephen Cameron 38049b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 38059b5c48c2SStephen Cameron 38069b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 38079b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 38089b5c48c2SStephen Cameron return 1; 38099b5c48c2SStephen Cameron 38109b5c48c2SStephen Cameron c = cmd_alloc(h); 3811bf43caf3SRobert Elliott 38129b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3813c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3814c448ecfaSDon Brace DEFAULT_TIMEOUT); 38159b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 38169b5c48c2SStephen Cameron ei = c->err_info; 38179b5c48c2SStephen Cameron switch (ei->CommandStatus) { 38189b5c48c2SStephen Cameron case CMD_INVALID: 38199b5c48c2SStephen Cameron rc = 0; 38209b5c48c2SStephen Cameron break; 38219b5c48c2SStephen Cameron case CMD_UNABORTABLE: 38229b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 38239b5c48c2SStephen Cameron rc = 1; 38249b5c48c2SStephen Cameron break; 38259437ac43SStephen Cameron case CMD_TMF_STATUS: 38269437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 38279437ac43SStephen Cameron break; 38289b5c48c2SStephen Cameron default: 38299b5c48c2SStephen Cameron rc = 0; 38309b5c48c2SStephen Cameron break; 38319b5c48c2SStephen Cameron } 38329b5c48c2SStephen Cameron cmd_free(h, c); 38339b5c48c2SStephen Cameron return rc; 38349b5c48c2SStephen Cameron } 38359b5c48c2SStephen Cameron 3836edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 38370b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 38380b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3839edd16368SStephen M. Cameron { 38400b0e1d6cSStephen M. Cameron 38410b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 38420b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 38430b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 38440b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 38450b0e1d6cSStephen M. Cameron 3846ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 38470b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3848683fc444SDon Brace int rc = 0; 3849edd16368SStephen M. Cameron 3850ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3851683fc444SDon Brace if (!inq_buff) { 3852683fc444SDon Brace rc = -ENOMEM; 3853edd16368SStephen M. Cameron goto bail_out; 3854683fc444SDon Brace } 3855edd16368SStephen M. Cameron 3856edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3857edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3858edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3859edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 386085b29008SDon Brace "%s: inquiry failed, device will be skipped.\n", 386185b29008SDon Brace __func__); 386285b29008SDon Brace rc = HPSA_INQUIRY_FAILED; 3863edd16368SStephen M. Cameron goto bail_out; 3864edd16368SStephen M. Cameron } 3865edd16368SStephen M. Cameron 38664af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38674af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 386875d23d89SDon Brace 3869edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3870edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3871edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3872edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3873edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3874edd16368SStephen M. Cameron sizeof(this_device->model)); 38757630b3a5SHannes Reinecke this_device->rev = inq_buff[2]; 3876edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3877edd16368SStephen M. Cameron sizeof(this_device->device_id)); 38788383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 38798383278dSScott Teel sizeof(this_device->device_id))) 38808383278dSScott Teel dev_err(&h->pdev->dev, 38818383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 38828383278dSScott Teel h->ctlr, __func__, 38838383278dSScott Teel h->scsi_host->host_no, 38848383278dSScott Teel this_device->target, this_device->lun, 38858383278dSScott Teel scsi_device_type(this_device->devtype), 38868383278dSScott Teel this_device->model); 3887edd16368SStephen M. Cameron 3888af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3889af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3890283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 389185b29008SDon Brace unsigned char volume_offline; 389267955ba3SStephen M. Cameron 3893edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3894283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3895283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 389667955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 3897eb94588dSTomas Henzl this_device->volume_offline = volume_offline; 389885b29008SDon Brace if (volume_offline == HPSA_LV_FAILED) { 389985b29008SDon Brace rc = HPSA_LV_FAILED; 390085b29008SDon Brace dev_err(&h->pdev->dev, 390185b29008SDon Brace "%s: LV failed, device will be skipped.\n", 390285b29008SDon Brace __func__); 390385b29008SDon Brace goto bail_out; 390485b29008SDon Brace } 3905283b4a9bSStephen M. Cameron } else { 3906edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3907283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3908283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 390941ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3910a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 39119846590eSStephen M. Cameron this_device->volume_offline = 0; 391203383736SDon Brace this_device->queue_depth = h->nr_cmds; 3913283b4a9bSStephen M. Cameron } 3914edd16368SStephen M. Cameron 39150b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 39160b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 39170b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 39180b0e1d6cSStephen M. Cameron */ 39190b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 39200b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 39210b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 39220b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 39230b0e1d6cSStephen M. Cameron } 3924edd16368SStephen M. Cameron kfree(inq_buff); 3925edd16368SStephen M. Cameron return 0; 3926edd16368SStephen M. Cameron 3927edd16368SStephen M. Cameron bail_out: 3928edd16368SStephen M. Cameron kfree(inq_buff); 3929683fc444SDon Brace return rc; 3930edd16368SStephen M. Cameron } 3931edd16368SStephen M. Cameron 39329b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 39339b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 39349b5c48c2SStephen Cameron { 39359b5c48c2SStephen Cameron unsigned long flags; 39369b5c48c2SStephen Cameron int rc, entry; 39379b5c48c2SStephen Cameron /* 39389b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 39399b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 39409b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 39419b5c48c2SStephen Cameron */ 39429b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 39439b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 39449b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 39459b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 39469b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 39479b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39489b5c48c2SStephen Cameron } else { 39499b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39509b5c48c2SStephen Cameron dev->supports_aborts = 39519b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 39529b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 39539b5c48c2SStephen Cameron dev->supports_aborts = 0; 39549b5c48c2SStephen Cameron } 39559b5c48c2SStephen Cameron } 39569b5c48c2SStephen Cameron 3957c795505aSKevin Barnett /* 3958c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3959edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3960edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3961edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3962edd16368SStephen M. Cameron */ 3963edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 39641f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3965edd16368SStephen M. Cameron { 3966c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3967edd16368SStephen M. Cameron 39681f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 39691f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 39707630b3a5SHannes Reinecke if (is_hba_lunid(lunaddrbytes)) { 39717630b3a5SHannes Reinecke int bus = HPSA_HBA_BUS; 39727630b3a5SHannes Reinecke 39737630b3a5SHannes Reinecke if (!device->rev) 39747630b3a5SHannes Reinecke bus = HPSA_LEGACY_HBA_BUS; 3975c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 39767630b3a5SHannes Reinecke bus, 0, lunid & 0x3fff); 39777630b3a5SHannes Reinecke } else 39781f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3979c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3980c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 39811f310bdeSStephen M. Cameron return; 39821f310bdeSStephen M. Cameron } 39831f310bdeSStephen M. Cameron /* It's a logical device */ 398466749d0dSScott Teel if (device->external) { 39851f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3986c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3987c795505aSKevin Barnett lunid & 0x00ff); 39881f310bdeSStephen M. Cameron return; 3989339b2b14SStephen M. Cameron } 3990c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3991c795505aSKevin Barnett 0, lunid & 0x3fff); 3992edd16368SStephen M. Cameron } 3993edd16368SStephen M. Cameron 3994edd16368SStephen M. Cameron 3995edd16368SStephen M. Cameron /* 399654b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 399754b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 399854b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 399954b6e9e9SScott Teel * 3. Return: 400054b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 400154b6e9e9SScott Teel * 0 if no matching physical disk was found. 400254b6e9e9SScott Teel */ 400354b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 400454b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 400554b6e9e9SScott Teel { 400641ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 400741ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 400841ce4c35SStephen Cameron unsigned long flags; 400954b6e9e9SScott Teel int i; 401054b6e9e9SScott Teel 401141ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 401241ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 401341ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 401441ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 401541ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 401641ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 401754b6e9e9SScott Teel return 1; 401854b6e9e9SScott Teel } 401941ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 402041ce4c35SStephen Cameron return 0; 402141ce4c35SStephen Cameron } 402241ce4c35SStephen Cameron 402366749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 402466749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 402566749d0dSScott Teel { 402666749d0dSScott Teel /* In report logicals, local logicals are listed first, 402766749d0dSScott Teel * then any externals. 402866749d0dSScott Teel */ 402966749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 403066749d0dSScott Teel 403166749d0dSScott Teel if (i == raid_ctlr_position) 403266749d0dSScott Teel return 0; 403366749d0dSScott Teel 403466749d0dSScott Teel if (i < logicals_start) 403566749d0dSScott Teel return 0; 403666749d0dSScott Teel 403766749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 403866749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 403966749d0dSScott Teel return 0; 404066749d0dSScott Teel 404166749d0dSScott Teel return 1; /* it's an external lun */ 404266749d0dSScott Teel } 404366749d0dSScott Teel 404454b6e9e9SScott Teel /* 4045edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4046edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4047edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4048edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4049edd16368SStephen M. Cameron */ 4050edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 405103383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 405201a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4053edd16368SStephen M. Cameron { 405403383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4055edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4056edd16368SStephen M. Cameron return -1; 4057edd16368SStephen M. Cameron } 405803383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4059edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 406003383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 406103383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4062edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4063edd16368SStephen M. Cameron } 406403383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4065edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4066edd16368SStephen M. Cameron return -1; 4067edd16368SStephen M. Cameron } 40686df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4069edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4070edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4071edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4072edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4073edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4074edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4075edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4076edd16368SStephen M. Cameron } 4077edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4078edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4079edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4080edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4081edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4082edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4083edd16368SStephen M. Cameron } 4084edd16368SStephen M. Cameron return 0; 4085edd16368SStephen M. Cameron } 4086edd16368SStephen M. Cameron 408742a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 408842a91641SDon Brace int i, int nphysicals, int nlogicals, 4089a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4090339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4091339b2b14SStephen M. Cameron { 4092339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4093339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4094339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4095339b2b14SStephen M. Cameron */ 4096339b2b14SStephen M. Cameron 4097339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4098339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4099339b2b14SStephen M. Cameron 4100339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4101339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4102339b2b14SStephen M. Cameron 4103339b2b14SStephen M. Cameron if (i < logicals_start) 4104d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4105d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4106339b2b14SStephen M. Cameron 4107339b2b14SStephen M. Cameron if (i < last_device) 4108339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4109339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4110339b2b14SStephen M. Cameron BUG(); 4111339b2b14SStephen M. Cameron return NULL; 4112339b2b14SStephen M. Cameron } 4113339b2b14SStephen M. Cameron 411403383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 411503383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 411603383736SDon Brace struct hpsa_scsi_dev_t *dev, 4117f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 411803383736SDon Brace struct bmic_identify_physical_device *id_phys) 411903383736SDon Brace { 412003383736SDon Brace int rc; 41214b6e5597SScott Teel struct ext_report_lun_entry *rle; 41224b6e5597SScott Teel 41234b6e5597SScott Teel /* 41244b6e5597SScott Teel * external targets don't support BMIC 41254b6e5597SScott Teel */ 41264b6e5597SScott Teel if (dev->external) { 41274b6e5597SScott Teel dev->queue_depth = 7; 41284b6e5597SScott Teel return; 41294b6e5597SScott Teel } 41304b6e5597SScott Teel 41314b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 413203383736SDon Brace 413303383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4134f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4135a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 413603383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4137f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4138f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 413903383736SDon Brace sizeof(*id_phys)); 414003383736SDon Brace if (!rc) 414103383736SDon Brace /* Reserve space for FW operations */ 414203383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 414303383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 414403383736SDon Brace dev->queue_depth = 414503383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 414603383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 414703383736SDon Brace else 414803383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 414903383736SDon Brace } 415003383736SDon Brace 41518270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4152f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41538270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41548270b862SJoe Handzik { 4155f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4156f2039b03SDon Brace 4157f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41588270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41598270b862SJoe Handzik 41608270b862SJoe Handzik memcpy(&this_device->active_path_index, 41618270b862SJoe Handzik &id_phys->active_path_number, 41628270b862SJoe Handzik sizeof(this_device->active_path_index)); 41638270b862SJoe Handzik memcpy(&this_device->path_map, 41648270b862SJoe Handzik &id_phys->redundant_path_present_map, 41658270b862SJoe Handzik sizeof(this_device->path_map)); 41668270b862SJoe Handzik memcpy(&this_device->box, 41678270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 41688270b862SJoe Handzik sizeof(this_device->box)); 41698270b862SJoe Handzik memcpy(&this_device->phys_connector, 41708270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 41718270b862SJoe Handzik sizeof(this_device->phys_connector)); 41728270b862SJoe Handzik memcpy(&this_device->bay, 41738270b862SJoe Handzik &id_phys->phys_bay_in_box, 41748270b862SJoe Handzik sizeof(this_device->bay)); 41758270b862SJoe Handzik } 41768270b862SJoe Handzik 417766749d0dSScott Teel /* get number of local logical disks. */ 417866749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 417966749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 418066749d0dSScott Teel u32 *nlocals) 418166749d0dSScott Teel { 418266749d0dSScott Teel int rc; 418366749d0dSScott Teel 418466749d0dSScott Teel if (!id_ctlr) { 418566749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 418666749d0dSScott Teel __func__); 418766749d0dSScott Teel return -ENOMEM; 418866749d0dSScott Teel } 418966749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 419066749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 419166749d0dSScott Teel if (!rc) 419266749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 419366749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 419466749d0dSScott Teel else 419566749d0dSScott Teel *nlocals = le16_to_cpu( 419666749d0dSScott Teel id_ctlr->extended_logical_unit_count); 419766749d0dSScott Teel else 419866749d0dSScott Teel *nlocals = -1; 419966749d0dSScott Teel return rc; 420066749d0dSScott Teel } 420166749d0dSScott Teel 420264ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 420364ce60caSDon Brace { 420464ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 420564ce60caSDon Brace bool is_spare = false; 420664ce60caSDon Brace int rc; 420764ce60caSDon Brace 420864ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 420964ce60caSDon Brace if (!id_phys) 421064ce60caSDon Brace return false; 421164ce60caSDon Brace 421264ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 421364ce60caSDon Brace lunaddrbytes, 421464ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 421564ce60caSDon Brace id_phys, sizeof(*id_phys)); 421664ce60caSDon Brace if (rc == 0) 421764ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 421864ce60caSDon Brace 421964ce60caSDon Brace kfree(id_phys); 422064ce60caSDon Brace return is_spare; 422164ce60caSDon Brace } 422264ce60caSDon Brace 422364ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 422464ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 422564ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 422664ce60caSDon Brace 422764ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 422864ce60caSDon Brace 422964ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 423064ce60caSDon Brace struct ext_report_lun_entry *rle) 423164ce60caSDon Brace { 423264ce60caSDon Brace u8 device_flags; 423364ce60caSDon Brace u8 device_type; 423464ce60caSDon Brace 423564ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 423664ce60caSDon Brace return false; 423764ce60caSDon Brace 423864ce60caSDon Brace device_flags = rle->device_flags; 423964ce60caSDon Brace device_type = rle->device_type; 424064ce60caSDon Brace 424164ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 424264ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 424364ce60caSDon Brace return false; 424464ce60caSDon Brace return true; 424564ce60caSDon Brace } 424664ce60caSDon Brace 424764ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 424864ce60caSDon Brace return false; 424964ce60caSDon Brace 425064ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 425164ce60caSDon Brace return false; 425264ce60caSDon Brace 425364ce60caSDon Brace /* 425464ce60caSDon Brace * Spares may be spun down, we do not want to 425564ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 425664ce60caSDon Brace * that would have them spun up, that is a 425764ce60caSDon Brace * performance hit because I/O to the RAID device 425864ce60caSDon Brace * stops while the spin up occurs which can take 425964ce60caSDon Brace * over 50 seconds. 426064ce60caSDon Brace */ 426164ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 426264ce60caSDon Brace return true; 426364ce60caSDon Brace 426464ce60caSDon Brace return false; 426564ce60caSDon Brace } 426666749d0dSScott Teel 42678aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4268edd16368SStephen M. Cameron { 4269edd16368SStephen M. Cameron /* the idea here is we could get notified 4270edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4271edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4272edd16368SStephen M. Cameron * our list of devices accordingly. 4273edd16368SStephen M. Cameron * 4274edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4275edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4276edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4277edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4278edd16368SStephen M. Cameron */ 4279a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4280edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 428103383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 428266749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 428301a02ffcSStephen M. Cameron u32 nphysicals = 0; 428401a02ffcSStephen M. Cameron u32 nlogicals = 0; 428566749d0dSScott Teel u32 nlocal_logicals = 0; 428601a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4287edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4288edd16368SStephen M. Cameron int ncurrent = 0; 42894f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4290339b2b14SStephen M. Cameron int raid_ctlr_position; 429104fa2f44SKevin Barnett bool physical_device; 4292aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4293edd16368SStephen M. Cameron 4294cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 429592084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 429692084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4297edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 429803383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 429966749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4300edd16368SStephen M. Cameron 430103383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 430266749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4303edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4304edd16368SStephen M. Cameron goto out; 4305edd16368SStephen M. Cameron } 4306edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4307edd16368SStephen M. Cameron 4308853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4309853633e8SDon Brace 431003383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4311853633e8SDon Brace logdev_list, &nlogicals)) { 4312853633e8SDon Brace h->drv_req_rescan = 1; 4313edd16368SStephen M. Cameron goto out; 4314853633e8SDon Brace } 4315edd16368SStephen M. Cameron 431666749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 431766749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 431866749d0dSScott Teel dev_warn(&h->pdev->dev, 431966749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 432066749d0dSScott Teel __func__); 432166749d0dSScott Teel } 4322edd16368SStephen M. Cameron 4323aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4324aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4325aca4a520SScott Teel * controller. 4326edd16368SStephen M. Cameron */ 4327aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4328edd16368SStephen M. Cameron 4329edd16368SStephen M. Cameron /* Allocate the per device structures */ 4330edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4331b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4332b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4333b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4334b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4335b7ec021fSScott Teel break; 4336b7ec021fSScott Teel } 4337b7ec021fSScott Teel 4338edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4339edd16368SStephen M. Cameron if (!currentsd[i]) { 4340853633e8SDon Brace h->drv_req_rescan = 1; 4341edd16368SStephen M. Cameron goto out; 4342edd16368SStephen M. Cameron } 4343edd16368SStephen M. Cameron ndev_allocated++; 4344edd16368SStephen M. Cameron } 4345edd16368SStephen M. Cameron 43468645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4347339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4348339b2b14SStephen M. Cameron else 4349339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4350339b2b14SStephen M. Cameron 4351edd16368SStephen M. Cameron /* adjust our table of devices */ 43524f4eb9f1SScott Teel n_ext_target_devs = 0; 4353edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43540b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4355683fc444SDon Brace int rc = 0; 4356f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 435764ce60caSDon Brace bool skip_device = false; 4358edd16368SStephen M. Cameron 435904fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4360edd16368SStephen M. Cameron 4361edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4362339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4363339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 436441ce4c35SStephen Cameron 436586cf7130SDon Brace /* Determine if this is a lun from an external target array */ 436686cf7130SDon Brace tmpdevice->external = 436786cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 436886cf7130SDon Brace nphysicals, nlocal_logicals); 436986cf7130SDon Brace 437064ce60caSDon Brace /* 437164ce60caSDon Brace * Skip over some devices such as a spare. 437264ce60caSDon Brace */ 437364ce60caSDon Brace if (!tmpdevice->external && physical_device) { 437464ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 437564ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 437664ce60caSDon Brace if (skip_device) 4377edd16368SStephen M. Cameron continue; 437864ce60caSDon Brace } 4379edd16368SStephen M. Cameron 4380edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4381683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4382683fc444SDon Brace &is_OBDR); 4383683fc444SDon Brace if (rc == -ENOMEM) { 4384683fc444SDon Brace dev_warn(&h->pdev->dev, 4385683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4386853633e8SDon Brace h->drv_req_rescan = 1; 4387683fc444SDon Brace goto out; 4388853633e8SDon Brace } 4389683fc444SDon Brace if (rc) { 439085b29008SDon Brace h->drv_req_rescan = 1; 4391683fc444SDon Brace continue; 4392683fc444SDon Brace } 4393683fc444SDon Brace 43941f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43959b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4396edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4397edd16368SStephen M. Cameron 439834592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 439934592254SScott Teel * Event-based change notification is unreliable for those. 4400edd16368SStephen M. Cameron */ 440134592254SScott Teel if (!h->discovery_polling) { 440234592254SScott Teel if (tmpdevice->external) { 440334592254SScott Teel h->discovery_polling = 1; 440434592254SScott Teel dev_info(&h->pdev->dev, 440534592254SScott Teel "External target, activate discovery polling.\n"); 4406edd16368SStephen M. Cameron } 440734592254SScott Teel } 440834592254SScott Teel 4409edd16368SStephen M. Cameron 4410edd16368SStephen M. Cameron *this_device = *tmpdevice; 441104fa2f44SKevin Barnett this_device->physical_device = physical_device; 4412edd16368SStephen M. Cameron 441304fa2f44SKevin Barnett /* 441404fa2f44SKevin Barnett * Expose all devices except for physical devices that 441504fa2f44SKevin Barnett * are masked. 441604fa2f44SKevin Barnett */ 441704fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 44182a168208SKevin Barnett this_device->expose_device = 0; 44192a168208SKevin Barnett else 44202a168208SKevin Barnett this_device->expose_device = 1; 442141ce4c35SStephen Cameron 4422d04e62b9SKevin Barnett 4423d04e62b9SKevin Barnett /* 4424d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4425d04e62b9SKevin Barnett */ 4426d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4427d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4428edd16368SStephen M. Cameron 4429edd16368SStephen M. Cameron switch (this_device->devtype) { 44300b0e1d6cSStephen M. Cameron case TYPE_ROM: 4431edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4432edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4433edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4434edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4435edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4436edd16368SStephen M. Cameron * the inquiry data. 4437edd16368SStephen M. Cameron */ 44380b0e1d6cSStephen M. Cameron if (is_OBDR) 4439edd16368SStephen M. Cameron ncurrent++; 4440edd16368SStephen M. Cameron break; 4441edd16368SStephen M. Cameron case TYPE_DISK: 4442af15ed36SDon Brace case TYPE_ZBC: 444304fa2f44SKevin Barnett if (this_device->physical_device) { 4444b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4445b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4446ecf418d1SJoe Handzik this_device->offload_enabled = 0; 444703383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4448f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4449f2039b03SDon Brace hpsa_get_path_info(this_device, 4450f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4451b9092b79SKevin Barnett } 4452edd16368SStephen M. Cameron ncurrent++; 4453edd16368SStephen M. Cameron break; 4454edd16368SStephen M. Cameron case TYPE_TAPE: 4455edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4456cca8f13bSDon Brace ncurrent++; 4457cca8f13bSDon Brace break; 445841ce4c35SStephen Cameron case TYPE_ENCLOSURE: 445917a9e54aSDon Brace if (!this_device->external) 4460cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4461cca8f13bSDon Brace physdev_list, phys_dev_index, 4462cca8f13bSDon Brace this_device); 446341ce4c35SStephen Cameron ncurrent++; 446441ce4c35SStephen Cameron break; 4465edd16368SStephen M. Cameron case TYPE_RAID: 4466edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4467edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4468edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4469edd16368SStephen M. Cameron * don't present it. 4470edd16368SStephen M. Cameron */ 4471edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4472edd16368SStephen M. Cameron break; 4473edd16368SStephen M. Cameron ncurrent++; 4474edd16368SStephen M. Cameron break; 4475edd16368SStephen M. Cameron default: 4476edd16368SStephen M. Cameron break; 4477edd16368SStephen M. Cameron } 4478cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4479edd16368SStephen M. Cameron break; 4480edd16368SStephen M. Cameron } 4481d04e62b9SKevin Barnett 4482d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4483d04e62b9SKevin Barnett int rc = 0; 4484d04e62b9SKevin Barnett 4485d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4486d04e62b9SKevin Barnett if (rc) { 4487d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4488d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4489d04e62b9SKevin Barnett goto out; 4490d04e62b9SKevin Barnett } 4491d04e62b9SKevin Barnett } 4492d04e62b9SKevin Barnett 44938aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4494edd16368SStephen M. Cameron out: 4495edd16368SStephen M. Cameron kfree(tmpdevice); 4496edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4497edd16368SStephen M. Cameron kfree(currentsd[i]); 4498edd16368SStephen M. Cameron kfree(currentsd); 4499edd16368SStephen M. Cameron kfree(physdev_list); 4500edd16368SStephen M. Cameron kfree(logdev_list); 450166749d0dSScott Teel kfree(id_ctlr); 450203383736SDon Brace kfree(id_phys); 4503edd16368SStephen M. Cameron } 4504edd16368SStephen M. Cameron 4505ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4506ec5cbf04SWebb Scales struct scatterlist *sg) 4507ec5cbf04SWebb Scales { 4508ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4509ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4510ec5cbf04SWebb Scales 4511ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4512ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4513ec5cbf04SWebb Scales desc->Ext = 0; 4514ec5cbf04SWebb Scales } 4515ec5cbf04SWebb Scales 4516c7ee65b3SWebb Scales /* 4517c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4518edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4519edd16368SStephen M. Cameron * hpsa command, cp. 4520edd16368SStephen M. Cameron */ 452133a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4522edd16368SStephen M. Cameron struct CommandList *cp, 4523edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4524edd16368SStephen M. Cameron { 4525edd16368SStephen M. Cameron struct scatterlist *sg; 4526b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 452733a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4528edd16368SStephen M. Cameron 452933a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4530edd16368SStephen M. Cameron 4531edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4532edd16368SStephen M. Cameron if (use_sg < 0) 4533edd16368SStephen M. Cameron return use_sg; 4534edd16368SStephen M. Cameron 4535edd16368SStephen M. Cameron if (!use_sg) 4536edd16368SStephen M. Cameron goto sglist_finished; 4537edd16368SStephen M. Cameron 4538b3a7ba7cSWebb Scales /* 4539b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4540b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4541b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4542b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4543b3a7ba7cSWebb Scales * the entries in the one list. 4544b3a7ba7cSWebb Scales */ 454533a2ffceSStephen M. Cameron curr_sg = cp->SG; 4546b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4547b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4548b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4549b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4550ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 455133a2ffceSStephen M. Cameron curr_sg++; 455233a2ffceSStephen M. Cameron } 4553ec5cbf04SWebb Scales 4554b3a7ba7cSWebb Scales if (chained) { 4555b3a7ba7cSWebb Scales /* 4556b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4557b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4558b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4559b3a7ba7cSWebb Scales * where the previous loop left off. 4560b3a7ba7cSWebb Scales */ 4561b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4562b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4563b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4564b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4565b3a7ba7cSWebb Scales curr_sg++; 4566b3a7ba7cSWebb Scales } 4567b3a7ba7cSWebb Scales } 4568b3a7ba7cSWebb Scales 4569ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4570b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 457133a2ffceSStephen M. Cameron 457233a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 457333a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 457433a2ffceSStephen M. Cameron 457533a2ffceSStephen M. Cameron if (chained) { 457633a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 457750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4578e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4579e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4580e2bea6dfSStephen M. Cameron return -1; 4581e2bea6dfSStephen M. Cameron } 458233a2ffceSStephen M. Cameron return 0; 4583edd16368SStephen M. Cameron } 4584edd16368SStephen M. Cameron 4585edd16368SStephen M. Cameron sglist_finished: 4586edd16368SStephen M. Cameron 458701a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4588c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4589edd16368SStephen M. Cameron return 0; 4590edd16368SStephen M. Cameron } 4591edd16368SStephen M. Cameron 4592283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4593283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4594283b4a9bSStephen M. Cameron { 4595283b4a9bSStephen M. Cameron int is_write = 0; 4596283b4a9bSStephen M. Cameron u32 block; 4597283b4a9bSStephen M. Cameron u32 block_cnt; 4598283b4a9bSStephen M. Cameron 4599283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4600283b4a9bSStephen M. Cameron switch (cdb[0]) { 4601283b4a9bSStephen M. Cameron case WRITE_6: 4602283b4a9bSStephen M. Cameron case WRITE_12: 4603283b4a9bSStephen M. Cameron is_write = 1; 4604283b4a9bSStephen M. Cameron case READ_6: 4605283b4a9bSStephen M. Cameron case READ_12: 4606283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4607abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4608abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4609abbada71SMahesh Rajashekhara cdb[3]); 4610283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4611c8a6c9a6SDon Brace if (block_cnt == 0) 4612c8a6c9a6SDon Brace block_cnt = 256; 4613283b4a9bSStephen M. Cameron } else { 4614283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4615c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4616c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4617283b4a9bSStephen M. Cameron } 4618283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4619283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4620283b4a9bSStephen M. Cameron 4621283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4622283b4a9bSStephen M. Cameron cdb[1] = 0; 4623283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4624283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4625283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4626283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4627283b4a9bSStephen M. Cameron cdb[6] = 0; 4628283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4629283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4630283b4a9bSStephen M. Cameron cdb[9] = 0; 4631283b4a9bSStephen M. Cameron *cdb_len = 10; 4632283b4a9bSStephen M. Cameron break; 4633283b4a9bSStephen M. Cameron } 4634283b4a9bSStephen M. Cameron return 0; 4635283b4a9bSStephen M. Cameron } 4636283b4a9bSStephen M. Cameron 4637c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4638283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 463903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4640e1f7de0cSMatt Gates { 4641e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4642e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4643e1f7de0cSMatt Gates unsigned int len; 4644e1f7de0cSMatt Gates unsigned int total_len = 0; 4645e1f7de0cSMatt Gates struct scatterlist *sg; 4646e1f7de0cSMatt Gates u64 addr64; 4647e1f7de0cSMatt Gates int use_sg, i; 4648e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4649e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4650e1f7de0cSMatt Gates 4651283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 465203383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 465303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4654283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 465503383736SDon Brace } 4656283b4a9bSStephen M. Cameron 4657e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4658e1f7de0cSMatt Gates 465903383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 466003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4661283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 466203383736SDon Brace } 4663283b4a9bSStephen M. Cameron 4664e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4665e1f7de0cSMatt Gates 4666e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4667e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4668e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4669e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4670e1f7de0cSMatt Gates 4671e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 467203383736SDon Brace if (use_sg < 0) { 467303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4674e1f7de0cSMatt Gates return use_sg; 467503383736SDon Brace } 4676e1f7de0cSMatt Gates 4677e1f7de0cSMatt Gates if (use_sg) { 4678e1f7de0cSMatt Gates curr_sg = cp->SG; 4679e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4680e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4681e1f7de0cSMatt Gates len = sg_dma_len(sg); 4682e1f7de0cSMatt Gates total_len += len; 468350a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 468450a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 468550a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4686e1f7de0cSMatt Gates curr_sg++; 4687e1f7de0cSMatt Gates } 468850a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4689e1f7de0cSMatt Gates 4690e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4691e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4692e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4693e1f7de0cSMatt Gates break; 4694e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4695e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4696e1f7de0cSMatt Gates break; 4697e1f7de0cSMatt Gates case DMA_NONE: 4698e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4699e1f7de0cSMatt Gates break; 4700e1f7de0cSMatt Gates default: 4701e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4702e1f7de0cSMatt Gates cmd->sc_data_direction); 4703e1f7de0cSMatt Gates BUG(); 4704e1f7de0cSMatt Gates break; 4705e1f7de0cSMatt Gates } 4706e1f7de0cSMatt Gates } else { 4707e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4708e1f7de0cSMatt Gates } 4709e1f7de0cSMatt Gates 4710c349775eSScott Teel c->Header.SGList = use_sg; 4711e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 47122b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 47132b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 47142b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 47152b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 47162b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4717283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4718283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4719c349775eSScott Teel /* Tag was already set at init time. */ 4720e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4721e1f7de0cSMatt Gates return 0; 4722e1f7de0cSMatt Gates } 4723edd16368SStephen M. Cameron 4724283b4a9bSStephen M. Cameron /* 4725283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4726283b4a9bSStephen M. Cameron * I/O accelerator path. 4727283b4a9bSStephen M. Cameron */ 4728283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4729283b4a9bSStephen M. Cameron struct CommandList *c) 4730283b4a9bSStephen M. Cameron { 4731283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4732283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4733283b4a9bSStephen M. Cameron 473445e596cdSDon Brace if (!dev) 473545e596cdSDon Brace return -1; 473645e596cdSDon Brace 473703383736SDon Brace c->phys_disk = dev; 473803383736SDon Brace 4739283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 474003383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4741283b4a9bSStephen M. Cameron } 4742283b4a9bSStephen M. Cameron 4743dd0e19f3SScott Teel /* 4744dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4745dd0e19f3SScott Teel */ 4746dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4747dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4748dd0e19f3SScott Teel { 4749dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4750dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4751dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4752dd0e19f3SScott Teel u64 first_block; 4753dd0e19f3SScott Teel 4754dd0e19f3SScott Teel /* Are we doing encryption on this device */ 47552b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4756dd0e19f3SScott Teel return; 4757dd0e19f3SScott Teel /* Set the data encryption key index. */ 4758dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4759dd0e19f3SScott Teel 4760dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4761dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4762dd0e19f3SScott Teel 4763dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4764dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4765dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4766dd0e19f3SScott Teel */ 4767dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4768dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4769dd0e19f3SScott Teel case READ_6: 4770abbada71SMahesh Rajashekhara case WRITE_6: 4771abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4772abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4773abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4774dd0e19f3SScott Teel break; 4775dd0e19f3SScott Teel case WRITE_10: 4776dd0e19f3SScott Teel case READ_10: 4777dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4778dd0e19f3SScott Teel case WRITE_12: 4779dd0e19f3SScott Teel case READ_12: 47802b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4781dd0e19f3SScott Teel break; 4782dd0e19f3SScott Teel case WRITE_16: 4783dd0e19f3SScott Teel case READ_16: 47842b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4785dd0e19f3SScott Teel break; 4786dd0e19f3SScott Teel default: 4787dd0e19f3SScott Teel dev_err(&h->pdev->dev, 47882b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 47892b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4790dd0e19f3SScott Teel BUG(); 4791dd0e19f3SScott Teel break; 4792dd0e19f3SScott Teel } 47932b08b3e9SDon Brace 47942b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47952b08b3e9SDon Brace first_block = first_block * 47962b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47972b08b3e9SDon Brace 47982b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47992b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4800dd0e19f3SScott Teel } 4801dd0e19f3SScott Teel 4802c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4803c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 480403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4805c349775eSScott Teel { 4806c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4807c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4808c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4809c349775eSScott Teel int use_sg, i; 4810c349775eSScott Teel struct scatterlist *sg; 4811c349775eSScott Teel u64 addr64; 4812c349775eSScott Teel u32 len; 4813c349775eSScott Teel u32 total_len = 0; 4814c349775eSScott Teel 481545e596cdSDon Brace if (!cmd->device) 481645e596cdSDon Brace return -1; 481745e596cdSDon Brace 481845e596cdSDon Brace if (!cmd->device->hostdata) 481945e596cdSDon Brace return -1; 482045e596cdSDon Brace 4821d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4822c349775eSScott Teel 482303383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 482403383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4825c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 482603383736SDon Brace } 482703383736SDon Brace 4828c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4829c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4830c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4831c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4832c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4833c349775eSScott Teel 4834c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4835c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4836c349775eSScott Teel 4837c349775eSScott Teel use_sg = scsi_dma_map(cmd); 483803383736SDon Brace if (use_sg < 0) { 483903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4840c349775eSScott Teel return use_sg; 484103383736SDon Brace } 4842c349775eSScott Teel 4843c349775eSScott Teel if (use_sg) { 4844c349775eSScott Teel curr_sg = cp->sg; 4845d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4846d9a729f3SWebb Scales addr64 = le64_to_cpu( 4847d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4848d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4849d9a729f3SWebb Scales curr_sg->length = 0; 4850d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4851d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4852d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4853d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4854d9a729f3SWebb Scales 4855d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4856d9a729f3SWebb Scales } 4857c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4858c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4859c349775eSScott Teel len = sg_dma_len(sg); 4860c349775eSScott Teel total_len += len; 4861c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4862c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4863c349775eSScott Teel curr_sg->reserved[0] = 0; 4864c349775eSScott Teel curr_sg->reserved[1] = 0; 4865c349775eSScott Teel curr_sg->reserved[2] = 0; 4866c349775eSScott Teel curr_sg->chain_indicator = 0; 4867c349775eSScott Teel curr_sg++; 4868c349775eSScott Teel } 4869c349775eSScott Teel 4870c349775eSScott Teel switch (cmd->sc_data_direction) { 4871c349775eSScott Teel case DMA_TO_DEVICE: 4872dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4873dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4874c349775eSScott Teel break; 4875c349775eSScott Teel case DMA_FROM_DEVICE: 4876dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4877dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4878c349775eSScott Teel break; 4879c349775eSScott Teel case DMA_NONE: 4880dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4881dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4882c349775eSScott Teel break; 4883c349775eSScott Teel default: 4884c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4885c349775eSScott Teel cmd->sc_data_direction); 4886c349775eSScott Teel BUG(); 4887c349775eSScott Teel break; 4888c349775eSScott Teel } 4889c349775eSScott Teel } else { 4890dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4891dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4892c349775eSScott Teel } 4893dd0e19f3SScott Teel 4894dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4895dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4896dd0e19f3SScott Teel 48972b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4898f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4899c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4900c349775eSScott Teel 4901c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4902c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4903c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 490450a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4905c349775eSScott Teel 4906d9a729f3SWebb Scales /* fill in sg elements */ 4907d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4908d9a729f3SWebb Scales cp->sg_count = 1; 4909a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4910d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4911d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4912d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4913d9a729f3SWebb Scales return -1; 4914d9a729f3SWebb Scales } 4915d9a729f3SWebb Scales } else 4916d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4917d9a729f3SWebb Scales 4918c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4919c349775eSScott Teel return 0; 4920c349775eSScott Teel } 4921c349775eSScott Teel 4922c349775eSScott Teel /* 4923c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4924c349775eSScott Teel */ 4925c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4926c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 492703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4928c349775eSScott Teel { 492945e596cdSDon Brace if (!c->scsi_cmd->device) 493045e596cdSDon Brace return -1; 493145e596cdSDon Brace 493245e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 493345e596cdSDon Brace return -1; 493445e596cdSDon Brace 493503383736SDon Brace /* Try to honor the device's queue depth */ 493603383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 493703383736SDon Brace phys_disk->queue_depth) { 493803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 493903383736SDon Brace return IO_ACCEL_INELIGIBLE; 494003383736SDon Brace } 4941c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4942c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 494303383736SDon Brace cdb, cdb_len, scsi3addr, 494403383736SDon Brace phys_disk); 4945c349775eSScott Teel else 4946c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 494703383736SDon Brace cdb, cdb_len, scsi3addr, 494803383736SDon Brace phys_disk); 4949c349775eSScott Teel } 4950c349775eSScott Teel 49516b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 49526b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 49536b80b18fSScott Teel { 49546b80b18fSScott Teel if (offload_to_mirror == 0) { 49556b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 49562b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49576b80b18fSScott Teel return; 49586b80b18fSScott Teel } 49596b80b18fSScott Teel do { 49606b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 49612b08b3e9SDon Brace *current_group = *map_index / 49622b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49636b80b18fSScott Teel if (offload_to_mirror == *current_group) 49646b80b18fSScott Teel continue; 49652b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 49666b80b18fSScott Teel /* select map index from next group */ 49672b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 49686b80b18fSScott Teel (*current_group)++; 49696b80b18fSScott Teel } else { 49706b80b18fSScott Teel /* select map index from first group */ 49712b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49726b80b18fSScott Teel *current_group = 0; 49736b80b18fSScott Teel } 49746b80b18fSScott Teel } while (offload_to_mirror != *current_group); 49756b80b18fSScott Teel } 49766b80b18fSScott Teel 4977283b4a9bSStephen M. Cameron /* 4978283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4979283b4a9bSStephen M. Cameron */ 4980283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4981283b4a9bSStephen M. Cameron struct CommandList *c) 4982283b4a9bSStephen M. Cameron { 4983283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4984283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4985283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4986283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4987283b4a9bSStephen M. Cameron int is_write = 0; 4988283b4a9bSStephen M. Cameron u32 map_index; 4989283b4a9bSStephen M. Cameron u64 first_block, last_block; 4990283b4a9bSStephen M. Cameron u32 block_cnt; 4991283b4a9bSStephen M. Cameron u32 blocks_per_row; 4992283b4a9bSStephen M. Cameron u64 first_row, last_row; 4993283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4994283b4a9bSStephen M. Cameron u32 first_column, last_column; 49956b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49966b80b18fSScott Teel u32 r5or6_blocks_per_row; 49976b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49986b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49996b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 50006b80b18fSScott Teel u32 total_disks_per_row; 50016b80b18fSScott Teel u32 stripesize; 50026b80b18fSScott Teel u32 first_group, last_group, current_group; 5003283b4a9bSStephen M. Cameron u32 map_row; 5004283b4a9bSStephen M. Cameron u32 disk_handle; 5005283b4a9bSStephen M. Cameron u64 disk_block; 5006283b4a9bSStephen M. Cameron u32 disk_block_cnt; 5007283b4a9bSStephen M. Cameron u8 cdb[16]; 5008283b4a9bSStephen M. Cameron u8 cdb_len; 50092b08b3e9SDon Brace u16 strip_size; 5010283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5011283b4a9bSStephen M. Cameron u64 tmpdiv; 5012283b4a9bSStephen M. Cameron #endif 50136b80b18fSScott Teel int offload_to_mirror; 5014283b4a9bSStephen M. Cameron 501545e596cdSDon Brace if (!dev) 501645e596cdSDon Brace return -1; 501745e596cdSDon Brace 5018283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 5019283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 5020283b4a9bSStephen M. Cameron case WRITE_6: 5021283b4a9bSStephen M. Cameron is_write = 1; 5022283b4a9bSStephen M. Cameron case READ_6: 5023abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5024abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5025abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5026283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 50273fa89a04SStephen M. Cameron if (block_cnt == 0) 50283fa89a04SStephen M. Cameron block_cnt = 256; 5029283b4a9bSStephen M. Cameron break; 5030283b4a9bSStephen M. Cameron case WRITE_10: 5031283b4a9bSStephen M. Cameron is_write = 1; 5032283b4a9bSStephen M. Cameron case READ_10: 5033283b4a9bSStephen M. Cameron first_block = 5034283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5035283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5036283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5037283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5038283b4a9bSStephen M. Cameron block_cnt = 5039283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5040283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5041283b4a9bSStephen M. Cameron break; 5042283b4a9bSStephen M. Cameron case WRITE_12: 5043283b4a9bSStephen M. Cameron is_write = 1; 5044283b4a9bSStephen M. Cameron case READ_12: 5045283b4a9bSStephen M. Cameron first_block = 5046283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5047283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5048283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5049283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5050283b4a9bSStephen M. Cameron block_cnt = 5051283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5052283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5053283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5054283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5055283b4a9bSStephen M. Cameron break; 5056283b4a9bSStephen M. Cameron case WRITE_16: 5057283b4a9bSStephen M. Cameron is_write = 1; 5058283b4a9bSStephen M. Cameron case READ_16: 5059283b4a9bSStephen M. Cameron first_block = 5060283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5061283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5062283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5063283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5064283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5065283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5066283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5067283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5068283b4a9bSStephen M. Cameron block_cnt = 5069283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5070283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5071283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5072283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5073283b4a9bSStephen M. Cameron break; 5074283b4a9bSStephen M. Cameron default: 5075283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5076283b4a9bSStephen M. Cameron } 5077283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5078283b4a9bSStephen M. Cameron 5079283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5080283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5081283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5082283b4a9bSStephen M. Cameron 5083283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 50842b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50852b08b3e9SDon Brace last_block < first_block) 5086283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5087283b4a9bSStephen M. Cameron 5088283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50892b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50902b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50912b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5092283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5093283b4a9bSStephen M. Cameron tmpdiv = first_block; 5094283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5095283b4a9bSStephen M. Cameron first_row = tmpdiv; 5096283b4a9bSStephen M. Cameron tmpdiv = last_block; 5097283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5098283b4a9bSStephen M. Cameron last_row = tmpdiv; 5099283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5100283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5101283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 51022b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5103283b4a9bSStephen M. Cameron first_column = tmpdiv; 5104283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 51052b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5106283b4a9bSStephen M. Cameron last_column = tmpdiv; 5107283b4a9bSStephen M. Cameron #else 5108283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5109283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5110283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5111283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 51122b08b3e9SDon Brace first_column = first_row_offset / strip_size; 51132b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5114283b4a9bSStephen M. Cameron #endif 5115283b4a9bSStephen M. Cameron 5116283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5117283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5118283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5119283b4a9bSStephen M. Cameron 5120283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 51212b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 51222b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5123283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51242b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51256b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 51266b80b18fSScott Teel 51276b80b18fSScott Teel switch (dev->raid_level) { 51286b80b18fSScott Teel case HPSA_RAID_0: 51296b80b18fSScott Teel break; /* nothing special to do */ 51306b80b18fSScott Teel case HPSA_RAID_1: 51316b80b18fSScott Teel /* Handles load balance across RAID 1 members. 51326b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 51336b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5134283b4a9bSStephen M. Cameron */ 51352b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5136283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 51372b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5138283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 51396b80b18fSScott Teel break; 51406b80b18fSScott Teel case HPSA_RAID_ADM: 51416b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 51426b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 51436b80b18fSScott Teel */ 51442b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 51456b80b18fSScott Teel 51466b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 51476b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 51486b80b18fSScott Teel &map_index, ¤t_group); 51496b80b18fSScott Teel /* set mirror group to use next time */ 51506b80b18fSScott Teel offload_to_mirror = 51512b08b3e9SDon Brace (offload_to_mirror >= 51522b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 51536b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 51546b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 51556b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 51566b80b18fSScott Teel * function since multiple threads might simultaneously 51576b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 51586b80b18fSScott Teel */ 51596b80b18fSScott Teel break; 51606b80b18fSScott Teel case HPSA_RAID_5: 51616b80b18fSScott Teel case HPSA_RAID_6: 51622b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 51636b80b18fSScott Teel break; 51646b80b18fSScott Teel 51656b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 51666b80b18fSScott Teel r5or6_blocks_per_row = 51672b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 51682b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 51696b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 51702b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 51712b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 51726b80b18fSScott Teel #if BITS_PER_LONG == 32 51736b80b18fSScott Teel tmpdiv = first_block; 51746b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 51756b80b18fSScott Teel tmpdiv = first_group; 51766b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51776b80b18fSScott Teel first_group = tmpdiv; 51786b80b18fSScott Teel tmpdiv = last_block; 51796b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 51806b80b18fSScott Teel tmpdiv = last_group; 51816b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51826b80b18fSScott Teel last_group = tmpdiv; 51836b80b18fSScott Teel #else 51846b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51856b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51866b80b18fSScott Teel #endif 5187000ff7c2SStephen M. Cameron if (first_group != last_group) 51886b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51896b80b18fSScott Teel 51906b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51916b80b18fSScott Teel #if BITS_PER_LONG == 32 51926b80b18fSScott Teel tmpdiv = first_block; 51936b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51946b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51956b80b18fSScott Teel tmpdiv = last_block; 51966b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51976b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51986b80b18fSScott Teel #else 51996b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 52006b80b18fSScott Teel first_block / stripesize; 52016b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 52026b80b18fSScott Teel #endif 52036b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 52046b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52056b80b18fSScott Teel 52066b80b18fSScott Teel 52076b80b18fSScott Teel /* Verify request is in a single column */ 52086b80b18fSScott Teel #if BITS_PER_LONG == 32 52096b80b18fSScott Teel tmpdiv = first_block; 52106b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 52116b80b18fSScott Teel tmpdiv = first_row_offset; 52126b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 52136b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 52146b80b18fSScott Teel tmpdiv = last_block; 52156b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 52166b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52176b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 52186b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 52196b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52206b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 52216b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52226b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52236b80b18fSScott Teel r5or6_last_column = tmpdiv; 52246b80b18fSScott Teel #else 52256b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 52266b80b18fSScott Teel (u32)((first_block % stripesize) % 52276b80b18fSScott Teel r5or6_blocks_per_row); 52286b80b18fSScott Teel 52296b80b18fSScott Teel r5or6_last_row_offset = 52306b80b18fSScott Teel (u32)((last_block % stripesize) % 52316b80b18fSScott Teel r5or6_blocks_per_row); 52326b80b18fSScott Teel 52336b80b18fSScott Teel first_column = r5or6_first_column = 52342b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 52356b80b18fSScott Teel r5or6_last_column = 52362b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 52376b80b18fSScott Teel #endif 52386b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 52396b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52406b80b18fSScott Teel 52416b80b18fSScott Teel /* Request is eligible */ 52426b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52432b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52446b80b18fSScott Teel 52456b80b18fSScott Teel map_index = (first_group * 52462b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 52476b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 52486b80b18fSScott Teel break; 52496b80b18fSScott Teel default: 52506b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5251283b4a9bSStephen M. Cameron } 52526b80b18fSScott Teel 525307543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 525407543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 525507543e0cSStephen Cameron 525603383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5257c3390df4SDon Brace if (!c->phys_disk) 5258c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 525903383736SDon Brace 5260283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 52612b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 52622b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 52632b08b3e9SDon Brace (first_row_offset - first_column * 52642b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5265283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5266283b4a9bSStephen M. Cameron 5267283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5268283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5269283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5270283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5271283b4a9bSStephen M. Cameron } 5272283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5273283b4a9bSStephen M. Cameron 5274283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5275283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5276283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5277283b4a9bSStephen M. Cameron cdb[1] = 0; 5278283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5279283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5280283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5281283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5282283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5283283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5284283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5285283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5286283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5287283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5288283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5289283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5290283b4a9bSStephen M. Cameron cdb[14] = 0; 5291283b4a9bSStephen M. Cameron cdb[15] = 0; 5292283b4a9bSStephen M. Cameron cdb_len = 16; 5293283b4a9bSStephen M. Cameron } else { 5294283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5295283b4a9bSStephen M. Cameron cdb[1] = 0; 5296283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5297283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5298283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5299283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5300283b4a9bSStephen M. Cameron cdb[6] = 0; 5301283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5302283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5303283b4a9bSStephen M. Cameron cdb[9] = 0; 5304283b4a9bSStephen M. Cameron cdb_len = 10; 5305283b4a9bSStephen M. Cameron } 5306283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 530703383736SDon Brace dev->scsi3addr, 530803383736SDon Brace dev->phys_disk[map_index]); 5309283b4a9bSStephen M. Cameron } 5310283b4a9bSStephen M. Cameron 531125163bd5SWebb Scales /* 531225163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 531325163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 531425163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 531525163bd5SWebb Scales */ 5316574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5317574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5318574f05d3SStephen Cameron unsigned char scsi3addr[]) 5319edd16368SStephen M. Cameron { 5320edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5321edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5322edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5323edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5324edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5325f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5326edd16368SStephen M. Cameron 5327edd16368SStephen M. Cameron /* Fill in the request block... */ 5328edd16368SStephen M. Cameron 5329edd16368SStephen M. Cameron c->Request.Timeout = 0; 5330edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5331edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5332edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5333edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5334edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5335a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5336a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5337edd16368SStephen M. Cameron break; 5338edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5339a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5340a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5341edd16368SStephen M. Cameron break; 5342edd16368SStephen M. Cameron case DMA_NONE: 5343a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5344a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5345edd16368SStephen M. Cameron break; 5346edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5347edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5348edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5349edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5350edd16368SStephen M. Cameron */ 5351edd16368SStephen M. Cameron 5352a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5353a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5354edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5355edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5356edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5357edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5358edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5359edd16368SStephen M. Cameron * our purposes here. 5360edd16368SStephen M. Cameron */ 5361edd16368SStephen M. Cameron 5362edd16368SStephen M. Cameron break; 5363edd16368SStephen M. Cameron 5364edd16368SStephen M. Cameron default: 5365edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5366edd16368SStephen M. Cameron cmd->sc_data_direction); 5367edd16368SStephen M. Cameron BUG(); 5368edd16368SStephen M. Cameron break; 5369edd16368SStephen M. Cameron } 5370edd16368SStephen M. Cameron 537133a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 537273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5373edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5374edd16368SStephen M. Cameron } 5375edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5376edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5377edd16368SStephen M. Cameron return 0; 5378edd16368SStephen M. Cameron } 5379edd16368SStephen M. Cameron 5380360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5381360c73bdSStephen Cameron struct CommandList *c) 5382360c73bdSStephen Cameron { 5383360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5384360c73bdSStephen Cameron 5385360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5386360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5387360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5388360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5389360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5390360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5391360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5392360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5393360c73bdSStephen Cameron c->cmdindex = index; 5394360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5395360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5396360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5397360c73bdSStephen Cameron c->h = h; 5398a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5399360c73bdSStephen Cameron } 5400360c73bdSStephen Cameron 5401360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5402360c73bdSStephen Cameron { 5403360c73bdSStephen Cameron int i; 5404360c73bdSStephen Cameron 5405360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5406360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5407360c73bdSStephen Cameron 5408360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5409360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5410360c73bdSStephen Cameron } 5411360c73bdSStephen Cameron } 5412360c73bdSStephen Cameron 5413360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5414360c73bdSStephen Cameron struct CommandList *c) 5415360c73bdSStephen Cameron { 5416360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5417360c73bdSStephen Cameron 541873153fe5SWebb Scales BUG_ON(c->cmdindex != index); 541973153fe5SWebb Scales 5420360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5421360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5422360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5423360c73bdSStephen Cameron } 5424360c73bdSStephen Cameron 5425592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5426592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5427592a0ad5SWebb Scales unsigned char *scsi3addr) 5428592a0ad5SWebb Scales { 5429592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5430592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5431592a0ad5SWebb Scales 543245e596cdSDon Brace if (!dev) 543345e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 543445e596cdSDon Brace 5435592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5436592a0ad5SWebb Scales 5437592a0ad5SWebb Scales if (dev->offload_enabled) { 5438592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5439592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5440592a0ad5SWebb Scales c->scsi_cmd = cmd; 5441592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5442592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5443592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5444a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5445592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5446592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5447592a0ad5SWebb Scales c->scsi_cmd = cmd; 5448592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5449592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5450592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5451592a0ad5SWebb Scales } 5452592a0ad5SWebb Scales return rc; 5453592a0ad5SWebb Scales } 5454592a0ad5SWebb Scales 5455080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5456080ef1ccSDon Brace { 5457080ef1ccSDon Brace struct scsi_cmnd *cmd; 5458080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 54598a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5460080ef1ccSDon Brace 5461080ef1ccSDon Brace cmd = c->scsi_cmd; 5462080ef1ccSDon Brace dev = cmd->device->hostdata; 5463080ef1ccSDon Brace if (!dev) { 5464080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 54658a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5466080ef1ccSDon Brace } 5467d604f533SWebb Scales if (c->reset_pending) 5468d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5469a58e7e53SWebb Scales if (c->abort_pending) 5470a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5471592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5472592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5473592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5474592a0ad5SWebb Scales int rc; 5475592a0ad5SWebb Scales 5476592a0ad5SWebb Scales if (c2->error_data.serv_response == 5477592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5478592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5479592a0ad5SWebb Scales if (rc == 0) 5480592a0ad5SWebb Scales return; 5481592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5482592a0ad5SWebb Scales /* 5483592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5484592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5485592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5486592a0ad5SWebb Scales */ 5487592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54888a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5489592a0ad5SWebb Scales } 5490592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5491592a0ad5SWebb Scales } 5492592a0ad5SWebb Scales } 5493360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5494080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5495080ef1ccSDon Brace /* 5496080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5497080ef1ccSDon Brace * again via scsi mid layer, which will then get 5498080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5499592a0ad5SWebb Scales * 5500592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5501592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5502080ef1ccSDon Brace */ 5503080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5504080ef1ccSDon Brace cmd->scsi_done(cmd); 5505080ef1ccSDon Brace } 5506080ef1ccSDon Brace } 5507080ef1ccSDon Brace 5508574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5509574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5510574f05d3SStephen Cameron { 5511574f05d3SStephen Cameron struct ctlr_info *h; 5512574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5513574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5514574f05d3SStephen Cameron struct CommandList *c; 5515574f05d3SStephen Cameron int rc = 0; 5516574f05d3SStephen Cameron 5517574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5518574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 551973153fe5SWebb Scales 552073153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 552173153fe5SWebb Scales 5522574f05d3SStephen Cameron dev = cmd->device->hostdata; 5523574f05d3SStephen Cameron if (!dev) { 55241ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5525ba74fdc4SDon Brace cmd->scsi_done(cmd); 5526ba74fdc4SDon Brace return 0; 5527ba74fdc4SDon Brace } 5528ba74fdc4SDon Brace 5529ba74fdc4SDon Brace if (dev->removed) { 5530574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5531574f05d3SStephen Cameron cmd->scsi_done(cmd); 5532574f05d3SStephen Cameron return 0; 5533574f05d3SStephen Cameron } 553473153fe5SWebb Scales 5535574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5536574f05d3SStephen Cameron 5537574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 553825163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5539574f05d3SStephen Cameron cmd->scsi_done(cmd); 5540574f05d3SStephen Cameron return 0; 5541574f05d3SStephen Cameron } 554273153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5543574f05d3SStephen Cameron 5544407863cbSStephen Cameron /* 5545407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5546574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5547574f05d3SStephen Cameron */ 5548574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 554957292b58SChristoph Hellwig !blk_rq_is_passthrough(cmd->request) && 5550574f05d3SStephen Cameron h->acciopath_status)) { 5551592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5552574f05d3SStephen Cameron if (rc == 0) 5553592a0ad5SWebb Scales return 0; 5554592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 555573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5556574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5557574f05d3SStephen Cameron } 5558574f05d3SStephen Cameron } 5559574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5560574f05d3SStephen Cameron } 5561574f05d3SStephen Cameron 55628ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 55635f389360SStephen M. Cameron { 55645f389360SStephen M. Cameron unsigned long flags; 55655f389360SStephen M. Cameron 55665f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 55675f389360SStephen M. Cameron h->scan_finished = 1; 556887b9e6aaSDon Brace wake_up(&h->scan_wait_queue); 55695f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 55705f389360SStephen M. Cameron } 55715f389360SStephen M. Cameron 5572a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5573a08a8471SStephen M. Cameron { 5574a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5575a08a8471SStephen M. Cameron unsigned long flags; 5576a08a8471SStephen M. Cameron 55778ebc9248SWebb Scales /* 55788ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 55798ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 55808ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 55818ebc9248SWebb Scales * piling up on a locked up controller. 55828ebc9248SWebb Scales */ 55838ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55848ebc9248SWebb Scales return hpsa_scan_complete(h); 55855f389360SStephen M. Cameron 558687b9e6aaSDon Brace /* 558787b9e6aaSDon Brace * If a scan is already waiting to run, no need to add another 558887b9e6aaSDon Brace */ 558987b9e6aaSDon Brace spin_lock_irqsave(&h->scan_lock, flags); 559087b9e6aaSDon Brace if (h->scan_waiting) { 559187b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 559287b9e6aaSDon Brace return; 559387b9e6aaSDon Brace } 559487b9e6aaSDon Brace 559587b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 559687b9e6aaSDon Brace 5597a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5598a08a8471SStephen M. Cameron while (1) { 5599a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5600a08a8471SStephen M. Cameron if (h->scan_finished) 5601a08a8471SStephen M. Cameron break; 560287b9e6aaSDon Brace h->scan_waiting = 1; 5603a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5604a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5605a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5606a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5607a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5608a08a8471SStephen M. Cameron * happen if we're in here. 5609a08a8471SStephen M. Cameron */ 5610a08a8471SStephen M. Cameron } 5611a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 561287b9e6aaSDon Brace h->scan_waiting = 0; 5613a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5614a08a8471SStephen M. Cameron 56158ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 56168ebc9248SWebb Scales return hpsa_scan_complete(h); 56175f389360SStephen M. Cameron 5618bfd7546cSDon Brace /* 5619bfd7546cSDon Brace * Do the scan after a reset completion 5620bfd7546cSDon Brace */ 5621bfd7546cSDon Brace if (h->reset_in_progress) { 5622bfd7546cSDon Brace h->drv_req_rescan = 1; 5623bfd7546cSDon Brace return; 5624bfd7546cSDon Brace } 5625bfd7546cSDon Brace 56268aa60681SDon Brace hpsa_update_scsi_devices(h); 5627a08a8471SStephen M. Cameron 56288ebc9248SWebb Scales hpsa_scan_complete(h); 5629a08a8471SStephen M. Cameron } 5630a08a8471SStephen M. Cameron 56317c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 56327c0a0229SDon Brace { 563303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 563403383736SDon Brace 563503383736SDon Brace if (!logical_drive) 563603383736SDon Brace return -ENODEV; 56377c0a0229SDon Brace 56387c0a0229SDon Brace if (qdepth < 1) 56397c0a0229SDon Brace qdepth = 1; 564003383736SDon Brace else if (qdepth > logical_drive->queue_depth) 564103383736SDon Brace qdepth = logical_drive->queue_depth; 564203383736SDon Brace 564303383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 56447c0a0229SDon Brace } 56457c0a0229SDon Brace 5646a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5647a08a8471SStephen M. Cameron unsigned long elapsed_time) 5648a08a8471SStephen M. Cameron { 5649a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5650a08a8471SStephen M. Cameron unsigned long flags; 5651a08a8471SStephen M. Cameron int finished; 5652a08a8471SStephen M. Cameron 5653a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5654a08a8471SStephen M. Cameron finished = h->scan_finished; 5655a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5656a08a8471SStephen M. Cameron return finished; 5657a08a8471SStephen M. Cameron } 5658a08a8471SStephen M. Cameron 56592946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5660edd16368SStephen M. Cameron { 5661b705690dSStephen M. Cameron struct Scsi_Host *sh; 5662edd16368SStephen M. Cameron 5663b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 56642946e82bSRobert Elliott if (sh == NULL) { 56652946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 56662946e82bSRobert Elliott return -ENOMEM; 56672946e82bSRobert Elliott } 5668b705690dSStephen M. Cameron 5669b705690dSStephen M. Cameron sh->io_port = 0; 5670b705690dSStephen M. Cameron sh->n_io_port = 0; 5671b705690dSStephen M. Cameron sh->this_id = -1; 5672b705690dSStephen M. Cameron sh->max_channel = 3; 5673b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5674b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5675b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 567641ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5677d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5678b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5679d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5680b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5681bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5682b705690dSStephen M. Cameron sh->unique_id = sh->irq; 568364d513acSChristoph Hellwig 56842946e82bSRobert Elliott h->scsi_host = sh; 56852946e82bSRobert Elliott return 0; 56862946e82bSRobert Elliott } 56872946e82bSRobert Elliott 56882946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 56892946e82bSRobert Elliott { 56902946e82bSRobert Elliott int rv; 56912946e82bSRobert Elliott 56922946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 56932946e82bSRobert Elliott if (rv) { 56942946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 56952946e82bSRobert Elliott return rv; 56962946e82bSRobert Elliott } 56972946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 56982946e82bSRobert Elliott return 0; 5699edd16368SStephen M. Cameron } 5700edd16368SStephen M. Cameron 5701b69324ffSWebb Scales /* 570273153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 570373153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 570473153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 570573153fe5SWebb Scales * low-numbered entries for our own uses.) 570673153fe5SWebb Scales */ 570773153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 570873153fe5SWebb Scales { 570973153fe5SWebb Scales int idx = scmd->request->tag; 571073153fe5SWebb Scales 571173153fe5SWebb Scales if (idx < 0) 571273153fe5SWebb Scales return idx; 571373153fe5SWebb Scales 571473153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 571573153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 571673153fe5SWebb Scales } 571773153fe5SWebb Scales 571873153fe5SWebb Scales /* 5719b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5720b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5721b69324ffSWebb Scales */ 5722b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5723b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5724b69324ffSWebb Scales int reply_queue) 5725edd16368SStephen M. Cameron { 57268919358eSTomas Henzl int rc; 5727edd16368SStephen M. Cameron 5728a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5729a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5730a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5731c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 573225163bd5SWebb Scales if (rc) 5733b69324ffSWebb Scales return rc; 5734edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5735edd16368SStephen M. Cameron 5736b69324ffSWebb Scales /* Check if the unit is already ready. */ 5737edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5738b69324ffSWebb Scales return 0; 5739edd16368SStephen M. Cameron 5740b69324ffSWebb Scales /* 5741b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5742b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5743b69324ffSWebb Scales * looking for (but, success is good too). 5744b69324ffSWebb Scales */ 5745edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5746edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5747edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5748edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5749b69324ffSWebb Scales return 0; 5750b69324ffSWebb Scales 5751b69324ffSWebb Scales return 1; 5752b69324ffSWebb Scales } 5753b69324ffSWebb Scales 5754b69324ffSWebb Scales /* 5755b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5756b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5757b69324ffSWebb Scales */ 5758b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5759b69324ffSWebb Scales struct CommandList *c, 5760b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5761b69324ffSWebb Scales { 5762b69324ffSWebb Scales int rc; 5763b69324ffSWebb Scales int count = 0; 5764b69324ffSWebb Scales int waittime = 1; /* seconds */ 5765b69324ffSWebb Scales 5766b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5767b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5768b69324ffSWebb Scales 5769b69324ffSWebb Scales /* 5770b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5771b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5772b69324ffSWebb Scales */ 5773b69324ffSWebb Scales msleep(1000 * waittime); 5774b69324ffSWebb Scales 5775b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5776b69324ffSWebb Scales if (!rc) 5777edd16368SStephen M. Cameron break; 5778b69324ffSWebb Scales 5779b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5780b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5781b69324ffSWebb Scales waittime *= 2; 5782b69324ffSWebb Scales 5783b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5784b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5785b69324ffSWebb Scales waittime); 5786b69324ffSWebb Scales } 5787b69324ffSWebb Scales 5788b69324ffSWebb Scales return rc; 5789b69324ffSWebb Scales } 5790b69324ffSWebb Scales 5791b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5792b69324ffSWebb Scales unsigned char lunaddr[], 5793b69324ffSWebb Scales int reply_queue) 5794b69324ffSWebb Scales { 5795b69324ffSWebb Scales int first_queue; 5796b69324ffSWebb Scales int last_queue; 5797b69324ffSWebb Scales int rq; 5798b69324ffSWebb Scales int rc = 0; 5799b69324ffSWebb Scales struct CommandList *c; 5800b69324ffSWebb Scales 5801b69324ffSWebb Scales c = cmd_alloc(h); 5802b69324ffSWebb Scales 5803b69324ffSWebb Scales /* 5804b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5805b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5806b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5807b69324ffSWebb Scales */ 5808b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5809b69324ffSWebb Scales first_queue = 0; 5810b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5811b69324ffSWebb Scales } else { 5812b69324ffSWebb Scales first_queue = reply_queue; 5813b69324ffSWebb Scales last_queue = reply_queue; 5814b69324ffSWebb Scales } 5815b69324ffSWebb Scales 5816b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5817b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5818b69324ffSWebb Scales if (rc) 5819b69324ffSWebb Scales break; 5820edd16368SStephen M. Cameron } 5821edd16368SStephen M. Cameron 5822edd16368SStephen M. Cameron if (rc) 5823edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5824edd16368SStephen M. Cameron else 5825edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5826edd16368SStephen M. Cameron 582745fcb86eSStephen Cameron cmd_free(h, c); 5828edd16368SStephen M. Cameron return rc; 5829edd16368SStephen M. Cameron } 5830edd16368SStephen M. Cameron 5831edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5832edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5833edd16368SStephen M. Cameron */ 5834edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5835edd16368SStephen M. Cameron { 5836edd16368SStephen M. Cameron int rc; 5837edd16368SStephen M. Cameron struct ctlr_info *h; 5838edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 58390b9b7b6eSScott Teel u8 reset_type; 58402dc127bbSDan Carpenter char msg[48]; 5841edd16368SStephen M. Cameron 5842edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5843edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5844edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5845edd16368SStephen M. Cameron return FAILED; 5846e345893bSDon Brace 5847e345893bSDon Brace if (lockup_detected(h)) 5848e345893bSDon Brace return FAILED; 5849e345893bSDon Brace 5850edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5851edd16368SStephen M. Cameron if (!dev) { 5852d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5853edd16368SStephen M. Cameron return FAILED; 5854edd16368SStephen M. Cameron } 585525163bd5SWebb Scales 585625163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 585725163bd5SWebb Scales if (lockup_detected(h)) { 58582dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58592dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 586073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 586173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 586225163bd5SWebb Scales return FAILED; 586325163bd5SWebb Scales } 586425163bd5SWebb Scales 586525163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 586625163bd5SWebb Scales if (detect_controller_lockup(h)) { 58672dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58682dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 586973153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 587073153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 587125163bd5SWebb Scales return FAILED; 587225163bd5SWebb Scales } 587325163bd5SWebb Scales 5874d604f533SWebb Scales /* Do not attempt on controller */ 5875d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5876d604f533SWebb Scales return SUCCESS; 5877d604f533SWebb Scales 58780b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 58790b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 58800b9b7b6eSScott Teel else 58810b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 58820b9b7b6eSScott Teel 58830b9b7b6eSScott Teel sprintf(msg, "resetting %s", 58840b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 58850b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 588625163bd5SWebb Scales 5887da03ded0SDon Brace h->reset_in_progress = 1; 5888d416b0c7SStephen M. Cameron 5889edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 58900b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 589125163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 58920b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 58930b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 58942dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5895d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5896da03ded0SDon Brace h->reset_in_progress = 0; 5897d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5898edd16368SStephen M. Cameron } 5899edd16368SStephen M. Cameron 59006cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 59016cba3f19SStephen M. Cameron { 59026cba3f19SStephen M. Cameron u8 original_tag[8]; 59036cba3f19SStephen M. Cameron 59046cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 59056cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 59066cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 59076cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 59086cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 59096cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 59106cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 59116cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 59126cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 59136cba3f19SStephen M. Cameron } 59146cba3f19SStephen M. Cameron 591517eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 59162b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 591717eb87d2SScott Teel { 59182b08b3e9SDon Brace u64 tag; 591917eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 592017eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 592117eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 59222b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 59232b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59242b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 592554b6e9e9SScott Teel return; 592654b6e9e9SScott Teel } 592754b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 592854b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 592954b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5930dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5931dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5932dd0e19f3SScott Teel *taglower = cm2->Tag; 593354b6e9e9SScott Teel return; 593454b6e9e9SScott Teel } 59352b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 59362b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59372b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 593817eb87d2SScott Teel } 593954b6e9e9SScott Teel 594075167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 59419b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 594275167d2cSStephen M. Cameron { 594375167d2cSStephen M. Cameron int rc = IO_OK; 594475167d2cSStephen M. Cameron struct CommandList *c; 594575167d2cSStephen M. Cameron struct ErrorInfo *ei; 59462b08b3e9SDon Brace __le32 tagupper, taglower; 594775167d2cSStephen M. Cameron 594845fcb86eSStephen Cameron c = cmd_alloc(h); 594975167d2cSStephen M. Cameron 5950a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 59519b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5952a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 59539b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 59546cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5955c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 595617eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 595725163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 595817eb87d2SScott Teel __func__, tagupper, taglower); 595975167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 596075167d2cSStephen M. Cameron 596175167d2cSStephen M. Cameron ei = c->err_info; 596275167d2cSStephen M. Cameron switch (ei->CommandStatus) { 596375167d2cSStephen M. Cameron case CMD_SUCCESS: 596475167d2cSStephen M. Cameron break; 59659437ac43SStephen Cameron case CMD_TMF_STATUS: 59669437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 59679437ac43SStephen Cameron break; 596875167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 596975167d2cSStephen M. Cameron rc = -1; 597075167d2cSStephen M. Cameron break; 597175167d2cSStephen M. Cameron default: 597275167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 597317eb87d2SScott Teel __func__, tagupper, taglower); 5974d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 597575167d2cSStephen M. Cameron rc = -1; 597675167d2cSStephen M. Cameron break; 597775167d2cSStephen M. Cameron } 597845fcb86eSStephen Cameron cmd_free(h, c); 5979dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5980dd0e19f3SScott Teel __func__, tagupper, taglower); 598175167d2cSStephen M. Cameron return rc; 598275167d2cSStephen M. Cameron } 598375167d2cSStephen M. Cameron 59848be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 59858be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 59868be986ccSStephen Cameron { 59878be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 59888be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 59898be986ccSStephen Cameron struct io_accel2_cmd *c2a = 59908be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5991a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 59928be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 59938be986ccSStephen Cameron 599445e596cdSDon Brace if (!dev) 599545e596cdSDon Brace return; 599645e596cdSDon Brace 59978be986ccSStephen Cameron /* 59988be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 59998be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 60008be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 60018be986ccSStephen Cameron */ 60028be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 60038be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 60048be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 60058be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 60068be986ccSStephen Cameron sizeof(ac->error_len)); 60078be986ccSStephen Cameron 60088be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 6009a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6010a58e7e53SWebb Scales 60118be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 60128be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 60138be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 60148be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 60158be986ccSStephen Cameron 60168be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 60178be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 60188be986ccSStephen Cameron ac->reply_queue = reply_queue; 60198be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 60208be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 60218be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 60228be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 60238be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 60248be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 60258be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 60268be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 60278be986ccSStephen Cameron } 60288be986ccSStephen Cameron 602954b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 603054b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 603154b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 603254b6e9e9SScott Teel * Return 0 on success (IO_OK) 603354b6e9e9SScott Teel * -1 on failure 603454b6e9e9SScott Teel */ 603554b6e9e9SScott Teel 603654b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 603725163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 603854b6e9e9SScott Teel { 603954b6e9e9SScott Teel int rc = IO_OK; 604054b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 604154b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 604254b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 604354b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 604454b6e9e9SScott Teel 604554b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 60467fa3030cSStephen Cameron scmd = abort->scsi_cmd; 604754b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 604854b6e9e9SScott Teel if (dev == NULL) { 604954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 605054b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 605154b6e9e9SScott Teel return -1; /* not abortable */ 605254b6e9e9SScott Teel } 605354b6e9e9SScott Teel 60542ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60552ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 6056609a70dfSRasmus Villemoes "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 60572ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6058609a70dfSRasmus Villemoes "Reset as abort", scsi3addr); 60592ba8bfc8SStephen M. Cameron 606054b6e9e9SScott Teel if (!dev->offload_enabled) { 606154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 606254b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 606354b6e9e9SScott Teel return -1; /* not abortable */ 606454b6e9e9SScott Teel } 606554b6e9e9SScott Teel 606654b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 606754b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 606854b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 606954b6e9e9SScott Teel return -1; /* not abortable */ 607054b6e9e9SScott Teel } 607154b6e9e9SScott Teel 607254b6e9e9SScott Teel /* send the reset */ 60732ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60742ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 6075609a70dfSRasmus Villemoes "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6076609a70dfSRasmus Villemoes psa); 6077b32ece0fSDon Brace rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 607854b6e9e9SScott Teel if (rc != 0) { 607954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 6080609a70dfSRasmus Villemoes "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6081609a70dfSRasmus Villemoes psa); 608254b6e9e9SScott Teel return rc; /* failed to reset */ 608354b6e9e9SScott Teel } 608454b6e9e9SScott Teel 608554b6e9e9SScott Teel /* wait for device to recover */ 6086b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 608754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 6088609a70dfSRasmus Villemoes "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6089609a70dfSRasmus Villemoes psa); 609054b6e9e9SScott Teel return -1; /* failed to recover */ 609154b6e9e9SScott Teel } 609254b6e9e9SScott Teel 609354b6e9e9SScott Teel /* device recovered */ 609454b6e9e9SScott Teel dev_info(&h->pdev->dev, 6095609a70dfSRasmus Villemoes "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6096609a70dfSRasmus Villemoes psa); 609754b6e9e9SScott Teel 609854b6e9e9SScott Teel return rc; /* success */ 609954b6e9e9SScott Teel } 610054b6e9e9SScott Teel 61018be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 61028be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 61038be986ccSStephen Cameron { 61048be986ccSStephen Cameron int rc = IO_OK; 61058be986ccSStephen Cameron struct CommandList *c; 61068be986ccSStephen Cameron __le32 taglower, tagupper; 61078be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 61088be986ccSStephen Cameron struct io_accel2_cmd *c2; 61098be986ccSStephen Cameron 61108be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 611145e596cdSDon Brace if (!dev) 611245e596cdSDon Brace return -1; 611345e596cdSDon Brace 61148be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 61158be986ccSStephen Cameron return -1; 61168be986ccSStephen Cameron 61178be986ccSStephen Cameron c = cmd_alloc(h); 61188be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 61198be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6120c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 61218be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 61228be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61238be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 61248be986ccSStephen Cameron __func__, tagupper, taglower); 61258be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 61268be986ccSStephen Cameron 61278be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61288be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 61298be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 61308be986ccSStephen Cameron switch (c2->error_data.serv_response) { 61318be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 61328be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 61338be986ccSStephen Cameron rc = 0; 61348be986ccSStephen Cameron break; 61358be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 61368be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 61378be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 61388be986ccSStephen Cameron rc = -1; 61398be986ccSStephen Cameron break; 61408be986ccSStephen Cameron default: 61418be986ccSStephen Cameron dev_warn(&h->pdev->dev, 61428be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 61438be986ccSStephen Cameron __func__, tagupper, taglower, 61448be986ccSStephen Cameron c2->error_data.serv_response); 61458be986ccSStephen Cameron rc = -1; 61468be986ccSStephen Cameron } 61478be986ccSStephen Cameron cmd_free(h, c); 61488be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 61498be986ccSStephen Cameron tagupper, taglower); 61508be986ccSStephen Cameron return rc; 61518be986ccSStephen Cameron } 61528be986ccSStephen Cameron 61536cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 615439f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 61556cba3f19SStephen M. Cameron { 61568be986ccSStephen Cameron /* 61578be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 615854b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 61598be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 61608be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 616154b6e9e9SScott Teel */ 61628be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 616339f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 616439f3deb2SDon Brace dev->physical_device) 61658be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 61668be986ccSStephen Cameron reply_queue); 61678be986ccSStephen Cameron else 616839f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 616939f3deb2SDon Brace dev->scsi3addr, 617025163bd5SWebb Scales abort, reply_queue); 61718be986ccSStephen Cameron } 617239f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 617325163bd5SWebb Scales } 617425163bd5SWebb Scales 617525163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 617625163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 617725163bd5SWebb Scales struct CommandList *c) 617825163bd5SWebb Scales { 617925163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 618025163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 618125163bd5SWebb Scales return c->Header.ReplyQueue; 61826cba3f19SStephen M. Cameron } 61836cba3f19SStephen M. Cameron 61849b5c48c2SStephen Cameron /* 61859b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 61869b5c48c2SStephen Cameron * over-subscription of commands 61879b5c48c2SStephen Cameron */ 61889b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 61899b5c48c2SStephen Cameron { 61909b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 61919b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 61929b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 61939b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 61949b5c48c2SStephen Cameron } 61959b5c48c2SStephen Cameron 619675167d2cSStephen M. Cameron /* Send an abort for the specified command. 619775167d2cSStephen M. Cameron * If the device and controller support it, 619875167d2cSStephen M. Cameron * send a task abort request. 619975167d2cSStephen M. Cameron */ 620075167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 620175167d2cSStephen M. Cameron { 620275167d2cSStephen M. Cameron 6203a58e7e53SWebb Scales int rc; 620475167d2cSStephen M. Cameron struct ctlr_info *h; 620575167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 620675167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 620775167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 620875167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 620975167d2cSStephen M. Cameron int ml = 0; 62102b08b3e9SDon Brace __le32 tagupper, taglower; 621125163bd5SWebb Scales int refcount, reply_queue; 621225163bd5SWebb Scales 621325163bd5SWebb Scales if (sc == NULL) 621425163bd5SWebb Scales return FAILED; 621575167d2cSStephen M. Cameron 62169b5c48c2SStephen Cameron if (sc->device == NULL) 62179b5c48c2SStephen Cameron return FAILED; 62189b5c48c2SStephen Cameron 621975167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 622075167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 62219b5c48c2SStephen Cameron if (h == NULL) 622275167d2cSStephen M. Cameron return FAILED; 622375167d2cSStephen M. Cameron 622425163bd5SWebb Scales /* Find the device of the command to be aborted */ 622525163bd5SWebb Scales dev = sc->device->hostdata; 622625163bd5SWebb Scales if (!dev) { 622725163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 622825163bd5SWebb Scales msg); 6229e345893bSDon Brace return FAILED; 623025163bd5SWebb Scales } 623125163bd5SWebb Scales 623225163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 623325163bd5SWebb Scales if (lockup_detected(h)) { 623425163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 623525163bd5SWebb Scales "ABORT FAILED, lockup detected"); 623625163bd5SWebb Scales return FAILED; 623725163bd5SWebb Scales } 623825163bd5SWebb Scales 623925163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 624025163bd5SWebb Scales if (detect_controller_lockup(h)) { 624125163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 624225163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 624325163bd5SWebb Scales return FAILED; 624425163bd5SWebb Scales } 6245e345893bSDon Brace 624675167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 624775167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 624875167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 624975167d2cSStephen M. Cameron return FAILED; 625075167d2cSStephen M. Cameron 625175167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 62524b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 625375167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 62540d96ef5fSWebb Scales sc->device->id, sc->device->lun, 62554b761557SRobert Elliott "Aborting command", sc); 625675167d2cSStephen M. Cameron 625775167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 625875167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 625975167d2cSStephen M. Cameron if (abort == NULL) { 6260281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6261281a7fd0SWebb Scales return SUCCESS; 6262281a7fd0SWebb Scales } 6263281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6264281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6265281a7fd0SWebb Scales cmd_free(h, abort); 6266281a7fd0SWebb Scales return SUCCESS; 626775167d2cSStephen M. Cameron } 62689b5c48c2SStephen Cameron 62699b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 62709b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 62719b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 62729b5c48c2SStephen Cameron cmd_free(h, abort); 62739b5c48c2SStephen Cameron return FAILED; 62749b5c48c2SStephen Cameron } 62759b5c48c2SStephen Cameron 6276a58e7e53SWebb Scales /* 6277a58e7e53SWebb Scales * Check that we're aborting the right command. 6278a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6279a58e7e53SWebb Scales */ 6280a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6281a58e7e53SWebb Scales cmd_free(h, abort); 6282a58e7e53SWebb Scales return SUCCESS; 6283a58e7e53SWebb Scales } 6284a58e7e53SWebb Scales 6285a58e7e53SWebb Scales abort->abort_pending = true; 628617eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 628725163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 628817eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 62897fa3030cSStephen Cameron as = abort->scsi_cmd; 629075167d2cSStephen M. Cameron if (as != NULL) 62914b761557SRobert Elliott ml += sprintf(msg+ml, 62924b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 62934b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 62944b761557SRobert Elliott as->serial_number); 62954b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 62960d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 62974b761557SRobert Elliott 629875167d2cSStephen M. Cameron /* 629975167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 630075167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 630175167d2cSStephen M. Cameron * distinguish which. Send the abort down. 630275167d2cSStephen M. Cameron */ 63039b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 63049b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 63054b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 63064b761557SRobert Elliott msg); 63079b5c48c2SStephen Cameron cmd_free(h, abort); 63089b5c48c2SStephen Cameron return FAILED; 63099b5c48c2SStephen Cameron } 631039f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 63119b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 63129b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 631375167d2cSStephen M. Cameron if (rc != 0) { 63144b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 63150d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 63160d96ef5fSWebb Scales "FAILED to abort command"); 6317281a7fd0SWebb Scales cmd_free(h, abort); 631875167d2cSStephen M. Cameron return FAILED; 631975167d2cSStephen M. Cameron } 63204b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6321d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6322a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6323281a7fd0SWebb Scales cmd_free(h, abort); 6324a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 632575167d2cSStephen M. Cameron } 632675167d2cSStephen M. Cameron 6327edd16368SStephen M. Cameron /* 632873153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 632973153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 633073153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 633173153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 633273153fe5SWebb Scales */ 633373153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 633473153fe5SWebb Scales struct scsi_cmnd *scmd) 633573153fe5SWebb Scales { 633673153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 633773153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 633873153fe5SWebb Scales 633973153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 634073153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 634173153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 634273153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 634373153fe5SWebb Scales * bounds, it's probably not our bug. 634473153fe5SWebb Scales */ 634573153fe5SWebb Scales BUG(); 634673153fe5SWebb Scales } 634773153fe5SWebb Scales 634873153fe5SWebb Scales atomic_inc(&c->refcount); 634973153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 635073153fe5SWebb Scales /* 635173153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 635273153fe5SWebb Scales * value. Thus, there should never be a collision here between 635373153fe5SWebb Scales * two requests...because if the selected command isn't idle 635473153fe5SWebb Scales * then someone is going to be very disappointed. 635573153fe5SWebb Scales */ 635673153fe5SWebb Scales dev_err(&h->pdev->dev, 635773153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 635873153fe5SWebb Scales idx); 635973153fe5SWebb Scales if (c->scsi_cmd != NULL) 636073153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 636173153fe5SWebb Scales scsi_print_command(scmd); 636273153fe5SWebb Scales } 636373153fe5SWebb Scales 636473153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 636573153fe5SWebb Scales return c; 636673153fe5SWebb Scales } 636773153fe5SWebb Scales 636873153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 636973153fe5SWebb Scales { 637073153fe5SWebb Scales /* 637173153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 637273153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 637373153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 637473153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 637573153fe5SWebb Scales */ 637673153fe5SWebb Scales (void)atomic_dec(&c->refcount); 637773153fe5SWebb Scales } 637873153fe5SWebb Scales 637973153fe5SWebb Scales /* 6380edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6381edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6382edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6383edd16368SStephen M. Cameron * cmd_free() is the complement. 6384bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6385bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6386edd16368SStephen M. Cameron */ 6387281a7fd0SWebb Scales 6388edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6389edd16368SStephen M. Cameron { 6390edd16368SStephen M. Cameron struct CommandList *c; 6391360c73bdSStephen Cameron int refcount, i; 639273153fe5SWebb Scales int offset = 0; 6393edd16368SStephen M. Cameron 639433811026SRobert Elliott /* 639533811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 63964c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 63974c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 63984c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 63994c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 64004c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 64014c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 64024c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 64034c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 640473153fe5SWebb Scales * 640573153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 640673153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 640773153fe5SWebb Scales * all works, since we have at least one command structure available; 640873153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 640973153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 641073153fe5SWebb Scales * layer will use the higher indexes. 64114c413128SStephen M. Cameron */ 64124c413128SStephen M. Cameron 6413281a7fd0SWebb Scales for (;;) { 641473153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 641573153fe5SWebb Scales HPSA_NRESERVED_CMDS, 641673153fe5SWebb Scales offset); 641773153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6418281a7fd0SWebb Scales offset = 0; 6419281a7fd0SWebb Scales continue; 6420281a7fd0SWebb Scales } 6421edd16368SStephen M. Cameron c = h->cmd_pool + i; 6422281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6423281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6424281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 642573153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6426281a7fd0SWebb Scales continue; 6427281a7fd0SWebb Scales } 6428281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6429281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6430281a7fd0SWebb Scales break; /* it's ours now. */ 6431281a7fd0SWebb Scales } 6432360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6433edd16368SStephen M. Cameron return c; 6434edd16368SStephen M. Cameron } 6435edd16368SStephen M. Cameron 643673153fe5SWebb Scales /* 643773153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 643873153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 643973153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 644073153fe5SWebb Scales * the clear-bit is harmless. 644173153fe5SWebb Scales */ 6442edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6443edd16368SStephen M. Cameron { 6444281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6445edd16368SStephen M. Cameron int i; 6446edd16368SStephen M. Cameron 6447edd16368SStephen M. Cameron i = c - h->cmd_pool; 6448edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6449edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6450edd16368SStephen M. Cameron } 6451281a7fd0SWebb Scales } 6452edd16368SStephen M. Cameron 6453edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6454edd16368SStephen M. Cameron 645542a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 645642a91641SDon Brace void __user *arg) 6457edd16368SStephen M. Cameron { 6458edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6459edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6460edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6461edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6462edd16368SStephen M. Cameron int err; 6463edd16368SStephen M. Cameron u32 cp; 6464edd16368SStephen M. Cameron 6465938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6466edd16368SStephen M. Cameron err = 0; 6467edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6468edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6469edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6470edd16368SStephen M. Cameron sizeof(arg64.Request)); 6471edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6472edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6473edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6474edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6475edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6476edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6477edd16368SStephen M. Cameron 6478edd16368SStephen M. Cameron if (err) 6479edd16368SStephen M. Cameron return -EFAULT; 6480edd16368SStephen M. Cameron 648142a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6482edd16368SStephen M. Cameron if (err) 6483edd16368SStephen M. Cameron return err; 6484edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6485edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6486edd16368SStephen M. Cameron if (err) 6487edd16368SStephen M. Cameron return -EFAULT; 6488edd16368SStephen M. Cameron return err; 6489edd16368SStephen M. Cameron } 6490edd16368SStephen M. Cameron 6491edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 649242a91641SDon Brace int cmd, void __user *arg) 6493edd16368SStephen M. Cameron { 6494edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6495edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6496edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6497edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6498edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6499edd16368SStephen M. Cameron int err; 6500edd16368SStephen M. Cameron u32 cp; 6501edd16368SStephen M. Cameron 6502938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6503edd16368SStephen M. Cameron err = 0; 6504edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6505edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6506edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6507edd16368SStephen M. Cameron sizeof(arg64.Request)); 6508edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6509edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6510edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6511edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6512edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6513edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6514edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6515edd16368SStephen M. Cameron 6516edd16368SStephen M. Cameron if (err) 6517edd16368SStephen M. Cameron return -EFAULT; 6518edd16368SStephen M. Cameron 651942a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6520edd16368SStephen M. Cameron if (err) 6521edd16368SStephen M. Cameron return err; 6522edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6523edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6524edd16368SStephen M. Cameron if (err) 6525edd16368SStephen M. Cameron return -EFAULT; 6526edd16368SStephen M. Cameron return err; 6527edd16368SStephen M. Cameron } 652871fe75a7SStephen M. Cameron 652942a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 653071fe75a7SStephen M. Cameron { 653171fe75a7SStephen M. Cameron switch (cmd) { 653271fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 653371fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 653471fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 653571fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 653671fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 653771fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 653871fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 653971fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 654071fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 654171fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 654271fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 654371fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 654471fe75a7SStephen M. Cameron case CCISS_REGNEWD: 654571fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 654671fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 654771fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 654871fe75a7SStephen M. Cameron 654971fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 655071fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 655171fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 655271fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 655371fe75a7SStephen M. Cameron 655471fe75a7SStephen M. Cameron default: 655571fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 655671fe75a7SStephen M. Cameron } 655771fe75a7SStephen M. Cameron } 6558edd16368SStephen M. Cameron #endif 6559edd16368SStephen M. Cameron 6560edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6561edd16368SStephen M. Cameron { 6562edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6563edd16368SStephen M. Cameron 6564edd16368SStephen M. Cameron if (!argp) 6565edd16368SStephen M. Cameron return -EINVAL; 6566edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6567edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6568edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6569edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6570edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6571edd16368SStephen M. Cameron return -EFAULT; 6572edd16368SStephen M. Cameron return 0; 6573edd16368SStephen M. Cameron } 6574edd16368SStephen M. Cameron 6575edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6576edd16368SStephen M. Cameron { 6577edd16368SStephen M. Cameron DriverVer_type DriverVer; 6578edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6579edd16368SStephen M. Cameron int rc; 6580edd16368SStephen M. Cameron 6581edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6582edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6583edd16368SStephen M. Cameron if (rc != 3) { 6584edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6585edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6586edd16368SStephen M. Cameron vmaj = 0; 6587edd16368SStephen M. Cameron vmin = 0; 6588edd16368SStephen M. Cameron vsubmin = 0; 6589edd16368SStephen M. Cameron } 6590edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6591edd16368SStephen M. Cameron if (!argp) 6592edd16368SStephen M. Cameron return -EINVAL; 6593edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6594edd16368SStephen M. Cameron return -EFAULT; 6595edd16368SStephen M. Cameron return 0; 6596edd16368SStephen M. Cameron } 6597edd16368SStephen M. Cameron 6598edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6599edd16368SStephen M. Cameron { 6600edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6601edd16368SStephen M. Cameron struct CommandList *c; 6602edd16368SStephen M. Cameron char *buff = NULL; 660350a0decfSStephen M. Cameron u64 temp64; 6604c1f63c8fSStephen M. Cameron int rc = 0; 6605edd16368SStephen M. Cameron 6606edd16368SStephen M. Cameron if (!argp) 6607edd16368SStephen M. Cameron return -EINVAL; 6608edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6609edd16368SStephen M. Cameron return -EPERM; 6610edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6611edd16368SStephen M. Cameron return -EFAULT; 6612edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6613edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6614edd16368SStephen M. Cameron return -EINVAL; 6615edd16368SStephen M. Cameron } 6616edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6617edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6618edd16368SStephen M. Cameron if (buff == NULL) 66192dd02d74SRobert Elliott return -ENOMEM; 66209233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6621edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6622b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6623b03a7771SStephen M. Cameron iocommand.buf_size)) { 6624c1f63c8fSStephen M. Cameron rc = -EFAULT; 6625c1f63c8fSStephen M. Cameron goto out_kfree; 6626edd16368SStephen M. Cameron } 6627b03a7771SStephen M. Cameron } else { 6628edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6629b03a7771SStephen M. Cameron } 6630b03a7771SStephen M. Cameron } 663145fcb86eSStephen Cameron c = cmd_alloc(h); 6632bf43caf3SRobert Elliott 6633edd16368SStephen M. Cameron /* Fill in the command type */ 6634edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6635a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6636edd16368SStephen M. Cameron /* Fill in Command Header */ 6637edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6638edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6639edd16368SStephen M. Cameron c->Header.SGList = 1; 664050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6641edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6642edd16368SStephen M. Cameron c->Header.SGList = 0; 664350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6644edd16368SStephen M. Cameron } 6645edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6646edd16368SStephen M. Cameron 6647edd16368SStephen M. Cameron /* Fill in Request block */ 6648edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6649edd16368SStephen M. Cameron sizeof(c->Request)); 6650edd16368SStephen M. Cameron 6651edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6652edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 665350a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6654edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 665550a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 665650a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 665750a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6658bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6659bcc48ffaSStephen M. Cameron goto out; 6660bcc48ffaSStephen M. Cameron } 666150a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 666250a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 666350a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6664edd16368SStephen M. Cameron } 6665c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 66663fb134cbSDon Brace NO_TIMEOUT); 6667c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6668edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6669edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 667025163bd5SWebb Scales if (rc) { 667125163bd5SWebb Scales rc = -EIO; 667225163bd5SWebb Scales goto out; 667325163bd5SWebb Scales } 6674edd16368SStephen M. Cameron 6675edd16368SStephen M. Cameron /* Copy the error information out */ 6676edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6677edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6678edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6679c1f63c8fSStephen M. Cameron rc = -EFAULT; 6680c1f63c8fSStephen M. Cameron goto out; 6681edd16368SStephen M. Cameron } 66829233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6683b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6684edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6685edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6686c1f63c8fSStephen M. Cameron rc = -EFAULT; 6687c1f63c8fSStephen M. Cameron goto out; 6688edd16368SStephen M. Cameron } 6689edd16368SStephen M. Cameron } 6690c1f63c8fSStephen M. Cameron out: 669145fcb86eSStephen Cameron cmd_free(h, c); 6692c1f63c8fSStephen M. Cameron out_kfree: 6693c1f63c8fSStephen M. Cameron kfree(buff); 6694c1f63c8fSStephen M. Cameron return rc; 6695edd16368SStephen M. Cameron } 6696edd16368SStephen M. Cameron 6697edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6698edd16368SStephen M. Cameron { 6699edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6700edd16368SStephen M. Cameron struct CommandList *c; 6701edd16368SStephen M. Cameron unsigned char **buff = NULL; 6702edd16368SStephen M. Cameron int *buff_size = NULL; 670350a0decfSStephen M. Cameron u64 temp64; 6704edd16368SStephen M. Cameron BYTE sg_used = 0; 6705edd16368SStephen M. Cameron int status = 0; 670601a02ffcSStephen M. Cameron u32 left; 670701a02ffcSStephen M. Cameron u32 sz; 6708edd16368SStephen M. Cameron BYTE __user *data_ptr; 6709edd16368SStephen M. Cameron 6710edd16368SStephen M. Cameron if (!argp) 6711edd16368SStephen M. Cameron return -EINVAL; 6712edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6713edd16368SStephen M. Cameron return -EPERM; 671419be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6715edd16368SStephen M. Cameron if (!ioc) { 6716edd16368SStephen M. Cameron status = -ENOMEM; 6717edd16368SStephen M. Cameron goto cleanup1; 6718edd16368SStephen M. Cameron } 6719edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6720edd16368SStephen M. Cameron status = -EFAULT; 6721edd16368SStephen M. Cameron goto cleanup1; 6722edd16368SStephen M. Cameron } 6723edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6724edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6725edd16368SStephen M. Cameron status = -EINVAL; 6726edd16368SStephen M. Cameron goto cleanup1; 6727edd16368SStephen M. Cameron } 6728edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6729edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6730edd16368SStephen M. Cameron status = -EINVAL; 6731edd16368SStephen M. Cameron goto cleanup1; 6732edd16368SStephen M. Cameron } 6733d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6734edd16368SStephen M. Cameron status = -EINVAL; 6735edd16368SStephen M. Cameron goto cleanup1; 6736edd16368SStephen M. Cameron } 6737d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6738edd16368SStephen M. Cameron if (!buff) { 6739edd16368SStephen M. Cameron status = -ENOMEM; 6740edd16368SStephen M. Cameron goto cleanup1; 6741edd16368SStephen M. Cameron } 6742d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6743edd16368SStephen M. Cameron if (!buff_size) { 6744edd16368SStephen M. Cameron status = -ENOMEM; 6745edd16368SStephen M. Cameron goto cleanup1; 6746edd16368SStephen M. Cameron } 6747edd16368SStephen M. Cameron left = ioc->buf_size; 6748edd16368SStephen M. Cameron data_ptr = ioc->buf; 6749edd16368SStephen M. Cameron while (left) { 6750edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6751edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6752edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6753edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6754edd16368SStephen M. Cameron status = -ENOMEM; 6755edd16368SStephen M. Cameron goto cleanup1; 6756edd16368SStephen M. Cameron } 67579233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6758edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 67590758f4f7SStephen M. Cameron status = -EFAULT; 6760edd16368SStephen M. Cameron goto cleanup1; 6761edd16368SStephen M. Cameron } 6762edd16368SStephen M. Cameron } else 6763edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6764edd16368SStephen M. Cameron left -= sz; 6765edd16368SStephen M. Cameron data_ptr += sz; 6766edd16368SStephen M. Cameron sg_used++; 6767edd16368SStephen M. Cameron } 676845fcb86eSStephen Cameron c = cmd_alloc(h); 6769bf43caf3SRobert Elliott 6770edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6771a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6772edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 677350a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 677450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6775edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6776edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6777edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6778edd16368SStephen M. Cameron int i; 6779edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 678050a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6781edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 678250a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 678350a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 678450a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 678550a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6786bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6787bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6788bcc48ffaSStephen M. Cameron status = -ENOMEM; 6789e2d4a1f6SStephen M. Cameron goto cleanup0; 6790bcc48ffaSStephen M. Cameron } 679150a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 679250a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 679350a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6794edd16368SStephen M. Cameron } 679550a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6796edd16368SStephen M. Cameron } 6797c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 67983fb134cbSDon Brace NO_TIMEOUT); 6799b03a7771SStephen M. Cameron if (sg_used) 6800edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6801edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 680225163bd5SWebb Scales if (status) { 680325163bd5SWebb Scales status = -EIO; 680425163bd5SWebb Scales goto cleanup0; 680525163bd5SWebb Scales } 680625163bd5SWebb Scales 6807edd16368SStephen M. Cameron /* Copy the error information out */ 6808edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6809edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6810edd16368SStephen M. Cameron status = -EFAULT; 6811e2d4a1f6SStephen M. Cameron goto cleanup0; 6812edd16368SStephen M. Cameron } 68139233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 68142b08b3e9SDon Brace int i; 68152b08b3e9SDon Brace 6816edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6817edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6818edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6819edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6820edd16368SStephen M. Cameron status = -EFAULT; 6821e2d4a1f6SStephen M. Cameron goto cleanup0; 6822edd16368SStephen M. Cameron } 6823edd16368SStephen M. Cameron ptr += buff_size[i]; 6824edd16368SStephen M. Cameron } 6825edd16368SStephen M. Cameron } 6826edd16368SStephen M. Cameron status = 0; 6827e2d4a1f6SStephen M. Cameron cleanup0: 682845fcb86eSStephen Cameron cmd_free(h, c); 6829edd16368SStephen M. Cameron cleanup1: 6830edd16368SStephen M. Cameron if (buff) { 68312b08b3e9SDon Brace int i; 68322b08b3e9SDon Brace 6833edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6834edd16368SStephen M. Cameron kfree(buff[i]); 6835edd16368SStephen M. Cameron kfree(buff); 6836edd16368SStephen M. Cameron } 6837edd16368SStephen M. Cameron kfree(buff_size); 6838edd16368SStephen M. Cameron kfree(ioc); 6839edd16368SStephen M. Cameron return status; 6840edd16368SStephen M. Cameron } 6841edd16368SStephen M. Cameron 6842edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6843edd16368SStephen M. Cameron struct CommandList *c) 6844edd16368SStephen M. Cameron { 6845edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6846edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6847edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6848edd16368SStephen M. Cameron } 68490390f0c0SStephen M. Cameron 6850edd16368SStephen M. Cameron /* 6851edd16368SStephen M. Cameron * ioctl 6852edd16368SStephen M. Cameron */ 685342a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6854edd16368SStephen M. Cameron { 6855edd16368SStephen M. Cameron struct ctlr_info *h; 6856edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 68570390f0c0SStephen M. Cameron int rc; 6858edd16368SStephen M. Cameron 6859edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6860edd16368SStephen M. Cameron 6861edd16368SStephen M. Cameron switch (cmd) { 6862edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6863edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6864edd16368SStephen M. Cameron case CCISS_REGNEWD: 6865a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6866edd16368SStephen M. Cameron return 0; 6867edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6868edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6869edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6870edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6871edd16368SStephen M. Cameron case CCISS_PASSTHRU: 687234f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68730390f0c0SStephen M. Cameron return -EAGAIN; 68740390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 687534f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68760390f0c0SStephen M. Cameron return rc; 6877edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 687834f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68790390f0c0SStephen M. Cameron return -EAGAIN; 68800390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 688134f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68820390f0c0SStephen M. Cameron return rc; 6883edd16368SStephen M. Cameron default: 6884edd16368SStephen M. Cameron return -ENOTTY; 6885edd16368SStephen M. Cameron } 6886edd16368SStephen M. Cameron } 6887edd16368SStephen M. Cameron 6888bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 68896f039790SGreg Kroah-Hartman u8 reset_type) 689064670ac8SStephen M. Cameron { 689164670ac8SStephen M. Cameron struct CommandList *c; 689264670ac8SStephen M. Cameron 689364670ac8SStephen M. Cameron c = cmd_alloc(h); 6894bf43caf3SRobert Elliott 6895a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6896a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 689764670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 689864670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 689964670ac8SStephen M. Cameron c->waiting = NULL; 690064670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 690164670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 690264670ac8SStephen M. Cameron * the command either. This is the last command we will send before 690364670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 690464670ac8SStephen M. Cameron */ 6905bf43caf3SRobert Elliott return; 690664670ac8SStephen M. Cameron } 690764670ac8SStephen M. Cameron 6908a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6909b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6910edd16368SStephen M. Cameron int cmd_type) 6911edd16368SStephen M. Cameron { 6912edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 69139b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6914edd16368SStephen M. Cameron 6915edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6916a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6917edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6918edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6919edd16368SStephen M. Cameron c->Header.SGList = 1; 692050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6921edd16368SStephen M. Cameron } else { 6922edd16368SStephen M. Cameron c->Header.SGList = 0; 692350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6924edd16368SStephen M. Cameron } 6925edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6926edd16368SStephen M. Cameron 6927edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6928edd16368SStephen M. Cameron switch (cmd) { 6929edd16368SStephen M. Cameron case HPSA_INQUIRY: 6930edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6931b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6932edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6933b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6934edd16368SStephen M. Cameron } 6935edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6936a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6937a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6938edd16368SStephen M. Cameron c->Request.Timeout = 0; 6939edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6940edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6941edd16368SStephen M. Cameron break; 6942edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6943edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6944edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6945edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6946edd16368SStephen M. Cameron */ 6947edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6948a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6949a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6950edd16368SStephen M. Cameron c->Request.Timeout = 0; 6951edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6952edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6953edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6954edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6955edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6956edd16368SStephen M. Cameron break; 6957c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6958c2adae44SScott Teel c->Request.CDBLen = 16; 6959c2adae44SScott Teel c->Request.type_attr_dir = 6960c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6961c2adae44SScott Teel c->Request.Timeout = 0; 6962c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6963c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6964c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6965c2adae44SScott Teel break; 6966c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6967c2adae44SScott Teel c->Request.CDBLen = 16; 6968c2adae44SScott Teel c->Request.type_attr_dir = 6969c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6970c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6971c2adae44SScott Teel c->Request.Timeout = 0; 6972c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6973c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6974c2adae44SScott Teel break; 6975edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6976edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6977a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6978a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6979a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6980edd16368SStephen M. Cameron c->Request.Timeout = 0; 6981edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6982edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6983bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6984bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6985edd16368SStephen M. Cameron break; 6986edd16368SStephen M. Cameron case TEST_UNIT_READY: 6987edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6988a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6989a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6990edd16368SStephen M. Cameron c->Request.Timeout = 0; 6991edd16368SStephen M. Cameron break; 6992283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6993283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6994a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6995a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6996283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6997283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6998283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6999283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 7000283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 7001283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 7002283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 7003283b4a9bSStephen M. Cameron break; 7004316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 7005316b221aSStephen M. Cameron c->Request.CDBLen = 10; 7006a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7007a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7008316b221aSStephen M. Cameron c->Request.Timeout = 0; 7009316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 7010316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 7011316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 7012316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 7013316b221aSStephen M. Cameron break; 701403383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 701503383736SDon Brace c->Request.CDBLen = 10; 701603383736SDon Brace c->Request.type_attr_dir = 701703383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 701803383736SDon Brace c->Request.Timeout = 0; 701903383736SDon Brace c->Request.CDB[0] = BMIC_READ; 702003383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 702103383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 702203383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 702303383736SDon Brace break; 7024d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7025d04e62b9SKevin Barnett c->Request.CDBLen = 10; 7026d04e62b9SKevin Barnett c->Request.type_attr_dir = 7027d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7028d04e62b9SKevin Barnett c->Request.Timeout = 0; 7029d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 7030d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7031d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 7032d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 7033d04e62b9SKevin Barnett break; 7034cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 7035cca8f13bSDon Brace c->Request.CDBLen = 10; 7036cca8f13bSDon Brace c->Request.type_attr_dir = 7037cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7038cca8f13bSDon Brace c->Request.Timeout = 0; 7039cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 7040cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7041cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 7042cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 7043cca8f13bSDon Brace break; 704466749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 704566749d0dSScott Teel c->Request.CDBLen = 10; 704666749d0dSScott Teel c->Request.type_attr_dir = 704766749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 704866749d0dSScott Teel c->Request.Timeout = 0; 704966749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 705066749d0dSScott Teel c->Request.CDB[1] = 0; 705166749d0dSScott Teel c->Request.CDB[2] = 0; 705266749d0dSScott Teel c->Request.CDB[3] = 0; 705366749d0dSScott Teel c->Request.CDB[4] = 0; 705466749d0dSScott Teel c->Request.CDB[5] = 0; 705566749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 705666749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 705766749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 705866749d0dSScott Teel c->Request.CDB[9] = 0; 705966749d0dSScott Teel break; 7060edd16368SStephen M. Cameron default: 7061edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7062edd16368SStephen M. Cameron BUG(); 7063a2dac136SStephen M. Cameron return -1; 7064edd16368SStephen M. Cameron } 7065edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 7066edd16368SStephen M. Cameron switch (cmd) { 7067edd16368SStephen M. Cameron 70680b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 70690b9b7b6eSScott Teel c->Request.CDBLen = 16; 70700b9b7b6eSScott Teel c->Request.type_attr_dir = 70710b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 70720b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 70730b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 70740b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 70750b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 70760b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 70770b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 70780b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 70790b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 70800b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 70810b9b7b6eSScott Teel break; 7082edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 7083edd16368SStephen M. Cameron c->Request.CDBLen = 16; 7084a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7085a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7086edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 708764670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 708864670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 708921e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7090edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 7091edd16368SStephen M. Cameron /* LunID device */ 7092edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 7093edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 7094edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 7095edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 7096edd16368SStephen M. Cameron break; 709775167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 70989b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 70992b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 71009b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 71019b5c48c2SStephen Cameron tag, c->Header.tag); 710275167d2cSStephen M. Cameron c->Request.CDBLen = 16; 7103a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7104a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 7105a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 710675167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 710775167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 710875167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 710975167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 711075167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 711175167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 71129b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 711375167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 711475167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 711575167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 711675167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 711775167d2cSStephen M. Cameron break; 7118edd16368SStephen M. Cameron default: 7119edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 7120edd16368SStephen M. Cameron cmd); 7121edd16368SStephen M. Cameron BUG(); 7122edd16368SStephen M. Cameron } 7123edd16368SStephen M. Cameron } else { 7124edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7125edd16368SStephen M. Cameron BUG(); 7126edd16368SStephen M. Cameron } 7127edd16368SStephen M. Cameron 7128a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 7129edd16368SStephen M. Cameron case XFER_READ: 7130edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 7131edd16368SStephen M. Cameron break; 7132edd16368SStephen M. Cameron case XFER_WRITE: 7133edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 7134edd16368SStephen M. Cameron break; 7135edd16368SStephen M. Cameron case XFER_NONE: 7136edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 7137edd16368SStephen M. Cameron break; 7138edd16368SStephen M. Cameron default: 7139edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7140edd16368SStephen M. Cameron } 7141a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7142a2dac136SStephen M. Cameron return -1; 7143a2dac136SStephen M. Cameron return 0; 7144edd16368SStephen M. Cameron } 7145edd16368SStephen M. Cameron 7146edd16368SStephen M. Cameron /* 7147edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7148edd16368SStephen M. Cameron */ 7149edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7150edd16368SStephen M. Cameron { 7151edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7152edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7153088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7154088ba34cSStephen M. Cameron page_offs + size); 7155edd16368SStephen M. Cameron 7156edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7157edd16368SStephen M. Cameron } 7158edd16368SStephen M. Cameron 7159254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7160edd16368SStephen M. Cameron { 7161254f796bSMatt Gates return h->access.command_completed(h, q); 7162edd16368SStephen M. Cameron } 7163edd16368SStephen M. Cameron 7164900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7165edd16368SStephen M. Cameron { 7166edd16368SStephen M. Cameron return h->access.intr_pending(h); 7167edd16368SStephen M. Cameron } 7168edd16368SStephen M. Cameron 7169edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7170edd16368SStephen M. Cameron { 717110f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 717210f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7173edd16368SStephen M. Cameron } 7174edd16368SStephen M. Cameron 717501a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 717601a02ffcSStephen M. Cameron u32 raw_tag) 7177edd16368SStephen M. Cameron { 7178edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7179edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7180edd16368SStephen M. Cameron return 1; 7181edd16368SStephen M. Cameron } 7182edd16368SStephen M. Cameron return 0; 7183edd16368SStephen M. Cameron } 7184edd16368SStephen M. Cameron 71855a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7186edd16368SStephen M. Cameron { 7187e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7188c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7189c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 71901fb011fbSStephen M. Cameron complete_scsi_command(c); 71918be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7192edd16368SStephen M. Cameron complete(c->waiting); 7193a104c99fSStephen M. Cameron } 7194a104c99fSStephen M. Cameron 7195303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 71961d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7197303932fdSDon Brace u32 raw_tag) 7198303932fdSDon Brace { 7199303932fdSDon Brace u32 tag_index; 7200303932fdSDon Brace struct CommandList *c; 7201303932fdSDon Brace 7202f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 72031d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7204303932fdSDon Brace c = h->cmd_pool + tag_index; 72055a3d16f5SStephen M. Cameron finish_cmd(c); 72061d94f94dSStephen M. Cameron } 7207303932fdSDon Brace } 7208303932fdSDon Brace 720964670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 721064670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 721164670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 721264670ac8SStephen M. Cameron * functions. 721364670ac8SStephen M. Cameron */ 721464670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 721564670ac8SStephen M. Cameron { 721664670ac8SStephen M. Cameron if (likely(!reset_devices)) 721764670ac8SStephen M. Cameron return 0; 721864670ac8SStephen M. Cameron 721964670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 722064670ac8SStephen M. Cameron return 0; 722164670ac8SStephen M. Cameron 722264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 722364670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 722464670ac8SStephen M. Cameron 722564670ac8SStephen M. Cameron return 1; 722664670ac8SStephen M. Cameron } 722764670ac8SStephen M. Cameron 7228254f796bSMatt Gates /* 7229254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7230254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7231254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7232254f796bSMatt Gates */ 7233254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 723464670ac8SStephen M. Cameron { 7235254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7236254f796bSMatt Gates } 7237254f796bSMatt Gates 7238254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7239254f796bSMatt Gates { 7240254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7241254f796bSMatt Gates u8 q = *(u8 *) queue; 724264670ac8SStephen M. Cameron u32 raw_tag; 724364670ac8SStephen M. Cameron 724464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 724564670ac8SStephen M. Cameron return IRQ_NONE; 724664670ac8SStephen M. Cameron 724764670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 724864670ac8SStephen M. Cameron return IRQ_NONE; 7249a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 725064670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7251254f796bSMatt Gates raw_tag = get_next_completion(h, q); 725264670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7253254f796bSMatt Gates raw_tag = next_command(h, q); 725464670ac8SStephen M. Cameron } 725564670ac8SStephen M. Cameron return IRQ_HANDLED; 725664670ac8SStephen M. Cameron } 725764670ac8SStephen M. Cameron 7258254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 725964670ac8SStephen M. Cameron { 7260254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 726164670ac8SStephen M. Cameron u32 raw_tag; 7262254f796bSMatt Gates u8 q = *(u8 *) queue; 726364670ac8SStephen M. Cameron 726464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 726564670ac8SStephen M. Cameron return IRQ_NONE; 726664670ac8SStephen M. Cameron 7267a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7268254f796bSMatt Gates raw_tag = get_next_completion(h, q); 726964670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7270254f796bSMatt Gates raw_tag = next_command(h, q); 727164670ac8SStephen M. Cameron return IRQ_HANDLED; 727264670ac8SStephen M. Cameron } 727364670ac8SStephen M. Cameron 7274254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7275edd16368SStephen M. Cameron { 7276254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7277303932fdSDon Brace u32 raw_tag; 7278254f796bSMatt Gates u8 q = *(u8 *) queue; 7279edd16368SStephen M. Cameron 7280edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7281edd16368SStephen M. Cameron return IRQ_NONE; 7282a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 728310f66018SStephen M. Cameron while (interrupt_pending(h)) { 7284254f796bSMatt Gates raw_tag = get_next_completion(h, q); 728510f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 72861d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7287254f796bSMatt Gates raw_tag = next_command(h, q); 728810f66018SStephen M. Cameron } 728910f66018SStephen M. Cameron } 729010f66018SStephen M. Cameron return IRQ_HANDLED; 729110f66018SStephen M. Cameron } 729210f66018SStephen M. Cameron 7293254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 729410f66018SStephen M. Cameron { 7295254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 729610f66018SStephen M. Cameron u32 raw_tag; 7297254f796bSMatt Gates u8 q = *(u8 *) queue; 729810f66018SStephen M. Cameron 7299a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7300254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7301303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 73021d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7303254f796bSMatt Gates raw_tag = next_command(h, q); 7304edd16368SStephen M. Cameron } 7305edd16368SStephen M. Cameron return IRQ_HANDLED; 7306edd16368SStephen M. Cameron } 7307edd16368SStephen M. Cameron 7308a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7309a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7310a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7311a9a3a273SStephen M. Cameron */ 73126f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7313edd16368SStephen M. Cameron unsigned char type) 7314edd16368SStephen M. Cameron { 7315edd16368SStephen M. Cameron struct Command { 7316edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7317edd16368SStephen M. Cameron struct RequestBlock Request; 7318edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7319edd16368SStephen M. Cameron }; 7320edd16368SStephen M. Cameron struct Command *cmd; 7321edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7322edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7323edd16368SStephen M. Cameron dma_addr_t paddr64; 73242b08b3e9SDon Brace __le32 paddr32; 73252b08b3e9SDon Brace u32 tag; 7326edd16368SStephen M. Cameron void __iomem *vaddr; 7327edd16368SStephen M. Cameron int i, err; 7328edd16368SStephen M. Cameron 7329edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7330edd16368SStephen M. Cameron if (vaddr == NULL) 7331edd16368SStephen M. Cameron return -ENOMEM; 7332edd16368SStephen M. Cameron 7333edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7334edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7335edd16368SStephen M. Cameron * memory. 7336edd16368SStephen M. Cameron */ 7337edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7338edd16368SStephen M. Cameron if (err) { 7339edd16368SStephen M. Cameron iounmap(vaddr); 73401eaec8f3SRobert Elliott return err; 7341edd16368SStephen M. Cameron } 7342edd16368SStephen M. Cameron 7343edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7344edd16368SStephen M. Cameron if (cmd == NULL) { 7345edd16368SStephen M. Cameron iounmap(vaddr); 7346edd16368SStephen M. Cameron return -ENOMEM; 7347edd16368SStephen M. Cameron } 7348edd16368SStephen M. Cameron 7349edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7350edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7351edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7352edd16368SStephen M. Cameron */ 73532b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7354edd16368SStephen M. Cameron 7355edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7356edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 735750a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 73582b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7359edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7360edd16368SStephen M. Cameron 7361edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7362a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7363a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7364edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7365edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7366edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7367edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 736850a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 73692b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 737050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7371edd16368SStephen M. Cameron 73722b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7373edd16368SStephen M. Cameron 7374edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7375edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 73762b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7377edd16368SStephen M. Cameron break; 7378edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7379edd16368SStephen M. Cameron } 7380edd16368SStephen M. Cameron 7381edd16368SStephen M. Cameron iounmap(vaddr); 7382edd16368SStephen M. Cameron 7383edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7384edd16368SStephen M. Cameron * still complete the command. 7385edd16368SStephen M. Cameron */ 7386edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7387edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7388edd16368SStephen M. Cameron opcode, type); 7389edd16368SStephen M. Cameron return -ETIMEDOUT; 7390edd16368SStephen M. Cameron } 7391edd16368SStephen M. Cameron 7392edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7393edd16368SStephen M. Cameron 7394edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7395edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7396edd16368SStephen M. Cameron opcode, type); 7397edd16368SStephen M. Cameron return -EIO; 7398edd16368SStephen M. Cameron } 7399edd16368SStephen M. Cameron 7400edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7401edd16368SStephen M. Cameron opcode, type); 7402edd16368SStephen M. Cameron return 0; 7403edd16368SStephen M. Cameron } 7404edd16368SStephen M. Cameron 7405edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7406edd16368SStephen M. Cameron 74071df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 740842a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7409edd16368SStephen M. Cameron { 7410edd16368SStephen M. Cameron 74111df8552aSStephen M. Cameron if (use_doorbell) { 74121df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 74131df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 74141df8552aSStephen M. Cameron * other way using the doorbell register. 7415edd16368SStephen M. Cameron */ 74161df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7417cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 741885009239SStephen M. Cameron 741900701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 742085009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 742185009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 742285009239SStephen M. Cameron * over in some weird corner cases. 742385009239SStephen M. Cameron */ 742400701a96SJustin Lindley msleep(10000); 74251df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7426edd16368SStephen M. Cameron 7427edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7428edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7429edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7430edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 74311df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 74321df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 74331df8552aSStephen M. Cameron * controller." */ 7434edd16368SStephen M. Cameron 74352662cab8SDon Brace int rc = 0; 74362662cab8SDon Brace 74371df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 74382662cab8SDon Brace 7439edd16368SStephen M. Cameron /* enter the D3hot power management state */ 74402662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 74412662cab8SDon Brace if (rc) 74422662cab8SDon Brace return rc; 7443edd16368SStephen M. Cameron 7444edd16368SStephen M. Cameron msleep(500); 7445edd16368SStephen M. Cameron 7446edd16368SStephen M. Cameron /* enter the D0 power management state */ 74472662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 74482662cab8SDon Brace if (rc) 74492662cab8SDon Brace return rc; 7450c4853efeSMike Miller 7451c4853efeSMike Miller /* 7452c4853efeSMike Miller * The P600 requires a small delay when changing states. 7453c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7454c4853efeSMike Miller * This for kdump only and is particular to the P600. 7455c4853efeSMike Miller */ 7456c4853efeSMike Miller msleep(500); 74571df8552aSStephen M. Cameron } 74581df8552aSStephen M. Cameron return 0; 74591df8552aSStephen M. Cameron } 74601df8552aSStephen M. Cameron 74616f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7462580ada3cSStephen M. Cameron { 7463580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7464f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7465580ada3cSStephen M. Cameron } 7466580ada3cSStephen M. Cameron 74676f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7468580ada3cSStephen M. Cameron { 7469580ada3cSStephen M. Cameron char *driver_version; 7470580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7471580ada3cSStephen M. Cameron 7472580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7473580ada3cSStephen M. Cameron if (!driver_version) 7474580ada3cSStephen M. Cameron return -ENOMEM; 7475580ada3cSStephen M. Cameron 7476580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7477580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7478580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7479580ada3cSStephen M. Cameron kfree(driver_version); 7480580ada3cSStephen M. Cameron return 0; 7481580ada3cSStephen M. Cameron } 7482580ada3cSStephen M. Cameron 74836f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 74846f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7485580ada3cSStephen M. Cameron { 7486580ada3cSStephen M. Cameron int i; 7487580ada3cSStephen M. Cameron 7488580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7489580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7490580ada3cSStephen M. Cameron } 7491580ada3cSStephen M. Cameron 74926f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7493580ada3cSStephen M. Cameron { 7494580ada3cSStephen M. Cameron 7495580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7496580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7497580ada3cSStephen M. Cameron 7498580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7499580ada3cSStephen M. Cameron if (!old_driver_ver) 7500580ada3cSStephen M. Cameron return -ENOMEM; 7501580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7502580ada3cSStephen M. Cameron 7503580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7504580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7505580ada3cSStephen M. Cameron */ 7506580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7507580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7508580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7509580ada3cSStephen M. Cameron kfree(old_driver_ver); 7510580ada3cSStephen M. Cameron return rc; 7511580ada3cSStephen M. Cameron } 75121df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 75131df8552aSStephen M. Cameron * states or the using the doorbell register. 75141df8552aSStephen M. Cameron */ 75156b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 75161df8552aSStephen M. Cameron { 75171df8552aSStephen M. Cameron u64 cfg_offset; 75181df8552aSStephen M. Cameron u32 cfg_base_addr; 75191df8552aSStephen M. Cameron u64 cfg_base_addr_index; 75201df8552aSStephen M. Cameron void __iomem *vaddr; 75211df8552aSStephen M. Cameron unsigned long paddr; 7522580ada3cSStephen M. Cameron u32 misc_fw_support; 7523270d05deSStephen M. Cameron int rc; 75241df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7525cf0b08d0SStephen M. Cameron u32 use_doorbell; 7526270d05deSStephen M. Cameron u16 command_register; 75271df8552aSStephen M. Cameron 75281df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 75291df8552aSStephen M. Cameron * the same thing as 75301df8552aSStephen M. Cameron * 75311df8552aSStephen M. Cameron * pci_save_state(pci_dev); 75321df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 75331df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 75341df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 75351df8552aSStephen M. Cameron * 75361df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 75371df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 75381df8552aSStephen M. Cameron * using the doorbell register. 75391df8552aSStephen M. Cameron */ 754018867659SStephen M. Cameron 754160f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 754260f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 754325c1e56aSStephen M. Cameron return -ENODEV; 754425c1e56aSStephen M. Cameron } 754546380786SStephen M. Cameron 754646380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 754746380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 754846380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 754918867659SStephen M. Cameron 7550270d05deSStephen M. Cameron /* Save the PCI command register */ 7551270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7552270d05deSStephen M. Cameron pci_save_state(pdev); 75531df8552aSStephen M. Cameron 75541df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 75551df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 75561df8552aSStephen M. Cameron if (rc) 75571df8552aSStephen M. Cameron return rc; 75581df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 75591df8552aSStephen M. Cameron if (!vaddr) 75601df8552aSStephen M. Cameron return -ENOMEM; 75611df8552aSStephen M. Cameron 75621df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 75631df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 75641df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 75651df8552aSStephen M. Cameron if (rc) 75661df8552aSStephen M. Cameron goto unmap_vaddr; 75671df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 75681df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 75691df8552aSStephen M. Cameron if (!cfgtable) { 75701df8552aSStephen M. Cameron rc = -ENOMEM; 75711df8552aSStephen M. Cameron goto unmap_vaddr; 75721df8552aSStephen M. Cameron } 7573580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7574580ada3cSStephen M. Cameron if (rc) 757503741d95STomas Henzl goto unmap_cfgtable; 75761df8552aSStephen M. Cameron 7577cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7578cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7579cf0b08d0SStephen M. Cameron */ 75801df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7581cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7582cf0b08d0SStephen M. Cameron if (use_doorbell) { 7583cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7584cf0b08d0SStephen M. Cameron } else { 75851df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7586cf0b08d0SStephen M. Cameron if (use_doorbell) { 7587050f7147SStephen Cameron dev_warn(&pdev->dev, 7588050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 758964670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7590cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7591cf0b08d0SStephen M. Cameron } 7592cf0b08d0SStephen M. Cameron } 75931df8552aSStephen M. Cameron 75941df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 75951df8552aSStephen M. Cameron if (rc) 75961df8552aSStephen M. Cameron goto unmap_cfgtable; 7597edd16368SStephen M. Cameron 7598270d05deSStephen M. Cameron pci_restore_state(pdev); 7599270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7600edd16368SStephen M. Cameron 76011df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 76021df8552aSStephen M. Cameron need a little pause here */ 76031df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 76041df8552aSStephen M. Cameron 7605fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7606fe5389c8SStephen M. Cameron if (rc) { 7607fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7608050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7609fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7610fe5389c8SStephen M. Cameron } 7611fe5389c8SStephen M. Cameron 7612580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7613580ada3cSStephen M. Cameron if (rc < 0) 7614580ada3cSStephen M. Cameron goto unmap_cfgtable; 7615580ada3cSStephen M. Cameron if (rc) { 761664670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 761764670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 761864670ac8SStephen M. Cameron rc = -ENOTSUPP; 7619580ada3cSStephen M. Cameron } else { 762064670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 76211df8552aSStephen M. Cameron } 76221df8552aSStephen M. Cameron 76231df8552aSStephen M. Cameron unmap_cfgtable: 76241df8552aSStephen M. Cameron iounmap(cfgtable); 76251df8552aSStephen M. Cameron 76261df8552aSStephen M. Cameron unmap_vaddr: 76271df8552aSStephen M. Cameron iounmap(vaddr); 76281df8552aSStephen M. Cameron return rc; 7629edd16368SStephen M. Cameron } 7630edd16368SStephen M. Cameron 7631edd16368SStephen M. Cameron /* 7632edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7633edd16368SStephen M. Cameron * the io functions. 7634edd16368SStephen M. Cameron * This is for debug only. 7635edd16368SStephen M. Cameron */ 763642a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7637edd16368SStephen M. Cameron { 763858f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7639edd16368SStephen M. Cameron int i; 7640edd16368SStephen M. Cameron char temp_name[17]; 7641edd16368SStephen M. Cameron 7642edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7643edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7644edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7645edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7646edd16368SStephen M. Cameron temp_name[4] = '\0'; 7647edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7648edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7649edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7650edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7651edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7652edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7653edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7654edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7655edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7656edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7657edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7658edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 765969d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7660edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7661edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7662edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7663edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7664edd16368SStephen M. Cameron temp_name[16] = '\0'; 7665edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7666edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7667edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7668edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 766958f8665cSStephen M. Cameron } 7670edd16368SStephen M. Cameron 7671edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7672edd16368SStephen M. Cameron { 7673edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7674edd16368SStephen M. Cameron 7675edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7676edd16368SStephen M. Cameron return 0; 7677edd16368SStephen M. Cameron offset = 0; 7678edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7679edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7680edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7681edd16368SStephen M. Cameron offset += 4; 7682edd16368SStephen M. Cameron else { 7683edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7684edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7685edd16368SStephen M. Cameron switch (mem_type) { 7686edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7687edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7688edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7689edd16368SStephen M. Cameron break; 7690edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7691edd16368SStephen M. Cameron offset += 8; 7692edd16368SStephen M. Cameron break; 7693edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7694edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7695edd16368SStephen M. Cameron "base address is invalid\n"); 7696edd16368SStephen M. Cameron return -1; 7697edd16368SStephen M. Cameron break; 7698edd16368SStephen M. Cameron } 7699edd16368SStephen M. Cameron } 7700edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7701edd16368SStephen M. Cameron return i + 1; 7702edd16368SStephen M. Cameron } 7703edd16368SStephen M. Cameron return -1; 7704edd16368SStephen M. Cameron } 7705edd16368SStephen M. Cameron 7706cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7707cc64c817SRobert Elliott { 7708bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7709bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7710cc64c817SRobert Elliott } 7711cc64c817SRobert Elliott 7712edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7713050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7714edd16368SStephen M. Cameron */ 7715bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7716edd16368SStephen M. Cameron { 7717bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7718bc2bb154SChristoph Hellwig int ret; 7719edd16368SStephen M. Cameron 7720edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7721bc2bb154SChristoph Hellwig switch (h->board_id) { 7722bc2bb154SChristoph Hellwig case 0x40700E11: 7723bc2bb154SChristoph Hellwig case 0x40800E11: 7724bc2bb154SChristoph Hellwig case 0x40820E11: 7725bc2bb154SChristoph Hellwig case 0x40830E11: 7726bc2bb154SChristoph Hellwig break; 7727bc2bb154SChristoph Hellwig default: 7728bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7729bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7730bc2bb154SChristoph Hellwig if (ret > 0) { 7731bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7732bc2bb154SChristoph Hellwig return 0; 7733eee0f03aSHannes Reinecke } 7734bc2bb154SChristoph Hellwig 7735bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7736bc2bb154SChristoph Hellwig break; 7737edd16368SStephen M. Cameron } 7738bc2bb154SChristoph Hellwig 7739bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7740bc2bb154SChristoph Hellwig if (ret < 0) 7741bc2bb154SChristoph Hellwig return ret; 7742bc2bb154SChristoph Hellwig return 0; 7743edd16368SStephen M. Cameron } 7744edd16368SStephen M. Cameron 77456f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7746e5c880d1SStephen M. Cameron { 7747e5c880d1SStephen M. Cameron int i; 7748e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7749e5c880d1SStephen M. Cameron 7750e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7751e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7752e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7753e5c880d1SStephen M. Cameron subsystem_vendor_id; 7754e5c880d1SStephen M. Cameron 7755e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7756e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7757e5c880d1SStephen M. Cameron return i; 7758e5c880d1SStephen M. Cameron 77596798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 77606798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 77616798cc0aSStephen M. Cameron !hpsa_allow_any) { 7762e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7763e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7764e5c880d1SStephen M. Cameron return -ENODEV; 7765e5c880d1SStephen M. Cameron } 7766e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7767e5c880d1SStephen M. Cameron } 7768e5c880d1SStephen M. Cameron 77696f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 77703a7774ceSStephen M. Cameron unsigned long *memory_bar) 77713a7774ceSStephen M. Cameron { 77723a7774ceSStephen M. Cameron int i; 77733a7774ceSStephen M. Cameron 77743a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 777512d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 77763a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 777712d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 777812d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 77793a7774ceSStephen M. Cameron *memory_bar); 77803a7774ceSStephen M. Cameron return 0; 77813a7774ceSStephen M. Cameron } 778212d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 77833a7774ceSStephen M. Cameron return -ENODEV; 77843a7774ceSStephen M. Cameron } 77853a7774ceSStephen M. Cameron 77866f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 77876f039790SGreg Kroah-Hartman int wait_for_ready) 77882c4c8c8bSStephen M. Cameron { 7789fe5389c8SStephen M. Cameron int i, iterations; 77902c4c8c8bSStephen M. Cameron u32 scratchpad; 7791fe5389c8SStephen M. Cameron if (wait_for_ready) 7792fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7793fe5389c8SStephen M. Cameron else 7794fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 77952c4c8c8bSStephen M. Cameron 7796fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7797fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7798fe5389c8SStephen M. Cameron if (wait_for_ready) { 77992c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 78002c4c8c8bSStephen M. Cameron return 0; 7801fe5389c8SStephen M. Cameron } else { 7802fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7803fe5389c8SStephen M. Cameron return 0; 7804fe5389c8SStephen M. Cameron } 78052c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 78062c4c8c8bSStephen M. Cameron } 7807fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 78082c4c8c8bSStephen M. Cameron return -ENODEV; 78092c4c8c8bSStephen M. Cameron } 78102c4c8c8bSStephen M. Cameron 78116f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 78126f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7813a51fd47fSStephen M. Cameron u64 *cfg_offset) 7814a51fd47fSStephen M. Cameron { 7815a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7816a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7817a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7818a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7819a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7820a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7821a51fd47fSStephen M. Cameron return -ENODEV; 7822a51fd47fSStephen M. Cameron } 7823a51fd47fSStephen M. Cameron return 0; 7824a51fd47fSStephen M. Cameron } 7825a51fd47fSStephen M. Cameron 7826195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7827195f2c65SRobert Elliott { 7828105a3dbcSRobert Elliott if (h->transtable) { 7829195f2c65SRobert Elliott iounmap(h->transtable); 7830105a3dbcSRobert Elliott h->transtable = NULL; 7831105a3dbcSRobert Elliott } 7832105a3dbcSRobert Elliott if (h->cfgtable) { 7833195f2c65SRobert Elliott iounmap(h->cfgtable); 7834105a3dbcSRobert Elliott h->cfgtable = NULL; 7835105a3dbcSRobert Elliott } 7836195f2c65SRobert Elliott } 7837195f2c65SRobert Elliott 7838195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7839195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7840195f2c65SRobert Elliott + * */ 78416f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7842edd16368SStephen M. Cameron { 784301a02ffcSStephen M. Cameron u64 cfg_offset; 784401a02ffcSStephen M. Cameron u32 cfg_base_addr; 784501a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7846303932fdSDon Brace u32 trans_offset; 7847a51fd47fSStephen M. Cameron int rc; 784877c4495cSStephen M. Cameron 7849a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7850a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7851a51fd47fSStephen M. Cameron if (rc) 7852a51fd47fSStephen M. Cameron return rc; 785377c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7854a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7855cd3c81c4SRobert Elliott if (!h->cfgtable) { 7856cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 785777c4495cSStephen M. Cameron return -ENOMEM; 7858cd3c81c4SRobert Elliott } 7859580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7860580ada3cSStephen M. Cameron if (rc) 7861580ada3cSStephen M. Cameron return rc; 786277c4495cSStephen M. Cameron /* Find performant mode table. */ 7863a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 786477c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 786577c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 786677c4495cSStephen M. Cameron sizeof(*h->transtable)); 7867195f2c65SRobert Elliott if (!h->transtable) { 7868195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7869195f2c65SRobert Elliott hpsa_free_cfgtables(h); 787077c4495cSStephen M. Cameron return -ENOMEM; 7871195f2c65SRobert Elliott } 787277c4495cSStephen M. Cameron return 0; 787377c4495cSStephen M. Cameron } 787477c4495cSStephen M. Cameron 78756f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7876cba3d38bSStephen M. Cameron { 787741ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 787841ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 787941ce4c35SStephen Cameron 788041ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 788172ceeaecSStephen M. Cameron 788272ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 788372ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 788472ceeaecSStephen M. Cameron h->max_commands = 32; 788572ceeaecSStephen M. Cameron 788641ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 788741ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 788841ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 788941ce4c35SStephen Cameron h->max_commands, 789041ce4c35SStephen Cameron MIN_MAX_COMMANDS); 789141ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7892cba3d38bSStephen M. Cameron } 7893cba3d38bSStephen M. Cameron } 7894cba3d38bSStephen M. Cameron 7895c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7896c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7897c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7898c7ee65b3SWebb Scales */ 7899c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7900c7ee65b3SWebb Scales { 7901c7ee65b3SWebb Scales return h->maxsgentries > 512; 7902c7ee65b3SWebb Scales } 7903c7ee65b3SWebb Scales 7904b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7905b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7906b93d7536SStephen M. Cameron * SG chain block size, etc. 7907b93d7536SStephen M. Cameron */ 79086f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7909b93d7536SStephen M. Cameron { 7910cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 791145fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7912b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7913283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7914c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7915c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7916b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 79171a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7918b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7919b93d7536SStephen M. Cameron } else { 7920c7ee65b3SWebb Scales /* 7921c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7922c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7923c7ee65b3SWebb Scales * would lock up the controller) 7924c7ee65b3SWebb Scales */ 7925c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 79261a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7927c7ee65b3SWebb Scales h->chainsize = 0; 7928b93d7536SStephen M. Cameron } 792975167d2cSStephen M. Cameron 793075167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 793175167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 79320e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 79330e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 79340e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 79350e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 79368be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 79378be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7938b93d7536SStephen M. Cameron } 7939b93d7536SStephen M. Cameron 794076c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 794176c46e49SStephen M. Cameron { 79420fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7943050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 794476c46e49SStephen M. Cameron return false; 794576c46e49SStephen M. Cameron } 794676c46e49SStephen M. Cameron return true; 794776c46e49SStephen M. Cameron } 794876c46e49SStephen M. Cameron 794997a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7950f7c39101SStephen M. Cameron { 795197a5e98cSStephen M. Cameron u32 driver_support; 7952f7c39101SStephen M. Cameron 795397a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 79540b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 79550b9e7b74SArnd Bergmann #ifdef CONFIG_X86 795697a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7957f7c39101SStephen M. Cameron #endif 795828e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 795928e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7960f7c39101SStephen M. Cameron } 7961f7c39101SStephen M. Cameron 79623d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 79633d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 79643d0eab67SStephen M. Cameron */ 79653d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 79663d0eab67SStephen M. Cameron { 79673d0eab67SStephen M. Cameron u32 dma_prefetch; 79683d0eab67SStephen M. Cameron 79693d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 79703d0eab67SStephen M. Cameron return; 79713d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 79723d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 79733d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 79743d0eab67SStephen M. Cameron } 79753d0eab67SStephen M. Cameron 7976c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 797776438d08SStephen M. Cameron { 797876438d08SStephen M. Cameron int i; 797976438d08SStephen M. Cameron u32 doorbell_value; 798076438d08SStephen M. Cameron unsigned long flags; 798176438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7982007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 798376438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 798476438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 798576438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 798676438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7987c706a795SRobert Elliott goto done; 798876438d08SStephen M. Cameron /* delay and try again */ 7989007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 799076438d08SStephen M. Cameron } 7991c706a795SRobert Elliott return -ENODEV; 7992c706a795SRobert Elliott done: 7993c706a795SRobert Elliott return 0; 799476438d08SStephen M. Cameron } 799576438d08SStephen M. Cameron 7996c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7997eb6b2ae9SStephen M. Cameron { 7998eb6b2ae9SStephen M. Cameron int i; 79996eaf46fdSStephen M. Cameron u32 doorbell_value; 80006eaf46fdSStephen M. Cameron unsigned long flags; 8001eb6b2ae9SStephen M. Cameron 8002eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 8003eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 8004eb6b2ae9SStephen M. Cameron * as we enter this code.) 8005eb6b2ae9SStephen M. Cameron */ 8006007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 800725163bd5SWebb Scales if (h->remove_in_progress) 800825163bd5SWebb Scales goto done; 80096eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 80106eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 80116eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8012382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 8013c706a795SRobert Elliott goto done; 8014eb6b2ae9SStephen M. Cameron /* delay and try again */ 8015007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 8016eb6b2ae9SStephen M. Cameron } 8017c706a795SRobert Elliott return -ENODEV; 8018c706a795SRobert Elliott done: 8019c706a795SRobert Elliott return 0; 80203f4336f3SStephen M. Cameron } 80213f4336f3SStephen M. Cameron 8022c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 80236f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 80243f4336f3SStephen M. Cameron { 80253f4336f3SStephen M. Cameron u32 trans_support; 80263f4336f3SStephen M. Cameron 80273f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 80283f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 80293f4336f3SStephen M. Cameron return -ENOTSUPP; 80303f4336f3SStephen M. Cameron 80313f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8032283b4a9bSStephen M. Cameron 80333f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 80343f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8035b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 80363f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8037c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 8038c706a795SRobert Elliott goto error; 8039eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 8040283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8041283b4a9bSStephen M. Cameron goto error; 8042960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 8043eb6b2ae9SStephen M. Cameron return 0; 8044283b4a9bSStephen M. Cameron error: 8045050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8046283b4a9bSStephen M. Cameron return -ENODEV; 8047eb6b2ae9SStephen M. Cameron } 8048eb6b2ae9SStephen M. Cameron 8049195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 8050195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 8051195f2c65SRobert Elliott { 8052195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 8053195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 8054105a3dbcSRobert Elliott h->vaddr = NULL; 8055195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8056943a7021SRobert Elliott /* 8057943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8058943a7021SRobert Elliott * Documentation/PCI/pci.txt 8059943a7021SRobert Elliott */ 8060195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 8061943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 8062195f2c65SRobert Elliott } 8063195f2c65SRobert Elliott 8064195f2c65SRobert Elliott /* several items must be freed later */ 80656f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 806677c4495cSStephen M. Cameron { 8067eb6b2ae9SStephen M. Cameron int prod_index, err; 8068edd16368SStephen M. Cameron 8069e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8070e5c880d1SStephen M. Cameron if (prod_index < 0) 807160f923b9SRobert Elliott return prod_index; 8072e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 8073e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 8074e5c880d1SStephen M. Cameron 80759b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 80769b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 80779b5c48c2SStephen Cameron 8078e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8079e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8080e5a44df8SMatthew Garrett 808155c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 8082edd16368SStephen M. Cameron if (err) { 8083195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8084943a7021SRobert Elliott pci_disable_device(h->pdev); 8085edd16368SStephen M. Cameron return err; 8086edd16368SStephen M. Cameron } 8087edd16368SStephen M. Cameron 8088f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 8089edd16368SStephen M. Cameron if (err) { 809055c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 8091195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 8092943a7021SRobert Elliott pci_disable_device(h->pdev); 8093943a7021SRobert Elliott return err; 8094edd16368SStephen M. Cameron } 80954fa604e1SRobert Elliott 80964fa604e1SRobert Elliott pci_set_master(h->pdev); 80974fa604e1SRobert Elliott 8098bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 8099bc2bb154SChristoph Hellwig if (err) 8100bc2bb154SChristoph Hellwig goto clean1; 810112d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 81023a7774ceSStephen M. Cameron if (err) 8103195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8104edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 8105204892e9SStephen M. Cameron if (!h->vaddr) { 8106195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8107204892e9SStephen M. Cameron err = -ENOMEM; 8108195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8109204892e9SStephen M. Cameron } 8110fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 81112c4c8c8bSStephen M. Cameron if (err) 8112195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 811377c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 811477c4495cSStephen M. Cameron if (err) 8115195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8116b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8117edd16368SStephen M. Cameron 811876c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8119edd16368SStephen M. Cameron err = -ENODEV; 8120195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8121edd16368SStephen M. Cameron } 812297a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 81233d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8124eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8125eb6b2ae9SStephen M. Cameron if (err) 8126195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8127edd16368SStephen M. Cameron return 0; 8128edd16368SStephen M. Cameron 8129195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8130195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8131195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8132204892e9SStephen M. Cameron iounmap(h->vaddr); 8133105a3dbcSRobert Elliott h->vaddr = NULL; 8134195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8135195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8136bc2bb154SChristoph Hellwig clean1: 8137943a7021SRobert Elliott /* 8138943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8139943a7021SRobert Elliott * Documentation/PCI/pci.txt 8140943a7021SRobert Elliott */ 8141195f2c65SRobert Elliott pci_disable_device(h->pdev); 8142943a7021SRobert Elliott pci_release_regions(h->pdev); 8143edd16368SStephen M. Cameron return err; 8144edd16368SStephen M. Cameron } 8145edd16368SStephen M. Cameron 81466f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8147339b2b14SStephen M. Cameron { 8148339b2b14SStephen M. Cameron int rc; 8149339b2b14SStephen M. Cameron 8150339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8151339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8152339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8153339b2b14SStephen M. Cameron return; 8154339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8155339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8156339b2b14SStephen M. Cameron if (rc != 0) { 8157339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8158339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8159339b2b14SStephen M. Cameron } 8160339b2b14SStephen M. Cameron } 8161339b2b14SStephen M. Cameron 81626b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8163edd16368SStephen M. Cameron { 81641df8552aSStephen M. Cameron int rc, i; 81653b747298STomas Henzl void __iomem *vaddr; 8166edd16368SStephen M. Cameron 81674c2a8c40SStephen M. Cameron if (!reset_devices) 81684c2a8c40SStephen M. Cameron return 0; 81694c2a8c40SStephen M. Cameron 8170132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8171132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8172132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8173132aa220STomas Henzl */ 8174132aa220STomas Henzl rc = pci_enable_device(pdev); 8175132aa220STomas Henzl if (rc) { 8176132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8177132aa220STomas Henzl return -ENODEV; 8178132aa220STomas Henzl } 8179132aa220STomas Henzl pci_disable_device(pdev); 8180132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8181132aa220STomas Henzl rc = pci_enable_device(pdev); 8182132aa220STomas Henzl if (rc) { 8183132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8184132aa220STomas Henzl return -ENODEV; 8185132aa220STomas Henzl } 81864fa604e1SRobert Elliott 8187859c75abSTomas Henzl pci_set_master(pdev); 81884fa604e1SRobert Elliott 81893b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 81903b747298STomas Henzl if (vaddr == NULL) { 81913b747298STomas Henzl rc = -ENOMEM; 81923b747298STomas Henzl goto out_disable; 81933b747298STomas Henzl } 81943b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 81953b747298STomas Henzl iounmap(vaddr); 81963b747298STomas Henzl 81971df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 81986b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8199edd16368SStephen M. Cameron 82001df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 82011df8552aSStephen M. Cameron * but it's already (and still) up and running in 820218867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 820318867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 82041df8552aSStephen M. Cameron */ 8205adf1b3a3SRobert Elliott if (rc) 8206132aa220STomas Henzl goto out_disable; 8207edd16368SStephen M. Cameron 8208edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 82091ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8210edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8211edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8212edd16368SStephen M. Cameron break; 8213edd16368SStephen M. Cameron else 8214edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8215edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8216edd16368SStephen M. Cameron } 8217132aa220STomas Henzl 8218132aa220STomas Henzl out_disable: 8219132aa220STomas Henzl 8220132aa220STomas Henzl pci_disable_device(pdev); 8221132aa220STomas Henzl return rc; 8222edd16368SStephen M. Cameron } 8223edd16368SStephen M. Cameron 82241fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 82251fb7c98aSRobert Elliott { 82261fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8227105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8228105a3dbcSRobert Elliott if (h->cmd_pool) { 82291fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82301fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 82311fb7c98aSRobert Elliott h->cmd_pool, 82321fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8233105a3dbcSRobert Elliott h->cmd_pool = NULL; 8234105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8235105a3dbcSRobert Elliott } 8236105a3dbcSRobert Elliott if (h->errinfo_pool) { 82371fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82381fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 82391fb7c98aSRobert Elliott h->errinfo_pool, 82401fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8241105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8242105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8243105a3dbcSRobert Elliott } 82441fb7c98aSRobert Elliott } 82451fb7c98aSRobert Elliott 8246d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 82472e9d1b36SStephen M. Cameron { 82482e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 82492e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 82502e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 82512e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 82522e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 82532e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 82542e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 82552e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 82562e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 82572e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 82582e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 82592e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 82602e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 82612c143342SRobert Elliott goto clean_up; 82622e9d1b36SStephen M. Cameron } 8263360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 82642e9d1b36SStephen M. Cameron return 0; 82652c143342SRobert Elliott clean_up: 82662c143342SRobert Elliott hpsa_free_cmd_pool(h); 82672c143342SRobert Elliott return -ENOMEM; 82682e9d1b36SStephen M. Cameron } 82692e9d1b36SStephen M. Cameron 8270ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8271ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8272ec501a18SRobert Elliott { 8273ec501a18SRobert Elliott int i; 8274ec501a18SRobert Elliott 8275bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8276ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 82777dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8278bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8279ec501a18SRobert Elliott return; 8280ec501a18SRobert Elliott } 8281ec501a18SRobert Elliott 8282bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8283bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8284105a3dbcSRobert Elliott h->q[i] = 0; 8285ec501a18SRobert Elliott } 8286a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8287a4e17fc1SRobert Elliott h->q[i] = 0; 8288ec501a18SRobert Elliott } 8289ec501a18SRobert Elliott 82909ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 82919ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 82920ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 82930ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 82940ae01a32SStephen M. Cameron { 8295254f796bSMatt Gates int rc, i; 82960ae01a32SStephen M. Cameron 8297254f796bSMatt Gates /* 8298254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8299254f796bSMatt Gates * queue to process. 8300254f796bSMatt Gates */ 8301254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8302254f796bSMatt Gates h->q[i] = (u8) i; 8303254f796bSMatt Gates 8304bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8305254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8306bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 83078b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8308bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 83098b47004aSRobert Elliott 0, h->intrname[i], 8310254f796bSMatt Gates &h->q[i]); 8311a4e17fc1SRobert Elliott if (rc) { 8312a4e17fc1SRobert Elliott int j; 8313a4e17fc1SRobert Elliott 8314a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8315a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8316bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8317a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8318bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8319a4e17fc1SRobert Elliott h->q[j] = 0; 8320a4e17fc1SRobert Elliott } 8321a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8322a4e17fc1SRobert Elliott h->q[j] = 0; 8323a4e17fc1SRobert Elliott return rc; 8324a4e17fc1SRobert Elliott } 8325a4e17fc1SRobert Elliott } 8326254f796bSMatt Gates } else { 8327254f796bSMatt Gates /* Use single reply pool */ 8328bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8329bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8330bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8331bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83328b47004aSRobert Elliott msixhandler, 0, 8333bc2bb154SChristoph Hellwig h->intrname[0], 8334254f796bSMatt Gates &h->q[h->intr_mode]); 8335254f796bSMatt Gates } else { 83368b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 83378b47004aSRobert Elliott "%s-intx", h->devname); 8338bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83398b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8340bc2bb154SChristoph Hellwig h->intrname[0], 8341254f796bSMatt Gates &h->q[h->intr_mode]); 8342254f796bSMatt Gates } 8343254f796bSMatt Gates } 83440ae01a32SStephen M. Cameron if (rc) { 8345195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8346bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 8347195f2c65SRobert Elliott hpsa_free_irqs(h); 83480ae01a32SStephen M. Cameron return -ENODEV; 83490ae01a32SStephen M. Cameron } 83500ae01a32SStephen M. Cameron return 0; 83510ae01a32SStephen M. Cameron } 83520ae01a32SStephen M. Cameron 83536f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 835464670ac8SStephen M. Cameron { 835539c53f55SRobert Elliott int rc; 8356bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 835764670ac8SStephen M. Cameron 835864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 835939c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 836039c53f55SRobert Elliott if (rc) { 836164670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 836239c53f55SRobert Elliott return rc; 836364670ac8SStephen M. Cameron } 836464670ac8SStephen M. Cameron 836564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 836639c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 836739c53f55SRobert Elliott if (rc) { 836864670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 836964670ac8SStephen M. Cameron "after soft reset.\n"); 837039c53f55SRobert Elliott return rc; 837164670ac8SStephen M. Cameron } 837264670ac8SStephen M. Cameron 837364670ac8SStephen M. Cameron return 0; 837464670ac8SStephen M. Cameron } 837564670ac8SStephen M. Cameron 8376072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8377072b0518SStephen M. Cameron { 8378072b0518SStephen M. Cameron int i; 8379072b0518SStephen M. Cameron 8380072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8381072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8382072b0518SStephen M. Cameron continue; 83831fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 83841fb7c98aSRobert Elliott h->reply_queue_size, 83851fb7c98aSRobert Elliott h->reply_queue[i].head, 83861fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8387072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8388072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8389072b0518SStephen M. Cameron } 8390105a3dbcSRobert Elliott h->reply_queue_size = 0; 8391072b0518SStephen M. Cameron } 8392072b0518SStephen M. Cameron 83930097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 83940097f0f4SStephen M. Cameron { 8395105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8396105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8397105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8398105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83992946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 84002946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 84012946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 84029ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 84039ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 84049ecd953aSRobert Elliott if (h->resubmit_wq) { 84059ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 84069ecd953aSRobert Elliott h->resubmit_wq = NULL; 84079ecd953aSRobert Elliott } 84089ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 84099ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 84109ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 84119ecd953aSRobert Elliott } 8412105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 841364670ac8SStephen M. Cameron } 841464670ac8SStephen M. Cameron 8415a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8416f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8417a0c12413SStephen M. Cameron { 8418281a7fd0SWebb Scales int i, refcount; 8419281a7fd0SWebb Scales struct CommandList *c; 842025163bd5SWebb Scales int failcount = 0; 8421a0c12413SStephen M. Cameron 8422080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8423f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8424f2405db8SDon Brace c = h->cmd_pool + i; 8425281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8426281a7fd0SWebb Scales if (refcount > 1) { 842725163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 84285a3d16f5SStephen M. Cameron finish_cmd(c); 8429433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 843025163bd5SWebb Scales failcount++; 8431a0c12413SStephen M. Cameron } 8432281a7fd0SWebb Scales cmd_free(h, c); 8433281a7fd0SWebb Scales } 843425163bd5SWebb Scales dev_warn(&h->pdev->dev, 843525163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8436a0c12413SStephen M. Cameron } 8437a0c12413SStephen M. Cameron 8438094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8439094963daSStephen M. Cameron { 8440c8ed0010SRusty Russell int cpu; 8441094963daSStephen M. Cameron 8442c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8443094963daSStephen M. Cameron u32 *lockup_detected; 8444094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8445094963daSStephen M. Cameron *lockup_detected = value; 8446094963daSStephen M. Cameron } 8447094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8448094963daSStephen M. Cameron } 8449094963daSStephen M. Cameron 8450a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8451a0c12413SStephen M. Cameron { 8452a0c12413SStephen M. Cameron unsigned long flags; 8453094963daSStephen M. Cameron u32 lockup_detected; 8454a0c12413SStephen M. Cameron 8455a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8456a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8457094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8458094963daSStephen M. Cameron if (!lockup_detected) { 8459094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8460094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 846125163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 846225163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8463094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8464094963daSStephen M. Cameron } 8465094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8466a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 846725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 846825163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8469a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8470f2405db8SDon Brace fail_all_outstanding_cmds(h); 8471a0c12413SStephen M. Cameron } 8472a0c12413SStephen M. Cameron 847325163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8474a0c12413SStephen M. Cameron { 8475a0c12413SStephen M. Cameron u64 now; 8476a0c12413SStephen M. Cameron u32 heartbeat; 8477a0c12413SStephen M. Cameron unsigned long flags; 8478a0c12413SStephen M. Cameron 8479a0c12413SStephen M. Cameron now = get_jiffies_64(); 8480a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8481a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8482e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 848325163bd5SWebb Scales return false; 8484a0c12413SStephen M. Cameron 8485a0c12413SStephen M. Cameron /* 8486a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8487a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8488a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8489a0c12413SStephen M. Cameron */ 8490a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8491e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 849225163bd5SWebb Scales return false; 8493a0c12413SStephen M. Cameron 8494a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8495a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8496a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8497a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8498a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8499a0c12413SStephen M. Cameron controller_lockup_detected(h); 850025163bd5SWebb Scales return true; 8501a0c12413SStephen M. Cameron } 8502a0c12413SStephen M. Cameron 8503a0c12413SStephen M. Cameron /* We're ok. */ 8504a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8505a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 850625163bd5SWebb Scales return false; 8507a0c12413SStephen M. Cameron } 8508a0c12413SStephen M. Cameron 85099846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 851076438d08SStephen M. Cameron { 851176438d08SStephen M. Cameron int i; 851276438d08SStephen M. Cameron char *event_type; 851376438d08SStephen M. Cameron 8514e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8515e4aa3e6aSStephen Cameron return; 8516e4aa3e6aSStephen Cameron 851776438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 85181f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 85191f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 852076438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 852176438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 852276438d08SStephen M. Cameron 852376438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 852476438d08SStephen M. Cameron event_type = "state change"; 852576438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 852676438d08SStephen M. Cameron event_type = "configuration change"; 852776438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 852876438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 85295323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 853076438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 85315323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 85325323ed74SDon Brace } 853323100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 853476438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 853576438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 853676438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 853776438d08SStephen M. Cameron h->events, event_type); 853876438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 853976438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 854076438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 854176438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 854276438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 854376438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 854476438d08SStephen M. Cameron } else { 854576438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 854676438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 854776438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 854876438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 854976438d08SStephen M. Cameron #if 0 855076438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 855176438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 855276438d08SStephen M. Cameron #endif 855376438d08SStephen M. Cameron } 85549846590eSStephen M. Cameron return; 855576438d08SStephen M. Cameron } 855676438d08SStephen M. Cameron 855776438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 855876438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8559e863d68eSScott Teel * we should rescan the controller for devices. 8560e863d68eSScott Teel * Also check flag for driver-initiated rescan. 856176438d08SStephen M. Cameron */ 85629846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 856376438d08SStephen M. Cameron { 8564853633e8SDon Brace if (h->drv_req_rescan) { 8565853633e8SDon Brace h->drv_req_rescan = 0; 8566853633e8SDon Brace return 1; 8567853633e8SDon Brace } 8568853633e8SDon Brace 856976438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 85709846590eSStephen M. Cameron return 0; 857176438d08SStephen M. Cameron 857276438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 85739846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 85749846590eSStephen M. Cameron } 857576438d08SStephen M. Cameron 857676438d08SStephen M. Cameron /* 85779846590eSStephen M. Cameron * Check if any of the offline devices have become ready 857876438d08SStephen M. Cameron */ 85799846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 85809846590eSStephen M. Cameron { 85819846590eSStephen M. Cameron unsigned long flags; 85829846590eSStephen M. Cameron struct offline_device_entry *d; 85839846590eSStephen M. Cameron struct list_head *this, *tmp; 85849846590eSStephen M. Cameron 85859846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 85869846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 85879846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 85889846590eSStephen M. Cameron offline_list); 85899846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8590d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8591d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8592d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8593d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85949846590eSStephen M. Cameron return 1; 8595d1fea47cSStephen M. Cameron } 85969846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 859776438d08SStephen M. Cameron } 85989846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85999846590eSStephen M. Cameron return 0; 86009846590eSStephen M. Cameron } 86019846590eSStephen M. Cameron 860234592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 860334592254SScott Teel { 860434592254SScott Teel int rc = 1; /* assume there are changes */ 860534592254SScott Teel struct ReportLUNdata *logdev = NULL; 860634592254SScott Teel 860734592254SScott Teel /* if we can't find out if lun data has changed, 860834592254SScott Teel * assume that it has. 860934592254SScott Teel */ 861034592254SScott Teel 861134592254SScott Teel if (!h->lastlogicals) 86127e8a9486SAmit Kushwaha return rc; 861334592254SScott Teel 861434592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 86157e8a9486SAmit Kushwaha if (!logdev) 86167e8a9486SAmit Kushwaha return rc; 86177e8a9486SAmit Kushwaha 861834592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 861934592254SScott Teel dev_warn(&h->pdev->dev, 862034592254SScott Teel "report luns failed, can't track lun changes.\n"); 862134592254SScott Teel goto out; 862234592254SScott Teel } 862334592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 862434592254SScott Teel dev_info(&h->pdev->dev, 862534592254SScott Teel "Lun changes detected.\n"); 862634592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 862734592254SScott Teel goto out; 862834592254SScott Teel } else 862934592254SScott Teel rc = 0; /* no changes detected. */ 863034592254SScott Teel out: 863134592254SScott Teel kfree(logdev); 863234592254SScott Teel return rc; 863334592254SScott Teel } 863434592254SScott Teel 86356636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8636a0c12413SStephen M. Cameron { 8637a0c12413SStephen M. Cameron unsigned long flags; 86388a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 86396636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 86406636e7f4SDon Brace 86416636e7f4SDon Brace 86426636e7f4SDon Brace if (h->remove_in_progress) 86438a98db73SStephen M. Cameron return; 86449846590eSStephen M. Cameron 8645bfd7546cSDon Brace /* 8646bfd7546cSDon Brace * Do the scan after the reset 8647bfd7546cSDon Brace */ 8648bfd7546cSDon Brace if (h->reset_in_progress) { 8649bfd7546cSDon Brace h->drv_req_rescan = 1; 8650bfd7546cSDon Brace return; 8651bfd7546cSDon Brace } 8652bfd7546cSDon Brace 86539846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 86549846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 86559846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 86569846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 86579846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 865834592254SScott Teel } else if (h->discovery_polling) { 8659c2adae44SScott Teel hpsa_disable_rld_caching(h); 866034592254SScott Teel if (hpsa_luns_changed(h)) { 866134592254SScott Teel struct Scsi_Host *sh = NULL; 866234592254SScott Teel 866334592254SScott Teel dev_info(&h->pdev->dev, 866434592254SScott Teel "driver discovery polling rescan.\n"); 866534592254SScott Teel sh = scsi_host_get(h->scsi_host); 866634592254SScott Teel if (sh != NULL) { 866734592254SScott Teel hpsa_scan_start(sh); 866834592254SScott Teel scsi_host_put(sh); 866934592254SScott Teel } 867034592254SScott Teel } 86719846590eSStephen M. Cameron } 86726636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86736636e7f4SDon Brace if (!h->remove_in_progress) 86746636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86756636e7f4SDon Brace h->heartbeat_sample_interval); 86766636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86776636e7f4SDon Brace } 86786636e7f4SDon Brace 86796636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86806636e7f4SDon Brace { 86816636e7f4SDon Brace unsigned long flags; 86826636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86836636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86846636e7f4SDon Brace 86856636e7f4SDon Brace detect_controller_lockup(h); 86866636e7f4SDon Brace if (lockup_detected(h)) 86876636e7f4SDon Brace return; 86889846590eSStephen M. Cameron 86898a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86906636e7f4SDon Brace if (!h->remove_in_progress) 86918a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86928a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86938a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8694a0c12413SStephen M. Cameron } 8695a0c12413SStephen M. Cameron 86966636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86976636e7f4SDon Brace char *name) 86986636e7f4SDon Brace { 86996636e7f4SDon Brace struct workqueue_struct *wq = NULL; 87006636e7f4SDon Brace 8701397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 87026636e7f4SDon Brace if (!wq) 87036636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 87046636e7f4SDon Brace 87056636e7f4SDon Brace return wq; 87066636e7f4SDon Brace } 87076636e7f4SDon Brace 87086f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 87094c2a8c40SStephen M. Cameron { 87104c2a8c40SStephen M. Cameron int dac, rc; 87114c2a8c40SStephen M. Cameron struct ctlr_info *h; 871264670ac8SStephen M. Cameron int try_soft_reset = 0; 871364670ac8SStephen M. Cameron unsigned long flags; 87146b6c1cd7STomas Henzl u32 board_id; 87154c2a8c40SStephen M. Cameron 87164c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 87174c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 87184c2a8c40SStephen M. Cameron 87196b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 87206b6c1cd7STomas Henzl if (rc < 0) { 87216b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 87226b6c1cd7STomas Henzl return rc; 87236b6c1cd7STomas Henzl } 87246b6c1cd7STomas Henzl 87256b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 872664670ac8SStephen M. Cameron if (rc) { 872764670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 87284c2a8c40SStephen M. Cameron return rc; 872964670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 873064670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 873164670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 873264670ac8SStephen M. Cameron * point that it can accept a command. 873364670ac8SStephen M. Cameron */ 873464670ac8SStephen M. Cameron try_soft_reset = 1; 873564670ac8SStephen M. Cameron rc = 0; 873664670ac8SStephen M. Cameron } 873764670ac8SStephen M. Cameron 873864670ac8SStephen M. Cameron reinit_after_soft_reset: 87394c2a8c40SStephen M. Cameron 8740303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8741303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8742303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8743303932fdSDon Brace */ 8744303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8745edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8746105a3dbcSRobert Elliott if (!h) { 8747105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8748ecd9aad4SStephen M. Cameron return -ENOMEM; 8749105a3dbcSRobert Elliott } 8750edd16368SStephen M. Cameron 875155c06c71SStephen M. Cameron h->pdev = pdev; 8752105a3dbcSRobert Elliott 8753a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 87549846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 87556eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 87569846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 87576eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 875834f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 87599b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8760094963daSStephen M. Cameron 8761094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8762094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87632a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8764105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87652a5ac326SStephen M. Cameron rc = -ENOMEM; 87662efa5929SRobert Elliott goto clean1; /* aer/h */ 87672a5ac326SStephen M. Cameron } 8768094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8769094963daSStephen M. Cameron 877055c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8771105a3dbcSRobert Elliott if (rc) 87722946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8773edd16368SStephen M. Cameron 87742946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87752946e82bSRobert Elliott * interrupt_mode h->intr */ 87762946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87772946e82bSRobert Elliott if (rc) 87782946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87792946e82bSRobert Elliott 87802946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8781edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8782edd16368SStephen M. Cameron number_of_controllers++; 8783edd16368SStephen M. Cameron 8784edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8785ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8786ecd9aad4SStephen M. Cameron if (rc == 0) { 8787edd16368SStephen M. Cameron dac = 1; 8788ecd9aad4SStephen M. Cameron } else { 8789ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8790ecd9aad4SStephen M. Cameron if (rc == 0) { 8791edd16368SStephen M. Cameron dac = 0; 8792ecd9aad4SStephen M. Cameron } else { 8793edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87942946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8795edd16368SStephen M. Cameron } 8796ecd9aad4SStephen M. Cameron } 8797edd16368SStephen M. Cameron 8798edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8799edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 880010f66018SStephen M. Cameron 8801105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8802105a3dbcSRobert Elliott if (rc) 88032946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8804d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 88058947fd10SRobert Elliott if (rc) 88062946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8807105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8808105a3dbcSRobert Elliott if (rc) 88092946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8810a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 88119b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8812d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8813d604f533SWebb Scales mutex_init(&h->reset_mutex); 8814a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 881587b9e6aaSDon Brace h->scan_waiting = 0; 8816edd16368SStephen M. Cameron 8817edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 88189a41338eSStephen M. Cameron h->ndevices = 0; 88192946e82bSRobert Elliott 88209a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8821105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8822105a3dbcSRobert Elliott if (rc) 88232946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 88242946e82bSRobert Elliott 88252efa5929SRobert Elliott /* create the resubmit workqueue */ 88262efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 88272efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 88282efa5929SRobert Elliott rc = -ENOMEM; 88292efa5929SRobert Elliott goto clean7; 88302efa5929SRobert Elliott } 88312efa5929SRobert Elliott 88322efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 88332efa5929SRobert Elliott if (!h->resubmit_wq) { 88342efa5929SRobert Elliott rc = -ENOMEM; 88352efa5929SRobert Elliott goto clean7; /* aer/h */ 88362efa5929SRobert Elliott } 883764670ac8SStephen M. Cameron 8838105a3dbcSRobert Elliott /* 8839105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 884064670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 884164670ac8SStephen M. Cameron * the soft reset and see if that works. 884264670ac8SStephen M. Cameron */ 884364670ac8SStephen M. Cameron if (try_soft_reset) { 884464670ac8SStephen M. Cameron 884564670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 884664670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 884764670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 884864670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 884964670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 885064670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 885164670ac8SStephen M. Cameron */ 885264670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 885364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 885464670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8855ec501a18SRobert Elliott hpsa_free_irqs(h); 88569ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 885764670ac8SStephen M. Cameron hpsa_intx_discard_completions); 885864670ac8SStephen M. Cameron if (rc) { 88599ee61794SRobert Elliott dev_warn(&h->pdev->dev, 88609ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8861d498757cSRobert Elliott /* 8862b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8863b2ef480cSRobert Elliott * again. Instead, do its work 8864b2ef480cSRobert Elliott */ 8865b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8866b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8867b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8868b2ef480cSRobert Elliott /* 8869b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8870b2ef480cSRobert Elliott * was just called before request_irqs failed 8871d498757cSRobert Elliott */ 8872d498757cSRobert Elliott goto clean3; 887364670ac8SStephen M. Cameron } 887464670ac8SStephen M. Cameron 887564670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 887664670ac8SStephen M. Cameron if (rc) 887764670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88787ef7323fSDon Brace goto clean7; 887964670ac8SStephen M. Cameron 888064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 888164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 888264670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 888364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 888464670ac8SStephen M. Cameron msleep(10000); 888564670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 888664670ac8SStephen M. Cameron 888764670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 888864670ac8SStephen M. Cameron if (rc) 888964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 889064670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 889164670ac8SStephen M. Cameron 889264670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 889364670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 889464670ac8SStephen M. Cameron * all over again. 889564670ac8SStephen M. Cameron */ 889664670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 889764670ac8SStephen M. Cameron try_soft_reset = 0; 889864670ac8SStephen M. Cameron if (rc) 8899b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 890064670ac8SStephen M. Cameron return -ENODEV; 890164670ac8SStephen M. Cameron 890264670ac8SStephen M. Cameron goto reinit_after_soft_reset; 890364670ac8SStephen M. Cameron } 8904edd16368SStephen M. Cameron 8905da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8906da0697bdSScott Teel h->acciopath_status = 1; 890734592254SScott Teel /* Disable discovery polling.*/ 890834592254SScott Teel h->discovery_polling = 0; 8909da0697bdSScott Teel 8910e863d68eSScott Teel 8911edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8912edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8913edd16368SStephen M. Cameron 8914339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 89158a98db73SStephen M. Cameron 891634592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 891734592254SScott Teel if (!h->lastlogicals) 891834592254SScott Teel dev_info(&h->pdev->dev, 891934592254SScott Teel "Can't track change to report lun data\n"); 892034592254SScott Teel 8921cf477237SDon Brace /* hook into SCSI subsystem */ 8922cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8923cf477237SDon Brace if (rc) 8924cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8925cf477237SDon Brace 89268a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 89278a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 89288a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 89298a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 89308a98db73SStephen M. Cameron h->heartbeat_sample_interval); 89316636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 89326636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 89336636e7f4SDon Brace h->heartbeat_sample_interval); 893488bf6d62SStephen M. Cameron return 0; 8935edd16368SStephen M. Cameron 89362946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8937105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8938105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8939105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 894033a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 89412946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 89422e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 89432946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8944ec501a18SRobert Elliott hpsa_free_irqs(h); 89452946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 89462946e82bSRobert Elliott scsi_host_put(h->scsi_host); 89472946e82bSRobert Elliott h->scsi_host = NULL; 89482946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8949195f2c65SRobert Elliott hpsa_free_pci_init(h); 89502946e82bSRobert Elliott clean2: /* lu, aer/h */ 8951105a3dbcSRobert Elliott if (h->lockup_detected) { 8952094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8953105a3dbcSRobert Elliott h->lockup_detected = NULL; 8954105a3dbcSRobert Elliott } 8955105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8956105a3dbcSRobert Elliott if (h->resubmit_wq) { 8957105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8958105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8959105a3dbcSRobert Elliott } 8960105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8961105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8962105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8963105a3dbcSRobert Elliott } 8964edd16368SStephen M. Cameron kfree(h); 8965ecd9aad4SStephen M. Cameron return rc; 8966edd16368SStephen M. Cameron } 8967edd16368SStephen M. Cameron 8968edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8969edd16368SStephen M. Cameron { 8970edd16368SStephen M. Cameron char *flush_buf; 8971edd16368SStephen M. Cameron struct CommandList *c; 897225163bd5SWebb Scales int rc; 8973702890e3SStephen M. Cameron 8974094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8975702890e3SStephen M. Cameron return; 8976edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8977edd16368SStephen M. Cameron if (!flush_buf) 8978edd16368SStephen M. Cameron return; 8979edd16368SStephen M. Cameron 898045fcb86eSStephen Cameron c = cmd_alloc(h); 8981bf43caf3SRobert Elliott 8982a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8983a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8984a2dac136SStephen M. Cameron goto out; 8985a2dac136SStephen M. Cameron } 898625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8987c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 898825163bd5SWebb Scales if (rc) 898925163bd5SWebb Scales goto out; 8990edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8991a2dac136SStephen M. Cameron out: 8992edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8993edd16368SStephen M. Cameron "error flushing cache on controller\n"); 899445fcb86eSStephen Cameron cmd_free(h, c); 8995edd16368SStephen M. Cameron kfree(flush_buf); 8996edd16368SStephen M. Cameron } 8997edd16368SStephen M. Cameron 8998c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8999c2adae44SScott Teel * send down a report luns request 9000c2adae44SScott Teel */ 9001c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 9002c2adae44SScott Teel { 9003c2adae44SScott Teel u32 *options; 9004c2adae44SScott Teel struct CommandList *c; 9005c2adae44SScott Teel int rc; 9006c2adae44SScott Teel 9007c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 9008c2adae44SScott Teel if (unlikely(h->lockup_detected)) 9009c2adae44SScott Teel return; 9010c2adae44SScott Teel 9011c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 90127e8a9486SAmit Kushwaha if (!options) 9013c2adae44SScott Teel return; 9014c2adae44SScott Teel 9015c2adae44SScott Teel c = cmd_alloc(h); 9016c2adae44SScott Teel 9017c2adae44SScott Teel /* first, get the current diag options settings */ 9018c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9019c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9020c2adae44SScott Teel goto errout; 9021c2adae44SScott Teel 9022c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9023c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9024c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9025c2adae44SScott Teel goto errout; 9026c2adae44SScott Teel 9027c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 9028c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9029c2adae44SScott Teel 9030c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9031c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9032c2adae44SScott Teel goto errout; 9033c2adae44SScott Teel 9034c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9035c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9036c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9037c2adae44SScott Teel goto errout; 9038c2adae44SScott Teel 9039c2adae44SScott Teel /* Now verify that it got set: */ 9040c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9041c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9042c2adae44SScott Teel goto errout; 9043c2adae44SScott Teel 9044c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9045c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9046c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9047c2adae44SScott Teel goto errout; 9048c2adae44SScott Teel 9049d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9050c2adae44SScott Teel goto out; 9051c2adae44SScott Teel 9052c2adae44SScott Teel errout: 9053c2adae44SScott Teel dev_err(&h->pdev->dev, 9054c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 9055c2adae44SScott Teel out: 9056c2adae44SScott Teel cmd_free(h, c); 9057c2adae44SScott Teel kfree(options); 9058c2adae44SScott Teel } 9059c2adae44SScott Teel 9060edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 9061edd16368SStephen M. Cameron { 9062edd16368SStephen M. Cameron struct ctlr_info *h; 9063edd16368SStephen M. Cameron 9064edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9065edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9066edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9067edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9068edd16368SStephen M. Cameron */ 9069edd16368SStephen M. Cameron hpsa_flush_cache(h); 9070edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9071105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9072cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9073edd16368SStephen M. Cameron } 9074edd16368SStephen M. Cameron 90756f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 907655e14e76SStephen M. Cameron { 907755e14e76SStephen M. Cameron int i; 907855e14e76SStephen M. Cameron 9079105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 908055e14e76SStephen M. Cameron kfree(h->dev[i]); 9081105a3dbcSRobert Elliott h->dev[i] = NULL; 9082105a3dbcSRobert Elliott } 908355e14e76SStephen M. Cameron } 908455e14e76SStephen M. Cameron 90856f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9086edd16368SStephen M. Cameron { 9087edd16368SStephen M. Cameron struct ctlr_info *h; 90888a98db73SStephen M. Cameron unsigned long flags; 9089edd16368SStephen M. Cameron 9090edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9091edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9092edd16368SStephen M. Cameron return; 9093edd16368SStephen M. Cameron } 9094edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90958a98db73SStephen M. Cameron 90968a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90978a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90988a98db73SStephen M. Cameron h->remove_in_progress = 1; 90998a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 91006636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 91016636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 91026636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 91036636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9104cc64c817SRobert Elliott 91052d041306SDon Brace /* 91062d041306SDon Brace * Call before disabling interrupts. 91072d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 91082d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 91092d041306SDon Brace * operations which cannot complete and will hang the system. 91102d041306SDon Brace */ 91112d041306SDon Brace if (h->scsi_host) 91122d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9113105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9114195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9115edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9116cc64c817SRobert Elliott 9117105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9118105a3dbcSRobert Elliott 91192946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 91202946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 91212946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9122105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9123105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 91241fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 912534592254SScott Teel kfree(h->lastlogicals); 9126105a3dbcSRobert Elliott 9127105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9128195f2c65SRobert Elliott 91292946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 91302946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 91312946e82bSRobert Elliott 9132195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 91332946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9134195f2c65SRobert Elliott 9135105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9136105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9137105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9138d04e62b9SKevin Barnett 9139d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9140d04e62b9SKevin Barnett 9141105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9142edd16368SStephen M. Cameron } 9143edd16368SStephen M. Cameron 9144edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9145edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9146edd16368SStephen M. Cameron { 9147edd16368SStephen M. Cameron return -ENOSYS; 9148edd16368SStephen M. Cameron } 9149edd16368SStephen M. Cameron 9150edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9151edd16368SStephen M. Cameron { 9152edd16368SStephen M. Cameron return -ENOSYS; 9153edd16368SStephen M. Cameron } 9154edd16368SStephen M. Cameron 9155edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9156f79cfec6SStephen M. Cameron .name = HPSA, 9157edd16368SStephen M. Cameron .probe = hpsa_init_one, 91586f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9159edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9160edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9161edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9162edd16368SStephen M. Cameron .resume = hpsa_resume, 9163edd16368SStephen M. Cameron }; 9164edd16368SStephen M. Cameron 9165303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9166303932fdSDon Brace * scatter gather elements supported) and bucket[], 9167303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9168303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9169303932fdSDon Brace * byte increments) which the controller uses to fetch 9170303932fdSDon Brace * commands. This function fills in bucket_map[], which 9171303932fdSDon Brace * maps a given number of scatter gather elements to one of 9172303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9173303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9174303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9175303932fdSDon Brace * bits of the command address. 9176303932fdSDon Brace */ 9177303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91782b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9179303932fdSDon Brace { 9180303932fdSDon Brace int i, j, b, size; 9181303932fdSDon Brace 9182303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9183303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9184303932fdSDon Brace /* Compute size of a command with i SG entries */ 9185e1f7de0cSMatt Gates size = i + min_blocks; 9186303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9187303932fdSDon Brace /* Find the bucket that is just big enough */ 9188e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9189303932fdSDon Brace if (bucket[j] >= size) { 9190303932fdSDon Brace b = j; 9191303932fdSDon Brace break; 9192303932fdSDon Brace } 9193303932fdSDon Brace } 9194303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9195303932fdSDon Brace bucket_map[i] = b; 9196303932fdSDon Brace } 9197303932fdSDon Brace } 9198303932fdSDon Brace 9199105a3dbcSRobert Elliott /* 9200105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9201105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9202105a3dbcSRobert Elliott */ 9203c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9204303932fdSDon Brace { 92056c311b57SStephen M. Cameron int i; 92066c311b57SStephen M. Cameron unsigned long register_value; 9207e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9208e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9209e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9210b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9211b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9212e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9213def342bdSStephen M. Cameron 9214def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9215def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9216def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9217def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9218def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9219def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9220def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9221def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9222def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9223def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9224d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9225def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9226def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9227def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9228def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9229def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9230def342bdSStephen M. Cameron */ 9231d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9232b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9233b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9234b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9235b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9236b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9237b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9238b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9239b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9240b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9241b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9242d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9243303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9244303932fdSDon Brace * 6 = 2 s/g entry or 8k 9245303932fdSDon Brace * 8 = 4 s/g entry or 16k 9246303932fdSDon Brace * 10 = 6 s/g entry or 24k 9247303932fdSDon Brace */ 9248303932fdSDon Brace 9249b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9250b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9251b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9252b3a52e79SStephen M. Cameron */ 9253b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9254b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9255b3a52e79SStephen M. Cameron 9256303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9257072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9258072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9259303932fdSDon Brace 9260d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9261d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9262e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9263303932fdSDon Brace for (i = 0; i < 8; i++) 9264303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9265303932fdSDon Brace 9266303932fdSDon Brace /* size of controller ring buffer */ 9267303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9268254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9269303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9270303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9271254f796bSMatt Gates 9272254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9273254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9274072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9275254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9276254f796bSMatt Gates } 9277254f796bSMatt Gates 9278b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9279e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9280e1f7de0cSMatt Gates /* 9281e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9282e1f7de0cSMatt Gates */ 9283e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9284e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9285e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9286e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 928796b6ce4eSDon Brace } else 928896b6ce4eSDon Brace if (trans_support & CFGTBL_Trans_io_accel2) 9289c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9290303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9291c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9292c706a795SRobert Elliott dev_err(&h->pdev->dev, 9293c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9294c706a795SRobert Elliott return -ENODEV; 9295c706a795SRobert Elliott } 9296303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9297303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9298050f7147SStephen Cameron dev_err(&h->pdev->dev, 9299050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9300c706a795SRobert Elliott return -ENODEV; 9301303932fdSDon Brace } 9302960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9303e1f7de0cSMatt Gates h->access = access; 9304e1f7de0cSMatt Gates h->transMethod = transMethod; 9305e1f7de0cSMatt Gates 9306b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9307b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9308c706a795SRobert Elliott return 0; 9309e1f7de0cSMatt Gates 9310b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9311e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9312e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9313e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9314e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9315e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9316e1f7de0cSMatt Gates } 9317283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9318283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9319e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9320e1f7de0cSMatt Gates 9321e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9322072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9323072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9324072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9325072b0518SStephen M. Cameron h->reply_queue_size); 9326e1f7de0cSMatt Gates 9327e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9328e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9329e1f7de0cSMatt Gates */ 9330e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9331e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9332e1f7de0cSMatt Gates 9333e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9334e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9335e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9336e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9337e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 93382b08b3e9SDon Brace cp->host_context_flags = 93392b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9340e1f7de0cSMatt Gates cp->timeout_sec = 0; 9341e1f7de0cSMatt Gates cp->ReplyQueue = 0; 934250a0decfSStephen M. Cameron cp->tag = 9343f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 934450a0decfSStephen M. Cameron cp->host_addr = 934550a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9346e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9347e1f7de0cSMatt Gates } 9348b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9349b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9350b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9351b9af4937SStephen M. Cameron int rc; 9352b9af4937SStephen M. Cameron 9353b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9354b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9355b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9356b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9357b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9358b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9359b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9360b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9361b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9362b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9363b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9364b9af4937SStephen M. Cameron cfg_base_addr_index) + 9365b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9366b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9367b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9368b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9369b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9370b9af4937SStephen M. Cameron } 9371b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9372c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9373c706a795SRobert Elliott dev_err(&h->pdev->dev, 9374c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9375c706a795SRobert Elliott return -ENODEV; 9376c706a795SRobert Elliott } 9377c706a795SRobert Elliott return 0; 9378e1f7de0cSMatt Gates } 9379e1f7de0cSMatt Gates 93801fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93811fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93821fb7c98aSRobert Elliott { 9383105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93841fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93851fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93861fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93871fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9388105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9389105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9390105a3dbcSRobert Elliott } 93911fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9392105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93931fb7c98aSRobert Elliott } 93941fb7c98aSRobert Elliott 9395d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9396d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9397e1f7de0cSMatt Gates { 9398283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9399283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9400283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9401283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9402283b4a9bSStephen M. Cameron 9403e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9404e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9405e1f7de0cSMatt Gates * hardware. 9406e1f7de0cSMatt Gates */ 9407e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9408e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9409e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9410e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9411e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9412e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9413e1f7de0cSMatt Gates 9414e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9415283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9416e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9417e1f7de0cSMatt Gates 9418e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9419e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9420e1f7de0cSMatt Gates goto clean_up; 9421e1f7de0cSMatt Gates 9422e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9423e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9424e1f7de0cSMatt Gates return 0; 9425e1f7de0cSMatt Gates 9426e1f7de0cSMatt Gates clean_up: 94271fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 94282dd02d74SRobert Elliott return -ENOMEM; 94296c311b57SStephen M. Cameron } 94306c311b57SStephen M. Cameron 94311fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 94321fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 94331fb7c98aSRobert Elliott { 9434d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9435d9a729f3SWebb Scales 9436105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 94371fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 94381fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94391fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 94401fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9441105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9442105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9443105a3dbcSRobert Elliott } 94441fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9445105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 94461fb7c98aSRobert Elliott } 94471fb7c98aSRobert Elliott 9448d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9449d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9450aca9012aSStephen M. Cameron { 9451d9a729f3SWebb Scales int rc; 9452d9a729f3SWebb Scales 9453aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9454aca9012aSStephen M. Cameron 9455aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9456aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9457aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9458aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9459aca9012aSStephen M. Cameron 9460aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9461aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9462aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9463aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9464aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9465aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9466aca9012aSStephen M. Cameron 9467aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9468aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9469aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9470aca9012aSStephen M. Cameron 9471aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9472d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9473d9a729f3SWebb Scales rc = -ENOMEM; 9474d9a729f3SWebb Scales goto clean_up; 9475d9a729f3SWebb Scales } 9476d9a729f3SWebb Scales 9477d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9478d9a729f3SWebb Scales if (rc) 9479aca9012aSStephen M. Cameron goto clean_up; 9480aca9012aSStephen M. Cameron 9481aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9482aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9483aca9012aSStephen M. Cameron return 0; 9484aca9012aSStephen M. Cameron 9485aca9012aSStephen M. Cameron clean_up: 94861fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9487d9a729f3SWebb Scales return rc; 9488aca9012aSStephen M. Cameron } 9489aca9012aSStephen M. Cameron 9490105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9491105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9492105a3dbcSRobert Elliott { 9493105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9494105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9495105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9496105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9497105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9498105a3dbcSRobert Elliott } 9499105a3dbcSRobert Elliott 9500105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9501105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9502105a3dbcSRobert Elliott */ 9503105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 95046c311b57SStephen M. Cameron { 95056c311b57SStephen M. Cameron u32 trans_support; 9506e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9507e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9508105a3dbcSRobert Elliott int i, rc; 95096c311b57SStephen M. Cameron 951002ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9511105a3dbcSRobert Elliott return 0; 951202ec19c8SStephen M. Cameron 951367c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 951467c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9515105a3dbcSRobert Elliott return 0; 951667c99a72Sscameron@beardog.cce.hp.com 9517e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9518e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9519e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9520e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9521105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9522105a3dbcSRobert Elliott if (rc) 9523105a3dbcSRobert Elliott return rc; 9524105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9525aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9526aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9527105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9528105a3dbcSRobert Elliott if (rc) 9529105a3dbcSRobert Elliott return rc; 9530e1f7de0cSMatt Gates } 9531e1f7de0cSMatt Gates 9532bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9533cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 95346c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9535072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 95366c311b57SStephen M. Cameron 9537254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9538072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9539072b0518SStephen M. Cameron h->reply_queue_size, 9540072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9541105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9542105a3dbcSRobert Elliott rc = -ENOMEM; 9543105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9544105a3dbcSRobert Elliott } 9545254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9546254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9547254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9548254f796bSMatt Gates } 9549254f796bSMatt Gates 95506c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9551d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95526c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9553105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9554105a3dbcSRobert Elliott rc = -ENOMEM; 9555105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9556105a3dbcSRobert Elliott } 95576c311b57SStephen M. Cameron 9558105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9559105a3dbcSRobert Elliott if (rc) 9560105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9561105a3dbcSRobert Elliott return 0; 9562303932fdSDon Brace 9563105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9564303932fdSDon Brace kfree(h->blockFetchTable); 9565105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9566105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9567105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9568105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9569105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9570105a3dbcSRobert Elliott return rc; 9571303932fdSDon Brace } 9572303932fdSDon Brace 957323100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 957476438d08SStephen M. Cameron { 957523100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 957623100dd9SStephen M. Cameron } 957723100dd9SStephen M. Cameron 957823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 957923100dd9SStephen M. Cameron { 958023100dd9SStephen M. Cameron struct CommandList *c = NULL; 9581f2405db8SDon Brace int i, accel_cmds_out; 9582281a7fd0SWebb Scales int refcount; 958376438d08SStephen M. Cameron 9584f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 958523100dd9SStephen M. Cameron accel_cmds_out = 0; 9586f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9587f2405db8SDon Brace c = h->cmd_pool + i; 9588281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9589281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 959023100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9591281a7fd0SWebb Scales cmd_free(h, c); 9592f2405db8SDon Brace } 959323100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 959476438d08SStephen M. Cameron break; 959576438d08SStephen M. Cameron msleep(100); 959676438d08SStephen M. Cameron } while (1); 959776438d08SStephen M. Cameron } 959876438d08SStephen M. Cameron 9599d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9600d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9601d04e62b9SKevin Barnett { 9602d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9603d04e62b9SKevin Barnett struct sas_phy *phy; 9604d04e62b9SKevin Barnett 9605d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9606d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9607d04e62b9SKevin Barnett return NULL; 9608d04e62b9SKevin Barnett 9609d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9610d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9611d04e62b9SKevin Barnett if (!phy) { 9612d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9613d04e62b9SKevin Barnett return NULL; 9614d04e62b9SKevin Barnett } 9615d04e62b9SKevin Barnett 9616d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9617d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9618d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9619d04e62b9SKevin Barnett 9620d04e62b9SKevin Barnett return hpsa_sas_phy; 9621d04e62b9SKevin Barnett } 9622d04e62b9SKevin Barnett 9623d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9624d04e62b9SKevin Barnett { 9625d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9626d04e62b9SKevin Barnett 9627d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9628d04e62b9SKevin Barnett sas_phy_free(phy); 9629d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9630d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9631d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9632d04e62b9SKevin Barnett } 9633d04e62b9SKevin Barnett 9634d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9635d04e62b9SKevin Barnett { 9636d04e62b9SKevin Barnett int rc; 9637d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9638d04e62b9SKevin Barnett struct sas_phy *phy; 9639d04e62b9SKevin Barnett struct sas_identify *identify; 9640d04e62b9SKevin Barnett 9641d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9642d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9643d04e62b9SKevin Barnett 9644d04e62b9SKevin Barnett identify = &phy->identify; 9645d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9646d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9647d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9648d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9649d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9650d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9651d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9652d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9653d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9654d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9655d04e62b9SKevin Barnett 9656d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9657d04e62b9SKevin Barnett if (rc) 9658d04e62b9SKevin Barnett return rc; 9659d04e62b9SKevin Barnett 9660d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9661d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9662d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9663d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9664d04e62b9SKevin Barnett 9665d04e62b9SKevin Barnett return 0; 9666d04e62b9SKevin Barnett } 9667d04e62b9SKevin Barnett 9668d04e62b9SKevin Barnett static int 9669d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9670d04e62b9SKevin Barnett struct sas_rphy *rphy) 9671d04e62b9SKevin Barnett { 9672d04e62b9SKevin Barnett struct sas_identify *identify; 9673d04e62b9SKevin Barnett 9674d04e62b9SKevin Barnett identify = &rphy->identify; 9675d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9676d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9677d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9678d04e62b9SKevin Barnett 9679d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9680d04e62b9SKevin Barnett } 9681d04e62b9SKevin Barnett 9682d04e62b9SKevin Barnett static struct hpsa_sas_port 9683d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9684d04e62b9SKevin Barnett u64 sas_address) 9685d04e62b9SKevin Barnett { 9686d04e62b9SKevin Barnett int rc; 9687d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9688d04e62b9SKevin Barnett struct sas_port *port; 9689d04e62b9SKevin Barnett 9690d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9691d04e62b9SKevin Barnett if (!hpsa_sas_port) 9692d04e62b9SKevin Barnett return NULL; 9693d04e62b9SKevin Barnett 9694d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9695d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9696d04e62b9SKevin Barnett 9697d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9698d04e62b9SKevin Barnett if (!port) 9699d04e62b9SKevin Barnett goto free_hpsa_port; 9700d04e62b9SKevin Barnett 9701d04e62b9SKevin Barnett rc = sas_port_add(port); 9702d04e62b9SKevin Barnett if (rc) 9703d04e62b9SKevin Barnett goto free_sas_port; 9704d04e62b9SKevin Barnett 9705d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9706d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9707d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9708d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9709d04e62b9SKevin Barnett 9710d04e62b9SKevin Barnett return hpsa_sas_port; 9711d04e62b9SKevin Barnett 9712d04e62b9SKevin Barnett free_sas_port: 9713d04e62b9SKevin Barnett sas_port_free(port); 9714d04e62b9SKevin Barnett free_hpsa_port: 9715d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9716d04e62b9SKevin Barnett 9717d04e62b9SKevin Barnett return NULL; 9718d04e62b9SKevin Barnett } 9719d04e62b9SKevin Barnett 9720d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9721d04e62b9SKevin Barnett { 9722d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9723d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9724d04e62b9SKevin Barnett 9725d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9726d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9727d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9728d04e62b9SKevin Barnett 9729d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9730d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9731d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9732d04e62b9SKevin Barnett } 9733d04e62b9SKevin Barnett 9734d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9735d04e62b9SKevin Barnett { 9736d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9737d04e62b9SKevin Barnett 9738d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9739d04e62b9SKevin Barnett if (hpsa_sas_node) { 9740d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9741d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9742d04e62b9SKevin Barnett } 9743d04e62b9SKevin Barnett 9744d04e62b9SKevin Barnett return hpsa_sas_node; 9745d04e62b9SKevin Barnett } 9746d04e62b9SKevin Barnett 9747d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9748d04e62b9SKevin Barnett { 9749d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9750d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9751d04e62b9SKevin Barnett 9752d04e62b9SKevin Barnett if (!hpsa_sas_node) 9753d04e62b9SKevin Barnett return; 9754d04e62b9SKevin Barnett 9755d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9756d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9757d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9758d04e62b9SKevin Barnett 9759d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9760d04e62b9SKevin Barnett } 9761d04e62b9SKevin Barnett 9762d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9763d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9764d04e62b9SKevin Barnett struct sas_rphy *rphy) 9765d04e62b9SKevin Barnett { 9766d04e62b9SKevin Barnett int i; 9767d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9768d04e62b9SKevin Barnett 9769d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9770d04e62b9SKevin Barnett device = h->dev[i]; 9771d04e62b9SKevin Barnett if (!device->sas_port) 9772d04e62b9SKevin Barnett continue; 9773d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9774d04e62b9SKevin Barnett return device; 9775d04e62b9SKevin Barnett } 9776d04e62b9SKevin Barnett 9777d04e62b9SKevin Barnett return NULL; 9778d04e62b9SKevin Barnett } 9779d04e62b9SKevin Barnett 9780d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9781d04e62b9SKevin Barnett { 9782d04e62b9SKevin Barnett int rc; 9783d04e62b9SKevin Barnett struct device *parent_dev; 9784d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9785d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9786d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9787d04e62b9SKevin Barnett 9788d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9789d04e62b9SKevin Barnett 9790d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9791d04e62b9SKevin Barnett if (!hpsa_sas_node) 9792d04e62b9SKevin Barnett return -ENOMEM; 9793d04e62b9SKevin Barnett 9794d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9795d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9796d04e62b9SKevin Barnett rc = -ENODEV; 9797d04e62b9SKevin Barnett goto free_sas_node; 9798d04e62b9SKevin Barnett } 9799d04e62b9SKevin Barnett 9800d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9801d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9802d04e62b9SKevin Barnett rc = -ENODEV; 9803d04e62b9SKevin Barnett goto free_sas_port; 9804d04e62b9SKevin Barnett } 9805d04e62b9SKevin Barnett 9806d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9807d04e62b9SKevin Barnett if (rc) 9808d04e62b9SKevin Barnett goto free_sas_phy; 9809d04e62b9SKevin Barnett 9810d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9811d04e62b9SKevin Barnett 9812d04e62b9SKevin Barnett return 0; 9813d04e62b9SKevin Barnett 9814d04e62b9SKevin Barnett free_sas_phy: 9815d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9816d04e62b9SKevin Barnett free_sas_port: 9817d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9818d04e62b9SKevin Barnett free_sas_node: 9819d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9820d04e62b9SKevin Barnett 9821d04e62b9SKevin Barnett return rc; 9822d04e62b9SKevin Barnett } 9823d04e62b9SKevin Barnett 9824d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9825d04e62b9SKevin Barnett { 9826d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9827d04e62b9SKevin Barnett } 9828d04e62b9SKevin Barnett 9829d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9830d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9831d04e62b9SKevin Barnett { 9832d04e62b9SKevin Barnett int rc; 9833d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9834d04e62b9SKevin Barnett struct sas_rphy *rphy; 9835d04e62b9SKevin Barnett 9836d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9837d04e62b9SKevin Barnett if (!hpsa_sas_port) 9838d04e62b9SKevin Barnett return -ENOMEM; 9839d04e62b9SKevin Barnett 9840d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9841d04e62b9SKevin Barnett if (!rphy) { 9842d04e62b9SKevin Barnett rc = -ENODEV; 9843d04e62b9SKevin Barnett goto free_sas_port; 9844d04e62b9SKevin Barnett } 9845d04e62b9SKevin Barnett 9846d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9847d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9848d04e62b9SKevin Barnett 9849d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9850d04e62b9SKevin Barnett if (rc) 9851d04e62b9SKevin Barnett goto free_sas_port; 9852d04e62b9SKevin Barnett 9853d04e62b9SKevin Barnett return 0; 9854d04e62b9SKevin Barnett 9855d04e62b9SKevin Barnett free_sas_port: 9856d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9857d04e62b9SKevin Barnett device->sas_port = NULL; 9858d04e62b9SKevin Barnett 9859d04e62b9SKevin Barnett return rc; 9860d04e62b9SKevin Barnett } 9861d04e62b9SKevin Barnett 9862d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9863d04e62b9SKevin Barnett { 9864d04e62b9SKevin Barnett if (device->sas_port) { 9865d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9866d04e62b9SKevin Barnett device->sas_port = NULL; 9867d04e62b9SKevin Barnett } 9868d04e62b9SKevin Barnett } 9869d04e62b9SKevin Barnett 9870d04e62b9SKevin Barnett static int 9871d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9872d04e62b9SKevin Barnett { 9873d04e62b9SKevin Barnett return 0; 9874d04e62b9SKevin Barnett } 9875d04e62b9SKevin Barnett 9876d04e62b9SKevin Barnett static int 9877d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9878d04e62b9SKevin Barnett { 9879aa105695SDan Carpenter *identifier = 0; 9880d04e62b9SKevin Barnett return 0; 9881d04e62b9SKevin Barnett } 9882d04e62b9SKevin Barnett 9883d04e62b9SKevin Barnett static int 9884d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9885d04e62b9SKevin Barnett { 9886d04e62b9SKevin Barnett return -ENXIO; 9887d04e62b9SKevin Barnett } 9888d04e62b9SKevin Barnett 9889d04e62b9SKevin Barnett static int 9890d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9891d04e62b9SKevin Barnett { 9892d04e62b9SKevin Barnett return 0; 9893d04e62b9SKevin Barnett } 9894d04e62b9SKevin Barnett 9895d04e62b9SKevin Barnett static int 9896d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9897d04e62b9SKevin Barnett { 9898d04e62b9SKevin Barnett return 0; 9899d04e62b9SKevin Barnett } 9900d04e62b9SKevin Barnett 9901d04e62b9SKevin Barnett static int 9902d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9903d04e62b9SKevin Barnett { 9904d04e62b9SKevin Barnett return 0; 9905d04e62b9SKevin Barnett } 9906d04e62b9SKevin Barnett 9907d04e62b9SKevin Barnett static void 9908d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9909d04e62b9SKevin Barnett { 9910d04e62b9SKevin Barnett } 9911d04e62b9SKevin Barnett 9912d04e62b9SKevin Barnett static int 9913d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9914d04e62b9SKevin Barnett { 9915d04e62b9SKevin Barnett return -EINVAL; 9916d04e62b9SKevin Barnett } 9917d04e62b9SKevin Barnett 9918d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9919d04e62b9SKevin Barnett static int 9920d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9921d04e62b9SKevin Barnett struct request *req) 9922d04e62b9SKevin Barnett { 9923d04e62b9SKevin Barnett return -EINVAL; 9924d04e62b9SKevin Barnett } 9925d04e62b9SKevin Barnett 9926d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9927d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9928d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9929d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9930d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9931d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9932d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9933d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9934d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9935d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9936d04e62b9SKevin Barnett }; 9937d04e62b9SKevin Barnett 9938edd16368SStephen M. Cameron /* 9939edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9940edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9941edd16368SStephen M. Cameron */ 9942edd16368SStephen M. Cameron static int __init hpsa_init(void) 9943edd16368SStephen M. Cameron { 9944d04e62b9SKevin Barnett int rc; 9945d04e62b9SKevin Barnett 9946d04e62b9SKevin Barnett hpsa_sas_transport_template = 9947d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9948d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9949d04e62b9SKevin Barnett return -ENODEV; 9950d04e62b9SKevin Barnett 9951d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9952d04e62b9SKevin Barnett 9953d04e62b9SKevin Barnett if (rc) 9954d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9955d04e62b9SKevin Barnett 9956d04e62b9SKevin Barnett return rc; 9957edd16368SStephen M. Cameron } 9958edd16368SStephen M. Cameron 9959edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9960edd16368SStephen M. Cameron { 9961edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9962d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9963edd16368SStephen M. Cameron } 9964edd16368SStephen M. Cameron 9965e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9966e1f7de0cSMatt Gates { 9967e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9968dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9969dd0e19f3SScott Teel 9970dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9971dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9972dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9973dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9974dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9975dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9976dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9977dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9978dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9979dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9980dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9981dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9982dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9983dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9984dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9985dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9986dd0e19f3SScott Teel 9987dd0e19f3SScott Teel #undef VERIFY_OFFSET 9988dd0e19f3SScott Teel 9989dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9990b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9991b66cc250SMike Miller 9992b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9993b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9994b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9995b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9996b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9997b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9998b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9999b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 10000b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 10001b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 10002b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 10003b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 10004b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 10005b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 10006b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 10007b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 10008b66cc250SMike Miller 10009b66cc250SMike Miller #undef VERIFY_OFFSET 10010b66cc250SMike Miller 10011b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 10012e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 10013e1f7de0cSMatt Gates 10014e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 10015e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 10016e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 10017e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 10018e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 10019e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 10020e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 10021e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 10022e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 10023e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 10024e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 10025e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 10026e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 10027e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 10028e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 10029e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 10030e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 10031e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 10032e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 10033e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 10034e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 10035e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 1003650a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 10037e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 10038e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 10039e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 10040e1f7de0cSMatt Gates #undef VERIFY_OFFSET 10041e1f7de0cSMatt Gates } 10042e1f7de0cSMatt Gates 10043edd16368SStephen M. Cameron module_init(hpsa_init); 10044edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10045