1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ec2c3aa9SDon Brace #define HPSA_DRIVER_VERSION "3.4.14-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2806f039790SGreg Kroah-Hartman int wait_for_ready); 28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 284fe5389c8SStephen M. Cameron #define BOARD_READY 1 28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 288c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 295d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 29634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 297edd16368SStephen M. Cameron 298edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 299edd16368SStephen M. Cameron { 300edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 301edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 302edd16368SStephen M. Cameron } 303edd16368SStephen M. Cameron 304a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 305a23513e8SStephen M. Cameron { 306a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 307a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 308a23513e8SStephen M. Cameron } 309a23513e8SStephen M. Cameron 310a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 311a58e7e53SWebb Scales { 312a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 313a58e7e53SWebb Scales } 314a58e7e53SWebb Scales 315d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 316d604f533SWebb Scales { 317d604f533SWebb Scales return c->abort_pending || c->reset_pending; 318d604f533SWebb Scales } 319d604f533SWebb Scales 3209437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3219437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3229437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3239437ac43SStephen Cameron { 3249437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3259437ac43SStephen Cameron bool rc; 3269437ac43SStephen Cameron 3279437ac43SStephen Cameron *sense_key = -1; 3289437ac43SStephen Cameron *asc = -1; 3299437ac43SStephen Cameron *ascq = -1; 3309437ac43SStephen Cameron 3319437ac43SStephen Cameron if (sense_data_len < 1) 3329437ac43SStephen Cameron return; 3339437ac43SStephen Cameron 3349437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3359437ac43SStephen Cameron if (rc) { 3369437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3379437ac43SStephen Cameron *asc = sshdr.asc; 3389437ac43SStephen Cameron *ascq = sshdr.ascq; 3399437ac43SStephen Cameron } 3409437ac43SStephen Cameron } 3419437ac43SStephen Cameron 342edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 343edd16368SStephen M. Cameron struct CommandList *c) 344edd16368SStephen M. Cameron { 3459437ac43SStephen Cameron u8 sense_key, asc, ascq; 3469437ac43SStephen Cameron int sense_len; 3479437ac43SStephen Cameron 3489437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3499437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3509437ac43SStephen Cameron else 3519437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3529437ac43SStephen Cameron 3539437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3549437ac43SStephen Cameron &sense_key, &asc, &ascq); 35581c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 356edd16368SStephen M. Cameron return 0; 357edd16368SStephen M. Cameron 3589437ac43SStephen Cameron switch (asc) { 359edd16368SStephen M. Cameron case STATE_CHANGED: 3609437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3612946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3622946e82bSRobert Elliott h->devname); 363edd16368SStephen M. Cameron break; 364edd16368SStephen M. Cameron case LUN_FAILED: 3657f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3662946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 367edd16368SStephen M. Cameron break; 368edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3697f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3702946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 371edd16368SStephen M. Cameron /* 3724f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3734f4eb9f1SScott Teel * target (array) devices. 374edd16368SStephen M. Cameron */ 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case POWER_OR_RESET: 3772946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3792946e82bSRobert Elliott h->devname); 380edd16368SStephen M. Cameron break; 381edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3822946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3832946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3842946e82bSRobert Elliott h->devname); 385edd16368SStephen M. Cameron break; 386edd16368SStephen M. Cameron default: 3872946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3882946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3892946e82bSRobert Elliott h->devname); 390edd16368SStephen M. Cameron break; 391edd16368SStephen M. Cameron } 392edd16368SStephen M. Cameron return 1; 393edd16368SStephen M. Cameron } 394edd16368SStephen M. Cameron 395852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 396852af20aSMatt Bondurant { 397852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 398852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 399852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 400852af20aSMatt Bondurant return 0; 401852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 402852af20aSMatt Bondurant return 1; 403852af20aSMatt Bondurant } 404852af20aSMatt Bondurant 405e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 406e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 407e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 408e985c58fSStephen Cameron { 409e985c58fSStephen Cameron int ld; 410e985c58fSStephen Cameron struct ctlr_info *h; 411e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 412e985c58fSStephen Cameron 413e985c58fSStephen Cameron h = shost_to_hba(shost); 414e985c58fSStephen Cameron ld = lockup_detected(h); 415e985c58fSStephen Cameron 416e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 417e985c58fSStephen Cameron } 418e985c58fSStephen Cameron 419da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 420da0697bdSScott Teel struct device_attribute *attr, 421da0697bdSScott Teel const char *buf, size_t count) 422da0697bdSScott Teel { 423da0697bdSScott Teel int status, len; 424da0697bdSScott Teel struct ctlr_info *h; 425da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 426da0697bdSScott Teel char tmpbuf[10]; 427da0697bdSScott Teel 428da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 429da0697bdSScott Teel return -EACCES; 430da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 431da0697bdSScott Teel strncpy(tmpbuf, buf, len); 432da0697bdSScott Teel tmpbuf[len] = '\0'; 433da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 434da0697bdSScott Teel return -EINVAL; 435da0697bdSScott Teel h = shost_to_hba(shost); 436da0697bdSScott Teel h->acciopath_status = !!status; 437da0697bdSScott Teel dev_warn(&h->pdev->dev, 438da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 439da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 440da0697bdSScott Teel return count; 441da0697bdSScott Teel } 442da0697bdSScott Teel 4432ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4442ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4452ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4462ba8bfc8SStephen M. Cameron { 4472ba8bfc8SStephen M. Cameron int debug_level, len; 4482ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4492ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4502ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4512ba8bfc8SStephen M. Cameron 4522ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4532ba8bfc8SStephen M. Cameron return -EACCES; 4542ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4552ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4562ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4572ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4582ba8bfc8SStephen M. Cameron return -EINVAL; 4592ba8bfc8SStephen M. Cameron if (debug_level < 0) 4602ba8bfc8SStephen M. Cameron debug_level = 0; 4612ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4622ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4632ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4642ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4652ba8bfc8SStephen M. Cameron return count; 4662ba8bfc8SStephen M. Cameron } 4672ba8bfc8SStephen M. Cameron 468edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 469edd16368SStephen M. Cameron struct device_attribute *attr, 470edd16368SStephen M. Cameron const char *buf, size_t count) 471edd16368SStephen M. Cameron { 472edd16368SStephen M. Cameron struct ctlr_info *h; 473edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 474a23513e8SStephen M. Cameron h = shost_to_hba(shost); 47531468401SMike Miller hpsa_scan_start(h->scsi_host); 476edd16368SStephen M. Cameron return count; 477edd16368SStephen M. Cameron } 478edd16368SStephen M. Cameron 479d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 480d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 481d28ce020SStephen M. Cameron { 482d28ce020SStephen M. Cameron struct ctlr_info *h; 483d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 484d28ce020SStephen M. Cameron unsigned char *fwrev; 485d28ce020SStephen M. Cameron 486d28ce020SStephen M. Cameron h = shost_to_hba(shost); 487d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 488d28ce020SStephen M. Cameron return 0; 489d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 490d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 491d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 492d28ce020SStephen M. Cameron } 493d28ce020SStephen M. Cameron 49494a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 49594a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 49694a13649SStephen M. Cameron { 49794a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 49894a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 49994a13649SStephen M. Cameron 5000cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5010cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 50294a13649SStephen M. Cameron } 50394a13649SStephen M. Cameron 504745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 505745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 506745a7a25SStephen M. Cameron { 507745a7a25SStephen M. Cameron struct ctlr_info *h; 508745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 509745a7a25SStephen M. Cameron 510745a7a25SStephen M. Cameron h = shost_to_hba(shost); 511745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 512960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 513745a7a25SStephen M. Cameron "performant" : "simple"); 514745a7a25SStephen M. Cameron } 515745a7a25SStephen M. Cameron 516da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 517da0697bdSScott Teel struct device_attribute *attr, char *buf) 518da0697bdSScott Teel { 519da0697bdSScott Teel struct ctlr_info *h; 520da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 521da0697bdSScott Teel 522da0697bdSScott Teel h = shost_to_hba(shost); 523da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 524da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 525da0697bdSScott Teel } 526da0697bdSScott Teel 52746380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 528941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 529941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 530941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 531941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 532941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 533941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 534941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 535941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 536941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 537941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 538941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 539941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 540941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5417af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 542941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 543941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5445a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5455a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5465a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5475a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5485a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5495a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 550941b1cdaSStephen M. Cameron }; 551941b1cdaSStephen M. Cameron 55246380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 55346380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5547af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5555a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5565a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5575a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5585a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5595a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5605a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56146380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 56246380786SStephen M. Cameron * which share a battery backed cache module. One controls the 56346380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56446380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 56546380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 56646380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 56746380786SStephen M. Cameron */ 56846380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 56946380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57046380786SStephen M. Cameron }; 57146380786SStephen M. Cameron 5729b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5739b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5749b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5759b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5769b5c48c2SStephen Cameron }; 5779b5c48c2SStephen Cameron 5789b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 579941b1cdaSStephen M. Cameron { 580941b1cdaSStephen M. Cameron int i; 581941b1cdaSStephen M. Cameron 5829b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5839b5c48c2SStephen Cameron if (a[i] == board_id) 584941b1cdaSStephen M. Cameron return 1; 5859b5c48c2SStephen Cameron return 0; 5869b5c48c2SStephen Cameron } 5879b5c48c2SStephen Cameron 5889b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5899b5c48c2SStephen Cameron { 5909b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5919b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 592941b1cdaSStephen M. Cameron } 593941b1cdaSStephen M. Cameron 59446380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 59546380786SStephen M. Cameron { 5969b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 5979b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 59846380786SStephen M. Cameron } 59946380786SStephen M. Cameron 60046380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60146380786SStephen M. Cameron { 60246380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60346380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60446380786SStephen M. Cameron } 60546380786SStephen M. Cameron 6069b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6079b5c48c2SStephen Cameron { 6089b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6099b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6109b5c48c2SStephen Cameron } 6119b5c48c2SStephen Cameron 612941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 613941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 614941b1cdaSStephen M. Cameron { 615941b1cdaSStephen M. Cameron struct ctlr_info *h; 616941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 617941b1cdaSStephen M. Cameron 618941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 61946380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 620941b1cdaSStephen M. Cameron } 621941b1cdaSStephen M. Cameron 622edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 623edd16368SStephen M. Cameron { 624edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 625edd16368SStephen M. Cameron } 626edd16368SStephen M. Cameron 627f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6287c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 629edd16368SStephen M. Cameron }; 6306b80b18fSScott Teel #define HPSA_RAID_0 0 6316b80b18fSScott Teel #define HPSA_RAID_4 1 6326b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6336b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6346b80b18fSScott Teel #define HPSA_RAID_51 4 6356b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6366b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6377c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6387c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 639edd16368SStephen M. Cameron 640f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 641f3f01730SKevin Barnett { 642f3f01730SKevin Barnett return !device->physical_device; 643f3f01730SKevin Barnett } 644edd16368SStephen M. Cameron 645edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 646edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 647edd16368SStephen M. Cameron { 648edd16368SStephen M. Cameron ssize_t l = 0; 64982a72c0aSStephen M. Cameron unsigned char rlevel; 650edd16368SStephen M. Cameron struct ctlr_info *h; 651edd16368SStephen M. Cameron struct scsi_device *sdev; 652edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 653edd16368SStephen M. Cameron unsigned long flags; 654edd16368SStephen M. Cameron 655edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 656edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 657edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 658edd16368SStephen M. Cameron hdev = sdev->hostdata; 659edd16368SStephen M. Cameron if (!hdev) { 660edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 661edd16368SStephen M. Cameron return -ENODEV; 662edd16368SStephen M. Cameron } 663edd16368SStephen M. Cameron 664edd16368SStephen M. Cameron /* Is this even a logical drive? */ 665f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 666edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 667edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 668edd16368SStephen M. Cameron return l; 669edd16368SStephen M. Cameron } 670edd16368SStephen M. Cameron 671edd16368SStephen M. Cameron rlevel = hdev->raid_level; 672edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67382a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 674edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 675edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 676edd16368SStephen M. Cameron return l; 677edd16368SStephen M. Cameron } 678edd16368SStephen M. Cameron 679edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 680edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 681edd16368SStephen M. Cameron { 682edd16368SStephen M. Cameron struct ctlr_info *h; 683edd16368SStephen M. Cameron struct scsi_device *sdev; 684edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 685edd16368SStephen M. Cameron unsigned long flags; 686edd16368SStephen M. Cameron unsigned char lunid[8]; 687edd16368SStephen M. Cameron 688edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 689edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 690edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 691edd16368SStephen M. Cameron hdev = sdev->hostdata; 692edd16368SStephen M. Cameron if (!hdev) { 693edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 694edd16368SStephen M. Cameron return -ENODEV; 695edd16368SStephen M. Cameron } 696edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 697edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 698edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 699edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 700edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 701edd16368SStephen M. Cameron } 702edd16368SStephen M. Cameron 703edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 704edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 705edd16368SStephen M. Cameron { 706edd16368SStephen M. Cameron struct ctlr_info *h; 707edd16368SStephen M. Cameron struct scsi_device *sdev; 708edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 709edd16368SStephen M. Cameron unsigned long flags; 710edd16368SStephen M. Cameron unsigned char sn[16]; 711edd16368SStephen M. Cameron 712edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 713edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 714edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 715edd16368SStephen M. Cameron hdev = sdev->hostdata; 716edd16368SStephen M. Cameron if (!hdev) { 717edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 718edd16368SStephen M. Cameron return -ENODEV; 719edd16368SStephen M. Cameron } 720edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 721edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 722edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 723edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 724edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 725edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 726edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 727edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 728edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 729edd16368SStephen M. Cameron } 730edd16368SStephen M. Cameron 731ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 732ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 733ded1be4aSJoseph T Handzik { 734ded1be4aSJoseph T Handzik struct ctlr_info *h; 735ded1be4aSJoseph T Handzik struct scsi_device *sdev; 736ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 737ded1be4aSJoseph T Handzik unsigned long flags; 738ded1be4aSJoseph T Handzik u64 sas_address; 739ded1be4aSJoseph T Handzik 740ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 741ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 742ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 743ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 744ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 745ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 746ded1be4aSJoseph T Handzik return -ENODEV; 747ded1be4aSJoseph T Handzik } 748ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 749ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 750ded1be4aSJoseph T Handzik 751ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 752ded1be4aSJoseph T Handzik } 753ded1be4aSJoseph T Handzik 754c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 755c1988684SScott Teel struct device_attribute *attr, char *buf) 756c1988684SScott Teel { 757c1988684SScott Teel struct ctlr_info *h; 758c1988684SScott Teel struct scsi_device *sdev; 759c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 760c1988684SScott Teel unsigned long flags; 761c1988684SScott Teel int offload_enabled; 762c1988684SScott Teel 763c1988684SScott Teel sdev = to_scsi_device(dev); 764c1988684SScott Teel h = sdev_to_hba(sdev); 765c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 766c1988684SScott Teel hdev = sdev->hostdata; 767c1988684SScott Teel if (!hdev) { 768c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 769c1988684SScott Teel return -ENODEV; 770c1988684SScott Teel } 771c1988684SScott Teel offload_enabled = hdev->offload_enabled; 772c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 773c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 774c1988684SScott Teel } 775c1988684SScott Teel 7768270b862SJoe Handzik #define MAX_PATHS 8 7778270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7788270b862SJoe Handzik struct device_attribute *attr, char *buf) 7798270b862SJoe Handzik { 7808270b862SJoe Handzik struct ctlr_info *h; 7818270b862SJoe Handzik struct scsi_device *sdev; 7828270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7838270b862SJoe Handzik unsigned long flags; 7848270b862SJoe Handzik int i; 7858270b862SJoe Handzik int output_len = 0; 7868270b862SJoe Handzik u8 box; 7878270b862SJoe Handzik u8 bay; 7888270b862SJoe Handzik u8 path_map_index = 0; 7898270b862SJoe Handzik char *active; 7908270b862SJoe Handzik unsigned char phys_connector[2]; 7918270b862SJoe Handzik 7928270b862SJoe Handzik sdev = to_scsi_device(dev); 7938270b862SJoe Handzik h = sdev_to_hba(sdev); 7948270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7958270b862SJoe Handzik hdev = sdev->hostdata; 7968270b862SJoe Handzik if (!hdev) { 7978270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 7988270b862SJoe Handzik return -ENODEV; 7998270b862SJoe Handzik } 8008270b862SJoe Handzik 8018270b862SJoe Handzik bay = hdev->bay; 8028270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8038270b862SJoe Handzik path_map_index = 1<<i; 8048270b862SJoe Handzik if (i == hdev->active_path_index) 8058270b862SJoe Handzik active = "Active"; 8068270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8078270b862SJoe Handzik active = "Inactive"; 8088270b862SJoe Handzik else 8098270b862SJoe Handzik continue; 8108270b862SJoe Handzik 8111faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8121faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8131faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8148270b862SJoe Handzik h->scsi_host->host_no, 8158270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8168270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8178270b862SJoe Handzik 818cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8192708f295SDon Brace output_len += scnprintf(buf + output_len, 8201faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8211faf072cSRasmus Villemoes "%s\n", active); 8228270b862SJoe Handzik continue; 8238270b862SJoe Handzik } 8248270b862SJoe Handzik 8258270b862SJoe Handzik box = hdev->box[i]; 8268270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8278270b862SJoe Handzik sizeof(phys_connector)); 8288270b862SJoe Handzik if (phys_connector[0] < '0') 8298270b862SJoe Handzik phys_connector[0] = '0'; 8308270b862SJoe Handzik if (phys_connector[1] < '0') 8318270b862SJoe Handzik phys_connector[1] = '0'; 8322708f295SDon Brace output_len += scnprintf(buf + output_len, 8331faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8348270b862SJoe Handzik "PORT: %.2s ", 8358270b862SJoe Handzik phys_connector); 836af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 837af15ed36SDon Brace hdev->expose_device) { 8388270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8392708f295SDon Brace output_len += scnprintf(buf + output_len, 8401faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8418270b862SJoe Handzik "BAY: %hhu %s\n", 8428270b862SJoe Handzik bay, active); 8438270b862SJoe Handzik } else { 8442708f295SDon Brace output_len += scnprintf(buf + output_len, 8451faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8468270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8478270b862SJoe Handzik box, bay, active); 8488270b862SJoe Handzik } 8498270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8502708f295SDon Brace output_len += scnprintf(buf + output_len, 8511faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8528270b862SJoe Handzik box, active); 8538270b862SJoe Handzik } else 8542708f295SDon Brace output_len += scnprintf(buf + output_len, 8551faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8568270b862SJoe Handzik } 8578270b862SJoe Handzik 8588270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8591faf072cSRasmus Villemoes return output_len; 8608270b862SJoe Handzik } 8618270b862SJoe Handzik 8623f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8633f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8643f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8653f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 866ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 867c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 868c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8698270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 870da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 871da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 872da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8732ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8742ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8753f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8763f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8773f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8783f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8793f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8803f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 881941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 882941b1cdaSStephen M. Cameron host_show_resettable, NULL); 883e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 884e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8853f5eac3aSStephen M. Cameron 8863f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8873f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8883f5eac3aSStephen M. Cameron &dev_attr_lunid, 8893f5eac3aSStephen M. Cameron &dev_attr_unique_id, 890c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8918270b862SJoe Handzik &dev_attr_path_info, 892ded1be4aSJoseph T Handzik &dev_attr_sas_address, 8933f5eac3aSStephen M. Cameron NULL, 8943f5eac3aSStephen M. Cameron }; 8953f5eac3aSStephen M. Cameron 8963f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 8973f5eac3aSStephen M. Cameron &dev_attr_rescan, 8983f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 8993f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9003f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 901941b1cdaSStephen M. Cameron &dev_attr_resettable, 902da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9032ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 904fb53c439STomas Henzl &dev_attr_lockup_detected, 9053f5eac3aSStephen M. Cameron NULL, 9063f5eac3aSStephen M. Cameron }; 9073f5eac3aSStephen M. Cameron 90841ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 90941ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 91041ce4c35SStephen Cameron 9113f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9123f5eac3aSStephen M. Cameron .module = THIS_MODULE, 913f79cfec6SStephen M. Cameron .name = HPSA, 914f79cfec6SStephen M. Cameron .proc_name = HPSA, 9153f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9163f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9173f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9187c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9193f5eac3aSStephen M. Cameron .this_id = -1, 9203f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 92175167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9223f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9233f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9243f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 92541ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9263f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9273f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9283f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9293f5eac3aSStephen M. Cameron #endif 9303f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9313f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 932c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 93354b2b50cSMartin K. Petersen .no_write_same = 1, 9343f5eac3aSStephen M. Cameron }; 9353f5eac3aSStephen M. Cameron 936254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9373f5eac3aSStephen M. Cameron { 9383f5eac3aSStephen M. Cameron u32 a; 939072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9403f5eac3aSStephen M. Cameron 941e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 942e1f7de0cSMatt Gates return h->access.command_completed(h, q); 943e1f7de0cSMatt Gates 9443f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 945254f796bSMatt Gates return h->access.command_completed(h, q); 9463f5eac3aSStephen M. Cameron 947254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 948254f796bSMatt Gates a = rq->head[rq->current_entry]; 949254f796bSMatt Gates rq->current_entry++; 9500cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9513f5eac3aSStephen M. Cameron } else { 9523f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9533f5eac3aSStephen M. Cameron } 9543f5eac3aSStephen M. Cameron /* Check for wraparound */ 955254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 956254f796bSMatt Gates rq->current_entry = 0; 957254f796bSMatt Gates rq->wraparound ^= 1; 9583f5eac3aSStephen M. Cameron } 9593f5eac3aSStephen M. Cameron return a; 9603f5eac3aSStephen M. Cameron } 9613f5eac3aSStephen M. Cameron 962c349775eSScott Teel /* 963c349775eSScott Teel * There are some special bits in the bus address of the 964c349775eSScott Teel * command that we have to set for the controller to know 965c349775eSScott Teel * how to process the command: 966c349775eSScott Teel * 967c349775eSScott Teel * Normal performant mode: 968c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 969c349775eSScott Teel * bits 1-3 = block fetch table entry 970c349775eSScott Teel * bits 4-6 = command type (== 0) 971c349775eSScott Teel * 972c349775eSScott Teel * ioaccel1 mode: 973c349775eSScott Teel * bit 0 = "performant mode" bit. 974c349775eSScott Teel * bits 1-3 = block fetch table entry 975c349775eSScott Teel * bits 4-6 = command type (== 110) 976c349775eSScott Teel * (command type is needed because ioaccel1 mode 977c349775eSScott Teel * commands are submitted through the same register as normal 978c349775eSScott Teel * mode commands, so this is how the controller knows whether 979c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 980c349775eSScott Teel * 981c349775eSScott Teel * ioaccel2 mode: 982c349775eSScott Teel * bit 0 = "performant mode" bit. 983c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 984c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 985c349775eSScott Teel * a separate special register for submitting commands. 986c349775eSScott Teel */ 987c349775eSScott Teel 98825163bd5SWebb Scales /* 98925163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9903f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9913f5eac3aSStephen M. Cameron * register number 9923f5eac3aSStephen M. Cameron */ 99325163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 99425163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 99525163bd5SWebb Scales int reply_queue) 9963f5eac3aSStephen M. Cameron { 997254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 9983f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 99925163bd5SWebb Scales if (unlikely(!h->msix_vector)) 100025163bd5SWebb Scales return; 100125163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1002254f796bSMatt Gates c->Header.ReplyQueue = 1003804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 100425163bd5SWebb Scales else 100525163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1006254f796bSMatt Gates } 10073f5eac3aSStephen M. Cameron } 10083f5eac3aSStephen M. Cameron 1009c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 101025163bd5SWebb Scales struct CommandList *c, 101125163bd5SWebb Scales int reply_queue) 1012c349775eSScott Teel { 1013c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1014c349775eSScott Teel 101525163bd5SWebb Scales /* 101625163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1017c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1018c349775eSScott Teel */ 101925163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1020c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 102125163bd5SWebb Scales else 102225163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 102325163bd5SWebb Scales /* 102425163bd5SWebb Scales * Set the bits in the address sent down to include: 1025c349775eSScott Teel * - performant mode bit (bit 0) 1026c349775eSScott Teel * - pull count (bits 1-3) 1027c349775eSScott Teel * - command type (bits 4-6) 1028c349775eSScott Teel */ 1029c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1030c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1031c349775eSScott Teel } 1032c349775eSScott Teel 10338be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10348be986ccSStephen Cameron struct CommandList *c, 10358be986ccSStephen Cameron int reply_queue) 10368be986ccSStephen Cameron { 10378be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10388be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10398be986ccSStephen Cameron 10408be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10418be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10428be986ccSStephen Cameron */ 10438be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10448be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10458be986ccSStephen Cameron else 10468be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10478be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10488be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10498be986ccSStephen Cameron * - pull count (bits 0-3) 10508be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10518be986ccSStephen Cameron */ 10528be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10538be986ccSStephen Cameron } 10548be986ccSStephen Cameron 1055c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 105625163bd5SWebb Scales struct CommandList *c, 105725163bd5SWebb Scales int reply_queue) 1058c349775eSScott Teel { 1059c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1060c349775eSScott Teel 106125163bd5SWebb Scales /* 106225163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1063c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1064c349775eSScott Teel */ 106525163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1066c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 106725163bd5SWebb Scales else 106825163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 106925163bd5SWebb Scales /* 107025163bd5SWebb Scales * Set the bits in the address sent down to include: 1071c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1072c349775eSScott Teel * - pull count (bits 0-3) 1073c349775eSScott Teel * - command type isn't needed for ioaccel2 1074c349775eSScott Teel */ 1075c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1076c349775eSScott Teel } 1077c349775eSScott Teel 1078e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1079e85c5974SStephen M. Cameron { 1080e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1081e85c5974SStephen M. Cameron } 1082e85c5974SStephen M. Cameron 1083e85c5974SStephen M. Cameron /* 1084e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1085e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1086e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1087e85c5974SStephen M. Cameron */ 1088e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1089e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1090e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1091e85c5974SStephen M. Cameron struct CommandList *c) 1092e85c5974SStephen M. Cameron { 1093e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1094e85c5974SStephen M. Cameron return; 1095e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1096e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1097e85c5974SStephen M. Cameron } 1098e85c5974SStephen M. Cameron 1099e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1100e85c5974SStephen M. Cameron struct CommandList *c) 1101e85c5974SStephen M. Cameron { 1102e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1103e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1104e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1105e85c5974SStephen M. Cameron } 1106e85c5974SStephen M. Cameron 110725163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 110825163bd5SWebb Scales struct CommandList *c, int reply_queue) 11093f5eac3aSStephen M. Cameron { 1110c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1111c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1112c349775eSScott Teel switch (c->cmd_type) { 1113c349775eSScott Teel case CMD_IOACCEL1: 111425163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1115c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1116c349775eSScott Teel break; 1117c349775eSScott Teel case CMD_IOACCEL2: 111825163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1119c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1120c349775eSScott Teel break; 11218be986ccSStephen Cameron case IOACCEL2_TMF: 11228be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11238be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11248be986ccSStephen Cameron break; 1125c349775eSScott Teel default: 112625163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1127f2405db8SDon Brace h->access.submit_command(h, c); 11283f5eac3aSStephen M. Cameron } 1129c05e8866SStephen Cameron } 11303f5eac3aSStephen M. Cameron 1131a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 113225163bd5SWebb Scales { 1133d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1134a58e7e53SWebb Scales return finish_cmd(c); 1135a58e7e53SWebb Scales 113625163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 113725163bd5SWebb Scales } 113825163bd5SWebb Scales 11393f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11403f5eac3aSStephen M. Cameron { 11413f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11423f5eac3aSStephen M. Cameron } 11433f5eac3aSStephen M. Cameron 11443f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11453f5eac3aSStephen M. Cameron { 11463f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11473f5eac3aSStephen M. Cameron return 0; 11483f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11493f5eac3aSStephen M. Cameron return 1; 11503f5eac3aSStephen M. Cameron return 0; 11513f5eac3aSStephen M. Cameron } 11523f5eac3aSStephen M. Cameron 1153edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1154edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1155edd16368SStephen M. Cameron { 1156edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1157edd16368SStephen M. Cameron * assumes h->devlock is held 1158edd16368SStephen M. Cameron */ 1159edd16368SStephen M. Cameron int i, found = 0; 1160cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1161edd16368SStephen M. Cameron 1162263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1163edd16368SStephen M. Cameron 1164edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1165edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1166263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1167edd16368SStephen M. Cameron } 1168edd16368SStephen M. Cameron 1169263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1170263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1171edd16368SStephen M. Cameron /* *bus = 1; */ 1172edd16368SStephen M. Cameron *target = i; 1173edd16368SStephen M. Cameron *lun = 0; 1174edd16368SStephen M. Cameron found = 1; 1175edd16368SStephen M. Cameron } 1176edd16368SStephen M. Cameron return !found; 1177edd16368SStephen M. Cameron } 1178edd16368SStephen M. Cameron 11791d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11800d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11810d96ef5fSWebb Scales { 11827c59a0d4SDon Brace #define LABEL_SIZE 25 11837c59a0d4SDon Brace char label[LABEL_SIZE]; 11847c59a0d4SDon Brace 11859975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11869975ec9dSDon Brace return; 11879975ec9dSDon Brace 11887c59a0d4SDon Brace switch (dev->devtype) { 11897c59a0d4SDon Brace case TYPE_RAID: 11907c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11917c59a0d4SDon Brace break; 11927c59a0d4SDon Brace case TYPE_ENCLOSURE: 11937c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11947c59a0d4SDon Brace break; 11957c59a0d4SDon Brace case TYPE_DISK: 1196af15ed36SDon Brace case TYPE_ZBC: 11977c59a0d4SDon Brace if (dev->external) 11987c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 11997c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12007c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12017c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12027c59a0d4SDon Brace else 12037c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12047c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12057c59a0d4SDon Brace raid_label[dev->raid_level]); 12067c59a0d4SDon Brace break; 12077c59a0d4SDon Brace case TYPE_ROM: 12087c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12097c59a0d4SDon Brace break; 12107c59a0d4SDon Brace case TYPE_TAPE: 12117c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12127c59a0d4SDon Brace break; 12137c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12147c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12157c59a0d4SDon Brace break; 12167c59a0d4SDon Brace default: 12177c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12187c59a0d4SDon Brace break; 12197c59a0d4SDon Brace } 12207c59a0d4SDon Brace 12210d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12227c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12230d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12240d96ef5fSWebb Scales description, 12250d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12260d96ef5fSWebb Scales dev->vendor, 12270d96ef5fSWebb Scales dev->model, 12287c59a0d4SDon Brace label, 12290d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12300d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12312a168208SKevin Barnett dev->expose_device); 12320d96ef5fSWebb Scales } 12330d96ef5fSWebb Scales 1234edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12358aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1236edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1237edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1238edd16368SStephen M. Cameron { 1239edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1240edd16368SStephen M. Cameron int n = h->ndevices; 1241edd16368SStephen M. Cameron int i; 1242edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1243edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1244edd16368SStephen M. Cameron 1245cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1246edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1247edd16368SStephen M. Cameron "inaccessible.\n"); 1248edd16368SStephen M. Cameron return -1; 1249edd16368SStephen M. Cameron } 1250edd16368SStephen M. Cameron 1251edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1252edd16368SStephen M. Cameron if (device->lun != -1) 1253edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1254edd16368SStephen M. Cameron goto lun_assigned; 1255edd16368SStephen M. Cameron 1256edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1257edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12582b08b3e9SDon Brace * unit no, zero otherwise. 1259edd16368SStephen M. Cameron */ 1260edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1261edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1262edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1263edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1264edd16368SStephen M. Cameron return -1; 1265edd16368SStephen M. Cameron goto lun_assigned; 1266edd16368SStephen M. Cameron } 1267edd16368SStephen M. Cameron 1268edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1269edd16368SStephen M. Cameron * Search through our list and find the device which 12709a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1271edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1272edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1273edd16368SStephen M. Cameron */ 1274edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1275edd16368SStephen M. Cameron addr1[4] = 0; 12769a4178b7Sshane.seymour addr1[5] = 0; 1277edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1278edd16368SStephen M. Cameron sd = h->dev[i]; 1279edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1280edd16368SStephen M. Cameron addr2[4] = 0; 12819a4178b7Sshane.seymour addr2[5] = 0; 12829a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1283edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1284edd16368SStephen M. Cameron device->bus = sd->bus; 1285edd16368SStephen M. Cameron device->target = sd->target; 1286edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1287edd16368SStephen M. Cameron break; 1288edd16368SStephen M. Cameron } 1289edd16368SStephen M. Cameron } 1290edd16368SStephen M. Cameron if (device->lun == -1) { 1291edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1292edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1293edd16368SStephen M. Cameron "configuration.\n"); 1294edd16368SStephen M. Cameron return -1; 1295edd16368SStephen M. Cameron } 1296edd16368SStephen M. Cameron 1297edd16368SStephen M. Cameron lun_assigned: 1298edd16368SStephen M. Cameron 1299edd16368SStephen M. Cameron h->dev[n] = device; 1300edd16368SStephen M. Cameron h->ndevices++; 1301edd16368SStephen M. Cameron added[*nadded] = device; 1302edd16368SStephen M. Cameron (*nadded)++; 13030d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13042a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1305a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1306a473d86cSRobert Elliott device->offload_enabled = 0; 1307edd16368SStephen M. Cameron return 0; 1308edd16368SStephen M. Cameron } 1309edd16368SStephen M. Cameron 1310bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13118aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1312bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1313bd9244f7SScott Teel { 1314a473d86cSRobert Elliott int offload_enabled; 1315bd9244f7SScott Teel /* assumes h->devlock is held */ 1316bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1317bd9244f7SScott Teel 1318bd9244f7SScott Teel /* Raid level changed. */ 1319bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1320250fb125SStephen M. Cameron 132103383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 132203383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 132303383736SDon Brace /* 132403383736SDon Brace * if drive is newly offload_enabled, we want to copy the 132503383736SDon Brace * raid map data first. If previously offload_enabled and 132603383736SDon Brace * offload_config were set, raid map data had better be 132703383736SDon Brace * the same as it was before. if raid map data is changed 132803383736SDon Brace * then it had better be the case that 132903383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 133003383736SDon Brace */ 13319fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 133203383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 133303383736SDon Brace } 1334a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1335a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1336a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1337a3144e0bSJoe Handzik } 1338a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 133903383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 134003383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 134103383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1342250fb125SStephen M. Cameron 134341ce4c35SStephen Cameron /* 134441ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 134541ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 134641ce4c35SStephen Cameron * can't do that until all the devices are updated. 134741ce4c35SStephen Cameron */ 134841ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 134941ce4c35SStephen Cameron if (!new_entry->offload_enabled) 135041ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 135141ce4c35SStephen Cameron 1352a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1353a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13540d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1355a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1356bd9244f7SScott Teel } 1357bd9244f7SScott Teel 13582a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13598aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13602a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13612a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13622a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13632a8ccf31SStephen M. Cameron { 13642a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1365cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13662a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13672a8ccf31SStephen M. Cameron (*nremoved)++; 136801350d05SStephen M. Cameron 136901350d05SStephen M. Cameron /* 137001350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 137101350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 137201350d05SStephen M. Cameron */ 137301350d05SStephen M. Cameron if (new_entry->target == -1) { 137401350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 137501350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 137601350d05SStephen M. Cameron } 137701350d05SStephen M. Cameron 13782a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13792a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13802a8ccf31SStephen M. Cameron (*nadded)++; 13810d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1382a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1383a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13842a8ccf31SStephen M. Cameron } 13852a8ccf31SStephen M. Cameron 1386edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13878aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1388edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1389edd16368SStephen M. Cameron { 1390edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1391edd16368SStephen M. Cameron int i; 1392edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1393edd16368SStephen M. Cameron 1394cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1395edd16368SStephen M. Cameron 1396edd16368SStephen M. Cameron sd = h->dev[entry]; 1397edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1398edd16368SStephen M. Cameron (*nremoved)++; 1399edd16368SStephen M. Cameron 1400edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1401edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1402edd16368SStephen M. Cameron h->ndevices--; 14030d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1404edd16368SStephen M. Cameron } 1405edd16368SStephen M. Cameron 1406edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1407edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1408edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1409edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1410edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1411edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1412edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1413edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1414edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1415edd16368SStephen M. Cameron 1416edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1417edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1418edd16368SStephen M. Cameron { 1419edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1420edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1421edd16368SStephen M. Cameron */ 1422edd16368SStephen M. Cameron unsigned long flags; 1423edd16368SStephen M. Cameron int i, j; 1424edd16368SStephen M. Cameron 1425edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1426edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1427edd16368SStephen M. Cameron if (h->dev[i] == added) { 1428edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1429edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1430edd16368SStephen M. Cameron h->ndevices--; 1431edd16368SStephen M. Cameron break; 1432edd16368SStephen M. Cameron } 1433edd16368SStephen M. Cameron } 1434edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1435edd16368SStephen M. Cameron kfree(added); 1436edd16368SStephen M. Cameron } 1437edd16368SStephen M. Cameron 1438edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1439edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1440edd16368SStephen M. Cameron { 1441edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1442edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1443edd16368SStephen M. Cameron * to differ first 1444edd16368SStephen M. Cameron */ 1445edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1446edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1447edd16368SStephen M. Cameron return 0; 1448edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1449edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1450edd16368SStephen M. Cameron return 0; 1451edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1452edd16368SStephen M. Cameron return 0; 1453edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1454edd16368SStephen M. Cameron return 0; 1455edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1456edd16368SStephen M. Cameron return 0; 1457edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1458edd16368SStephen M. Cameron return 0; 1459edd16368SStephen M. Cameron return 1; 1460edd16368SStephen M. Cameron } 1461edd16368SStephen M. Cameron 1462bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1463bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1464bd9244f7SScott Teel { 1465bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1466bd9244f7SScott Teel * that the device is a different device, nor that the OS 1467bd9244f7SScott Teel * needs to be told anything about the change. 1468bd9244f7SScott Teel */ 1469bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1470bd9244f7SScott Teel return 1; 1471250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1472250fb125SStephen M. Cameron return 1; 1473250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1474250fb125SStephen M. Cameron return 1; 147593849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 147603383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 147703383736SDon Brace return 1; 1478bd9244f7SScott Teel return 0; 1479bd9244f7SScott Teel } 1480bd9244f7SScott Teel 1481edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1482edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1483edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1484bd9244f7SScott Teel * location in *index. 1485bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1486bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1487bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1488edd16368SStephen M. Cameron */ 1489edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1490edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1491edd16368SStephen M. Cameron int *index) 1492edd16368SStephen M. Cameron { 1493edd16368SStephen M. Cameron int i; 1494edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1495edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1496edd16368SStephen M. Cameron #define DEVICE_SAME 2 1497bd9244f7SScott Teel #define DEVICE_UPDATED 3 14981d33d85dSDon Brace if (needle == NULL) 14991d33d85dSDon Brace return DEVICE_NOT_FOUND; 15001d33d85dSDon Brace 1501edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 150223231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 150323231048SStephen M. Cameron continue; 1504edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1505edd16368SStephen M. Cameron *index = i; 1506bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1507bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1508bd9244f7SScott Teel return DEVICE_UPDATED; 1509edd16368SStephen M. Cameron return DEVICE_SAME; 1510bd9244f7SScott Teel } else { 15119846590eSStephen M. Cameron /* Keep offline devices offline */ 15129846590eSStephen M. Cameron if (needle->volume_offline) 15139846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1514edd16368SStephen M. Cameron return DEVICE_CHANGED; 1515edd16368SStephen M. Cameron } 1516edd16368SStephen M. Cameron } 1517bd9244f7SScott Teel } 1518edd16368SStephen M. Cameron *index = -1; 1519edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1520edd16368SStephen M. Cameron } 1521edd16368SStephen M. Cameron 15229846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15239846590eSStephen M. Cameron unsigned char scsi3addr[]) 15249846590eSStephen M. Cameron { 15259846590eSStephen M. Cameron struct offline_device_entry *device; 15269846590eSStephen M. Cameron unsigned long flags; 15279846590eSStephen M. Cameron 15289846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15299846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15309846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15319846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15329846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15339846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15349846590eSStephen M. Cameron return; 15359846590eSStephen M. Cameron } 15369846590eSStephen M. Cameron } 15379846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15389846590eSStephen M. Cameron 15399846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15409846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15419846590eSStephen M. Cameron if (!device) { 15429846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15439846590eSStephen M. Cameron return; 15449846590eSStephen M. Cameron } 15459846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15469846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15479846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15489846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15499846590eSStephen M. Cameron } 15509846590eSStephen M. Cameron 15519846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15529846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15539846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15549846590eSStephen M. Cameron { 15559846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15569846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15579846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15589846590eSStephen M. Cameron h->scsi_host->host_no, 15599846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15609846590eSStephen M. Cameron switch (sd->volume_offline) { 15619846590eSStephen M. Cameron case HPSA_LV_OK: 15629846590eSStephen M. Cameron break; 15639846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15649846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15659846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15669846590eSStephen M. Cameron h->scsi_host->host_no, 15679846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15689846590eSStephen M. Cameron break; 15695ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15705ca01204SScott Benesh dev_info(&h->pdev->dev, 15715ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15725ca01204SScott Benesh h->scsi_host->host_no, 15735ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15745ca01204SScott Benesh break; 15759846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15769846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15775ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15789846590eSStephen M. Cameron h->scsi_host->host_no, 15799846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15809846590eSStephen M. Cameron break; 15819846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15829846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15839846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15849846590eSStephen M. Cameron h->scsi_host->host_no, 15859846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15869846590eSStephen M. Cameron break; 15879846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15889846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15899846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15909846590eSStephen M. Cameron h->scsi_host->host_no, 15919846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15929846590eSStephen M. Cameron break; 15939846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15949846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15959846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15969846590eSStephen M. Cameron h->scsi_host->host_no, 15979846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15989846590eSStephen M. Cameron break; 15999846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16009846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16019846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16029846590eSStephen M. Cameron h->scsi_host->host_no, 16039846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16049846590eSStephen M. Cameron break; 16059846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16069846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16079846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16089846590eSStephen M. Cameron h->scsi_host->host_no, 16099846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16109846590eSStephen M. Cameron break; 16119846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16129846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16139846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16149846590eSStephen M. Cameron h->scsi_host->host_no, 16159846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16169846590eSStephen M. Cameron break; 16179846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16189846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16199846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16209846590eSStephen M. Cameron h->scsi_host->host_no, 16219846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16229846590eSStephen M. Cameron break; 16239846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16249846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16259846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16269846590eSStephen M. Cameron h->scsi_host->host_no, 16279846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16289846590eSStephen M. Cameron break; 16299846590eSStephen M. Cameron } 16309846590eSStephen M. Cameron } 16319846590eSStephen M. Cameron 163203383736SDon Brace /* 163303383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 163403383736SDon Brace * raid offload configured. 163503383736SDon Brace */ 163603383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 163703383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 163803383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 163903383736SDon Brace { 164003383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 164103383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 164203383736SDon Brace int i, j; 164303383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 164403383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 164503383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 164603383736SDon Brace le16_to_cpu(map->layout_map_count) * 164703383736SDon Brace total_disks_per_row; 164803383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 164903383736SDon Brace total_disks_per_row; 165003383736SDon Brace int qdepth; 165103383736SDon Brace 165203383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 165303383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 165403383736SDon Brace 1655d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1656d604f533SWebb Scales 165703383736SDon Brace qdepth = 0; 165803383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 165903383736SDon Brace logical_drive->phys_disk[i] = NULL; 166003383736SDon Brace if (!logical_drive->offload_config) 166103383736SDon Brace continue; 166203383736SDon Brace for (j = 0; j < ndevices; j++) { 16631d33d85dSDon Brace if (dev[j] == NULL) 16641d33d85dSDon Brace continue; 166503383736SDon Brace if (dev[j]->devtype != TYPE_DISK) 166603383736SDon Brace continue; 1667af15ed36SDon Brace if (dev[j]->devtype != TYPE_ZBC) 1668af15ed36SDon Brace continue; 1669f3f01730SKevin Barnett if (is_logical_device(dev[j])) 167003383736SDon Brace continue; 167103383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 167203383736SDon Brace continue; 167303383736SDon Brace 167403383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 167503383736SDon Brace if (i < nphys_disk) 167603383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 167703383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 167803383736SDon Brace break; 167903383736SDon Brace } 168003383736SDon Brace 168103383736SDon Brace /* 168203383736SDon Brace * This can happen if a physical drive is removed and 168303383736SDon Brace * the logical drive is degraded. In that case, the RAID 168403383736SDon Brace * map data will refer to a physical disk which isn't actually 168503383736SDon Brace * present. And in that case offload_enabled should already 168603383736SDon Brace * be 0, but we'll turn it off here just in case 168703383736SDon Brace */ 168803383736SDon Brace if (!logical_drive->phys_disk[i]) { 168903383736SDon Brace logical_drive->offload_enabled = 0; 169041ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 169141ce4c35SStephen Cameron logical_drive->queue_depth = 8; 169203383736SDon Brace } 169303383736SDon Brace } 169403383736SDon Brace if (nraid_map_entries) 169503383736SDon Brace /* 169603383736SDon Brace * This is correct for reads, too high for full stripe writes, 169703383736SDon Brace * way too high for partial stripe writes 169803383736SDon Brace */ 169903383736SDon Brace logical_drive->queue_depth = qdepth; 170003383736SDon Brace else 170103383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 170203383736SDon Brace } 170303383736SDon Brace 170403383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 170503383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 170603383736SDon Brace { 170703383736SDon Brace int i; 170803383736SDon Brace 170903383736SDon Brace for (i = 0; i < ndevices; i++) { 17101d33d85dSDon Brace if (dev[i] == NULL) 17111d33d85dSDon Brace continue; 171203383736SDon Brace if (dev[i]->devtype != TYPE_DISK) 171303383736SDon Brace continue; 1714af15ed36SDon Brace if (dev[i]->devtype != TYPE_ZBC) 1715af15ed36SDon Brace continue; 1716f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 171703383736SDon Brace continue; 171841ce4c35SStephen Cameron 171941ce4c35SStephen Cameron /* 172041ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 172141ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 172241ce4c35SStephen Cameron * and since it isn't changing, we do not need to 172341ce4c35SStephen Cameron * update it. 172441ce4c35SStephen Cameron */ 172541ce4c35SStephen Cameron if (dev[i]->offload_enabled) 172641ce4c35SStephen Cameron continue; 172741ce4c35SStephen Cameron 172803383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 172903383736SDon Brace } 173003383736SDon Brace } 173103383736SDon Brace 1732096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1733096ccff4SKevin Barnett { 1734096ccff4SKevin Barnett int rc = 0; 1735096ccff4SKevin Barnett 1736096ccff4SKevin Barnett if (!h->scsi_host) 1737096ccff4SKevin Barnett return 1; 1738096ccff4SKevin Barnett 1739d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1740096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1741096ccff4SKevin Barnett device->target, device->lun); 1742d04e62b9SKevin Barnett else /* HBA */ 1743d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1744d04e62b9SKevin Barnett 1745096ccff4SKevin Barnett return rc; 1746096ccff4SKevin Barnett } 1747096ccff4SKevin Barnett 1748096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1749096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1750096ccff4SKevin Barnett { 1751096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1752096ccff4SKevin Barnett 1753096ccff4SKevin Barnett if (!h->scsi_host) 1754096ccff4SKevin Barnett return; 1755096ccff4SKevin Barnett 1756d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1757096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1758096ccff4SKevin Barnett device->target, device->lun); 1759096ccff4SKevin Barnett if (sdev) { 1760096ccff4SKevin Barnett scsi_remove_device(sdev); 1761096ccff4SKevin Barnett scsi_device_put(sdev); 1762096ccff4SKevin Barnett } else { 1763096ccff4SKevin Barnett /* 1764096ccff4SKevin Barnett * We don't expect to get here. Future commands 1765096ccff4SKevin Barnett * to this device will get a selection timeout as 1766096ccff4SKevin Barnett * if the device were gone. 1767096ccff4SKevin Barnett */ 1768096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1769096ccff4SKevin Barnett "didn't find device for removal."); 1770096ccff4SKevin Barnett } 1771d04e62b9SKevin Barnett } else /* HBA */ 1772d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1773096ccff4SKevin Barnett } 1774096ccff4SKevin Barnett 17758aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1776edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1777edd16368SStephen M. Cameron { 1778edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1779edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1780edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1781edd16368SStephen M. Cameron */ 1782edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1783edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1784edd16368SStephen M. Cameron unsigned long flags; 1785edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1786edd16368SStephen M. Cameron int nadded, nremoved; 1787edd16368SStephen M. Cameron 1788da03ded0SDon Brace /* 1789da03ded0SDon Brace * A reset can cause a device status to change 1790da03ded0SDon Brace * re-schedule the scan to see what happened. 1791da03ded0SDon Brace */ 1792da03ded0SDon Brace if (h->reset_in_progress) { 1793da03ded0SDon Brace h->drv_req_rescan = 1; 1794da03ded0SDon Brace return; 1795da03ded0SDon Brace } 1796edd16368SStephen M. Cameron 1797cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1798cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1799edd16368SStephen M. Cameron 1800edd16368SStephen M. Cameron if (!added || !removed) { 1801edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1802edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1803edd16368SStephen M. Cameron goto free_and_out; 1804edd16368SStephen M. Cameron } 1805edd16368SStephen M. Cameron 1806edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1807edd16368SStephen M. Cameron 1808edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1809edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1810edd16368SStephen M. Cameron * devices which have changed, remove the old device 1811edd16368SStephen M. Cameron * info and add the new device info. 1812bd9244f7SScott Teel * If minor device attributes change, just update 1813bd9244f7SScott Teel * the existing device structure. 1814edd16368SStephen M. Cameron */ 1815edd16368SStephen M. Cameron i = 0; 1816edd16368SStephen M. Cameron nremoved = 0; 1817edd16368SStephen M. Cameron nadded = 0; 1818edd16368SStephen M. Cameron while (i < h->ndevices) { 1819edd16368SStephen M. Cameron csd = h->dev[i]; 1820edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1821edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1822edd16368SStephen M. Cameron changes++; 18238aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1824edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1825edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1826edd16368SStephen M. Cameron changes++; 18278aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18282a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1829c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1830c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1831c7f172dcSStephen M. Cameron */ 1832c7f172dcSStephen M. Cameron sd[entry] = NULL; 1833bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18348aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1835edd16368SStephen M. Cameron } 1836edd16368SStephen M. Cameron i++; 1837edd16368SStephen M. Cameron } 1838edd16368SStephen M. Cameron 1839edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1840edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1841edd16368SStephen M. Cameron */ 1842edd16368SStephen M. Cameron 1843edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1844edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1845edd16368SStephen M. Cameron continue; 18469846590eSStephen M. Cameron 18479846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 18489846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 18499846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 18509846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 18519846590eSStephen M. Cameron */ 18529846590eSStephen M. Cameron if (sd[i]->volume_offline) { 18539846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 18540d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 18559846590eSStephen M. Cameron continue; 18569846590eSStephen M. Cameron } 18579846590eSStephen M. Cameron 1858edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1859edd16368SStephen M. Cameron h->ndevices, &entry); 1860edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1861edd16368SStephen M. Cameron changes++; 18628aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1863edd16368SStephen M. Cameron break; 1864edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1865edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1866edd16368SStephen M. Cameron /* should never happen... */ 1867edd16368SStephen M. Cameron changes++; 1868edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1869edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1870edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1871edd16368SStephen M. Cameron } 1872edd16368SStephen M. Cameron } 187341ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 187441ce4c35SStephen Cameron 187541ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 187641ce4c35SStephen Cameron * any logical drives that need it enabled. 187741ce4c35SStephen Cameron */ 18781d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 18791d33d85dSDon Brace if (h->dev[i] == NULL) 18801d33d85dSDon Brace continue; 188141ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 18821d33d85dSDon Brace } 188341ce4c35SStephen Cameron 1884edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1885edd16368SStephen M. Cameron 18869846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 18879846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 18889846590eSStephen M. Cameron * so don't touch h->dev[] 18899846590eSStephen M. Cameron */ 18909846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 18919846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 18929846590eSStephen M. Cameron continue; 18939846590eSStephen M. Cameron if (sd[i]->volume_offline) 18949846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 18959846590eSStephen M. Cameron } 18969846590eSStephen M. Cameron 1897edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1898edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1899edd16368SStephen M. Cameron * first time through. 1900edd16368SStephen M. Cameron */ 19018aa60681SDon Brace if (!changes) 1902edd16368SStephen M. Cameron goto free_and_out; 1903edd16368SStephen M. Cameron 1904edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1905edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19061d33d85dSDon Brace if (removed[i] == NULL) 19071d33d85dSDon Brace continue; 1908096ccff4SKevin Barnett if (removed[i]->expose_device) 1909096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1910edd16368SStephen M. Cameron kfree(removed[i]); 1911edd16368SStephen M. Cameron removed[i] = NULL; 1912edd16368SStephen M. Cameron } 1913edd16368SStephen M. Cameron 1914edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1915edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1916096ccff4SKevin Barnett int rc = 0; 1917096ccff4SKevin Barnett 19181d33d85dSDon Brace if (added[i] == NULL) 191941ce4c35SStephen Cameron continue; 19202a168208SKevin Barnett if (!(added[i]->expose_device)) 1921edd16368SStephen M. Cameron continue; 1922096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1923096ccff4SKevin Barnett if (!rc) 1924edd16368SStephen M. Cameron continue; 1925096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1926096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1927edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1928edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1929edd16368SStephen M. Cameron */ 1930edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1931853633e8SDon Brace h->drv_req_rescan = 1; 1932edd16368SStephen M. Cameron } 1933edd16368SStephen M. Cameron 1934edd16368SStephen M. Cameron free_and_out: 1935edd16368SStephen M. Cameron kfree(added); 1936edd16368SStephen M. Cameron kfree(removed); 1937edd16368SStephen M. Cameron } 1938edd16368SStephen M. Cameron 1939edd16368SStephen M. Cameron /* 19409e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1941edd16368SStephen M. Cameron * Assume's h->devlock is held. 1942edd16368SStephen M. Cameron */ 1943edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1944edd16368SStephen M. Cameron int bus, int target, int lun) 1945edd16368SStephen M. Cameron { 1946edd16368SStephen M. Cameron int i; 1947edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1948edd16368SStephen M. Cameron 1949edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1950edd16368SStephen M. Cameron sd = h->dev[i]; 1951edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 1952edd16368SStephen M. Cameron return sd; 1953edd16368SStephen M. Cameron } 1954edd16368SStephen M. Cameron return NULL; 1955edd16368SStephen M. Cameron } 1956edd16368SStephen M. Cameron 1957edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 1958edd16368SStephen M. Cameron { 1959edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1960edd16368SStephen M. Cameron unsigned long flags; 1961edd16368SStephen M. Cameron struct ctlr_info *h; 1962edd16368SStephen M. Cameron 1963edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 1964edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1965d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 1966d04e62b9SKevin Barnett struct scsi_target *starget; 1967d04e62b9SKevin Barnett struct sas_rphy *rphy; 1968d04e62b9SKevin Barnett 1969d04e62b9SKevin Barnett starget = scsi_target(sdev); 1970d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 1971d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 1972d04e62b9SKevin Barnett if (sd) { 1973d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 1974d04e62b9SKevin Barnett sd->lun = sdev->lun; 1975d04e62b9SKevin Barnett } 1976d04e62b9SKevin Barnett } else 1977edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1978edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 1979d04e62b9SKevin Barnett 1980d04e62b9SKevin Barnett if (sd && sd->expose_device) { 198103383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 1982d04e62b9SKevin Barnett sdev->hostdata = sd; 198341ce4c35SStephen Cameron } else 198441ce4c35SStephen Cameron sdev->hostdata = NULL; 1985edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1986edd16368SStephen M. Cameron return 0; 1987edd16368SStephen M. Cameron } 1988edd16368SStephen M. Cameron 198941ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 199041ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 199141ce4c35SStephen Cameron { 199241ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 199341ce4c35SStephen Cameron int queue_depth; 199441ce4c35SStephen Cameron 199541ce4c35SStephen Cameron sd = sdev->hostdata; 19962a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 199741ce4c35SStephen Cameron 199841ce4c35SStephen Cameron if (sd) 199941ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 200041ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 200141ce4c35SStephen Cameron else 200241ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 200341ce4c35SStephen Cameron 200441ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 200541ce4c35SStephen Cameron 200641ce4c35SStephen Cameron return 0; 200741ce4c35SStephen Cameron } 200841ce4c35SStephen Cameron 2009edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2010edd16368SStephen M. Cameron { 2011bcc44255SStephen M. Cameron /* nothing to do. */ 2012edd16368SStephen M. Cameron } 2013edd16368SStephen M. Cameron 2014d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2015d9a729f3SWebb Scales { 2016d9a729f3SWebb Scales int i; 2017d9a729f3SWebb Scales 2018d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2019d9a729f3SWebb Scales return; 2020d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2021d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2022d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2023d9a729f3SWebb Scales } 2024d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2025d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2026d9a729f3SWebb Scales } 2027d9a729f3SWebb Scales 2028d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2029d9a729f3SWebb Scales { 2030d9a729f3SWebb Scales int i; 2031d9a729f3SWebb Scales 2032d9a729f3SWebb Scales if (h->chainsize <= 0) 2033d9a729f3SWebb Scales return 0; 2034d9a729f3SWebb Scales 2035d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2036d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2037d9a729f3SWebb Scales GFP_KERNEL); 2038d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2039d9a729f3SWebb Scales return -ENOMEM; 2040d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2041d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2042d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2043d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2044d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2045d9a729f3SWebb Scales goto clean; 2046d9a729f3SWebb Scales } 2047d9a729f3SWebb Scales return 0; 2048d9a729f3SWebb Scales 2049d9a729f3SWebb Scales clean: 2050d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2051d9a729f3SWebb Scales return -ENOMEM; 2052d9a729f3SWebb Scales } 2053d9a729f3SWebb Scales 205433a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 205533a2ffceSStephen M. Cameron { 205633a2ffceSStephen M. Cameron int i; 205733a2ffceSStephen M. Cameron 205833a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 205933a2ffceSStephen M. Cameron return; 206033a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 206133a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 206233a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 206333a2ffceSStephen M. Cameron } 206433a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 206533a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 206633a2ffceSStephen M. Cameron } 206733a2ffceSStephen M. Cameron 2068105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 206933a2ffceSStephen M. Cameron { 207033a2ffceSStephen M. Cameron int i; 207133a2ffceSStephen M. Cameron 207233a2ffceSStephen M. Cameron if (h->chainsize <= 0) 207333a2ffceSStephen M. Cameron return 0; 207433a2ffceSStephen M. Cameron 207533a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 207633a2ffceSStephen M. Cameron GFP_KERNEL); 20773d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 20783d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 207933a2ffceSStephen M. Cameron return -ENOMEM; 20803d4e6af8SRobert Elliott } 208133a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 208233a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 208333a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 20843d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 20853d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 208633a2ffceSStephen M. Cameron goto clean; 208733a2ffceSStephen M. Cameron } 20883d4e6af8SRobert Elliott } 208933a2ffceSStephen M. Cameron return 0; 209033a2ffceSStephen M. Cameron 209133a2ffceSStephen M. Cameron clean: 209233a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 209333a2ffceSStephen M. Cameron return -ENOMEM; 209433a2ffceSStephen M. Cameron } 209533a2ffceSStephen M. Cameron 2096d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2097d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2098d9a729f3SWebb Scales { 2099d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2100d9a729f3SWebb Scales u64 temp64; 2101d9a729f3SWebb Scales u32 chain_size; 2102d9a729f3SWebb Scales 2103d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2104a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2105d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2106d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2107d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2108d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2109d9a729f3SWebb Scales cp->sg->address = 0; 2110d9a729f3SWebb Scales return -1; 2111d9a729f3SWebb Scales } 2112d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2113d9a729f3SWebb Scales return 0; 2114d9a729f3SWebb Scales } 2115d9a729f3SWebb Scales 2116d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2117d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2118d9a729f3SWebb Scales { 2119d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2120d9a729f3SWebb Scales u64 temp64; 2121d9a729f3SWebb Scales u32 chain_size; 2122d9a729f3SWebb Scales 2123d9a729f3SWebb Scales chain_sg = cp->sg; 2124d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2125a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2126d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2127d9a729f3SWebb Scales } 2128d9a729f3SWebb Scales 2129e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 213033a2ffceSStephen M. Cameron struct CommandList *c) 213133a2ffceSStephen M. Cameron { 213233a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 213333a2ffceSStephen M. Cameron u64 temp64; 213450a0decfSStephen M. Cameron u32 chain_len; 213533a2ffceSStephen M. Cameron 213633a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 213733a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 213850a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 213950a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21402b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 214150a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 214250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 214333a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2144e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2145e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 214650a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2147e2bea6dfSStephen M. Cameron return -1; 2148e2bea6dfSStephen M. Cameron } 214950a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2150e2bea6dfSStephen M. Cameron return 0; 215133a2ffceSStephen M. Cameron } 215233a2ffceSStephen M. Cameron 215333a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 215433a2ffceSStephen M. Cameron struct CommandList *c) 215533a2ffceSStephen M. Cameron { 215633a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 215733a2ffceSStephen M. Cameron 215850a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 215933a2ffceSStephen M. Cameron return; 216033a2ffceSStephen M. Cameron 216133a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 216250a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 216350a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 216433a2ffceSStephen M. Cameron } 216533a2ffceSStephen M. Cameron 2166a09c1441SScott Teel 2167a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2168a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2169a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2170a09c1441SScott Teel */ 2171a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2172c349775eSScott Teel struct CommandList *c, 2173c349775eSScott Teel struct scsi_cmnd *cmd, 2174c349775eSScott Teel struct io_accel2_cmd *c2) 2175c349775eSScott Teel { 2176c349775eSScott Teel int data_len; 2177a09c1441SScott Teel int retry = 0; 2178c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2179c349775eSScott Teel 2180c349775eSScott Teel switch (c2->error_data.serv_response) { 2181c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2182c349775eSScott Teel switch (c2->error_data.status) { 2183c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2184c349775eSScott Teel break; 2185c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2186ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2187c349775eSScott Teel if (c2->error_data.data_present != 2188ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2189ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2190ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2191c349775eSScott Teel break; 2192ee6b1889SStephen M. Cameron } 2193c349775eSScott Teel /* copy the sense data */ 2194c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2195c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2196c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2197c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2198c349775eSScott Teel data_len = 2199c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2200c349775eSScott Teel memcpy(cmd->sense_buffer, 2201c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2202a09c1441SScott Teel retry = 1; 2203c349775eSScott Teel break; 2204c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2205a09c1441SScott Teel retry = 1; 2206c349775eSScott Teel break; 2207c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2208a09c1441SScott Teel retry = 1; 2209c349775eSScott Teel break; 2210c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22114a8da22bSStephen Cameron retry = 1; 2212c349775eSScott Teel break; 2213c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2214a09c1441SScott Teel retry = 1; 2215c349775eSScott Teel break; 2216c349775eSScott Teel default: 2217a09c1441SScott Teel retry = 1; 2218c349775eSScott Teel break; 2219c349775eSScott Teel } 2220c349775eSScott Teel break; 2221c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2222c40820d5SJoe Handzik switch (c2->error_data.status) { 2223c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2224c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2225c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2226c40820d5SJoe Handzik retry = 1; 2227c40820d5SJoe Handzik break; 2228c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2229c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2230c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2231c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2232c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2233c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2234c40820d5SJoe Handzik break; 2235c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2236c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2237c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2238c40820d5SJoe Handzik /* We will get an event from ctlr to trigger rescan */ 2239c40820d5SJoe Handzik retry = 1; 2240c40820d5SJoe Handzik break; 2241c40820d5SJoe Handzik default: 2242c40820d5SJoe Handzik retry = 1; 2243c40820d5SJoe Handzik } 2244c349775eSScott Teel break; 2245c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2246c349775eSScott Teel break; 2247c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2248c349775eSScott Teel break; 2249c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2250a09c1441SScott Teel retry = 1; 2251c349775eSScott Teel break; 2252c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2253c349775eSScott Teel break; 2254c349775eSScott Teel default: 2255a09c1441SScott Teel retry = 1; 2256c349775eSScott Teel break; 2257c349775eSScott Teel } 2258a09c1441SScott Teel 2259a09c1441SScott Teel return retry; /* retry on raid path? */ 2260c349775eSScott Teel } 2261c349775eSScott Teel 2262a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2263a58e7e53SWebb Scales struct CommandList *c) 2264a58e7e53SWebb Scales { 2265d604f533SWebb Scales bool do_wake = false; 2266d604f533SWebb Scales 2267a58e7e53SWebb Scales /* 2268a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2269a58e7e53SWebb Scales * 2270a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2271a58e7e53SWebb Scales * 2. The SCSI command completes 2272a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2273a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2274a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2275a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2276a58e7e53SWebb Scales * Now we have aborted the wrong command. 2277a58e7e53SWebb Scales * 2278d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2279d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2280a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2281a58e7e53SWebb Scales */ 2282a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2283d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2284a58e7e53SWebb Scales if (c->abort_pending) { 2285d604f533SWebb Scales do_wake = true; 2286a58e7e53SWebb Scales c->abort_pending = false; 2287a58e7e53SWebb Scales } 2288d604f533SWebb Scales if (c->reset_pending) { 2289d604f533SWebb Scales unsigned long flags; 2290d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2291d604f533SWebb Scales 2292d604f533SWebb Scales /* 2293d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2294d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2295d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2296d604f533SWebb Scales */ 2297d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2298d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2299d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2300d604f533SWebb Scales do_wake = true; 2301d604f533SWebb Scales c->reset_pending = NULL; 2302d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2303d604f533SWebb Scales } 2304d604f533SWebb Scales 2305d604f533SWebb Scales if (do_wake) 2306d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2307a58e7e53SWebb Scales } 2308a58e7e53SWebb Scales 230973153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 231073153fe5SWebb Scales struct CommandList *c) 231173153fe5SWebb Scales { 231273153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 231373153fe5SWebb Scales cmd_tagged_free(h, c); 231473153fe5SWebb Scales } 231573153fe5SWebb Scales 23168a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 23178a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 23188a0ff92cSWebb Scales { 231973153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 23208a0ff92cSWebb Scales cmd->scsi_done(cmd); 23218a0ff92cSWebb Scales } 23228a0ff92cSWebb Scales 23238a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 23248a0ff92cSWebb Scales { 23258a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 23268a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 23278a0ff92cSWebb Scales } 23288a0ff92cSWebb Scales 2329a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2330a58e7e53SWebb Scales { 2331a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2332a58e7e53SWebb Scales } 2333a58e7e53SWebb Scales 2334a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2335a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2336a58e7e53SWebb Scales { 2337a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2338a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2339a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 234073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2341a58e7e53SWebb Scales } 2342a58e7e53SWebb Scales 2343c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2344c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2345c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2346c349775eSScott Teel { 2347c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2348c349775eSScott Teel 2349c349775eSScott Teel /* check for good status */ 2350c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 23518a0ff92cSWebb Scales c2->error_data.status == 0)) 23528a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2353c349775eSScott Teel 23548a0ff92cSWebb Scales /* 23558a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2356c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2357c349775eSScott Teel * wrong. 2358c349775eSScott Teel */ 2359f3f01730SKevin Barnett if (is_logical_device(dev) && 2360c349775eSScott Teel c2->error_data.serv_response == 2361c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2362080ef1ccSDon Brace if (c2->error_data.status == 2363080ef1ccSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) 2364c349775eSScott Teel dev->offload_enabled = 0; 23658a0ff92cSWebb Scales 23668a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2367080ef1ccSDon Brace } 2368080ef1ccSDon Brace 2369080ef1ccSDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2)) 23708a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2371080ef1ccSDon Brace 23728a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2373c349775eSScott Teel } 2374c349775eSScott Teel 23759437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 23769437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 23779437ac43SStephen Cameron struct CommandList *cp) 23789437ac43SStephen Cameron { 23799437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 23809437ac43SStephen Cameron 23819437ac43SStephen Cameron switch (tmf_status) { 23829437ac43SStephen Cameron case CISS_TMF_COMPLETE: 23839437ac43SStephen Cameron /* 23849437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 23859437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 23869437ac43SStephen Cameron */ 23879437ac43SStephen Cameron case CISS_TMF_SUCCESS: 23889437ac43SStephen Cameron return 0; 23899437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 23909437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 23919437ac43SStephen Cameron case CISS_TMF_FAILED: 23929437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 23939437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 23949437ac43SStephen Cameron break; 23959437ac43SStephen Cameron default: 23969437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 23979437ac43SStephen Cameron tmf_status); 23989437ac43SStephen Cameron break; 23999437ac43SStephen Cameron } 24009437ac43SStephen Cameron return -tmf_status; 24019437ac43SStephen Cameron } 24029437ac43SStephen Cameron 24031fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2404edd16368SStephen M. Cameron { 2405edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2406edd16368SStephen M. Cameron struct ctlr_info *h; 2407edd16368SStephen M. Cameron struct ErrorInfo *ei; 2408283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2409d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2410edd16368SStephen M. Cameron 24119437ac43SStephen Cameron u8 sense_key; 24129437ac43SStephen Cameron u8 asc; /* additional sense code */ 24139437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2414db111e18SStephen M. Cameron unsigned long sense_data_size; 2415edd16368SStephen M. Cameron 2416edd16368SStephen M. Cameron ei = cp->err_info; 24177fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2418edd16368SStephen M. Cameron h = cp->h; 2419283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2420d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2421edd16368SStephen M. Cameron 2422edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2423e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 24242b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 242533a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2426edd16368SStephen M. Cameron 2427d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2428d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2429d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2430d9a729f3SWebb Scales 2431edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2432edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2433c349775eSScott Teel 243403383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 243503383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 243603383736SDon Brace 243725163bd5SWebb Scales /* 243825163bd5SWebb Scales * We check for lockup status here as it may be set for 243925163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 244025163bd5SWebb Scales * fail_all_oustanding_cmds() 244125163bd5SWebb Scales */ 244225163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 244325163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 244425163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 24458a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 244625163bd5SWebb Scales } 244725163bd5SWebb Scales 2448d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2449d604f533SWebb Scales if (cp->reset_pending) 2450d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2451d604f533SWebb Scales if (cp->abort_pending) 2452d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2453d604f533SWebb Scales } 2454d604f533SWebb Scales 2455c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2456c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2457c349775eSScott Teel 24586aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 24598a0ff92cSWebb Scales if (ei->CommandStatus == 0) 24608a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 24616aa4c361SRobert Elliott 2462e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2463e1f7de0cSMatt Gates * CISS header used below for error handling. 2464e1f7de0cSMatt Gates */ 2465e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2466e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 24672b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 24682b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 24692b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 24702b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 247150a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2472e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2473e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2474283b4a9bSStephen M. Cameron 2475283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2476283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2477283b4a9bSStephen M. Cameron * wrong. 2478283b4a9bSStephen M. Cameron */ 2479f3f01730SKevin Barnett if (is_logical_device(dev)) { 2480283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2481283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 24828a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2483283b4a9bSStephen M. Cameron } 2484e1f7de0cSMatt Gates } 2485e1f7de0cSMatt Gates 2486edd16368SStephen M. Cameron /* an error has occurred */ 2487edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2488edd16368SStephen M. Cameron 2489edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 24909437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 24919437ac43SStephen Cameron /* copy the sense data */ 24929437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 24939437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 24949437ac43SStephen Cameron else 24959437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 24969437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 24979437ac43SStephen Cameron sense_data_size = ei->SenseLen; 24989437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 24999437ac43SStephen Cameron if (ei->ScsiStatus) 25009437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 25019437ac43SStephen Cameron &sense_key, &asc, &ascq); 2502edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 25031d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 25042e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 25051d3b3609SMatt Gates break; 25061d3b3609SMatt Gates } 2507edd16368SStephen M. Cameron break; 2508edd16368SStephen M. Cameron } 2509edd16368SStephen M. Cameron /* Problem was not a check condition 2510edd16368SStephen M. Cameron * Pass it up to the upper layers... 2511edd16368SStephen M. Cameron */ 2512edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2513edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2514edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2515edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2516edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2517edd16368SStephen M. Cameron sense_key, asc, ascq, 2518edd16368SStephen M. Cameron cmd->result); 2519edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2520edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2521edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2522edd16368SStephen M. Cameron 2523edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2524edd16368SStephen M. Cameron * but there is a bug in some released firmware 2525edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2526edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2527edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2528edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2529edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2530edd16368SStephen M. Cameron * look like selection timeout since that is 2531edd16368SStephen M. Cameron * the most common reason for this to occur, 2532edd16368SStephen M. Cameron * and it's severe enough. 2533edd16368SStephen M. Cameron */ 2534edd16368SStephen M. Cameron 2535edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2536edd16368SStephen M. Cameron } 2537edd16368SStephen M. Cameron break; 2538edd16368SStephen M. Cameron 2539edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2540edd16368SStephen M. Cameron break; 2541edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2542f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2543f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2544edd16368SStephen M. Cameron break; 2545edd16368SStephen M. Cameron case CMD_INVALID: { 2546edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2547edd16368SStephen M. Cameron print_cmd(cp); */ 2548edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2549edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2550edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2551edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2552edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2553edd16368SStephen M. Cameron * missing target. */ 2554edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2555edd16368SStephen M. Cameron } 2556edd16368SStephen M. Cameron break; 2557edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2558256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2559f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2560f42e81e1SStephen Cameron cp->Request.CDB); 2561edd16368SStephen M. Cameron break; 2562edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2563edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2564f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2565f42e81e1SStephen Cameron cp->Request.CDB); 2566edd16368SStephen M. Cameron break; 2567edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2568edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2569f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2570f42e81e1SStephen Cameron cp->Request.CDB); 2571edd16368SStephen M. Cameron break; 2572edd16368SStephen M. Cameron case CMD_ABORTED: 2573a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2574a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2575edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2576edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2577f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2578f42e81e1SStephen Cameron cp->Request.CDB); 2579edd16368SStephen M. Cameron break; 2580edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2581f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2582f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2583f42e81e1SStephen Cameron cp->Request.CDB); 2584edd16368SStephen M. Cameron break; 2585edd16368SStephen M. Cameron case CMD_TIMEOUT: 2586edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2587f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2588f42e81e1SStephen Cameron cp->Request.CDB); 2589edd16368SStephen M. Cameron break; 25901d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 25911d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 25921d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 25931d5e2ed0SStephen M. Cameron break; 25949437ac43SStephen Cameron case CMD_TMF_STATUS: 25959437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 25969437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 25979437ac43SStephen Cameron break; 2598283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2599283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2600283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2601283b4a9bSStephen M. Cameron */ 2602283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2603283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2604283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2605283b4a9bSStephen M. Cameron break; 2606edd16368SStephen M. Cameron default: 2607edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2608edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2609edd16368SStephen M. Cameron cp, ei->CommandStatus); 2610edd16368SStephen M. Cameron } 26118a0ff92cSWebb Scales 26128a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2613edd16368SStephen M. Cameron } 2614edd16368SStephen M. Cameron 2615edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2616edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2617edd16368SStephen M. Cameron { 2618edd16368SStephen M. Cameron int i; 2619edd16368SStephen M. Cameron 262050a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 262150a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 262250a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2623edd16368SStephen M. Cameron data_direction); 2624edd16368SStephen M. Cameron } 2625edd16368SStephen M. Cameron 2626a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2627edd16368SStephen M. Cameron struct CommandList *cp, 2628edd16368SStephen M. Cameron unsigned char *buf, 2629edd16368SStephen M. Cameron size_t buflen, 2630edd16368SStephen M. Cameron int data_direction) 2631edd16368SStephen M. Cameron { 263201a02ffcSStephen M. Cameron u64 addr64; 2633edd16368SStephen M. Cameron 2634edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2635edd16368SStephen M. Cameron cp->Header.SGList = 0; 263650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2637a2dac136SStephen M. Cameron return 0; 2638edd16368SStephen M. Cameron } 2639edd16368SStephen M. Cameron 264050a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2641eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2642a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2643eceaae18SShuah Khan cp->Header.SGList = 0; 264450a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2645a2dac136SStephen M. Cameron return -1; 2646eceaae18SShuah Khan } 264750a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 264850a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 264950a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 265050a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 265150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2652a2dac136SStephen M. Cameron return 0; 2653edd16368SStephen M. Cameron } 2654edd16368SStephen M. Cameron 265525163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 265625163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 265725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 265825163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2659edd16368SStephen M. Cameron { 2660edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2661edd16368SStephen M. Cameron 2662edd16368SStephen M. Cameron c->waiting = &wait; 266325163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 266425163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 266525163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 266625163bd5SWebb Scales wait_for_completion_io(&wait); 266725163bd5SWebb Scales return IO_OK; 266825163bd5SWebb Scales } 266925163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 267025163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 267125163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 267225163bd5SWebb Scales return -ETIMEDOUT; 267325163bd5SWebb Scales } 267425163bd5SWebb Scales return IO_OK; 267525163bd5SWebb Scales } 267625163bd5SWebb Scales 267725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 267825163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 267925163bd5SWebb Scales { 268025163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 268125163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 268225163bd5SWebb Scales return IO_OK; 268325163bd5SWebb Scales } 268425163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2685edd16368SStephen M. Cameron } 2686edd16368SStephen M. Cameron 2687094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2688094963daSStephen M. Cameron { 2689094963daSStephen M. Cameron int cpu; 2690094963daSStephen M. Cameron u32 rc, *lockup_detected; 2691094963daSStephen M. Cameron 2692094963daSStephen M. Cameron cpu = get_cpu(); 2693094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2694094963daSStephen M. Cameron rc = *lockup_detected; 2695094963daSStephen M. Cameron put_cpu(); 2696094963daSStephen M. Cameron return rc; 2697094963daSStephen M. Cameron } 2698094963daSStephen M. Cameron 26999c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 270025163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 270125163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2702edd16368SStephen M. Cameron { 27039c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 270425163bd5SWebb Scales int rc; 2705edd16368SStephen M. Cameron 2706edd16368SStephen M. Cameron do { 27077630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 270825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 270925163bd5SWebb Scales timeout_msecs); 271025163bd5SWebb Scales if (rc) 271125163bd5SWebb Scales break; 2712edd16368SStephen M. Cameron retry_count++; 27139c2fc160SStephen M. Cameron if (retry_count > 3) { 27149c2fc160SStephen M. Cameron msleep(backoff_time); 27159c2fc160SStephen M. Cameron if (backoff_time < 1000) 27169c2fc160SStephen M. Cameron backoff_time *= 2; 27179c2fc160SStephen M. Cameron } 2718852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 27199c2fc160SStephen M. Cameron check_for_busy(h, c)) && 27209c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2721edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 272225163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 272325163bd5SWebb Scales rc = -EIO; 272425163bd5SWebb Scales return rc; 2725edd16368SStephen M. Cameron } 2726edd16368SStephen M. Cameron 2727d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2728d1e8beacSStephen M. Cameron struct CommandList *c) 2729edd16368SStephen M. Cameron { 2730d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2731d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2732edd16368SStephen M. Cameron 2733d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2734d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2735d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2736d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2737d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2738d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2739d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2740d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2741d1e8beacSStephen M. Cameron } 2742d1e8beacSStephen M. Cameron 2743d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2744d1e8beacSStephen M. Cameron struct CommandList *cp) 2745d1e8beacSStephen M. Cameron { 2746d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2747d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 27489437ac43SStephen Cameron u8 sense_key, asc, ascq; 27499437ac43SStephen Cameron int sense_len; 2750d1e8beacSStephen M. Cameron 2751edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2752edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 27539437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 27549437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 27559437ac43SStephen Cameron else 27569437ac43SStephen Cameron sense_len = ei->SenseLen; 27579437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 27589437ac43SStephen Cameron &sense_key, &asc, &ascq); 2759d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2760d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 27619437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 27629437ac43SStephen Cameron sense_key, asc, ascq); 2763d1e8beacSStephen M. Cameron else 27649437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2765edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2766edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2767edd16368SStephen M. Cameron "(probably indicates selection timeout " 2768edd16368SStephen M. Cameron "reported incorrectly due to a known " 2769edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2770edd16368SStephen M. Cameron break; 2771edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2772edd16368SStephen M. Cameron break; 2773edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2774d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2775edd16368SStephen M. Cameron break; 2776edd16368SStephen M. Cameron case CMD_INVALID: { 2777edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2778edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2779edd16368SStephen M. Cameron */ 2780d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2781d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2782edd16368SStephen M. Cameron } 2783edd16368SStephen M. Cameron break; 2784edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2785d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2786edd16368SStephen M. Cameron break; 2787edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2788d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2789edd16368SStephen M. Cameron break; 2790edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2791d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2792edd16368SStephen M. Cameron break; 2793edd16368SStephen M. Cameron case CMD_ABORTED: 2794d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2795edd16368SStephen M. Cameron break; 2796edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2797d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2798edd16368SStephen M. Cameron break; 2799edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2800d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2801edd16368SStephen M. Cameron break; 2802edd16368SStephen M. Cameron case CMD_TIMEOUT: 2803d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2804edd16368SStephen M. Cameron break; 28051d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2806d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 28071d5e2ed0SStephen M. Cameron break; 280825163bd5SWebb Scales case CMD_CTLR_LOCKUP: 280925163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 281025163bd5SWebb Scales break; 2811edd16368SStephen M. Cameron default: 2812d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2813d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2814edd16368SStephen M. Cameron ei->CommandStatus); 2815edd16368SStephen M. Cameron } 2816edd16368SStephen M. Cameron } 2817edd16368SStephen M. Cameron 2818edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2819b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2820edd16368SStephen M. Cameron unsigned char bufsize) 2821edd16368SStephen M. Cameron { 2822edd16368SStephen M. Cameron int rc = IO_OK; 2823edd16368SStephen M. Cameron struct CommandList *c; 2824edd16368SStephen M. Cameron struct ErrorInfo *ei; 2825edd16368SStephen M. Cameron 282645fcb86eSStephen Cameron c = cmd_alloc(h); 2827edd16368SStephen M. Cameron 2828a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2829a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2830a2dac136SStephen M. Cameron rc = -1; 2831a2dac136SStephen M. Cameron goto out; 2832a2dac136SStephen M. Cameron } 283325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2834c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 283525163bd5SWebb Scales if (rc) 283625163bd5SWebb Scales goto out; 2837edd16368SStephen M. Cameron ei = c->err_info; 2838edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2839d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2840edd16368SStephen M. Cameron rc = -1; 2841edd16368SStephen M. Cameron } 2842a2dac136SStephen M. Cameron out: 284345fcb86eSStephen Cameron cmd_free(h, c); 2844edd16368SStephen M. Cameron return rc; 2845edd16368SStephen M. Cameron } 2846edd16368SStephen M. Cameron 2847bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 284825163bd5SWebb Scales u8 reset_type, int reply_queue) 2849edd16368SStephen M. Cameron { 2850edd16368SStephen M. Cameron int rc = IO_OK; 2851edd16368SStephen M. Cameron struct CommandList *c; 2852edd16368SStephen M. Cameron struct ErrorInfo *ei; 2853edd16368SStephen M. Cameron 285445fcb86eSStephen Cameron c = cmd_alloc(h); 2855edd16368SStephen M. Cameron 2856edd16368SStephen M. Cameron 2857a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 28580b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2859bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2860c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 286125163bd5SWebb Scales if (rc) { 286225163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 286325163bd5SWebb Scales goto out; 286425163bd5SWebb Scales } 2865edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2866edd16368SStephen M. Cameron 2867edd16368SStephen M. Cameron ei = c->err_info; 2868edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2869d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2870edd16368SStephen M. Cameron rc = -1; 2871edd16368SStephen M. Cameron } 287225163bd5SWebb Scales out: 287345fcb86eSStephen Cameron cmd_free(h, c); 2874edd16368SStephen M. Cameron return rc; 2875edd16368SStephen M. Cameron } 2876edd16368SStephen M. Cameron 2877d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2878d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2879d604f533SWebb Scales unsigned char *scsi3addr) 2880d604f533SWebb Scales { 2881d604f533SWebb Scales int i; 2882d604f533SWebb Scales bool match = false; 2883d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2884d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2885d604f533SWebb Scales 2886d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2887d604f533SWebb Scales return false; 2888d604f533SWebb Scales 2889d604f533SWebb Scales switch (c->cmd_type) { 2890d604f533SWebb Scales case CMD_SCSI: 2891d604f533SWebb Scales case CMD_IOCTL_PEND: 2892d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2893d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2894d604f533SWebb Scales break; 2895d604f533SWebb Scales 2896d604f533SWebb Scales case CMD_IOACCEL1: 2897d604f533SWebb Scales case CMD_IOACCEL2: 2898d604f533SWebb Scales if (c->phys_disk == dev) { 2899d604f533SWebb Scales /* HBA mode match */ 2900d604f533SWebb Scales match = true; 2901d604f533SWebb Scales } else { 2902d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2903d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2904d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2905d604f533SWebb Scales * instead. */ 2906d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2907d604f533SWebb Scales /* FIXME: an alternate test might be 2908d604f533SWebb Scales * 2909d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2910d604f533SWebb Scales * == c2->scsi_nexus; */ 2911d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2912d604f533SWebb Scales } 2913d604f533SWebb Scales } 2914d604f533SWebb Scales break; 2915d604f533SWebb Scales 2916d604f533SWebb Scales case IOACCEL2_TMF: 2917d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2918d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2919d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2920d604f533SWebb Scales } 2921d604f533SWebb Scales break; 2922d604f533SWebb Scales 2923d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2924d604f533SWebb Scales match = false; 2925d604f533SWebb Scales break; 2926d604f533SWebb Scales 2927d604f533SWebb Scales default: 2928d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2929d604f533SWebb Scales c->cmd_type); 2930d604f533SWebb Scales BUG(); 2931d604f533SWebb Scales } 2932d604f533SWebb Scales 2933d604f533SWebb Scales return match; 2934d604f533SWebb Scales } 2935d604f533SWebb Scales 2936d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 2937d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 2938d604f533SWebb Scales { 2939d604f533SWebb Scales int i; 2940d604f533SWebb Scales int rc = 0; 2941d604f533SWebb Scales 2942d604f533SWebb Scales /* We can really only handle one reset at a time */ 2943d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 2944d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 2945d604f533SWebb Scales return -EINTR; 2946d604f533SWebb Scales } 2947d604f533SWebb Scales 2948d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 2949d604f533SWebb Scales 2950d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2951d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 2952d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 2953d604f533SWebb Scales 2954d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 2955d604f533SWebb Scales unsigned long flags; 2956d604f533SWebb Scales 2957d604f533SWebb Scales /* 2958d604f533SWebb Scales * Mark the target command as having a reset pending, 2959d604f533SWebb Scales * then lock a lock so that the command cannot complete 2960d604f533SWebb Scales * while we're considering it. If the command is not 2961d604f533SWebb Scales * idle then count it; otherwise revoke the event. 2962d604f533SWebb Scales */ 2963d604f533SWebb Scales c->reset_pending = dev; 2964d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 2965d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 2966d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 2967d604f533SWebb Scales else 2968d604f533SWebb Scales c->reset_pending = NULL; 2969d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2970d604f533SWebb Scales } 2971d604f533SWebb Scales 2972d604f533SWebb Scales cmd_free(h, c); 2973d604f533SWebb Scales } 2974d604f533SWebb Scales 2975d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 2976d604f533SWebb Scales if (!rc) 2977d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 2978d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 2979d604f533SWebb Scales lockup_detected(h)); 2980d604f533SWebb Scales 2981d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 2982d604f533SWebb Scales dev_warn(&h->pdev->dev, 2983d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 2984d604f533SWebb Scales rc = -ENODEV; 2985d604f533SWebb Scales } 2986d604f533SWebb Scales 2987d604f533SWebb Scales if (unlikely(rc)) 2988d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 2989d604f533SWebb Scales 2990d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 2991d604f533SWebb Scales return rc; 2992d604f533SWebb Scales } 2993d604f533SWebb Scales 2994edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 2995edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 2996edd16368SStephen M. Cameron { 2997edd16368SStephen M. Cameron int rc; 2998edd16368SStephen M. Cameron unsigned char *buf; 2999edd16368SStephen M. Cameron 3000edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3001edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3002edd16368SStephen M. Cameron if (!buf) 3003edd16368SStephen M. Cameron return; 3004b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 3005edd16368SStephen M. Cameron if (rc == 0) 3006edd16368SStephen M. Cameron *raid_level = buf[8]; 3007edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3008edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3009edd16368SStephen M. Cameron kfree(buf); 3010edd16368SStephen M. Cameron return; 3011edd16368SStephen M. Cameron } 3012edd16368SStephen M. Cameron 3013283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3014283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3015283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3016283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3017283b4a9bSStephen M. Cameron { 3018283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3019283b4a9bSStephen M. Cameron int map, row, col; 3020283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3021283b4a9bSStephen M. Cameron 3022283b4a9bSStephen M. Cameron if (rc != 0) 3023283b4a9bSStephen M. Cameron return; 3024283b4a9bSStephen M. Cameron 30252ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 30262ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 30272ba8bfc8SStephen M. Cameron return; 30282ba8bfc8SStephen M. Cameron 3029283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3030283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3031283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3032283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3033283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3034283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3035283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3036283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3037283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3038283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3039283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3040283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3041283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3042283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3043283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3044283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3045283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3046283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3047283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3048283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3049283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3050283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3051283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3052283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 30532b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3054dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 30552b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 30562b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 30572b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3058dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3059dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3060283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3061283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3062283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3063283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3064283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3065283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3066283b4a9bSStephen M. Cameron disks_per_row = 3067283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3068283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3069283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3070283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3071283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3072283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3073283b4a9bSStephen M. Cameron disks_per_row = 3074283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3075283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3076283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3077283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3078283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3079283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3080283b4a9bSStephen M. Cameron } 3081283b4a9bSStephen M. Cameron } 3082283b4a9bSStephen M. Cameron } 3083283b4a9bSStephen M. Cameron #else 3084283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3085283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3086283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3087283b4a9bSStephen M. Cameron { 3088283b4a9bSStephen M. Cameron } 3089283b4a9bSStephen M. Cameron #endif 3090283b4a9bSStephen M. Cameron 3091283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3092283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3093283b4a9bSStephen M. Cameron { 3094283b4a9bSStephen M. Cameron int rc = 0; 3095283b4a9bSStephen M. Cameron struct CommandList *c; 3096283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3097283b4a9bSStephen M. Cameron 309845fcb86eSStephen Cameron c = cmd_alloc(h); 3099bf43caf3SRobert Elliott 3100283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3101283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3102283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 31032dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 31042dd02d74SRobert Elliott cmd_free(h, c); 31052dd02d74SRobert Elliott return -1; 3106283b4a9bSStephen M. Cameron } 310725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3108c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 310925163bd5SWebb Scales if (rc) 311025163bd5SWebb Scales goto out; 3111283b4a9bSStephen M. Cameron ei = c->err_info; 3112283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3113d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 311425163bd5SWebb Scales rc = -1; 311525163bd5SWebb Scales goto out; 3116283b4a9bSStephen M. Cameron } 311745fcb86eSStephen Cameron cmd_free(h, c); 3118283b4a9bSStephen M. Cameron 3119283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3120283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3121283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3122283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3123283b4a9bSStephen M. Cameron rc = -1; 3124283b4a9bSStephen M. Cameron } 3125283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3126283b4a9bSStephen M. Cameron return rc; 312725163bd5SWebb Scales out: 312825163bd5SWebb Scales cmd_free(h, c); 312925163bd5SWebb Scales return rc; 3130283b4a9bSStephen M. Cameron } 3131283b4a9bSStephen M. Cameron 3132d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3133d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3134d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3135d04e62b9SKevin Barnett { 3136d04e62b9SKevin Barnett int rc = IO_OK; 3137d04e62b9SKevin Barnett struct CommandList *c; 3138d04e62b9SKevin Barnett struct ErrorInfo *ei; 3139d04e62b9SKevin Barnett 3140d04e62b9SKevin Barnett c = cmd_alloc(h); 3141d04e62b9SKevin Barnett 3142d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3143d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3144d04e62b9SKevin Barnett if (rc) 3145d04e62b9SKevin Barnett goto out; 3146d04e62b9SKevin Barnett 3147d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3148d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3149d04e62b9SKevin Barnett 3150d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3151c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3152d04e62b9SKevin Barnett if (rc) 3153d04e62b9SKevin Barnett goto out; 3154d04e62b9SKevin Barnett ei = c->err_info; 3155d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3156d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3157d04e62b9SKevin Barnett rc = -1; 3158d04e62b9SKevin Barnett } 3159d04e62b9SKevin Barnett out: 3160d04e62b9SKevin Barnett cmd_free(h, c); 3161d04e62b9SKevin Barnett return rc; 3162d04e62b9SKevin Barnett } 3163d04e62b9SKevin Barnett 316466749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 316566749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 316666749d0dSScott Teel { 316766749d0dSScott Teel int rc = IO_OK; 316866749d0dSScott Teel struct CommandList *c; 316966749d0dSScott Teel struct ErrorInfo *ei; 317066749d0dSScott Teel 317166749d0dSScott Teel c = cmd_alloc(h); 317266749d0dSScott Teel 317366749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 317466749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 317566749d0dSScott Teel if (rc) 317666749d0dSScott Teel goto out; 317766749d0dSScott Teel 317866749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3179c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 318066749d0dSScott Teel if (rc) 318166749d0dSScott Teel goto out; 318266749d0dSScott Teel ei = c->err_info; 318366749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 318466749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 318566749d0dSScott Teel rc = -1; 318666749d0dSScott Teel } 318766749d0dSScott Teel out: 318866749d0dSScott Teel cmd_free(h, c); 318966749d0dSScott Teel return rc; 319066749d0dSScott Teel } 319166749d0dSScott Teel 319203383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 319303383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 319403383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 319503383736SDon Brace { 319603383736SDon Brace int rc = IO_OK; 319703383736SDon Brace struct CommandList *c; 319803383736SDon Brace struct ErrorInfo *ei; 319903383736SDon Brace 320003383736SDon Brace c = cmd_alloc(h); 320103383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 320203383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 320303383736SDon Brace if (rc) 320403383736SDon Brace goto out; 320503383736SDon Brace 320603383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 320703383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 320803383736SDon Brace 320925163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3210c448ecfaSDon Brace DEFAULT_TIMEOUT); 321103383736SDon Brace ei = c->err_info; 321203383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 321303383736SDon Brace hpsa_scsi_interpret_error(h, c); 321403383736SDon Brace rc = -1; 321503383736SDon Brace } 321603383736SDon Brace out: 321703383736SDon Brace cmd_free(h, c); 3218d04e62b9SKevin Barnett 321903383736SDon Brace return rc; 322003383736SDon Brace } 322103383736SDon Brace 3222cca8f13bSDon Brace /* 3223cca8f13bSDon Brace * get enclosure information 3224cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3225cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3226cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3227cca8f13bSDon Brace */ 3228cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3229cca8f13bSDon Brace unsigned char *scsi3addr, 3230cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3231cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3232cca8f13bSDon Brace { 3233cca8f13bSDon Brace int rc = -1; 3234cca8f13bSDon Brace struct CommandList *c = NULL; 3235cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3236cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3237cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3238cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3239cca8f13bSDon Brace u16 bmic_device_index = 0; 3240cca8f13bSDon Brace 3241cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3242cca8f13bSDon Brace 324317a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 324417a9e54aSDon Brace rc = IO_OK; 3245cca8f13bSDon Brace goto out; 324617a9e54aSDon Brace } 3247cca8f13bSDon Brace 3248cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3249cca8f13bSDon Brace if (!bssbp) 3250cca8f13bSDon Brace goto out; 3251cca8f13bSDon Brace 3252cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3253cca8f13bSDon Brace if (!id_phys) 3254cca8f13bSDon Brace goto out; 3255cca8f13bSDon Brace 3256cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3257cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3258cca8f13bSDon Brace if (rc) { 3259cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3260cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3261cca8f13bSDon Brace goto out; 3262cca8f13bSDon Brace } 3263cca8f13bSDon Brace 3264cca8f13bSDon Brace c = cmd_alloc(h); 3265cca8f13bSDon Brace 3266cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3267cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3268cca8f13bSDon Brace 3269cca8f13bSDon Brace if (rc) 3270cca8f13bSDon Brace goto out; 3271cca8f13bSDon Brace 3272cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3273cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3274cca8f13bSDon Brace else 3275cca8f13bSDon Brace c->Request.CDB[5] = 0; 3276cca8f13bSDon Brace 3277cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3278c448ecfaSDon Brace DEFAULT_TIMEOUT); 3279cca8f13bSDon Brace if (rc) 3280cca8f13bSDon Brace goto out; 3281cca8f13bSDon Brace 3282cca8f13bSDon Brace ei = c->err_info; 3283cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3284cca8f13bSDon Brace rc = -1; 3285cca8f13bSDon Brace goto out; 3286cca8f13bSDon Brace } 3287cca8f13bSDon Brace 3288cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3289cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3290cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3291cca8f13bSDon Brace 3292cca8f13bSDon Brace rc = IO_OK; 3293cca8f13bSDon Brace out: 3294cca8f13bSDon Brace kfree(bssbp); 3295cca8f13bSDon Brace kfree(id_phys); 3296cca8f13bSDon Brace 3297cca8f13bSDon Brace if (c) 3298cca8f13bSDon Brace cmd_free(h, c); 3299cca8f13bSDon Brace 3300cca8f13bSDon Brace if (rc != IO_OK) 3301cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3302cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3303cca8f13bSDon Brace } 3304cca8f13bSDon Brace 3305d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3306d04e62b9SKevin Barnett unsigned char *scsi3addr) 3307d04e62b9SKevin Barnett { 3308d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3309d04e62b9SKevin Barnett u32 nphysicals; 3310d04e62b9SKevin Barnett u64 sa = 0; 3311d04e62b9SKevin Barnett int i; 3312d04e62b9SKevin Barnett 3313d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3314d04e62b9SKevin Barnett if (!physdev) 3315d04e62b9SKevin Barnett return 0; 3316d04e62b9SKevin Barnett 3317d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3318d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3319d04e62b9SKevin Barnett kfree(physdev); 3320d04e62b9SKevin Barnett return 0; 3321d04e62b9SKevin Barnett } 3322d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3323d04e62b9SKevin Barnett 3324d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3325d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3326d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3327d04e62b9SKevin Barnett break; 3328d04e62b9SKevin Barnett } 3329d04e62b9SKevin Barnett 3330d04e62b9SKevin Barnett kfree(physdev); 3331d04e62b9SKevin Barnett 3332d04e62b9SKevin Barnett return sa; 3333d04e62b9SKevin Barnett } 3334d04e62b9SKevin Barnett 3335d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3336d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3337d04e62b9SKevin Barnett { 3338d04e62b9SKevin Barnett int rc; 3339d04e62b9SKevin Barnett u64 sa = 0; 3340d04e62b9SKevin Barnett 3341d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3342d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3343d04e62b9SKevin Barnett 3344d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3345d04e62b9SKevin Barnett if (ssi == NULL) { 3346d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3347d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3348d04e62b9SKevin Barnett return; 3349d04e62b9SKevin Barnett } 3350d04e62b9SKevin Barnett 3351d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3352d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3353d04e62b9SKevin Barnett if (rc == 0) { 3354d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3355d04e62b9SKevin Barnett h->sas_address = sa; 3356d04e62b9SKevin Barnett } 3357d04e62b9SKevin Barnett 3358d04e62b9SKevin Barnett kfree(ssi); 3359d04e62b9SKevin Barnett } else 3360d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3361d04e62b9SKevin Barnett 3362d04e62b9SKevin Barnett dev->sas_address = sa; 3363d04e62b9SKevin Barnett } 3364d04e62b9SKevin Barnett 3365d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 33661b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 33671b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 33681b70150aSStephen M. Cameron { 33691b70150aSStephen M. Cameron int rc; 33701b70150aSStephen M. Cameron int i; 33711b70150aSStephen M. Cameron int pages; 33721b70150aSStephen M. Cameron unsigned char *buf, bufsize; 33731b70150aSStephen M. Cameron 33741b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 33751b70150aSStephen M. Cameron if (!buf) 33761b70150aSStephen M. Cameron return 0; 33771b70150aSStephen M. Cameron 33781b70150aSStephen M. Cameron /* Get the size of the page list first */ 33791b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 33801b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 33811b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 33821b70150aSStephen M. Cameron if (rc != 0) 33831b70150aSStephen M. Cameron goto exit_unsupported; 33841b70150aSStephen M. Cameron pages = buf[3]; 33851b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 33861b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 33871b70150aSStephen M. Cameron else 33881b70150aSStephen M. Cameron bufsize = 255; 33891b70150aSStephen M. Cameron 33901b70150aSStephen M. Cameron /* Get the whole VPD page list */ 33911b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 33921b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 33931b70150aSStephen M. Cameron buf, bufsize); 33941b70150aSStephen M. Cameron if (rc != 0) 33951b70150aSStephen M. Cameron goto exit_unsupported; 33961b70150aSStephen M. Cameron 33971b70150aSStephen M. Cameron pages = buf[3]; 33981b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 33991b70150aSStephen M. Cameron if (buf[3 + i] == page) 34001b70150aSStephen M. Cameron goto exit_supported; 34011b70150aSStephen M. Cameron exit_unsupported: 34021b70150aSStephen M. Cameron kfree(buf); 34031b70150aSStephen M. Cameron return 0; 34041b70150aSStephen M. Cameron exit_supported: 34051b70150aSStephen M. Cameron kfree(buf); 34061b70150aSStephen M. Cameron return 1; 34071b70150aSStephen M. Cameron } 34081b70150aSStephen M. Cameron 3409283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3410283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3411283b4a9bSStephen M. Cameron { 3412283b4a9bSStephen M. Cameron int rc; 3413283b4a9bSStephen M. Cameron unsigned char *buf; 3414283b4a9bSStephen M. Cameron u8 ioaccel_status; 3415283b4a9bSStephen M. Cameron 3416283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3417283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 341841ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3419283b4a9bSStephen M. Cameron 3420283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3421283b4a9bSStephen M. Cameron if (!buf) 3422283b4a9bSStephen M. Cameron return; 34231b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 34241b70150aSStephen M. Cameron goto out; 3425283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3426b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3427283b4a9bSStephen M. Cameron if (rc != 0) 3428283b4a9bSStephen M. Cameron goto out; 3429283b4a9bSStephen M. Cameron 3430283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3431283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3432283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3433283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3434283b4a9bSStephen M. Cameron this_device->offload_config = 3435283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3436283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3437283b4a9bSStephen M. Cameron this_device->offload_enabled = 3438283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3439283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3440283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3441283b4a9bSStephen M. Cameron } 344241ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3443283b4a9bSStephen M. Cameron out: 3444283b4a9bSStephen M. Cameron kfree(buf); 3445283b4a9bSStephen M. Cameron return; 3446283b4a9bSStephen M. Cameron } 3447283b4a9bSStephen M. Cameron 3448edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3449edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 345075d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3451edd16368SStephen M. Cameron { 3452edd16368SStephen M. Cameron int rc; 3453edd16368SStephen M. Cameron unsigned char *buf; 3454edd16368SStephen M. Cameron 3455edd16368SStephen M. Cameron if (buflen > 16) 3456edd16368SStephen M. Cameron buflen = 16; 3457edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3458edd16368SStephen M. Cameron if (!buf) 3459a84d794dSStephen M. Cameron return -ENOMEM; 3460b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3461edd16368SStephen M. Cameron if (rc == 0) 346275d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 346375d23d89SDon Brace 3464edd16368SStephen M. Cameron kfree(buf); 346575d23d89SDon Brace 3466edd16368SStephen M. Cameron return rc != 0; 3467edd16368SStephen M. Cameron } 3468edd16368SStephen M. Cameron 3469edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 347003383736SDon Brace void *buf, int bufsize, 3471edd16368SStephen M. Cameron int extended_response) 3472edd16368SStephen M. Cameron { 3473edd16368SStephen M. Cameron int rc = IO_OK; 3474edd16368SStephen M. Cameron struct CommandList *c; 3475edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3476edd16368SStephen M. Cameron struct ErrorInfo *ei; 3477edd16368SStephen M. Cameron 347845fcb86eSStephen Cameron c = cmd_alloc(h); 3479bf43caf3SRobert Elliott 3480e89c0ae7SStephen M. Cameron /* address the controller */ 3481e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3482a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3483a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3484a2dac136SStephen M. Cameron rc = -1; 3485a2dac136SStephen M. Cameron goto out; 3486a2dac136SStephen M. Cameron } 3487edd16368SStephen M. Cameron if (extended_response) 3488edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 348925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3490c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 349125163bd5SWebb Scales if (rc) 349225163bd5SWebb Scales goto out; 3493edd16368SStephen M. Cameron ei = c->err_info; 3494edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3495edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3496d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3497edd16368SStephen M. Cameron rc = -1; 3498283b4a9bSStephen M. Cameron } else { 349903383736SDon Brace struct ReportLUNdata *rld = buf; 350003383736SDon Brace 350103383736SDon Brace if (rld->extended_response_flag != extended_response) { 3502283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3503283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3504283b4a9bSStephen M. Cameron extended_response, 350503383736SDon Brace rld->extended_response_flag); 3506283b4a9bSStephen M. Cameron rc = -1; 3507283b4a9bSStephen M. Cameron } 3508edd16368SStephen M. Cameron } 3509a2dac136SStephen M. Cameron out: 351045fcb86eSStephen Cameron cmd_free(h, c); 3511edd16368SStephen M. Cameron return rc; 3512edd16368SStephen M. Cameron } 3513edd16368SStephen M. Cameron 3514edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 351503383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3516edd16368SStephen M. Cameron { 351703383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 351803383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3519edd16368SStephen M. Cameron } 3520edd16368SStephen M. Cameron 3521edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3522edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3523edd16368SStephen M. Cameron { 3524edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3525edd16368SStephen M. Cameron } 3526edd16368SStephen M. Cameron 3527edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3528edd16368SStephen M. Cameron int bus, int target, int lun) 3529edd16368SStephen M. Cameron { 3530edd16368SStephen M. Cameron device->bus = bus; 3531edd16368SStephen M. Cameron device->target = target; 3532edd16368SStephen M. Cameron device->lun = lun; 3533edd16368SStephen M. Cameron } 3534edd16368SStephen M. Cameron 35359846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 35369846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 35379846590eSStephen M. Cameron unsigned char scsi3addr[]) 35389846590eSStephen M. Cameron { 35399846590eSStephen M. Cameron int rc; 35409846590eSStephen M. Cameron int status; 35419846590eSStephen M. Cameron int size; 35429846590eSStephen M. Cameron unsigned char *buf; 35439846590eSStephen M. Cameron 35449846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 35459846590eSStephen M. Cameron if (!buf) 35469846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 35479846590eSStephen M. Cameron 35489846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 354924a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 35509846590eSStephen M. Cameron goto exit_failed; 35519846590eSStephen M. Cameron 35529846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 35539846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 35549846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 355524a4b078SStephen M. Cameron if (rc != 0) 35569846590eSStephen M. Cameron goto exit_failed; 35579846590eSStephen M. Cameron size = buf[3]; 35589846590eSStephen M. Cameron 35599846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 35609846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 35619846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 356224a4b078SStephen M. Cameron if (rc != 0) 35639846590eSStephen M. Cameron goto exit_failed; 35649846590eSStephen M. Cameron status = buf[4]; /* status byte */ 35659846590eSStephen M. Cameron 35669846590eSStephen M. Cameron kfree(buf); 35679846590eSStephen M. Cameron return status; 35689846590eSStephen M. Cameron exit_failed: 35699846590eSStephen M. Cameron kfree(buf); 35709846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 35719846590eSStephen M. Cameron } 35729846590eSStephen M. Cameron 35739846590eSStephen M. Cameron /* Determine offline status of a volume. 35749846590eSStephen M. Cameron * Return either: 35759846590eSStephen M. Cameron * 0 (not offline) 357667955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 35779846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 35789846590eSStephen M. Cameron * describing why a volume is to be kept offline) 35799846590eSStephen M. Cameron */ 358067955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 35819846590eSStephen M. Cameron unsigned char scsi3addr[]) 35829846590eSStephen M. Cameron { 35839846590eSStephen M. Cameron struct CommandList *c; 35849437ac43SStephen Cameron unsigned char *sense; 35859437ac43SStephen Cameron u8 sense_key, asc, ascq; 35869437ac43SStephen Cameron int sense_len; 358725163bd5SWebb Scales int rc, ldstat = 0; 35889846590eSStephen M. Cameron u16 cmd_status; 35899846590eSStephen M. Cameron u8 scsi_status; 35909846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 35919846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 35929846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 35939846590eSStephen M. Cameron 35949846590eSStephen M. Cameron c = cmd_alloc(h); 3595bf43caf3SRobert Elliott 35969846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3597c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3598c448ecfaSDon Brace DEFAULT_TIMEOUT); 359925163bd5SWebb Scales if (rc) { 360025163bd5SWebb Scales cmd_free(h, c); 360125163bd5SWebb Scales return 0; 360225163bd5SWebb Scales } 36039846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 36049437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 36059437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 36069437ac43SStephen Cameron else 36079437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 36089437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 36099846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 36109846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 36119846590eSStephen M. Cameron cmd_free(h, c); 36129846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 36139846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 36149846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 36159846590eSStephen M. Cameron sense_key != NOT_READY || 36169846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 36179846590eSStephen M. Cameron return 0; 36189846590eSStephen M. Cameron } 36199846590eSStephen M. Cameron 36209846590eSStephen M. Cameron /* Determine the reason for not ready state */ 36219846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 36229846590eSStephen M. Cameron 36239846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 36249846590eSStephen M. Cameron switch (ldstat) { 36259846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 36265ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 36279846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 36289846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 36299846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 36309846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 36319846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 36329846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 36339846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 36349846590eSStephen M. Cameron return ldstat; 36359846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 36369846590eSStephen M. Cameron /* If VPD status page isn't available, 36379846590eSStephen M. Cameron * use ASC/ASCQ to determine state 36389846590eSStephen M. Cameron */ 36399846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 36409846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 36419846590eSStephen M. Cameron return ldstat; 36429846590eSStephen M. Cameron break; 36439846590eSStephen M. Cameron default: 36449846590eSStephen M. Cameron break; 36459846590eSStephen M. Cameron } 36469846590eSStephen M. Cameron return 0; 36479846590eSStephen M. Cameron } 36489846590eSStephen M. Cameron 36499b5c48c2SStephen Cameron /* 36509b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 36519b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 36529b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 36539b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 36549b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 36559b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 36569b5c48c2SStephen Cameron */ 36579b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 36589b5c48c2SStephen Cameron unsigned char *scsi3addr) 36599b5c48c2SStephen Cameron { 36609b5c48c2SStephen Cameron struct CommandList *c; 36619b5c48c2SStephen Cameron struct ErrorInfo *ei; 36629b5c48c2SStephen Cameron int rc = 0; 36639b5c48c2SStephen Cameron 36649b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 36659b5c48c2SStephen Cameron 36669b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 36679b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 36689b5c48c2SStephen Cameron return 1; 36699b5c48c2SStephen Cameron 36709b5c48c2SStephen Cameron c = cmd_alloc(h); 3671bf43caf3SRobert Elliott 36729b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3673c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3674c448ecfaSDon Brace DEFAULT_TIMEOUT); 36759b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 36769b5c48c2SStephen Cameron ei = c->err_info; 36779b5c48c2SStephen Cameron switch (ei->CommandStatus) { 36789b5c48c2SStephen Cameron case CMD_INVALID: 36799b5c48c2SStephen Cameron rc = 0; 36809b5c48c2SStephen Cameron break; 36819b5c48c2SStephen Cameron case CMD_UNABORTABLE: 36829b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 36839b5c48c2SStephen Cameron rc = 1; 36849b5c48c2SStephen Cameron break; 36859437ac43SStephen Cameron case CMD_TMF_STATUS: 36869437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 36879437ac43SStephen Cameron break; 36889b5c48c2SStephen Cameron default: 36899b5c48c2SStephen Cameron rc = 0; 36909b5c48c2SStephen Cameron break; 36919b5c48c2SStephen Cameron } 36929b5c48c2SStephen Cameron cmd_free(h, c); 36939b5c48c2SStephen Cameron return rc; 36949b5c48c2SStephen Cameron } 36959b5c48c2SStephen Cameron 3696edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 36970b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 36980b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3699edd16368SStephen M. Cameron { 37000b0e1d6cSStephen M. Cameron 37010b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 37020b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 37030b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 37040b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 37050b0e1d6cSStephen M. Cameron 3706ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 37070b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3708683fc444SDon Brace int rc = 0; 3709edd16368SStephen M. Cameron 3710ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3711683fc444SDon Brace if (!inq_buff) { 3712683fc444SDon Brace rc = -ENOMEM; 3713edd16368SStephen M. Cameron goto bail_out; 3714683fc444SDon Brace } 3715edd16368SStephen M. Cameron 3716edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3717edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3718edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3719edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3720edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3721edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3722683fc444SDon Brace rc = -EIO; 3723edd16368SStephen M. Cameron goto bail_out; 3724edd16368SStephen M. Cameron } 3725edd16368SStephen M. Cameron 37264af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 37274af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 372875d23d89SDon Brace 3729edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3730edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3731edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3732edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3733edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3734edd16368SStephen M. Cameron sizeof(this_device->model)); 3735edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3736edd16368SStephen M. Cameron sizeof(this_device->device_id)); 373775d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3738edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3739edd16368SStephen M. Cameron 3740af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3741af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3742283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 374367955ba3SStephen M. Cameron int volume_offline; 374467955ba3SStephen M. Cameron 3745edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3746283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3747283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 374867955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 374967955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 375067955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 375167955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3752283b4a9bSStephen M. Cameron } else { 3753edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3754283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3755283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 375641ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3757a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 37589846590eSStephen M. Cameron this_device->volume_offline = 0; 375903383736SDon Brace this_device->queue_depth = h->nr_cmds; 3760283b4a9bSStephen M. Cameron } 3761edd16368SStephen M. Cameron 37620b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 37630b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 37640b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 37650b0e1d6cSStephen M. Cameron */ 37660b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 37670b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 37680b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 37690b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 37700b0e1d6cSStephen M. Cameron } 3771edd16368SStephen M. Cameron kfree(inq_buff); 3772edd16368SStephen M. Cameron return 0; 3773edd16368SStephen M. Cameron 3774edd16368SStephen M. Cameron bail_out: 3775edd16368SStephen M. Cameron kfree(inq_buff); 3776683fc444SDon Brace return rc; 3777edd16368SStephen M. Cameron } 3778edd16368SStephen M. Cameron 37799b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 37809b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 37819b5c48c2SStephen Cameron { 37829b5c48c2SStephen Cameron unsigned long flags; 37839b5c48c2SStephen Cameron int rc, entry; 37849b5c48c2SStephen Cameron /* 37859b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 37869b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 37879b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 37889b5c48c2SStephen Cameron */ 37899b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 37909b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 37919b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 37929b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 37939b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 37949b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 37959b5c48c2SStephen Cameron } else { 37969b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 37979b5c48c2SStephen Cameron dev->supports_aborts = 37989b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 37999b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 38009b5c48c2SStephen Cameron dev->supports_aborts = 0; 38019b5c48c2SStephen Cameron } 38029b5c48c2SStephen Cameron } 38039b5c48c2SStephen Cameron 3804c795505aSKevin Barnett /* 3805c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3806edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3807edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3808edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3809edd16368SStephen M. Cameron */ 3810edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 38111f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3812edd16368SStephen M. Cameron { 3813c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3814edd16368SStephen M. Cameron 38151f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 38161f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 38171f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3818c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3819c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 38201f310bdeSStephen M. Cameron else 38211f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3822c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3823c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 38241f310bdeSStephen M. Cameron return; 38251f310bdeSStephen M. Cameron } 38261f310bdeSStephen M. Cameron /* It's a logical device */ 382766749d0dSScott Teel if (device->external) { 38281f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3829c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3830c795505aSKevin Barnett lunid & 0x00ff); 38311f310bdeSStephen M. Cameron return; 3832339b2b14SStephen M. Cameron } 3833c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3834c795505aSKevin Barnett 0, lunid & 0x3fff); 3835edd16368SStephen M. Cameron } 3836edd16368SStephen M. Cameron 3837edd16368SStephen M. Cameron 3838edd16368SStephen M. Cameron /* 383954b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 384054b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 384154b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 384254b6e9e9SScott Teel * 3. Return: 384354b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 384454b6e9e9SScott Teel * 0 if no matching physical disk was found. 384554b6e9e9SScott Teel */ 384654b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 384754b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 384854b6e9e9SScott Teel { 384941ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 385041ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 385141ce4c35SStephen Cameron unsigned long flags; 385254b6e9e9SScott Teel int i; 385354b6e9e9SScott Teel 385441ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 385541ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 385641ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 385741ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 385841ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 385941ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 386054b6e9e9SScott Teel return 1; 386154b6e9e9SScott Teel } 386241ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 386341ce4c35SStephen Cameron return 0; 386441ce4c35SStephen Cameron } 386541ce4c35SStephen Cameron 386666749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 386766749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 386866749d0dSScott Teel { 386966749d0dSScott Teel /* In report logicals, local logicals are listed first, 387066749d0dSScott Teel * then any externals. 387166749d0dSScott Teel */ 387266749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 387366749d0dSScott Teel 387466749d0dSScott Teel if (i == raid_ctlr_position) 387566749d0dSScott Teel return 0; 387666749d0dSScott Teel 387766749d0dSScott Teel if (i < logicals_start) 387866749d0dSScott Teel return 0; 387966749d0dSScott Teel 388066749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 388166749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 388266749d0dSScott Teel return 0; 388366749d0dSScott Teel 388466749d0dSScott Teel return 1; /* it's an external lun */ 388566749d0dSScott Teel } 388666749d0dSScott Teel 388754b6e9e9SScott Teel /* 3888edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3889edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3890edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3891edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3892edd16368SStephen M. Cameron */ 3893edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 389403383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 389501a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3896edd16368SStephen M. Cameron { 389703383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3898edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3899edd16368SStephen M. Cameron return -1; 3900edd16368SStephen M. Cameron } 390103383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3902edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 390303383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 390403383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3905edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3906edd16368SStephen M. Cameron } 390703383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3908edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3909edd16368SStephen M. Cameron return -1; 3910edd16368SStephen M. Cameron } 39116df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3912edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3913edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3914edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3915edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3916edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3917edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3918edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3919edd16368SStephen M. Cameron } 3920edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3921edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3922edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3923edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3924edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3925edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3926edd16368SStephen M. Cameron } 3927edd16368SStephen M. Cameron return 0; 3928edd16368SStephen M. Cameron } 3929edd16368SStephen M. Cameron 393042a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 393142a91641SDon Brace int i, int nphysicals, int nlogicals, 3932a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 3933339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 3934339b2b14SStephen M. Cameron { 3935339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 3936339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 3937339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 3938339b2b14SStephen M. Cameron */ 3939339b2b14SStephen M. Cameron 3940339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 3941339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3942339b2b14SStephen M. Cameron 3943339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 3944339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 3945339b2b14SStephen M. Cameron 3946339b2b14SStephen M. Cameron if (i < logicals_start) 3947d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 3948d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 3949339b2b14SStephen M. Cameron 3950339b2b14SStephen M. Cameron if (i < last_device) 3951339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 3952339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 3953339b2b14SStephen M. Cameron BUG(); 3954339b2b14SStephen M. Cameron return NULL; 3955339b2b14SStephen M. Cameron } 3956339b2b14SStephen M. Cameron 395703383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 395803383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 395903383736SDon Brace struct hpsa_scsi_dev_t *dev, 3960f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 396103383736SDon Brace struct bmic_identify_physical_device *id_phys) 396203383736SDon Brace { 396303383736SDon Brace int rc; 3964f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 396503383736SDon Brace 396603383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 3967f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3968a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 396903383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 3970f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3971f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 397203383736SDon Brace sizeof(*id_phys)); 397303383736SDon Brace if (!rc) 397403383736SDon Brace /* Reserve space for FW operations */ 397503383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 397603383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 397703383736SDon Brace dev->queue_depth = 397803383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 397903383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 398003383736SDon Brace else 398103383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 398203383736SDon Brace } 398303383736SDon Brace 39848270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 3985f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 39868270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 39878270b862SJoe Handzik { 3988f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3989f2039b03SDon Brace 3990f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 39918270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 39928270b862SJoe Handzik 39938270b862SJoe Handzik memcpy(&this_device->active_path_index, 39948270b862SJoe Handzik &id_phys->active_path_number, 39958270b862SJoe Handzik sizeof(this_device->active_path_index)); 39968270b862SJoe Handzik memcpy(&this_device->path_map, 39978270b862SJoe Handzik &id_phys->redundant_path_present_map, 39988270b862SJoe Handzik sizeof(this_device->path_map)); 39998270b862SJoe Handzik memcpy(&this_device->box, 40008270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 40018270b862SJoe Handzik sizeof(this_device->box)); 40028270b862SJoe Handzik memcpy(&this_device->phys_connector, 40038270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 40048270b862SJoe Handzik sizeof(this_device->phys_connector)); 40058270b862SJoe Handzik memcpy(&this_device->bay, 40068270b862SJoe Handzik &id_phys->phys_bay_in_box, 40078270b862SJoe Handzik sizeof(this_device->bay)); 40088270b862SJoe Handzik } 40098270b862SJoe Handzik 401066749d0dSScott Teel /* get number of local logical disks. */ 401166749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 401266749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 401366749d0dSScott Teel u32 *nlocals) 401466749d0dSScott Teel { 401566749d0dSScott Teel int rc; 401666749d0dSScott Teel 401766749d0dSScott Teel if (!id_ctlr) { 401866749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 401966749d0dSScott Teel __func__); 402066749d0dSScott Teel return -ENOMEM; 402166749d0dSScott Teel } 402266749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 402366749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 402466749d0dSScott Teel if (!rc) 402566749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 402666749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 402766749d0dSScott Teel else 402866749d0dSScott Teel *nlocals = le16_to_cpu( 402966749d0dSScott Teel id_ctlr->extended_logical_unit_count); 403066749d0dSScott Teel else 403166749d0dSScott Teel *nlocals = -1; 403266749d0dSScott Teel return rc; 403366749d0dSScott Teel } 403466749d0dSScott Teel 403566749d0dSScott Teel 40368aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4037edd16368SStephen M. Cameron { 4038edd16368SStephen M. Cameron /* the idea here is we could get notified 4039edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4040edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4041edd16368SStephen M. Cameron * our list of devices accordingly. 4042edd16368SStephen M. Cameron * 4043edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4044edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4045edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4046edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4047edd16368SStephen M. Cameron */ 4048a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4049edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 405003383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 405166749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 405201a02ffcSStephen M. Cameron u32 nphysicals = 0; 405301a02ffcSStephen M. Cameron u32 nlogicals = 0; 405466749d0dSScott Teel u32 nlocal_logicals = 0; 405501a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4056edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4057edd16368SStephen M. Cameron int ncurrent = 0; 40584f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4059339b2b14SStephen M. Cameron int raid_ctlr_position; 406004fa2f44SKevin Barnett bool physical_device; 4061aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4062edd16368SStephen M. Cameron 4063cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 406492084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 406592084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4066edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 406703383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 406866749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4069edd16368SStephen M. Cameron 407003383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 407166749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4072edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4073edd16368SStephen M. Cameron goto out; 4074edd16368SStephen M. Cameron } 4075edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4076edd16368SStephen M. Cameron 4077853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4078853633e8SDon Brace 407903383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4080853633e8SDon Brace logdev_list, &nlogicals)) { 4081853633e8SDon Brace h->drv_req_rescan = 1; 4082edd16368SStephen M. Cameron goto out; 4083853633e8SDon Brace } 4084edd16368SStephen M. Cameron 408566749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 408666749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 408766749d0dSScott Teel dev_warn(&h->pdev->dev, 408866749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 408966749d0dSScott Teel __func__); 409066749d0dSScott Teel } 4091edd16368SStephen M. Cameron 4092aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4093aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4094aca4a520SScott Teel * controller. 4095edd16368SStephen M. Cameron */ 4096aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4097edd16368SStephen M. Cameron 4098edd16368SStephen M. Cameron /* Allocate the per device structures */ 4099edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4100b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4101b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4102b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4103b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4104b7ec021fSScott Teel break; 4105b7ec021fSScott Teel } 4106b7ec021fSScott Teel 4107edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4108edd16368SStephen M. Cameron if (!currentsd[i]) { 4109edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4110edd16368SStephen M. Cameron __FILE__, __LINE__); 4111853633e8SDon Brace h->drv_req_rescan = 1; 4112edd16368SStephen M. Cameron goto out; 4113edd16368SStephen M. Cameron } 4114edd16368SStephen M. Cameron ndev_allocated++; 4115edd16368SStephen M. Cameron } 4116edd16368SStephen M. Cameron 41178645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4118339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4119339b2b14SStephen M. Cameron else 4120339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4121339b2b14SStephen M. Cameron 4122edd16368SStephen M. Cameron /* adjust our table of devices */ 41234f4eb9f1SScott Teel n_ext_target_devs = 0; 4124edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 41250b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4126683fc444SDon Brace int rc = 0; 4127f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 4128edd16368SStephen M. Cameron 412904fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4130edd16368SStephen M. Cameron 4131edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4132339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4133339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 413441ce4c35SStephen Cameron 413541ce4c35SStephen Cameron /* skip masked non-disk devices */ 413604fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && physical_device && 4137cca8f13bSDon Brace (physdev_list->LUN[phys_dev_index].device_type != 0x06) && 413804fa2f44SKevin Barnett (physdev_list->LUN[phys_dev_index].device_flags & 0x01)) 4139edd16368SStephen M. Cameron continue; 4140edd16368SStephen M. Cameron 4141edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4142683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4143683fc444SDon Brace &is_OBDR); 4144683fc444SDon Brace if (rc == -ENOMEM) { 4145683fc444SDon Brace dev_warn(&h->pdev->dev, 4146683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4147853633e8SDon Brace h->drv_req_rescan = 1; 4148683fc444SDon Brace goto out; 4149853633e8SDon Brace } 4150683fc444SDon Brace if (rc) { 4151683fc444SDon Brace dev_warn(&h->pdev->dev, 4152683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4153683fc444SDon Brace continue; 4154683fc444SDon Brace } 4155683fc444SDon Brace 415666749d0dSScott Teel /* Determine if this is a lun from an external target array */ 415766749d0dSScott Teel tmpdevice->external = 415866749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 415966749d0dSScott Teel nphysicals, nlocal_logicals); 416066749d0dSScott Teel 41611f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 41629b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4163edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4164edd16368SStephen M. Cameron 416534592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 416634592254SScott Teel * Event-based change notification is unreliable for those. 4167edd16368SStephen M. Cameron */ 416834592254SScott Teel if (!h->discovery_polling) { 416934592254SScott Teel if (tmpdevice->external) { 417034592254SScott Teel h->discovery_polling = 1; 417134592254SScott Teel dev_info(&h->pdev->dev, 417234592254SScott Teel "External target, activate discovery polling.\n"); 4173edd16368SStephen M. Cameron } 417434592254SScott Teel } 417534592254SScott Teel 4176edd16368SStephen M. Cameron 4177edd16368SStephen M. Cameron *this_device = *tmpdevice; 417804fa2f44SKevin Barnett this_device->physical_device = physical_device; 4179edd16368SStephen M. Cameron 418004fa2f44SKevin Barnett /* 418104fa2f44SKevin Barnett * Expose all devices except for physical devices that 418204fa2f44SKevin Barnett * are masked. 418304fa2f44SKevin Barnett */ 418404fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 41852a168208SKevin Barnett this_device->expose_device = 0; 41862a168208SKevin Barnett else 41872a168208SKevin Barnett this_device->expose_device = 1; 418841ce4c35SStephen Cameron 4189d04e62b9SKevin Barnett 4190d04e62b9SKevin Barnett /* 4191d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4192d04e62b9SKevin Barnett */ 4193d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4194d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4195edd16368SStephen M. Cameron 4196edd16368SStephen M. Cameron switch (this_device->devtype) { 41970b0e1d6cSStephen M. Cameron case TYPE_ROM: 4198edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4199edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4200edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4201edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4202edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4203edd16368SStephen M. Cameron * the inquiry data. 4204edd16368SStephen M. Cameron */ 42050b0e1d6cSStephen M. Cameron if (is_OBDR) 4206edd16368SStephen M. Cameron ncurrent++; 4207edd16368SStephen M. Cameron break; 4208edd16368SStephen M. Cameron case TYPE_DISK: 4209af15ed36SDon Brace case TYPE_ZBC: 421004fa2f44SKevin Barnett if (this_device->physical_device) { 4211b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4212b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4213ecf418d1SJoe Handzik this_device->offload_enabled = 0; 421403383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4215f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4216f2039b03SDon Brace hpsa_get_path_info(this_device, 4217f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4218b9092b79SKevin Barnett } 4219edd16368SStephen M. Cameron ncurrent++; 4220edd16368SStephen M. Cameron break; 4221edd16368SStephen M. Cameron case TYPE_TAPE: 4222edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4223cca8f13bSDon Brace ncurrent++; 4224cca8f13bSDon Brace break; 422541ce4c35SStephen Cameron case TYPE_ENCLOSURE: 422617a9e54aSDon Brace if (!this_device->external) 4227cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4228cca8f13bSDon Brace physdev_list, phys_dev_index, 4229cca8f13bSDon Brace this_device); 423041ce4c35SStephen Cameron ncurrent++; 423141ce4c35SStephen Cameron break; 4232edd16368SStephen M. Cameron case TYPE_RAID: 4233edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4234edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4235edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4236edd16368SStephen M. Cameron * don't present it. 4237edd16368SStephen M. Cameron */ 4238edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4239edd16368SStephen M. Cameron break; 4240edd16368SStephen M. Cameron ncurrent++; 4241edd16368SStephen M. Cameron break; 4242edd16368SStephen M. Cameron default: 4243edd16368SStephen M. Cameron break; 4244edd16368SStephen M. Cameron } 4245cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4246edd16368SStephen M. Cameron break; 4247edd16368SStephen M. Cameron } 4248d04e62b9SKevin Barnett 4249d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4250d04e62b9SKevin Barnett int rc = 0; 4251d04e62b9SKevin Barnett 4252d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4253d04e62b9SKevin Barnett if (rc) { 4254d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4255d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4256d04e62b9SKevin Barnett goto out; 4257d04e62b9SKevin Barnett } 4258d04e62b9SKevin Barnett } 4259d04e62b9SKevin Barnett 42608aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4261edd16368SStephen M. Cameron out: 4262edd16368SStephen M. Cameron kfree(tmpdevice); 4263edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4264edd16368SStephen M. Cameron kfree(currentsd[i]); 4265edd16368SStephen M. Cameron kfree(currentsd); 4266edd16368SStephen M. Cameron kfree(physdev_list); 4267edd16368SStephen M. Cameron kfree(logdev_list); 426866749d0dSScott Teel kfree(id_ctlr); 426903383736SDon Brace kfree(id_phys); 4270edd16368SStephen M. Cameron } 4271edd16368SStephen M. Cameron 4272ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4273ec5cbf04SWebb Scales struct scatterlist *sg) 4274ec5cbf04SWebb Scales { 4275ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4276ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4277ec5cbf04SWebb Scales 4278ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4279ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4280ec5cbf04SWebb Scales desc->Ext = 0; 4281ec5cbf04SWebb Scales } 4282ec5cbf04SWebb Scales 4283c7ee65b3SWebb Scales /* 4284c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4285edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4286edd16368SStephen M. Cameron * hpsa command, cp. 4287edd16368SStephen M. Cameron */ 428833a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4289edd16368SStephen M. Cameron struct CommandList *cp, 4290edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4291edd16368SStephen M. Cameron { 4292edd16368SStephen M. Cameron struct scatterlist *sg; 4293b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 429433a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4295edd16368SStephen M. Cameron 429633a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4297edd16368SStephen M. Cameron 4298edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4299edd16368SStephen M. Cameron if (use_sg < 0) 4300edd16368SStephen M. Cameron return use_sg; 4301edd16368SStephen M. Cameron 4302edd16368SStephen M. Cameron if (!use_sg) 4303edd16368SStephen M. Cameron goto sglist_finished; 4304edd16368SStephen M. Cameron 4305b3a7ba7cSWebb Scales /* 4306b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4307b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4308b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4309b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4310b3a7ba7cSWebb Scales * the entries in the one list. 4311b3a7ba7cSWebb Scales */ 431233a2ffceSStephen M. Cameron curr_sg = cp->SG; 4313b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4314b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4315b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4316b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4317ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 431833a2ffceSStephen M. Cameron curr_sg++; 431933a2ffceSStephen M. Cameron } 4320ec5cbf04SWebb Scales 4321b3a7ba7cSWebb Scales if (chained) { 4322b3a7ba7cSWebb Scales /* 4323b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4324b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4325b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4326b3a7ba7cSWebb Scales * where the previous loop left off. 4327b3a7ba7cSWebb Scales */ 4328b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4329b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4330b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4331b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4332b3a7ba7cSWebb Scales curr_sg++; 4333b3a7ba7cSWebb Scales } 4334b3a7ba7cSWebb Scales } 4335b3a7ba7cSWebb Scales 4336ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4337b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 433833a2ffceSStephen M. Cameron 433933a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 434033a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 434133a2ffceSStephen M. Cameron 434233a2ffceSStephen M. Cameron if (chained) { 434333a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 434450a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4345e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4346e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4347e2bea6dfSStephen M. Cameron return -1; 4348e2bea6dfSStephen M. Cameron } 434933a2ffceSStephen M. Cameron return 0; 4350edd16368SStephen M. Cameron } 4351edd16368SStephen M. Cameron 4352edd16368SStephen M. Cameron sglist_finished: 4353edd16368SStephen M. Cameron 435401a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4355c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4356edd16368SStephen M. Cameron return 0; 4357edd16368SStephen M. Cameron } 4358edd16368SStephen M. Cameron 4359283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4360283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4361283b4a9bSStephen M. Cameron { 4362283b4a9bSStephen M. Cameron int is_write = 0; 4363283b4a9bSStephen M. Cameron u32 block; 4364283b4a9bSStephen M. Cameron u32 block_cnt; 4365283b4a9bSStephen M. Cameron 4366283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4367283b4a9bSStephen M. Cameron switch (cdb[0]) { 4368283b4a9bSStephen M. Cameron case WRITE_6: 4369283b4a9bSStephen M. Cameron case WRITE_12: 4370283b4a9bSStephen M. Cameron is_write = 1; 4371283b4a9bSStephen M. Cameron case READ_6: 4372283b4a9bSStephen M. Cameron case READ_12: 4373283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4374c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4375283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4376c8a6c9a6SDon Brace if (block_cnt == 0) 4377c8a6c9a6SDon Brace block_cnt = 256; 4378283b4a9bSStephen M. Cameron } else { 4379283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4380c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4381c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4382283b4a9bSStephen M. Cameron } 4383283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4384283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4385283b4a9bSStephen M. Cameron 4386283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4387283b4a9bSStephen M. Cameron cdb[1] = 0; 4388283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4389283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4390283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4391283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4392283b4a9bSStephen M. Cameron cdb[6] = 0; 4393283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4394283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4395283b4a9bSStephen M. Cameron cdb[9] = 0; 4396283b4a9bSStephen M. Cameron *cdb_len = 10; 4397283b4a9bSStephen M. Cameron break; 4398283b4a9bSStephen M. Cameron } 4399283b4a9bSStephen M. Cameron return 0; 4400283b4a9bSStephen M. Cameron } 4401283b4a9bSStephen M. Cameron 4402c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4403283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 440403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4405e1f7de0cSMatt Gates { 4406e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4407e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4408e1f7de0cSMatt Gates unsigned int len; 4409e1f7de0cSMatt Gates unsigned int total_len = 0; 4410e1f7de0cSMatt Gates struct scatterlist *sg; 4411e1f7de0cSMatt Gates u64 addr64; 4412e1f7de0cSMatt Gates int use_sg, i; 4413e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4414e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4415e1f7de0cSMatt Gates 4416283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 441703383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 441803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4419283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 442003383736SDon Brace } 4421283b4a9bSStephen M. Cameron 4422e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4423e1f7de0cSMatt Gates 442403383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 442503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4426283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 442703383736SDon Brace } 4428283b4a9bSStephen M. Cameron 4429e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4430e1f7de0cSMatt Gates 4431e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4432e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4433e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4434e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4435e1f7de0cSMatt Gates 4436e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 443703383736SDon Brace if (use_sg < 0) { 443803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4439e1f7de0cSMatt Gates return use_sg; 444003383736SDon Brace } 4441e1f7de0cSMatt Gates 4442e1f7de0cSMatt Gates if (use_sg) { 4443e1f7de0cSMatt Gates curr_sg = cp->SG; 4444e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4445e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4446e1f7de0cSMatt Gates len = sg_dma_len(sg); 4447e1f7de0cSMatt Gates total_len += len; 444850a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 444950a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 445050a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4451e1f7de0cSMatt Gates curr_sg++; 4452e1f7de0cSMatt Gates } 445350a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4454e1f7de0cSMatt Gates 4455e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4456e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4457e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4458e1f7de0cSMatt Gates break; 4459e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4460e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4461e1f7de0cSMatt Gates break; 4462e1f7de0cSMatt Gates case DMA_NONE: 4463e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4464e1f7de0cSMatt Gates break; 4465e1f7de0cSMatt Gates default: 4466e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4467e1f7de0cSMatt Gates cmd->sc_data_direction); 4468e1f7de0cSMatt Gates BUG(); 4469e1f7de0cSMatt Gates break; 4470e1f7de0cSMatt Gates } 4471e1f7de0cSMatt Gates } else { 4472e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4473e1f7de0cSMatt Gates } 4474e1f7de0cSMatt Gates 4475c349775eSScott Teel c->Header.SGList = use_sg; 4476e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 44772b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 44782b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 44792b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 44802b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 44812b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4482283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4483283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4484c349775eSScott Teel /* Tag was already set at init time. */ 4485e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4486e1f7de0cSMatt Gates return 0; 4487e1f7de0cSMatt Gates } 4488edd16368SStephen M. Cameron 4489283b4a9bSStephen M. Cameron /* 4490283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4491283b4a9bSStephen M. Cameron * I/O accelerator path. 4492283b4a9bSStephen M. Cameron */ 4493283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4494283b4a9bSStephen M. Cameron struct CommandList *c) 4495283b4a9bSStephen M. Cameron { 4496283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4497283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4498283b4a9bSStephen M. Cameron 449903383736SDon Brace c->phys_disk = dev; 450003383736SDon Brace 4501283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 450203383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4503283b4a9bSStephen M. Cameron } 4504283b4a9bSStephen M. Cameron 4505dd0e19f3SScott Teel /* 4506dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4507dd0e19f3SScott Teel */ 4508dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4509dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4510dd0e19f3SScott Teel { 4511dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4512dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4513dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4514dd0e19f3SScott Teel u64 first_block; 4515dd0e19f3SScott Teel 4516dd0e19f3SScott Teel /* Are we doing encryption on this device */ 45172b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4518dd0e19f3SScott Teel return; 4519dd0e19f3SScott Teel /* Set the data encryption key index. */ 4520dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4521dd0e19f3SScott Teel 4522dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4523dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4524dd0e19f3SScott Teel 4525dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4526dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4527dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4528dd0e19f3SScott Teel */ 4529dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4530dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4531dd0e19f3SScott Teel case WRITE_6: 4532dd0e19f3SScott Teel case READ_6: 45332b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4534dd0e19f3SScott Teel break; 4535dd0e19f3SScott Teel case WRITE_10: 4536dd0e19f3SScott Teel case READ_10: 4537dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4538dd0e19f3SScott Teel case WRITE_12: 4539dd0e19f3SScott Teel case READ_12: 45402b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4541dd0e19f3SScott Teel break; 4542dd0e19f3SScott Teel case WRITE_16: 4543dd0e19f3SScott Teel case READ_16: 45442b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4545dd0e19f3SScott Teel break; 4546dd0e19f3SScott Teel default: 4547dd0e19f3SScott Teel dev_err(&h->pdev->dev, 45482b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 45492b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4550dd0e19f3SScott Teel BUG(); 4551dd0e19f3SScott Teel break; 4552dd0e19f3SScott Teel } 45532b08b3e9SDon Brace 45542b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 45552b08b3e9SDon Brace first_block = first_block * 45562b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 45572b08b3e9SDon Brace 45582b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 45592b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4560dd0e19f3SScott Teel } 4561dd0e19f3SScott Teel 4562c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4563c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 456403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4565c349775eSScott Teel { 4566c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4567c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4568c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4569c349775eSScott Teel int use_sg, i; 4570c349775eSScott Teel struct scatterlist *sg; 4571c349775eSScott Teel u64 addr64; 4572c349775eSScott Teel u32 len; 4573c349775eSScott Teel u32 total_len = 0; 4574c349775eSScott Teel 4575d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4576c349775eSScott Teel 457703383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 457803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4579c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 458003383736SDon Brace } 458103383736SDon Brace 4582c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4583c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4584c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4585c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4586c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4587c349775eSScott Teel 4588c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4589c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4590c349775eSScott Teel 4591c349775eSScott Teel use_sg = scsi_dma_map(cmd); 459203383736SDon Brace if (use_sg < 0) { 459303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4594c349775eSScott Teel return use_sg; 459503383736SDon Brace } 4596c349775eSScott Teel 4597c349775eSScott Teel if (use_sg) { 4598c349775eSScott Teel curr_sg = cp->sg; 4599d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4600d9a729f3SWebb Scales addr64 = le64_to_cpu( 4601d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4602d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4603d9a729f3SWebb Scales curr_sg->length = 0; 4604d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4605d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4606d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4607d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4608d9a729f3SWebb Scales 4609d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4610d9a729f3SWebb Scales } 4611c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4612c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4613c349775eSScott Teel len = sg_dma_len(sg); 4614c349775eSScott Teel total_len += len; 4615c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4616c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4617c349775eSScott Teel curr_sg->reserved[0] = 0; 4618c349775eSScott Teel curr_sg->reserved[1] = 0; 4619c349775eSScott Teel curr_sg->reserved[2] = 0; 4620c349775eSScott Teel curr_sg->chain_indicator = 0; 4621c349775eSScott Teel curr_sg++; 4622c349775eSScott Teel } 4623c349775eSScott Teel 4624c349775eSScott Teel switch (cmd->sc_data_direction) { 4625c349775eSScott Teel case DMA_TO_DEVICE: 4626dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4627dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4628c349775eSScott Teel break; 4629c349775eSScott Teel case DMA_FROM_DEVICE: 4630dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4631dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4632c349775eSScott Teel break; 4633c349775eSScott Teel case DMA_NONE: 4634dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4635dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4636c349775eSScott Teel break; 4637c349775eSScott Teel default: 4638c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4639c349775eSScott Teel cmd->sc_data_direction); 4640c349775eSScott Teel BUG(); 4641c349775eSScott Teel break; 4642c349775eSScott Teel } 4643c349775eSScott Teel } else { 4644dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4645dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4646c349775eSScott Teel } 4647dd0e19f3SScott Teel 4648dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4649dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4650dd0e19f3SScott Teel 46512b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4652f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4653c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4654c349775eSScott Teel 4655c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4656c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4657c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 465850a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4659c349775eSScott Teel 4660d9a729f3SWebb Scales /* fill in sg elements */ 4661d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4662d9a729f3SWebb Scales cp->sg_count = 1; 4663a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4664d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4665d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4666d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4667d9a729f3SWebb Scales return -1; 4668d9a729f3SWebb Scales } 4669d9a729f3SWebb Scales } else 4670d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4671d9a729f3SWebb Scales 4672c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4673c349775eSScott Teel return 0; 4674c349775eSScott Teel } 4675c349775eSScott Teel 4676c349775eSScott Teel /* 4677c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4678c349775eSScott Teel */ 4679c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4680c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 468103383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4682c349775eSScott Teel { 468303383736SDon Brace /* Try to honor the device's queue depth */ 468403383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 468503383736SDon Brace phys_disk->queue_depth) { 468603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 468703383736SDon Brace return IO_ACCEL_INELIGIBLE; 468803383736SDon Brace } 4689c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4690c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 469103383736SDon Brace cdb, cdb_len, scsi3addr, 469203383736SDon Brace phys_disk); 4693c349775eSScott Teel else 4694c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 469503383736SDon Brace cdb, cdb_len, scsi3addr, 469603383736SDon Brace phys_disk); 4697c349775eSScott Teel } 4698c349775eSScott Teel 46996b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 47006b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 47016b80b18fSScott Teel { 47026b80b18fSScott Teel if (offload_to_mirror == 0) { 47036b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 47042b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 47056b80b18fSScott Teel return; 47066b80b18fSScott Teel } 47076b80b18fSScott Teel do { 47086b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 47092b08b3e9SDon Brace *current_group = *map_index / 47102b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 47116b80b18fSScott Teel if (offload_to_mirror == *current_group) 47126b80b18fSScott Teel continue; 47132b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 47146b80b18fSScott Teel /* select map index from next group */ 47152b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 47166b80b18fSScott Teel (*current_group)++; 47176b80b18fSScott Teel } else { 47186b80b18fSScott Teel /* select map index from first group */ 47192b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 47206b80b18fSScott Teel *current_group = 0; 47216b80b18fSScott Teel } 47226b80b18fSScott Teel } while (offload_to_mirror != *current_group); 47236b80b18fSScott Teel } 47246b80b18fSScott Teel 4725283b4a9bSStephen M. Cameron /* 4726283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4727283b4a9bSStephen M. Cameron */ 4728283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4729283b4a9bSStephen M. Cameron struct CommandList *c) 4730283b4a9bSStephen M. Cameron { 4731283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4732283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4733283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4734283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4735283b4a9bSStephen M. Cameron int is_write = 0; 4736283b4a9bSStephen M. Cameron u32 map_index; 4737283b4a9bSStephen M. Cameron u64 first_block, last_block; 4738283b4a9bSStephen M. Cameron u32 block_cnt; 4739283b4a9bSStephen M. Cameron u32 blocks_per_row; 4740283b4a9bSStephen M. Cameron u64 first_row, last_row; 4741283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4742283b4a9bSStephen M. Cameron u32 first_column, last_column; 47436b80b18fSScott Teel u64 r0_first_row, r0_last_row; 47446b80b18fSScott Teel u32 r5or6_blocks_per_row; 47456b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 47466b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 47476b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 47486b80b18fSScott Teel u32 total_disks_per_row; 47496b80b18fSScott Teel u32 stripesize; 47506b80b18fSScott Teel u32 first_group, last_group, current_group; 4751283b4a9bSStephen M. Cameron u32 map_row; 4752283b4a9bSStephen M. Cameron u32 disk_handle; 4753283b4a9bSStephen M. Cameron u64 disk_block; 4754283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4755283b4a9bSStephen M. Cameron u8 cdb[16]; 4756283b4a9bSStephen M. Cameron u8 cdb_len; 47572b08b3e9SDon Brace u16 strip_size; 4758283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4759283b4a9bSStephen M. Cameron u64 tmpdiv; 4760283b4a9bSStephen M. Cameron #endif 47616b80b18fSScott Teel int offload_to_mirror; 4762283b4a9bSStephen M. Cameron 4763283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4764283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4765283b4a9bSStephen M. Cameron case WRITE_6: 4766283b4a9bSStephen M. Cameron is_write = 1; 4767283b4a9bSStephen M. Cameron case READ_6: 4768c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4769283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 47703fa89a04SStephen M. Cameron if (block_cnt == 0) 47713fa89a04SStephen M. Cameron block_cnt = 256; 4772283b4a9bSStephen M. Cameron break; 4773283b4a9bSStephen M. Cameron case WRITE_10: 4774283b4a9bSStephen M. Cameron is_write = 1; 4775283b4a9bSStephen M. Cameron case READ_10: 4776283b4a9bSStephen M. Cameron first_block = 4777283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4778283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4779283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4780283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4781283b4a9bSStephen M. Cameron block_cnt = 4782283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4783283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4784283b4a9bSStephen M. Cameron break; 4785283b4a9bSStephen M. Cameron case WRITE_12: 4786283b4a9bSStephen M. Cameron is_write = 1; 4787283b4a9bSStephen M. Cameron case READ_12: 4788283b4a9bSStephen M. Cameron first_block = 4789283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4790283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4791283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4792283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4793283b4a9bSStephen M. Cameron block_cnt = 4794283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4795283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4796283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4797283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4798283b4a9bSStephen M. Cameron break; 4799283b4a9bSStephen M. Cameron case WRITE_16: 4800283b4a9bSStephen M. Cameron is_write = 1; 4801283b4a9bSStephen M. Cameron case READ_16: 4802283b4a9bSStephen M. Cameron first_block = 4803283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4804283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4805283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4806283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4807283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4808283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4809283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4810283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4811283b4a9bSStephen M. Cameron block_cnt = 4812283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4813283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4814283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4815283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4816283b4a9bSStephen M. Cameron break; 4817283b4a9bSStephen M. Cameron default: 4818283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4819283b4a9bSStephen M. Cameron } 4820283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4821283b4a9bSStephen M. Cameron 4822283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4823283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4824283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4825283b4a9bSStephen M. Cameron 4826283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 48272b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 48282b08b3e9SDon Brace last_block < first_block) 4829283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4830283b4a9bSStephen M. Cameron 4831283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 48322b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 48332b08b3e9SDon Brace le16_to_cpu(map->strip_size); 48342b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4835283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4836283b4a9bSStephen M. Cameron tmpdiv = first_block; 4837283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4838283b4a9bSStephen M. Cameron first_row = tmpdiv; 4839283b4a9bSStephen M. Cameron tmpdiv = last_block; 4840283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4841283b4a9bSStephen M. Cameron last_row = tmpdiv; 4842283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4843283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4844283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 48452b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4846283b4a9bSStephen M. Cameron first_column = tmpdiv; 4847283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 48482b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4849283b4a9bSStephen M. Cameron last_column = tmpdiv; 4850283b4a9bSStephen M. Cameron #else 4851283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4852283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4853283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4854283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 48552b08b3e9SDon Brace first_column = first_row_offset / strip_size; 48562b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4857283b4a9bSStephen M. Cameron #endif 4858283b4a9bSStephen M. Cameron 4859283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 4860283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 4861283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4862283b4a9bSStephen M. Cameron 4863283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 48642b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 48652b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 4866283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 48672b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 48686b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 48696b80b18fSScott Teel 48706b80b18fSScott Teel switch (dev->raid_level) { 48716b80b18fSScott Teel case HPSA_RAID_0: 48726b80b18fSScott Teel break; /* nothing special to do */ 48736b80b18fSScott Teel case HPSA_RAID_1: 48746b80b18fSScott Teel /* Handles load balance across RAID 1 members. 48756b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 48766b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 4877283b4a9bSStephen M. Cameron */ 48782b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 4879283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 48802b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 4881283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 48826b80b18fSScott Teel break; 48836b80b18fSScott Teel case HPSA_RAID_ADM: 48846b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 48856b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 48866b80b18fSScott Teel */ 48872b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 48886b80b18fSScott Teel 48896b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 48906b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 48916b80b18fSScott Teel &map_index, ¤t_group); 48926b80b18fSScott Teel /* set mirror group to use next time */ 48936b80b18fSScott Teel offload_to_mirror = 48942b08b3e9SDon Brace (offload_to_mirror >= 48952b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 48966b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 48976b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 48986b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 48996b80b18fSScott Teel * function since multiple threads might simultaneously 49006b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 49016b80b18fSScott Teel */ 49026b80b18fSScott Teel break; 49036b80b18fSScott Teel case HPSA_RAID_5: 49046b80b18fSScott Teel case HPSA_RAID_6: 49052b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 49066b80b18fSScott Teel break; 49076b80b18fSScott Teel 49086b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 49096b80b18fSScott Teel r5or6_blocks_per_row = 49102b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 49112b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49126b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 49132b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 49142b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 49156b80b18fSScott Teel #if BITS_PER_LONG == 32 49166b80b18fSScott Teel tmpdiv = first_block; 49176b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 49186b80b18fSScott Teel tmpdiv = first_group; 49196b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 49206b80b18fSScott Teel first_group = tmpdiv; 49216b80b18fSScott Teel tmpdiv = last_block; 49226b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 49236b80b18fSScott Teel tmpdiv = last_group; 49246b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 49256b80b18fSScott Teel last_group = tmpdiv; 49266b80b18fSScott Teel #else 49276b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 49286b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 49296b80b18fSScott Teel #endif 4930000ff7c2SStephen M. Cameron if (first_group != last_group) 49316b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 49326b80b18fSScott Teel 49336b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 49346b80b18fSScott Teel #if BITS_PER_LONG == 32 49356b80b18fSScott Teel tmpdiv = first_block; 49366b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 49376b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 49386b80b18fSScott Teel tmpdiv = last_block; 49396b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 49406b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 49416b80b18fSScott Teel #else 49426b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 49436b80b18fSScott Teel first_block / stripesize; 49446b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 49456b80b18fSScott Teel #endif 49466b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 49476b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 49486b80b18fSScott Teel 49496b80b18fSScott Teel 49506b80b18fSScott Teel /* Verify request is in a single column */ 49516b80b18fSScott Teel #if BITS_PER_LONG == 32 49526b80b18fSScott Teel tmpdiv = first_block; 49536b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 49546b80b18fSScott Teel tmpdiv = first_row_offset; 49556b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 49566b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 49576b80b18fSScott Teel tmpdiv = last_block; 49586b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 49596b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 49606b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 49616b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 49626b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 49636b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 49646b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 49656b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 49666b80b18fSScott Teel r5or6_last_column = tmpdiv; 49676b80b18fSScott Teel #else 49686b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 49696b80b18fSScott Teel (u32)((first_block % stripesize) % 49706b80b18fSScott Teel r5or6_blocks_per_row); 49716b80b18fSScott Teel 49726b80b18fSScott Teel r5or6_last_row_offset = 49736b80b18fSScott Teel (u32)((last_block % stripesize) % 49746b80b18fSScott Teel r5or6_blocks_per_row); 49756b80b18fSScott Teel 49766b80b18fSScott Teel first_column = r5or6_first_column = 49772b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 49786b80b18fSScott Teel r5or6_last_column = 49792b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 49806b80b18fSScott Teel #endif 49816b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 49826b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 49836b80b18fSScott Teel 49846b80b18fSScott Teel /* Request is eligible */ 49856b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 49862b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 49876b80b18fSScott Teel 49886b80b18fSScott Teel map_index = (first_group * 49892b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 49906b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 49916b80b18fSScott Teel break; 49926b80b18fSScott Teel default: 49936b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 4994283b4a9bSStephen M. Cameron } 49956b80b18fSScott Teel 499607543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 499707543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 499807543e0cSStephen Cameron 499903383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5000c3390df4SDon Brace if (!c->phys_disk) 5001c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 500203383736SDon Brace 5003283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 50042b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 50052b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 50062b08b3e9SDon Brace (first_row_offset - first_column * 50072b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5008283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5009283b4a9bSStephen M. Cameron 5010283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5011283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5012283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5013283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5014283b4a9bSStephen M. Cameron } 5015283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5016283b4a9bSStephen M. Cameron 5017283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5018283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5019283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5020283b4a9bSStephen M. Cameron cdb[1] = 0; 5021283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5022283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5023283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5024283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5025283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5026283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5027283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5028283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5029283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5030283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5031283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5032283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5033283b4a9bSStephen M. Cameron cdb[14] = 0; 5034283b4a9bSStephen M. Cameron cdb[15] = 0; 5035283b4a9bSStephen M. Cameron cdb_len = 16; 5036283b4a9bSStephen M. Cameron } else { 5037283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5038283b4a9bSStephen M. Cameron cdb[1] = 0; 5039283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5040283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5041283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5042283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5043283b4a9bSStephen M. Cameron cdb[6] = 0; 5044283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5045283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5046283b4a9bSStephen M. Cameron cdb[9] = 0; 5047283b4a9bSStephen M. Cameron cdb_len = 10; 5048283b4a9bSStephen M. Cameron } 5049283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 505003383736SDon Brace dev->scsi3addr, 505103383736SDon Brace dev->phys_disk[map_index]); 5052283b4a9bSStephen M. Cameron } 5053283b4a9bSStephen M. Cameron 505425163bd5SWebb Scales /* 505525163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 505625163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 505725163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 505825163bd5SWebb Scales */ 5059574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5060574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5061574f05d3SStephen Cameron unsigned char scsi3addr[]) 5062edd16368SStephen M. Cameron { 5063edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5064edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5065edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5066edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5067edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5068f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5069edd16368SStephen M. Cameron 5070edd16368SStephen M. Cameron /* Fill in the request block... */ 5071edd16368SStephen M. Cameron 5072edd16368SStephen M. Cameron c->Request.Timeout = 0; 5073edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5074edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5075edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5076edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5077edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5078a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5079a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5080edd16368SStephen M. Cameron break; 5081edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5082a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5083a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5084edd16368SStephen M. Cameron break; 5085edd16368SStephen M. Cameron case DMA_NONE: 5086a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5087a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5088edd16368SStephen M. Cameron break; 5089edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5090edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5091edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5092edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5093edd16368SStephen M. Cameron */ 5094edd16368SStephen M. Cameron 5095a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5096a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5097edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5098edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5099edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5100edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5101edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5102edd16368SStephen M. Cameron * our purposes here. 5103edd16368SStephen M. Cameron */ 5104edd16368SStephen M. Cameron 5105edd16368SStephen M. Cameron break; 5106edd16368SStephen M. Cameron 5107edd16368SStephen M. Cameron default: 5108edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5109edd16368SStephen M. Cameron cmd->sc_data_direction); 5110edd16368SStephen M. Cameron BUG(); 5111edd16368SStephen M. Cameron break; 5112edd16368SStephen M. Cameron } 5113edd16368SStephen M. Cameron 511433a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 511573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5116edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5117edd16368SStephen M. Cameron } 5118edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5119edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5120edd16368SStephen M. Cameron return 0; 5121edd16368SStephen M. Cameron } 5122edd16368SStephen M. Cameron 5123360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5124360c73bdSStephen Cameron struct CommandList *c) 5125360c73bdSStephen Cameron { 5126360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5127360c73bdSStephen Cameron 5128360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5129360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5130360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5131360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5132360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5133360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5134360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5135360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5136360c73bdSStephen Cameron c->cmdindex = index; 5137360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5138360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5139360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5140360c73bdSStephen Cameron c->h = h; 5141a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5142360c73bdSStephen Cameron } 5143360c73bdSStephen Cameron 5144360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5145360c73bdSStephen Cameron { 5146360c73bdSStephen Cameron int i; 5147360c73bdSStephen Cameron 5148360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5149360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5150360c73bdSStephen Cameron 5151360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5152360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5153360c73bdSStephen Cameron } 5154360c73bdSStephen Cameron } 5155360c73bdSStephen Cameron 5156360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5157360c73bdSStephen Cameron struct CommandList *c) 5158360c73bdSStephen Cameron { 5159360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5160360c73bdSStephen Cameron 516173153fe5SWebb Scales BUG_ON(c->cmdindex != index); 516273153fe5SWebb Scales 5163360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5164360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5165360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5166360c73bdSStephen Cameron } 5167360c73bdSStephen Cameron 5168592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5169592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5170592a0ad5SWebb Scales unsigned char *scsi3addr) 5171592a0ad5SWebb Scales { 5172592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5173592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5174592a0ad5SWebb Scales 5175592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5176592a0ad5SWebb Scales 5177592a0ad5SWebb Scales if (dev->offload_enabled) { 5178592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5179592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5180592a0ad5SWebb Scales c->scsi_cmd = cmd; 5181592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5182592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5183592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5184a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5185592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5186592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5187592a0ad5SWebb Scales c->scsi_cmd = cmd; 5188592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5189592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5190592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5191592a0ad5SWebb Scales } 5192592a0ad5SWebb Scales return rc; 5193592a0ad5SWebb Scales } 5194592a0ad5SWebb Scales 5195080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5196080ef1ccSDon Brace { 5197080ef1ccSDon Brace struct scsi_cmnd *cmd; 5198080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 51998a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5200080ef1ccSDon Brace 5201080ef1ccSDon Brace cmd = c->scsi_cmd; 5202080ef1ccSDon Brace dev = cmd->device->hostdata; 5203080ef1ccSDon Brace if (!dev) { 5204080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 52058a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5206080ef1ccSDon Brace } 5207d604f533SWebb Scales if (c->reset_pending) 5208d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5209a58e7e53SWebb Scales if (c->abort_pending) 5210a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5211592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5212592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5213592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5214592a0ad5SWebb Scales int rc; 5215592a0ad5SWebb Scales 5216592a0ad5SWebb Scales if (c2->error_data.serv_response == 5217592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5218592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5219592a0ad5SWebb Scales if (rc == 0) 5220592a0ad5SWebb Scales return; 5221592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5222592a0ad5SWebb Scales /* 5223592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5224592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5225592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5226592a0ad5SWebb Scales */ 5227592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 52288a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5229592a0ad5SWebb Scales } 5230592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5231592a0ad5SWebb Scales } 5232592a0ad5SWebb Scales } 5233360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5234080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5235080ef1ccSDon Brace /* 5236080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5237080ef1ccSDon Brace * again via scsi mid layer, which will then get 5238080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5239592a0ad5SWebb Scales * 5240592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5241592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5242080ef1ccSDon Brace */ 5243080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5244080ef1ccSDon Brace cmd->scsi_done(cmd); 5245080ef1ccSDon Brace } 5246080ef1ccSDon Brace } 5247080ef1ccSDon Brace 5248574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5249574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5250574f05d3SStephen Cameron { 5251574f05d3SStephen Cameron struct ctlr_info *h; 5252574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5253574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5254574f05d3SStephen Cameron struct CommandList *c; 5255574f05d3SStephen Cameron int rc = 0; 5256574f05d3SStephen Cameron 5257574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5258574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 525973153fe5SWebb Scales 526073153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 526173153fe5SWebb Scales 5262574f05d3SStephen Cameron dev = cmd->device->hostdata; 5263574f05d3SStephen Cameron if (!dev) { 5264574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5265574f05d3SStephen Cameron cmd->scsi_done(cmd); 5266574f05d3SStephen Cameron return 0; 5267574f05d3SStephen Cameron } 526873153fe5SWebb Scales 5269574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5270574f05d3SStephen Cameron 5271574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 527225163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5273574f05d3SStephen Cameron cmd->scsi_done(cmd); 5274574f05d3SStephen Cameron return 0; 5275574f05d3SStephen Cameron } 527673153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5277574f05d3SStephen Cameron 5278407863cbSStephen Cameron /* 5279407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5280574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5281574f05d3SStephen Cameron */ 5282574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5283574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5284574f05d3SStephen Cameron h->acciopath_status)) { 5285592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5286574f05d3SStephen Cameron if (rc == 0) 5287592a0ad5SWebb Scales return 0; 5288592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 528973153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5290574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5291574f05d3SStephen Cameron } 5292574f05d3SStephen Cameron } 5293574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5294574f05d3SStephen Cameron } 5295574f05d3SStephen Cameron 52968ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 52975f389360SStephen M. Cameron { 52985f389360SStephen M. Cameron unsigned long flags; 52995f389360SStephen M. Cameron 53005f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 53015f389360SStephen M. Cameron h->scan_finished = 1; 53025f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 53035f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 53045f389360SStephen M. Cameron } 53055f389360SStephen M. Cameron 5306a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5307a08a8471SStephen M. Cameron { 5308a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5309a08a8471SStephen M. Cameron unsigned long flags; 5310a08a8471SStephen M. Cameron 53118ebc9248SWebb Scales /* 53128ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 53138ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 53148ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 53158ebc9248SWebb Scales * piling up on a locked up controller. 53168ebc9248SWebb Scales */ 53178ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 53188ebc9248SWebb Scales return hpsa_scan_complete(h); 53195f389360SStephen M. Cameron 5320a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5321a08a8471SStephen M. Cameron while (1) { 5322a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5323a08a8471SStephen M. Cameron if (h->scan_finished) 5324a08a8471SStephen M. Cameron break; 5325a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5326a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5327a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5328a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5329a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5330a08a8471SStephen M. Cameron * happen if we're in here. 5331a08a8471SStephen M. Cameron */ 5332a08a8471SStephen M. Cameron } 5333a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5334a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5335a08a8471SStephen M. Cameron 53368ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 53378ebc9248SWebb Scales return hpsa_scan_complete(h); 53385f389360SStephen M. Cameron 53398aa60681SDon Brace hpsa_update_scsi_devices(h); 5340a08a8471SStephen M. Cameron 53418ebc9248SWebb Scales hpsa_scan_complete(h); 5342a08a8471SStephen M. Cameron } 5343a08a8471SStephen M. Cameron 53447c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 53457c0a0229SDon Brace { 534603383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 534703383736SDon Brace 534803383736SDon Brace if (!logical_drive) 534903383736SDon Brace return -ENODEV; 53507c0a0229SDon Brace 53517c0a0229SDon Brace if (qdepth < 1) 53527c0a0229SDon Brace qdepth = 1; 535303383736SDon Brace else if (qdepth > logical_drive->queue_depth) 535403383736SDon Brace qdepth = logical_drive->queue_depth; 535503383736SDon Brace 535603383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 53577c0a0229SDon Brace } 53587c0a0229SDon Brace 5359a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5360a08a8471SStephen M. Cameron unsigned long elapsed_time) 5361a08a8471SStephen M. Cameron { 5362a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5363a08a8471SStephen M. Cameron unsigned long flags; 5364a08a8471SStephen M. Cameron int finished; 5365a08a8471SStephen M. Cameron 5366a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5367a08a8471SStephen M. Cameron finished = h->scan_finished; 5368a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5369a08a8471SStephen M. Cameron return finished; 5370a08a8471SStephen M. Cameron } 5371a08a8471SStephen M. Cameron 53722946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5373edd16368SStephen M. Cameron { 5374b705690dSStephen M. Cameron struct Scsi_Host *sh; 5375edd16368SStephen M. Cameron 5376b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 53772946e82bSRobert Elliott if (sh == NULL) { 53782946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 53792946e82bSRobert Elliott return -ENOMEM; 53802946e82bSRobert Elliott } 5381b705690dSStephen M. Cameron 5382b705690dSStephen M. Cameron sh->io_port = 0; 5383b705690dSStephen M. Cameron sh->n_io_port = 0; 5384b705690dSStephen M. Cameron sh->this_id = -1; 5385b705690dSStephen M. Cameron sh->max_channel = 3; 5386b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5387b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5388b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 538941ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5390d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5391b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5392d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5393b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5394b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5395b705690dSStephen M. Cameron sh->unique_id = sh->irq; 539664d513acSChristoph Hellwig 53972946e82bSRobert Elliott h->scsi_host = sh; 53982946e82bSRobert Elliott return 0; 53992946e82bSRobert Elliott } 54002946e82bSRobert Elliott 54012946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 54022946e82bSRobert Elliott { 54032946e82bSRobert Elliott int rv; 54042946e82bSRobert Elliott 54052946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 54062946e82bSRobert Elliott if (rv) { 54072946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 54082946e82bSRobert Elliott return rv; 54092946e82bSRobert Elliott } 54102946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 54112946e82bSRobert Elliott return 0; 5412edd16368SStephen M. Cameron } 5413edd16368SStephen M. Cameron 5414b69324ffSWebb Scales /* 541573153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 541673153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 541773153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 541873153fe5SWebb Scales * low-numbered entries for our own uses.) 541973153fe5SWebb Scales */ 542073153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 542173153fe5SWebb Scales { 542273153fe5SWebb Scales int idx = scmd->request->tag; 542373153fe5SWebb Scales 542473153fe5SWebb Scales if (idx < 0) 542573153fe5SWebb Scales return idx; 542673153fe5SWebb Scales 542773153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 542873153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 542973153fe5SWebb Scales } 543073153fe5SWebb Scales 543173153fe5SWebb Scales /* 5432b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5433b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5434b69324ffSWebb Scales */ 5435b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5436b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5437b69324ffSWebb Scales int reply_queue) 5438edd16368SStephen M. Cameron { 54398919358eSTomas Henzl int rc; 5440edd16368SStephen M. Cameron 5441a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5442a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5443a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5444c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 544525163bd5SWebb Scales if (rc) 5446b69324ffSWebb Scales return rc; 5447edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5448edd16368SStephen M. Cameron 5449b69324ffSWebb Scales /* Check if the unit is already ready. */ 5450edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5451b69324ffSWebb Scales return 0; 5452edd16368SStephen M. Cameron 5453b69324ffSWebb Scales /* 5454b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5455b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5456b69324ffSWebb Scales * looking for (but, success is good too). 5457b69324ffSWebb Scales */ 5458edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5459edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5460edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5461edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5462b69324ffSWebb Scales return 0; 5463b69324ffSWebb Scales 5464b69324ffSWebb Scales return 1; 5465b69324ffSWebb Scales } 5466b69324ffSWebb Scales 5467b69324ffSWebb Scales /* 5468b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5469b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5470b69324ffSWebb Scales */ 5471b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5472b69324ffSWebb Scales struct CommandList *c, 5473b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5474b69324ffSWebb Scales { 5475b69324ffSWebb Scales int rc; 5476b69324ffSWebb Scales int count = 0; 5477b69324ffSWebb Scales int waittime = 1; /* seconds */ 5478b69324ffSWebb Scales 5479b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5480b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5481b69324ffSWebb Scales 5482b69324ffSWebb Scales /* 5483b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5484b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5485b69324ffSWebb Scales */ 5486b69324ffSWebb Scales msleep(1000 * waittime); 5487b69324ffSWebb Scales 5488b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5489b69324ffSWebb Scales if (!rc) 5490edd16368SStephen M. Cameron break; 5491b69324ffSWebb Scales 5492b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5493b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5494b69324ffSWebb Scales waittime *= 2; 5495b69324ffSWebb Scales 5496b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5497b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5498b69324ffSWebb Scales waittime); 5499b69324ffSWebb Scales } 5500b69324ffSWebb Scales 5501b69324ffSWebb Scales return rc; 5502b69324ffSWebb Scales } 5503b69324ffSWebb Scales 5504b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5505b69324ffSWebb Scales unsigned char lunaddr[], 5506b69324ffSWebb Scales int reply_queue) 5507b69324ffSWebb Scales { 5508b69324ffSWebb Scales int first_queue; 5509b69324ffSWebb Scales int last_queue; 5510b69324ffSWebb Scales int rq; 5511b69324ffSWebb Scales int rc = 0; 5512b69324ffSWebb Scales struct CommandList *c; 5513b69324ffSWebb Scales 5514b69324ffSWebb Scales c = cmd_alloc(h); 5515b69324ffSWebb Scales 5516b69324ffSWebb Scales /* 5517b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5518b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5519b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5520b69324ffSWebb Scales */ 5521b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5522b69324ffSWebb Scales first_queue = 0; 5523b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5524b69324ffSWebb Scales } else { 5525b69324ffSWebb Scales first_queue = reply_queue; 5526b69324ffSWebb Scales last_queue = reply_queue; 5527b69324ffSWebb Scales } 5528b69324ffSWebb Scales 5529b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5530b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5531b69324ffSWebb Scales if (rc) 5532b69324ffSWebb Scales break; 5533edd16368SStephen M. Cameron } 5534edd16368SStephen M. Cameron 5535edd16368SStephen M. Cameron if (rc) 5536edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5537edd16368SStephen M. Cameron else 5538edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5539edd16368SStephen M. Cameron 554045fcb86eSStephen Cameron cmd_free(h, c); 5541edd16368SStephen M. Cameron return rc; 5542edd16368SStephen M. Cameron } 5543edd16368SStephen M. Cameron 5544edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5545edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5546edd16368SStephen M. Cameron */ 5547edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5548edd16368SStephen M. Cameron { 5549edd16368SStephen M. Cameron int rc; 5550edd16368SStephen M. Cameron struct ctlr_info *h; 5551edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 55520b9b7b6eSScott Teel u8 reset_type; 55532dc127bbSDan Carpenter char msg[48]; 5554edd16368SStephen M. Cameron 5555edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5556edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5557edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5558edd16368SStephen M. Cameron return FAILED; 5559e345893bSDon Brace 5560e345893bSDon Brace if (lockup_detected(h)) 5561e345893bSDon Brace return FAILED; 5562e345893bSDon Brace 5563edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5564edd16368SStephen M. Cameron if (!dev) { 5565d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5566edd16368SStephen M. Cameron return FAILED; 5567edd16368SStephen M. Cameron } 556825163bd5SWebb Scales 556925163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 557025163bd5SWebb Scales if (lockup_detected(h)) { 55712dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 55722dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 557373153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 557473153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 557525163bd5SWebb Scales return FAILED; 557625163bd5SWebb Scales } 557725163bd5SWebb Scales 557825163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 557925163bd5SWebb Scales if (detect_controller_lockup(h)) { 55802dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 55812dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 558273153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 558373153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 558425163bd5SWebb Scales return FAILED; 558525163bd5SWebb Scales } 558625163bd5SWebb Scales 5587d604f533SWebb Scales /* Do not attempt on controller */ 5588d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5589d604f533SWebb Scales return SUCCESS; 5590d604f533SWebb Scales 55910b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 55920b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 55930b9b7b6eSScott Teel else 55940b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 55950b9b7b6eSScott Teel 55960b9b7b6eSScott Teel sprintf(msg, "resetting %s", 55970b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 55980b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 559925163bd5SWebb Scales 5600da03ded0SDon Brace h->reset_in_progress = 1; 5601d416b0c7SStephen M. Cameron 5602edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 56030b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 560425163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 56050b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 56060b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 56072dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5608d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5609da03ded0SDon Brace h->reset_in_progress = 0; 5610d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5611edd16368SStephen M. Cameron } 5612edd16368SStephen M. Cameron 56136cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 56146cba3f19SStephen M. Cameron { 56156cba3f19SStephen M. Cameron u8 original_tag[8]; 56166cba3f19SStephen M. Cameron 56176cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 56186cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 56196cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 56206cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 56216cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 56226cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 56236cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 56246cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 56256cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 56266cba3f19SStephen M. Cameron } 56276cba3f19SStephen M. Cameron 562817eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 56292b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 563017eb87d2SScott Teel { 56312b08b3e9SDon Brace u64 tag; 563217eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 563317eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 563417eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 56352b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 56362b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 56372b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 563854b6e9e9SScott Teel return; 563954b6e9e9SScott Teel } 564054b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 564154b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 564254b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5643dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5644dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5645dd0e19f3SScott Teel *taglower = cm2->Tag; 564654b6e9e9SScott Teel return; 564754b6e9e9SScott Teel } 56482b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 56492b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 56502b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 565117eb87d2SScott Teel } 565254b6e9e9SScott Teel 565375167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 56549b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 565575167d2cSStephen M. Cameron { 565675167d2cSStephen M. Cameron int rc = IO_OK; 565775167d2cSStephen M. Cameron struct CommandList *c; 565875167d2cSStephen M. Cameron struct ErrorInfo *ei; 56592b08b3e9SDon Brace __le32 tagupper, taglower; 566075167d2cSStephen M. Cameron 566145fcb86eSStephen Cameron c = cmd_alloc(h); 566275167d2cSStephen M. Cameron 5663a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 56649b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5665a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 56669b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 56676cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5668c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 566917eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 567025163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 567117eb87d2SScott Teel __func__, tagupper, taglower); 567275167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 567375167d2cSStephen M. Cameron 567475167d2cSStephen M. Cameron ei = c->err_info; 567575167d2cSStephen M. Cameron switch (ei->CommandStatus) { 567675167d2cSStephen M. Cameron case CMD_SUCCESS: 567775167d2cSStephen M. Cameron break; 56789437ac43SStephen Cameron case CMD_TMF_STATUS: 56799437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 56809437ac43SStephen Cameron break; 568175167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 568275167d2cSStephen M. Cameron rc = -1; 568375167d2cSStephen M. Cameron break; 568475167d2cSStephen M. Cameron default: 568575167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 568617eb87d2SScott Teel __func__, tagupper, taglower); 5687d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 568875167d2cSStephen M. Cameron rc = -1; 568975167d2cSStephen M. Cameron break; 569075167d2cSStephen M. Cameron } 569145fcb86eSStephen Cameron cmd_free(h, c); 5692dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5693dd0e19f3SScott Teel __func__, tagupper, taglower); 569475167d2cSStephen M. Cameron return rc; 569575167d2cSStephen M. Cameron } 569675167d2cSStephen M. Cameron 56978be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 56988be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 56998be986ccSStephen Cameron { 57008be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 57018be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 57028be986ccSStephen Cameron struct io_accel2_cmd *c2a = 57038be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5704a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 57058be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 57068be986ccSStephen Cameron 57078be986ccSStephen Cameron /* 57088be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 57098be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 57108be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 57118be986ccSStephen Cameron */ 57128be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 57138be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 57148be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 57158be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 57168be986ccSStephen Cameron sizeof(ac->error_len)); 57178be986ccSStephen Cameron 57188be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5719a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5720a58e7e53SWebb Scales 57218be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 57228be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 57238be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 57248be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 57258be986ccSStephen Cameron 57268be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 57278be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 57288be986ccSStephen Cameron ac->reply_queue = reply_queue; 57298be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 57308be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 57318be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 57328be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 57338be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 57348be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 57358be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 57368be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 57378be986ccSStephen Cameron } 57388be986ccSStephen Cameron 573954b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 574054b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 574154b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 574254b6e9e9SScott Teel * Return 0 on success (IO_OK) 574354b6e9e9SScott Teel * -1 on failure 574454b6e9e9SScott Teel */ 574554b6e9e9SScott Teel 574654b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 574725163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 574854b6e9e9SScott Teel { 574954b6e9e9SScott Teel int rc = IO_OK; 575054b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 575154b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 575254b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 575354b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 575454b6e9e9SScott Teel 575554b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 57567fa3030cSStephen Cameron scmd = abort->scsi_cmd; 575754b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 575854b6e9e9SScott Teel if (dev == NULL) { 575954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 576054b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 576154b6e9e9SScott Teel return -1; /* not abortable */ 576254b6e9e9SScott Teel } 576354b6e9e9SScott Teel 57642ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 57652ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 57660d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 57672ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 57680d96ef5fSWebb Scales "Reset as abort", 57692ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 57702ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 57712ba8bfc8SStephen M. Cameron 577254b6e9e9SScott Teel if (!dev->offload_enabled) { 577354b6e9e9SScott Teel dev_warn(&h->pdev->dev, 577454b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 577554b6e9e9SScott Teel return -1; /* not abortable */ 577654b6e9e9SScott Teel } 577754b6e9e9SScott Teel 577854b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 577954b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 578054b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 578154b6e9e9SScott Teel return -1; /* not abortable */ 578254b6e9e9SScott Teel } 578354b6e9e9SScott Teel 578454b6e9e9SScott Teel /* send the reset */ 57852ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 57862ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 57872ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 57882ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 57892ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5790d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 579154b6e9e9SScott Teel if (rc != 0) { 579254b6e9e9SScott Teel dev_warn(&h->pdev->dev, 579354b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 579454b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 579554b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 579654b6e9e9SScott Teel return rc; /* failed to reset */ 579754b6e9e9SScott Teel } 579854b6e9e9SScott Teel 579954b6e9e9SScott Teel /* wait for device to recover */ 5800b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 580154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 580254b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 580354b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 580454b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 580554b6e9e9SScott Teel return -1; /* failed to recover */ 580654b6e9e9SScott Teel } 580754b6e9e9SScott Teel 580854b6e9e9SScott Teel /* device recovered */ 580954b6e9e9SScott Teel dev_info(&h->pdev->dev, 581054b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 581154b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 581254b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 581354b6e9e9SScott Teel 581454b6e9e9SScott Teel return rc; /* success */ 581554b6e9e9SScott Teel } 581654b6e9e9SScott Teel 58178be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 58188be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 58198be986ccSStephen Cameron { 58208be986ccSStephen Cameron int rc = IO_OK; 58218be986ccSStephen Cameron struct CommandList *c; 58228be986ccSStephen Cameron __le32 taglower, tagupper; 58238be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 58248be986ccSStephen Cameron struct io_accel2_cmd *c2; 58258be986ccSStephen Cameron 58268be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 58278be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 58288be986ccSStephen Cameron return -1; 58298be986ccSStephen Cameron 58308be986ccSStephen Cameron c = cmd_alloc(h); 58318be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 58328be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5833c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 58348be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 58358be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 58368be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 58378be986ccSStephen Cameron __func__, tagupper, taglower); 58388be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 58398be986ccSStephen Cameron 58408be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 58418be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 58428be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 58438be986ccSStephen Cameron switch (c2->error_data.serv_response) { 58448be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 58458be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 58468be986ccSStephen Cameron rc = 0; 58478be986ccSStephen Cameron break; 58488be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 58498be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 58508be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 58518be986ccSStephen Cameron rc = -1; 58528be986ccSStephen Cameron break; 58538be986ccSStephen Cameron default: 58548be986ccSStephen Cameron dev_warn(&h->pdev->dev, 58558be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 58568be986ccSStephen Cameron __func__, tagupper, taglower, 58578be986ccSStephen Cameron c2->error_data.serv_response); 58588be986ccSStephen Cameron rc = -1; 58598be986ccSStephen Cameron } 58608be986ccSStephen Cameron cmd_free(h, c); 58618be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 58628be986ccSStephen Cameron tagupper, taglower); 58638be986ccSStephen Cameron return rc; 58648be986ccSStephen Cameron } 58658be986ccSStephen Cameron 58666cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 586739f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 58686cba3f19SStephen M. Cameron { 58698be986ccSStephen Cameron /* 58708be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 587154b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 58728be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 58738be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 587454b6e9e9SScott Teel */ 58758be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 587639f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 587739f3deb2SDon Brace dev->physical_device) 58788be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 58798be986ccSStephen Cameron reply_queue); 58808be986ccSStephen Cameron else 588139f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 588239f3deb2SDon Brace dev->scsi3addr, 588325163bd5SWebb Scales abort, reply_queue); 58848be986ccSStephen Cameron } 588539f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 588625163bd5SWebb Scales } 588725163bd5SWebb Scales 588825163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 588925163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 589025163bd5SWebb Scales struct CommandList *c) 589125163bd5SWebb Scales { 589225163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 589325163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 589425163bd5SWebb Scales return c->Header.ReplyQueue; 58956cba3f19SStephen M. Cameron } 58966cba3f19SStephen M. Cameron 58979b5c48c2SStephen Cameron /* 58989b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 58999b5c48c2SStephen Cameron * over-subscription of commands 59009b5c48c2SStephen Cameron */ 59019b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 59029b5c48c2SStephen Cameron { 59039b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 59049b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 59059b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 59069b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 59079b5c48c2SStephen Cameron } 59089b5c48c2SStephen Cameron 590975167d2cSStephen M. Cameron /* Send an abort for the specified command. 591075167d2cSStephen M. Cameron * If the device and controller support it, 591175167d2cSStephen M. Cameron * send a task abort request. 591275167d2cSStephen M. Cameron */ 591375167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 591475167d2cSStephen M. Cameron { 591575167d2cSStephen M. Cameron 5916a58e7e53SWebb Scales int rc; 591775167d2cSStephen M. Cameron struct ctlr_info *h; 591875167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 591975167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 592075167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 592175167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 592275167d2cSStephen M. Cameron int ml = 0; 59232b08b3e9SDon Brace __le32 tagupper, taglower; 592425163bd5SWebb Scales int refcount, reply_queue; 592525163bd5SWebb Scales 592625163bd5SWebb Scales if (sc == NULL) 592725163bd5SWebb Scales return FAILED; 592875167d2cSStephen M. Cameron 59299b5c48c2SStephen Cameron if (sc->device == NULL) 59309b5c48c2SStephen Cameron return FAILED; 59319b5c48c2SStephen Cameron 593275167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 593375167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 59349b5c48c2SStephen Cameron if (h == NULL) 593575167d2cSStephen M. Cameron return FAILED; 593675167d2cSStephen M. Cameron 593725163bd5SWebb Scales /* Find the device of the command to be aborted */ 593825163bd5SWebb Scales dev = sc->device->hostdata; 593925163bd5SWebb Scales if (!dev) { 594025163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 594125163bd5SWebb Scales msg); 5942e345893bSDon Brace return FAILED; 594325163bd5SWebb Scales } 594425163bd5SWebb Scales 594525163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 594625163bd5SWebb Scales if (lockup_detected(h)) { 594725163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 594825163bd5SWebb Scales "ABORT FAILED, lockup detected"); 594925163bd5SWebb Scales return FAILED; 595025163bd5SWebb Scales } 595125163bd5SWebb Scales 595225163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 595325163bd5SWebb Scales if (detect_controller_lockup(h)) { 595425163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 595525163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 595625163bd5SWebb Scales return FAILED; 595725163bd5SWebb Scales } 5958e345893bSDon Brace 595975167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 596075167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 596175167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 596275167d2cSStephen M. Cameron return FAILED; 596375167d2cSStephen M. Cameron 596475167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 59654b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 596675167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 59670d96ef5fSWebb Scales sc->device->id, sc->device->lun, 59684b761557SRobert Elliott "Aborting command", sc); 596975167d2cSStephen M. Cameron 597075167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 597175167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 597275167d2cSStephen M. Cameron if (abort == NULL) { 5973281a7fd0SWebb Scales /* This can happen if the command already completed. */ 5974281a7fd0SWebb Scales return SUCCESS; 5975281a7fd0SWebb Scales } 5976281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 5977281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 5978281a7fd0SWebb Scales cmd_free(h, abort); 5979281a7fd0SWebb Scales return SUCCESS; 598075167d2cSStephen M. Cameron } 59819b5c48c2SStephen Cameron 59829b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 59839b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 59849b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 59859b5c48c2SStephen Cameron cmd_free(h, abort); 59869b5c48c2SStephen Cameron return FAILED; 59879b5c48c2SStephen Cameron } 59889b5c48c2SStephen Cameron 5989a58e7e53SWebb Scales /* 5990a58e7e53SWebb Scales * Check that we're aborting the right command. 5991a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 5992a58e7e53SWebb Scales */ 5993a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 5994a58e7e53SWebb Scales cmd_free(h, abort); 5995a58e7e53SWebb Scales return SUCCESS; 5996a58e7e53SWebb Scales } 5997a58e7e53SWebb Scales 5998a58e7e53SWebb Scales abort->abort_pending = true; 599917eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 600025163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 600117eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 60027fa3030cSStephen Cameron as = abort->scsi_cmd; 600375167d2cSStephen M. Cameron if (as != NULL) 60044b761557SRobert Elliott ml += sprintf(msg+ml, 60054b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 60064b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 60074b761557SRobert Elliott as->serial_number); 60084b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 60090d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 60104b761557SRobert Elliott 601175167d2cSStephen M. Cameron /* 601275167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 601375167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 601475167d2cSStephen M. Cameron * distinguish which. Send the abort down. 601575167d2cSStephen M. Cameron */ 60169b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 60179b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 60184b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 60194b761557SRobert Elliott msg); 60209b5c48c2SStephen Cameron cmd_free(h, abort); 60219b5c48c2SStephen Cameron return FAILED; 60229b5c48c2SStephen Cameron } 602339f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 60249b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 60259b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 602675167d2cSStephen M. Cameron if (rc != 0) { 60274b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 60280d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 60290d96ef5fSWebb Scales "FAILED to abort command"); 6030281a7fd0SWebb Scales cmd_free(h, abort); 603175167d2cSStephen M. Cameron return FAILED; 603275167d2cSStephen M. Cameron } 60334b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6034d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6035a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6036281a7fd0SWebb Scales cmd_free(h, abort); 6037a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 603875167d2cSStephen M. Cameron } 603975167d2cSStephen M. Cameron 6040edd16368SStephen M. Cameron /* 604173153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 604273153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 604373153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 604473153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 604573153fe5SWebb Scales */ 604673153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 604773153fe5SWebb Scales struct scsi_cmnd *scmd) 604873153fe5SWebb Scales { 604973153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 605073153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 605173153fe5SWebb Scales 605273153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 605373153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 605473153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 605573153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 605673153fe5SWebb Scales * bounds, it's probably not our bug. 605773153fe5SWebb Scales */ 605873153fe5SWebb Scales BUG(); 605973153fe5SWebb Scales } 606073153fe5SWebb Scales 606173153fe5SWebb Scales atomic_inc(&c->refcount); 606273153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 606373153fe5SWebb Scales /* 606473153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 606573153fe5SWebb Scales * value. Thus, there should never be a collision here between 606673153fe5SWebb Scales * two requests...because if the selected command isn't idle 606773153fe5SWebb Scales * then someone is going to be very disappointed. 606873153fe5SWebb Scales */ 606973153fe5SWebb Scales dev_err(&h->pdev->dev, 607073153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 607173153fe5SWebb Scales idx); 607273153fe5SWebb Scales if (c->scsi_cmd != NULL) 607373153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 607473153fe5SWebb Scales scsi_print_command(scmd); 607573153fe5SWebb Scales } 607673153fe5SWebb Scales 607773153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 607873153fe5SWebb Scales return c; 607973153fe5SWebb Scales } 608073153fe5SWebb Scales 608173153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 608273153fe5SWebb Scales { 608373153fe5SWebb Scales /* 608473153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 608573153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 608673153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 608773153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 608873153fe5SWebb Scales */ 608973153fe5SWebb Scales (void)atomic_dec(&c->refcount); 609073153fe5SWebb Scales } 609173153fe5SWebb Scales 609273153fe5SWebb Scales /* 6093edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6094edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6095edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6096edd16368SStephen M. Cameron * cmd_free() is the complement. 6097bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6098bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6099edd16368SStephen M. Cameron */ 6100281a7fd0SWebb Scales 6101edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6102edd16368SStephen M. Cameron { 6103edd16368SStephen M. Cameron struct CommandList *c; 6104360c73bdSStephen Cameron int refcount, i; 610573153fe5SWebb Scales int offset = 0; 6106edd16368SStephen M. Cameron 610733811026SRobert Elliott /* 610833811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 61094c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 61104c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 61114c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 61124c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 61134c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 61144c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 61154c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 61164c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 611773153fe5SWebb Scales * 611873153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 611973153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 612073153fe5SWebb Scales * all works, since we have at least one command structure available; 612173153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 612273153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 612373153fe5SWebb Scales * layer will use the higher indexes. 61244c413128SStephen M. Cameron */ 61254c413128SStephen M. Cameron 6126281a7fd0SWebb Scales for (;;) { 612773153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 612873153fe5SWebb Scales HPSA_NRESERVED_CMDS, 612973153fe5SWebb Scales offset); 613073153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6131281a7fd0SWebb Scales offset = 0; 6132281a7fd0SWebb Scales continue; 6133281a7fd0SWebb Scales } 6134edd16368SStephen M. Cameron c = h->cmd_pool + i; 6135281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6136281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6137281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 613873153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6139281a7fd0SWebb Scales continue; 6140281a7fd0SWebb Scales } 6141281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6142281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6143281a7fd0SWebb Scales break; /* it's ours now. */ 6144281a7fd0SWebb Scales } 6145360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6146edd16368SStephen M. Cameron return c; 6147edd16368SStephen M. Cameron } 6148edd16368SStephen M. Cameron 614973153fe5SWebb Scales /* 615073153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 615173153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 615273153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 615373153fe5SWebb Scales * the clear-bit is harmless. 615473153fe5SWebb Scales */ 6155edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6156edd16368SStephen M. Cameron { 6157281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6158edd16368SStephen M. Cameron int i; 6159edd16368SStephen M. Cameron 6160edd16368SStephen M. Cameron i = c - h->cmd_pool; 6161edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6162edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6163edd16368SStephen M. Cameron } 6164281a7fd0SWebb Scales } 6165edd16368SStephen M. Cameron 6166edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6167edd16368SStephen M. Cameron 616842a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 616942a91641SDon Brace void __user *arg) 6170edd16368SStephen M. Cameron { 6171edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6172edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6173edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6174edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6175edd16368SStephen M. Cameron int err; 6176edd16368SStephen M. Cameron u32 cp; 6177edd16368SStephen M. Cameron 6178938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6179edd16368SStephen M. Cameron err = 0; 6180edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6181edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6182edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6183edd16368SStephen M. Cameron sizeof(arg64.Request)); 6184edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6185edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6186edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6187edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6188edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6189edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6190edd16368SStephen M. Cameron 6191edd16368SStephen M. Cameron if (err) 6192edd16368SStephen M. Cameron return -EFAULT; 6193edd16368SStephen M. Cameron 619442a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6195edd16368SStephen M. Cameron if (err) 6196edd16368SStephen M. Cameron return err; 6197edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6198edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6199edd16368SStephen M. Cameron if (err) 6200edd16368SStephen M. Cameron return -EFAULT; 6201edd16368SStephen M. Cameron return err; 6202edd16368SStephen M. Cameron } 6203edd16368SStephen M. Cameron 6204edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 620542a91641SDon Brace int cmd, void __user *arg) 6206edd16368SStephen M. Cameron { 6207edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6208edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6209edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6210edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6211edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6212edd16368SStephen M. Cameron int err; 6213edd16368SStephen M. Cameron u32 cp; 6214edd16368SStephen M. Cameron 6215938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6216edd16368SStephen M. Cameron err = 0; 6217edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6218edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6219edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6220edd16368SStephen M. Cameron sizeof(arg64.Request)); 6221edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6222edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6223edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6224edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6225edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6226edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6227edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6228edd16368SStephen M. Cameron 6229edd16368SStephen M. Cameron if (err) 6230edd16368SStephen M. Cameron return -EFAULT; 6231edd16368SStephen M. Cameron 623242a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6233edd16368SStephen M. Cameron if (err) 6234edd16368SStephen M. Cameron return err; 6235edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6236edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6237edd16368SStephen M. Cameron if (err) 6238edd16368SStephen M. Cameron return -EFAULT; 6239edd16368SStephen M. Cameron return err; 6240edd16368SStephen M. Cameron } 624171fe75a7SStephen M. Cameron 624242a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 624371fe75a7SStephen M. Cameron { 624471fe75a7SStephen M. Cameron switch (cmd) { 624571fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 624671fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 624771fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 624871fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 624971fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 625071fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 625171fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 625271fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 625371fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 625471fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 625571fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 625671fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 625771fe75a7SStephen M. Cameron case CCISS_REGNEWD: 625871fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 625971fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 626071fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 626171fe75a7SStephen M. Cameron 626271fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 626371fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 626471fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 626571fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 626671fe75a7SStephen M. Cameron 626771fe75a7SStephen M. Cameron default: 626871fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 626971fe75a7SStephen M. Cameron } 627071fe75a7SStephen M. Cameron } 6271edd16368SStephen M. Cameron #endif 6272edd16368SStephen M. Cameron 6273edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6274edd16368SStephen M. Cameron { 6275edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6276edd16368SStephen M. Cameron 6277edd16368SStephen M. Cameron if (!argp) 6278edd16368SStephen M. Cameron return -EINVAL; 6279edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6280edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6281edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6282edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6283edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6284edd16368SStephen M. Cameron return -EFAULT; 6285edd16368SStephen M. Cameron return 0; 6286edd16368SStephen M. Cameron } 6287edd16368SStephen M. Cameron 6288edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6289edd16368SStephen M. Cameron { 6290edd16368SStephen M. Cameron DriverVer_type DriverVer; 6291edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6292edd16368SStephen M. Cameron int rc; 6293edd16368SStephen M. Cameron 6294edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6295edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6296edd16368SStephen M. Cameron if (rc != 3) { 6297edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6298edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6299edd16368SStephen M. Cameron vmaj = 0; 6300edd16368SStephen M. Cameron vmin = 0; 6301edd16368SStephen M. Cameron vsubmin = 0; 6302edd16368SStephen M. Cameron } 6303edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6304edd16368SStephen M. Cameron if (!argp) 6305edd16368SStephen M. Cameron return -EINVAL; 6306edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6307edd16368SStephen M. Cameron return -EFAULT; 6308edd16368SStephen M. Cameron return 0; 6309edd16368SStephen M. Cameron } 6310edd16368SStephen M. Cameron 6311edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6312edd16368SStephen M. Cameron { 6313edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6314edd16368SStephen M. Cameron struct CommandList *c; 6315edd16368SStephen M. Cameron char *buff = NULL; 631650a0decfSStephen M. Cameron u64 temp64; 6317c1f63c8fSStephen M. Cameron int rc = 0; 6318edd16368SStephen M. Cameron 6319edd16368SStephen M. Cameron if (!argp) 6320edd16368SStephen M. Cameron return -EINVAL; 6321edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6322edd16368SStephen M. Cameron return -EPERM; 6323edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6324edd16368SStephen M. Cameron return -EFAULT; 6325edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6326edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6327edd16368SStephen M. Cameron return -EINVAL; 6328edd16368SStephen M. Cameron } 6329edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6330edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6331edd16368SStephen M. Cameron if (buff == NULL) 63322dd02d74SRobert Elliott return -ENOMEM; 63339233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6334edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6335b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6336b03a7771SStephen M. Cameron iocommand.buf_size)) { 6337c1f63c8fSStephen M. Cameron rc = -EFAULT; 6338c1f63c8fSStephen M. Cameron goto out_kfree; 6339edd16368SStephen M. Cameron } 6340b03a7771SStephen M. Cameron } else { 6341edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6342b03a7771SStephen M. Cameron } 6343b03a7771SStephen M. Cameron } 634445fcb86eSStephen Cameron c = cmd_alloc(h); 6345bf43caf3SRobert Elliott 6346edd16368SStephen M. Cameron /* Fill in the command type */ 6347edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6348a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6349edd16368SStephen M. Cameron /* Fill in Command Header */ 6350edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6351edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6352edd16368SStephen M. Cameron c->Header.SGList = 1; 635350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6354edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6355edd16368SStephen M. Cameron c->Header.SGList = 0; 635650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6357edd16368SStephen M. Cameron } 6358edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6359edd16368SStephen M. Cameron 6360edd16368SStephen M. Cameron /* Fill in Request block */ 6361edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6362edd16368SStephen M. Cameron sizeof(c->Request)); 6363edd16368SStephen M. Cameron 6364edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6365edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 636650a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6367edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 636850a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 636950a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 637050a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6371bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6372bcc48ffaSStephen M. Cameron goto out; 6373bcc48ffaSStephen M. Cameron } 637450a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 637550a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 637650a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6377edd16368SStephen M. Cameron } 6378c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6379c448ecfaSDon Brace DEFAULT_TIMEOUT); 6380c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6381edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6382edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 638325163bd5SWebb Scales if (rc) { 638425163bd5SWebb Scales rc = -EIO; 638525163bd5SWebb Scales goto out; 638625163bd5SWebb Scales } 6387edd16368SStephen M. Cameron 6388edd16368SStephen M. Cameron /* Copy the error information out */ 6389edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6390edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6391edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6392c1f63c8fSStephen M. Cameron rc = -EFAULT; 6393c1f63c8fSStephen M. Cameron goto out; 6394edd16368SStephen M. Cameron } 63959233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6396b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6397edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6398edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6399c1f63c8fSStephen M. Cameron rc = -EFAULT; 6400c1f63c8fSStephen M. Cameron goto out; 6401edd16368SStephen M. Cameron } 6402edd16368SStephen M. Cameron } 6403c1f63c8fSStephen M. Cameron out: 640445fcb86eSStephen Cameron cmd_free(h, c); 6405c1f63c8fSStephen M. Cameron out_kfree: 6406c1f63c8fSStephen M. Cameron kfree(buff); 6407c1f63c8fSStephen M. Cameron return rc; 6408edd16368SStephen M. Cameron } 6409edd16368SStephen M. Cameron 6410edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6411edd16368SStephen M. Cameron { 6412edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6413edd16368SStephen M. Cameron struct CommandList *c; 6414edd16368SStephen M. Cameron unsigned char **buff = NULL; 6415edd16368SStephen M. Cameron int *buff_size = NULL; 641650a0decfSStephen M. Cameron u64 temp64; 6417edd16368SStephen M. Cameron BYTE sg_used = 0; 6418edd16368SStephen M. Cameron int status = 0; 641901a02ffcSStephen M. Cameron u32 left; 642001a02ffcSStephen M. Cameron u32 sz; 6421edd16368SStephen M. Cameron BYTE __user *data_ptr; 6422edd16368SStephen M. Cameron 6423edd16368SStephen M. Cameron if (!argp) 6424edd16368SStephen M. Cameron return -EINVAL; 6425edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6426edd16368SStephen M. Cameron return -EPERM; 6427edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6428edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6429edd16368SStephen M. Cameron if (!ioc) { 6430edd16368SStephen M. Cameron status = -ENOMEM; 6431edd16368SStephen M. Cameron goto cleanup1; 6432edd16368SStephen M. Cameron } 6433edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6434edd16368SStephen M. Cameron status = -EFAULT; 6435edd16368SStephen M. Cameron goto cleanup1; 6436edd16368SStephen M. Cameron } 6437edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6438edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6439edd16368SStephen M. Cameron status = -EINVAL; 6440edd16368SStephen M. Cameron goto cleanup1; 6441edd16368SStephen M. Cameron } 6442edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6443edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6444edd16368SStephen M. Cameron status = -EINVAL; 6445edd16368SStephen M. Cameron goto cleanup1; 6446edd16368SStephen M. Cameron } 6447d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6448edd16368SStephen M. Cameron status = -EINVAL; 6449edd16368SStephen M. Cameron goto cleanup1; 6450edd16368SStephen M. Cameron } 6451d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6452edd16368SStephen M. Cameron if (!buff) { 6453edd16368SStephen M. Cameron status = -ENOMEM; 6454edd16368SStephen M. Cameron goto cleanup1; 6455edd16368SStephen M. Cameron } 6456d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6457edd16368SStephen M. Cameron if (!buff_size) { 6458edd16368SStephen M. Cameron status = -ENOMEM; 6459edd16368SStephen M. Cameron goto cleanup1; 6460edd16368SStephen M. Cameron } 6461edd16368SStephen M. Cameron left = ioc->buf_size; 6462edd16368SStephen M. Cameron data_ptr = ioc->buf; 6463edd16368SStephen M. Cameron while (left) { 6464edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6465edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6466edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6467edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6468edd16368SStephen M. Cameron status = -ENOMEM; 6469edd16368SStephen M. Cameron goto cleanup1; 6470edd16368SStephen M. Cameron } 64719233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6472edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 64730758f4f7SStephen M. Cameron status = -EFAULT; 6474edd16368SStephen M. Cameron goto cleanup1; 6475edd16368SStephen M. Cameron } 6476edd16368SStephen M. Cameron } else 6477edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6478edd16368SStephen M. Cameron left -= sz; 6479edd16368SStephen M. Cameron data_ptr += sz; 6480edd16368SStephen M. Cameron sg_used++; 6481edd16368SStephen M. Cameron } 648245fcb86eSStephen Cameron c = cmd_alloc(h); 6483bf43caf3SRobert Elliott 6484edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6485a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6486edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 648750a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 648850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6489edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6490edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6491edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6492edd16368SStephen M. Cameron int i; 6493edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 649450a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6495edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 649650a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 649750a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 649850a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 649950a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6500bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6501bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6502bcc48ffaSStephen M. Cameron status = -ENOMEM; 6503e2d4a1f6SStephen M. Cameron goto cleanup0; 6504bcc48ffaSStephen M. Cameron } 650550a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 650650a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 650750a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6508edd16368SStephen M. Cameron } 650950a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6510edd16368SStephen M. Cameron } 6511c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6512c448ecfaSDon Brace DEFAULT_TIMEOUT); 6513b03a7771SStephen M. Cameron if (sg_used) 6514edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6515edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 651625163bd5SWebb Scales if (status) { 651725163bd5SWebb Scales status = -EIO; 651825163bd5SWebb Scales goto cleanup0; 651925163bd5SWebb Scales } 652025163bd5SWebb Scales 6521edd16368SStephen M. Cameron /* Copy the error information out */ 6522edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6523edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6524edd16368SStephen M. Cameron status = -EFAULT; 6525e2d4a1f6SStephen M. Cameron goto cleanup0; 6526edd16368SStephen M. Cameron } 65279233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 65282b08b3e9SDon Brace int i; 65292b08b3e9SDon Brace 6530edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6531edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6532edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6533edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6534edd16368SStephen M. Cameron status = -EFAULT; 6535e2d4a1f6SStephen M. Cameron goto cleanup0; 6536edd16368SStephen M. Cameron } 6537edd16368SStephen M. Cameron ptr += buff_size[i]; 6538edd16368SStephen M. Cameron } 6539edd16368SStephen M. Cameron } 6540edd16368SStephen M. Cameron status = 0; 6541e2d4a1f6SStephen M. Cameron cleanup0: 654245fcb86eSStephen Cameron cmd_free(h, c); 6543edd16368SStephen M. Cameron cleanup1: 6544edd16368SStephen M. Cameron if (buff) { 65452b08b3e9SDon Brace int i; 65462b08b3e9SDon Brace 6547edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6548edd16368SStephen M. Cameron kfree(buff[i]); 6549edd16368SStephen M. Cameron kfree(buff); 6550edd16368SStephen M. Cameron } 6551edd16368SStephen M. Cameron kfree(buff_size); 6552edd16368SStephen M. Cameron kfree(ioc); 6553edd16368SStephen M. Cameron return status; 6554edd16368SStephen M. Cameron } 6555edd16368SStephen M. Cameron 6556edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6557edd16368SStephen M. Cameron struct CommandList *c) 6558edd16368SStephen M. Cameron { 6559edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6560edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6561edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6562edd16368SStephen M. Cameron } 65630390f0c0SStephen M. Cameron 6564edd16368SStephen M. Cameron /* 6565edd16368SStephen M. Cameron * ioctl 6566edd16368SStephen M. Cameron */ 656742a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6568edd16368SStephen M. Cameron { 6569edd16368SStephen M. Cameron struct ctlr_info *h; 6570edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 65710390f0c0SStephen M. Cameron int rc; 6572edd16368SStephen M. Cameron 6573edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6574edd16368SStephen M. Cameron 6575edd16368SStephen M. Cameron switch (cmd) { 6576edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6577edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6578edd16368SStephen M. Cameron case CCISS_REGNEWD: 6579a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6580edd16368SStephen M. Cameron return 0; 6581edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6582edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6583edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6584edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6585edd16368SStephen M. Cameron case CCISS_PASSTHRU: 658634f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 65870390f0c0SStephen M. Cameron return -EAGAIN; 65880390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 658934f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 65900390f0c0SStephen M. Cameron return rc; 6591edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 659234f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 65930390f0c0SStephen M. Cameron return -EAGAIN; 65940390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 659534f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 65960390f0c0SStephen M. Cameron return rc; 6597edd16368SStephen M. Cameron default: 6598edd16368SStephen M. Cameron return -ENOTTY; 6599edd16368SStephen M. Cameron } 6600edd16368SStephen M. Cameron } 6601edd16368SStephen M. Cameron 6602bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 66036f039790SGreg Kroah-Hartman u8 reset_type) 660464670ac8SStephen M. Cameron { 660564670ac8SStephen M. Cameron struct CommandList *c; 660664670ac8SStephen M. Cameron 660764670ac8SStephen M. Cameron c = cmd_alloc(h); 6608bf43caf3SRobert Elliott 6609a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6610a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 661164670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 661264670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 661364670ac8SStephen M. Cameron c->waiting = NULL; 661464670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 661564670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 661664670ac8SStephen M. Cameron * the command either. This is the last command we will send before 661764670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 661864670ac8SStephen M. Cameron */ 6619bf43caf3SRobert Elliott return; 662064670ac8SStephen M. Cameron } 662164670ac8SStephen M. Cameron 6622a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6623b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6624edd16368SStephen M. Cameron int cmd_type) 6625edd16368SStephen M. Cameron { 6626edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 66279b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6628edd16368SStephen M. Cameron 6629edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6630a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6631edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6632edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6633edd16368SStephen M. Cameron c->Header.SGList = 1; 663450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6635edd16368SStephen M. Cameron } else { 6636edd16368SStephen M. Cameron c->Header.SGList = 0; 663750a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6638edd16368SStephen M. Cameron } 6639edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6640edd16368SStephen M. Cameron 6641edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6642edd16368SStephen M. Cameron switch (cmd) { 6643edd16368SStephen M. Cameron case HPSA_INQUIRY: 6644edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6645b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6646edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6647b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6648edd16368SStephen M. Cameron } 6649edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6650a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6651a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6652edd16368SStephen M. Cameron c->Request.Timeout = 0; 6653edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6654edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6655edd16368SStephen M. Cameron break; 6656edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6657edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6658edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6659edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6660edd16368SStephen M. Cameron */ 6661edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6662a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6663a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6664edd16368SStephen M. Cameron c->Request.Timeout = 0; 6665edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6666edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6667edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6668edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6669edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6670edd16368SStephen M. Cameron break; 6671c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6672c2adae44SScott Teel c->Request.CDBLen = 16; 6673c2adae44SScott Teel c->Request.type_attr_dir = 6674c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6675c2adae44SScott Teel c->Request.Timeout = 0; 6676c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6677c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6678c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6679c2adae44SScott Teel break; 6680c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6681c2adae44SScott Teel c->Request.CDBLen = 16; 6682c2adae44SScott Teel c->Request.type_attr_dir = 6683c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6684c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6685c2adae44SScott Teel c->Request.Timeout = 0; 6686c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6687c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6688c2adae44SScott Teel break; 6689edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6690edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6691a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6692a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6693a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6694edd16368SStephen M. Cameron c->Request.Timeout = 0; 6695edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6696edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6697bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6698bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6699edd16368SStephen M. Cameron break; 6700edd16368SStephen M. Cameron case TEST_UNIT_READY: 6701edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6702a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6703a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6704edd16368SStephen M. Cameron c->Request.Timeout = 0; 6705edd16368SStephen M. Cameron break; 6706283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6707283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6708a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6709a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6710283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6711283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6712283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6713283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6714283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6715283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6716283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6717283b4a9bSStephen M. Cameron break; 6718316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6719316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6720a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6721a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6722316b221aSStephen M. Cameron c->Request.Timeout = 0; 6723316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6724316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6725316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6726316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6727316b221aSStephen M. Cameron break; 672803383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 672903383736SDon Brace c->Request.CDBLen = 10; 673003383736SDon Brace c->Request.type_attr_dir = 673103383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 673203383736SDon Brace c->Request.Timeout = 0; 673303383736SDon Brace c->Request.CDB[0] = BMIC_READ; 673403383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 673503383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 673603383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 673703383736SDon Brace break; 6738d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6739d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6740d04e62b9SKevin Barnett c->Request.type_attr_dir = 6741d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6742d04e62b9SKevin Barnett c->Request.Timeout = 0; 6743d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6744d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6745d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6746d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6747d04e62b9SKevin Barnett break; 6748cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6749cca8f13bSDon Brace c->Request.CDBLen = 10; 6750cca8f13bSDon Brace c->Request.type_attr_dir = 6751cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6752cca8f13bSDon Brace c->Request.Timeout = 0; 6753cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6754cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6755cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6756cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6757cca8f13bSDon Brace break; 675866749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 675966749d0dSScott Teel c->Request.CDBLen = 10; 676066749d0dSScott Teel c->Request.type_attr_dir = 676166749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 676266749d0dSScott Teel c->Request.Timeout = 0; 676366749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 676466749d0dSScott Teel c->Request.CDB[1] = 0; 676566749d0dSScott Teel c->Request.CDB[2] = 0; 676666749d0dSScott Teel c->Request.CDB[3] = 0; 676766749d0dSScott Teel c->Request.CDB[4] = 0; 676866749d0dSScott Teel c->Request.CDB[5] = 0; 676966749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 677066749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 677166749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 677266749d0dSScott Teel c->Request.CDB[9] = 0; 677366749d0dSScott Teel break; 6774edd16368SStephen M. Cameron default: 6775edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6776edd16368SStephen M. Cameron BUG(); 6777a2dac136SStephen M. Cameron return -1; 6778edd16368SStephen M. Cameron } 6779edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6780edd16368SStephen M. Cameron switch (cmd) { 6781edd16368SStephen M. Cameron 67820b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 67830b9b7b6eSScott Teel c->Request.CDBLen = 16; 67840b9b7b6eSScott Teel c->Request.type_attr_dir = 67850b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 67860b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 67870b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 67880b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 67890b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 67900b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 67910b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 67920b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 67930b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 67940b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 67950b9b7b6eSScott Teel break; 6796edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6797edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6798a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6799a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6800edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 680164670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 680264670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 680321e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6804edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6805edd16368SStephen M. Cameron /* LunID device */ 6806edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6807edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6808edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6809edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6810edd16368SStephen M. Cameron break; 681175167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 68129b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 68132b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 68149b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 68159b5c48c2SStephen Cameron tag, c->Header.tag); 681675167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6817a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6818a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6819a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 682075167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 682175167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 682275167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 682375167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 682475167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 682575167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 68269b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 682775167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 682875167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 682975167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 683075167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 683175167d2cSStephen M. Cameron break; 6832edd16368SStephen M. Cameron default: 6833edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6834edd16368SStephen M. Cameron cmd); 6835edd16368SStephen M. Cameron BUG(); 6836edd16368SStephen M. Cameron } 6837edd16368SStephen M. Cameron } else { 6838edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6839edd16368SStephen M. Cameron BUG(); 6840edd16368SStephen M. Cameron } 6841edd16368SStephen M. Cameron 6842a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6843edd16368SStephen M. Cameron case XFER_READ: 6844edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6845edd16368SStephen M. Cameron break; 6846edd16368SStephen M. Cameron case XFER_WRITE: 6847edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6848edd16368SStephen M. Cameron break; 6849edd16368SStephen M. Cameron case XFER_NONE: 6850edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6851edd16368SStephen M. Cameron break; 6852edd16368SStephen M. Cameron default: 6853edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6854edd16368SStephen M. Cameron } 6855a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6856a2dac136SStephen M. Cameron return -1; 6857a2dac136SStephen M. Cameron return 0; 6858edd16368SStephen M. Cameron } 6859edd16368SStephen M. Cameron 6860edd16368SStephen M. Cameron /* 6861edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6862edd16368SStephen M. Cameron */ 6863edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6864edd16368SStephen M. Cameron { 6865edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6866edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6867088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6868088ba34cSStephen M. Cameron page_offs + size); 6869edd16368SStephen M. Cameron 6870edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6871edd16368SStephen M. Cameron } 6872edd16368SStephen M. Cameron 6873254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6874edd16368SStephen M. Cameron { 6875254f796bSMatt Gates return h->access.command_completed(h, q); 6876edd16368SStephen M. Cameron } 6877edd16368SStephen M. Cameron 6878900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6879edd16368SStephen M. Cameron { 6880edd16368SStephen M. Cameron return h->access.intr_pending(h); 6881edd16368SStephen M. Cameron } 6882edd16368SStephen M. Cameron 6883edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6884edd16368SStephen M. Cameron { 688510f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 688610f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6887edd16368SStephen M. Cameron } 6888edd16368SStephen M. Cameron 688901a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 689001a02ffcSStephen M. Cameron u32 raw_tag) 6891edd16368SStephen M. Cameron { 6892edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6893edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6894edd16368SStephen M. Cameron return 1; 6895edd16368SStephen M. Cameron } 6896edd16368SStephen M. Cameron return 0; 6897edd16368SStephen M. Cameron } 6898edd16368SStephen M. Cameron 68995a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6900edd16368SStephen M. Cameron { 6901e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6902c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6903c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 69041fb011fbSStephen M. Cameron complete_scsi_command(c); 69058be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6906edd16368SStephen M. Cameron complete(c->waiting); 6907a104c99fSStephen M. Cameron } 6908a104c99fSStephen M. Cameron 6909303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 69101d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6911303932fdSDon Brace u32 raw_tag) 6912303932fdSDon Brace { 6913303932fdSDon Brace u32 tag_index; 6914303932fdSDon Brace struct CommandList *c; 6915303932fdSDon Brace 6916f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 69171d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6918303932fdSDon Brace c = h->cmd_pool + tag_index; 69195a3d16f5SStephen M. Cameron finish_cmd(c); 69201d94f94dSStephen M. Cameron } 6921303932fdSDon Brace } 6922303932fdSDon Brace 692364670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 692464670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 692564670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 692664670ac8SStephen M. Cameron * functions. 692764670ac8SStephen M. Cameron */ 692864670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 692964670ac8SStephen M. Cameron { 693064670ac8SStephen M. Cameron if (likely(!reset_devices)) 693164670ac8SStephen M. Cameron return 0; 693264670ac8SStephen M. Cameron 693364670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 693464670ac8SStephen M. Cameron return 0; 693564670ac8SStephen M. Cameron 693664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 693764670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 693864670ac8SStephen M. Cameron 693964670ac8SStephen M. Cameron return 1; 694064670ac8SStephen M. Cameron } 694164670ac8SStephen M. Cameron 6942254f796bSMatt Gates /* 6943254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6944254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6945254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6946254f796bSMatt Gates */ 6947254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 694864670ac8SStephen M. Cameron { 6949254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6950254f796bSMatt Gates } 6951254f796bSMatt Gates 6952254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6953254f796bSMatt Gates { 6954254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6955254f796bSMatt Gates u8 q = *(u8 *) queue; 695664670ac8SStephen M. Cameron u32 raw_tag; 695764670ac8SStephen M. Cameron 695864670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 695964670ac8SStephen M. Cameron return IRQ_NONE; 696064670ac8SStephen M. Cameron 696164670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 696264670ac8SStephen M. Cameron return IRQ_NONE; 6963a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 696464670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6965254f796bSMatt Gates raw_tag = get_next_completion(h, q); 696664670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6967254f796bSMatt Gates raw_tag = next_command(h, q); 696864670ac8SStephen M. Cameron } 696964670ac8SStephen M. Cameron return IRQ_HANDLED; 697064670ac8SStephen M. Cameron } 697164670ac8SStephen M. Cameron 6972254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 697364670ac8SStephen M. Cameron { 6974254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 697564670ac8SStephen M. Cameron u32 raw_tag; 6976254f796bSMatt Gates u8 q = *(u8 *) queue; 697764670ac8SStephen M. Cameron 697864670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 697964670ac8SStephen M. Cameron return IRQ_NONE; 698064670ac8SStephen M. Cameron 6981a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6982254f796bSMatt Gates raw_tag = get_next_completion(h, q); 698364670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6984254f796bSMatt Gates raw_tag = next_command(h, q); 698564670ac8SStephen M. Cameron return IRQ_HANDLED; 698664670ac8SStephen M. Cameron } 698764670ac8SStephen M. Cameron 6988254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6989edd16368SStephen M. Cameron { 6990254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6991303932fdSDon Brace u32 raw_tag; 6992254f796bSMatt Gates u8 q = *(u8 *) queue; 6993edd16368SStephen M. Cameron 6994edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6995edd16368SStephen M. Cameron return IRQ_NONE; 6996a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 699710f66018SStephen M. Cameron while (interrupt_pending(h)) { 6998254f796bSMatt Gates raw_tag = get_next_completion(h, q); 699910f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 70001d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7001254f796bSMatt Gates raw_tag = next_command(h, q); 700210f66018SStephen M. Cameron } 700310f66018SStephen M. Cameron } 700410f66018SStephen M. Cameron return IRQ_HANDLED; 700510f66018SStephen M. Cameron } 700610f66018SStephen M. Cameron 7007254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 700810f66018SStephen M. Cameron { 7009254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 701010f66018SStephen M. Cameron u32 raw_tag; 7011254f796bSMatt Gates u8 q = *(u8 *) queue; 701210f66018SStephen M. Cameron 7013a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7014254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7015303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 70161d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7017254f796bSMatt Gates raw_tag = next_command(h, q); 7018edd16368SStephen M. Cameron } 7019edd16368SStephen M. Cameron return IRQ_HANDLED; 7020edd16368SStephen M. Cameron } 7021edd16368SStephen M. Cameron 7022a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7023a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7024a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7025a9a3a273SStephen M. Cameron */ 70266f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7027edd16368SStephen M. Cameron unsigned char type) 7028edd16368SStephen M. Cameron { 7029edd16368SStephen M. Cameron struct Command { 7030edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7031edd16368SStephen M. Cameron struct RequestBlock Request; 7032edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7033edd16368SStephen M. Cameron }; 7034edd16368SStephen M. Cameron struct Command *cmd; 7035edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7036edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7037edd16368SStephen M. Cameron dma_addr_t paddr64; 70382b08b3e9SDon Brace __le32 paddr32; 70392b08b3e9SDon Brace u32 tag; 7040edd16368SStephen M. Cameron void __iomem *vaddr; 7041edd16368SStephen M. Cameron int i, err; 7042edd16368SStephen M. Cameron 7043edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7044edd16368SStephen M. Cameron if (vaddr == NULL) 7045edd16368SStephen M. Cameron return -ENOMEM; 7046edd16368SStephen M. Cameron 7047edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7048edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7049edd16368SStephen M. Cameron * memory. 7050edd16368SStephen M. Cameron */ 7051edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7052edd16368SStephen M. Cameron if (err) { 7053edd16368SStephen M. Cameron iounmap(vaddr); 70541eaec8f3SRobert Elliott return err; 7055edd16368SStephen M. Cameron } 7056edd16368SStephen M. Cameron 7057edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7058edd16368SStephen M. Cameron if (cmd == NULL) { 7059edd16368SStephen M. Cameron iounmap(vaddr); 7060edd16368SStephen M. Cameron return -ENOMEM; 7061edd16368SStephen M. Cameron } 7062edd16368SStephen M. Cameron 7063edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7064edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7065edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7066edd16368SStephen M. Cameron */ 70672b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7068edd16368SStephen M. Cameron 7069edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7070edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 707150a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 70722b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7073edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7074edd16368SStephen M. Cameron 7075edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7076a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7077a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7078edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7079edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7080edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7081edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 708250a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 70832b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 708450a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7085edd16368SStephen M. Cameron 70862b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7087edd16368SStephen M. Cameron 7088edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7089edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 70902b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7091edd16368SStephen M. Cameron break; 7092edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7093edd16368SStephen M. Cameron } 7094edd16368SStephen M. Cameron 7095edd16368SStephen M. Cameron iounmap(vaddr); 7096edd16368SStephen M. Cameron 7097edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7098edd16368SStephen M. Cameron * still complete the command. 7099edd16368SStephen M. Cameron */ 7100edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7101edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7102edd16368SStephen M. Cameron opcode, type); 7103edd16368SStephen M. Cameron return -ETIMEDOUT; 7104edd16368SStephen M. Cameron } 7105edd16368SStephen M. Cameron 7106edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7107edd16368SStephen M. Cameron 7108edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7109edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7110edd16368SStephen M. Cameron opcode, type); 7111edd16368SStephen M. Cameron return -EIO; 7112edd16368SStephen M. Cameron } 7113edd16368SStephen M. Cameron 7114edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7115edd16368SStephen M. Cameron opcode, type); 7116edd16368SStephen M. Cameron return 0; 7117edd16368SStephen M. Cameron } 7118edd16368SStephen M. Cameron 7119edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7120edd16368SStephen M. Cameron 71211df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 712242a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7123edd16368SStephen M. Cameron { 7124edd16368SStephen M. Cameron 71251df8552aSStephen M. Cameron if (use_doorbell) { 71261df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 71271df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 71281df8552aSStephen M. Cameron * other way using the doorbell register. 7129edd16368SStephen M. Cameron */ 71301df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7131cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 713285009239SStephen M. Cameron 713300701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 713485009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 713585009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 713685009239SStephen M. Cameron * over in some weird corner cases. 713785009239SStephen M. Cameron */ 713800701a96SJustin Lindley msleep(10000); 71391df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7140edd16368SStephen M. Cameron 7141edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7142edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7143edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7144edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 71451df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 71461df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 71471df8552aSStephen M. Cameron * controller." */ 7148edd16368SStephen M. Cameron 71492662cab8SDon Brace int rc = 0; 71502662cab8SDon Brace 71511df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 71522662cab8SDon Brace 7153edd16368SStephen M. Cameron /* enter the D3hot power management state */ 71542662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 71552662cab8SDon Brace if (rc) 71562662cab8SDon Brace return rc; 7157edd16368SStephen M. Cameron 7158edd16368SStephen M. Cameron msleep(500); 7159edd16368SStephen M. Cameron 7160edd16368SStephen M. Cameron /* enter the D0 power management state */ 71612662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 71622662cab8SDon Brace if (rc) 71632662cab8SDon Brace return rc; 7164c4853efeSMike Miller 7165c4853efeSMike Miller /* 7166c4853efeSMike Miller * The P600 requires a small delay when changing states. 7167c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7168c4853efeSMike Miller * This for kdump only and is particular to the P600. 7169c4853efeSMike Miller */ 7170c4853efeSMike Miller msleep(500); 71711df8552aSStephen M. Cameron } 71721df8552aSStephen M. Cameron return 0; 71731df8552aSStephen M. Cameron } 71741df8552aSStephen M. Cameron 71756f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7176580ada3cSStephen M. Cameron { 7177580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7178f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7179580ada3cSStephen M. Cameron } 7180580ada3cSStephen M. Cameron 71816f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7182580ada3cSStephen M. Cameron { 7183580ada3cSStephen M. Cameron char *driver_version; 7184580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7185580ada3cSStephen M. Cameron 7186580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7187580ada3cSStephen M. Cameron if (!driver_version) 7188580ada3cSStephen M. Cameron return -ENOMEM; 7189580ada3cSStephen M. Cameron 7190580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7191580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7192580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7193580ada3cSStephen M. Cameron kfree(driver_version); 7194580ada3cSStephen M. Cameron return 0; 7195580ada3cSStephen M. Cameron } 7196580ada3cSStephen M. Cameron 71976f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 71986f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7199580ada3cSStephen M. Cameron { 7200580ada3cSStephen M. Cameron int i; 7201580ada3cSStephen M. Cameron 7202580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7203580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7204580ada3cSStephen M. Cameron } 7205580ada3cSStephen M. Cameron 72066f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7207580ada3cSStephen M. Cameron { 7208580ada3cSStephen M. Cameron 7209580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7210580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7211580ada3cSStephen M. Cameron 7212580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7213580ada3cSStephen M. Cameron if (!old_driver_ver) 7214580ada3cSStephen M. Cameron return -ENOMEM; 7215580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7216580ada3cSStephen M. Cameron 7217580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7218580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7219580ada3cSStephen M. Cameron */ 7220580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7221580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7222580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7223580ada3cSStephen M. Cameron kfree(old_driver_ver); 7224580ada3cSStephen M. Cameron return rc; 7225580ada3cSStephen M. Cameron } 72261df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 72271df8552aSStephen M. Cameron * states or the using the doorbell register. 72281df8552aSStephen M. Cameron */ 72296b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 72301df8552aSStephen M. Cameron { 72311df8552aSStephen M. Cameron u64 cfg_offset; 72321df8552aSStephen M. Cameron u32 cfg_base_addr; 72331df8552aSStephen M. Cameron u64 cfg_base_addr_index; 72341df8552aSStephen M. Cameron void __iomem *vaddr; 72351df8552aSStephen M. Cameron unsigned long paddr; 7236580ada3cSStephen M. Cameron u32 misc_fw_support; 7237270d05deSStephen M. Cameron int rc; 72381df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7239cf0b08d0SStephen M. Cameron u32 use_doorbell; 7240270d05deSStephen M. Cameron u16 command_register; 72411df8552aSStephen M. Cameron 72421df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 72431df8552aSStephen M. Cameron * the same thing as 72441df8552aSStephen M. Cameron * 72451df8552aSStephen M. Cameron * pci_save_state(pci_dev); 72461df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 72471df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 72481df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 72491df8552aSStephen M. Cameron * 72501df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 72511df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 72521df8552aSStephen M. Cameron * using the doorbell register. 72531df8552aSStephen M. Cameron */ 725418867659SStephen M. Cameron 725560f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 725660f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 725725c1e56aSStephen M. Cameron return -ENODEV; 725825c1e56aSStephen M. Cameron } 725946380786SStephen M. Cameron 726046380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 726146380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 726246380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 726318867659SStephen M. Cameron 7264270d05deSStephen M. Cameron /* Save the PCI command register */ 7265270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7266270d05deSStephen M. Cameron pci_save_state(pdev); 72671df8552aSStephen M. Cameron 72681df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 72691df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 72701df8552aSStephen M. Cameron if (rc) 72711df8552aSStephen M. Cameron return rc; 72721df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 72731df8552aSStephen M. Cameron if (!vaddr) 72741df8552aSStephen M. Cameron return -ENOMEM; 72751df8552aSStephen M. Cameron 72761df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 72771df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 72781df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 72791df8552aSStephen M. Cameron if (rc) 72801df8552aSStephen M. Cameron goto unmap_vaddr; 72811df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 72821df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 72831df8552aSStephen M. Cameron if (!cfgtable) { 72841df8552aSStephen M. Cameron rc = -ENOMEM; 72851df8552aSStephen M. Cameron goto unmap_vaddr; 72861df8552aSStephen M. Cameron } 7287580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7288580ada3cSStephen M. Cameron if (rc) 728903741d95STomas Henzl goto unmap_cfgtable; 72901df8552aSStephen M. Cameron 7291cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7292cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7293cf0b08d0SStephen M. Cameron */ 72941df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7295cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7296cf0b08d0SStephen M. Cameron if (use_doorbell) { 7297cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7298cf0b08d0SStephen M. Cameron } else { 72991df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7300cf0b08d0SStephen M. Cameron if (use_doorbell) { 7301050f7147SStephen Cameron dev_warn(&pdev->dev, 7302050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 730364670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7304cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7305cf0b08d0SStephen M. Cameron } 7306cf0b08d0SStephen M. Cameron } 73071df8552aSStephen M. Cameron 73081df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 73091df8552aSStephen M. Cameron if (rc) 73101df8552aSStephen M. Cameron goto unmap_cfgtable; 7311edd16368SStephen M. Cameron 7312270d05deSStephen M. Cameron pci_restore_state(pdev); 7313270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7314edd16368SStephen M. Cameron 73151df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 73161df8552aSStephen M. Cameron need a little pause here */ 73171df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 73181df8552aSStephen M. Cameron 7319fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7320fe5389c8SStephen M. Cameron if (rc) { 7321fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7322050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7323fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7324fe5389c8SStephen M. Cameron } 7325fe5389c8SStephen M. Cameron 7326580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7327580ada3cSStephen M. Cameron if (rc < 0) 7328580ada3cSStephen M. Cameron goto unmap_cfgtable; 7329580ada3cSStephen M. Cameron if (rc) { 733064670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 733164670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 733264670ac8SStephen M. Cameron rc = -ENOTSUPP; 7333580ada3cSStephen M. Cameron } else { 733464670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 73351df8552aSStephen M. Cameron } 73361df8552aSStephen M. Cameron 73371df8552aSStephen M. Cameron unmap_cfgtable: 73381df8552aSStephen M. Cameron iounmap(cfgtable); 73391df8552aSStephen M. Cameron 73401df8552aSStephen M. Cameron unmap_vaddr: 73411df8552aSStephen M. Cameron iounmap(vaddr); 73421df8552aSStephen M. Cameron return rc; 7343edd16368SStephen M. Cameron } 7344edd16368SStephen M. Cameron 7345edd16368SStephen M. Cameron /* 7346edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7347edd16368SStephen M. Cameron * the io functions. 7348edd16368SStephen M. Cameron * This is for debug only. 7349edd16368SStephen M. Cameron */ 735042a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7351edd16368SStephen M. Cameron { 735258f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7353edd16368SStephen M. Cameron int i; 7354edd16368SStephen M. Cameron char temp_name[17]; 7355edd16368SStephen M. Cameron 7356edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7357edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7358edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7359edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7360edd16368SStephen M. Cameron temp_name[4] = '\0'; 7361edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7362edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7363edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7364edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7365edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7366edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7367edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7368edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7369edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7370edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7371edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7372edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 737369d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7374edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7375edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7376edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7377edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7378edd16368SStephen M. Cameron temp_name[16] = '\0'; 7379edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7380edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7381edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7382edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 738358f8665cSStephen M. Cameron } 7384edd16368SStephen M. Cameron 7385edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7386edd16368SStephen M. Cameron { 7387edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7388edd16368SStephen M. Cameron 7389edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7390edd16368SStephen M. Cameron return 0; 7391edd16368SStephen M. Cameron offset = 0; 7392edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7393edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7394edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7395edd16368SStephen M. Cameron offset += 4; 7396edd16368SStephen M. Cameron else { 7397edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7398edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7399edd16368SStephen M. Cameron switch (mem_type) { 7400edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7401edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7402edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7403edd16368SStephen M. Cameron break; 7404edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7405edd16368SStephen M. Cameron offset += 8; 7406edd16368SStephen M. Cameron break; 7407edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7408edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7409edd16368SStephen M. Cameron "base address is invalid\n"); 7410edd16368SStephen M. Cameron return -1; 7411edd16368SStephen M. Cameron break; 7412edd16368SStephen M. Cameron } 7413edd16368SStephen M. Cameron } 7414edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7415edd16368SStephen M. Cameron return i + 1; 7416edd16368SStephen M. Cameron } 7417edd16368SStephen M. Cameron return -1; 7418edd16368SStephen M. Cameron } 7419edd16368SStephen M. Cameron 7420cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7421cc64c817SRobert Elliott { 7422cc64c817SRobert Elliott if (h->msix_vector) { 7423cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7424cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7425105a3dbcSRobert Elliott h->msix_vector = 0; 7426cc64c817SRobert Elliott } else if (h->msi_vector) { 7427cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7428cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7429105a3dbcSRobert Elliott h->msi_vector = 0; 7430cc64c817SRobert Elliott } 7431cc64c817SRobert Elliott } 7432cc64c817SRobert Elliott 7433edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7434050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7435edd16368SStephen M. Cameron */ 74366f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7437edd16368SStephen M. Cameron { 7438edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7439254f796bSMatt Gates int err, i; 7440254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7441254f796bSMatt Gates 7442254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7443254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7444254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7445254f796bSMatt Gates } 7446edd16368SStephen M. Cameron 7447edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 74486b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 74496b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7450edd16368SStephen M. Cameron goto default_int_mode; 745155c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7452050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7453eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7454f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7455f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 745618fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 745718fce3c4SAlexander Gordeev 1, h->msix_vector); 745818fce3c4SAlexander Gordeev if (err < 0) { 745918fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 746018fce3c4SAlexander Gordeev h->msix_vector = 0; 746118fce3c4SAlexander Gordeev goto single_msi_mode; 746218fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 746355c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7464edd16368SStephen M. Cameron "available\n", err); 7465eee0f03aSHannes Reinecke } 746618fce3c4SAlexander Gordeev h->msix_vector = err; 7467eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7468eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7469eee0f03aSHannes Reinecke return; 7470edd16368SStephen M. Cameron } 747118fce3c4SAlexander Gordeev single_msi_mode: 747255c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7473050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 747455c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7475edd16368SStephen M. Cameron h->msi_vector = 1; 7476edd16368SStephen M. Cameron else 747755c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7478edd16368SStephen M. Cameron } 7479edd16368SStephen M. Cameron default_int_mode: 7480edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7481edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7482a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7483edd16368SStephen M. Cameron } 7484edd16368SStephen M. Cameron 74856f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7486e5c880d1SStephen M. Cameron { 7487e5c880d1SStephen M. Cameron int i; 7488e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7489e5c880d1SStephen M. Cameron 7490e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7491e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7492e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7493e5c880d1SStephen M. Cameron subsystem_vendor_id; 7494e5c880d1SStephen M. Cameron 7495e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7496e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7497e5c880d1SStephen M. Cameron return i; 7498e5c880d1SStephen M. Cameron 74996798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 75006798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 75016798cc0aSStephen M. Cameron !hpsa_allow_any) { 7502e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7503e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7504e5c880d1SStephen M. Cameron return -ENODEV; 7505e5c880d1SStephen M. Cameron } 7506e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7507e5c880d1SStephen M. Cameron } 7508e5c880d1SStephen M. Cameron 75096f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 75103a7774ceSStephen M. Cameron unsigned long *memory_bar) 75113a7774ceSStephen M. Cameron { 75123a7774ceSStephen M. Cameron int i; 75133a7774ceSStephen M. Cameron 75143a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 751512d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 75163a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 751712d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 751812d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 75193a7774ceSStephen M. Cameron *memory_bar); 75203a7774ceSStephen M. Cameron return 0; 75213a7774ceSStephen M. Cameron } 752212d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 75233a7774ceSStephen M. Cameron return -ENODEV; 75243a7774ceSStephen M. Cameron } 75253a7774ceSStephen M. Cameron 75266f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 75276f039790SGreg Kroah-Hartman int wait_for_ready) 75282c4c8c8bSStephen M. Cameron { 7529fe5389c8SStephen M. Cameron int i, iterations; 75302c4c8c8bSStephen M. Cameron u32 scratchpad; 7531fe5389c8SStephen M. Cameron if (wait_for_ready) 7532fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7533fe5389c8SStephen M. Cameron else 7534fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 75352c4c8c8bSStephen M. Cameron 7536fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7537fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7538fe5389c8SStephen M. Cameron if (wait_for_ready) { 75392c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 75402c4c8c8bSStephen M. Cameron return 0; 7541fe5389c8SStephen M. Cameron } else { 7542fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7543fe5389c8SStephen M. Cameron return 0; 7544fe5389c8SStephen M. Cameron } 75452c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 75462c4c8c8bSStephen M. Cameron } 7547fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 75482c4c8c8bSStephen M. Cameron return -ENODEV; 75492c4c8c8bSStephen M. Cameron } 75502c4c8c8bSStephen M. Cameron 75516f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 75526f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7553a51fd47fSStephen M. Cameron u64 *cfg_offset) 7554a51fd47fSStephen M. Cameron { 7555a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7556a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7557a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7558a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7559a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7560a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7561a51fd47fSStephen M. Cameron return -ENODEV; 7562a51fd47fSStephen M. Cameron } 7563a51fd47fSStephen M. Cameron return 0; 7564a51fd47fSStephen M. Cameron } 7565a51fd47fSStephen M. Cameron 7566195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7567195f2c65SRobert Elliott { 7568105a3dbcSRobert Elliott if (h->transtable) { 7569195f2c65SRobert Elliott iounmap(h->transtable); 7570105a3dbcSRobert Elliott h->transtable = NULL; 7571105a3dbcSRobert Elliott } 7572105a3dbcSRobert Elliott if (h->cfgtable) { 7573195f2c65SRobert Elliott iounmap(h->cfgtable); 7574105a3dbcSRobert Elliott h->cfgtable = NULL; 7575105a3dbcSRobert Elliott } 7576195f2c65SRobert Elliott } 7577195f2c65SRobert Elliott 7578195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7579195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7580195f2c65SRobert Elliott + * */ 75816f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7582edd16368SStephen M. Cameron { 758301a02ffcSStephen M. Cameron u64 cfg_offset; 758401a02ffcSStephen M. Cameron u32 cfg_base_addr; 758501a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7586303932fdSDon Brace u32 trans_offset; 7587a51fd47fSStephen M. Cameron int rc; 758877c4495cSStephen M. Cameron 7589a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7590a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7591a51fd47fSStephen M. Cameron if (rc) 7592a51fd47fSStephen M. Cameron return rc; 759377c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7594a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7595cd3c81c4SRobert Elliott if (!h->cfgtable) { 7596cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 759777c4495cSStephen M. Cameron return -ENOMEM; 7598cd3c81c4SRobert Elliott } 7599580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7600580ada3cSStephen M. Cameron if (rc) 7601580ada3cSStephen M. Cameron return rc; 760277c4495cSStephen M. Cameron /* Find performant mode table. */ 7603a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 760477c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 760577c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 760677c4495cSStephen M. Cameron sizeof(*h->transtable)); 7607195f2c65SRobert Elliott if (!h->transtable) { 7608195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7609195f2c65SRobert Elliott hpsa_free_cfgtables(h); 761077c4495cSStephen M. Cameron return -ENOMEM; 7611195f2c65SRobert Elliott } 761277c4495cSStephen M. Cameron return 0; 761377c4495cSStephen M. Cameron } 761477c4495cSStephen M. Cameron 76156f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7616cba3d38bSStephen M. Cameron { 761741ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 761841ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 761941ce4c35SStephen Cameron 762041ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 762172ceeaecSStephen M. Cameron 762272ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 762372ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 762472ceeaecSStephen M. Cameron h->max_commands = 32; 762572ceeaecSStephen M. Cameron 762641ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 762741ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 762841ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 762941ce4c35SStephen Cameron h->max_commands, 763041ce4c35SStephen Cameron MIN_MAX_COMMANDS); 763141ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7632cba3d38bSStephen M. Cameron } 7633cba3d38bSStephen M. Cameron } 7634cba3d38bSStephen M. Cameron 7635c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7636c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7637c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7638c7ee65b3SWebb Scales */ 7639c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7640c7ee65b3SWebb Scales { 7641c7ee65b3SWebb Scales return h->maxsgentries > 512; 7642c7ee65b3SWebb Scales } 7643c7ee65b3SWebb Scales 7644b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7645b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7646b93d7536SStephen M. Cameron * SG chain block size, etc. 7647b93d7536SStephen M. Cameron */ 76486f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7649b93d7536SStephen M. Cameron { 7650cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 765145fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7652b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7653283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7654c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7655c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7656b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 76571a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7658b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7659b93d7536SStephen M. Cameron } else { 7660c7ee65b3SWebb Scales /* 7661c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7662c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7663c7ee65b3SWebb Scales * would lock up the controller) 7664c7ee65b3SWebb Scales */ 7665c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 76661a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7667c7ee65b3SWebb Scales h->chainsize = 0; 7668b93d7536SStephen M. Cameron } 766975167d2cSStephen M. Cameron 767075167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 767175167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 76720e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 76730e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 76740e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 76750e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 76768be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 76778be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7678b93d7536SStephen M. Cameron } 7679b93d7536SStephen M. Cameron 768076c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 768176c46e49SStephen M. Cameron { 76820fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7683050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 768476c46e49SStephen M. Cameron return false; 768576c46e49SStephen M. Cameron } 768676c46e49SStephen M. Cameron return true; 768776c46e49SStephen M. Cameron } 768876c46e49SStephen M. Cameron 768997a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7690f7c39101SStephen M. Cameron { 769197a5e98cSStephen M. Cameron u32 driver_support; 7692f7c39101SStephen M. Cameron 769397a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 76940b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 76950b9e7b74SArnd Bergmann #ifdef CONFIG_X86 769697a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7697f7c39101SStephen M. Cameron #endif 769828e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 769928e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7700f7c39101SStephen M. Cameron } 7701f7c39101SStephen M. Cameron 77023d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 77033d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 77043d0eab67SStephen M. Cameron */ 77053d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 77063d0eab67SStephen M. Cameron { 77073d0eab67SStephen M. Cameron u32 dma_prefetch; 77083d0eab67SStephen M. Cameron 77093d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 77103d0eab67SStephen M. Cameron return; 77113d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 77123d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 77133d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 77143d0eab67SStephen M. Cameron } 77153d0eab67SStephen M. Cameron 7716c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 771776438d08SStephen M. Cameron { 771876438d08SStephen M. Cameron int i; 771976438d08SStephen M. Cameron u32 doorbell_value; 772076438d08SStephen M. Cameron unsigned long flags; 772176438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7722007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 772376438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 772476438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 772576438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 772676438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7727c706a795SRobert Elliott goto done; 772876438d08SStephen M. Cameron /* delay and try again */ 7729007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 773076438d08SStephen M. Cameron } 7731c706a795SRobert Elliott return -ENODEV; 7732c706a795SRobert Elliott done: 7733c706a795SRobert Elliott return 0; 773476438d08SStephen M. Cameron } 773576438d08SStephen M. Cameron 7736c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7737eb6b2ae9SStephen M. Cameron { 7738eb6b2ae9SStephen M. Cameron int i; 77396eaf46fdSStephen M. Cameron u32 doorbell_value; 77406eaf46fdSStephen M. Cameron unsigned long flags; 7741eb6b2ae9SStephen M. Cameron 7742eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7743eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7744eb6b2ae9SStephen M. Cameron * as we enter this code.) 7745eb6b2ae9SStephen M. Cameron */ 7746007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 774725163bd5SWebb Scales if (h->remove_in_progress) 774825163bd5SWebb Scales goto done; 77496eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 77506eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 77516eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7752382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7753c706a795SRobert Elliott goto done; 7754eb6b2ae9SStephen M. Cameron /* delay and try again */ 7755007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7756eb6b2ae9SStephen M. Cameron } 7757c706a795SRobert Elliott return -ENODEV; 7758c706a795SRobert Elliott done: 7759c706a795SRobert Elliott return 0; 77603f4336f3SStephen M. Cameron } 77613f4336f3SStephen M. Cameron 7762c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 77636f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 77643f4336f3SStephen M. Cameron { 77653f4336f3SStephen M. Cameron u32 trans_support; 77663f4336f3SStephen M. Cameron 77673f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 77683f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 77693f4336f3SStephen M. Cameron return -ENOTSUPP; 77703f4336f3SStephen M. Cameron 77713f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7772283b4a9bSStephen M. Cameron 77733f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 77743f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7775b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 77763f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7777c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7778c706a795SRobert Elliott goto error; 7779eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7780283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7781283b4a9bSStephen M. Cameron goto error; 7782960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7783eb6b2ae9SStephen M. Cameron return 0; 7784283b4a9bSStephen M. Cameron error: 7785050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7786283b4a9bSStephen M. Cameron return -ENODEV; 7787eb6b2ae9SStephen M. Cameron } 7788eb6b2ae9SStephen M. Cameron 7789195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7790195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7791195f2c65SRobert Elliott { 7792195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7793195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7794105a3dbcSRobert Elliott h->vaddr = NULL; 7795195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7796943a7021SRobert Elliott /* 7797943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7798943a7021SRobert Elliott * Documentation/PCI/pci.txt 7799943a7021SRobert Elliott */ 7800195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7801943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7802195f2c65SRobert Elliott } 7803195f2c65SRobert Elliott 7804195f2c65SRobert Elliott /* several items must be freed later */ 78056f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 780677c4495cSStephen M. Cameron { 7807eb6b2ae9SStephen M. Cameron int prod_index, err; 7808edd16368SStephen M. Cameron 7809e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7810e5c880d1SStephen M. Cameron if (prod_index < 0) 781160f923b9SRobert Elliott return prod_index; 7812e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7813e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7814e5c880d1SStephen M. Cameron 78159b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 78169b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 78179b5c48c2SStephen Cameron 7818e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7819e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7820e5a44df8SMatthew Garrett 782155c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7822edd16368SStephen M. Cameron if (err) { 7823195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7824943a7021SRobert Elliott pci_disable_device(h->pdev); 7825edd16368SStephen M. Cameron return err; 7826edd16368SStephen M. Cameron } 7827edd16368SStephen M. Cameron 7828f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7829edd16368SStephen M. Cameron if (err) { 783055c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7831195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7832943a7021SRobert Elliott pci_disable_device(h->pdev); 7833943a7021SRobert Elliott return err; 7834edd16368SStephen M. Cameron } 78354fa604e1SRobert Elliott 78364fa604e1SRobert Elliott pci_set_master(h->pdev); 78374fa604e1SRobert Elliott 78386b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 783912d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 78403a7774ceSStephen M. Cameron if (err) 7841195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7842edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7843204892e9SStephen M. Cameron if (!h->vaddr) { 7844195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7845204892e9SStephen M. Cameron err = -ENOMEM; 7846195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7847204892e9SStephen M. Cameron } 7848fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 78492c4c8c8bSStephen M. Cameron if (err) 7850195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 785177c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 785277c4495cSStephen M. Cameron if (err) 7853195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7854b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7855edd16368SStephen M. Cameron 785676c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7857edd16368SStephen M. Cameron err = -ENODEV; 7858195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7859edd16368SStephen M. Cameron } 786097a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 78613d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7862eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7863eb6b2ae9SStephen M. Cameron if (err) 7864195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7865edd16368SStephen M. Cameron return 0; 7866edd16368SStephen M. Cameron 7867195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7868195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7869195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7870204892e9SStephen M. Cameron iounmap(h->vaddr); 7871105a3dbcSRobert Elliott h->vaddr = NULL; 7872195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7873195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7874943a7021SRobert Elliott /* 7875943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7876943a7021SRobert Elliott * Documentation/PCI/pci.txt 7877943a7021SRobert Elliott */ 7878195f2c65SRobert Elliott pci_disable_device(h->pdev); 7879943a7021SRobert Elliott pci_release_regions(h->pdev); 7880edd16368SStephen M. Cameron return err; 7881edd16368SStephen M. Cameron } 7882edd16368SStephen M. Cameron 78836f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7884339b2b14SStephen M. Cameron { 7885339b2b14SStephen M. Cameron int rc; 7886339b2b14SStephen M. Cameron 7887339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7888339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7889339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7890339b2b14SStephen M. Cameron return; 7891339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7892339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7893339b2b14SStephen M. Cameron if (rc != 0) { 7894339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7895339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7896339b2b14SStephen M. Cameron } 7897339b2b14SStephen M. Cameron } 7898339b2b14SStephen M. Cameron 78996b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7900edd16368SStephen M. Cameron { 79011df8552aSStephen M. Cameron int rc, i; 79023b747298STomas Henzl void __iomem *vaddr; 7903edd16368SStephen M. Cameron 79044c2a8c40SStephen M. Cameron if (!reset_devices) 79054c2a8c40SStephen M. Cameron return 0; 79064c2a8c40SStephen M. Cameron 7907132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7908132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7909132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7910132aa220STomas Henzl */ 7911132aa220STomas Henzl rc = pci_enable_device(pdev); 7912132aa220STomas Henzl if (rc) { 7913132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7914132aa220STomas Henzl return -ENODEV; 7915132aa220STomas Henzl } 7916132aa220STomas Henzl pci_disable_device(pdev); 7917132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7918132aa220STomas Henzl rc = pci_enable_device(pdev); 7919132aa220STomas Henzl if (rc) { 7920132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7921132aa220STomas Henzl return -ENODEV; 7922132aa220STomas Henzl } 79234fa604e1SRobert Elliott 7924859c75abSTomas Henzl pci_set_master(pdev); 79254fa604e1SRobert Elliott 79263b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 79273b747298STomas Henzl if (vaddr == NULL) { 79283b747298STomas Henzl rc = -ENOMEM; 79293b747298STomas Henzl goto out_disable; 79303b747298STomas Henzl } 79313b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 79323b747298STomas Henzl iounmap(vaddr); 79333b747298STomas Henzl 79341df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 79356b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7936edd16368SStephen M. Cameron 79371df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 79381df8552aSStephen M. Cameron * but it's already (and still) up and running in 793918867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 794018867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 79411df8552aSStephen M. Cameron */ 7942adf1b3a3SRobert Elliott if (rc) 7943132aa220STomas Henzl goto out_disable; 7944edd16368SStephen M. Cameron 7945edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 79461ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7947edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7948edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7949edd16368SStephen M. Cameron break; 7950edd16368SStephen M. Cameron else 7951edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7952edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7953edd16368SStephen M. Cameron } 7954132aa220STomas Henzl 7955132aa220STomas Henzl out_disable: 7956132aa220STomas Henzl 7957132aa220STomas Henzl pci_disable_device(pdev); 7958132aa220STomas Henzl return rc; 7959edd16368SStephen M. Cameron } 7960edd16368SStephen M. Cameron 79611fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 79621fb7c98aSRobert Elliott { 79631fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7964105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7965105a3dbcSRobert Elliott if (h->cmd_pool) { 79661fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 79671fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 79681fb7c98aSRobert Elliott h->cmd_pool, 79691fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7970105a3dbcSRobert Elliott h->cmd_pool = NULL; 7971105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7972105a3dbcSRobert Elliott } 7973105a3dbcSRobert Elliott if (h->errinfo_pool) { 79741fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 79751fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 79761fb7c98aSRobert Elliott h->errinfo_pool, 79771fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7978105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7979105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7980105a3dbcSRobert Elliott } 79811fb7c98aSRobert Elliott } 79821fb7c98aSRobert Elliott 7983d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 79842e9d1b36SStephen M. Cameron { 79852e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 79862e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 79872e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 79882e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 79892e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 79902e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 79912e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 79922e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 79932e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 79942e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 79952e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 79962e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 79972e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 79982c143342SRobert Elliott goto clean_up; 79992e9d1b36SStephen M. Cameron } 8000360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 80012e9d1b36SStephen M. Cameron return 0; 80022c143342SRobert Elliott clean_up: 80032c143342SRobert Elliott hpsa_free_cmd_pool(h); 80042c143342SRobert Elliott return -ENOMEM; 80052e9d1b36SStephen M. Cameron } 80062e9d1b36SStephen M. Cameron 800741b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 800841b3cf08SStephen M. Cameron { 8009ec429952SFabian Frederick int i, cpu; 801041b3cf08SStephen M. Cameron 801141b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 801241b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 8013ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 801441b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 801541b3cf08SStephen M. Cameron } 801641b3cf08SStephen M. Cameron } 801741b3cf08SStephen M. Cameron 8018ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8019ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8020ec501a18SRobert Elliott { 8021ec501a18SRobert Elliott int i; 8022ec501a18SRobert Elliott 8023ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 8024ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 8025ec501a18SRobert Elliott i = h->intr_mode; 8026ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8027ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8028105a3dbcSRobert Elliott h->q[i] = 0; 8029ec501a18SRobert Elliott return; 8030ec501a18SRobert Elliott } 8031ec501a18SRobert Elliott 8032ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 8033ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8034ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8035105a3dbcSRobert Elliott h->q[i] = 0; 8036ec501a18SRobert Elliott } 8037a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8038a4e17fc1SRobert Elliott h->q[i] = 0; 8039ec501a18SRobert Elliott } 8040ec501a18SRobert Elliott 80419ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 80429ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 80430ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 80440ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 80450ae01a32SStephen M. Cameron { 8046254f796bSMatt Gates int rc, i; 80470ae01a32SStephen M. Cameron 8048254f796bSMatt Gates /* 8049254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8050254f796bSMatt Gates * queue to process. 8051254f796bSMatt Gates */ 8052254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8053254f796bSMatt Gates h->q[i] = (u8) i; 8054254f796bSMatt Gates 8055eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 8056254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8057a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 80588b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8059254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 80608b47004aSRobert Elliott 0, h->intrname[i], 8061254f796bSMatt Gates &h->q[i]); 8062a4e17fc1SRobert Elliott if (rc) { 8063a4e17fc1SRobert Elliott int j; 8064a4e17fc1SRobert Elliott 8065a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8066a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8067a4e17fc1SRobert Elliott h->intr[i], h->devname); 8068a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8069a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 8070a4e17fc1SRobert Elliott h->q[j] = 0; 8071a4e17fc1SRobert Elliott } 8072a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8073a4e17fc1SRobert Elliott h->q[j] = 0; 8074a4e17fc1SRobert Elliott return rc; 8075a4e17fc1SRobert Elliott } 8076a4e17fc1SRobert Elliott } 807741b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 8078254f796bSMatt Gates } else { 8079254f796bSMatt Gates /* Use single reply pool */ 8080eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 80818b47004aSRobert Elliott if (h->msix_vector) 80828b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80838b47004aSRobert Elliott "%s-msix", h->devname); 80848b47004aSRobert Elliott else 80858b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80868b47004aSRobert Elliott "%s-msi", h->devname); 8087254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 80888b47004aSRobert Elliott msixhandler, 0, 80898b47004aSRobert Elliott h->intrname[h->intr_mode], 8090254f796bSMatt Gates &h->q[h->intr_mode]); 8091254f796bSMatt Gates } else { 80928b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80938b47004aSRobert Elliott "%s-intx", h->devname); 8094254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 80958b47004aSRobert Elliott intxhandler, IRQF_SHARED, 80968b47004aSRobert Elliott h->intrname[h->intr_mode], 8097254f796bSMatt Gates &h->q[h->intr_mode]); 8098254f796bSMatt Gates } 8099105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 8100254f796bSMatt Gates } 81010ae01a32SStephen M. Cameron if (rc) { 8102195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 81030ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 8104195f2c65SRobert Elliott hpsa_free_irqs(h); 81050ae01a32SStephen M. Cameron return -ENODEV; 81060ae01a32SStephen M. Cameron } 81070ae01a32SStephen M. Cameron return 0; 81080ae01a32SStephen M. Cameron } 81090ae01a32SStephen M. Cameron 81106f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 811164670ac8SStephen M. Cameron { 811239c53f55SRobert Elliott int rc; 8113bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 811464670ac8SStephen M. Cameron 811564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 811639c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 811739c53f55SRobert Elliott if (rc) { 811864670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 811939c53f55SRobert Elliott return rc; 812064670ac8SStephen M. Cameron } 812164670ac8SStephen M. Cameron 812264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 812339c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 812439c53f55SRobert Elliott if (rc) { 812564670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 812664670ac8SStephen M. Cameron "after soft reset.\n"); 812739c53f55SRobert Elliott return rc; 812864670ac8SStephen M. Cameron } 812964670ac8SStephen M. Cameron 813064670ac8SStephen M. Cameron return 0; 813164670ac8SStephen M. Cameron } 813264670ac8SStephen M. Cameron 8133072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8134072b0518SStephen M. Cameron { 8135072b0518SStephen M. Cameron int i; 8136072b0518SStephen M. Cameron 8137072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8138072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8139072b0518SStephen M. Cameron continue; 81401fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81411fb7c98aSRobert Elliott h->reply_queue_size, 81421fb7c98aSRobert Elliott h->reply_queue[i].head, 81431fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8144072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8145072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8146072b0518SStephen M. Cameron } 8147105a3dbcSRobert Elliott h->reply_queue_size = 0; 8148072b0518SStephen M. Cameron } 8149072b0518SStephen M. Cameron 81500097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 81510097f0f4SStephen M. Cameron { 8152105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8153105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8154105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8155105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 81562946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 81572946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 81582946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 81599ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 81609ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 81619ecd953aSRobert Elliott if (h->resubmit_wq) { 81629ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 81639ecd953aSRobert Elliott h->resubmit_wq = NULL; 81649ecd953aSRobert Elliott } 81659ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 81669ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 81679ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 81689ecd953aSRobert Elliott } 8169105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 817064670ac8SStephen M. Cameron } 817164670ac8SStephen M. Cameron 8172a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8173f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8174a0c12413SStephen M. Cameron { 8175281a7fd0SWebb Scales int i, refcount; 8176281a7fd0SWebb Scales struct CommandList *c; 817725163bd5SWebb Scales int failcount = 0; 8178a0c12413SStephen M. Cameron 8179080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8180f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8181f2405db8SDon Brace c = h->cmd_pool + i; 8182281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8183281a7fd0SWebb Scales if (refcount > 1) { 818425163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 81855a3d16f5SStephen M. Cameron finish_cmd(c); 8186433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 818725163bd5SWebb Scales failcount++; 8188a0c12413SStephen M. Cameron } 8189281a7fd0SWebb Scales cmd_free(h, c); 8190281a7fd0SWebb Scales } 819125163bd5SWebb Scales dev_warn(&h->pdev->dev, 819225163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8193a0c12413SStephen M. Cameron } 8194a0c12413SStephen M. Cameron 8195094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8196094963daSStephen M. Cameron { 8197c8ed0010SRusty Russell int cpu; 8198094963daSStephen M. Cameron 8199c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8200094963daSStephen M. Cameron u32 *lockup_detected; 8201094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8202094963daSStephen M. Cameron *lockup_detected = value; 8203094963daSStephen M. Cameron } 8204094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8205094963daSStephen M. Cameron } 8206094963daSStephen M. Cameron 8207a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8208a0c12413SStephen M. Cameron { 8209a0c12413SStephen M. Cameron unsigned long flags; 8210094963daSStephen M. Cameron u32 lockup_detected; 8211a0c12413SStephen M. Cameron 8212a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8213a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8214094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8215094963daSStephen M. Cameron if (!lockup_detected) { 8216094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8217094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 821825163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 821925163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8220094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8221094963daSStephen M. Cameron } 8222094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8223a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 822425163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 822525163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8226a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8227f2405db8SDon Brace fail_all_outstanding_cmds(h); 8228a0c12413SStephen M. Cameron } 8229a0c12413SStephen M. Cameron 823025163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8231a0c12413SStephen M. Cameron { 8232a0c12413SStephen M. Cameron u64 now; 8233a0c12413SStephen M. Cameron u32 heartbeat; 8234a0c12413SStephen M. Cameron unsigned long flags; 8235a0c12413SStephen M. Cameron 8236a0c12413SStephen M. Cameron now = get_jiffies_64(); 8237a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8238a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8239e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 824025163bd5SWebb Scales return false; 8241a0c12413SStephen M. Cameron 8242a0c12413SStephen M. Cameron /* 8243a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8244a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8245a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8246a0c12413SStephen M. Cameron */ 8247a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8248e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 824925163bd5SWebb Scales return false; 8250a0c12413SStephen M. Cameron 8251a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8252a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8253a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8254a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8255a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8256a0c12413SStephen M. Cameron controller_lockup_detected(h); 825725163bd5SWebb Scales return true; 8258a0c12413SStephen M. Cameron } 8259a0c12413SStephen M. Cameron 8260a0c12413SStephen M. Cameron /* We're ok. */ 8261a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8262a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 826325163bd5SWebb Scales return false; 8264a0c12413SStephen M. Cameron } 8265a0c12413SStephen M. Cameron 82669846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 826776438d08SStephen M. Cameron { 826876438d08SStephen M. Cameron int i; 826976438d08SStephen M. Cameron char *event_type; 827076438d08SStephen M. Cameron 8271e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8272e4aa3e6aSStephen Cameron return; 8273e4aa3e6aSStephen Cameron 827476438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 82751f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 82761f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 827776438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 827876438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 827976438d08SStephen M. Cameron 828076438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 828176438d08SStephen M. Cameron event_type = "state change"; 828276438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 828376438d08SStephen M. Cameron event_type = "configuration change"; 828476438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 828576438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 8286*5323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 828776438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 8288*5323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 8289*5323ed74SDon Brace } 829023100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 829176438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 829276438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 829376438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 829476438d08SStephen M. Cameron h->events, event_type); 829576438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 829676438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 829776438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 829876438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 829976438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 830076438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 830176438d08SStephen M. Cameron } else { 830276438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 830376438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 830476438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 830576438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 830676438d08SStephen M. Cameron #if 0 830776438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 830876438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 830976438d08SStephen M. Cameron #endif 831076438d08SStephen M. Cameron } 83119846590eSStephen M. Cameron return; 831276438d08SStephen M. Cameron } 831376438d08SStephen M. Cameron 831476438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 831576438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8316e863d68eSScott Teel * we should rescan the controller for devices. 8317e863d68eSScott Teel * Also check flag for driver-initiated rescan. 831876438d08SStephen M. Cameron */ 83199846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 832076438d08SStephen M. Cameron { 8321853633e8SDon Brace if (h->drv_req_rescan) { 8322853633e8SDon Brace h->drv_req_rescan = 0; 8323853633e8SDon Brace return 1; 8324853633e8SDon Brace } 8325853633e8SDon Brace 832676438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 83279846590eSStephen M. Cameron return 0; 832876438d08SStephen M. Cameron 832976438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 83309846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 83319846590eSStephen M. Cameron } 833276438d08SStephen M. Cameron 833376438d08SStephen M. Cameron /* 83349846590eSStephen M. Cameron * Check if any of the offline devices have become ready 833576438d08SStephen M. Cameron */ 83369846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 83379846590eSStephen M. Cameron { 83389846590eSStephen M. Cameron unsigned long flags; 83399846590eSStephen M. Cameron struct offline_device_entry *d; 83409846590eSStephen M. Cameron struct list_head *this, *tmp; 83419846590eSStephen M. Cameron 83429846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 83439846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 83449846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 83459846590eSStephen M. Cameron offline_list); 83469846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8347d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8348d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8349d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8350d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 83519846590eSStephen M. Cameron return 1; 8352d1fea47cSStephen M. Cameron } 83539846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 835476438d08SStephen M. Cameron } 83559846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 83569846590eSStephen M. Cameron return 0; 83579846590eSStephen M. Cameron } 83589846590eSStephen M. Cameron 835934592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 836034592254SScott Teel { 836134592254SScott Teel int rc = 1; /* assume there are changes */ 836234592254SScott Teel struct ReportLUNdata *logdev = NULL; 836334592254SScott Teel 836434592254SScott Teel /* if we can't find out if lun data has changed, 836534592254SScott Teel * assume that it has. 836634592254SScott Teel */ 836734592254SScott Teel 836834592254SScott Teel if (!h->lastlogicals) 836934592254SScott Teel goto out; 837034592254SScott Teel 837134592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 837234592254SScott Teel if (!logdev) { 837334592254SScott Teel dev_warn(&h->pdev->dev, 837434592254SScott Teel "Out of memory, can't track lun changes.\n"); 837534592254SScott Teel goto out; 837634592254SScott Teel } 837734592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 837834592254SScott Teel dev_warn(&h->pdev->dev, 837934592254SScott Teel "report luns failed, can't track lun changes.\n"); 838034592254SScott Teel goto out; 838134592254SScott Teel } 838234592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 838334592254SScott Teel dev_info(&h->pdev->dev, 838434592254SScott Teel "Lun changes detected.\n"); 838534592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 838634592254SScott Teel goto out; 838734592254SScott Teel } else 838834592254SScott Teel rc = 0; /* no changes detected. */ 838934592254SScott Teel out: 839034592254SScott Teel kfree(logdev); 839134592254SScott Teel return rc; 839234592254SScott Teel } 839334592254SScott Teel 83946636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8395a0c12413SStephen M. Cameron { 8396a0c12413SStephen M. Cameron unsigned long flags; 83978a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 83986636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 83996636e7f4SDon Brace 84006636e7f4SDon Brace 84016636e7f4SDon Brace if (h->remove_in_progress) 84028a98db73SStephen M. Cameron return; 84039846590eSStephen M. Cameron 84049846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 84059846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 84069846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 84079846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 84089846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 840934592254SScott Teel } else if (h->discovery_polling) { 8410c2adae44SScott Teel hpsa_disable_rld_caching(h); 841134592254SScott Teel if (hpsa_luns_changed(h)) { 841234592254SScott Teel struct Scsi_Host *sh = NULL; 841334592254SScott Teel 841434592254SScott Teel dev_info(&h->pdev->dev, 841534592254SScott Teel "driver discovery polling rescan.\n"); 841634592254SScott Teel sh = scsi_host_get(h->scsi_host); 841734592254SScott Teel if (sh != NULL) { 841834592254SScott Teel hpsa_scan_start(sh); 841934592254SScott Teel scsi_host_put(sh); 842034592254SScott Teel } 842134592254SScott Teel } 84229846590eSStephen M. Cameron } 84236636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 84246636e7f4SDon Brace if (!h->remove_in_progress) 84256636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 84266636e7f4SDon Brace h->heartbeat_sample_interval); 84276636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 84286636e7f4SDon Brace } 84296636e7f4SDon Brace 84306636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 84316636e7f4SDon Brace { 84326636e7f4SDon Brace unsigned long flags; 84336636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 84346636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 84356636e7f4SDon Brace 84366636e7f4SDon Brace detect_controller_lockup(h); 84376636e7f4SDon Brace if (lockup_detected(h)) 84386636e7f4SDon Brace return; 84399846590eSStephen M. Cameron 84408a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 84416636e7f4SDon Brace if (!h->remove_in_progress) 84428a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 84438a98db73SStephen M. Cameron h->heartbeat_sample_interval); 84448a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8445a0c12413SStephen M. Cameron } 8446a0c12413SStephen M. Cameron 84476636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 84486636e7f4SDon Brace char *name) 84496636e7f4SDon Brace { 84506636e7f4SDon Brace struct workqueue_struct *wq = NULL; 84516636e7f4SDon Brace 8452397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 84536636e7f4SDon Brace if (!wq) 84546636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 84556636e7f4SDon Brace 84566636e7f4SDon Brace return wq; 84576636e7f4SDon Brace } 84586636e7f4SDon Brace 84596f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 84604c2a8c40SStephen M. Cameron { 84614c2a8c40SStephen M. Cameron int dac, rc; 84624c2a8c40SStephen M. Cameron struct ctlr_info *h; 846364670ac8SStephen M. Cameron int try_soft_reset = 0; 846464670ac8SStephen M. Cameron unsigned long flags; 84656b6c1cd7STomas Henzl u32 board_id; 84664c2a8c40SStephen M. Cameron 84674c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 84684c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 84694c2a8c40SStephen M. Cameron 84706b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 84716b6c1cd7STomas Henzl if (rc < 0) { 84726b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 84736b6c1cd7STomas Henzl return rc; 84746b6c1cd7STomas Henzl } 84756b6c1cd7STomas Henzl 84766b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 847764670ac8SStephen M. Cameron if (rc) { 847864670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 84794c2a8c40SStephen M. Cameron return rc; 848064670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 848164670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 848264670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 848364670ac8SStephen M. Cameron * point that it can accept a command. 848464670ac8SStephen M. Cameron */ 848564670ac8SStephen M. Cameron try_soft_reset = 1; 848664670ac8SStephen M. Cameron rc = 0; 848764670ac8SStephen M. Cameron } 848864670ac8SStephen M. Cameron 848964670ac8SStephen M. Cameron reinit_after_soft_reset: 84904c2a8c40SStephen M. Cameron 8491303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8492303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8493303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8494303932fdSDon Brace */ 8495303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8496edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8497105a3dbcSRobert Elliott if (!h) { 8498105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8499ecd9aad4SStephen M. Cameron return -ENOMEM; 8500105a3dbcSRobert Elliott } 8501edd16368SStephen M. Cameron 850255c06c71SStephen M. Cameron h->pdev = pdev; 8503105a3dbcSRobert Elliott 8504a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 85059846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 85066eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 85079846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 85086eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 850934f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 85109b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8511094963daSStephen M. Cameron 8512094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8513094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 85142a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8515105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 85162a5ac326SStephen M. Cameron rc = -ENOMEM; 85172efa5929SRobert Elliott goto clean1; /* aer/h */ 85182a5ac326SStephen M. Cameron } 8519094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8520094963daSStephen M. Cameron 852155c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8522105a3dbcSRobert Elliott if (rc) 85232946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8524edd16368SStephen M. Cameron 85252946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 85262946e82bSRobert Elliott * interrupt_mode h->intr */ 85272946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 85282946e82bSRobert Elliott if (rc) 85292946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 85302946e82bSRobert Elliott 85312946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8532edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8533edd16368SStephen M. Cameron number_of_controllers++; 8534edd16368SStephen M. Cameron 8535edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8536ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8537ecd9aad4SStephen M. Cameron if (rc == 0) { 8538edd16368SStephen M. Cameron dac = 1; 8539ecd9aad4SStephen M. Cameron } else { 8540ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8541ecd9aad4SStephen M. Cameron if (rc == 0) { 8542edd16368SStephen M. Cameron dac = 0; 8543ecd9aad4SStephen M. Cameron } else { 8544edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 85452946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8546edd16368SStephen M. Cameron } 8547ecd9aad4SStephen M. Cameron } 8548edd16368SStephen M. Cameron 8549edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8550edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 855110f66018SStephen M. Cameron 8552105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8553105a3dbcSRobert Elliott if (rc) 85542946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8555d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 85568947fd10SRobert Elliott if (rc) 85572946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8558105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8559105a3dbcSRobert Elliott if (rc) 85602946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8561a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 85629b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8563d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8564d604f533SWebb Scales mutex_init(&h->reset_mutex); 8565a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8566edd16368SStephen M. Cameron 8567edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 85689a41338eSStephen M. Cameron h->ndevices = 0; 85692946e82bSRobert Elliott 85709a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8571105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8572105a3dbcSRobert Elliott if (rc) 85732946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 85742946e82bSRobert Elliott 85752efa5929SRobert Elliott /* create the resubmit workqueue */ 85762efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 85772efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 85782efa5929SRobert Elliott rc = -ENOMEM; 85792efa5929SRobert Elliott goto clean7; 85802efa5929SRobert Elliott } 85812efa5929SRobert Elliott 85822efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 85832efa5929SRobert Elliott if (!h->resubmit_wq) { 85842efa5929SRobert Elliott rc = -ENOMEM; 85852efa5929SRobert Elliott goto clean7; /* aer/h */ 85862efa5929SRobert Elliott } 858764670ac8SStephen M. Cameron 8588105a3dbcSRobert Elliott /* 8589105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 859064670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 859164670ac8SStephen M. Cameron * the soft reset and see if that works. 859264670ac8SStephen M. Cameron */ 859364670ac8SStephen M. Cameron if (try_soft_reset) { 859464670ac8SStephen M. Cameron 859564670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 859664670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 859764670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 859864670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 859964670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 860064670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 860164670ac8SStephen M. Cameron */ 860264670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 860364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 860464670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8605ec501a18SRobert Elliott hpsa_free_irqs(h); 86069ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 860764670ac8SStephen M. Cameron hpsa_intx_discard_completions); 860864670ac8SStephen M. Cameron if (rc) { 86099ee61794SRobert Elliott dev_warn(&h->pdev->dev, 86109ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8611d498757cSRobert Elliott /* 8612b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8613b2ef480cSRobert Elliott * again. Instead, do its work 8614b2ef480cSRobert Elliott */ 8615b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8616b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8617b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8618b2ef480cSRobert Elliott /* 8619b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8620b2ef480cSRobert Elliott * was just called before request_irqs failed 8621d498757cSRobert Elliott */ 8622d498757cSRobert Elliott goto clean3; 862364670ac8SStephen M. Cameron } 862464670ac8SStephen M. Cameron 862564670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 862664670ac8SStephen M. Cameron if (rc) 862764670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 86287ef7323fSDon Brace goto clean7; 862964670ac8SStephen M. Cameron 863064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 863164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 863264670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 863364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 863464670ac8SStephen M. Cameron msleep(10000); 863564670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 863664670ac8SStephen M. Cameron 863764670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 863864670ac8SStephen M. Cameron if (rc) 863964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 864064670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 864164670ac8SStephen M. Cameron 864264670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 864364670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 864464670ac8SStephen M. Cameron * all over again. 864564670ac8SStephen M. Cameron */ 864664670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 864764670ac8SStephen M. Cameron try_soft_reset = 0; 864864670ac8SStephen M. Cameron if (rc) 8649b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 865064670ac8SStephen M. Cameron return -ENODEV; 865164670ac8SStephen M. Cameron 865264670ac8SStephen M. Cameron goto reinit_after_soft_reset; 865364670ac8SStephen M. Cameron } 8654edd16368SStephen M. Cameron 8655da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8656da0697bdSScott Teel h->acciopath_status = 1; 865734592254SScott Teel /* Disable discovery polling.*/ 865834592254SScott Teel h->discovery_polling = 0; 8659da0697bdSScott Teel 8660e863d68eSScott Teel 8661edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8662edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8663edd16368SStephen M. Cameron 8664339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 86658a98db73SStephen M. Cameron 866634592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 866734592254SScott Teel if (!h->lastlogicals) 866834592254SScott Teel dev_info(&h->pdev->dev, 866934592254SScott Teel "Can't track change to report lun data\n"); 867034592254SScott Teel 8671cf477237SDon Brace /* hook into SCSI subsystem */ 8672cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8673cf477237SDon Brace if (rc) 8674cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8675cf477237SDon Brace 86768a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 86778a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 86788a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 86798a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86808a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86816636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 86826636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86836636e7f4SDon Brace h->heartbeat_sample_interval); 868488bf6d62SStephen M. Cameron return 0; 8685edd16368SStephen M. Cameron 86862946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8687105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8688105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8689105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 869033a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 86912946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 86922e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 86932946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8694ec501a18SRobert Elliott hpsa_free_irqs(h); 86952946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 86962946e82bSRobert Elliott scsi_host_put(h->scsi_host); 86972946e82bSRobert Elliott h->scsi_host = NULL; 86982946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8699195f2c65SRobert Elliott hpsa_free_pci_init(h); 87002946e82bSRobert Elliott clean2: /* lu, aer/h */ 8701105a3dbcSRobert Elliott if (h->lockup_detected) { 8702094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8703105a3dbcSRobert Elliott h->lockup_detected = NULL; 8704105a3dbcSRobert Elliott } 8705105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8706105a3dbcSRobert Elliott if (h->resubmit_wq) { 8707105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8708105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8709105a3dbcSRobert Elliott } 8710105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8711105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8712105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8713105a3dbcSRobert Elliott } 8714edd16368SStephen M. Cameron kfree(h); 8715ecd9aad4SStephen M. Cameron return rc; 8716edd16368SStephen M. Cameron } 8717edd16368SStephen M. Cameron 8718edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8719edd16368SStephen M. Cameron { 8720edd16368SStephen M. Cameron char *flush_buf; 8721edd16368SStephen M. Cameron struct CommandList *c; 872225163bd5SWebb Scales int rc; 8723702890e3SStephen M. Cameron 8724094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8725702890e3SStephen M. Cameron return; 8726edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8727edd16368SStephen M. Cameron if (!flush_buf) 8728edd16368SStephen M. Cameron return; 8729edd16368SStephen M. Cameron 873045fcb86eSStephen Cameron c = cmd_alloc(h); 8731bf43caf3SRobert Elliott 8732a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8733a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8734a2dac136SStephen M. Cameron goto out; 8735a2dac136SStephen M. Cameron } 873625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8737c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 873825163bd5SWebb Scales if (rc) 873925163bd5SWebb Scales goto out; 8740edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8741a2dac136SStephen M. Cameron out: 8742edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8743edd16368SStephen M. Cameron "error flushing cache on controller\n"); 874445fcb86eSStephen Cameron cmd_free(h, c); 8745edd16368SStephen M. Cameron kfree(flush_buf); 8746edd16368SStephen M. Cameron } 8747edd16368SStephen M. Cameron 8748c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8749c2adae44SScott Teel * send down a report luns request 8750c2adae44SScott Teel */ 8751c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8752c2adae44SScott Teel { 8753c2adae44SScott Teel u32 *options; 8754c2adae44SScott Teel struct CommandList *c; 8755c2adae44SScott Teel int rc; 8756c2adae44SScott Teel 8757c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8758c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8759c2adae44SScott Teel return; 8760c2adae44SScott Teel 8761c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8762c2adae44SScott Teel if (!options) { 8763c2adae44SScott Teel dev_err(&h->pdev->dev, 8764c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8765c2adae44SScott Teel return; 8766c2adae44SScott Teel } 8767c2adae44SScott Teel 8768c2adae44SScott Teel c = cmd_alloc(h); 8769c2adae44SScott Teel 8770c2adae44SScott Teel /* first, get the current diag options settings */ 8771c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8772c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8773c2adae44SScott Teel goto errout; 8774c2adae44SScott Teel 8775c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8776c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8777c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8778c2adae44SScott Teel goto errout; 8779c2adae44SScott Teel 8780c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8781c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8782c2adae44SScott Teel 8783c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8784c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8785c2adae44SScott Teel goto errout; 8786c2adae44SScott Teel 8787c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8788c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8789c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8790c2adae44SScott Teel goto errout; 8791c2adae44SScott Teel 8792c2adae44SScott Teel /* Now verify that it got set: */ 8793c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8794c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8795c2adae44SScott Teel goto errout; 8796c2adae44SScott Teel 8797c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8798c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8799c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8800c2adae44SScott Teel goto errout; 8801c2adae44SScott Teel 8802d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8803c2adae44SScott Teel goto out; 8804c2adae44SScott Teel 8805c2adae44SScott Teel errout: 8806c2adae44SScott Teel dev_err(&h->pdev->dev, 8807c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8808c2adae44SScott Teel out: 8809c2adae44SScott Teel cmd_free(h, c); 8810c2adae44SScott Teel kfree(options); 8811c2adae44SScott Teel } 8812c2adae44SScott Teel 8813edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8814edd16368SStephen M. Cameron { 8815edd16368SStephen M. Cameron struct ctlr_info *h; 8816edd16368SStephen M. Cameron 8817edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8818edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8819edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8820edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8821edd16368SStephen M. Cameron */ 8822edd16368SStephen M. Cameron hpsa_flush_cache(h); 8823edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8824105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8825cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8826edd16368SStephen M. Cameron } 8827edd16368SStephen M. Cameron 88286f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 882955e14e76SStephen M. Cameron { 883055e14e76SStephen M. Cameron int i; 883155e14e76SStephen M. Cameron 8832105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 883355e14e76SStephen M. Cameron kfree(h->dev[i]); 8834105a3dbcSRobert Elliott h->dev[i] = NULL; 8835105a3dbcSRobert Elliott } 883655e14e76SStephen M. Cameron } 883755e14e76SStephen M. Cameron 88386f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8839edd16368SStephen M. Cameron { 8840edd16368SStephen M. Cameron struct ctlr_info *h; 88418a98db73SStephen M. Cameron unsigned long flags; 8842edd16368SStephen M. Cameron 8843edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8844edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8845edd16368SStephen M. Cameron return; 8846edd16368SStephen M. Cameron } 8847edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 88488a98db73SStephen M. Cameron 88498a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 88508a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 88518a98db73SStephen M. Cameron h->remove_in_progress = 1; 88528a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 88536636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 88546636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 88556636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 88566636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8857cc64c817SRobert Elliott 88582d041306SDon Brace /* 88592d041306SDon Brace * Call before disabling interrupts. 88602d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 88612d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 88622d041306SDon Brace * operations which cannot complete and will hang the system. 88632d041306SDon Brace */ 88642d041306SDon Brace if (h->scsi_host) 88652d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8866105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8867195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8868edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8869cc64c817SRobert Elliott 8870105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8871105a3dbcSRobert Elliott 88722946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 88732946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 88742946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8875105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8876105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 88771fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 887834592254SScott Teel kfree(h->lastlogicals); 8879105a3dbcSRobert Elliott 8880105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8881195f2c65SRobert Elliott 88822946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 88832946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 88842946e82bSRobert Elliott 8885195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 88862946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8887195f2c65SRobert Elliott 8888105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8889105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8890105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8891d04e62b9SKevin Barnett 8892d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 8893d04e62b9SKevin Barnett 8894105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8895edd16368SStephen M. Cameron } 8896edd16368SStephen M. Cameron 8897edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8898edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8899edd16368SStephen M. Cameron { 8900edd16368SStephen M. Cameron return -ENOSYS; 8901edd16368SStephen M. Cameron } 8902edd16368SStephen M. Cameron 8903edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8904edd16368SStephen M. Cameron { 8905edd16368SStephen M. Cameron return -ENOSYS; 8906edd16368SStephen M. Cameron } 8907edd16368SStephen M. Cameron 8908edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8909f79cfec6SStephen M. Cameron .name = HPSA, 8910edd16368SStephen M. Cameron .probe = hpsa_init_one, 89116f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8912edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8913edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8914edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8915edd16368SStephen M. Cameron .resume = hpsa_resume, 8916edd16368SStephen M. Cameron }; 8917edd16368SStephen M. Cameron 8918303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8919303932fdSDon Brace * scatter gather elements supported) and bucket[], 8920303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8921303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8922303932fdSDon Brace * byte increments) which the controller uses to fetch 8923303932fdSDon Brace * commands. This function fills in bucket_map[], which 8924303932fdSDon Brace * maps a given number of scatter gather elements to one of 8925303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8926303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8927303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8928303932fdSDon Brace * bits of the command address. 8929303932fdSDon Brace */ 8930303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 89312b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8932303932fdSDon Brace { 8933303932fdSDon Brace int i, j, b, size; 8934303932fdSDon Brace 8935303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8936303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8937303932fdSDon Brace /* Compute size of a command with i SG entries */ 8938e1f7de0cSMatt Gates size = i + min_blocks; 8939303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8940303932fdSDon Brace /* Find the bucket that is just big enough */ 8941e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8942303932fdSDon Brace if (bucket[j] >= size) { 8943303932fdSDon Brace b = j; 8944303932fdSDon Brace break; 8945303932fdSDon Brace } 8946303932fdSDon Brace } 8947303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8948303932fdSDon Brace bucket_map[i] = b; 8949303932fdSDon Brace } 8950303932fdSDon Brace } 8951303932fdSDon Brace 8952105a3dbcSRobert Elliott /* 8953105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8954105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8955105a3dbcSRobert Elliott */ 8956c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8957303932fdSDon Brace { 89586c311b57SStephen M. Cameron int i; 89596c311b57SStephen M. Cameron unsigned long register_value; 8960e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8961e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8962e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8963b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8964b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 8965e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 8966def342bdSStephen M. Cameron 8967def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 8968def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 8969def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 8970def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 8971def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 8972def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 8973def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 8974def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 8975def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 8976def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 8977d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8978def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 8979def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 8980def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 8981def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 8982def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 8983def342bdSStephen M. Cameron */ 8984d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8985b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 8986b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 8987b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8988b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 8989b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8990b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8991b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8992b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8993b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 8994b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8995d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8996303932fdSDon Brace /* 5 = 1 s/g entry or 4k 8997303932fdSDon Brace * 6 = 2 s/g entry or 8k 8998303932fdSDon Brace * 8 = 4 s/g entry or 16k 8999303932fdSDon Brace * 10 = 6 s/g entry or 24k 9000303932fdSDon Brace */ 9001303932fdSDon Brace 9002b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9003b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9004b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9005b3a52e79SStephen M. Cameron */ 9006b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9007b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9008b3a52e79SStephen M. Cameron 9009303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9010072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9011072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9012303932fdSDon Brace 9013d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9014d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9015e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9016303932fdSDon Brace for (i = 0; i < 8; i++) 9017303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9018303932fdSDon Brace 9019303932fdSDon Brace /* size of controller ring buffer */ 9020303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9021254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9022303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9023303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9024254f796bSMatt Gates 9025254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9026254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9027072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9028254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9029254f796bSMatt Gates } 9030254f796bSMatt Gates 9031b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9032e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9033e1f7de0cSMatt Gates /* 9034e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9035e1f7de0cSMatt Gates */ 9036e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9037e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9038e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9039e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9040c349775eSScott Teel } else { 9041c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9042c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9043c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9044c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9045c349775eSScott Teel } 9046e1f7de0cSMatt Gates } 9047303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9048c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9049c706a795SRobert Elliott dev_err(&h->pdev->dev, 9050c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9051c706a795SRobert Elliott return -ENODEV; 9052c706a795SRobert Elliott } 9053303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9054303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9055050f7147SStephen Cameron dev_err(&h->pdev->dev, 9056050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9057c706a795SRobert Elliott return -ENODEV; 9058303932fdSDon Brace } 9059960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9060e1f7de0cSMatt Gates h->access = access; 9061e1f7de0cSMatt Gates h->transMethod = transMethod; 9062e1f7de0cSMatt Gates 9063b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9064b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9065c706a795SRobert Elliott return 0; 9066e1f7de0cSMatt Gates 9067b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9068e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9069e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9070e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9071e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9072e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9073e1f7de0cSMatt Gates } 9074283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9075283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9076e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9077e1f7de0cSMatt Gates 9078e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9079072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9080072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9081072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9082072b0518SStephen M. Cameron h->reply_queue_size); 9083e1f7de0cSMatt Gates 9084e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9085e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9086e1f7de0cSMatt Gates */ 9087e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9088e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9089e1f7de0cSMatt Gates 9090e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9091e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9092e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9093e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9094e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 90952b08b3e9SDon Brace cp->host_context_flags = 90962b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9097e1f7de0cSMatt Gates cp->timeout_sec = 0; 9098e1f7de0cSMatt Gates cp->ReplyQueue = 0; 909950a0decfSStephen M. Cameron cp->tag = 9100f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 910150a0decfSStephen M. Cameron cp->host_addr = 910250a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9103e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9104e1f7de0cSMatt Gates } 9105b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9106b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9107b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9108b9af4937SStephen M. Cameron int rc; 9109b9af4937SStephen M. Cameron 9110b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9111b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9112b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9113b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9114b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9115b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9116b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9117b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9118b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9119b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9120b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9121b9af4937SStephen M. Cameron cfg_base_addr_index) + 9122b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9123b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9124b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9125b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9126b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9127b9af4937SStephen M. Cameron } 9128b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9129c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9130c706a795SRobert Elliott dev_err(&h->pdev->dev, 9131c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9132c706a795SRobert Elliott return -ENODEV; 9133c706a795SRobert Elliott } 9134c706a795SRobert Elliott return 0; 9135e1f7de0cSMatt Gates } 9136e1f7de0cSMatt Gates 91371fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 91381fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 91391fb7c98aSRobert Elliott { 9140105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 91411fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 91421fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 91431fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 91441fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9145105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9146105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9147105a3dbcSRobert Elliott } 91481fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9149105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 91501fb7c98aSRobert Elliott } 91511fb7c98aSRobert Elliott 9152d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9153d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9154e1f7de0cSMatt Gates { 9155283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9156283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9157283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9158283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9159283b4a9bSStephen M. Cameron 9160e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9161e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9162e1f7de0cSMatt Gates * hardware. 9163e1f7de0cSMatt Gates */ 9164e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9165e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9166e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9167e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9168e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9169e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9170e1f7de0cSMatt Gates 9171e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9172283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9173e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9174e1f7de0cSMatt Gates 9175e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9176e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9177e1f7de0cSMatt Gates goto clean_up; 9178e1f7de0cSMatt Gates 9179e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9180e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9181e1f7de0cSMatt Gates return 0; 9182e1f7de0cSMatt Gates 9183e1f7de0cSMatt Gates clean_up: 91841fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 91852dd02d74SRobert Elliott return -ENOMEM; 91866c311b57SStephen M. Cameron } 91876c311b57SStephen M. Cameron 91881fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 91891fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 91901fb7c98aSRobert Elliott { 9191d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9192d9a729f3SWebb Scales 9193105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 91941fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 91951fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 91961fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 91971fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9198105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9199105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9200105a3dbcSRobert Elliott } 92011fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9202105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 92031fb7c98aSRobert Elliott } 92041fb7c98aSRobert Elliott 9205d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9206d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9207aca9012aSStephen M. Cameron { 9208d9a729f3SWebb Scales int rc; 9209d9a729f3SWebb Scales 9210aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9211aca9012aSStephen M. Cameron 9212aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9213aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9214aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9215aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9216aca9012aSStephen M. Cameron 9217aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9218aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9219aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9220aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9221aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9222aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9223aca9012aSStephen M. Cameron 9224aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9225aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9226aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9227aca9012aSStephen M. Cameron 9228aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9229d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9230d9a729f3SWebb Scales rc = -ENOMEM; 9231d9a729f3SWebb Scales goto clean_up; 9232d9a729f3SWebb Scales } 9233d9a729f3SWebb Scales 9234d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9235d9a729f3SWebb Scales if (rc) 9236aca9012aSStephen M. Cameron goto clean_up; 9237aca9012aSStephen M. Cameron 9238aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9239aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9240aca9012aSStephen M. Cameron return 0; 9241aca9012aSStephen M. Cameron 9242aca9012aSStephen M. Cameron clean_up: 92431fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9244d9a729f3SWebb Scales return rc; 9245aca9012aSStephen M. Cameron } 9246aca9012aSStephen M. Cameron 9247105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9248105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9249105a3dbcSRobert Elliott { 9250105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9251105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9252105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9253105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9254105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9255105a3dbcSRobert Elliott } 9256105a3dbcSRobert Elliott 9257105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9258105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9259105a3dbcSRobert Elliott */ 9260105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 92616c311b57SStephen M. Cameron { 92626c311b57SStephen M. Cameron u32 trans_support; 9263e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9264e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9265105a3dbcSRobert Elliott int i, rc; 92666c311b57SStephen M. Cameron 926702ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9268105a3dbcSRobert Elliott return 0; 926902ec19c8SStephen M. Cameron 927067c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 927167c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9272105a3dbcSRobert Elliott return 0; 927367c99a72Sscameron@beardog.cce.hp.com 9274e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9275e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9276e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9277e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9278105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9279105a3dbcSRobert Elliott if (rc) 9280105a3dbcSRobert Elliott return rc; 9281105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9282aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9283aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9284105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9285105a3dbcSRobert Elliott if (rc) 9286105a3dbcSRobert Elliott return rc; 9287e1f7de0cSMatt Gates } 9288e1f7de0cSMatt Gates 9289eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9290cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 92916c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9292072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 92936c311b57SStephen M. Cameron 9294254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9295072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9296072b0518SStephen M. Cameron h->reply_queue_size, 9297072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9298105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9299105a3dbcSRobert Elliott rc = -ENOMEM; 9300105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9301105a3dbcSRobert Elliott } 9302254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9303254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9304254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9305254f796bSMatt Gates } 9306254f796bSMatt Gates 93076c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9308d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 93096c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9310105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9311105a3dbcSRobert Elliott rc = -ENOMEM; 9312105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9313105a3dbcSRobert Elliott } 93146c311b57SStephen M. Cameron 9315105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9316105a3dbcSRobert Elliott if (rc) 9317105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9318105a3dbcSRobert Elliott return 0; 9319303932fdSDon Brace 9320105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9321303932fdSDon Brace kfree(h->blockFetchTable); 9322105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9323105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9324105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9325105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9326105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9327105a3dbcSRobert Elliott return rc; 9328303932fdSDon Brace } 9329303932fdSDon Brace 933023100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 933176438d08SStephen M. Cameron { 933223100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 933323100dd9SStephen M. Cameron } 933423100dd9SStephen M. Cameron 933523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 933623100dd9SStephen M. Cameron { 933723100dd9SStephen M. Cameron struct CommandList *c = NULL; 9338f2405db8SDon Brace int i, accel_cmds_out; 9339281a7fd0SWebb Scales int refcount; 934076438d08SStephen M. Cameron 9341f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 934223100dd9SStephen M. Cameron accel_cmds_out = 0; 9343f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9344f2405db8SDon Brace c = h->cmd_pool + i; 9345281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9346281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 934723100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9348281a7fd0SWebb Scales cmd_free(h, c); 9349f2405db8SDon Brace } 935023100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 935176438d08SStephen M. Cameron break; 935276438d08SStephen M. Cameron msleep(100); 935376438d08SStephen M. Cameron } while (1); 935476438d08SStephen M. Cameron } 935576438d08SStephen M. Cameron 9356d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9357d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9358d04e62b9SKevin Barnett { 9359d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9360d04e62b9SKevin Barnett struct sas_phy *phy; 9361d04e62b9SKevin Barnett 9362d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9363d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9364d04e62b9SKevin Barnett return NULL; 9365d04e62b9SKevin Barnett 9366d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9367d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9368d04e62b9SKevin Barnett if (!phy) { 9369d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9370d04e62b9SKevin Barnett return NULL; 9371d04e62b9SKevin Barnett } 9372d04e62b9SKevin Barnett 9373d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9374d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9375d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9376d04e62b9SKevin Barnett 9377d04e62b9SKevin Barnett return hpsa_sas_phy; 9378d04e62b9SKevin Barnett } 9379d04e62b9SKevin Barnett 9380d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9381d04e62b9SKevin Barnett { 9382d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9383d04e62b9SKevin Barnett 9384d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9385d04e62b9SKevin Barnett sas_phy_free(phy); 9386d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9387d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9388d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9389d04e62b9SKevin Barnett } 9390d04e62b9SKevin Barnett 9391d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9392d04e62b9SKevin Barnett { 9393d04e62b9SKevin Barnett int rc; 9394d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9395d04e62b9SKevin Barnett struct sas_phy *phy; 9396d04e62b9SKevin Barnett struct sas_identify *identify; 9397d04e62b9SKevin Barnett 9398d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9399d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9400d04e62b9SKevin Barnett 9401d04e62b9SKevin Barnett identify = &phy->identify; 9402d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9403d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9404d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9405d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9406d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9407d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9408d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9409d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9410d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9411d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9412d04e62b9SKevin Barnett 9413d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9414d04e62b9SKevin Barnett if (rc) 9415d04e62b9SKevin Barnett return rc; 9416d04e62b9SKevin Barnett 9417d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9418d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9419d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9420d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9421d04e62b9SKevin Barnett 9422d04e62b9SKevin Barnett return 0; 9423d04e62b9SKevin Barnett } 9424d04e62b9SKevin Barnett 9425d04e62b9SKevin Barnett static int 9426d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9427d04e62b9SKevin Barnett struct sas_rphy *rphy) 9428d04e62b9SKevin Barnett { 9429d04e62b9SKevin Barnett struct sas_identify *identify; 9430d04e62b9SKevin Barnett 9431d04e62b9SKevin Barnett identify = &rphy->identify; 9432d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9433d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9434d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9435d04e62b9SKevin Barnett 9436d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9437d04e62b9SKevin Barnett } 9438d04e62b9SKevin Barnett 9439d04e62b9SKevin Barnett static struct hpsa_sas_port 9440d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9441d04e62b9SKevin Barnett u64 sas_address) 9442d04e62b9SKevin Barnett { 9443d04e62b9SKevin Barnett int rc; 9444d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9445d04e62b9SKevin Barnett struct sas_port *port; 9446d04e62b9SKevin Barnett 9447d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9448d04e62b9SKevin Barnett if (!hpsa_sas_port) 9449d04e62b9SKevin Barnett return NULL; 9450d04e62b9SKevin Barnett 9451d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9452d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9453d04e62b9SKevin Barnett 9454d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9455d04e62b9SKevin Barnett if (!port) 9456d04e62b9SKevin Barnett goto free_hpsa_port; 9457d04e62b9SKevin Barnett 9458d04e62b9SKevin Barnett rc = sas_port_add(port); 9459d04e62b9SKevin Barnett if (rc) 9460d04e62b9SKevin Barnett goto free_sas_port; 9461d04e62b9SKevin Barnett 9462d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9463d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9464d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9465d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9466d04e62b9SKevin Barnett 9467d04e62b9SKevin Barnett return hpsa_sas_port; 9468d04e62b9SKevin Barnett 9469d04e62b9SKevin Barnett free_sas_port: 9470d04e62b9SKevin Barnett sas_port_free(port); 9471d04e62b9SKevin Barnett free_hpsa_port: 9472d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9473d04e62b9SKevin Barnett 9474d04e62b9SKevin Barnett return NULL; 9475d04e62b9SKevin Barnett } 9476d04e62b9SKevin Barnett 9477d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9478d04e62b9SKevin Barnett { 9479d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9480d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9481d04e62b9SKevin Barnett 9482d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9483d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9484d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9485d04e62b9SKevin Barnett 9486d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9487d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9488d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9489d04e62b9SKevin Barnett } 9490d04e62b9SKevin Barnett 9491d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9492d04e62b9SKevin Barnett { 9493d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9494d04e62b9SKevin Barnett 9495d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9496d04e62b9SKevin Barnett if (hpsa_sas_node) { 9497d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9498d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9499d04e62b9SKevin Barnett } 9500d04e62b9SKevin Barnett 9501d04e62b9SKevin Barnett return hpsa_sas_node; 9502d04e62b9SKevin Barnett } 9503d04e62b9SKevin Barnett 9504d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9505d04e62b9SKevin Barnett { 9506d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9507d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9508d04e62b9SKevin Barnett 9509d04e62b9SKevin Barnett if (!hpsa_sas_node) 9510d04e62b9SKevin Barnett return; 9511d04e62b9SKevin Barnett 9512d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9513d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9514d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9515d04e62b9SKevin Barnett 9516d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9517d04e62b9SKevin Barnett } 9518d04e62b9SKevin Barnett 9519d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9520d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9521d04e62b9SKevin Barnett struct sas_rphy *rphy) 9522d04e62b9SKevin Barnett { 9523d04e62b9SKevin Barnett int i; 9524d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9525d04e62b9SKevin Barnett 9526d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9527d04e62b9SKevin Barnett device = h->dev[i]; 9528d04e62b9SKevin Barnett if (!device->sas_port) 9529d04e62b9SKevin Barnett continue; 9530d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9531d04e62b9SKevin Barnett return device; 9532d04e62b9SKevin Barnett } 9533d04e62b9SKevin Barnett 9534d04e62b9SKevin Barnett return NULL; 9535d04e62b9SKevin Barnett } 9536d04e62b9SKevin Barnett 9537d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9538d04e62b9SKevin Barnett { 9539d04e62b9SKevin Barnett int rc; 9540d04e62b9SKevin Barnett struct device *parent_dev; 9541d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9542d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9543d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9544d04e62b9SKevin Barnett 9545d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9546d04e62b9SKevin Barnett 9547d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9548d04e62b9SKevin Barnett if (!hpsa_sas_node) 9549d04e62b9SKevin Barnett return -ENOMEM; 9550d04e62b9SKevin Barnett 9551d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9552d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9553d04e62b9SKevin Barnett rc = -ENODEV; 9554d04e62b9SKevin Barnett goto free_sas_node; 9555d04e62b9SKevin Barnett } 9556d04e62b9SKevin Barnett 9557d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9558d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9559d04e62b9SKevin Barnett rc = -ENODEV; 9560d04e62b9SKevin Barnett goto free_sas_port; 9561d04e62b9SKevin Barnett } 9562d04e62b9SKevin Barnett 9563d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9564d04e62b9SKevin Barnett if (rc) 9565d04e62b9SKevin Barnett goto free_sas_phy; 9566d04e62b9SKevin Barnett 9567d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9568d04e62b9SKevin Barnett 9569d04e62b9SKevin Barnett return 0; 9570d04e62b9SKevin Barnett 9571d04e62b9SKevin Barnett free_sas_phy: 9572d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9573d04e62b9SKevin Barnett free_sas_port: 9574d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9575d04e62b9SKevin Barnett free_sas_node: 9576d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9577d04e62b9SKevin Barnett 9578d04e62b9SKevin Barnett return rc; 9579d04e62b9SKevin Barnett } 9580d04e62b9SKevin Barnett 9581d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9582d04e62b9SKevin Barnett { 9583d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9584d04e62b9SKevin Barnett } 9585d04e62b9SKevin Barnett 9586d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9587d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9588d04e62b9SKevin Barnett { 9589d04e62b9SKevin Barnett int rc; 9590d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9591d04e62b9SKevin Barnett struct sas_rphy *rphy; 9592d04e62b9SKevin Barnett 9593d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9594d04e62b9SKevin Barnett if (!hpsa_sas_port) 9595d04e62b9SKevin Barnett return -ENOMEM; 9596d04e62b9SKevin Barnett 9597d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9598d04e62b9SKevin Barnett if (!rphy) { 9599d04e62b9SKevin Barnett rc = -ENODEV; 9600d04e62b9SKevin Barnett goto free_sas_port; 9601d04e62b9SKevin Barnett } 9602d04e62b9SKevin Barnett 9603d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9604d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9605d04e62b9SKevin Barnett 9606d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9607d04e62b9SKevin Barnett if (rc) 9608d04e62b9SKevin Barnett goto free_sas_port; 9609d04e62b9SKevin Barnett 9610d04e62b9SKevin Barnett return 0; 9611d04e62b9SKevin Barnett 9612d04e62b9SKevin Barnett free_sas_port: 9613d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9614d04e62b9SKevin Barnett device->sas_port = NULL; 9615d04e62b9SKevin Barnett 9616d04e62b9SKevin Barnett return rc; 9617d04e62b9SKevin Barnett } 9618d04e62b9SKevin Barnett 9619d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9620d04e62b9SKevin Barnett { 9621d04e62b9SKevin Barnett if (device->sas_port) { 9622d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9623d04e62b9SKevin Barnett device->sas_port = NULL; 9624d04e62b9SKevin Barnett } 9625d04e62b9SKevin Barnett } 9626d04e62b9SKevin Barnett 9627d04e62b9SKevin Barnett static int 9628d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9629d04e62b9SKevin Barnett { 9630d04e62b9SKevin Barnett return 0; 9631d04e62b9SKevin Barnett } 9632d04e62b9SKevin Barnett 9633d04e62b9SKevin Barnett static int 9634d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9635d04e62b9SKevin Barnett { 9636aa105695SDan Carpenter *identifier = 0; 9637d04e62b9SKevin Barnett return 0; 9638d04e62b9SKevin Barnett } 9639d04e62b9SKevin Barnett 9640d04e62b9SKevin Barnett static int 9641d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9642d04e62b9SKevin Barnett { 9643d04e62b9SKevin Barnett return -ENXIO; 9644d04e62b9SKevin Barnett } 9645d04e62b9SKevin Barnett 9646d04e62b9SKevin Barnett static int 9647d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9648d04e62b9SKevin Barnett { 9649d04e62b9SKevin Barnett return 0; 9650d04e62b9SKevin Barnett } 9651d04e62b9SKevin Barnett 9652d04e62b9SKevin Barnett static int 9653d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9654d04e62b9SKevin Barnett { 9655d04e62b9SKevin Barnett return 0; 9656d04e62b9SKevin Barnett } 9657d04e62b9SKevin Barnett 9658d04e62b9SKevin Barnett static int 9659d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9660d04e62b9SKevin Barnett { 9661d04e62b9SKevin Barnett return 0; 9662d04e62b9SKevin Barnett } 9663d04e62b9SKevin Barnett 9664d04e62b9SKevin Barnett static void 9665d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9666d04e62b9SKevin Barnett { 9667d04e62b9SKevin Barnett } 9668d04e62b9SKevin Barnett 9669d04e62b9SKevin Barnett static int 9670d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9671d04e62b9SKevin Barnett { 9672d04e62b9SKevin Barnett return -EINVAL; 9673d04e62b9SKevin Barnett } 9674d04e62b9SKevin Barnett 9675d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9676d04e62b9SKevin Barnett static int 9677d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9678d04e62b9SKevin Barnett struct request *req) 9679d04e62b9SKevin Barnett { 9680d04e62b9SKevin Barnett return -EINVAL; 9681d04e62b9SKevin Barnett } 9682d04e62b9SKevin Barnett 9683d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9684d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9685d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9686d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9687d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9688d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9689d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9690d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9691d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9692d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9693d04e62b9SKevin Barnett }; 9694d04e62b9SKevin Barnett 9695edd16368SStephen M. Cameron /* 9696edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9697edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9698edd16368SStephen M. Cameron */ 9699edd16368SStephen M. Cameron static int __init hpsa_init(void) 9700edd16368SStephen M. Cameron { 9701d04e62b9SKevin Barnett int rc; 9702d04e62b9SKevin Barnett 9703d04e62b9SKevin Barnett hpsa_sas_transport_template = 9704d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9705d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9706d04e62b9SKevin Barnett return -ENODEV; 9707d04e62b9SKevin Barnett 9708d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9709d04e62b9SKevin Barnett 9710d04e62b9SKevin Barnett if (rc) 9711d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9712d04e62b9SKevin Barnett 9713d04e62b9SKevin Barnett return rc; 9714edd16368SStephen M. Cameron } 9715edd16368SStephen M. Cameron 9716edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9717edd16368SStephen M. Cameron { 9718edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9719d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9720edd16368SStephen M. Cameron } 9721edd16368SStephen M. Cameron 9722e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9723e1f7de0cSMatt Gates { 9724e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9725dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9726dd0e19f3SScott Teel 9727dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9728dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9729dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9730dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9731dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9732dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9733dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9734dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9735dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9736dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9737dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9738dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9739dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9740dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9741dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9742dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9743dd0e19f3SScott Teel 9744dd0e19f3SScott Teel #undef VERIFY_OFFSET 9745dd0e19f3SScott Teel 9746dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9747b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9748b66cc250SMike Miller 9749b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9750b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9751b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9752b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9753b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9754b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9755b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9756b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9757b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9758b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9759b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9760b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9761b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9762b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9763b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9764b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9765b66cc250SMike Miller 9766b66cc250SMike Miller #undef VERIFY_OFFSET 9767b66cc250SMike Miller 9768b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9769e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9770e1f7de0cSMatt Gates 9771e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9772e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9773e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9774e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9775e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9776e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9777e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9778e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9779e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9780e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9781e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9782e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9783e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9784e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9785e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9786e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9787e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9788e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9789e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9790e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9791e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9792e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 979350a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9794e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9795e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9796e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9797e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9798e1f7de0cSMatt Gates } 9799e1f7de0cSMatt Gates 9800edd16368SStephen M. Cameron module_init(hpsa_init); 9801edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9802