1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 39e21760eSDon Brace * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries 494c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 51358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 61358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 7edd16368SStephen M. Cameron * 8edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 9edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 10edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 11edd16368SStephen M. Cameron * 12edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 13edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 14edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 15edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 16edd16368SStephen M. Cameron * 1794c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 18edd16368SStephen M. Cameron * 19edd16368SStephen M. Cameron */ 20edd16368SStephen M. Cameron 21edd16368SStephen M. Cameron #include <linux/module.h> 22edd16368SStephen M. Cameron #include <linux/interrupt.h> 23edd16368SStephen M. Cameron #include <linux/types.h> 24edd16368SStephen M. Cameron #include <linux/pci.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63654cc541SDon Brace #define HPSA_DRIVER_VERSION "3.4.20-200" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76b443d3eaSDon Brace /* How long to wait before giving up on a command */ 77b443d3eaSDon Brace #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ) 78edd16368SStephen M. Cameron 79edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 80edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 81edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 82edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 84edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 85253d2464SHannes Reinecke MODULE_ALIAS("cciss"); 86edd16368SStephen M. Cameron 8702ec19c8SStephen M. Cameron static int hpsa_simple_mode; 8802ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 8902ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9002ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 91edd16368SStephen M. Cameron 92edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 93edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 94edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 95edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 99163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 100163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 101f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1029143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1039143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 1097f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 110fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 1147f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149135ae6edSHannes Reinecke {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150135ae6edSHannes Reinecke PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151edd16368SStephen M. Cameron {0,} 152edd16368SStephen M. Cameron }; 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155edd16368SStephen M. Cameron 156edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 157edd16368SStephen M. Cameron * product = Marketing Name for the board 158edd16368SStephen M. Cameron * access = Address of the struct of function pointers 159edd16368SStephen M. Cameron */ 160edd16368SStephen M. Cameron static struct board_type products[] = { 161135ae6edSHannes Reinecke {0x40700E11, "Smart Array 5300", &SA5A_access}, 162135ae6edSHannes Reinecke {0x40800E11, "Smart Array 5i", &SA5B_access}, 163135ae6edSHannes Reinecke {0x40820E11, "Smart Array 532", &SA5B_access}, 164135ae6edSHannes Reinecke {0x40830E11, "Smart Array 5312", &SA5B_access}, 165135ae6edSHannes Reinecke {0x409A0E11, "Smart Array 641", &SA5A_access}, 166135ae6edSHannes Reinecke {0x409B0E11, "Smart Array 642", &SA5A_access}, 167135ae6edSHannes Reinecke {0x409C0E11, "Smart Array 6400", &SA5A_access}, 168135ae6edSHannes Reinecke {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 169135ae6edSHannes Reinecke {0x40910E11, "Smart Array 6i", &SA5A_access}, 170135ae6edSHannes Reinecke {0x3225103C, "Smart Array P600", &SA5A_access}, 171135ae6edSHannes Reinecke {0x3223103C, "Smart Array P800", &SA5A_access}, 172135ae6edSHannes Reinecke {0x3234103C, "Smart Array P400", &SA5A_access}, 173135ae6edSHannes Reinecke {0x3235103C, "Smart Array P400i", &SA5A_access}, 174135ae6edSHannes Reinecke {0x3211103C, "Smart Array E200i", &SA5A_access}, 175135ae6edSHannes Reinecke {0x3212103C, "Smart Array E200", &SA5A_access}, 176135ae6edSHannes Reinecke {0x3213103C, "Smart Array E200i", &SA5A_access}, 177135ae6edSHannes Reinecke {0x3214103C, "Smart Array E200i", &SA5A_access}, 178135ae6edSHannes Reinecke {0x3215103C, "Smart Array E200i", &SA5A_access}, 179135ae6edSHannes Reinecke {0x3237103C, "Smart Array E500", &SA5A_access}, 180135ae6edSHannes Reinecke {0x323D103C, "Smart Array P700m", &SA5A_access}, 181edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 182edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 183edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 184edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 185edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 186163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 187163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1887d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 189fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 190fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 191fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 192fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 193fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 194fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 195fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1967f1974a7SDon Brace {0x1920103C, "Smart Array P430i", &SA5_access}, 1971fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1981fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1991fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 2001fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 2017f1974a7SDon Brace {0x1925103C, "Smart Array P831", &SA5_access}, 2021fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 2031fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 2041fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 20527fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 20627fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 20727fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 20827fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 209c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 21027fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 21127fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 21297b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 21327fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 21427fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 21527fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 21627fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 21797b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 21827fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 21927fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 2203b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 2213b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 22227fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 223fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 224cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 225cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 226cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 227cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 228cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2298e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2308e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2318e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2328e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2338e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 234edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 235edd16368SStephen M. Cameron }; 236edd16368SStephen M. Cameron 237d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 238d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 239d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 240d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 241d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 242d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 243d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 244d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 245d04e62b9SKevin Barnett struct sas_rphy *rphy); 246d04e62b9SKevin Barnett 247a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 248a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 249a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 250a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 251edd16368SStephen M. Cameron static int number_of_controllers; 252edd16368SStephen M. Cameron 25310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 25410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 2556f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 2566f4e626fSNathan Chancellor void __user *arg); 25710100ffdSAl Viro static int hpsa_passthru_ioctl(struct ctlr_info *h, 25810100ffdSAl Viro IOCTL_Command_struct *iocommand); 25910100ffdSAl Viro static int hpsa_big_passthru_ioctl(struct ctlr_info *h, 26010100ffdSAl Viro BIG_IOCTL_Command_struct *ioc); 261edd16368SStephen M. Cameron 262edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 2636f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 26442a91641SDon Brace void __user *arg); 265edd16368SStephen M. Cameron #endif 266edd16368SStephen M. Cameron 267edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 268edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 26973153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 27073153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 27173153fe5SWebb Scales struct scsi_cmnd *scmd); 272a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 273b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 274edd16368SStephen M. Cameron int cmd_type); 2752c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 276b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 277b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 278edd16368SStephen M. Cameron 279f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 280a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 281a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 282a08a8471SStephen M. Cameron unsigned long elapsed_time); 2837c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 284edd16368SStephen M. Cameron 285edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 286edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 28741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 288edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 289edd16368SStephen M. Cameron 2908aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 291edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 292edd16368SStephen M. Cameron struct CommandList *c); 293edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 294edd16368SStephen M. Cameron struct CommandList *c); 295303932fdSDon Brace /* performant mode helper functions */ 296303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2972b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 298105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 299105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 300254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 3016f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 3026f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 3031df8552aSStephen M. Cameron u64 *cfg_offset); 3046f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 3051df8552aSStephen M. Cameron unsigned long *memory_bar); 306135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 307135ae6edSHannes Reinecke bool *legacy_board); 308bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 309bfd7546cSDon Brace unsigned char lunaddr[], 310bfd7546cSDon Brace int reply_queue); 3116f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 3126f039790SGreg Kroah-Hartman int wait_for_ready); 31375167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 314c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 315fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 316fe5389c8SStephen M. Cameron #define BOARD_READY 1 31723100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 31876438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 319c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 320c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 32103383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 322080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 32325163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 32425163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 325c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 326d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 327d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 3288383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3298383278dSScott Teel unsigned char scsi3addr[], u8 page); 33034592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 331ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 332ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 333ba74fdc4SDon Brace unsigned char *scsi3addr); 334edd16368SStephen M. Cameron 335edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 336edd16368SStephen M. Cameron { 337edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 338edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 339edd16368SStephen M. Cameron } 340edd16368SStephen M. Cameron 341a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 342a23513e8SStephen M. Cameron { 343a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 344a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 345a23513e8SStephen M. Cameron } 346a23513e8SStephen M. Cameron 347a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 348a58e7e53SWebb Scales { 349a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 350a58e7e53SWebb Scales } 351a58e7e53SWebb Scales 3529437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3539437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3549437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3559437ac43SStephen Cameron { 3569437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3579437ac43SStephen Cameron bool rc; 3589437ac43SStephen Cameron 3599437ac43SStephen Cameron *sense_key = -1; 3609437ac43SStephen Cameron *asc = -1; 3619437ac43SStephen Cameron *ascq = -1; 3629437ac43SStephen Cameron 3639437ac43SStephen Cameron if (sense_data_len < 1) 3649437ac43SStephen Cameron return; 3659437ac43SStephen Cameron 3669437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3679437ac43SStephen Cameron if (rc) { 3689437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3699437ac43SStephen Cameron *asc = sshdr.asc; 3709437ac43SStephen Cameron *ascq = sshdr.ascq; 3719437ac43SStephen Cameron } 3729437ac43SStephen Cameron } 3739437ac43SStephen Cameron 374edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 375edd16368SStephen M. Cameron struct CommandList *c) 376edd16368SStephen M. Cameron { 3779437ac43SStephen Cameron u8 sense_key, asc, ascq; 3789437ac43SStephen Cameron int sense_len; 3799437ac43SStephen Cameron 3809437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3819437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3829437ac43SStephen Cameron else 3839437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3849437ac43SStephen Cameron 3859437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3869437ac43SStephen Cameron &sense_key, &asc, &ascq); 38781c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 388edd16368SStephen M. Cameron return 0; 389edd16368SStephen M. Cameron 3909437ac43SStephen Cameron switch (asc) { 391edd16368SStephen M. Cameron case STATE_CHANGED: 3929437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3932946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3942946e82bSRobert Elliott h->devname); 395edd16368SStephen M. Cameron break; 396edd16368SStephen M. Cameron case LUN_FAILED: 3977f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3982946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 399edd16368SStephen M. Cameron break; 400edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 4017f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 4022946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 403edd16368SStephen M. Cameron /* 4044f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 4054f4eb9f1SScott Teel * target (array) devices. 406edd16368SStephen M. Cameron */ 407edd16368SStephen M. Cameron break; 408edd16368SStephen M. Cameron case POWER_OR_RESET: 4092946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4102946e82bSRobert Elliott "%s: a power on or device reset detected\n", 4112946e82bSRobert Elliott h->devname); 412edd16368SStephen M. Cameron break; 413edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 4142946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4152946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 4162946e82bSRobert Elliott h->devname); 417edd16368SStephen M. Cameron break; 418edd16368SStephen M. Cameron default: 4192946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4202946e82bSRobert Elliott "%s: unknown unit attention detected\n", 4212946e82bSRobert Elliott h->devname); 422edd16368SStephen M. Cameron break; 423edd16368SStephen M. Cameron } 424edd16368SStephen M. Cameron return 1; 425edd16368SStephen M. Cameron } 426edd16368SStephen M. Cameron 427852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 428852af20aSMatt Bondurant { 429852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 430852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 431852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 432852af20aSMatt Bondurant return 0; 433852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 434852af20aSMatt Bondurant return 1; 435852af20aSMatt Bondurant } 436852af20aSMatt Bondurant 437e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 438e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 439e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 440e985c58fSStephen Cameron { 441e985c58fSStephen Cameron int ld; 442e985c58fSStephen Cameron struct ctlr_info *h; 443e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 444e985c58fSStephen Cameron 445e985c58fSStephen Cameron h = shost_to_hba(shost); 446e985c58fSStephen Cameron ld = lockup_detected(h); 447e985c58fSStephen Cameron 448e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 449e985c58fSStephen Cameron } 450e985c58fSStephen Cameron 451da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 452da0697bdSScott Teel struct device_attribute *attr, 453da0697bdSScott Teel const char *buf, size_t count) 454da0697bdSScott Teel { 455da0697bdSScott Teel int status, len; 456da0697bdSScott Teel struct ctlr_info *h; 457da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 458da0697bdSScott Teel char tmpbuf[10]; 459da0697bdSScott Teel 460da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 461da0697bdSScott Teel return -EACCES; 462da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 463da0697bdSScott Teel strncpy(tmpbuf, buf, len); 464da0697bdSScott Teel tmpbuf[len] = '\0'; 465da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 466da0697bdSScott Teel return -EINVAL; 467da0697bdSScott Teel h = shost_to_hba(shost); 468da0697bdSScott Teel h->acciopath_status = !!status; 469da0697bdSScott Teel dev_warn(&h->pdev->dev, 470da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 471da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 472da0697bdSScott Teel return count; 473da0697bdSScott Teel } 474da0697bdSScott Teel 4752ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4762ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4772ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4782ba8bfc8SStephen M. Cameron { 4792ba8bfc8SStephen M. Cameron int debug_level, len; 4802ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4812ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4822ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4832ba8bfc8SStephen M. Cameron 4842ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4852ba8bfc8SStephen M. Cameron return -EACCES; 4862ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4872ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4882ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4892ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4902ba8bfc8SStephen M. Cameron return -EINVAL; 4912ba8bfc8SStephen M. Cameron if (debug_level < 0) 4922ba8bfc8SStephen M. Cameron debug_level = 0; 4932ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4942ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4952ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4962ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4972ba8bfc8SStephen M. Cameron return count; 4982ba8bfc8SStephen M. Cameron } 4992ba8bfc8SStephen M. Cameron 500edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 501edd16368SStephen M. Cameron struct device_attribute *attr, 502edd16368SStephen M. Cameron const char *buf, size_t count) 503edd16368SStephen M. Cameron { 504edd16368SStephen M. Cameron struct ctlr_info *h; 505edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 506a23513e8SStephen M. Cameron h = shost_to_hba(shost); 50731468401SMike Miller hpsa_scan_start(h->scsi_host); 508edd16368SStephen M. Cameron return count; 509edd16368SStephen M. Cameron } 510edd16368SStephen M. Cameron 5113e16e83aSDon Brace static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device) 5123e16e83aSDon Brace { 5133e16e83aSDon Brace device->offload_enabled = 0; 5143e16e83aSDon Brace device->offload_to_be_enabled = 0; 5153e16e83aSDon Brace } 5163e16e83aSDon Brace 517d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 518d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 519d28ce020SStephen M. Cameron { 520d28ce020SStephen M. Cameron struct ctlr_info *h; 521d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 522d28ce020SStephen M. Cameron unsigned char *fwrev; 523d28ce020SStephen M. Cameron 524d28ce020SStephen M. Cameron h = shost_to_hba(shost); 525d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 526d28ce020SStephen M. Cameron return 0; 527d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 528d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 529d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 530d28ce020SStephen M. Cameron } 531d28ce020SStephen M. Cameron 53294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 53394a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 53494a13649SStephen M. Cameron { 53594a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 53694a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 53794a13649SStephen M. Cameron 5380cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5390cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 54094a13649SStephen M. Cameron } 54194a13649SStephen M. Cameron 542745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 543745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 544745a7a25SStephen M. Cameron { 545745a7a25SStephen M. Cameron struct ctlr_info *h; 546745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 547745a7a25SStephen M. Cameron 548745a7a25SStephen M. Cameron h = shost_to_hba(shost); 549745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 550960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 551745a7a25SStephen M. Cameron "performant" : "simple"); 552745a7a25SStephen M. Cameron } 553745a7a25SStephen M. Cameron 554da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 555da0697bdSScott Teel struct device_attribute *attr, char *buf) 556da0697bdSScott Teel { 557da0697bdSScott Teel struct ctlr_info *h; 558da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 559da0697bdSScott Teel 560da0697bdSScott Teel h = shost_to_hba(shost); 561da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 562da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 563da0697bdSScott Teel } 564da0697bdSScott Teel 56546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 566941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 567941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 568941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 569941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 570941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 571941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 572941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 573941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 574941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 575941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 576941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 577941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 578941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5797af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 580941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 581941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5825a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5835a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5845a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5855a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5865a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5875a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 588941b1cdaSStephen M. Cameron }; 589941b1cdaSStephen M. Cameron 59046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 59146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5927af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5935a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5945a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5955a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5965a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5975a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5985a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 59946380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 60046380786SStephen M. Cameron * which share a battery backed cache module. One controls the 60146380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 60246380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 60346380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 60446380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 60546380786SStephen M. Cameron */ 60646380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 60746380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 60846380786SStephen M. Cameron }; 60946380786SStephen M. Cameron 6109b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 611941b1cdaSStephen M. Cameron { 612941b1cdaSStephen M. Cameron int i; 613941b1cdaSStephen M. Cameron 6149b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 6159b5c48c2SStephen Cameron if (a[i] == board_id) 616941b1cdaSStephen M. Cameron return 1; 6179b5c48c2SStephen Cameron return 0; 6189b5c48c2SStephen Cameron } 6199b5c48c2SStephen Cameron 6209b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 6219b5c48c2SStephen Cameron { 6229b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 6239b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 624941b1cdaSStephen M. Cameron } 625941b1cdaSStephen M. Cameron 62646380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 62746380786SStephen M. Cameron { 6289b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6299b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 63046380786SStephen M. Cameron } 63146380786SStephen M. Cameron 63246380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 63346380786SStephen M. Cameron { 63446380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 63546380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 63646380786SStephen M. Cameron } 63746380786SStephen M. Cameron 638941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 639941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 640941b1cdaSStephen M. Cameron { 641941b1cdaSStephen M. Cameron struct ctlr_info *h; 642941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 643941b1cdaSStephen M. Cameron 644941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 64546380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 646941b1cdaSStephen M. Cameron } 647941b1cdaSStephen M. Cameron 648edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 649edd16368SStephen M. Cameron { 650edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 651edd16368SStephen M. Cameron } 652edd16368SStephen M. Cameron 653f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6547c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 655edd16368SStephen M. Cameron }; 6566b80b18fSScott Teel #define HPSA_RAID_0 0 6576b80b18fSScott Teel #define HPSA_RAID_4 1 6586b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6596b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6606b80b18fSScott Teel #define HPSA_RAID_51 4 6616b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6626b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6637c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6647c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 665edd16368SStephen M. Cameron 666f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 667f3f01730SKevin Barnett { 668f3f01730SKevin Barnett return !device->physical_device; 669f3f01730SKevin Barnett } 670edd16368SStephen M. Cameron 671edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 672edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 673edd16368SStephen M. Cameron { 674edd16368SStephen M. Cameron ssize_t l = 0; 67582a72c0aSStephen M. Cameron unsigned char rlevel; 676edd16368SStephen M. Cameron struct ctlr_info *h; 677edd16368SStephen M. Cameron struct scsi_device *sdev; 678edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 679edd16368SStephen M. Cameron unsigned long flags; 680edd16368SStephen M. Cameron 681edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 682edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 683edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 684edd16368SStephen M. Cameron hdev = sdev->hostdata; 685edd16368SStephen M. Cameron if (!hdev) { 686edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 687edd16368SStephen M. Cameron return -ENODEV; 688edd16368SStephen M. Cameron } 689edd16368SStephen M. Cameron 690edd16368SStephen M. Cameron /* Is this even a logical drive? */ 691f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 692edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 693edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 694edd16368SStephen M. Cameron return l; 695edd16368SStephen M. Cameron } 696edd16368SStephen M. Cameron 697edd16368SStephen M. Cameron rlevel = hdev->raid_level; 698edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 69982a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 700edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 701edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 702edd16368SStephen M. Cameron return l; 703edd16368SStephen M. Cameron } 704edd16368SStephen M. Cameron 705edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 706edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 707edd16368SStephen M. Cameron { 708edd16368SStephen M. Cameron struct ctlr_info *h; 709edd16368SStephen M. Cameron struct scsi_device *sdev; 710edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 711edd16368SStephen M. Cameron unsigned long flags; 712edd16368SStephen M. Cameron unsigned char lunid[8]; 713edd16368SStephen M. Cameron 714edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 715edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 716edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 717edd16368SStephen M. Cameron hdev = sdev->hostdata; 718edd16368SStephen M. Cameron if (!hdev) { 719edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 720edd16368SStephen M. Cameron return -ENODEV; 721edd16368SStephen M. Cameron } 722edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 723edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 724609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 725edd16368SStephen M. Cameron } 726edd16368SStephen M. Cameron 727edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 728edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 729edd16368SStephen M. Cameron { 730edd16368SStephen M. Cameron struct ctlr_info *h; 731edd16368SStephen M. Cameron struct scsi_device *sdev; 732edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 733edd16368SStephen M. Cameron unsigned long flags; 734edd16368SStephen M. Cameron unsigned char sn[16]; 735edd16368SStephen M. Cameron 736edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 737edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 738edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 739edd16368SStephen M. Cameron hdev = sdev->hostdata; 740edd16368SStephen M. Cameron if (!hdev) { 741edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 742edd16368SStephen M. Cameron return -ENODEV; 743edd16368SStephen M. Cameron } 744edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 745edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 746edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 747edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 748edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 749edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 750edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 751edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 752edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 753edd16368SStephen M. Cameron } 754edd16368SStephen M. Cameron 755ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 756ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 757ded1be4aSJoseph T Handzik { 758ded1be4aSJoseph T Handzik struct ctlr_info *h; 759ded1be4aSJoseph T Handzik struct scsi_device *sdev; 760ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 761ded1be4aSJoseph T Handzik unsigned long flags; 762ded1be4aSJoseph T Handzik u64 sas_address; 763ded1be4aSJoseph T Handzik 764ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 765ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 766ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 767ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 768ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 769ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 770ded1be4aSJoseph T Handzik return -ENODEV; 771ded1be4aSJoseph T Handzik } 772ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 773ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 774ded1be4aSJoseph T Handzik 775ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 776ded1be4aSJoseph T Handzik } 777ded1be4aSJoseph T Handzik 778c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 779c1988684SScott Teel struct device_attribute *attr, char *buf) 780c1988684SScott Teel { 781c1988684SScott Teel struct ctlr_info *h; 782c1988684SScott Teel struct scsi_device *sdev; 783c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 784c1988684SScott Teel unsigned long flags; 785c1988684SScott Teel int offload_enabled; 786c1988684SScott Teel 787c1988684SScott Teel sdev = to_scsi_device(dev); 788c1988684SScott Teel h = sdev_to_hba(sdev); 789c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 790c1988684SScott Teel hdev = sdev->hostdata; 791c1988684SScott Teel if (!hdev) { 792c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 793c1988684SScott Teel return -ENODEV; 794c1988684SScott Teel } 795c1988684SScott Teel offload_enabled = hdev->offload_enabled; 796c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 797b2582a65SDon Brace 798b2582a65SDon Brace if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 799c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 800b2582a65SDon Brace else 801b2582a65SDon Brace return snprintf(buf, 40, "%s\n", 802b2582a65SDon Brace "Not applicable for a controller"); 803c1988684SScott Teel } 804c1988684SScott Teel 8058270b862SJoe Handzik #define MAX_PATHS 8 8068270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 8078270b862SJoe Handzik struct device_attribute *attr, char *buf) 8088270b862SJoe Handzik { 8098270b862SJoe Handzik struct ctlr_info *h; 8108270b862SJoe Handzik struct scsi_device *sdev; 8118270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 8128270b862SJoe Handzik unsigned long flags; 8138270b862SJoe Handzik int i; 8148270b862SJoe Handzik int output_len = 0; 8158270b862SJoe Handzik u8 box; 8168270b862SJoe Handzik u8 bay; 8178270b862SJoe Handzik u8 path_map_index = 0; 8188270b862SJoe Handzik char *active; 8198270b862SJoe Handzik unsigned char phys_connector[2]; 8208270b862SJoe Handzik 8218270b862SJoe Handzik sdev = to_scsi_device(dev); 8228270b862SJoe Handzik h = sdev_to_hba(sdev); 8238270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8248270b862SJoe Handzik hdev = sdev->hostdata; 8258270b862SJoe Handzik if (!hdev) { 8268270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8278270b862SJoe Handzik return -ENODEV; 8288270b862SJoe Handzik } 8298270b862SJoe Handzik 8308270b862SJoe Handzik bay = hdev->bay; 8318270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8328270b862SJoe Handzik path_map_index = 1<<i; 8338270b862SJoe Handzik if (i == hdev->active_path_index) 8348270b862SJoe Handzik active = "Active"; 8358270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8368270b862SJoe Handzik active = "Inactive"; 8378270b862SJoe Handzik else 8388270b862SJoe Handzik continue; 8398270b862SJoe Handzik 8401faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8411faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8421faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8438270b862SJoe Handzik h->scsi_host->host_no, 8448270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8458270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8468270b862SJoe Handzik 847cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8482708f295SDon Brace output_len += scnprintf(buf + output_len, 8491faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8501faf072cSRasmus Villemoes "%s\n", active); 8518270b862SJoe Handzik continue; 8528270b862SJoe Handzik } 8538270b862SJoe Handzik 8548270b862SJoe Handzik box = hdev->box[i]; 8558270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8568270b862SJoe Handzik sizeof(phys_connector)); 8578270b862SJoe Handzik if (phys_connector[0] < '0') 8588270b862SJoe Handzik phys_connector[0] = '0'; 8598270b862SJoe Handzik if (phys_connector[1] < '0') 8608270b862SJoe Handzik phys_connector[1] = '0'; 8612708f295SDon Brace output_len += scnprintf(buf + output_len, 8621faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8638270b862SJoe Handzik "PORT: %.2s ", 8648270b862SJoe Handzik phys_connector); 865af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 866af15ed36SDon Brace hdev->expose_device) { 8678270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8682708f295SDon Brace output_len += scnprintf(buf + output_len, 8691faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8708270b862SJoe Handzik "BAY: %hhu %s\n", 8718270b862SJoe Handzik bay, active); 8728270b862SJoe Handzik } else { 8732708f295SDon Brace output_len += scnprintf(buf + output_len, 8741faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8758270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8768270b862SJoe Handzik box, bay, active); 8778270b862SJoe Handzik } 8788270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8792708f295SDon Brace output_len += scnprintf(buf + output_len, 8801faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8818270b862SJoe Handzik box, active); 8828270b862SJoe Handzik } else 8832708f295SDon Brace output_len += scnprintf(buf + output_len, 8841faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8858270b862SJoe Handzik } 8868270b862SJoe Handzik 8878270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8881faf072cSRasmus Villemoes return output_len; 8898270b862SJoe Handzik } 8908270b862SJoe Handzik 89116961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 89216961204SHannes Reinecke struct device_attribute *attr, char *buf) 89316961204SHannes Reinecke { 89416961204SHannes Reinecke struct ctlr_info *h; 89516961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 89616961204SHannes Reinecke 89716961204SHannes Reinecke h = shost_to_hba(shost); 89816961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 89916961204SHannes Reinecke } 90016961204SHannes Reinecke 901135ae6edSHannes Reinecke static ssize_t host_show_legacy_board(struct device *dev, 902135ae6edSHannes Reinecke struct device_attribute *attr, char *buf) 903135ae6edSHannes Reinecke { 904135ae6edSHannes Reinecke struct ctlr_info *h; 905135ae6edSHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 906135ae6edSHannes Reinecke 907135ae6edSHannes Reinecke h = shost_to_hba(shost); 908135ae6edSHannes Reinecke return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 909135ae6edSHannes Reinecke } 910135ae6edSHannes Reinecke 911c828a892SJoe Perches static DEVICE_ATTR_RO(raid_level); 912c828a892SJoe Perches static DEVICE_ATTR_RO(lunid); 913c828a892SJoe Perches static DEVICE_ATTR_RO(unique_id); 9143f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 915c828a892SJoe Perches static DEVICE_ATTR_RO(sas_address); 916c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 917c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 918c828a892SJoe Perches static DEVICE_ATTR_RO(path_info); 919da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 920da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 921da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 9222ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 9232ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 9243f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 9253f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 9263f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 9273f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 9283f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 9293f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 930941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 931941b1cdaSStephen M. Cameron host_show_resettable, NULL); 932e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 933e985c58fSStephen Cameron host_show_lockup_detected, NULL); 93416961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 93516961204SHannes Reinecke host_show_ctlr_num, NULL); 936135ae6edSHannes Reinecke static DEVICE_ATTR(legacy_board, S_IRUGO, 937135ae6edSHannes Reinecke host_show_legacy_board, NULL); 9383f5eac3aSStephen M. Cameron 9394cd16323SBart Van Assche static struct attribute *hpsa_sdev_attrs[] = { 9404cd16323SBart Van Assche &dev_attr_raid_level.attr, 9414cd16323SBart Van Assche &dev_attr_lunid.attr, 9424cd16323SBart Van Assche &dev_attr_unique_id.attr, 9434cd16323SBart Van Assche &dev_attr_hp_ssd_smart_path_enabled.attr, 9444cd16323SBart Van Assche &dev_attr_path_info.attr, 9454cd16323SBart Van Assche &dev_attr_sas_address.attr, 9463f5eac3aSStephen M. Cameron NULL, 9473f5eac3aSStephen M. Cameron }; 9483f5eac3aSStephen M. Cameron 9494cd16323SBart Van Assche ATTRIBUTE_GROUPS(hpsa_sdev); 9504cd16323SBart Van Assche 9514cd16323SBart Van Assche static struct attribute *hpsa_shost_attrs[] = { 9524cd16323SBart Van Assche &dev_attr_rescan.attr, 9534cd16323SBart Van Assche &dev_attr_firmware_revision.attr, 9544cd16323SBart Van Assche &dev_attr_commands_outstanding.attr, 9554cd16323SBart Van Assche &dev_attr_transport_mode.attr, 9564cd16323SBart Van Assche &dev_attr_resettable.attr, 9574cd16323SBart Van Assche &dev_attr_hp_ssd_smart_path_status.attr, 9584cd16323SBart Van Assche &dev_attr_raid_offload_debug.attr, 9594cd16323SBart Van Assche &dev_attr_lockup_detected.attr, 9604cd16323SBart Van Assche &dev_attr_ctlr_num.attr, 9614cd16323SBart Van Assche &dev_attr_legacy_board.attr, 9623f5eac3aSStephen M. Cameron NULL, 9633f5eac3aSStephen M. Cameron }; 9643f5eac3aSStephen M. Cameron 9654cd16323SBart Van Assche ATTRIBUTE_GROUPS(hpsa_shost); 9664cd16323SBart Van Assche 96708ec46f6SDon Brace #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 96808ec46f6SDon Brace HPSA_MAX_CONCURRENT_PASSTHRUS) 96941ce4c35SStephen Cameron 9703f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9713f5eac3aSStephen M. Cameron .module = THIS_MODULE, 972f79cfec6SStephen M. Cameron .name = HPSA, 973f79cfec6SStephen M. Cameron .proc_name = HPSA, 9743f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9753f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9763f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9777c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9783f5eac3aSStephen M. Cameron .this_id = -1, 9793f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9803f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9813f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 98241ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9833f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9843f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9853f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9863f5eac3aSStephen M. Cameron #endif 9874cd16323SBart Van Assche .sdev_groups = hpsa_sdev_groups, 9884cd16323SBart Van Assche .shost_groups = hpsa_shost_groups, 989eb53a3eaSMartin Wilck .max_sectors = 2048, 99054b2b50cSMartin K. Petersen .no_write_same = 1, 9913f5eac3aSStephen M. Cameron }; 9923f5eac3aSStephen M. Cameron 993254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9943f5eac3aSStephen M. Cameron { 9953f5eac3aSStephen M. Cameron u32 a; 996072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9973f5eac3aSStephen M. Cameron 998e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 999e1f7de0cSMatt Gates return h->access.command_completed(h, q); 1000e1f7de0cSMatt Gates 10013f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 1002254f796bSMatt Gates return h->access.command_completed(h, q); 10033f5eac3aSStephen M. Cameron 1004254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 1005254f796bSMatt Gates a = rq->head[rq->current_entry]; 1006254f796bSMatt Gates rq->current_entry++; 10070cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 10083f5eac3aSStephen M. Cameron } else { 10093f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 10103f5eac3aSStephen M. Cameron } 10113f5eac3aSStephen M. Cameron /* Check for wraparound */ 1012254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 1013254f796bSMatt Gates rq->current_entry = 0; 1014254f796bSMatt Gates rq->wraparound ^= 1; 10153f5eac3aSStephen M. Cameron } 10163f5eac3aSStephen M. Cameron return a; 10173f5eac3aSStephen M. Cameron } 10183f5eac3aSStephen M. Cameron 1019c349775eSScott Teel /* 1020c349775eSScott Teel * There are some special bits in the bus address of the 1021c349775eSScott Teel * command that we have to set for the controller to know 1022c349775eSScott Teel * how to process the command: 1023c349775eSScott Teel * 1024c349775eSScott Teel * Normal performant mode: 1025c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 1026c349775eSScott Teel * bits 1-3 = block fetch table entry 1027c349775eSScott Teel * bits 4-6 = command type (== 0) 1028c349775eSScott Teel * 1029c349775eSScott Teel * ioaccel1 mode: 1030c349775eSScott Teel * bit 0 = "performant mode" bit. 1031c349775eSScott Teel * bits 1-3 = block fetch table entry 1032c349775eSScott Teel * bits 4-6 = command type (== 110) 1033c349775eSScott Teel * (command type is needed because ioaccel1 mode 1034c349775eSScott Teel * commands are submitted through the same register as normal 1035c349775eSScott Teel * mode commands, so this is how the controller knows whether 1036c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 1037c349775eSScott Teel * 1038c349775eSScott Teel * ioaccel2 mode: 1039c349775eSScott Teel * bit 0 = "performant mode" bit. 1040c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1041c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1042c349775eSScott Teel * a separate special register for submitting commands. 1043c349775eSScott Teel */ 1044c349775eSScott Teel 104525163bd5SWebb Scales /* 104625163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10473f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10483f5eac3aSStephen M. Cameron * register number 10493f5eac3aSStephen M. Cameron */ 105025163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 105125163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 105225163bd5SWebb Scales int reply_queue) 10533f5eac3aSStephen M. Cameron { 1054254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10553f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1056bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 105725163bd5SWebb Scales return; 10588b834bffSMing Lei c->Header.ReplyQueue = reply_queue; 1059254f796bSMatt Gates } 10603f5eac3aSStephen M. Cameron } 10613f5eac3aSStephen M. Cameron 1062c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 106325163bd5SWebb Scales struct CommandList *c, 106425163bd5SWebb Scales int reply_queue) 1065c349775eSScott Teel { 1066c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1067c349775eSScott Teel 106825163bd5SWebb Scales /* 106925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1070c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1071c349775eSScott Teel */ 10728b834bffSMing Lei cp->ReplyQueue = reply_queue; 107325163bd5SWebb Scales /* 107425163bd5SWebb Scales * Set the bits in the address sent down to include: 1075c349775eSScott Teel * - performant mode bit (bit 0) 1076c349775eSScott Teel * - pull count (bits 1-3) 1077c349775eSScott Teel * - command type (bits 4-6) 1078c349775eSScott Teel */ 1079c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1080c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1081c349775eSScott Teel } 1082c349775eSScott Teel 10838be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10848be986ccSStephen Cameron struct CommandList *c, 10858be986ccSStephen Cameron int reply_queue) 10868be986ccSStephen Cameron { 10878be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10888be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10898be986ccSStephen Cameron 10908be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10918be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10928be986ccSStephen Cameron */ 10938b834bffSMing Lei cp->reply_queue = reply_queue; 10948be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10958be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10968be986ccSStephen Cameron * - pull count (bits 0-3) 10978be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10988be986ccSStephen Cameron */ 10998be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 11008be986ccSStephen Cameron } 11018be986ccSStephen Cameron 1102c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 110325163bd5SWebb Scales struct CommandList *c, 110425163bd5SWebb Scales int reply_queue) 1105c349775eSScott Teel { 1106c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1107c349775eSScott Teel 110825163bd5SWebb Scales /* 110925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1110c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1111c349775eSScott Teel */ 11128b834bffSMing Lei cp->reply_queue = reply_queue; 111325163bd5SWebb Scales /* 111425163bd5SWebb Scales * Set the bits in the address sent down to include: 1115c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1116c349775eSScott Teel * - pull count (bits 0-3) 1117c349775eSScott Teel * - command type isn't needed for ioaccel2 1118c349775eSScott Teel */ 1119c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1120c349775eSScott Teel } 1121c349775eSScott Teel 1122e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1123e85c5974SStephen M. Cameron { 1124e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1125e85c5974SStephen M. Cameron } 1126e85c5974SStephen M. Cameron 1127e85c5974SStephen M. Cameron /* 1128e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1129e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1130e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1131e85c5974SStephen M. Cameron */ 1132e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1133e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 11343d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1135e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1136e85c5974SStephen M. Cameron struct CommandList *c) 1137e85c5974SStephen M. Cameron { 1138e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1139e85c5974SStephen M. Cameron return; 1140e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1141e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1142e85c5974SStephen M. Cameron } 1143e85c5974SStephen M. Cameron 1144e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1145e85c5974SStephen M. Cameron struct CommandList *c) 1146e85c5974SStephen M. Cameron { 1147e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1148e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1149e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1150e85c5974SStephen M. Cameron } 1151e85c5974SStephen M. Cameron 115225163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 115325163bd5SWebb Scales struct CommandList *c, int reply_queue) 11543f5eac3aSStephen M. Cameron { 1155c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1156c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1157f749d8b7SDon Brace /* 1158f749d8b7SDon Brace * Check to see if the command is being retried. 1159f749d8b7SDon Brace */ 1160f749d8b7SDon Brace if (c->device && !c->retry_pending) 1161c5dfd106SDon Brace atomic_inc(&c->device->commands_outstanding); 11628b834bffSMing Lei 11638b834bffSMing Lei reply_queue = h->reply_map[raw_smp_processor_id()]; 1164c349775eSScott Teel switch (c->cmd_type) { 1165c349775eSScott Teel case CMD_IOACCEL1: 116625163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1167c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1168c349775eSScott Teel break; 1169c349775eSScott Teel case CMD_IOACCEL2: 117025163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1171c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1172c349775eSScott Teel break; 11738be986ccSStephen Cameron case IOACCEL2_TMF: 11748be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11758be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11768be986ccSStephen Cameron break; 1177c349775eSScott Teel default: 117825163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1179f2405db8SDon Brace h->access.submit_command(h, c); 11803f5eac3aSStephen M. Cameron } 1181c05e8866SStephen Cameron } 11823f5eac3aSStephen M. Cameron 1183a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 118425163bd5SWebb Scales { 118525163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 118625163bd5SWebb Scales } 118725163bd5SWebb Scales 11883f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11893f5eac3aSStephen M. Cameron { 11903f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11913f5eac3aSStephen M. Cameron } 11923f5eac3aSStephen M. Cameron 11933f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11943f5eac3aSStephen M. Cameron { 11953f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11963f5eac3aSStephen M. Cameron return 0; 11973f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11983f5eac3aSStephen M. Cameron return 1; 11993f5eac3aSStephen M. Cameron return 0; 12003f5eac3aSStephen M. Cameron } 12013f5eac3aSStephen M. Cameron 1202edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1203edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1204edd16368SStephen M. Cameron { 1205edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1206edd16368SStephen M. Cameron * assumes h->devlock is held 1207edd16368SStephen M. Cameron */ 1208edd16368SStephen M. Cameron int i, found = 0; 1209cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1210edd16368SStephen M. Cameron 1211263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1212edd16368SStephen M. Cameron 1213edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1214edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1215263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1216edd16368SStephen M. Cameron } 1217edd16368SStephen M. Cameron 1218263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1219263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1220edd16368SStephen M. Cameron /* *bus = 1; */ 1221edd16368SStephen M. Cameron *target = i; 1222edd16368SStephen M. Cameron *lun = 0; 1223edd16368SStephen M. Cameron found = 1; 1224edd16368SStephen M. Cameron } 1225edd16368SStephen M. Cameron return !found; 1226edd16368SStephen M. Cameron } 1227edd16368SStephen M. Cameron 12281d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 12290d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12300d96ef5fSWebb Scales { 12317c59a0d4SDon Brace #define LABEL_SIZE 25 12327c59a0d4SDon Brace char label[LABEL_SIZE]; 12337c59a0d4SDon Brace 12349975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12359975ec9dSDon Brace return; 12369975ec9dSDon Brace 12377c59a0d4SDon Brace switch (dev->devtype) { 12387c59a0d4SDon Brace case TYPE_RAID: 12397c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12407c59a0d4SDon Brace break; 12417c59a0d4SDon Brace case TYPE_ENCLOSURE: 12427c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12437c59a0d4SDon Brace break; 12447c59a0d4SDon Brace case TYPE_DISK: 1245af15ed36SDon Brace case TYPE_ZBC: 12467c59a0d4SDon Brace if (dev->external) 12477c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12487c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12497c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12507c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12517c59a0d4SDon Brace else 12527c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12537c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12547c59a0d4SDon Brace raid_label[dev->raid_level]); 12557c59a0d4SDon Brace break; 12567c59a0d4SDon Brace case TYPE_ROM: 12577c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12587c59a0d4SDon Brace break; 12597c59a0d4SDon Brace case TYPE_TAPE: 12607c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12617c59a0d4SDon Brace break; 12627c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12637c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12647c59a0d4SDon Brace break; 12657c59a0d4SDon Brace default: 12667c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12677c59a0d4SDon Brace break; 12687c59a0d4SDon Brace } 12697c59a0d4SDon Brace 12700d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12717c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12720d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12730d96ef5fSWebb Scales description, 12740d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12750d96ef5fSWebb Scales dev->vendor, 12760d96ef5fSWebb Scales dev->model, 12777c59a0d4SDon Brace label, 12780d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 1279b2582a65SDon Brace dev->offload_to_be_enabled ? '+' : '-', 12802a168208SKevin Barnett dev->expose_device); 12810d96ef5fSWebb Scales } 12820d96ef5fSWebb Scales 1283edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12848aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1285edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1286edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1287edd16368SStephen M. Cameron { 1288edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1289edd16368SStephen M. Cameron int n = h->ndevices; 1290edd16368SStephen M. Cameron int i; 1291edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1292edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1293edd16368SStephen M. Cameron 1294cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1295edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1296edd16368SStephen M. Cameron "inaccessible.\n"); 1297edd16368SStephen M. Cameron return -1; 1298edd16368SStephen M. Cameron } 1299edd16368SStephen M. Cameron 1300edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1301edd16368SStephen M. Cameron if (device->lun != -1) 1302edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1303edd16368SStephen M. Cameron goto lun_assigned; 1304edd16368SStephen M. Cameron 1305edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1306edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 13072b08b3e9SDon Brace * unit no, zero otherwise. 1308edd16368SStephen M. Cameron */ 1309edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1310edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1311edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1312edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1313edd16368SStephen M. Cameron return -1; 1314edd16368SStephen M. Cameron goto lun_assigned; 1315edd16368SStephen M. Cameron } 1316edd16368SStephen M. Cameron 1317edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1318edd16368SStephen M. Cameron * Search through our list and find the device which 13199a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1320edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1321edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1322edd16368SStephen M. Cameron */ 1323edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1324edd16368SStephen M. Cameron addr1[4] = 0; 13259a4178b7Sshane.seymour addr1[5] = 0; 1326edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1327edd16368SStephen M. Cameron sd = h->dev[i]; 1328edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1329edd16368SStephen M. Cameron addr2[4] = 0; 13309a4178b7Sshane.seymour addr2[5] = 0; 13319a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1332edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1333edd16368SStephen M. Cameron device->bus = sd->bus; 1334edd16368SStephen M. Cameron device->target = sd->target; 1335edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1336edd16368SStephen M. Cameron break; 1337edd16368SStephen M. Cameron } 1338edd16368SStephen M. Cameron } 1339edd16368SStephen M. Cameron if (device->lun == -1) { 1340edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1341edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1342edd16368SStephen M. Cameron "configuration.\n"); 1343edd16368SStephen M. Cameron return -1; 1344edd16368SStephen M. Cameron } 1345edd16368SStephen M. Cameron 1346edd16368SStephen M. Cameron lun_assigned: 1347edd16368SStephen M. Cameron 1348edd16368SStephen M. Cameron h->dev[n] = device; 1349edd16368SStephen M. Cameron h->ndevices++; 1350edd16368SStephen M. Cameron added[*nadded] = device; 1351edd16368SStephen M. Cameron (*nadded)++; 13520d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13532a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1354edd16368SStephen M. Cameron return 0; 1355edd16368SStephen M. Cameron } 1356edd16368SStephen M. Cameron 1357b2582a65SDon Brace /* 1358b2582a65SDon Brace * Called during a scan operation. 1359b2582a65SDon Brace * 1360b2582a65SDon Brace * Update an entry in h->dev[] array. 1361b2582a65SDon Brace */ 13628aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1363bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1364bd9244f7SScott Teel { 1365bd9244f7SScott Teel /* assumes h->devlock is held */ 1366bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1367bd9244f7SScott Teel 1368bd9244f7SScott Teel /* Raid level changed. */ 1369bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1370250fb125SStephen M. Cameron 1371b2582a65SDon Brace /* 1372b2582a65SDon Brace * ioacccel_handle may have changed for a dual domain disk 1373b2582a65SDon Brace */ 1374b2582a65SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1375b2582a65SDon Brace 137603383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 1377b2582a65SDon Brace if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 137803383736SDon Brace /* 137903383736SDon Brace * if drive is newly offload_enabled, we want to copy the 138003383736SDon Brace * raid map data first. If previously offload_enabled and 138103383736SDon Brace * offload_config were set, raid map data had better be 1382b2582a65SDon Brace * the same as it was before. If raid map data has changed 138303383736SDon Brace * then it had better be the case that 138403383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 138503383736SDon Brace */ 13869fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 138703383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 138803383736SDon Brace } 1389b2582a65SDon Brace if (new_entry->offload_to_be_enabled) { 1390a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1391a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1392a3144e0bSJoe Handzik } 1393a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 139403383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 139503383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 139603383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1397250fb125SStephen M. Cameron 139841ce4c35SStephen Cameron /* 139941ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 1400b2582a65SDon Brace * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 140141ce4c35SStephen Cameron * can't do that until all the devices are updated. 140241ce4c35SStephen Cameron */ 1403b2582a65SDon Brace h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1404b2582a65SDon Brace 1405b2582a65SDon Brace /* 1406b2582a65SDon Brace * turn ioaccel off immediately if told to do so. 1407b2582a65SDon Brace */ 1408b2582a65SDon Brace if (!new_entry->offload_to_be_enabled) 140941ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 141041ce4c35SStephen Cameron 14110d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1412bd9244f7SScott Teel } 1413bd9244f7SScott Teel 14142a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 14158aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 14162a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 14172a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 14182a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 14192a8ccf31SStephen M. Cameron { 14202a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1421cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 14222a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 14232a8ccf31SStephen M. Cameron (*nremoved)++; 142401350d05SStephen M. Cameron 142501350d05SStephen M. Cameron /* 142601350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 142701350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 142801350d05SStephen M. Cameron */ 142901350d05SStephen M. Cameron if (new_entry->target == -1) { 143001350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 143101350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 143201350d05SStephen M. Cameron } 143301350d05SStephen M. Cameron 14342a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 14352a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 14362a8ccf31SStephen M. Cameron (*nadded)++; 1437b2582a65SDon Brace 14380d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 14392a8ccf31SStephen M. Cameron } 14402a8ccf31SStephen M. Cameron 1441edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14428aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1443edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1444edd16368SStephen M. Cameron { 1445edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1446edd16368SStephen M. Cameron int i; 1447edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1448edd16368SStephen M. Cameron 1449cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1450edd16368SStephen M. Cameron 1451edd16368SStephen M. Cameron sd = h->dev[entry]; 1452edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1453edd16368SStephen M. Cameron (*nremoved)++; 1454edd16368SStephen M. Cameron 1455edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1456edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1457edd16368SStephen M. Cameron h->ndevices--; 14580d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1459edd16368SStephen M. Cameron } 1460edd16368SStephen M. Cameron 1461edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1462edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1463edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1464edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1465edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1466edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1467edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1468edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1469edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1470edd16368SStephen M. Cameron 1471edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1472edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1473edd16368SStephen M. Cameron { 1474edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1475edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1476edd16368SStephen M. Cameron */ 1477edd16368SStephen M. Cameron unsigned long flags; 1478edd16368SStephen M. Cameron int i, j; 1479edd16368SStephen M. Cameron 1480edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1481edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1482edd16368SStephen M. Cameron if (h->dev[i] == added) { 1483edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1484edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1485edd16368SStephen M. Cameron h->ndevices--; 1486edd16368SStephen M. Cameron break; 1487edd16368SStephen M. Cameron } 1488edd16368SStephen M. Cameron } 1489edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1490edd16368SStephen M. Cameron kfree(added); 1491edd16368SStephen M. Cameron } 1492edd16368SStephen M. Cameron 1493edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1494edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1495edd16368SStephen M. Cameron { 1496edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1497edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1498edd16368SStephen M. Cameron * to differ first 1499edd16368SStephen M. Cameron */ 1500edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1501edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1502edd16368SStephen M. Cameron return 0; 1503edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1504edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1505edd16368SStephen M. Cameron return 0; 1506edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1507edd16368SStephen M. Cameron return 0; 1508edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1509edd16368SStephen M. Cameron return 0; 1510edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1511edd16368SStephen M. Cameron return 0; 1512edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1513edd16368SStephen M. Cameron return 0; 1514edd16368SStephen M. Cameron return 1; 1515edd16368SStephen M. Cameron } 1516edd16368SStephen M. Cameron 1517bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1518bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1519bd9244f7SScott Teel { 1520bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1521bd9244f7SScott Teel * that the device is a different device, nor that the OS 1522bd9244f7SScott Teel * needs to be told anything about the change. 1523bd9244f7SScott Teel */ 1524bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1525bd9244f7SScott Teel return 1; 1526250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1527250fb125SStephen M. Cameron return 1; 1528b2582a65SDon Brace if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1529250fb125SStephen M. Cameron return 1; 153093849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 153103383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 153203383736SDon Brace return 1; 1533b2582a65SDon Brace /* 1534b2582a65SDon Brace * This can happen for dual domain devices. An active 1535b2582a65SDon Brace * path change causes the ioaccel handle to change 1536b2582a65SDon Brace * 1537b2582a65SDon Brace * for example note the handle differences between p0 and p1 1538b2582a65SDon Brace * Device WWN ,WWN hash,Handle 1539b2582a65SDon Brace * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1540b2582a65SDon Brace * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1541b2582a65SDon Brace */ 1542b2582a65SDon Brace if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1543b2582a65SDon Brace return 1; 1544bd9244f7SScott Teel return 0; 1545bd9244f7SScott Teel } 1546bd9244f7SScott Teel 1547edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1548edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1549edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1550bd9244f7SScott Teel * location in *index. 1551bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1552bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1553bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1554edd16368SStephen M. Cameron */ 1555edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1556edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1557edd16368SStephen M. Cameron int *index) 1558edd16368SStephen M. Cameron { 1559edd16368SStephen M. Cameron int i; 1560edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1561edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1562edd16368SStephen M. Cameron #define DEVICE_SAME 2 1563bd9244f7SScott Teel #define DEVICE_UPDATED 3 15641d33d85dSDon Brace if (needle == NULL) 15651d33d85dSDon Brace return DEVICE_NOT_FOUND; 15661d33d85dSDon Brace 1567edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 156823231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 156923231048SStephen M. Cameron continue; 1570edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1571edd16368SStephen M. Cameron *index = i; 1572bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1573bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1574bd9244f7SScott Teel return DEVICE_UPDATED; 1575edd16368SStephen M. Cameron return DEVICE_SAME; 1576bd9244f7SScott Teel } else { 15779846590eSStephen M. Cameron /* Keep offline devices offline */ 15789846590eSStephen M. Cameron if (needle->volume_offline) 15799846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1580edd16368SStephen M. Cameron return DEVICE_CHANGED; 1581edd16368SStephen M. Cameron } 1582edd16368SStephen M. Cameron } 1583bd9244f7SScott Teel } 1584edd16368SStephen M. Cameron *index = -1; 1585edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1586edd16368SStephen M. Cameron } 1587edd16368SStephen M. Cameron 15889846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15899846590eSStephen M. Cameron unsigned char scsi3addr[]) 15909846590eSStephen M. Cameron { 15919846590eSStephen M. Cameron struct offline_device_entry *device; 15929846590eSStephen M. Cameron unsigned long flags; 15939846590eSStephen M. Cameron 15949846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15959846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15969846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15979846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15989846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15999846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 16009846590eSStephen M. Cameron return; 16019846590eSStephen M. Cameron } 16029846590eSStephen M. Cameron } 16039846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 16049846590eSStephen M. Cameron 16059846590eSStephen M. Cameron /* Device is not on the list, add it. */ 16069846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 16077e8a9486SAmit Kushwaha if (!device) 16089846590eSStephen M. Cameron return; 16097e8a9486SAmit Kushwaha 16109846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 16119846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 16129846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 16139846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 16149846590eSStephen M. Cameron } 16159846590eSStephen M. Cameron 16169846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 16179846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 16189846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 16199846590eSStephen M. Cameron { 16209846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 16219846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16229846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 16239846590eSStephen M. Cameron h->scsi_host->host_no, 16249846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16259846590eSStephen M. Cameron switch (sd->volume_offline) { 16269846590eSStephen M. Cameron case HPSA_LV_OK: 16279846590eSStephen M. Cameron break; 16289846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 16299846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16309846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 16319846590eSStephen M. Cameron h->scsi_host->host_no, 16329846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16339846590eSStephen M. Cameron break; 16345ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 16355ca01204SScott Benesh dev_info(&h->pdev->dev, 16365ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 16375ca01204SScott Benesh h->scsi_host->host_no, 16385ca01204SScott Benesh sd->bus, sd->target, sd->lun); 16395ca01204SScott Benesh break; 16409846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 16419846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16425ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 16439846590eSStephen M. Cameron h->scsi_host->host_no, 16449846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16459846590eSStephen M. Cameron break; 16469846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16479846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16489846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16499846590eSStephen M. Cameron h->scsi_host->host_no, 16509846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16519846590eSStephen M. Cameron break; 16529846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16539846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16549846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16559846590eSStephen M. Cameron h->scsi_host->host_no, 16569846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16579846590eSStephen M. Cameron break; 16589846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16599846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16609846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16619846590eSStephen M. Cameron h->scsi_host->host_no, 16629846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16639846590eSStephen M. Cameron break; 16649846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16659846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16669846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16679846590eSStephen M. Cameron h->scsi_host->host_no, 16689846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16699846590eSStephen M. Cameron break; 16709846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16719846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16729846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16739846590eSStephen M. Cameron h->scsi_host->host_no, 16749846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16759846590eSStephen M. Cameron break; 16769846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16779846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16789846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16799846590eSStephen M. Cameron h->scsi_host->host_no, 16809846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16819846590eSStephen M. Cameron break; 16829846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16839846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16849846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16859846590eSStephen M. Cameron h->scsi_host->host_no, 16869846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16879846590eSStephen M. Cameron break; 16889846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16899846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16909846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16919846590eSStephen M. Cameron h->scsi_host->host_no, 16929846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16939846590eSStephen M. Cameron break; 16949846590eSStephen M. Cameron } 16959846590eSStephen M. Cameron } 16969846590eSStephen M. Cameron 169703383736SDon Brace /* 169803383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 169903383736SDon Brace * raid offload configured. 170003383736SDon Brace */ 170103383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 170203383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 170303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 170403383736SDon Brace { 170503383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 170603383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 170703383736SDon Brace int i, j; 170803383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 170903383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 171003383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 171103383736SDon Brace le16_to_cpu(map->layout_map_count) * 171203383736SDon Brace total_disks_per_row; 171303383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 171403383736SDon Brace total_disks_per_row; 171503383736SDon Brace int qdepth; 171603383736SDon Brace 171703383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 171803383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 171903383736SDon Brace 1720d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1721d604f533SWebb Scales 172203383736SDon Brace qdepth = 0; 172303383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 172403383736SDon Brace logical_drive->phys_disk[i] = NULL; 172503383736SDon Brace if (!logical_drive->offload_config) 172603383736SDon Brace continue; 172703383736SDon Brace for (j = 0; j < ndevices; j++) { 17281d33d85dSDon Brace if (dev[j] == NULL) 17291d33d85dSDon Brace continue; 1730ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1731ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1732af15ed36SDon Brace continue; 1733f3f01730SKevin Barnett if (is_logical_device(dev[j])) 173403383736SDon Brace continue; 173503383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 173603383736SDon Brace continue; 173703383736SDon Brace 173803383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 173903383736SDon Brace if (i < nphys_disk) 174003383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 174103383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 174203383736SDon Brace break; 174303383736SDon Brace } 174403383736SDon Brace 174503383736SDon Brace /* 174603383736SDon Brace * This can happen if a physical drive is removed and 174703383736SDon Brace * the logical drive is degraded. In that case, the RAID 174803383736SDon Brace * map data will refer to a physical disk which isn't actually 174903383736SDon Brace * present. And in that case offload_enabled should already 175003383736SDon Brace * be 0, but we'll turn it off here just in case 175103383736SDon Brace */ 175203383736SDon Brace if (!logical_drive->phys_disk[i]) { 1753b2582a65SDon Brace dev_warn(&h->pdev->dev, 1754b2582a65SDon Brace "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1755b2582a65SDon Brace __func__, 1756b2582a65SDon Brace h->scsi_host->host_no, logical_drive->bus, 1757b2582a65SDon Brace logical_drive->target, logical_drive->lun); 17583e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(logical_drive); 175941ce4c35SStephen Cameron logical_drive->queue_depth = 8; 176003383736SDon Brace } 176103383736SDon Brace } 176203383736SDon Brace if (nraid_map_entries) 176303383736SDon Brace /* 176403383736SDon Brace * This is correct for reads, too high for full stripe writes, 176503383736SDon Brace * way too high for partial stripe writes 176603383736SDon Brace */ 176703383736SDon Brace logical_drive->queue_depth = qdepth; 17682c5fc363SDon Brace else { 17692c5fc363SDon Brace if (logical_drive->external) 17702c5fc363SDon Brace logical_drive->queue_depth = EXTERNAL_QD; 177103383736SDon Brace else 177203383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 177303383736SDon Brace } 17742c5fc363SDon Brace } 177503383736SDon Brace 177603383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 177703383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 177803383736SDon Brace { 177903383736SDon Brace int i; 178003383736SDon Brace 178103383736SDon Brace for (i = 0; i < ndevices; i++) { 17821d33d85dSDon Brace if (dev[i] == NULL) 17831d33d85dSDon Brace continue; 1784ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1785ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1786af15ed36SDon Brace continue; 1787f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 178803383736SDon Brace continue; 178941ce4c35SStephen Cameron 179041ce4c35SStephen Cameron /* 179141ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 179241ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 1793b2582a65SDon Brace * because we would be changing ioaccel phsy_disk[] pointers 1794b2582a65SDon Brace * on a ioaccel volume processing I/O requests. 1795b2582a65SDon Brace * 1796b2582a65SDon Brace * If an ioaccel volume status changed, initially because it was 1797b2582a65SDon Brace * re-configured and thus underwent a transformation, or 1798b2582a65SDon Brace * a drive failed, we would have received a state change 1799b2582a65SDon Brace * request and ioaccel should have been turned off. When the 1800b2582a65SDon Brace * transformation completes, we get another state change 1801b2582a65SDon Brace * request to turn ioaccel back on. In this case, we need 1802b2582a65SDon Brace * to update the ioaccel information. 1803b2582a65SDon Brace * 1804b2582a65SDon Brace * Thus: If it is not currently enabled, but will be after 1805b2582a65SDon Brace * the scan completes, make sure the ioaccel pointers 1806b2582a65SDon Brace * are up to date. 180741ce4c35SStephen Cameron */ 180841ce4c35SStephen Cameron 1809b2582a65SDon Brace if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 181003383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 181103383736SDon Brace } 181203383736SDon Brace } 181303383736SDon Brace 1814096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1815096ccff4SKevin Barnett { 1816096ccff4SKevin Barnett int rc = 0; 1817096ccff4SKevin Barnett 1818096ccff4SKevin Barnett if (!h->scsi_host) 1819096ccff4SKevin Barnett return 1; 1820096ccff4SKevin Barnett 1821d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1822096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1823096ccff4SKevin Barnett device->target, device->lun); 1824d04e62b9SKevin Barnett else /* HBA */ 1825d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1826d04e62b9SKevin Barnett 1827096ccff4SKevin Barnett return rc; 1828096ccff4SKevin Barnett } 1829096ccff4SKevin Barnett 1830ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1831ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1832ba74fdc4SDon Brace { 1833ba74fdc4SDon Brace int i; 1834ba74fdc4SDon Brace int count = 0; 1835ba74fdc4SDon Brace 1836ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1837ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1838ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1839ba74fdc4SDon Brace 1840ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1841ba74fdc4SDon Brace dev->scsi3addr)) { 1842ba74fdc4SDon Brace unsigned long flags; 1843ba74fdc4SDon Brace 1844ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1845ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1846ba74fdc4SDon Brace ++count; 1847ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1848ba74fdc4SDon Brace } 1849ba74fdc4SDon Brace 1850ba74fdc4SDon Brace cmd_free(h, c); 1851ba74fdc4SDon Brace } 1852ba74fdc4SDon Brace 1853ba74fdc4SDon Brace return count; 1854ba74fdc4SDon Brace } 1855ba74fdc4SDon Brace 1856b443d3eaSDon Brace #define NUM_WAIT 20 1857ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1858ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1859ba74fdc4SDon Brace { 1860ba74fdc4SDon Brace int cmds = 0; 1861ba74fdc4SDon Brace int waits = 0; 1862b443d3eaSDon Brace int num_wait = NUM_WAIT; 1863b443d3eaSDon Brace 1864b443d3eaSDon Brace if (device->external) 1865b443d3eaSDon Brace num_wait = HPSA_EH_PTRAID_TIMEOUT; 1866ba74fdc4SDon Brace 1867ba74fdc4SDon Brace while (1) { 1868ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1869ba74fdc4SDon Brace if (cmds == 0) 1870ba74fdc4SDon Brace break; 1871b443d3eaSDon Brace if (++waits > num_wait) 1872ba74fdc4SDon Brace break; 18739211a07fSDon Brace msleep(1000); 18749211a07fSDon Brace } 18759211a07fSDon Brace 1876b443d3eaSDon Brace if (waits > num_wait) { 1877ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1878b443d3eaSDon Brace "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n", 1879b443d3eaSDon Brace __func__, 1880b443d3eaSDon Brace h->scsi_host->host_no, 1881b443d3eaSDon Brace device->bus, device->target, device->lun, cmds); 1882b443d3eaSDon Brace } 1883ba74fdc4SDon Brace } 1884ba74fdc4SDon Brace 1885096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1886096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1887096ccff4SKevin Barnett { 1888096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1889096ccff4SKevin Barnett 1890096ccff4SKevin Barnett if (!h->scsi_host) 1891096ccff4SKevin Barnett return; 1892096ccff4SKevin Barnett 18930ff365f5SDon Brace /* 18940ff365f5SDon Brace * Allow for commands to drain 18950ff365f5SDon Brace */ 18960ff365f5SDon Brace device->removed = 1; 18970ff365f5SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 18980ff365f5SDon Brace 1899d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1900096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1901096ccff4SKevin Barnett device->target, device->lun); 1902096ccff4SKevin Barnett if (sdev) { 1903096ccff4SKevin Barnett scsi_remove_device(sdev); 1904096ccff4SKevin Barnett scsi_device_put(sdev); 1905096ccff4SKevin Barnett } else { 1906096ccff4SKevin Barnett /* 1907096ccff4SKevin Barnett * We don't expect to get here. Future commands 1908096ccff4SKevin Barnett * to this device will get a selection timeout as 1909096ccff4SKevin Barnett * if the device were gone. 1910096ccff4SKevin Barnett */ 1911096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1912096ccff4SKevin Barnett "didn't find device for removal."); 1913096ccff4SKevin Barnett } 1914ba74fdc4SDon Brace } else { /* HBA */ 1915ba74fdc4SDon Brace 1916d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1917096ccff4SKevin Barnett } 1918ba74fdc4SDon Brace } 1919096ccff4SKevin Barnett 19208aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1921edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1922edd16368SStephen M. Cameron { 1923edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1924edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1925edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1926edd16368SStephen M. Cameron */ 1927edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1928edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1929edd16368SStephen M. Cameron unsigned long flags; 1930edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1931edd16368SStephen M. Cameron int nadded, nremoved; 1932edd16368SStephen M. Cameron 1933da03ded0SDon Brace /* 1934da03ded0SDon Brace * A reset can cause a device status to change 1935da03ded0SDon Brace * re-schedule the scan to see what happened. 1936da03ded0SDon Brace */ 1937c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 1938da03ded0SDon Brace if (h->reset_in_progress) { 1939da03ded0SDon Brace h->drv_req_rescan = 1; 1940c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1941da03ded0SDon Brace return; 1942da03ded0SDon Brace } 1943c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1944edd16368SStephen M. Cameron 19456396bb22SKees Cook added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 19466396bb22SKees Cook removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1947edd16368SStephen M. Cameron 1948edd16368SStephen M. Cameron if (!added || !removed) { 1949edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1950edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1951edd16368SStephen M. Cameron goto free_and_out; 1952edd16368SStephen M. Cameron } 1953edd16368SStephen M. Cameron 1954edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1955edd16368SStephen M. Cameron 1956edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1957edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1958edd16368SStephen M. Cameron * devices which have changed, remove the old device 1959edd16368SStephen M. Cameron * info and add the new device info. 1960bd9244f7SScott Teel * If minor device attributes change, just update 1961bd9244f7SScott Teel * the existing device structure. 1962edd16368SStephen M. Cameron */ 1963edd16368SStephen M. Cameron i = 0; 1964edd16368SStephen M. Cameron nremoved = 0; 1965edd16368SStephen M. Cameron nadded = 0; 1966edd16368SStephen M. Cameron while (i < h->ndevices) { 1967edd16368SStephen M. Cameron csd = h->dev[i]; 1968edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1969edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1970edd16368SStephen M. Cameron changes++; 19718aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1972edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1973edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1974edd16368SStephen M. Cameron changes++; 19758aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 19762a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1977c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1978c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1979c7f172dcSStephen M. Cameron */ 1980c7f172dcSStephen M. Cameron sd[entry] = NULL; 1981bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19828aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1983edd16368SStephen M. Cameron } 1984edd16368SStephen M. Cameron i++; 1985edd16368SStephen M. Cameron } 1986edd16368SStephen M. Cameron 1987edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1988edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1989edd16368SStephen M. Cameron */ 1990edd16368SStephen M. Cameron 1991edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1992edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1993edd16368SStephen M. Cameron continue; 19949846590eSStephen M. Cameron 19959846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19969846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19979846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19989846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19999846590eSStephen M. Cameron */ 20009846590eSStephen M. Cameron if (sd[i]->volume_offline) { 20019846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 20020d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 20039846590eSStephen M. Cameron continue; 20049846590eSStephen M. Cameron } 20059846590eSStephen M. Cameron 2006edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 2007edd16368SStephen M. Cameron h->ndevices, &entry); 2008edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 2009edd16368SStephen M. Cameron changes++; 20108aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 2011edd16368SStephen M. Cameron break; 2012edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 2013edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 2014edd16368SStephen M. Cameron /* should never happen... */ 2015edd16368SStephen M. Cameron changes++; 2016edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 2017edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 2018edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 2019edd16368SStephen M. Cameron } 2020edd16368SStephen M. Cameron } 202141ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 202241ce4c35SStephen Cameron 2023b2582a65SDon Brace /* 2024b2582a65SDon Brace * Now that h->dev[]->phys_disk[] is coherent, we can enable 202541ce4c35SStephen Cameron * any logical drives that need it enabled. 2026b2582a65SDon Brace * 2027b2582a65SDon Brace * The raid map should be current by now. 2028b2582a65SDon Brace * 2029b2582a65SDon Brace * We are updating the device list used for I/O requests. 203041ce4c35SStephen Cameron */ 20311d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 20321d33d85dSDon Brace if (h->dev[i] == NULL) 20331d33d85dSDon Brace continue; 203441ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 20351d33d85dSDon Brace } 203641ce4c35SStephen Cameron 2037edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2038edd16368SStephen M. Cameron 20399846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 20409846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 20419846590eSStephen M. Cameron * so don't touch h->dev[] 20429846590eSStephen M. Cameron */ 20439846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 20449846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 20459846590eSStephen M. Cameron continue; 20469846590eSStephen M. Cameron if (sd[i]->volume_offline) 20479846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 20489846590eSStephen M. Cameron } 20499846590eSStephen M. Cameron 2050edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 2051edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 2052edd16368SStephen M. Cameron * first time through. 2053edd16368SStephen M. Cameron */ 20548aa60681SDon Brace if (!changes) 2055edd16368SStephen M. Cameron goto free_and_out; 2056edd16368SStephen M. Cameron 2057edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 2058edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 20591d33d85dSDon Brace if (removed[i] == NULL) 20601d33d85dSDon Brace continue; 2061096ccff4SKevin Barnett if (removed[i]->expose_device) 2062096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 2063edd16368SStephen M. Cameron kfree(removed[i]); 2064edd16368SStephen M. Cameron removed[i] = NULL; 2065edd16368SStephen M. Cameron } 2066edd16368SStephen M. Cameron 2067edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 2068edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 2069096ccff4SKevin Barnett int rc = 0; 2070096ccff4SKevin Barnett 20711d33d85dSDon Brace if (added[i] == NULL) 207241ce4c35SStephen Cameron continue; 20732a168208SKevin Barnett if (!(added[i]->expose_device)) 2074edd16368SStephen M. Cameron continue; 2075096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 2076096ccff4SKevin Barnett if (!rc) 2077edd16368SStephen M. Cameron continue; 2078096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 2079096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 2080edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 2081edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 2082edd16368SStephen M. Cameron */ 2083edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 2084853633e8SDon Brace h->drv_req_rescan = 1; 2085edd16368SStephen M. Cameron } 2086edd16368SStephen M. Cameron 2087edd16368SStephen M. Cameron free_and_out: 2088edd16368SStephen M. Cameron kfree(added); 2089edd16368SStephen M. Cameron kfree(removed); 2090edd16368SStephen M. Cameron } 2091edd16368SStephen M. Cameron 2092edd16368SStephen M. Cameron /* 20939e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2094edd16368SStephen M. Cameron * Assume's h->devlock is held. 2095edd16368SStephen M. Cameron */ 2096edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2097edd16368SStephen M. Cameron int bus, int target, int lun) 2098edd16368SStephen M. Cameron { 2099edd16368SStephen M. Cameron int i; 2100edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2101edd16368SStephen M. Cameron 2102edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2103edd16368SStephen M. Cameron sd = h->dev[i]; 2104edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2105edd16368SStephen M. Cameron return sd; 2106edd16368SStephen M. Cameron } 2107edd16368SStephen M. Cameron return NULL; 2108edd16368SStephen M. Cameron } 2109edd16368SStephen M. Cameron 2110edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2111edd16368SStephen M. Cameron { 21127630b3a5SHannes Reinecke struct hpsa_scsi_dev_t *sd = NULL; 2113edd16368SStephen M. Cameron unsigned long flags; 2114edd16368SStephen M. Cameron struct ctlr_info *h; 2115edd16368SStephen M. Cameron 2116edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2117edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2118d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2119d04e62b9SKevin Barnett struct scsi_target *starget; 2120d04e62b9SKevin Barnett struct sas_rphy *rphy; 2121d04e62b9SKevin Barnett 2122d04e62b9SKevin Barnett starget = scsi_target(sdev); 2123d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2124d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2125d04e62b9SKevin Barnett if (sd) { 2126d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2127d04e62b9SKevin Barnett sd->lun = sdev->lun; 2128d04e62b9SKevin Barnett } 21297630b3a5SHannes Reinecke } 21307630b3a5SHannes Reinecke if (!sd) 2131edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2132edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2133d04e62b9SKevin Barnett 2134d04e62b9SKevin Barnett if (sd && sd->expose_device) { 213503383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2136d04e62b9SKevin Barnett sdev->hostdata = sd; 213741ce4c35SStephen Cameron } else 213841ce4c35SStephen Cameron sdev->hostdata = NULL; 2139edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2140edd16368SStephen M. Cameron return 0; 2141edd16368SStephen M. Cameron } 2142edd16368SStephen M. Cameron 214341ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 214430bda784SDon Brace #define CTLR_TIMEOUT (120 * HZ) 214541ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 214641ce4c35SStephen Cameron { 214741ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 214841ce4c35SStephen Cameron int queue_depth; 214941ce4c35SStephen Cameron 215041ce4c35SStephen Cameron sd = sdev->hostdata; 21512a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 215241ce4c35SStephen Cameron 21535086435eSDon Brace if (sd) { 21549e33f0d5SDon Brace sd->was_removed = 0; 21555759ff11SDon Brace queue_depth = sd->queue_depth != 0 ? 21565759ff11SDon Brace sd->queue_depth : sdev->host->can_queue; 2157b443d3eaSDon Brace if (sd->external) { 21585086435eSDon Brace queue_depth = EXTERNAL_QD; 2159b443d3eaSDon Brace sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT; 2160b443d3eaSDon Brace blk_queue_rq_timeout(sdev->request_queue, 2161b443d3eaSDon Brace HPSA_EH_PTRAID_TIMEOUT); 21625759ff11SDon Brace } 21635759ff11SDon Brace if (is_hba_lunid(sd->scsi3addr)) { 216430bda784SDon Brace sdev->eh_timeout = CTLR_TIMEOUT; 216530bda784SDon Brace blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT); 2166b443d3eaSDon Brace } 21675759ff11SDon Brace } else { 216841ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 21695759ff11SDon Brace } 217041ce4c35SStephen Cameron 217141ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 217241ce4c35SStephen Cameron 217341ce4c35SStephen Cameron return 0; 217441ce4c35SStephen Cameron } 217541ce4c35SStephen Cameron 2176edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2177edd16368SStephen M. Cameron { 21789e33f0d5SDon Brace struct hpsa_scsi_dev_t *hdev = NULL; 21799e33f0d5SDon Brace 21809e33f0d5SDon Brace hdev = sdev->hostdata; 21819e33f0d5SDon Brace 21829e33f0d5SDon Brace if (hdev) 21839e33f0d5SDon Brace hdev->was_removed = 1; 2184edd16368SStephen M. Cameron } 2185edd16368SStephen M. Cameron 2186d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2187d9a729f3SWebb Scales { 2188d9a729f3SWebb Scales int i; 2189d9a729f3SWebb Scales 2190d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2191d9a729f3SWebb Scales return; 2192d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2193d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2194d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2195d9a729f3SWebb Scales } 2196d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2197d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2198d9a729f3SWebb Scales } 2199d9a729f3SWebb Scales 2200d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2201d9a729f3SWebb Scales { 2202d9a729f3SWebb Scales int i; 2203d9a729f3SWebb Scales 2204d9a729f3SWebb Scales if (h->chainsize <= 0) 2205d9a729f3SWebb Scales return 0; 2206d9a729f3SWebb Scales 2207d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 22086396bb22SKees Cook kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2209d9a729f3SWebb Scales GFP_KERNEL); 2210d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2211d9a729f3SWebb Scales return -ENOMEM; 2212d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2213d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 22146da2ec56SKees Cook kmalloc_array(h->maxsgentries, 22156da2ec56SKees Cook sizeof(*h->ioaccel2_cmd_sg_list[i]), 22166da2ec56SKees Cook GFP_KERNEL); 2217d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2218d9a729f3SWebb Scales goto clean; 2219d9a729f3SWebb Scales } 2220d9a729f3SWebb Scales return 0; 2221d9a729f3SWebb Scales 2222d9a729f3SWebb Scales clean: 2223d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2224d9a729f3SWebb Scales return -ENOMEM; 2225d9a729f3SWebb Scales } 2226d9a729f3SWebb Scales 222733a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 222833a2ffceSStephen M. Cameron { 222933a2ffceSStephen M. Cameron int i; 223033a2ffceSStephen M. Cameron 223133a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 223233a2ffceSStephen M. Cameron return; 223333a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 223433a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 223533a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 223633a2ffceSStephen M. Cameron } 223733a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 223833a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 223933a2ffceSStephen M. Cameron } 224033a2ffceSStephen M. Cameron 2241105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 224233a2ffceSStephen M. Cameron { 224333a2ffceSStephen M. Cameron int i; 224433a2ffceSStephen M. Cameron 224533a2ffceSStephen M. Cameron if (h->chainsize <= 0) 224633a2ffceSStephen M. Cameron return 0; 224733a2ffceSStephen M. Cameron 22486396bb22SKees Cook h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 224933a2ffceSStephen M. Cameron GFP_KERNEL); 22507e8a9486SAmit Kushwaha if (!h->cmd_sg_list) 225133a2ffceSStephen M. Cameron return -ENOMEM; 22527e8a9486SAmit Kushwaha 225333a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 22546da2ec56SKees Cook h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 22556da2ec56SKees Cook sizeof(*h->cmd_sg_list[i]), 22566da2ec56SKees Cook GFP_KERNEL); 22577e8a9486SAmit Kushwaha if (!h->cmd_sg_list[i]) 225833a2ffceSStephen M. Cameron goto clean; 22597e8a9486SAmit Kushwaha 22603d4e6af8SRobert Elliott } 226133a2ffceSStephen M. Cameron return 0; 226233a2ffceSStephen M. Cameron 226333a2ffceSStephen M. Cameron clean: 226433a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 226533a2ffceSStephen M. Cameron return -ENOMEM; 226633a2ffceSStephen M. Cameron } 226733a2ffceSStephen M. Cameron 2268d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2269d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2270d9a729f3SWebb Scales { 2271d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2272d9a729f3SWebb Scales u64 temp64; 2273d9a729f3SWebb Scales u32 chain_size; 2274d9a729f3SWebb Scales 2275d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2276a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 22778bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 22788bc8f47eSChristoph Hellwig DMA_TO_DEVICE); 2279d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2280d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2281d9a729f3SWebb Scales cp->sg->address = 0; 2282d9a729f3SWebb Scales return -1; 2283d9a729f3SWebb Scales } 2284d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2285d9a729f3SWebb Scales return 0; 2286d9a729f3SWebb Scales } 2287d9a729f3SWebb Scales 2288d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2289d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2290d9a729f3SWebb Scales { 2291d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2292d9a729f3SWebb Scales u64 temp64; 2293d9a729f3SWebb Scales u32 chain_size; 2294d9a729f3SWebb Scales 2295d9a729f3SWebb Scales chain_sg = cp->sg; 2296d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2297a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 22988bc8f47eSChristoph Hellwig dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2299d9a729f3SWebb Scales } 2300d9a729f3SWebb Scales 2301e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 230233a2ffceSStephen M. Cameron struct CommandList *c) 230333a2ffceSStephen M. Cameron { 230433a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 230533a2ffceSStephen M. Cameron u64 temp64; 230650a0decfSStephen M. Cameron u32 chain_len; 230733a2ffceSStephen M. Cameron 230833a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 230933a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 231050a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 231150a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 23122b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 231350a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 23148bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 23158bc8f47eSChristoph Hellwig DMA_TO_DEVICE); 2316e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2317e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 231850a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2319e2bea6dfSStephen M. Cameron return -1; 2320e2bea6dfSStephen M. Cameron } 232150a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2322e2bea6dfSStephen M. Cameron return 0; 232333a2ffceSStephen M. Cameron } 232433a2ffceSStephen M. Cameron 232533a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 232633a2ffceSStephen M. Cameron struct CommandList *c) 232733a2ffceSStephen M. Cameron { 232833a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 232933a2ffceSStephen M. Cameron 233050a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 233133a2ffceSStephen M. Cameron return; 233233a2ffceSStephen M. Cameron 233333a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 23348bc8f47eSChristoph Hellwig dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 23358bc8f47eSChristoph Hellwig le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 233633a2ffceSStephen M. Cameron } 233733a2ffceSStephen M. Cameron 2338a09c1441SScott Teel 2339a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2340a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2341a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2342a09c1441SScott Teel */ 2343a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2344c349775eSScott Teel struct CommandList *c, 2345c349775eSScott Teel struct scsi_cmnd *cmd, 2346ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2347ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2348c349775eSScott Teel { 2349c349775eSScott Teel int data_len; 2350a09c1441SScott Teel int retry = 0; 2351c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2352c349775eSScott Teel 2353c349775eSScott Teel switch (c2->error_data.serv_response) { 2354c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2355c349775eSScott Teel switch (c2->error_data.status) { 2356c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2357eeebce18SDon Brace if (cmd) 2358eeebce18SDon Brace cmd->result = 0; 2359c349775eSScott Teel break; 2360c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2361ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2362c349775eSScott Teel if (c2->error_data.data_present != 2363ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2364ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2365ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2366c349775eSScott Teel break; 2367ee6b1889SStephen M. Cameron } 2368c349775eSScott Teel /* copy the sense data */ 2369c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2370c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2371c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2372c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2373c349775eSScott Teel data_len = 2374c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2375c349775eSScott Teel memcpy(cmd->sense_buffer, 2376c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2377a09c1441SScott Teel retry = 1; 2378c349775eSScott Teel break; 2379c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2380a09c1441SScott Teel retry = 1; 2381c349775eSScott Teel break; 2382c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2383a09c1441SScott Teel retry = 1; 2384c349775eSScott Teel break; 2385c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 23864a8da22bSStephen Cameron retry = 1; 2387c349775eSScott Teel break; 2388c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2389a09c1441SScott Teel retry = 1; 2390c349775eSScott Teel break; 2391c349775eSScott Teel default: 2392a09c1441SScott Teel retry = 1; 2393c349775eSScott Teel break; 2394c349775eSScott Teel } 2395c349775eSScott Teel break; 2396c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2397c40820d5SJoe Handzik switch (c2->error_data.status) { 2398c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2399c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2400c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2401c40820d5SJoe Handzik retry = 1; 2402c40820d5SJoe Handzik break; 2403c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2404c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2405c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2406c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2407c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2408c40820d5SJoe Handzik break; 2409c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2410c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2411c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2412ba74fdc4SDon Brace /* 2413ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2414ba74fdc4SDon Brace * get a state change event from the controller but 2415ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2416ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2417ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2418ba74fdc4SDon Brace * of the disk to get the same device node. 2419ba74fdc4SDon Brace */ 2420ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2421ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2422ba74fdc4SDon Brace dev->removed = 1; 2423ba74fdc4SDon Brace h->drv_req_rescan = 1; 2424ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2425ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2426ba74fdc4SDon Brace } else 2427ba74fdc4SDon Brace /* 2428ba74fdc4SDon Brace * Retry by sending down the RAID path. 2429ba74fdc4SDon Brace * We will get an event from ctlr to 2430ba74fdc4SDon Brace * trigger rescan regardless. 2431ba74fdc4SDon Brace */ 2432c40820d5SJoe Handzik retry = 1; 2433c40820d5SJoe Handzik break; 2434c40820d5SJoe Handzik default: 2435c40820d5SJoe Handzik retry = 1; 2436c40820d5SJoe Handzik } 2437c349775eSScott Teel break; 2438c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2439c349775eSScott Teel break; 2440c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2441c349775eSScott Teel break; 2442c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2443a09c1441SScott Teel retry = 1; 2444c349775eSScott Teel break; 2445c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2446c349775eSScott Teel break; 2447c349775eSScott Teel default: 2448a09c1441SScott Teel retry = 1; 2449c349775eSScott Teel break; 2450c349775eSScott Teel } 2451a09c1441SScott Teel 2452c5dfd106SDon Brace if (dev->in_reset) 2453c5dfd106SDon Brace retry = 0; 2454c5dfd106SDon Brace 2455a09c1441SScott Teel return retry; /* retry on raid path? */ 2456c349775eSScott Teel } 2457c349775eSScott Teel 2458a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2459a58e7e53SWebb Scales struct CommandList *c) 2460a58e7e53SWebb Scales { 2461c5dfd106SDon Brace struct hpsa_scsi_dev_t *dev = c->device; 2462d604f533SWebb Scales 2463a58e7e53SWebb Scales /* 246408ec46f6SDon Brace * Reset c->scsi_cmd here so that the reset handler will know 2465d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2466a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2467a58e7e53SWebb Scales */ 2468a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2469d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2470c5dfd106SDon Brace if (dev) { 2471c5dfd106SDon Brace atomic_dec(&dev->commands_outstanding); 2472c5dfd106SDon Brace if (dev->in_reset && 2473c5dfd106SDon Brace atomic_read(&dev->commands_outstanding) <= 0) 2474d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2475a58e7e53SWebb Scales } 2476c5dfd106SDon Brace } 2477a58e7e53SWebb Scales 247873153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 247973153fe5SWebb Scales struct CommandList *c) 248073153fe5SWebb Scales { 248173153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 248273153fe5SWebb Scales cmd_tagged_free(h, c); 248373153fe5SWebb Scales } 248473153fe5SWebb Scales 24858a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24868a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24878a0ff92cSWebb Scales { 248873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 248982f01edcSBart Van Assche if (cmd) 249082f01edcSBart Van Assche scsi_done(cmd); 24918a0ff92cSWebb Scales } 24928a0ff92cSWebb Scales 24938a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24948a0ff92cSWebb Scales { 24958a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24968a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24978a0ff92cSWebb Scales } 24988a0ff92cSWebb Scales 2499c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2500c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2501c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2502c349775eSScott Teel { 2503c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2504c349775eSScott Teel 2505c349775eSScott Teel /* check for good status */ 2506c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 2507eeebce18SDon Brace c2->error_data.status == 0)) { 2508eeebce18SDon Brace cmd->result = 0; 25098a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2510eeebce18SDon Brace } 2511c349775eSScott Teel 25128a0ff92cSWebb Scales /* 25138a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2514b2582a65SDon Brace * the normal I/O path so the controller can handle whatever is 2515c349775eSScott Teel * wrong. 2516c349775eSScott Teel */ 2517f3f01730SKevin Barnett if (is_logical_device(dev) && 2518c349775eSScott Teel c2->error_data.serv_response == 2519c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2520080ef1ccSDon Brace if (c2->error_data.status == 2521064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 25223e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 2523064d1b1dSDon Brace } 25248a0ff92cSWebb Scales 2525c5dfd106SDon Brace if (dev->in_reset) { 2526c5dfd106SDon Brace cmd->result = DID_RESET << 16; 2527c5dfd106SDon Brace return hpsa_cmd_free_and_done(h, c, cmd); 2528c5dfd106SDon Brace } 2529c5dfd106SDon Brace 25308a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2531080ef1ccSDon Brace } 2532080ef1ccSDon Brace 2533ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 25348a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2535080ef1ccSDon Brace 25368a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2537c349775eSScott Teel } 2538c349775eSScott Teel 25399437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 25409437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 25419437ac43SStephen Cameron struct CommandList *cp) 25429437ac43SStephen Cameron { 25439437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 25449437ac43SStephen Cameron 25459437ac43SStephen Cameron switch (tmf_status) { 25469437ac43SStephen Cameron case CISS_TMF_COMPLETE: 25479437ac43SStephen Cameron /* 25489437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 25499437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 25509437ac43SStephen Cameron */ 25519437ac43SStephen Cameron case CISS_TMF_SUCCESS: 25529437ac43SStephen Cameron return 0; 25539437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 25549437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 25559437ac43SStephen Cameron case CISS_TMF_FAILED: 25569437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 25579437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 25589437ac43SStephen Cameron break; 25599437ac43SStephen Cameron default: 25609437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 25619437ac43SStephen Cameron tmf_status); 25629437ac43SStephen Cameron break; 25639437ac43SStephen Cameron } 25649437ac43SStephen Cameron return -tmf_status; 25659437ac43SStephen Cameron } 25669437ac43SStephen Cameron 25671fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2568edd16368SStephen M. Cameron { 2569edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2570edd16368SStephen M. Cameron struct ctlr_info *h; 2571edd16368SStephen M. Cameron struct ErrorInfo *ei; 2572283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2573d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2574edd16368SStephen M. Cameron 25759437ac43SStephen Cameron u8 sense_key; 25769437ac43SStephen Cameron u8 asc; /* additional sense code */ 25779437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2578db111e18SStephen M. Cameron unsigned long sense_data_size; 2579edd16368SStephen M. Cameron 2580edd16368SStephen M. Cameron ei = cp->err_info; 25817fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2582edd16368SStephen M. Cameron h = cp->h; 2583d49c2077SDon Brace 2584d49c2077SDon Brace if (!cmd->device) { 2585d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2586d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2587d49c2077SDon Brace } 2588d49c2077SDon Brace 2589283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 259045e596cdSDon Brace if (!dev) { 259145e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 259245e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 259345e596cdSDon Brace } 2594d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2595edd16368SStephen M. Cameron 2596edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2597e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25982b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 259933a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2600edd16368SStephen M. Cameron 2601d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2602d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2603d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2604d9a729f3SWebb Scales 2605edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2606c349775eSScott Teel 26079e33f0d5SDon Brace /* SCSI command has already been cleaned up in SML */ 26089e33f0d5SDon Brace if (dev->was_removed) { 26099e33f0d5SDon Brace hpsa_cmd_resolve_and_free(h, cp); 26109e33f0d5SDon Brace return; 26119e33f0d5SDon Brace } 26129e33f0d5SDon Brace 2613d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2614d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2615d49c2077SDon Brace dev->removed) { 2616d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2617d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2618d49c2077SDon Brace } 2619d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 262003383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2621d49c2077SDon Brace } 262203383736SDon Brace 262325163bd5SWebb Scales /* 262425163bd5SWebb Scales * We check for lockup status here as it may be set for 262525163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 262625163bd5SWebb Scales * fail_all_oustanding_cmds() 262725163bd5SWebb Scales */ 262825163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 262925163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 263025163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 26318a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 263225163bd5SWebb Scales } 263325163bd5SWebb Scales 2634c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2635c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2636c349775eSScott Teel 26376aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 26388a0ff92cSWebb Scales if (ei->CommandStatus == 0) 26398a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 26406aa4c361SRobert Elliott 2641e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2642e1f7de0cSMatt Gates * CISS header used below for error handling. 2643e1f7de0cSMatt Gates */ 2644e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2645e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 26462b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 26472b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 26482b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 26492b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 265050a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2651e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2652e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2653283b4a9bSStephen M. Cameron 2654283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2655283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2656283b4a9bSStephen M. Cameron * wrong. 2657283b4a9bSStephen M. Cameron */ 2658f3f01730SKevin Barnett if (is_logical_device(dev)) { 2659283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2660283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 26618a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2662283b4a9bSStephen M. Cameron } 2663e1f7de0cSMatt Gates } 2664e1f7de0cSMatt Gates 2665edd16368SStephen M. Cameron /* an error has occurred */ 2666edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2667edd16368SStephen M. Cameron 2668edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 26699437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 26709437ac43SStephen Cameron /* copy the sense data */ 26719437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 26729437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 26739437ac43SStephen Cameron else 26749437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26759437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26769437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26779437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26789437ac43SStephen Cameron if (ei->ScsiStatus) 26799437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26809437ac43SStephen Cameron &sense_key, &asc, &ascq); 2681edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 268249ea45cbSDon Brace switch (sense_key) { 268349ea45cbSDon Brace case ABORTED_COMMAND: 26842e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26851d3b3609SMatt Gates break; 268649ea45cbSDon Brace case UNIT_ATTENTION: 268749ea45cbSDon Brace if (asc == 0x3F && ascq == 0x0E) 268849ea45cbSDon Brace h->drv_req_rescan = 1; 268949ea45cbSDon Brace break; 269049ea45cbSDon Brace case ILLEGAL_REQUEST: 269149ea45cbSDon Brace if (asc == 0x25 && ascq == 0x00) { 269249ea45cbSDon Brace dev->removed = 1; 269349ea45cbSDon Brace cmd->result = DID_NO_CONNECT << 16; 269449ea45cbSDon Brace } 269549ea45cbSDon Brace break; 26961d3b3609SMatt Gates } 2697edd16368SStephen M. Cameron break; 2698edd16368SStephen M. Cameron } 2699edd16368SStephen M. Cameron /* Problem was not a check condition 2700edd16368SStephen M. Cameron * Pass it up to the upper layers... 2701edd16368SStephen M. Cameron */ 2702edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2703edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2704edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2705edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2706edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2707edd16368SStephen M. Cameron sense_key, asc, ascq, 2708edd16368SStephen M. Cameron cmd->result); 2709edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2710edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2711edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2712edd16368SStephen M. Cameron 2713edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2714edd16368SStephen M. Cameron * but there is a bug in some released firmware 2715edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2716edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2717edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2718edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2719edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2720edd16368SStephen M. Cameron * look like selection timeout since that is 2721edd16368SStephen M. Cameron * the most common reason for this to occur, 2722edd16368SStephen M. Cameron * and it's severe enough. 2723edd16368SStephen M. Cameron */ 2724edd16368SStephen M. Cameron 2725edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2726edd16368SStephen M. Cameron } 2727edd16368SStephen M. Cameron break; 2728edd16368SStephen M. Cameron 2729edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2730edd16368SStephen M. Cameron break; 2731edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2732f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2733f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2734edd16368SStephen M. Cameron break; 2735edd16368SStephen M. Cameron case CMD_INVALID: { 2736edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2737edd16368SStephen M. Cameron print_cmd(cp); */ 2738edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2739edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2740edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2741edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2742edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2743edd16368SStephen M. Cameron * missing target. */ 2744edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2745edd16368SStephen M. Cameron } 2746edd16368SStephen M. Cameron break; 2747edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2748256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2749f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2750f42e81e1SStephen Cameron cp->Request.CDB); 2751edd16368SStephen M. Cameron break; 2752edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2753edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2754f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2755f42e81e1SStephen Cameron cp->Request.CDB); 2756edd16368SStephen M. Cameron break; 2757edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2758edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2759f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2760f42e81e1SStephen Cameron cp->Request.CDB); 2761edd16368SStephen M. Cameron break; 2762edd16368SStephen M. Cameron case CMD_ABORTED: 276308ec46f6SDon Brace cmd->result = DID_ABORT << 16; 276408ec46f6SDon Brace break; 2765edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2766edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2767f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2768f42e81e1SStephen Cameron cp->Request.CDB); 2769edd16368SStephen M. Cameron break; 2770edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2771f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2772f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2773f42e81e1SStephen Cameron cp->Request.CDB); 2774edd16368SStephen M. Cameron break; 2775edd16368SStephen M. Cameron case CMD_TIMEOUT: 2776edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2777f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2778f42e81e1SStephen Cameron cp->Request.CDB); 2779edd16368SStephen M. Cameron break; 27801d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 27811d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 27821d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 27831d5e2ed0SStephen M. Cameron break; 27849437ac43SStephen Cameron case CMD_TMF_STATUS: 27859437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27869437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27879437ac43SStephen Cameron break; 2788283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2789283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2790283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2791283b4a9bSStephen M. Cameron */ 2792283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2793283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2794283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2795283b4a9bSStephen M. Cameron break; 2796edd16368SStephen M. Cameron default: 2797edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2798edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2799edd16368SStephen M. Cameron cp, ei->CommandStatus); 2800edd16368SStephen M. Cameron } 28018a0ff92cSWebb Scales 28028a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2803edd16368SStephen M. Cameron } 2804edd16368SStephen M. Cameron 28058bc8f47eSChristoph Hellwig static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 28068bc8f47eSChristoph Hellwig int sg_used, enum dma_data_direction data_direction) 2807edd16368SStephen M. Cameron { 2808edd16368SStephen M. Cameron int i; 2809edd16368SStephen M. Cameron 281050a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 28118bc8f47eSChristoph Hellwig dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 281250a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2813edd16368SStephen M. Cameron data_direction); 2814edd16368SStephen M. Cameron } 2815edd16368SStephen M. Cameron 2816a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2817edd16368SStephen M. Cameron struct CommandList *cp, 2818edd16368SStephen M. Cameron unsigned char *buf, 2819edd16368SStephen M. Cameron size_t buflen, 28208bc8f47eSChristoph Hellwig enum dma_data_direction data_direction) 2821edd16368SStephen M. Cameron { 282201a02ffcSStephen M. Cameron u64 addr64; 2823edd16368SStephen M. Cameron 28248bc8f47eSChristoph Hellwig if (buflen == 0 || data_direction == DMA_NONE) { 2825edd16368SStephen M. Cameron cp->Header.SGList = 0; 282650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2827a2dac136SStephen M. Cameron return 0; 2828edd16368SStephen M. Cameron } 2829edd16368SStephen M. Cameron 28308bc8f47eSChristoph Hellwig addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2831eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2832a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2833eceaae18SShuah Khan cp->Header.SGList = 0; 283450a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2835a2dac136SStephen M. Cameron return -1; 2836eceaae18SShuah Khan } 283750a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 283850a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 283950a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 284050a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 284150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2842a2dac136SStephen M. Cameron return 0; 2843edd16368SStephen M. Cameron } 2844edd16368SStephen M. Cameron 284525163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 284625163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 284725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 284825163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2849edd16368SStephen M. Cameron { 2850edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2851edd16368SStephen M. Cameron 2852edd16368SStephen M. Cameron c->waiting = &wait; 285325163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 285425163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 285525163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 285625163bd5SWebb Scales wait_for_completion_io(&wait); 285725163bd5SWebb Scales return IO_OK; 285825163bd5SWebb Scales } 285925163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 286025163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 286125163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 286225163bd5SWebb Scales return -ETIMEDOUT; 286325163bd5SWebb Scales } 286425163bd5SWebb Scales return IO_OK; 286525163bd5SWebb Scales } 286625163bd5SWebb Scales 286725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 286825163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 286925163bd5SWebb Scales { 287025163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 287125163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 287225163bd5SWebb Scales return IO_OK; 287325163bd5SWebb Scales } 287425163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2875edd16368SStephen M. Cameron } 2876edd16368SStephen M. Cameron 2877094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2878094963daSStephen M. Cameron { 2879094963daSStephen M. Cameron int cpu; 2880094963daSStephen M. Cameron u32 rc, *lockup_detected; 2881094963daSStephen M. Cameron 2882094963daSStephen M. Cameron cpu = get_cpu(); 2883094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2884094963daSStephen M. Cameron rc = *lockup_detected; 2885094963daSStephen M. Cameron put_cpu(); 2886094963daSStephen M. Cameron return rc; 2887094963daSStephen M. Cameron } 2888094963daSStephen M. Cameron 28899c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 289025163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 28918bc8f47eSChristoph Hellwig struct CommandList *c, enum dma_data_direction data_direction, 28928bc8f47eSChristoph Hellwig unsigned long timeout_msecs) 2893edd16368SStephen M. Cameron { 28949c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 289525163bd5SWebb Scales int rc; 2896edd16368SStephen M. Cameron 2897edd16368SStephen M. Cameron do { 28987630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 289925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 290025163bd5SWebb Scales timeout_msecs); 290125163bd5SWebb Scales if (rc) 290225163bd5SWebb Scales break; 2903edd16368SStephen M. Cameron retry_count++; 29049c2fc160SStephen M. Cameron if (retry_count > 3) { 29059c2fc160SStephen M. Cameron msleep(backoff_time); 29069c2fc160SStephen M. Cameron if (backoff_time < 1000) 29079c2fc160SStephen M. Cameron backoff_time *= 2; 29089c2fc160SStephen M. Cameron } 2909852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 29109c2fc160SStephen M. Cameron check_for_busy(h, c)) && 29119c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2912edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 291325163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 291425163bd5SWebb Scales rc = -EIO; 291525163bd5SWebb Scales return rc; 2916edd16368SStephen M. Cameron } 2917edd16368SStephen M. Cameron 2918d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2919d1e8beacSStephen M. Cameron struct CommandList *c) 2920edd16368SStephen M. Cameron { 2921d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2922d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2923edd16368SStephen M. Cameron 2924609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2925609a70dfSRasmus Villemoes txt, lun, cdb); 2926d1e8beacSStephen M. Cameron } 2927d1e8beacSStephen M. Cameron 2928d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2929d1e8beacSStephen M. Cameron struct CommandList *cp) 2930d1e8beacSStephen M. Cameron { 2931d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2932d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 29339437ac43SStephen Cameron u8 sense_key, asc, ascq; 29349437ac43SStephen Cameron int sense_len; 2935d1e8beacSStephen M. Cameron 2936edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2937edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 29389437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 29399437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 29409437ac43SStephen Cameron else 29419437ac43SStephen Cameron sense_len = ei->SenseLen; 29429437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 29439437ac43SStephen Cameron &sense_key, &asc, &ascq); 2944d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2945d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 29469437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 29479437ac43SStephen Cameron sense_key, asc, ascq); 2948d1e8beacSStephen M. Cameron else 29499437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2950edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2951edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2952edd16368SStephen M. Cameron "(probably indicates selection timeout " 2953edd16368SStephen M. Cameron "reported incorrectly due to a known " 2954edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2955edd16368SStephen M. Cameron break; 2956edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2957edd16368SStephen M. Cameron break; 2958edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2959d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2960edd16368SStephen M. Cameron break; 2961edd16368SStephen M. Cameron case CMD_INVALID: { 2962edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2963edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2964edd16368SStephen M. Cameron */ 2965d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2966d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2967edd16368SStephen M. Cameron } 2968edd16368SStephen M. Cameron break; 2969edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2970d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2971edd16368SStephen M. Cameron break; 2972edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2973d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2974edd16368SStephen M. Cameron break; 2975edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2976d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2977edd16368SStephen M. Cameron break; 2978edd16368SStephen M. Cameron case CMD_ABORTED: 2979d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2980edd16368SStephen M. Cameron break; 2981edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2982d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2983edd16368SStephen M. Cameron break; 2984edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2985d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2986edd16368SStephen M. Cameron break; 2987edd16368SStephen M. Cameron case CMD_TIMEOUT: 2988d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2989edd16368SStephen M. Cameron break; 29901d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2991d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29921d5e2ed0SStephen M. Cameron break; 299325163bd5SWebb Scales case CMD_CTLR_LOCKUP: 299425163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 299525163bd5SWebb Scales break; 2996edd16368SStephen M. Cameron default: 2997d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2998d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2999edd16368SStephen M. Cameron ei->CommandStatus); 3000edd16368SStephen M. Cameron } 3001edd16368SStephen M. Cameron } 3002edd16368SStephen M. Cameron 30030a7c3bb8SDon Brace static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 30040a7c3bb8SDon Brace u8 page, u8 *buf, size_t bufsize) 30050a7c3bb8SDon Brace { 30060a7c3bb8SDon Brace int rc = IO_OK; 30070a7c3bb8SDon Brace struct CommandList *c; 30080a7c3bb8SDon Brace struct ErrorInfo *ei; 30090a7c3bb8SDon Brace 30100a7c3bb8SDon Brace c = cmd_alloc(h); 30110a7c3bb8SDon Brace if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 30120a7c3bb8SDon Brace page, scsi3addr, TYPE_CMD)) { 30130a7c3bb8SDon Brace rc = -1; 30140a7c3bb8SDon Brace goto out; 30150a7c3bb8SDon Brace } 30168bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 30178bc8f47eSChristoph Hellwig NO_TIMEOUT); 30180a7c3bb8SDon Brace if (rc) 30190a7c3bb8SDon Brace goto out; 30200a7c3bb8SDon Brace ei = c->err_info; 30210a7c3bb8SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 30220a7c3bb8SDon Brace hpsa_scsi_interpret_error(h, c); 30230a7c3bb8SDon Brace rc = -1; 30240a7c3bb8SDon Brace } 30250a7c3bb8SDon Brace out: 30260a7c3bb8SDon Brace cmd_free(h, c); 30270a7c3bb8SDon Brace return rc; 30280a7c3bb8SDon Brace } 30290a7c3bb8SDon Brace 30300a7c3bb8SDon Brace static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 30310a7c3bb8SDon Brace u8 *scsi3addr) 30320a7c3bb8SDon Brace { 30330a7c3bb8SDon Brace u8 *buf; 30340a7c3bb8SDon Brace u64 sa = 0; 30350a7c3bb8SDon Brace int rc = 0; 30360a7c3bb8SDon Brace 30370a7c3bb8SDon Brace buf = kzalloc(1024, GFP_KERNEL); 30380a7c3bb8SDon Brace if (!buf) 30390a7c3bb8SDon Brace return 0; 30400a7c3bb8SDon Brace 30410a7c3bb8SDon Brace rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 30420a7c3bb8SDon Brace buf, 1024); 30430a7c3bb8SDon Brace 30440a7c3bb8SDon Brace if (rc) 30450a7c3bb8SDon Brace goto out; 30460a7c3bb8SDon Brace 30470a7c3bb8SDon Brace sa = get_unaligned_be64(buf+12); 30480a7c3bb8SDon Brace 30490a7c3bb8SDon Brace out: 30500a7c3bb8SDon Brace kfree(buf); 30510a7c3bb8SDon Brace return sa; 30520a7c3bb8SDon Brace } 30530a7c3bb8SDon Brace 3054edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3055b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 3056edd16368SStephen M. Cameron unsigned char bufsize) 3057edd16368SStephen M. Cameron { 3058edd16368SStephen M. Cameron int rc = IO_OK; 3059edd16368SStephen M. Cameron struct CommandList *c; 3060edd16368SStephen M. Cameron struct ErrorInfo *ei; 3061edd16368SStephen M. Cameron 306245fcb86eSStephen Cameron c = cmd_alloc(h); 3063edd16368SStephen M. Cameron 3064a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3065a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 3066a2dac136SStephen M. Cameron rc = -1; 3067a2dac136SStephen M. Cameron goto out; 3068a2dac136SStephen M. Cameron } 30698bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 30708bc8f47eSChristoph Hellwig NO_TIMEOUT); 307125163bd5SWebb Scales if (rc) 307225163bd5SWebb Scales goto out; 3073edd16368SStephen M. Cameron ei = c->err_info; 3074edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3075d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3076edd16368SStephen M. Cameron rc = -1; 3077edd16368SStephen M. Cameron } 3078a2dac136SStephen M. Cameron out: 307945fcb86eSStephen Cameron cmd_free(h, c); 3080edd16368SStephen M. Cameron return rc; 3081edd16368SStephen M. Cameron } 3082edd16368SStephen M. Cameron 3083c5dfd106SDon Brace static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 308425163bd5SWebb Scales u8 reset_type, int reply_queue) 3085edd16368SStephen M. Cameron { 3086edd16368SStephen M. Cameron int rc = IO_OK; 3087edd16368SStephen M. Cameron struct CommandList *c; 3088edd16368SStephen M. Cameron struct ErrorInfo *ei; 3089edd16368SStephen M. Cameron 309045fcb86eSStephen Cameron c = cmd_alloc(h); 3091c5dfd106SDon Brace c->device = dev; 3092edd16368SStephen M. Cameron 3093a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 3094c5dfd106SDon Brace (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG); 30952ef28849SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 309625163bd5SWebb Scales if (rc) { 309725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 309825163bd5SWebb Scales goto out; 309925163bd5SWebb Scales } 3100edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 3101edd16368SStephen M. Cameron 3102edd16368SStephen M. Cameron ei = c->err_info; 3103edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 3104d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3105edd16368SStephen M. Cameron rc = -1; 3106edd16368SStephen M. Cameron } 310725163bd5SWebb Scales out: 310845fcb86eSStephen Cameron cmd_free(h, c); 3109edd16368SStephen M. Cameron return rc; 3110edd16368SStephen M. Cameron } 3111edd16368SStephen M. Cameron 3112d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3113d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 3114d604f533SWebb Scales unsigned char *scsi3addr) 3115d604f533SWebb Scales { 3116d604f533SWebb Scales int i; 3117d604f533SWebb Scales bool match = false; 3118d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3119d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3120d604f533SWebb Scales 3121d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 3122d604f533SWebb Scales return false; 3123d604f533SWebb Scales 3124d604f533SWebb Scales switch (c->cmd_type) { 3125d604f533SWebb Scales case CMD_SCSI: 3126d604f533SWebb Scales case CMD_IOCTL_PEND: 3127d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3128d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 3129d604f533SWebb Scales break; 3130d604f533SWebb Scales 3131d604f533SWebb Scales case CMD_IOACCEL1: 3132d604f533SWebb Scales case CMD_IOACCEL2: 3133d604f533SWebb Scales if (c->phys_disk == dev) { 3134d604f533SWebb Scales /* HBA mode match */ 3135d604f533SWebb Scales match = true; 3136d604f533SWebb Scales } else { 3137d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3138d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3139d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3140d604f533SWebb Scales * instead. */ 3141d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3142d604f533SWebb Scales /* FIXME: an alternate test might be 3143d604f533SWebb Scales * 3144d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3145d604f533SWebb Scales * == c2->scsi_nexus; */ 3146d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3147d604f533SWebb Scales } 3148d604f533SWebb Scales } 3149d604f533SWebb Scales break; 3150d604f533SWebb Scales 3151d604f533SWebb Scales case IOACCEL2_TMF: 3152d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3153d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3154d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3155d604f533SWebb Scales } 3156d604f533SWebb Scales break; 3157d604f533SWebb Scales 3158d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3159d604f533SWebb Scales match = false; 3160d604f533SWebb Scales break; 3161d604f533SWebb Scales 3162d604f533SWebb Scales default: 3163d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3164d604f533SWebb Scales c->cmd_type); 3165d604f533SWebb Scales BUG(); 3166d604f533SWebb Scales } 3167d604f533SWebb Scales 3168d604f533SWebb Scales return match; 3169d604f533SWebb Scales } 3170d604f533SWebb Scales 3171d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3172c5dfd106SDon Brace u8 reset_type, int reply_queue) 3173d604f533SWebb Scales { 3174d604f533SWebb Scales int rc = 0; 3175d604f533SWebb Scales 3176d604f533SWebb Scales /* We can really only handle one reset at a time */ 3177d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3178d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3179d604f533SWebb Scales return -EINTR; 3180d604f533SWebb Scales } 3181d604f533SWebb Scales 3182c5dfd106SDon Brace rc = hpsa_send_reset(h, dev, reset_type, reply_queue); 3183c5dfd106SDon Brace if (!rc) { 3184c5dfd106SDon Brace /* incremented by sending the reset request */ 3185c5dfd106SDon Brace atomic_dec(&dev->commands_outstanding); 3186d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3187c5dfd106SDon Brace atomic_read(&dev->commands_outstanding) <= 0 || 3188d604f533SWebb Scales lockup_detected(h)); 3189c5dfd106SDon Brace } 3190d604f533SWebb Scales 3191d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3192d604f533SWebb Scales dev_warn(&h->pdev->dev, 3193d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3194d604f533SWebb Scales rc = -ENODEV; 3195d604f533SWebb Scales } 3196d604f533SWebb Scales 3197c5dfd106SDon Brace if (!rc) 3198c5dfd106SDon Brace rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0); 3199d604f533SWebb Scales 3200d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3201d604f533SWebb Scales return rc; 3202d604f533SWebb Scales } 3203d604f533SWebb Scales 3204edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3205edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3206edd16368SStephen M. Cameron { 3207edd16368SStephen M. Cameron int rc; 3208edd16368SStephen M. Cameron unsigned char *buf; 3209edd16368SStephen M. Cameron 3210edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3211edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3212edd16368SStephen M. Cameron if (!buf) 3213edd16368SStephen M. Cameron return; 32148383278dSScott Teel 32158383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 32168383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 32178383278dSScott Teel goto exit; 32188383278dSScott Teel 32198383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 32208383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 32218383278dSScott Teel 3222edd16368SStephen M. Cameron if (rc == 0) 3223edd16368SStephen M. Cameron *raid_level = buf[8]; 3224edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3225edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 32268383278dSScott Teel exit: 3227edd16368SStephen M. Cameron kfree(buf); 3228edd16368SStephen M. Cameron return; 3229edd16368SStephen M. Cameron } 3230edd16368SStephen M. Cameron 3231283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3232283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3233283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3234283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3235283b4a9bSStephen M. Cameron { 3236283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3237283b4a9bSStephen M. Cameron int map, row, col; 3238283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3239283b4a9bSStephen M. Cameron 3240283b4a9bSStephen M. Cameron if (rc != 0) 3241283b4a9bSStephen M. Cameron return; 3242283b4a9bSStephen M. Cameron 32432ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 32442ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 32452ba8bfc8SStephen M. Cameron return; 32462ba8bfc8SStephen M. Cameron 3247283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3248283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3249283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3250283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3251283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3252283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3253283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3254283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3255283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3256283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3257283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3258283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3259283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3260283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3261283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3262283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3263283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3264283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3265283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3266283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3267283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3268283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3269283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3270283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 32712b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3272dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 3273ba82d91bSColin Ian King dev_info(&h->pdev->dev, "encryption = %s\n", 32742b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 32752b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3276dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3277dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3278283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3279283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3280283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3281283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3282283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3283283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3284283b4a9bSStephen M. Cameron disks_per_row = 3285283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3286283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3287283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3288283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3289283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3290283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3291283b4a9bSStephen M. Cameron disks_per_row = 3292283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3293283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3294283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3295283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3296283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3297283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3298283b4a9bSStephen M. Cameron } 3299283b4a9bSStephen M. Cameron } 3300283b4a9bSStephen M. Cameron } 3301283b4a9bSStephen M. Cameron #else 3302283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3303283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3304283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3305283b4a9bSStephen M. Cameron { 3306283b4a9bSStephen M. Cameron } 3307283b4a9bSStephen M. Cameron #endif 3308283b4a9bSStephen M. Cameron 3309283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3310283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3311283b4a9bSStephen M. Cameron { 3312283b4a9bSStephen M. Cameron int rc = 0; 3313283b4a9bSStephen M. Cameron struct CommandList *c; 3314283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3315283b4a9bSStephen M. Cameron 331645fcb86eSStephen Cameron c = cmd_alloc(h); 3317bf43caf3SRobert Elliott 3318283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3319283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3320283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 33212dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 33222dd02d74SRobert Elliott cmd_free(h, c); 33232dd02d74SRobert Elliott return -1; 3324283b4a9bSStephen M. Cameron } 33258bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 33268bc8f47eSChristoph Hellwig NO_TIMEOUT); 332725163bd5SWebb Scales if (rc) 332825163bd5SWebb Scales goto out; 3329283b4a9bSStephen M. Cameron ei = c->err_info; 3330283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3331d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 333225163bd5SWebb Scales rc = -1; 333325163bd5SWebb Scales goto out; 3334283b4a9bSStephen M. Cameron } 333545fcb86eSStephen Cameron cmd_free(h, c); 3336283b4a9bSStephen M. Cameron 3337283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3338283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3339283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3340283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3341283b4a9bSStephen M. Cameron rc = -1; 3342283b4a9bSStephen M. Cameron } 3343283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3344283b4a9bSStephen M. Cameron return rc; 334525163bd5SWebb Scales out: 334625163bd5SWebb Scales cmd_free(h, c); 334725163bd5SWebb Scales return rc; 3348283b4a9bSStephen M. Cameron } 3349283b4a9bSStephen M. Cameron 3350d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3351d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3352d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3353d04e62b9SKevin Barnett { 3354d04e62b9SKevin Barnett int rc = IO_OK; 3355d04e62b9SKevin Barnett struct CommandList *c; 3356d04e62b9SKevin Barnett struct ErrorInfo *ei; 3357d04e62b9SKevin Barnett 3358d04e62b9SKevin Barnett c = cmd_alloc(h); 3359d04e62b9SKevin Barnett 3360d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3361d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3362d04e62b9SKevin Barnett if (rc) 3363d04e62b9SKevin Barnett goto out; 3364d04e62b9SKevin Barnett 3365d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3366d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3367d04e62b9SKevin Barnett 33688bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 33698bc8f47eSChristoph Hellwig NO_TIMEOUT); 3370d04e62b9SKevin Barnett if (rc) 3371d04e62b9SKevin Barnett goto out; 3372d04e62b9SKevin Barnett ei = c->err_info; 3373d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3374d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3375d04e62b9SKevin Barnett rc = -1; 3376d04e62b9SKevin Barnett } 3377d04e62b9SKevin Barnett out: 3378d04e62b9SKevin Barnett cmd_free(h, c); 3379d04e62b9SKevin Barnett return rc; 3380d04e62b9SKevin Barnett } 3381d04e62b9SKevin Barnett 338266749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 338366749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 338466749d0dSScott Teel { 338566749d0dSScott Teel int rc = IO_OK; 338666749d0dSScott Teel struct CommandList *c; 338766749d0dSScott Teel struct ErrorInfo *ei; 338866749d0dSScott Teel 338966749d0dSScott Teel c = cmd_alloc(h); 339066749d0dSScott Teel 339166749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 339266749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 339366749d0dSScott Teel if (rc) 339466749d0dSScott Teel goto out; 339566749d0dSScott Teel 33968bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 33978bc8f47eSChristoph Hellwig NO_TIMEOUT); 339866749d0dSScott Teel if (rc) 339966749d0dSScott Teel goto out; 340066749d0dSScott Teel ei = c->err_info; 340166749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 340266749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 340366749d0dSScott Teel rc = -1; 340466749d0dSScott Teel } 340566749d0dSScott Teel out: 340666749d0dSScott Teel cmd_free(h, c); 340766749d0dSScott Teel return rc; 340866749d0dSScott Teel } 340966749d0dSScott Teel 341003383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 341103383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 341203383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 341303383736SDon Brace { 341403383736SDon Brace int rc = IO_OK; 341503383736SDon Brace struct CommandList *c; 341603383736SDon Brace struct ErrorInfo *ei; 341703383736SDon Brace 341803383736SDon Brace c = cmd_alloc(h); 341903383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 342003383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 342103383736SDon Brace if (rc) 342203383736SDon Brace goto out; 342303383736SDon Brace 342403383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 342503383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 342603383736SDon Brace 34278bc8f47eSChristoph Hellwig hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 34283026ff9bSDon Brace NO_TIMEOUT); 342903383736SDon Brace ei = c->err_info; 343003383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 343103383736SDon Brace hpsa_scsi_interpret_error(h, c); 343203383736SDon Brace rc = -1; 343303383736SDon Brace } 343403383736SDon Brace out: 343503383736SDon Brace cmd_free(h, c); 3436d04e62b9SKevin Barnett 343703383736SDon Brace return rc; 343803383736SDon Brace } 343903383736SDon Brace 3440cca8f13bSDon Brace /* 3441cca8f13bSDon Brace * get enclosure information 3442cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3443cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3444cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3445cca8f13bSDon Brace */ 3446cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3447cca8f13bSDon Brace unsigned char *scsi3addr, 3448cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3449cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3450cca8f13bSDon Brace { 3451cca8f13bSDon Brace int rc = -1; 3452cca8f13bSDon Brace struct CommandList *c = NULL; 3453cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3454cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3455cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 345627e1b94dSDon Brace struct ext_report_lun_entry *rle; 3457cca8f13bSDon Brace u16 bmic_device_index = 0; 3458cca8f13bSDon Brace 345927e1b94dSDon Brace if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN) 346027e1b94dSDon Brace return; 346127e1b94dSDon Brace 346227e1b94dSDon Brace rle = &rlep->LUN[rle_index]; 346327e1b94dSDon Brace 346401d0e789SDon Brace encl_dev->eli = 34650a7c3bb8SDon Brace hpsa_get_enclosure_logical_identifier(h, scsi3addr); 34660a7c3bb8SDon Brace 346701d0e789SDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 346801d0e789SDon Brace 34695ac517b8SDon Brace if (encl_dev->target == -1 || encl_dev->lun == -1) { 34705ac517b8SDon Brace rc = IO_OK; 34715ac517b8SDon Brace goto out; 34725ac517b8SDon Brace } 34735ac517b8SDon Brace 347417a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 347517a9e54aSDon Brace rc = IO_OK; 3476cca8f13bSDon Brace goto out; 347717a9e54aSDon Brace } 3478cca8f13bSDon Brace 3479cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3480cca8f13bSDon Brace if (!bssbp) 3481cca8f13bSDon Brace goto out; 3482cca8f13bSDon Brace 3483cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3484cca8f13bSDon Brace if (!id_phys) 3485cca8f13bSDon Brace goto out; 3486cca8f13bSDon Brace 3487cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3488cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3489cca8f13bSDon Brace if (rc) { 3490cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3491cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3492cca8f13bSDon Brace goto out; 3493cca8f13bSDon Brace } 3494cca8f13bSDon Brace 3495cca8f13bSDon Brace c = cmd_alloc(h); 3496cca8f13bSDon Brace 3497cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3498cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3499cca8f13bSDon Brace 3500cca8f13bSDon Brace if (rc) 3501cca8f13bSDon Brace goto out; 3502cca8f13bSDon Brace 3503cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3504cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3505cca8f13bSDon Brace else 3506cca8f13bSDon Brace c->Request.CDB[5] = 0; 3507cca8f13bSDon Brace 35088bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 35093026ff9bSDon Brace NO_TIMEOUT); 3510cca8f13bSDon Brace if (rc) 3511cca8f13bSDon Brace goto out; 3512cca8f13bSDon Brace 3513cca8f13bSDon Brace ei = c->err_info; 3514cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3515cca8f13bSDon Brace rc = -1; 3516cca8f13bSDon Brace goto out; 3517cca8f13bSDon Brace } 3518cca8f13bSDon Brace 3519cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3520cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3521cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3522cca8f13bSDon Brace 3523cca8f13bSDon Brace rc = IO_OK; 3524cca8f13bSDon Brace out: 3525cca8f13bSDon Brace kfree(bssbp); 3526cca8f13bSDon Brace kfree(id_phys); 3527cca8f13bSDon Brace 3528cca8f13bSDon Brace if (c) 3529cca8f13bSDon Brace cmd_free(h, c); 3530cca8f13bSDon Brace 3531cca8f13bSDon Brace if (rc != IO_OK) 3532cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3533b4e9ce1cSJulia Lawall "Error, could not get enclosure information"); 3534cca8f13bSDon Brace } 3535cca8f13bSDon Brace 3536d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3537d04e62b9SKevin Barnett unsigned char *scsi3addr) 3538d04e62b9SKevin Barnett { 3539d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3540d04e62b9SKevin Barnett u32 nphysicals; 3541d04e62b9SKevin Barnett u64 sa = 0; 3542d04e62b9SKevin Barnett int i; 3543d04e62b9SKevin Barnett 3544d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3545d04e62b9SKevin Barnett if (!physdev) 3546d04e62b9SKevin Barnett return 0; 3547d04e62b9SKevin Barnett 3548d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3549d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3550d04e62b9SKevin Barnett kfree(physdev); 3551d04e62b9SKevin Barnett return 0; 3552d04e62b9SKevin Barnett } 3553d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3554d04e62b9SKevin Barnett 3555d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3556d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3557d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3558d04e62b9SKevin Barnett break; 3559d04e62b9SKevin Barnett } 3560d04e62b9SKevin Barnett 3561d04e62b9SKevin Barnett kfree(physdev); 3562d04e62b9SKevin Barnett 3563d04e62b9SKevin Barnett return sa; 3564d04e62b9SKevin Barnett } 3565d04e62b9SKevin Barnett 3566d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3567d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3568d04e62b9SKevin Barnett { 3569d04e62b9SKevin Barnett int rc; 3570d04e62b9SKevin Barnett u64 sa = 0; 3571d04e62b9SKevin Barnett 3572d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3573d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3574d04e62b9SKevin Barnett 3575d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 35767e8a9486SAmit Kushwaha if (!ssi) 3577d04e62b9SKevin Barnett return; 3578d04e62b9SKevin Barnett 3579d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3580d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3581d04e62b9SKevin Barnett if (rc == 0) { 3582d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3583d04e62b9SKevin Barnett h->sas_address = sa; 3584d04e62b9SKevin Barnett } 3585d04e62b9SKevin Barnett 3586d04e62b9SKevin Barnett kfree(ssi); 3587d04e62b9SKevin Barnett } else 3588d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3589d04e62b9SKevin Barnett 3590d04e62b9SKevin Barnett dev->sas_address = sa; 3591d04e62b9SKevin Barnett } 3592d04e62b9SKevin Barnett 35934e188184SBader Ali Saleh static void hpsa_ext_ctrl_present(struct ctlr_info *h, 35944e188184SBader Ali Saleh struct ReportExtendedLUNdata *physdev) 35954e188184SBader Ali Saleh { 35964e188184SBader Ali Saleh u32 nphysicals; 35974e188184SBader Ali Saleh int i; 35984e188184SBader Ali Saleh 35994e188184SBader Ali Saleh if (h->discovery_polling) 36004e188184SBader Ali Saleh return; 36014e188184SBader Ali Saleh 36024e188184SBader Ali Saleh nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 36034e188184SBader Ali Saleh 36044e188184SBader Ali Saleh for (i = 0; i < nphysicals; i++) { 36054e188184SBader Ali Saleh if (physdev->LUN[i].device_type == 36064e188184SBader Ali Saleh BMIC_DEVICE_TYPE_CONTROLLER 36074e188184SBader Ali Saleh && !is_hba_lunid(physdev->LUN[i].lunid)) { 36084e188184SBader Ali Saleh dev_info(&h->pdev->dev, 36094e188184SBader Ali Saleh "External controller present, activate discovery polling and disable rld caching\n"); 36104e188184SBader Ali Saleh hpsa_disable_rld_caching(h); 36114e188184SBader Ali Saleh h->discovery_polling = 1; 36124e188184SBader Ali Saleh break; 36134e188184SBader Ali Saleh } 36144e188184SBader Ali Saleh } 36154e188184SBader Ali Saleh } 36164e188184SBader Ali Saleh 3617d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 36188383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 36191b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 36201b70150aSStephen M. Cameron { 36211b70150aSStephen M. Cameron int rc; 36221b70150aSStephen M. Cameron int i; 36231b70150aSStephen M. Cameron int pages; 36241b70150aSStephen M. Cameron unsigned char *buf, bufsize; 36251b70150aSStephen M. Cameron 36261b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 36271b70150aSStephen M. Cameron if (!buf) 36288383278dSScott Teel return false; 36291b70150aSStephen M. Cameron 36301b70150aSStephen M. Cameron /* Get the size of the page list first */ 36311b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 36321b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 36331b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 36341b70150aSStephen M. Cameron if (rc != 0) 36351b70150aSStephen M. Cameron goto exit_unsupported; 36361b70150aSStephen M. Cameron pages = buf[3]; 36371b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 36381b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 36391b70150aSStephen M. Cameron else 36401b70150aSStephen M. Cameron bufsize = 255; 36411b70150aSStephen M. Cameron 36421b70150aSStephen M. Cameron /* Get the whole VPD page list */ 36431b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 36441b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 36451b70150aSStephen M. Cameron buf, bufsize); 36461b70150aSStephen M. Cameron if (rc != 0) 36471b70150aSStephen M. Cameron goto exit_unsupported; 36481b70150aSStephen M. Cameron 36491b70150aSStephen M. Cameron pages = buf[3]; 36501b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 36511b70150aSStephen M. Cameron if (buf[3 + i] == page) 36521b70150aSStephen M. Cameron goto exit_supported; 36531b70150aSStephen M. Cameron exit_unsupported: 36541b70150aSStephen M. Cameron kfree(buf); 36558383278dSScott Teel return false; 36561b70150aSStephen M. Cameron exit_supported: 36571b70150aSStephen M. Cameron kfree(buf); 36588383278dSScott Teel return true; 36591b70150aSStephen M. Cameron } 36601b70150aSStephen M. Cameron 3661b2582a65SDon Brace /* 3662b2582a65SDon Brace * Called during a scan operation. 3663b2582a65SDon Brace * Sets ioaccel status on the new device list, not the existing device list 3664b2582a65SDon Brace * 3665b2582a65SDon Brace * The device list used during I/O will be updated later in 3666b2582a65SDon Brace * adjust_hpsa_scsi_table. 3667b2582a65SDon Brace */ 3668283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3669283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3670283b4a9bSStephen M. Cameron { 3671283b4a9bSStephen M. Cameron int rc; 3672283b4a9bSStephen M. Cameron unsigned char *buf; 3673283b4a9bSStephen M. Cameron u8 ioaccel_status; 3674283b4a9bSStephen M. Cameron 3675283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3676283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 367741ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3678283b4a9bSStephen M. Cameron 3679283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3680283b4a9bSStephen M. Cameron if (!buf) 3681283b4a9bSStephen M. Cameron return; 36821b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 36831b70150aSStephen M. Cameron goto out; 3684283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3685b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3686283b4a9bSStephen M. Cameron if (rc != 0) 3687283b4a9bSStephen M. Cameron goto out; 3688283b4a9bSStephen M. Cameron 3689283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3690283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3691283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3692283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3693283b4a9bSStephen M. Cameron this_device->offload_config = 3694283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3695283b4a9bSStephen M. Cameron if (this_device->offload_config) { 36963e16e83aSDon Brace bool offload_enabled = 3697283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 36983e16e83aSDon Brace /* 36993e16e83aSDon Brace * Check to see if offload can be enabled. 37003e16e83aSDon Brace */ 37013e16e83aSDon Brace if (offload_enabled) { 37023e16e83aSDon Brace rc = hpsa_get_raid_map(h, scsi3addr, this_device); 37033e16e83aSDon Brace if (rc) /* could not load raid_map */ 37043e16e83aSDon Brace goto out; 37053e16e83aSDon Brace this_device->offload_to_be_enabled = 1; 37063e16e83aSDon Brace } 3707283b4a9bSStephen M. Cameron } 3708b2582a65SDon Brace 3709283b4a9bSStephen M. Cameron out: 3710283b4a9bSStephen M. Cameron kfree(buf); 3711283b4a9bSStephen M. Cameron return; 3712283b4a9bSStephen M. Cameron } 3713283b4a9bSStephen M. Cameron 3714edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3715edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 371675d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3717edd16368SStephen M. Cameron { 3718edd16368SStephen M. Cameron int rc; 3719edd16368SStephen M. Cameron unsigned char *buf; 3720edd16368SStephen M. Cameron 37218383278dSScott Teel /* Does controller have VPD for device id? */ 37228383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 37238383278dSScott Teel return 1; /* not supported */ 37248383278dSScott Teel 3725edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3726edd16368SStephen M. Cameron if (!buf) 3727a84d794dSStephen M. Cameron return -ENOMEM; 37288383278dSScott Teel 37298383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 37308383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 37318383278dSScott Teel if (rc == 0) { 37328383278dSScott Teel if (buflen > 16) 37338383278dSScott Teel buflen = 16; 37348383278dSScott Teel memcpy(device_id, &buf[8], buflen); 37358383278dSScott Teel } 373675d23d89SDon Brace 3737edd16368SStephen M. Cameron kfree(buf); 373875d23d89SDon Brace 37398383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3740edd16368SStephen M. Cameron } 3741edd16368SStephen M. Cameron 3742edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 374303383736SDon Brace void *buf, int bufsize, 3744edd16368SStephen M. Cameron int extended_response) 3745edd16368SStephen M. Cameron { 3746edd16368SStephen M. Cameron int rc = IO_OK; 3747edd16368SStephen M. Cameron struct CommandList *c; 3748edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3749edd16368SStephen M. Cameron struct ErrorInfo *ei; 3750edd16368SStephen M. Cameron 375145fcb86eSStephen Cameron c = cmd_alloc(h); 3752bf43caf3SRobert Elliott 3753e89c0ae7SStephen M. Cameron /* address the controller */ 3754e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3755a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3756a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 375745f769b2SHannes Reinecke rc = -EAGAIN; 3758a2dac136SStephen M. Cameron goto out; 3759a2dac136SStephen M. Cameron } 3760edd16368SStephen M. Cameron if (extended_response) 3761edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 37628bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 37638bc8f47eSChristoph Hellwig NO_TIMEOUT); 376425163bd5SWebb Scales if (rc) 376525163bd5SWebb Scales goto out; 3766edd16368SStephen M. Cameron ei = c->err_info; 3767edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3768edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3769d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 377045f769b2SHannes Reinecke rc = -EIO; 3771283b4a9bSStephen M. Cameron } else { 377203383736SDon Brace struct ReportLUNdata *rld = buf; 377303383736SDon Brace 377403383736SDon Brace if (rld->extended_response_flag != extended_response) { 377545f769b2SHannes Reinecke if (!h->legacy_board) { 3776283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3777283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3778283b4a9bSStephen M. Cameron extended_response, 377903383736SDon Brace rld->extended_response_flag); 378045f769b2SHannes Reinecke rc = -EINVAL; 378145f769b2SHannes Reinecke } else 378245f769b2SHannes Reinecke rc = -EOPNOTSUPP; 3783283b4a9bSStephen M. Cameron } 3784edd16368SStephen M. Cameron } 3785a2dac136SStephen M. Cameron out: 378645fcb86eSStephen Cameron cmd_free(h, c); 3787edd16368SStephen M. Cameron return rc; 3788edd16368SStephen M. Cameron } 3789edd16368SStephen M. Cameron 3790edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 379103383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3792edd16368SStephen M. Cameron { 37932a80d545SHannes Reinecke int rc; 37942a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 37952a80d545SHannes Reinecke 37962a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 379703383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 379845f769b2SHannes Reinecke if (!rc || rc != -EOPNOTSUPP) 37992a80d545SHannes Reinecke return rc; 38002a80d545SHannes Reinecke 38012a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 38022a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 38032a80d545SHannes Reinecke if (!lbuf) 38042a80d545SHannes Reinecke return -ENOMEM; 38052a80d545SHannes Reinecke 38062a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 38072a80d545SHannes Reinecke if (!rc) { 38082a80d545SHannes Reinecke int i; 38092a80d545SHannes Reinecke u32 nphys; 38102a80d545SHannes Reinecke 38112a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 38122a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 38132a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 38142a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 38152a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 38162a80d545SHannes Reinecke } 38172a80d545SHannes Reinecke kfree(lbuf); 38182a80d545SHannes Reinecke return rc; 3819edd16368SStephen M. Cameron } 3820edd16368SStephen M. Cameron 3821edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3822edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3823edd16368SStephen M. Cameron { 3824edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3825edd16368SStephen M. Cameron } 3826edd16368SStephen M. Cameron 3827edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3828edd16368SStephen M. Cameron int bus, int target, int lun) 3829edd16368SStephen M. Cameron { 3830edd16368SStephen M. Cameron device->bus = bus; 3831edd16368SStephen M. Cameron device->target = target; 3832edd16368SStephen M. Cameron device->lun = lun; 3833edd16368SStephen M. Cameron } 3834edd16368SStephen M. Cameron 38359846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 38369846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 38379846590eSStephen M. Cameron unsigned char scsi3addr[]) 38389846590eSStephen M. Cameron { 38399846590eSStephen M. Cameron int rc; 38409846590eSStephen M. Cameron int status; 38419846590eSStephen M. Cameron int size; 38429846590eSStephen M. Cameron unsigned char *buf; 38439846590eSStephen M. Cameron 38449846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 38459846590eSStephen M. Cameron if (!buf) 38469846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 38479846590eSStephen M. Cameron 38489846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 384924a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 38509846590eSStephen M. Cameron goto exit_failed; 38519846590eSStephen M. Cameron 38529846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 38539846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 38549846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 385524a4b078SStephen M. Cameron if (rc != 0) 38569846590eSStephen M. Cameron goto exit_failed; 38579846590eSStephen M. Cameron size = buf[3]; 38589846590eSStephen M. Cameron 38599846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 38609846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 38619846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 386224a4b078SStephen M. Cameron if (rc != 0) 38639846590eSStephen M. Cameron goto exit_failed; 38649846590eSStephen M. Cameron status = buf[4]; /* status byte */ 38659846590eSStephen M. Cameron 38669846590eSStephen M. Cameron kfree(buf); 38679846590eSStephen M. Cameron return status; 38689846590eSStephen M. Cameron exit_failed: 38699846590eSStephen M. Cameron kfree(buf); 38709846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 38719846590eSStephen M. Cameron } 38729846590eSStephen M. Cameron 38739846590eSStephen M. Cameron /* Determine offline status of a volume. 38749846590eSStephen M. Cameron * Return either: 38759846590eSStephen M. Cameron * 0 (not offline) 387667955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 38779846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 38789846590eSStephen M. Cameron * describing why a volume is to be kept offline) 38799846590eSStephen M. Cameron */ 388085b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h, 38819846590eSStephen M. Cameron unsigned char scsi3addr[]) 38829846590eSStephen M. Cameron { 38839846590eSStephen M. Cameron struct CommandList *c; 38849437ac43SStephen Cameron unsigned char *sense; 38859437ac43SStephen Cameron u8 sense_key, asc, ascq; 38869437ac43SStephen Cameron int sense_len; 388725163bd5SWebb Scales int rc, ldstat = 0; 38889846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 38899846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 38909846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 38919846590eSStephen M. Cameron 38929846590eSStephen M. Cameron c = cmd_alloc(h); 3893bf43caf3SRobert Elliott 38949846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3895c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 38963026ff9bSDon Brace NO_TIMEOUT); 389725163bd5SWebb Scales if (rc) { 389825163bd5SWebb Scales cmd_free(h, c); 389985b29008SDon Brace return HPSA_VPD_LV_STATUS_UNSUPPORTED; 390025163bd5SWebb Scales } 39019846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 39029437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 39039437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 39049437ac43SStephen Cameron else 39059437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 39069437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 39079846590eSStephen M. Cameron cmd_free(h, c); 39089846590eSStephen M. Cameron 39099846590eSStephen M. Cameron /* Determine the reason for not ready state */ 39109846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 39119846590eSStephen M. Cameron 39129846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 39139846590eSStephen M. Cameron switch (ldstat) { 391485b29008SDon Brace case HPSA_LV_FAILED: 39159846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 39165ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 39179846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 39189846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 39199846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 39209846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 39219846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 39229846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 39239846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 39249846590eSStephen M. Cameron return ldstat; 39259846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 39269846590eSStephen M. Cameron /* If VPD status page isn't available, 39279846590eSStephen M. Cameron * use ASC/ASCQ to determine state 39289846590eSStephen M. Cameron */ 39299846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 39309846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 39319846590eSStephen M. Cameron return ldstat; 39329846590eSStephen M. Cameron break; 39339846590eSStephen M. Cameron default: 39349846590eSStephen M. Cameron break; 39359846590eSStephen M. Cameron } 393685b29008SDon Brace return HPSA_LV_OK; 39379846590eSStephen M. Cameron } 39389846590eSStephen M. Cameron 3939edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 39400b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 39410b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3942edd16368SStephen M. Cameron { 39430b0e1d6cSStephen M. Cameron 39440b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 39450b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 39460b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 39470b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 39480b0e1d6cSStephen M. Cameron 3949ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 39500b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3951683fc444SDon Brace int rc = 0; 3952edd16368SStephen M. Cameron 3953ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3954683fc444SDon Brace if (!inq_buff) { 3955683fc444SDon Brace rc = -ENOMEM; 3956edd16368SStephen M. Cameron goto bail_out; 3957683fc444SDon Brace } 3958edd16368SStephen M. Cameron 3959edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3960edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3961edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3962edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 396385b29008SDon Brace "%s: inquiry failed, device will be skipped.\n", 396485b29008SDon Brace __func__); 396585b29008SDon Brace rc = HPSA_INQUIRY_FAILED; 3966edd16368SStephen M. Cameron goto bail_out; 3967edd16368SStephen M. Cameron } 3968edd16368SStephen M. Cameron 39694af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 39704af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 397175d23d89SDon Brace 3972edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3973edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3974edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3975edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3976edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3977edd16368SStephen M. Cameron sizeof(this_device->model)); 39787630b3a5SHannes Reinecke this_device->rev = inq_buff[2]; 3979edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3980edd16368SStephen M. Cameron sizeof(this_device->device_id)); 39818383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3982a45bcc4eSDon Brace sizeof(this_device->device_id)) < 0) { 39838383278dSScott Teel dev_err(&h->pdev->dev, 3984a45bcc4eSDon Brace "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n", 39858383278dSScott Teel h->ctlr, __func__, 39868383278dSScott Teel h->scsi_host->host_no, 3987a45bcc4eSDon Brace this_device->bus, this_device->target, 3988a45bcc4eSDon Brace this_device->lun, 39898383278dSScott Teel scsi_device_type(this_device->devtype), 39908383278dSScott Teel this_device->model); 3991a45bcc4eSDon Brace rc = HPSA_LV_FAILED; 3992a45bcc4eSDon Brace goto bail_out; 3993a45bcc4eSDon Brace } 3994edd16368SStephen M. Cameron 3995af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3996af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3997283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 399885b29008SDon Brace unsigned char volume_offline; 399967955ba3SStephen M. Cameron 4000edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 4001283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 4002283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 400367955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 40044d17944aSHannes Reinecke if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 40054d17944aSHannes Reinecke h->legacy_board) { 40064d17944aSHannes Reinecke /* 40074d17944aSHannes Reinecke * Legacy boards might not support volume status 40084d17944aSHannes Reinecke */ 40094d17944aSHannes Reinecke dev_info(&h->pdev->dev, 40104d17944aSHannes Reinecke "C0:T%d:L%d Volume status not available, assuming online.\n", 40114d17944aSHannes Reinecke this_device->target, this_device->lun); 40124d17944aSHannes Reinecke volume_offline = 0; 40134d17944aSHannes Reinecke } 4014eb94588dSTomas Henzl this_device->volume_offline = volume_offline; 401585b29008SDon Brace if (volume_offline == HPSA_LV_FAILED) { 401685b29008SDon Brace rc = HPSA_LV_FAILED; 401785b29008SDon Brace dev_err(&h->pdev->dev, 401885b29008SDon Brace "%s: LV failed, device will be skipped.\n", 401985b29008SDon Brace __func__); 402085b29008SDon Brace goto bail_out; 402185b29008SDon Brace } 4022283b4a9bSStephen M. Cameron } else { 4023edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 4024283b4a9bSStephen M. Cameron this_device->offload_config = 0; 40253e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(this_device); 4026a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 40279846590eSStephen M. Cameron this_device->volume_offline = 0; 402803383736SDon Brace this_device->queue_depth = h->nr_cmds; 4029283b4a9bSStephen M. Cameron } 4030edd16368SStephen M. Cameron 40315086435eSDon Brace if (this_device->external) 40325086435eSDon Brace this_device->queue_depth = EXTERNAL_QD; 40335086435eSDon Brace 40340b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 40350b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 40360b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 40370b0e1d6cSStephen M. Cameron */ 40380b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 40390b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 40400b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 40410b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 40420b0e1d6cSStephen M. Cameron } 4043edd16368SStephen M. Cameron kfree(inq_buff); 4044edd16368SStephen M. Cameron return 0; 4045edd16368SStephen M. Cameron 4046edd16368SStephen M. Cameron bail_out: 4047edd16368SStephen M. Cameron kfree(inq_buff); 4048683fc444SDon Brace return rc; 4049edd16368SStephen M. Cameron } 4050edd16368SStephen M. Cameron 4051c795505aSKevin Barnett /* 4052c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 4053edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 4054edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 4055edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4056edd16368SStephen M. Cameron */ 4057edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 40581f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4059edd16368SStephen M. Cameron { 4060c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 4061edd16368SStephen M. Cameron 40621f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 40631f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 40647630b3a5SHannes Reinecke if (is_hba_lunid(lunaddrbytes)) { 40657630b3a5SHannes Reinecke int bus = HPSA_HBA_BUS; 40667630b3a5SHannes Reinecke 40677630b3a5SHannes Reinecke if (!device->rev) 40687630b3a5SHannes Reinecke bus = HPSA_LEGACY_HBA_BUS; 4069c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 40707630b3a5SHannes Reinecke bus, 0, lunid & 0x3fff); 40717630b3a5SHannes Reinecke } else 40721f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 4073c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 4074c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 40751f310bdeSStephen M. Cameron return; 40761f310bdeSStephen M. Cameron } 40771f310bdeSStephen M. Cameron /* It's a logical device */ 407866749d0dSScott Teel if (device->external) { 40791f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 4080c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4081c795505aSKevin Barnett lunid & 0x00ff); 40821f310bdeSStephen M. Cameron return; 4083339b2b14SStephen M. Cameron } 4084c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4085c795505aSKevin Barnett 0, lunid & 0x3fff); 4086edd16368SStephen M. Cameron } 4087edd16368SStephen M. Cameron 408866749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 408966749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 409066749d0dSScott Teel { 409166749d0dSScott Teel /* In report logicals, local logicals are listed first, 409266749d0dSScott Teel * then any externals. 409366749d0dSScott Teel */ 409466749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 409566749d0dSScott Teel 409666749d0dSScott Teel if (i == raid_ctlr_position) 409766749d0dSScott Teel return 0; 409866749d0dSScott Teel 409966749d0dSScott Teel if (i < logicals_start) 410066749d0dSScott Teel return 0; 410166749d0dSScott Teel 410266749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 410366749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 410466749d0dSScott Teel return 0; 410566749d0dSScott Teel 410666749d0dSScott Teel return 1; /* it's an external lun */ 410766749d0dSScott Teel } 410866749d0dSScott Teel 410954b6e9e9SScott Teel /* 4110edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4111edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4112edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4113edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4114edd16368SStephen M. Cameron */ 4115edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 411603383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 411701a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4118edd16368SStephen M. Cameron { 411903383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4120edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4121edd16368SStephen M. Cameron return -1; 4122edd16368SStephen M. Cameron } 412303383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4124edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 412503383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 412603383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4127edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4128edd16368SStephen M. Cameron } 412903383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4130edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4131edd16368SStephen M. Cameron return -1; 4132edd16368SStephen M. Cameron } 41336df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4134edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4135edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4136edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4137edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4138edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4139edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4140edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4141edd16368SStephen M. Cameron } 4142edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4143edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4144edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4145edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4146edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4147edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4148edd16368SStephen M. Cameron } 4149edd16368SStephen M. Cameron return 0; 4150edd16368SStephen M. Cameron } 4151edd16368SStephen M. Cameron 415242a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 415342a91641SDon Brace int i, int nphysicals, int nlogicals, 4154a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4155339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4156339b2b14SStephen M. Cameron { 4157339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4158339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4159339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4160339b2b14SStephen M. Cameron */ 4161339b2b14SStephen M. Cameron 4162339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4163339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4164339b2b14SStephen M. Cameron 4165339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4166339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4167339b2b14SStephen M. Cameron 4168339b2b14SStephen M. Cameron if (i < logicals_start) 4169d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4170d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4171339b2b14SStephen M. Cameron 4172339b2b14SStephen M. Cameron if (i < last_device) 4173339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4174339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4175339b2b14SStephen M. Cameron BUG(); 4176339b2b14SStephen M. Cameron return NULL; 4177339b2b14SStephen M. Cameron } 4178339b2b14SStephen M. Cameron 417903383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 418003383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 418103383736SDon Brace struct hpsa_scsi_dev_t *dev, 4182f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 418303383736SDon Brace struct bmic_identify_physical_device *id_phys) 418403383736SDon Brace { 418503383736SDon Brace int rc; 41864b6e5597SScott Teel struct ext_report_lun_entry *rle; 41874b6e5597SScott Teel 418827e1b94dSDon Brace if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN) 418927e1b94dSDon Brace return; 419027e1b94dSDon Brace 41914b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 419203383736SDon Brace 419303383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4194f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4195a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 419603383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4197f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4198f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 419903383736SDon Brace sizeof(*id_phys)); 420003383736SDon Brace if (!rc) 420103383736SDon Brace /* Reserve space for FW operations */ 420203383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 420303383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 420403383736SDon Brace dev->queue_depth = 420503383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 420603383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 420703383736SDon Brace else 420803383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 420903383736SDon Brace } 421003383736SDon Brace 42118270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4212f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 42138270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 42148270b862SJoe Handzik { 421527e1b94dSDon Brace struct ext_report_lun_entry *rle; 421627e1b94dSDon Brace 421727e1b94dSDon Brace if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN) 421827e1b94dSDon Brace return; 421927e1b94dSDon Brace 422027e1b94dSDon Brace rle = &rlep->LUN[rle_index]; 4221f2039b03SDon Brace 4222f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 42238270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 42248270b862SJoe Handzik 42258270b862SJoe Handzik memcpy(&this_device->active_path_index, 42268270b862SJoe Handzik &id_phys->active_path_number, 42278270b862SJoe Handzik sizeof(this_device->active_path_index)); 42288270b862SJoe Handzik memcpy(&this_device->path_map, 42298270b862SJoe Handzik &id_phys->redundant_path_present_map, 42308270b862SJoe Handzik sizeof(this_device->path_map)); 42318270b862SJoe Handzik memcpy(&this_device->box, 42328270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 42338270b862SJoe Handzik sizeof(this_device->box)); 42348270b862SJoe Handzik memcpy(&this_device->phys_connector, 42358270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 42368270b862SJoe Handzik sizeof(this_device->phys_connector)); 42378270b862SJoe Handzik memcpy(&this_device->bay, 42388270b862SJoe Handzik &id_phys->phys_bay_in_box, 42398270b862SJoe Handzik sizeof(this_device->bay)); 42408270b862SJoe Handzik } 42418270b862SJoe Handzik 424266749d0dSScott Teel /* get number of local logical disks. */ 424366749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 424466749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 424566749d0dSScott Teel u32 *nlocals) 424666749d0dSScott Teel { 424766749d0dSScott Teel int rc; 424866749d0dSScott Teel 424966749d0dSScott Teel if (!id_ctlr) { 425066749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 425166749d0dSScott Teel __func__); 425266749d0dSScott Teel return -ENOMEM; 425366749d0dSScott Teel } 425466749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 425566749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 425666749d0dSScott Teel if (!rc) 4257c99dfd20SChristos Gkekas if (id_ctlr->configured_logical_drive_count < 255) 425866749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 425966749d0dSScott Teel else 426066749d0dSScott Teel *nlocals = le16_to_cpu( 426166749d0dSScott Teel id_ctlr->extended_logical_unit_count); 426266749d0dSScott Teel else 426366749d0dSScott Teel *nlocals = -1; 426466749d0dSScott Teel return rc; 426566749d0dSScott Teel } 426666749d0dSScott Teel 426764ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 426864ce60caSDon Brace { 426964ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 427064ce60caSDon Brace bool is_spare = false; 427164ce60caSDon Brace int rc; 427264ce60caSDon Brace 427364ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 427464ce60caSDon Brace if (!id_phys) 427564ce60caSDon Brace return false; 427664ce60caSDon Brace 427764ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 427864ce60caSDon Brace lunaddrbytes, 427964ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 428064ce60caSDon Brace id_phys, sizeof(*id_phys)); 428164ce60caSDon Brace if (rc == 0) 428264ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 428364ce60caSDon Brace 428464ce60caSDon Brace kfree(id_phys); 428564ce60caSDon Brace return is_spare; 428664ce60caSDon Brace } 428764ce60caSDon Brace 428864ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 428964ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 429064ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 429164ce60caSDon Brace 429264ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 429364ce60caSDon Brace 429464ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 429564ce60caSDon Brace struct ext_report_lun_entry *rle) 429664ce60caSDon Brace { 429764ce60caSDon Brace u8 device_flags; 429864ce60caSDon Brace u8 device_type; 429964ce60caSDon Brace 430064ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 430164ce60caSDon Brace return false; 430264ce60caSDon Brace 430364ce60caSDon Brace device_flags = rle->device_flags; 430464ce60caSDon Brace device_type = rle->device_type; 430564ce60caSDon Brace 430664ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 430764ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 430864ce60caSDon Brace return false; 430964ce60caSDon Brace return true; 431064ce60caSDon Brace } 431164ce60caSDon Brace 431264ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 431364ce60caSDon Brace return false; 431464ce60caSDon Brace 431564ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 431664ce60caSDon Brace return false; 431764ce60caSDon Brace 431864ce60caSDon Brace /* 431964ce60caSDon Brace * Spares may be spun down, we do not want to 432064ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 432164ce60caSDon Brace * that would have them spun up, that is a 432264ce60caSDon Brace * performance hit because I/O to the RAID device 432364ce60caSDon Brace * stops while the spin up occurs which can take 432464ce60caSDon Brace * over 50 seconds. 432564ce60caSDon Brace */ 432664ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 432764ce60caSDon Brace return true; 432864ce60caSDon Brace 432964ce60caSDon Brace return false; 433064ce60caSDon Brace } 433166749d0dSScott Teel 43328aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4333edd16368SStephen M. Cameron { 4334edd16368SStephen M. Cameron /* the idea here is we could get notified 4335edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4336edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4337edd16368SStephen M. Cameron * our list of devices accordingly. 4338edd16368SStephen M. Cameron * 4339edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4340edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4341edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4342edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4343edd16368SStephen M. Cameron */ 4344a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4345edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 434603383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 434766749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 434801a02ffcSStephen M. Cameron u32 nphysicals = 0; 434901a02ffcSStephen M. Cameron u32 nlogicals = 0; 435066749d0dSScott Teel u32 nlocal_logicals = 0; 435101a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4352edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4353edd16368SStephen M. Cameron int ncurrent = 0; 43541fc65919SLee Jones int i, ndevs_to_allocate; 4355339b2b14SStephen M. Cameron int raid_ctlr_position; 435604fa2f44SKevin Barnett bool physical_device; 4357edd16368SStephen M. Cameron 43586396bb22SKees Cook currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 435992084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 436092084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4361edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 436203383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 436366749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4364edd16368SStephen M. Cameron 436503383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 436666749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4367edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4368edd16368SStephen M. Cameron goto out; 4369edd16368SStephen M. Cameron } 4370edd16368SStephen M. Cameron 4371853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4372853633e8SDon Brace 437303383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4374853633e8SDon Brace logdev_list, &nlogicals)) { 4375853633e8SDon Brace h->drv_req_rescan = 1; 4376edd16368SStephen M. Cameron goto out; 4377853633e8SDon Brace } 4378edd16368SStephen M. Cameron 437966749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 438066749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 438166749d0dSScott Teel dev_warn(&h->pdev->dev, 438266749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 438366749d0dSScott Teel __func__); 438466749d0dSScott Teel } 4385edd16368SStephen M. Cameron 4386aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4387aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4388aca4a520SScott Teel * controller. 4389edd16368SStephen M. Cameron */ 4390aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4391edd16368SStephen M. Cameron 43924e188184SBader Ali Saleh hpsa_ext_ctrl_present(h, physdev_list); 43934e188184SBader Ali Saleh 4394edd16368SStephen M. Cameron /* Allocate the per device structures */ 4395edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4396b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4397b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4398b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4399b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4400b7ec021fSScott Teel break; 4401b7ec021fSScott Teel } 4402b7ec021fSScott Teel 4403edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4404edd16368SStephen M. Cameron if (!currentsd[i]) { 4405853633e8SDon Brace h->drv_req_rescan = 1; 4406edd16368SStephen M. Cameron goto out; 4407edd16368SStephen M. Cameron } 4408edd16368SStephen M. Cameron ndev_allocated++; 4409edd16368SStephen M. Cameron } 4410edd16368SStephen M. Cameron 44118645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4412339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4413339b2b14SStephen M. Cameron else 4414339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4415339b2b14SStephen M. Cameron 4416edd16368SStephen M. Cameron /* adjust our table of devices */ 4417edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 44180b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4419683fc444SDon Brace int rc = 0; 4420f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 442164ce60caSDon Brace bool skip_device = false; 4422edd16368SStephen M. Cameron 4423421bf80cSScott Teel memset(tmpdevice, 0, sizeof(*tmpdevice)); 4424421bf80cSScott Teel 442504fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4426edd16368SStephen M. Cameron 4427edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4428339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4429339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 443041ce4c35SStephen Cameron 443186cf7130SDon Brace /* Determine if this is a lun from an external target array */ 443286cf7130SDon Brace tmpdevice->external = 443386cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 443486cf7130SDon Brace nphysicals, nlocal_logicals); 443586cf7130SDon Brace 443664ce60caSDon Brace /* 443764ce60caSDon Brace * Skip over some devices such as a spare. 443864ce60caSDon Brace */ 443927e1b94dSDon Brace if (phys_dev_index >= 0 && !tmpdevice->external && 444027e1b94dSDon Brace physical_device) { 444164ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 444264ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 444364ce60caSDon Brace if (skip_device) 4444edd16368SStephen M. Cameron continue; 444564ce60caSDon Brace } 4446edd16368SStephen M. Cameron 4447b2582a65SDon Brace /* Get device type, vendor, model, device id, raid_map */ 4448683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4449683fc444SDon Brace &is_OBDR); 4450683fc444SDon Brace if (rc == -ENOMEM) { 4451683fc444SDon Brace dev_warn(&h->pdev->dev, 4452683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4453853633e8SDon Brace h->drv_req_rescan = 1; 4454683fc444SDon Brace goto out; 4455853633e8SDon Brace } 4456683fc444SDon Brace if (rc) { 445785b29008SDon Brace h->drv_req_rescan = 1; 4458683fc444SDon Brace continue; 4459683fc444SDon Brace } 4460683fc444SDon Brace 44611f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4462edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4463edd16368SStephen M. Cameron 4464edd16368SStephen M. Cameron *this_device = *tmpdevice; 446504fa2f44SKevin Barnett this_device->physical_device = physical_device; 4466edd16368SStephen M. Cameron 446704fa2f44SKevin Barnett /* 446804fa2f44SKevin Barnett * Expose all devices except for physical devices that 446904fa2f44SKevin Barnett * are masked. 447004fa2f44SKevin Barnett */ 447104fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 44722a168208SKevin Barnett this_device->expose_device = 0; 44732a168208SKevin Barnett else 44742a168208SKevin Barnett this_device->expose_device = 1; 447541ce4c35SStephen Cameron 4476d04e62b9SKevin Barnett 4477d04e62b9SKevin Barnett /* 4478d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4479d04e62b9SKevin Barnett */ 4480d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4481d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4482edd16368SStephen M. Cameron 4483edd16368SStephen M. Cameron switch (this_device->devtype) { 44840b0e1d6cSStephen M. Cameron case TYPE_ROM: 4485edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4486edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4487edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4488edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4489edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4490edd16368SStephen M. Cameron * the inquiry data. 4491edd16368SStephen M. Cameron */ 44920b0e1d6cSStephen M. Cameron if (is_OBDR) 4493edd16368SStephen M. Cameron ncurrent++; 4494edd16368SStephen M. Cameron break; 4495edd16368SStephen M. Cameron case TYPE_DISK: 4496af15ed36SDon Brace case TYPE_ZBC: 449704fa2f44SKevin Barnett if (this_device->physical_device) { 4498b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4499b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4500ecf418d1SJoe Handzik this_device->offload_enabled = 0; 450103383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4502f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4503f2039b03SDon Brace hpsa_get_path_info(this_device, 4504f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4505b9092b79SKevin Barnett } 4506edd16368SStephen M. Cameron ncurrent++; 4507edd16368SStephen M. Cameron break; 4508edd16368SStephen M. Cameron case TYPE_TAPE: 4509edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4510cca8f13bSDon Brace ncurrent++; 4511cca8f13bSDon Brace break; 451241ce4c35SStephen Cameron case TYPE_ENCLOSURE: 451317a9e54aSDon Brace if (!this_device->external) 4514cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4515cca8f13bSDon Brace physdev_list, phys_dev_index, 4516cca8f13bSDon Brace this_device); 451741ce4c35SStephen Cameron ncurrent++; 451841ce4c35SStephen Cameron break; 4519edd16368SStephen M. Cameron case TYPE_RAID: 4520edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4521edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4522edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4523edd16368SStephen M. Cameron * don't present it. 4524edd16368SStephen M. Cameron */ 4525edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4526edd16368SStephen M. Cameron break; 4527edd16368SStephen M. Cameron ncurrent++; 4528edd16368SStephen M. Cameron break; 4529edd16368SStephen M. Cameron default: 4530edd16368SStephen M. Cameron break; 4531edd16368SStephen M. Cameron } 4532cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4533edd16368SStephen M. Cameron break; 4534edd16368SStephen M. Cameron } 4535d04e62b9SKevin Barnett 4536d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4537d04e62b9SKevin Barnett int rc = 0; 4538d04e62b9SKevin Barnett 4539d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4540d04e62b9SKevin Barnett if (rc) { 4541d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4542d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4543d04e62b9SKevin Barnett goto out; 4544d04e62b9SKevin Barnett } 4545d04e62b9SKevin Barnett } 4546d04e62b9SKevin Barnett 45478aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4548edd16368SStephen M. Cameron out: 4549edd16368SStephen M. Cameron kfree(tmpdevice); 4550edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4551edd16368SStephen M. Cameron kfree(currentsd[i]); 4552edd16368SStephen M. Cameron kfree(currentsd); 4553edd16368SStephen M. Cameron kfree(physdev_list); 4554edd16368SStephen M. Cameron kfree(logdev_list); 455566749d0dSScott Teel kfree(id_ctlr); 455603383736SDon Brace kfree(id_phys); 4557edd16368SStephen M. Cameron } 4558edd16368SStephen M. Cameron 4559ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4560ec5cbf04SWebb Scales struct scatterlist *sg) 4561ec5cbf04SWebb Scales { 4562ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4563ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4564ec5cbf04SWebb Scales 4565ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4566ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4567ec5cbf04SWebb Scales desc->Ext = 0; 4568ec5cbf04SWebb Scales } 4569ec5cbf04SWebb Scales 4570c7ee65b3SWebb Scales /* 4571c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4572edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4573edd16368SStephen M. Cameron * hpsa command, cp. 4574edd16368SStephen M. Cameron */ 457533a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4576edd16368SStephen M. Cameron struct CommandList *cp, 4577edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4578edd16368SStephen M. Cameron { 4579edd16368SStephen M. Cameron struct scatterlist *sg; 45801fc65919SLee Jones int use_sg, i, sg_limit, chained; 458133a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4582edd16368SStephen M. Cameron 458333a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4584edd16368SStephen M. Cameron 4585edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4586edd16368SStephen M. Cameron if (use_sg < 0) 4587edd16368SStephen M. Cameron return use_sg; 4588edd16368SStephen M. Cameron 4589edd16368SStephen M. Cameron if (!use_sg) 4590edd16368SStephen M. Cameron goto sglist_finished; 4591edd16368SStephen M. Cameron 4592b3a7ba7cSWebb Scales /* 4593b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4594b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4595b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4596b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4597b3a7ba7cSWebb Scales * the entries in the one list. 4598b3a7ba7cSWebb Scales */ 459933a2ffceSStephen M. Cameron curr_sg = cp->SG; 4600b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4601b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4602b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4603ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 460433a2ffceSStephen M. Cameron curr_sg++; 460533a2ffceSStephen M. Cameron } 4606ec5cbf04SWebb Scales 4607b3a7ba7cSWebb Scales if (chained) { 4608b3a7ba7cSWebb Scales /* 4609b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4610b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4611b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4612b3a7ba7cSWebb Scales * where the previous loop left off. 4613b3a7ba7cSWebb Scales */ 4614b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4615b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4616b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4617b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4618b3a7ba7cSWebb Scales curr_sg++; 4619b3a7ba7cSWebb Scales } 4620b3a7ba7cSWebb Scales } 4621b3a7ba7cSWebb Scales 4622ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4623b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 462433a2ffceSStephen M. Cameron 462533a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 462633a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 462733a2ffceSStephen M. Cameron 462833a2ffceSStephen M. Cameron if (chained) { 462933a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 463050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4631e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4632e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4633e2bea6dfSStephen M. Cameron return -1; 4634e2bea6dfSStephen M. Cameron } 463533a2ffceSStephen M. Cameron return 0; 4636edd16368SStephen M. Cameron } 4637edd16368SStephen M. Cameron 4638edd16368SStephen M. Cameron sglist_finished: 4639edd16368SStephen M. Cameron 464001a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4641c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4642edd16368SStephen M. Cameron return 0; 4643edd16368SStephen M. Cameron } 4644edd16368SStephen M. Cameron 4645b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h, 4646b63c64acSDon Brace u8 *cdb, int cdb_len, 4647b63c64acSDon Brace const char *func) 4648b63c64acSDon Brace { 4649f4d0ad1fSAndy Shevchenko dev_warn(&h->pdev->dev, 4650f4d0ad1fSAndy Shevchenko "%s: Blocking zero-length request: CDB:%*phN\n", 4651f4d0ad1fSAndy Shevchenko func, cdb_len, cdb); 4652b63c64acSDon Brace } 4653b63c64acSDon Brace 4654b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1 4655b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */ 4656b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb) 4657b63c64acSDon Brace { 4658b63c64acSDon Brace u32 block_cnt; 4659b63c64acSDon Brace 4660b63c64acSDon Brace /* Block zero-length transfer sizes on certain commands. */ 4661b63c64acSDon Brace switch (cdb[0]) { 4662b63c64acSDon Brace case READ_10: 4663b63c64acSDon Brace case WRITE_10: 4664b63c64acSDon Brace case VERIFY: /* 0x2F */ 4665b63c64acSDon Brace case WRITE_VERIFY: /* 0x2E */ 4666b63c64acSDon Brace block_cnt = get_unaligned_be16(&cdb[7]); 4667b63c64acSDon Brace break; 4668b63c64acSDon Brace case READ_12: 4669b63c64acSDon Brace case WRITE_12: 4670b63c64acSDon Brace case VERIFY_12: /* 0xAF */ 4671b63c64acSDon Brace case WRITE_VERIFY_12: /* 0xAE */ 4672b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4673b63c64acSDon Brace break; 4674b63c64acSDon Brace case READ_16: 4675b63c64acSDon Brace case WRITE_16: 4676b63c64acSDon Brace case VERIFY_16: /* 0x8F */ 4677b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[10]); 4678b63c64acSDon Brace break; 4679b63c64acSDon Brace default: 4680b63c64acSDon Brace return false; 4681b63c64acSDon Brace } 4682b63c64acSDon Brace 4683b63c64acSDon Brace return block_cnt == 0; 4684b63c64acSDon Brace } 4685b63c64acSDon Brace 4686283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4687283b4a9bSStephen M. Cameron { 4688283b4a9bSStephen M. Cameron int is_write = 0; 4689283b4a9bSStephen M. Cameron u32 block; 4690283b4a9bSStephen M. Cameron u32 block_cnt; 4691283b4a9bSStephen M. Cameron 4692283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4693283b4a9bSStephen M. Cameron switch (cdb[0]) { 4694283b4a9bSStephen M. Cameron case WRITE_6: 4695283b4a9bSStephen M. Cameron case WRITE_12: 4696283b4a9bSStephen M. Cameron is_write = 1; 4697df561f66SGustavo A. R. Silva fallthrough; 4698283b4a9bSStephen M. Cameron case READ_6: 4699283b4a9bSStephen M. Cameron case READ_12: 4700283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4701abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4702abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4703abbada71SMahesh Rajashekhara cdb[3]); 4704283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4705c8a6c9a6SDon Brace if (block_cnt == 0) 4706c8a6c9a6SDon Brace block_cnt = 256; 4707283b4a9bSStephen M. Cameron } else { 4708283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4709c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4710c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4711283b4a9bSStephen M. Cameron } 4712283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4713283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4714283b4a9bSStephen M. Cameron 4715283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4716283b4a9bSStephen M. Cameron cdb[1] = 0; 4717283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4718283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4719283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4720283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4721283b4a9bSStephen M. Cameron cdb[6] = 0; 4722283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4723283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4724283b4a9bSStephen M. Cameron cdb[9] = 0; 4725283b4a9bSStephen M. Cameron *cdb_len = 10; 4726283b4a9bSStephen M. Cameron break; 4727283b4a9bSStephen M. Cameron } 4728283b4a9bSStephen M. Cameron return 0; 4729283b4a9bSStephen M. Cameron } 4730283b4a9bSStephen M. Cameron 4731c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4732283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 473303383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4734e1f7de0cSMatt Gates { 4735e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4736e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4737e1f7de0cSMatt Gates unsigned int len; 4738e1f7de0cSMatt Gates unsigned int total_len = 0; 4739e1f7de0cSMatt Gates struct scatterlist *sg; 4740e1f7de0cSMatt Gates u64 addr64; 4741e1f7de0cSMatt Gates int use_sg, i; 4742e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4743e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4744e1f7de0cSMatt Gates 4745283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 474603383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 474703383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4748283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 474903383736SDon Brace } 4750283b4a9bSStephen M. Cameron 4751e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4752e1f7de0cSMatt Gates 4753b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4754b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4755b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4756b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4757b63c64acSDon Brace } 4758b63c64acSDon Brace 475903383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 476003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4761283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 476203383736SDon Brace } 4763283b4a9bSStephen M. Cameron 4764e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4765e1f7de0cSMatt Gates 4766e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4767e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4768e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4769e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4770e1f7de0cSMatt Gates 4771e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 477203383736SDon Brace if (use_sg < 0) { 477303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4774e1f7de0cSMatt Gates return use_sg; 477503383736SDon Brace } 4776e1f7de0cSMatt Gates 4777e1f7de0cSMatt Gates if (use_sg) { 4778e1f7de0cSMatt Gates curr_sg = cp->SG; 4779e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4780e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4781e1f7de0cSMatt Gates len = sg_dma_len(sg); 4782e1f7de0cSMatt Gates total_len += len; 478350a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 478450a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 478550a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4786e1f7de0cSMatt Gates curr_sg++; 4787e1f7de0cSMatt Gates } 478850a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4789e1f7de0cSMatt Gates 4790e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4791e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4792e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4793e1f7de0cSMatt Gates break; 4794e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4795e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4796e1f7de0cSMatt Gates break; 4797e1f7de0cSMatt Gates case DMA_NONE: 4798e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4799e1f7de0cSMatt Gates break; 4800e1f7de0cSMatt Gates default: 4801e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4802e1f7de0cSMatt Gates cmd->sc_data_direction); 4803e1f7de0cSMatt Gates BUG(); 4804e1f7de0cSMatt Gates break; 4805e1f7de0cSMatt Gates } 4806e1f7de0cSMatt Gates } else { 4807e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4808e1f7de0cSMatt Gates } 4809e1f7de0cSMatt Gates 4810c349775eSScott Teel c->Header.SGList = use_sg; 4811e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 48122b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 48132b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 48142b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 48152b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 48162b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4817283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4818283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4819c349775eSScott Teel /* Tag was already set at init time. */ 4820e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4821e1f7de0cSMatt Gates return 0; 4822e1f7de0cSMatt Gates } 4823edd16368SStephen M. Cameron 4824283b4a9bSStephen M. Cameron /* 4825283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4826283b4a9bSStephen M. Cameron * I/O accelerator path. 4827283b4a9bSStephen M. Cameron */ 4828283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4829283b4a9bSStephen M. Cameron struct CommandList *c) 4830283b4a9bSStephen M. Cameron { 4831283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4832283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4833283b4a9bSStephen M. Cameron 483445e596cdSDon Brace if (!dev) 483545e596cdSDon Brace return -1; 483645e596cdSDon Brace 483703383736SDon Brace c->phys_disk = dev; 483803383736SDon Brace 4839c5dfd106SDon Brace if (dev->in_reset) 4840c5dfd106SDon Brace return -1; 4841c5dfd106SDon Brace 4842283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 484303383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4844283b4a9bSStephen M. Cameron } 4845283b4a9bSStephen M. Cameron 4846dd0e19f3SScott Teel /* 4847dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4848dd0e19f3SScott Teel */ 4849dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4850dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4851dd0e19f3SScott Teel { 4852dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4853dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4854dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4855dd0e19f3SScott Teel u64 first_block; 4856dd0e19f3SScott Teel 4857dd0e19f3SScott Teel /* Are we doing encryption on this device */ 48582b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4859dd0e19f3SScott Teel return; 4860dd0e19f3SScott Teel /* Set the data encryption key index. */ 4861dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4862dd0e19f3SScott Teel 4863dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4864dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4865dd0e19f3SScott Teel 4866dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4867dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4868dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4869dd0e19f3SScott Teel */ 4870dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4871dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4872dd0e19f3SScott Teel case READ_6: 4873abbada71SMahesh Rajashekhara case WRITE_6: 4874abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4875abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4876abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4877dd0e19f3SScott Teel break; 4878dd0e19f3SScott Teel case WRITE_10: 4879dd0e19f3SScott Teel case READ_10: 4880dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4881dd0e19f3SScott Teel case WRITE_12: 4882dd0e19f3SScott Teel case READ_12: 48832b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4884dd0e19f3SScott Teel break; 4885dd0e19f3SScott Teel case WRITE_16: 4886dd0e19f3SScott Teel case READ_16: 48872b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4888dd0e19f3SScott Teel break; 4889dd0e19f3SScott Teel default: 4890dd0e19f3SScott Teel dev_err(&h->pdev->dev, 48912b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 48922b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4893dd0e19f3SScott Teel BUG(); 4894dd0e19f3SScott Teel break; 4895dd0e19f3SScott Teel } 48962b08b3e9SDon Brace 48972b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 48982b08b3e9SDon Brace first_block = first_block * 48992b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 49002b08b3e9SDon Brace 49012b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 49022b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4903dd0e19f3SScott Teel } 4904dd0e19f3SScott Teel 4905c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4906c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 490703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4908c349775eSScott Teel { 4909c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4910c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4911c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4912c349775eSScott Teel int use_sg, i; 4913c349775eSScott Teel struct scatterlist *sg; 4914c349775eSScott Teel u64 addr64; 4915c349775eSScott Teel u32 len; 4916c349775eSScott Teel u32 total_len = 0; 4917c349775eSScott Teel 491845e596cdSDon Brace if (!cmd->device) 491945e596cdSDon Brace return -1; 492045e596cdSDon Brace 492145e596cdSDon Brace if (!cmd->device->hostdata) 492245e596cdSDon Brace return -1; 492345e596cdSDon Brace 4924d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4925c349775eSScott Teel 4926b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4927b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4928b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4929b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4930b63c64acSDon Brace } 4931b63c64acSDon Brace 493203383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 493303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4934c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 493503383736SDon Brace } 493603383736SDon Brace 4937c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4938c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4939c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4940c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4941c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4942c349775eSScott Teel 4943c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4944c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4945c349775eSScott Teel 4946c349775eSScott Teel use_sg = scsi_dma_map(cmd); 494703383736SDon Brace if (use_sg < 0) { 494803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4949c349775eSScott Teel return use_sg; 495003383736SDon Brace } 4951c349775eSScott Teel 4952c349775eSScott Teel if (use_sg) { 4953c349775eSScott Teel curr_sg = cp->sg; 4954d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4955d9a729f3SWebb Scales addr64 = le64_to_cpu( 4956d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4957d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4958d9a729f3SWebb Scales curr_sg->length = 0; 4959d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4960d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4961d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4962625d7d35SDon Brace curr_sg->chain_indicator = IOACCEL2_CHAIN; 4963d9a729f3SWebb Scales 4964d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4965d9a729f3SWebb Scales } 4966c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4967c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4968c349775eSScott Teel len = sg_dma_len(sg); 4969c349775eSScott Teel total_len += len; 4970c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4971c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4972c349775eSScott Teel curr_sg->reserved[0] = 0; 4973c349775eSScott Teel curr_sg->reserved[1] = 0; 4974c349775eSScott Teel curr_sg->reserved[2] = 0; 4975c349775eSScott Teel curr_sg->chain_indicator = 0; 4976c349775eSScott Teel curr_sg++; 4977c349775eSScott Teel } 4978c349775eSScott Teel 4979625d7d35SDon Brace /* 4980625d7d35SDon Brace * Set the last s/g element bit 4981625d7d35SDon Brace */ 4982625d7d35SDon Brace (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG; 4983625d7d35SDon Brace 4984c349775eSScott Teel switch (cmd->sc_data_direction) { 4985c349775eSScott Teel case DMA_TO_DEVICE: 4986dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4987dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4988c349775eSScott Teel break; 4989c349775eSScott Teel case DMA_FROM_DEVICE: 4990dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4991dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4992c349775eSScott Teel break; 4993c349775eSScott Teel case DMA_NONE: 4994dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4995dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4996c349775eSScott Teel break; 4997c349775eSScott Teel default: 4998c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4999c349775eSScott Teel cmd->sc_data_direction); 5000c349775eSScott Teel BUG(); 5001c349775eSScott Teel break; 5002c349775eSScott Teel } 5003c349775eSScott Teel } else { 5004dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 5005dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 5006c349775eSScott Teel } 5007dd0e19f3SScott Teel 5008dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 5009dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 5010dd0e19f3SScott Teel 50112b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 5012f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 5013c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 5014c349775eSScott Teel 5015c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 5016c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 5017c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 501850a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 5019c349775eSScott Teel 5020d9a729f3SWebb Scales /* fill in sg elements */ 5021d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 5022d9a729f3SWebb Scales cp->sg_count = 1; 5023a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 5024d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 5025d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 5026d9a729f3SWebb Scales scsi_dma_unmap(cmd); 5027d9a729f3SWebb Scales return -1; 5028d9a729f3SWebb Scales } 5029d9a729f3SWebb Scales } else 5030d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 5031d9a729f3SWebb Scales 5032c5dfd106SDon Brace if (phys_disk->in_reset) { 5033c5dfd106SDon Brace cmd->result = DID_RESET << 16; 5034c5dfd106SDon Brace return -1; 5035c5dfd106SDon Brace } 5036c5dfd106SDon Brace 5037c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 5038c349775eSScott Teel return 0; 5039c349775eSScott Teel } 5040c349775eSScott Teel 5041c349775eSScott Teel /* 5042c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 5043c349775eSScott Teel */ 5044c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5045c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 504603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5047c349775eSScott Teel { 504845e596cdSDon Brace if (!c->scsi_cmd->device) 504945e596cdSDon Brace return -1; 505045e596cdSDon Brace 505145e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 505245e596cdSDon Brace return -1; 505345e596cdSDon Brace 5054c5dfd106SDon Brace if (phys_disk->in_reset) 5055c5dfd106SDon Brace return -1; 5056c5dfd106SDon Brace 505703383736SDon Brace /* Try to honor the device's queue depth */ 505803383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 505903383736SDon Brace phys_disk->queue_depth) { 506003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 506103383736SDon Brace return IO_ACCEL_INELIGIBLE; 506203383736SDon Brace } 5063c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 5064c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 506503383736SDon Brace cdb, cdb_len, scsi3addr, 506603383736SDon Brace phys_disk); 5067c349775eSScott Teel else 5068c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 506903383736SDon Brace cdb, cdb_len, scsi3addr, 507003383736SDon Brace phys_disk); 5071c349775eSScott Teel } 5072c349775eSScott Teel 50736b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 50746b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 50756b80b18fSScott Teel { 50766b80b18fSScott Teel if (offload_to_mirror == 0) { 50776b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 50782b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 50796b80b18fSScott Teel return; 50806b80b18fSScott Teel } 50816b80b18fSScott Teel do { 50826b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 50832b08b3e9SDon Brace *current_group = *map_index / 50842b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 50856b80b18fSScott Teel if (offload_to_mirror == *current_group) 50866b80b18fSScott Teel continue; 50872b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 50886b80b18fSScott Teel /* select map index from next group */ 50892b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 50906b80b18fSScott Teel (*current_group)++; 50916b80b18fSScott Teel } else { 50926b80b18fSScott Teel /* select map index from first group */ 50932b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 50946b80b18fSScott Teel *current_group = 0; 50956b80b18fSScott Teel } 50966b80b18fSScott Teel } while (offload_to_mirror != *current_group); 50976b80b18fSScott Teel } 50986b80b18fSScott Teel 5099283b4a9bSStephen M. Cameron /* 5100283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 5101283b4a9bSStephen M. Cameron */ 5102283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5103283b4a9bSStephen M. Cameron struct CommandList *c) 5104283b4a9bSStephen M. Cameron { 5105283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 5106283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5107283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 5108283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 5109283b4a9bSStephen M. Cameron int is_write = 0; 5110283b4a9bSStephen M. Cameron u32 map_index; 5111283b4a9bSStephen M. Cameron u64 first_block, last_block; 5112283b4a9bSStephen M. Cameron u32 block_cnt; 5113283b4a9bSStephen M. Cameron u32 blocks_per_row; 5114283b4a9bSStephen M. Cameron u64 first_row, last_row; 5115283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 5116283b4a9bSStephen M. Cameron u32 first_column, last_column; 51176b80b18fSScott Teel u64 r0_first_row, r0_last_row; 51186b80b18fSScott Teel u32 r5or6_blocks_per_row; 51196b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 51206b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 51216b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 51226b80b18fSScott Teel u32 total_disks_per_row; 51236b80b18fSScott Teel u32 stripesize; 51246b80b18fSScott Teel u32 first_group, last_group, current_group; 5125283b4a9bSStephen M. Cameron u32 map_row; 5126283b4a9bSStephen M. Cameron u32 disk_handle; 5127283b4a9bSStephen M. Cameron u64 disk_block; 5128283b4a9bSStephen M. Cameron u32 disk_block_cnt; 5129283b4a9bSStephen M. Cameron u8 cdb[16]; 5130283b4a9bSStephen M. Cameron u8 cdb_len; 51312b08b3e9SDon Brace u16 strip_size; 5132283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5133283b4a9bSStephen M. Cameron u64 tmpdiv; 5134283b4a9bSStephen M. Cameron #endif 51356b80b18fSScott Teel int offload_to_mirror; 5136283b4a9bSStephen M. Cameron 513745e596cdSDon Brace if (!dev) 513845e596cdSDon Brace return -1; 513945e596cdSDon Brace 5140c5dfd106SDon Brace if (dev->in_reset) 5141c5dfd106SDon Brace return -1; 5142c5dfd106SDon Brace 5143283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 5144283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 5145283b4a9bSStephen M. Cameron case WRITE_6: 5146283b4a9bSStephen M. Cameron is_write = 1; 5147df561f66SGustavo A. R. Silva fallthrough; 5148283b4a9bSStephen M. Cameron case READ_6: 5149abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5150abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5151abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5152283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 51533fa89a04SStephen M. Cameron if (block_cnt == 0) 51543fa89a04SStephen M. Cameron block_cnt = 256; 5155283b4a9bSStephen M. Cameron break; 5156283b4a9bSStephen M. Cameron case WRITE_10: 5157283b4a9bSStephen M. Cameron is_write = 1; 5158df561f66SGustavo A. R. Silva fallthrough; 5159283b4a9bSStephen M. Cameron case READ_10: 5160283b4a9bSStephen M. Cameron first_block = 5161283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5162283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5163283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5164283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5165283b4a9bSStephen M. Cameron block_cnt = 5166283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5167283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5168283b4a9bSStephen M. Cameron break; 5169283b4a9bSStephen M. Cameron case WRITE_12: 5170283b4a9bSStephen M. Cameron is_write = 1; 5171df561f66SGustavo A. R. Silva fallthrough; 5172283b4a9bSStephen M. Cameron case READ_12: 5173283b4a9bSStephen M. Cameron first_block = 5174283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5175283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5176283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5177283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5178283b4a9bSStephen M. Cameron block_cnt = 5179283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5180283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5181283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5182283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5183283b4a9bSStephen M. Cameron break; 5184283b4a9bSStephen M. Cameron case WRITE_16: 5185283b4a9bSStephen M. Cameron is_write = 1; 5186df561f66SGustavo A. R. Silva fallthrough; 5187283b4a9bSStephen M. Cameron case READ_16: 5188283b4a9bSStephen M. Cameron first_block = 5189283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5190283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5191283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5192283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5193283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5194283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5195283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5196283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5197283b4a9bSStephen M. Cameron block_cnt = 5198283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5199283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5200283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5201283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5202283b4a9bSStephen M. Cameron break; 5203283b4a9bSStephen M. Cameron default: 5204283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5205283b4a9bSStephen M. Cameron } 5206283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5207283b4a9bSStephen M. Cameron 5208283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5209283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5210283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5211283b4a9bSStephen M. Cameron 5212283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 52132b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 52142b08b3e9SDon Brace last_block < first_block) 5215283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5216283b4a9bSStephen M. Cameron 5217283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 52182b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 52192b08b3e9SDon Brace le16_to_cpu(map->strip_size); 52202b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5221283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5222283b4a9bSStephen M. Cameron tmpdiv = first_block; 5223283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5224283b4a9bSStephen M. Cameron first_row = tmpdiv; 5225283b4a9bSStephen M. Cameron tmpdiv = last_block; 5226283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5227283b4a9bSStephen M. Cameron last_row = tmpdiv; 5228283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5229283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5230283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 52312b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5232283b4a9bSStephen M. Cameron first_column = tmpdiv; 5233283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 52342b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5235283b4a9bSStephen M. Cameron last_column = tmpdiv; 5236283b4a9bSStephen M. Cameron #else 5237283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5238283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5239283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5240283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 52412b08b3e9SDon Brace first_column = first_row_offset / strip_size; 52422b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5243283b4a9bSStephen M. Cameron #endif 5244283b4a9bSStephen M. Cameron 5245283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5246283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5247283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5248283b4a9bSStephen M. Cameron 5249283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 52502b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 52512b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5252283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52532b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52546b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 52556b80b18fSScott Teel 52566b80b18fSScott Teel switch (dev->raid_level) { 52576b80b18fSScott Teel case HPSA_RAID_0: 52586b80b18fSScott Teel break; /* nothing special to do */ 52596b80b18fSScott Teel case HPSA_RAID_1: 52606b80b18fSScott Teel /* Handles load balance across RAID 1 members. 52616b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 52626b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 52633e16e83aSDon Brace * Ensure we have the correct raid_map. 5264283b4a9bSStephen M. Cameron */ 52653e16e83aSDon Brace if (le16_to_cpu(map->layout_map_count) != 2) { 52663e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 52673e16e83aSDon Brace return IO_ACCEL_INELIGIBLE; 52683e16e83aSDon Brace } 5269283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 52702b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5271283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 52726b80b18fSScott Teel break; 52736b80b18fSScott Teel case HPSA_RAID_ADM: 52746b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 52756b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 52763e16e83aSDon Brace * Ensure we have the correct raid_map. 52776b80b18fSScott Teel */ 52783e16e83aSDon Brace if (le16_to_cpu(map->layout_map_count) != 3) { 52793e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 52803e16e83aSDon Brace return IO_ACCEL_INELIGIBLE; 52813e16e83aSDon Brace } 52826b80b18fSScott Teel 52836b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 52846b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 52856b80b18fSScott Teel &map_index, ¤t_group); 52866b80b18fSScott Teel /* set mirror group to use next time */ 52876b80b18fSScott Teel offload_to_mirror = 52882b08b3e9SDon Brace (offload_to_mirror >= 52892b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 52906b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 52916b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 52926b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 52936b80b18fSScott Teel * function since multiple threads might simultaneously 52946b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 52956b80b18fSScott Teel */ 52966b80b18fSScott Teel break; 52976b80b18fSScott Teel case HPSA_RAID_5: 52986b80b18fSScott Teel case HPSA_RAID_6: 52992b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 53006b80b18fSScott Teel break; 53016b80b18fSScott Teel 53026b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 53036b80b18fSScott Teel r5or6_blocks_per_row = 53042b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 53052b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 53063e16e83aSDon Brace if (r5or6_blocks_per_row == 0) { 53073e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 53083e16e83aSDon Brace return IO_ACCEL_INELIGIBLE; 53093e16e83aSDon Brace } 53102b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 53112b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 53126b80b18fSScott Teel #if BITS_PER_LONG == 32 53136b80b18fSScott Teel tmpdiv = first_block; 53146b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 53156b80b18fSScott Teel tmpdiv = first_group; 53166b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 53176b80b18fSScott Teel first_group = tmpdiv; 53186b80b18fSScott Teel tmpdiv = last_block; 53196b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 53206b80b18fSScott Teel tmpdiv = last_group; 53216b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 53226b80b18fSScott Teel last_group = tmpdiv; 53236b80b18fSScott Teel #else 53246b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 53256b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 53266b80b18fSScott Teel #endif 5327000ff7c2SStephen M. Cameron if (first_group != last_group) 53286b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53296b80b18fSScott Teel 53306b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 53316b80b18fSScott Teel #if BITS_PER_LONG == 32 53326b80b18fSScott Teel tmpdiv = first_block; 53336b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 53346b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 53356b80b18fSScott Teel tmpdiv = last_block; 53366b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 53376b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 53386b80b18fSScott Teel #else 53396b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 53406b80b18fSScott Teel first_block / stripesize; 53416b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 53426b80b18fSScott Teel #endif 53436b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 53446b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53456b80b18fSScott Teel 53466b80b18fSScott Teel 53476b80b18fSScott Teel /* Verify request is in a single column */ 53486b80b18fSScott Teel #if BITS_PER_LONG == 32 53496b80b18fSScott Teel tmpdiv = first_block; 53506b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 53516b80b18fSScott Teel tmpdiv = first_row_offset; 53526b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 53536b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 53546b80b18fSScott Teel tmpdiv = last_block; 53556b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 53566b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 53576b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 53586b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 53596b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 53606b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 53616b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 53626b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 53636b80b18fSScott Teel r5or6_last_column = tmpdiv; 53646b80b18fSScott Teel #else 53656b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 53666b80b18fSScott Teel (u32)((first_block % stripesize) % 53676b80b18fSScott Teel r5or6_blocks_per_row); 53686b80b18fSScott Teel 53696b80b18fSScott Teel r5or6_last_row_offset = 53706b80b18fSScott Teel (u32)((last_block % stripesize) % 53716b80b18fSScott Teel r5or6_blocks_per_row); 53726b80b18fSScott Teel 53736b80b18fSScott Teel first_column = r5or6_first_column = 53742b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 53756b80b18fSScott Teel r5or6_last_column = 53762b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 53776b80b18fSScott Teel #endif 53786b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 53796b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53806b80b18fSScott Teel 53816b80b18fSScott Teel /* Request is eligible */ 53826b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 53832b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 53846b80b18fSScott Teel 53856b80b18fSScott Teel map_index = (first_group * 53862b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 53876b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 53886b80b18fSScott Teel break; 53896b80b18fSScott Teel default: 53906b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5391283b4a9bSStephen M. Cameron } 53926b80b18fSScott Teel 539307543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 539407543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 539507543e0cSStephen Cameron 539603383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5397c3390df4SDon Brace if (!c->phys_disk) 5398c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 539903383736SDon Brace 5400283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 54012b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 54022b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 54032b08b3e9SDon Brace (first_row_offset - first_column * 54042b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5405283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5406283b4a9bSStephen M. Cameron 5407283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5408283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5409283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5410283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5411283b4a9bSStephen M. Cameron } 5412283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5413283b4a9bSStephen M. Cameron 5414283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5415283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5416283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5417283b4a9bSStephen M. Cameron cdb[1] = 0; 5418283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5419283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5420283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5421283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5422283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5423283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5424283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5425283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5426283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5427283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5428283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5429283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5430283b4a9bSStephen M. Cameron cdb[14] = 0; 5431283b4a9bSStephen M. Cameron cdb[15] = 0; 5432283b4a9bSStephen M. Cameron cdb_len = 16; 5433283b4a9bSStephen M. Cameron } else { 5434283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5435283b4a9bSStephen M. Cameron cdb[1] = 0; 5436283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5437283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5438283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5439283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5440283b4a9bSStephen M. Cameron cdb[6] = 0; 5441283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5442283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5443283b4a9bSStephen M. Cameron cdb[9] = 0; 5444283b4a9bSStephen M. Cameron cdb_len = 10; 5445283b4a9bSStephen M. Cameron } 5446283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 544703383736SDon Brace dev->scsi3addr, 544803383736SDon Brace dev->phys_disk[map_index]); 5449283b4a9bSStephen M. Cameron } 5450283b4a9bSStephen M. Cameron 545125163bd5SWebb Scales /* 545225163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 545325163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 545425163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 545525163bd5SWebb Scales */ 5456574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5457574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5458c5dfd106SDon Brace struct hpsa_scsi_dev_t *dev) 5459edd16368SStephen M. Cameron { 5460edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5461edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5462edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5463edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5464c5dfd106SDon Brace memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8); 5465f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5466edd16368SStephen M. Cameron 5467edd16368SStephen M. Cameron /* Fill in the request block... */ 5468edd16368SStephen M. Cameron 5469edd16368SStephen M. Cameron c->Request.Timeout = 0; 5470edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5471edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5472edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5473edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5474edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5475a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5476a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5477edd16368SStephen M. Cameron break; 5478edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5479a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5480a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5481edd16368SStephen M. Cameron break; 5482edd16368SStephen M. Cameron case DMA_NONE: 5483a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5484a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5485edd16368SStephen M. Cameron break; 5486edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5487edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5488edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5489edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5490edd16368SStephen M. Cameron */ 5491edd16368SStephen M. Cameron 5492a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5493a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5494edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5495edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5496edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5497edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5498edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5499edd16368SStephen M. Cameron * our purposes here. 5500edd16368SStephen M. Cameron */ 5501edd16368SStephen M. Cameron 5502edd16368SStephen M. Cameron break; 5503edd16368SStephen M. Cameron 5504edd16368SStephen M. Cameron default: 5505edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5506edd16368SStephen M. Cameron cmd->sc_data_direction); 5507edd16368SStephen M. Cameron BUG(); 5508edd16368SStephen M. Cameron break; 5509edd16368SStephen M. Cameron } 5510edd16368SStephen M. Cameron 551133a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 551273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5513edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5514edd16368SStephen M. Cameron } 5515c5dfd106SDon Brace 5516c5dfd106SDon Brace if (dev->in_reset) { 5517c5dfd106SDon Brace hpsa_cmd_resolve_and_free(h, c); 5518c5dfd106SDon Brace return SCSI_MLQUEUE_HOST_BUSY; 5519c5dfd106SDon Brace } 5520c5dfd106SDon Brace 552113499345SDon Brace c->device = dev; 552213499345SDon Brace 5523edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5524edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5525edd16368SStephen M. Cameron return 0; 5526edd16368SStephen M. Cameron } 5527edd16368SStephen M. Cameron 5528360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5529360c73bdSStephen Cameron struct CommandList *c) 5530360c73bdSStephen Cameron { 5531360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5532360c73bdSStephen Cameron 5533360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5534360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5535360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5536360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5537360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5538360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5539360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5540360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5541360c73bdSStephen Cameron c->cmdindex = index; 5542360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5543360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5544360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5545360c73bdSStephen Cameron c->h = h; 5546a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5547360c73bdSStephen Cameron } 5548360c73bdSStephen Cameron 5549360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5550360c73bdSStephen Cameron { 5551360c73bdSStephen Cameron int i; 5552360c73bdSStephen Cameron 5553360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5554360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5555360c73bdSStephen Cameron 5556360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5557360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5558360c73bdSStephen Cameron } 5559360c73bdSStephen Cameron } 5560360c73bdSStephen Cameron 5561360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5562360c73bdSStephen Cameron struct CommandList *c) 5563360c73bdSStephen Cameron { 5564360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5565360c73bdSStephen Cameron 556673153fe5SWebb Scales BUG_ON(c->cmdindex != index); 556773153fe5SWebb Scales 5568360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5569360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5570360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5571360c73bdSStephen Cameron } 5572360c73bdSStephen Cameron 5573592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5574f749d8b7SDon Brace struct CommandList *c, struct scsi_cmnd *cmd, 5575f749d8b7SDon Brace bool retry) 5576592a0ad5SWebb Scales { 5577592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5578592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5579592a0ad5SWebb Scales 558045e596cdSDon Brace if (!dev) 558145e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 558245e596cdSDon Brace 5583c5dfd106SDon Brace if (dev->in_reset) 5584c5dfd106SDon Brace return SCSI_MLQUEUE_HOST_BUSY; 5585c5dfd106SDon Brace 5586a68fdb3aSDon Brace if (hpsa_simple_mode) 5587a68fdb3aSDon Brace return IO_ACCEL_INELIGIBLE; 5588a68fdb3aSDon Brace 5589592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5590592a0ad5SWebb Scales 5591592a0ad5SWebb Scales if (dev->offload_enabled) { 5592f749d8b7SDon Brace hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */ 5593592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5594592a0ad5SWebb Scales c->scsi_cmd = cmd; 559513499345SDon Brace c->device = dev; 5596f749d8b7SDon Brace if (retry) /* Resubmit but do not increment device->commands_outstanding. */ 5597f749d8b7SDon Brace c->retry_pending = true; 5598592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5599592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5600592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5601a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5602f749d8b7SDon Brace hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */ 5603592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5604592a0ad5SWebb Scales c->scsi_cmd = cmd; 560513499345SDon Brace c->device = dev; 5606f749d8b7SDon Brace if (retry) /* Resubmit but do not increment device->commands_outstanding. */ 5607f749d8b7SDon Brace c->retry_pending = true; 5608592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5609592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5610592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5611592a0ad5SWebb Scales } 5612592a0ad5SWebb Scales return rc; 5613592a0ad5SWebb Scales } 5614592a0ad5SWebb Scales 5615080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5616080ef1ccSDon Brace { 5617080ef1ccSDon Brace struct scsi_cmnd *cmd; 5618080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 56198a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5620080ef1ccSDon Brace 5621080ef1ccSDon Brace cmd = c->scsi_cmd; 5622080ef1ccSDon Brace dev = cmd->device->hostdata; 5623080ef1ccSDon Brace if (!dev) { 5624080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 56258a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5626080ef1ccSDon Brace } 5627c5dfd106SDon Brace 5628c5dfd106SDon Brace if (dev->in_reset) { 5629c5dfd106SDon Brace cmd->result = DID_RESET << 16; 5630d2315ce6SDon Brace return hpsa_cmd_free_and_done(c->h, c, cmd); 5631c5dfd106SDon Brace } 5632c5dfd106SDon Brace 5633592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5634592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5635592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5636592a0ad5SWebb Scales int rc; 5637592a0ad5SWebb Scales 5638592a0ad5SWebb Scales if (c2->error_data.serv_response == 5639592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5640f749d8b7SDon Brace /* Resubmit with the retry_pending flag set. */ 5641f749d8b7SDon Brace rc = hpsa_ioaccel_submit(h, c, cmd, true); 5642592a0ad5SWebb Scales if (rc == 0) 5643592a0ad5SWebb Scales return; 5644592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5645592a0ad5SWebb Scales /* 5646592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5647592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5648592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5649592a0ad5SWebb Scales */ 5650592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 56518a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5652592a0ad5SWebb Scales } 5653592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5654592a0ad5SWebb Scales } 5655592a0ad5SWebb Scales } 5656360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5657f749d8b7SDon Brace /* 5658f749d8b7SDon Brace * Here we have not come in though queue_command, so we 5659f749d8b7SDon Brace * can set the retry_pending flag to true for a driver initiated 5660f749d8b7SDon Brace * retry attempt (I.E. not a SML retry). 5661f749d8b7SDon Brace * I.E. We are submitting a driver initiated retry. 5662f749d8b7SDon Brace * Note: hpsa_ciss_submit does not zero out the command fields like 5663f749d8b7SDon Brace * ioaccel submit does. 5664f749d8b7SDon Brace */ 5665f749d8b7SDon Brace c->retry_pending = true; 5666c5dfd106SDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev)) { 5667080ef1ccSDon Brace /* 5668080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5669080ef1ccSDon Brace * again via scsi mid layer, which will then get 5670080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5671592a0ad5SWebb Scales * 5672592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5673592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5674080ef1ccSDon Brace */ 5675080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 567682f01edcSBart Van Assche scsi_done(cmd); 5677080ef1ccSDon Brace } 5678080ef1ccSDon Brace } 5679080ef1ccSDon Brace 5680574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5681574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5682574f05d3SStephen Cameron { 5683574f05d3SStephen Cameron struct ctlr_info *h; 5684574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5685574f05d3SStephen Cameron struct CommandList *c; 5686574f05d3SStephen Cameron int rc = 0; 5687574f05d3SStephen Cameron 5688574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5689574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 569073153fe5SWebb Scales 569184090d42SBart Van Assche BUG_ON(scsi_cmd_to_rq(cmd)->tag < 0); 569273153fe5SWebb Scales 5693574f05d3SStephen Cameron dev = cmd->device->hostdata; 5694574f05d3SStephen Cameron if (!dev) { 56951ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 569682f01edcSBart Van Assche scsi_done(cmd); 5697ba74fdc4SDon Brace return 0; 5698ba74fdc4SDon Brace } 5699ba74fdc4SDon Brace 5700ba74fdc4SDon Brace if (dev->removed) { 5701574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 570282f01edcSBart Van Assche scsi_done(cmd); 5703574f05d3SStephen Cameron return 0; 5704574f05d3SStephen Cameron } 570573153fe5SWebb Scales 5706574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 570725163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 570882f01edcSBart Van Assche scsi_done(cmd); 5709574f05d3SStephen Cameron return 0; 5710574f05d3SStephen Cameron } 5711c5dfd106SDon Brace 5712c5dfd106SDon Brace if (dev->in_reset) 5713c5dfd106SDon Brace return SCSI_MLQUEUE_DEVICE_BUSY; 5714c5dfd106SDon Brace 571573153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 57164770e68dSDon Brace if (c == NULL) 57174770e68dSDon Brace return SCSI_MLQUEUE_DEVICE_BUSY; 5718574f05d3SStephen Cameron 5719407863cbSStephen Cameron /* 5720eeebce18SDon Brace * This is necessary because the SML doesn't zero out this field during 5721eeebce18SDon Brace * error recovery. 5722eeebce18SDon Brace */ 5723eeebce18SDon Brace cmd->result = 0; 5724eeebce18SDon Brace 5725eeebce18SDon Brace /* 5726407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5727574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5728f749d8b7SDon Brace * Note: If cmd->retries is non-zero, then this is a SML 5729f749d8b7SDon Brace * initiated retry and not a driver initiated retry. 5730f749d8b7SDon Brace * This command has been obtained from cmd_tagged_alloc 5731f749d8b7SDon Brace * and is therefore a brand-new command. 5732574f05d3SStephen Cameron */ 5733574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 573484090d42SBart Van Assche !blk_rq_is_passthrough(scsi_cmd_to_rq(cmd)) && 5735574f05d3SStephen Cameron h->acciopath_status)) { 5736f749d8b7SDon Brace /* Submit with the retry_pending flag unset. */ 5737f749d8b7SDon Brace rc = hpsa_ioaccel_submit(h, c, cmd, false); 5738574f05d3SStephen Cameron if (rc == 0) 5739592a0ad5SWebb Scales return 0; 5740592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 574173153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5742574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5743574f05d3SStephen Cameron } 5744574f05d3SStephen Cameron } 5745c5dfd106SDon Brace return hpsa_ciss_submit(h, c, cmd, dev); 5746574f05d3SStephen Cameron } 5747574f05d3SStephen Cameron 57488ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 57495f389360SStephen M. Cameron { 57505f389360SStephen M. Cameron unsigned long flags; 57515f389360SStephen M. Cameron 57525f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 57535f389360SStephen M. Cameron h->scan_finished = 1; 575487b9e6aaSDon Brace wake_up(&h->scan_wait_queue); 57555f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 57565f389360SStephen M. Cameron } 57575f389360SStephen M. Cameron 5758a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5759a08a8471SStephen M. Cameron { 5760a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5761a08a8471SStephen M. Cameron unsigned long flags; 5762a08a8471SStephen M. Cameron 57638ebc9248SWebb Scales /* 57648ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 57658ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 57668ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 57678ebc9248SWebb Scales * piling up on a locked up controller. 57688ebc9248SWebb Scales */ 57698ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 57708ebc9248SWebb Scales return hpsa_scan_complete(h); 57715f389360SStephen M. Cameron 577287b9e6aaSDon Brace /* 577387b9e6aaSDon Brace * If a scan is already waiting to run, no need to add another 577487b9e6aaSDon Brace */ 577587b9e6aaSDon Brace spin_lock_irqsave(&h->scan_lock, flags); 577687b9e6aaSDon Brace if (h->scan_waiting) { 577787b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 577887b9e6aaSDon Brace return; 577987b9e6aaSDon Brace } 578087b9e6aaSDon Brace 578187b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 578287b9e6aaSDon Brace 5783a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5784a08a8471SStephen M. Cameron while (1) { 5785a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5786a08a8471SStephen M. Cameron if (h->scan_finished) 5787a08a8471SStephen M. Cameron break; 578887b9e6aaSDon Brace h->scan_waiting = 1; 5789a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5790a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5791a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5792a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5793a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5794a08a8471SStephen M. Cameron * happen if we're in here. 5795a08a8471SStephen M. Cameron */ 5796a08a8471SStephen M. Cameron } 5797a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 579887b9e6aaSDon Brace h->scan_waiting = 0; 5799a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5800a08a8471SStephen M. Cameron 58018ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 58028ebc9248SWebb Scales return hpsa_scan_complete(h); 58035f389360SStephen M. Cameron 5804bfd7546cSDon Brace /* 5805bfd7546cSDon Brace * Do the scan after a reset completion 5806bfd7546cSDon Brace */ 5807c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5808bfd7546cSDon Brace if (h->reset_in_progress) { 5809bfd7546cSDon Brace h->drv_req_rescan = 1; 5810c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 58113b476aa2SDon Brace hpsa_scan_complete(h); 5812bfd7546cSDon Brace return; 5813bfd7546cSDon Brace } 5814c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5815bfd7546cSDon Brace 58168aa60681SDon Brace hpsa_update_scsi_devices(h); 5817a08a8471SStephen M. Cameron 58188ebc9248SWebb Scales hpsa_scan_complete(h); 5819a08a8471SStephen M. Cameron } 5820a08a8471SStephen M. Cameron 58217c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 58227c0a0229SDon Brace { 582303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 582403383736SDon Brace 582503383736SDon Brace if (!logical_drive) 582603383736SDon Brace return -ENODEV; 58277c0a0229SDon Brace 58287c0a0229SDon Brace if (qdepth < 1) 58297c0a0229SDon Brace qdepth = 1; 583003383736SDon Brace else if (qdepth > logical_drive->queue_depth) 583103383736SDon Brace qdepth = logical_drive->queue_depth; 583203383736SDon Brace 583303383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 58347c0a0229SDon Brace } 58357c0a0229SDon Brace 5836a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5837a08a8471SStephen M. Cameron unsigned long elapsed_time) 5838a08a8471SStephen M. Cameron { 5839a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5840a08a8471SStephen M. Cameron unsigned long flags; 5841a08a8471SStephen M. Cameron int finished; 5842a08a8471SStephen M. Cameron 5843a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5844a08a8471SStephen M. Cameron finished = h->scan_finished; 5845a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5846a08a8471SStephen M. Cameron return finished; 5847a08a8471SStephen M. Cameron } 5848a08a8471SStephen M. Cameron 58492946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5850edd16368SStephen M. Cameron { 5851b705690dSStephen M. Cameron struct Scsi_Host *sh; 5852edd16368SStephen M. Cameron 5853b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 58542946e82bSRobert Elliott if (sh == NULL) { 58552946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 58562946e82bSRobert Elliott return -ENOMEM; 58572946e82bSRobert Elliott } 5858b705690dSStephen M. Cameron 5859b705690dSStephen M. Cameron sh->io_port = 0; 5860b705690dSStephen M. Cameron sh->n_io_port = 0; 5861b705690dSStephen M. Cameron sh->this_id = -1; 5862b705690dSStephen M. Cameron sh->max_channel = 3; 5863b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5864b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5865b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 586641ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5867d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5868b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5869d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5870b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5871bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5872b705690dSStephen M. Cameron sh->unique_id = sh->irq; 587364d513acSChristoph Hellwig 58742946e82bSRobert Elliott h->scsi_host = sh; 58752946e82bSRobert Elliott return 0; 58762946e82bSRobert Elliott } 58772946e82bSRobert Elliott 58782946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 58792946e82bSRobert Elliott { 58802946e82bSRobert Elliott int rv; 58812946e82bSRobert Elliott 58822946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 58832946e82bSRobert Elliott if (rv) { 58842946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 58852946e82bSRobert Elliott return rv; 58862946e82bSRobert Elliott } 58872946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 58882946e82bSRobert Elliott return 0; 5889edd16368SStephen M. Cameron } 5890edd16368SStephen M. Cameron 5891b69324ffSWebb Scales /* 589273153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 589373153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 589473153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 589573153fe5SWebb Scales * low-numbered entries for our own uses.) 589673153fe5SWebb Scales */ 589773153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 589873153fe5SWebb Scales { 589984090d42SBart Van Assche int idx = scsi_cmd_to_rq(scmd)->tag; 590073153fe5SWebb Scales 590173153fe5SWebb Scales if (idx < 0) 590273153fe5SWebb Scales return idx; 590373153fe5SWebb Scales 590473153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 590573153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 590673153fe5SWebb Scales } 590773153fe5SWebb Scales 590873153fe5SWebb Scales /* 5909b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5910b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5911b69324ffSWebb Scales */ 5912b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5913b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5914b69324ffSWebb Scales int reply_queue) 5915edd16368SStephen M. Cameron { 59168919358eSTomas Henzl int rc; 5917edd16368SStephen M. Cameron 5918a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5919a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5920a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 59211edb6934SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 592225163bd5SWebb Scales if (rc) 5923b69324ffSWebb Scales return rc; 5924edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5925edd16368SStephen M. Cameron 5926b69324ffSWebb Scales /* Check if the unit is already ready. */ 5927edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5928b69324ffSWebb Scales return 0; 5929edd16368SStephen M. Cameron 5930b69324ffSWebb Scales /* 5931b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5932b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5933b69324ffSWebb Scales * looking for (but, success is good too). 5934b69324ffSWebb Scales */ 5935edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5936edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5937edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5938edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5939b69324ffSWebb Scales return 0; 5940b69324ffSWebb Scales 5941b69324ffSWebb Scales return 1; 5942b69324ffSWebb Scales } 5943b69324ffSWebb Scales 5944b69324ffSWebb Scales /* 5945b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5946b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5947b69324ffSWebb Scales */ 5948b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5949b69324ffSWebb Scales struct CommandList *c, 5950b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5951b69324ffSWebb Scales { 5952b69324ffSWebb Scales int rc; 5953b69324ffSWebb Scales int count = 0; 5954b69324ffSWebb Scales int waittime = 1; /* seconds */ 5955b69324ffSWebb Scales 5956b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5957b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5958b69324ffSWebb Scales 5959b69324ffSWebb Scales /* 5960b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5961b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5962b69324ffSWebb Scales */ 5963b69324ffSWebb Scales msleep(1000 * waittime); 5964b69324ffSWebb Scales 5965b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5966b69324ffSWebb Scales if (!rc) 5967edd16368SStephen M. Cameron break; 5968b69324ffSWebb Scales 5969b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5970b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5971b69324ffSWebb Scales waittime *= 2; 5972b69324ffSWebb Scales 5973b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5974b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5975b69324ffSWebb Scales waittime); 5976b69324ffSWebb Scales } 5977b69324ffSWebb Scales 5978b69324ffSWebb Scales return rc; 5979b69324ffSWebb Scales } 5980b69324ffSWebb Scales 5981b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5982b69324ffSWebb Scales unsigned char lunaddr[], 5983b69324ffSWebb Scales int reply_queue) 5984b69324ffSWebb Scales { 5985b69324ffSWebb Scales int first_queue; 5986b69324ffSWebb Scales int last_queue; 5987b69324ffSWebb Scales int rq; 5988b69324ffSWebb Scales int rc = 0; 5989b69324ffSWebb Scales struct CommandList *c; 5990b69324ffSWebb Scales 5991b69324ffSWebb Scales c = cmd_alloc(h); 5992b69324ffSWebb Scales 5993b69324ffSWebb Scales /* 5994b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5995b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5996b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5997b69324ffSWebb Scales */ 5998b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5999b69324ffSWebb Scales first_queue = 0; 6000b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 6001b69324ffSWebb Scales } else { 6002b69324ffSWebb Scales first_queue = reply_queue; 6003b69324ffSWebb Scales last_queue = reply_queue; 6004b69324ffSWebb Scales } 6005b69324ffSWebb Scales 6006b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 6007b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 6008b69324ffSWebb Scales if (rc) 6009b69324ffSWebb Scales break; 6010edd16368SStephen M. Cameron } 6011edd16368SStephen M. Cameron 6012edd16368SStephen M. Cameron if (rc) 6013edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 6014edd16368SStephen M. Cameron else 6015edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 6016edd16368SStephen M. Cameron 601745fcb86eSStephen Cameron cmd_free(h, c); 6018edd16368SStephen M. Cameron return rc; 6019edd16368SStephen M. Cameron } 6020edd16368SStephen M. Cameron 6021edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 6022edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 6023edd16368SStephen M. Cameron */ 6024edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 6025edd16368SStephen M. Cameron { 6026c59d04f3SDon Brace int rc = SUCCESS; 6027c5dfd106SDon Brace int i; 6028edd16368SStephen M. Cameron struct ctlr_info *h; 602936631157SColin Ian King struct hpsa_scsi_dev_t *dev = NULL; 60300b9b7b6eSScott Teel u8 reset_type; 60312dc127bbSDan Carpenter char msg[48]; 6032c59d04f3SDon Brace unsigned long flags; 6033edd16368SStephen M. Cameron 6034edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 6035edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 6036edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 6037edd16368SStephen M. Cameron return FAILED; 6038e345893bSDon Brace 6039c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 6040c59d04f3SDon Brace h->reset_in_progress = 1; 6041c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 6042c59d04f3SDon Brace 6043c59d04f3SDon Brace if (lockup_detected(h)) { 6044c59d04f3SDon Brace rc = FAILED; 6045c59d04f3SDon Brace goto return_reset_status; 6046c59d04f3SDon Brace } 6047e345893bSDon Brace 6048edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 6049edd16368SStephen M. Cameron if (!dev) { 6050d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 6051c59d04f3SDon Brace rc = FAILED; 6052c59d04f3SDon Brace goto return_reset_status; 6053edd16368SStephen M. Cameron } 605425163bd5SWebb Scales 6055c59d04f3SDon Brace if (dev->devtype == TYPE_ENCLOSURE) { 6056c59d04f3SDon Brace rc = SUCCESS; 6057c59d04f3SDon Brace goto return_reset_status; 6058c59d04f3SDon Brace } 6059ef8a5203SDon Brace 606025163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 606125163bd5SWebb Scales if (lockup_detected(h)) { 60622dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 60632dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 606473153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 606573153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6066c59d04f3SDon Brace rc = FAILED; 6067c59d04f3SDon Brace goto return_reset_status; 606825163bd5SWebb Scales } 606925163bd5SWebb Scales 607025163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 607125163bd5SWebb Scales if (detect_controller_lockup(h)) { 60722dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 60732dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 607473153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 607573153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6076c59d04f3SDon Brace rc = FAILED; 6077c59d04f3SDon Brace goto return_reset_status; 607825163bd5SWebb Scales } 607925163bd5SWebb Scales 6080d604f533SWebb Scales /* Do not attempt on controller */ 6081c59d04f3SDon Brace if (is_hba_lunid(dev->scsi3addr)) { 6082c59d04f3SDon Brace rc = SUCCESS; 6083c59d04f3SDon Brace goto return_reset_status; 6084c59d04f3SDon Brace } 6085d604f533SWebb Scales 60860b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 60870b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 60880b9b7b6eSScott Teel else 60890b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 60900b9b7b6eSScott Teel 60910b9b7b6eSScott Teel sprintf(msg, "resetting %s", 60920b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 60930b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 609425163bd5SWebb Scales 6095c5dfd106SDon Brace /* 6096c5dfd106SDon Brace * wait to see if any commands will complete before sending reset 6097c5dfd106SDon Brace */ 6098c5dfd106SDon Brace dev->in_reset = true; /* block any new cmds from OS for this device */ 6099c5dfd106SDon Brace for (i = 0; i < 10; i++) { 6100c5dfd106SDon Brace if (atomic_read(&dev->commands_outstanding) > 0) 6101c5dfd106SDon Brace msleep(1000); 6102c5dfd106SDon Brace else 6103c5dfd106SDon Brace break; 6104c5dfd106SDon Brace } 6105c5dfd106SDon Brace 6106edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 6107c5dfd106SDon Brace rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE); 6108c59d04f3SDon Brace if (rc == 0) 6109c59d04f3SDon Brace rc = SUCCESS; 6110c59d04f3SDon Brace else 6111c59d04f3SDon Brace rc = FAILED; 6112c59d04f3SDon Brace 61130b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 61140b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 6115c59d04f3SDon Brace rc == SUCCESS ? "completed successfully" : "failed"); 6116d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6117c59d04f3SDon Brace 6118c59d04f3SDon Brace return_reset_status: 6119c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 6120da03ded0SDon Brace h->reset_in_progress = 0; 6121c5dfd106SDon Brace if (dev) 6122c5dfd106SDon Brace dev->in_reset = false; 6123c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 6124c59d04f3SDon Brace return rc; 6125edd16368SStephen M. Cameron } 6126edd16368SStephen M. Cameron 6127edd16368SStephen M. Cameron /* 612873153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 612973153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 613073153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 613173153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 6132f749d8b7SDon Brace * This function is only called for new requests from queue_command. 613373153fe5SWebb Scales */ 613473153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 613573153fe5SWebb Scales struct scsi_cmnd *scmd) 613673153fe5SWebb Scales { 613773153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 613873153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 613973153fe5SWebb Scales 614073153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 614173153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 614273153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 614373153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 614473153fe5SWebb Scales * bounds, it's probably not our bug. 614573153fe5SWebb Scales */ 614673153fe5SWebb Scales BUG(); 614773153fe5SWebb Scales } 614873153fe5SWebb Scales 614973153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 615073153fe5SWebb Scales /* 615173153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 615273153fe5SWebb Scales * value. Thus, there should never be a collision here between 615373153fe5SWebb Scales * two requests...because if the selected command isn't idle 615473153fe5SWebb Scales * then someone is going to be very disappointed. 615573153fe5SWebb Scales */ 61564770e68dSDon Brace if (idx != h->last_collision_tag) { /* Print once per tag */ 61574770e68dSDon Brace dev_warn(&h->pdev->dev, 61584770e68dSDon Brace "%s: tag collision (tag=%d)\n", __func__, idx); 61594770e68dSDon Brace if (scmd) 616073153fe5SWebb Scales scsi_print_command(scmd); 61614770e68dSDon Brace h->last_collision_tag = idx; 616273153fe5SWebb Scales } 61634770e68dSDon Brace return NULL; 61644770e68dSDon Brace } 61654770e68dSDon Brace 61664770e68dSDon Brace atomic_inc(&c->refcount); 616773153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 6168f749d8b7SDon Brace 6169f749d8b7SDon Brace /* 6170f749d8b7SDon Brace * This is a new command obtained from queue_command so 6171f749d8b7SDon Brace * there have not been any driver initiated retry attempts. 6172f749d8b7SDon Brace */ 6173f749d8b7SDon Brace c->retry_pending = false; 6174f749d8b7SDon Brace 617573153fe5SWebb Scales return c; 617673153fe5SWebb Scales } 617773153fe5SWebb Scales 617873153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 617973153fe5SWebb Scales { 618073153fe5SWebb Scales /* 618173153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 618208ec46f6SDon Brace * else to free it, because it is accessed by index. 618373153fe5SWebb Scales */ 618473153fe5SWebb Scales (void)atomic_dec(&c->refcount); 618573153fe5SWebb Scales } 618673153fe5SWebb Scales 618773153fe5SWebb Scales /* 6188edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6189edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6190edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6191edd16368SStephen M. Cameron * cmd_free() is the complement. 6192bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6193bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6194edd16368SStephen M. Cameron */ 6195281a7fd0SWebb Scales 6196edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6197edd16368SStephen M. Cameron { 6198edd16368SStephen M. Cameron struct CommandList *c; 6199360c73bdSStephen Cameron int refcount, i; 620073153fe5SWebb Scales int offset = 0; 6201edd16368SStephen M. Cameron 620233811026SRobert Elliott /* 620333811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 62044c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 62054c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 62064c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 62074c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 62084c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 62094c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 62104c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 62114c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 621273153fe5SWebb Scales * 621373153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 621473153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 621573153fe5SWebb Scales * all works, since we have at least one command structure available; 621673153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 621773153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 621873153fe5SWebb Scales * layer will use the higher indexes. 62194c413128SStephen M. Cameron */ 62204c413128SStephen M. Cameron 6221281a7fd0SWebb Scales for (;;) { 622273153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 622373153fe5SWebb Scales HPSA_NRESERVED_CMDS, 622473153fe5SWebb Scales offset); 622573153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6226281a7fd0SWebb Scales offset = 0; 6227281a7fd0SWebb Scales continue; 6228281a7fd0SWebb Scales } 6229edd16368SStephen M. Cameron c = h->cmd_pool + i; 6230281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6231281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6232281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 623373153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6234281a7fd0SWebb Scales continue; 6235281a7fd0SWebb Scales } 6236e95b305aSChristophe JAILLET set_bit(i, h->cmd_pool_bits); 6237281a7fd0SWebb Scales break; /* it's ours now. */ 6238281a7fd0SWebb Scales } 6239360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6240c5dfd106SDon Brace c->device = NULL; 6241f749d8b7SDon Brace 6242f749d8b7SDon Brace /* 6243f749d8b7SDon Brace * cmd_alloc is for "internal" commands and they are never 6244f749d8b7SDon Brace * retried. 6245f749d8b7SDon Brace */ 6246f749d8b7SDon Brace c->retry_pending = false; 6247f749d8b7SDon Brace 6248edd16368SStephen M. Cameron return c; 6249edd16368SStephen M. Cameron } 6250edd16368SStephen M. Cameron 625173153fe5SWebb Scales /* 625273153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 625373153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 625473153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 625573153fe5SWebb Scales * the clear-bit is harmless. 625673153fe5SWebb Scales */ 6257edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6258edd16368SStephen M. Cameron { 6259281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6260edd16368SStephen M. Cameron int i; 6261edd16368SStephen M. Cameron 6262edd16368SStephen M. Cameron i = c - h->cmd_pool; 6263e95b305aSChristophe JAILLET clear_bit(i, h->cmd_pool_bits); 6264edd16368SStephen M. Cameron } 6265281a7fd0SWebb Scales } 6266edd16368SStephen M. Cameron 6267edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6268edd16368SStephen M. Cameron 62696f4e626fSNathan Chancellor static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd, 627042a91641SDon Brace void __user *arg) 6271edd16368SStephen M. Cameron { 627210100ffdSAl Viro struct ctlr_info *h = sdev_to_hba(dev); 627310100ffdSAl Viro IOCTL32_Command_struct __user *arg32 = arg; 6274edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6275edd16368SStephen M. Cameron int err; 6276edd16368SStephen M. Cameron u32 cp; 6277edd16368SStephen M. Cameron 627810100ffdSAl Viro if (!arg) 627910100ffdSAl Viro return -EINVAL; 628010100ffdSAl Viro 6281938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 628210100ffdSAl Viro if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf))) 628310100ffdSAl Viro return -EFAULT; 628410100ffdSAl Viro if (get_user(cp, &arg32->buf)) 628510100ffdSAl Viro return -EFAULT; 6286edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6287edd16368SStephen M. Cameron 628810100ffdSAl Viro if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 628910100ffdSAl Viro return -EAGAIN; 629010100ffdSAl Viro err = hpsa_passthru_ioctl(h, &arg64); 629110100ffdSAl Viro atomic_inc(&h->passthru_cmds_avail); 6292edd16368SStephen M. Cameron if (err) 6293edd16368SStephen M. Cameron return err; 629410100ffdSAl Viro if (copy_to_user(&arg32->error_info, &arg64.error_info, 629510100ffdSAl Viro sizeof(arg32->error_info))) 6296edd16368SStephen M. Cameron return -EFAULT; 629710100ffdSAl Viro return 0; 6298edd16368SStephen M. Cameron } 6299edd16368SStephen M. Cameron 6300edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 63016f4e626fSNathan Chancellor unsigned int cmd, void __user *arg) 6302edd16368SStephen M. Cameron { 630310100ffdSAl Viro struct ctlr_info *h = sdev_to_hba(dev); 630410100ffdSAl Viro BIG_IOCTL32_Command_struct __user *arg32 = arg; 6305edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6306edd16368SStephen M. Cameron int err; 6307edd16368SStephen M. Cameron u32 cp; 6308edd16368SStephen M. Cameron 630910100ffdSAl Viro if (!arg) 631010100ffdSAl Viro return -EINVAL; 6311938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 631210100ffdSAl Viro if (copy_from_user(&arg64, arg32, 631310100ffdSAl Viro offsetof(BIG_IOCTL32_Command_struct, buf))) 631410100ffdSAl Viro return -EFAULT; 631510100ffdSAl Viro if (get_user(cp, &arg32->buf)) 631610100ffdSAl Viro return -EFAULT; 6317edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6318edd16368SStephen M. Cameron 631910100ffdSAl Viro if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 632010100ffdSAl Viro return -EAGAIN; 632110100ffdSAl Viro err = hpsa_big_passthru_ioctl(h, &arg64); 632210100ffdSAl Viro atomic_inc(&h->passthru_cmds_avail); 6323edd16368SStephen M. Cameron if (err) 6324edd16368SStephen M. Cameron return err; 632510100ffdSAl Viro if (copy_to_user(&arg32->error_info, &arg64.error_info, 632610100ffdSAl Viro sizeof(arg32->error_info))) 6327edd16368SStephen M. Cameron return -EFAULT; 632810100ffdSAl Viro return 0; 6329edd16368SStephen M. Cameron } 633071fe75a7SStephen M. Cameron 63316f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 63326f4e626fSNathan Chancellor void __user *arg) 633371fe75a7SStephen M. Cameron { 633471fe75a7SStephen M. Cameron switch (cmd) { 633571fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 633671fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 633771fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 633871fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 633971fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 634071fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 634171fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 634271fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 634371fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 634471fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 634571fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 634671fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 634771fe75a7SStephen M. Cameron case CCISS_REGNEWD: 634871fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 634971fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 635071fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 635171fe75a7SStephen M. Cameron 635271fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 635371fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 635471fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 635571fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 635671fe75a7SStephen M. Cameron 635771fe75a7SStephen M. Cameron default: 635871fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 635971fe75a7SStephen M. Cameron } 636071fe75a7SStephen M. Cameron } 6361edd16368SStephen M. Cameron #endif 6362edd16368SStephen M. Cameron 6363edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6364edd16368SStephen M. Cameron { 6365edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6366edd16368SStephen M. Cameron 6367edd16368SStephen M. Cameron if (!argp) 6368edd16368SStephen M. Cameron return -EINVAL; 6369edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6370edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6371edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6372edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6373edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6374edd16368SStephen M. Cameron return -EFAULT; 6375edd16368SStephen M. Cameron return 0; 6376edd16368SStephen M. Cameron } 6377edd16368SStephen M. Cameron 6378edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6379edd16368SStephen M. Cameron { 6380edd16368SStephen M. Cameron DriverVer_type DriverVer; 6381edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6382edd16368SStephen M. Cameron int rc; 6383edd16368SStephen M. Cameron 6384edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6385edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6386edd16368SStephen M. Cameron if (rc != 3) { 6387edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6388edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6389edd16368SStephen M. Cameron vmaj = 0; 6390edd16368SStephen M. Cameron vmin = 0; 6391edd16368SStephen M. Cameron vsubmin = 0; 6392edd16368SStephen M. Cameron } 6393edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6394edd16368SStephen M. Cameron if (!argp) 6395edd16368SStephen M. Cameron return -EINVAL; 6396edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6397edd16368SStephen M. Cameron return -EFAULT; 6398edd16368SStephen M. Cameron return 0; 6399edd16368SStephen M. Cameron } 6400edd16368SStephen M. Cameron 6401138125f7SAl Viro static int hpsa_passthru_ioctl(struct ctlr_info *h, 6402138125f7SAl Viro IOCTL_Command_struct *iocommand) 6403edd16368SStephen M. Cameron { 6404edd16368SStephen M. Cameron struct CommandList *c; 6405edd16368SStephen M. Cameron char *buff = NULL; 640650a0decfSStephen M. Cameron u64 temp64; 6407c1f63c8fSStephen M. Cameron int rc = 0; 6408edd16368SStephen M. Cameron 6409edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6410edd16368SStephen M. Cameron return -EPERM; 6411138125f7SAl Viro if ((iocommand->buf_size < 1) && 6412138125f7SAl Viro (iocommand->Request.Type.Direction != XFER_NONE)) { 6413edd16368SStephen M. Cameron return -EINVAL; 6414edd16368SStephen M. Cameron } 6415138125f7SAl Viro if (iocommand->buf_size > 0) { 6416138125f7SAl Viro buff = kmalloc(iocommand->buf_size, GFP_KERNEL); 6417edd16368SStephen M. Cameron if (buff == NULL) 64182dd02d74SRobert Elliott return -ENOMEM; 6419138125f7SAl Viro if (iocommand->Request.Type.Direction & XFER_WRITE) { 6420edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6421138125f7SAl Viro if (copy_from_user(buff, iocommand->buf, 6422138125f7SAl Viro iocommand->buf_size)) { 6423c1f63c8fSStephen M. Cameron rc = -EFAULT; 6424c1f63c8fSStephen M. Cameron goto out_kfree; 6425edd16368SStephen M. Cameron } 6426b03a7771SStephen M. Cameron } else { 6427138125f7SAl Viro memset(buff, 0, iocommand->buf_size); 6428b03a7771SStephen M. Cameron } 6429b03a7771SStephen M. Cameron } 643045fcb86eSStephen Cameron c = cmd_alloc(h); 6431bf43caf3SRobert Elliott 6432edd16368SStephen M. Cameron /* Fill in the command type */ 6433edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6434a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6435edd16368SStephen M. Cameron /* Fill in Command Header */ 6436edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6437138125f7SAl Viro if (iocommand->buf_size > 0) { /* buffer to fill */ 6438edd16368SStephen M. Cameron c->Header.SGList = 1; 643950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6440edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6441edd16368SStephen M. Cameron c->Header.SGList = 0; 644250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6443edd16368SStephen M. Cameron } 6444138125f7SAl Viro memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN)); 6445edd16368SStephen M. Cameron 6446edd16368SStephen M. Cameron /* Fill in Request block */ 6447138125f7SAl Viro memcpy(&c->Request, &iocommand->Request, 6448edd16368SStephen M. Cameron sizeof(c->Request)); 6449edd16368SStephen M. Cameron 6450edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6451138125f7SAl Viro if (iocommand->buf_size > 0) { 64528bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, buff, 6453138125f7SAl Viro iocommand->buf_size, DMA_BIDIRECTIONAL); 645450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 645550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 645650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6457bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6458bcc48ffaSStephen M. Cameron goto out; 6459bcc48ffaSStephen M. Cameron } 646050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 6461138125f7SAl Viro c->SG[0].Len = cpu_to_le32(iocommand->buf_size); 646250a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6463edd16368SStephen M. Cameron } 6464c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 64653fb134cbSDon Brace NO_TIMEOUT); 6466138125f7SAl Viro if (iocommand->buf_size > 0) 64678bc8f47eSChristoph Hellwig hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6468edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 646925163bd5SWebb Scales if (rc) { 647025163bd5SWebb Scales rc = -EIO; 647125163bd5SWebb Scales goto out; 647225163bd5SWebb Scales } 6473edd16368SStephen M. Cameron 6474edd16368SStephen M. Cameron /* Copy the error information out */ 6475138125f7SAl Viro memcpy(&iocommand->error_info, c->err_info, 6476138125f7SAl Viro sizeof(iocommand->error_info)); 6477138125f7SAl Viro if ((iocommand->Request.Type.Direction & XFER_READ) && 6478138125f7SAl Viro iocommand->buf_size > 0) { 6479edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6480138125f7SAl Viro if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) { 6481c1f63c8fSStephen M. Cameron rc = -EFAULT; 6482c1f63c8fSStephen M. Cameron goto out; 6483edd16368SStephen M. Cameron } 6484edd16368SStephen M. Cameron } 6485c1f63c8fSStephen M. Cameron out: 648645fcb86eSStephen Cameron cmd_free(h, c); 6487c1f63c8fSStephen M. Cameron out_kfree: 6488c1f63c8fSStephen M. Cameron kfree(buff); 6489c1f63c8fSStephen M. Cameron return rc; 6490edd16368SStephen M. Cameron } 6491edd16368SStephen M. Cameron 6492138125f7SAl Viro static int hpsa_big_passthru_ioctl(struct ctlr_info *h, 6493138125f7SAl Viro BIG_IOCTL_Command_struct *ioc) 6494edd16368SStephen M. Cameron { 6495edd16368SStephen M. Cameron struct CommandList *c; 6496edd16368SStephen M. Cameron unsigned char **buff = NULL; 6497edd16368SStephen M. Cameron int *buff_size = NULL; 649850a0decfSStephen M. Cameron u64 temp64; 6499edd16368SStephen M. Cameron BYTE sg_used = 0; 6500edd16368SStephen M. Cameron int status = 0; 650101a02ffcSStephen M. Cameron u32 left; 650201a02ffcSStephen M. Cameron u32 sz; 6503edd16368SStephen M. Cameron BYTE __user *data_ptr; 6504edd16368SStephen M. Cameron 6505edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6506edd16368SStephen M. Cameron return -EPERM; 6507138125f7SAl Viro 6508edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6509138125f7SAl Viro (ioc->Request.Type.Direction != XFER_NONE)) 6510138125f7SAl Viro return -EINVAL; 6511edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6512138125f7SAl Viro if (ioc->malloc_size > MAX_KMALLOC_SIZE) 6513138125f7SAl Viro return -EINVAL; 6514138125f7SAl Viro if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) 6515138125f7SAl Viro return -EINVAL; 65166396bb22SKees Cook buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6517edd16368SStephen M. Cameron if (!buff) { 6518edd16368SStephen M. Cameron status = -ENOMEM; 6519edd16368SStephen M. Cameron goto cleanup1; 6520edd16368SStephen M. Cameron } 65216da2ec56SKees Cook buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6522edd16368SStephen M. Cameron if (!buff_size) { 6523edd16368SStephen M. Cameron status = -ENOMEM; 6524edd16368SStephen M. Cameron goto cleanup1; 6525edd16368SStephen M. Cameron } 6526edd16368SStephen M. Cameron left = ioc->buf_size; 6527edd16368SStephen M. Cameron data_ptr = ioc->buf; 6528edd16368SStephen M. Cameron while (left) { 6529edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6530edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6531edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6532edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6533edd16368SStephen M. Cameron status = -ENOMEM; 6534edd16368SStephen M. Cameron goto cleanup1; 6535edd16368SStephen M. Cameron } 65369233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6537edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 65380758f4f7SStephen M. Cameron status = -EFAULT; 6539edd16368SStephen M. Cameron goto cleanup1; 6540edd16368SStephen M. Cameron } 6541edd16368SStephen M. Cameron } else 6542edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6543edd16368SStephen M. Cameron left -= sz; 6544edd16368SStephen M. Cameron data_ptr += sz; 6545edd16368SStephen M. Cameron sg_used++; 6546edd16368SStephen M. Cameron } 654745fcb86eSStephen Cameron c = cmd_alloc(h); 6548bf43caf3SRobert Elliott 6549edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6550a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6551edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 655250a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 655350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6554edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6555edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6556edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6557edd16368SStephen M. Cameron int i; 6558edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 65598bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, buff[i], 65608bc8f47eSChristoph Hellwig buff_size[i], DMA_BIDIRECTIONAL); 656150a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 656250a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 656350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 656450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6565bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 65668bc8f47eSChristoph Hellwig DMA_BIDIRECTIONAL); 6567bcc48ffaSStephen M. Cameron status = -ENOMEM; 6568e2d4a1f6SStephen M. Cameron goto cleanup0; 6569bcc48ffaSStephen M. Cameron } 657050a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 657150a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 657250a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6573edd16368SStephen M. Cameron } 657450a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6575edd16368SStephen M. Cameron } 6576c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 65773fb134cbSDon Brace NO_TIMEOUT); 6578b03a7771SStephen M. Cameron if (sg_used) 65798bc8f47eSChristoph Hellwig hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6580edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 658125163bd5SWebb Scales if (status) { 658225163bd5SWebb Scales status = -EIO; 658325163bd5SWebb Scales goto cleanup0; 658425163bd5SWebb Scales } 658525163bd5SWebb Scales 6586edd16368SStephen M. Cameron /* Copy the error information out */ 6587edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 65889233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 65892b08b3e9SDon Brace int i; 65902b08b3e9SDon Brace 6591edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6592edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6593edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6594edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6595edd16368SStephen M. Cameron status = -EFAULT; 6596e2d4a1f6SStephen M. Cameron goto cleanup0; 6597edd16368SStephen M. Cameron } 6598edd16368SStephen M. Cameron ptr += buff_size[i]; 6599edd16368SStephen M. Cameron } 6600edd16368SStephen M. Cameron } 6601edd16368SStephen M. Cameron status = 0; 6602e2d4a1f6SStephen M. Cameron cleanup0: 660345fcb86eSStephen Cameron cmd_free(h, c); 6604edd16368SStephen M. Cameron cleanup1: 6605edd16368SStephen M. Cameron if (buff) { 66062b08b3e9SDon Brace int i; 66072b08b3e9SDon Brace 6608edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6609edd16368SStephen M. Cameron kfree(buff[i]); 6610edd16368SStephen M. Cameron kfree(buff); 6611edd16368SStephen M. Cameron } 6612edd16368SStephen M. Cameron kfree(buff_size); 6613edd16368SStephen M. Cameron return status; 6614edd16368SStephen M. Cameron } 6615edd16368SStephen M. Cameron 6616edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6617edd16368SStephen M. Cameron struct CommandList *c) 6618edd16368SStephen M. Cameron { 6619edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6620edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6621edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6622edd16368SStephen M. Cameron } 66230390f0c0SStephen M. Cameron 6624edd16368SStephen M. Cameron /* 6625edd16368SStephen M. Cameron * ioctl 6626edd16368SStephen M. Cameron */ 66276f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 662806b43f96SAl Viro void __user *argp) 6629edd16368SStephen M. Cameron { 663006b43f96SAl Viro struct ctlr_info *h = sdev_to_hba(dev); 66310390f0c0SStephen M. Cameron int rc; 6632edd16368SStephen M. Cameron 6633edd16368SStephen M. Cameron switch (cmd) { 6634edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6635edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6636edd16368SStephen M. Cameron case CCISS_REGNEWD: 6637a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6638edd16368SStephen M. Cameron return 0; 6639edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6640edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6641edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6642edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6643138125f7SAl Viro case CCISS_PASSTHRU: { 6644138125f7SAl Viro IOCTL_Command_struct iocommand; 6645138125f7SAl Viro 6646138125f7SAl Viro if (!argp) 6647138125f7SAl Viro return -EINVAL; 6648138125f7SAl Viro if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6649138125f7SAl Viro return -EFAULT; 665034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 66510390f0c0SStephen M. Cameron return -EAGAIN; 6652138125f7SAl Viro rc = hpsa_passthru_ioctl(h, &iocommand); 665334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 6654138125f7SAl Viro if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand))) 6655138125f7SAl Viro rc = -EFAULT; 66560390f0c0SStephen M. Cameron return rc; 6657138125f7SAl Viro } 6658138125f7SAl Viro case CCISS_BIG_PASSTHRU: { 6659cb17c1b6SAl Viro BIG_IOCTL_Command_struct ioc; 6660138125f7SAl Viro if (!argp) 6661138125f7SAl Viro return -EINVAL; 6662cb17c1b6SAl Viro if (copy_from_user(&ioc, argp, sizeof(ioc))) 6663cb17c1b6SAl Viro return -EFAULT; 666434f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 66650390f0c0SStephen M. Cameron return -EAGAIN; 6666cb17c1b6SAl Viro rc = hpsa_big_passthru_ioctl(h, &ioc); 666734f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 6668cb17c1b6SAl Viro if (!rc && copy_to_user(argp, &ioc, sizeof(ioc))) 6669138125f7SAl Viro rc = -EFAULT; 66700390f0c0SStephen M. Cameron return rc; 6671138125f7SAl Viro } 6672edd16368SStephen M. Cameron default: 6673edd16368SStephen M. Cameron return -ENOTTY; 6674edd16368SStephen M. Cameron } 6675edd16368SStephen M. Cameron } 6676edd16368SStephen M. Cameron 6677c5dfd106SDon Brace static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type) 667864670ac8SStephen M. Cameron { 667964670ac8SStephen M. Cameron struct CommandList *c; 668064670ac8SStephen M. Cameron 668164670ac8SStephen M. Cameron c = cmd_alloc(h); 6682bf43caf3SRobert Elliott 6683a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6684a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 668564670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 668664670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 668764670ac8SStephen M. Cameron c->waiting = NULL; 668864670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 668964670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 669064670ac8SStephen M. Cameron * the command either. This is the last command we will send before 669164670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 669264670ac8SStephen M. Cameron */ 6693bf43caf3SRobert Elliott return; 669464670ac8SStephen M. Cameron } 669564670ac8SStephen M. Cameron 6696a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6697b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6698edd16368SStephen M. Cameron int cmd_type) 6699edd16368SStephen M. Cameron { 67008bc8f47eSChristoph Hellwig enum dma_data_direction dir = DMA_NONE; 6701edd16368SStephen M. Cameron 6702edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6703a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6704edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6705edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6706edd16368SStephen M. Cameron c->Header.SGList = 1; 670750a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6708edd16368SStephen M. Cameron } else { 6709edd16368SStephen M. Cameron c->Header.SGList = 0; 671050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6711edd16368SStephen M. Cameron } 6712edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6713edd16368SStephen M. Cameron 6714edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6715edd16368SStephen M. Cameron switch (cmd) { 6716edd16368SStephen M. Cameron case HPSA_INQUIRY: 6717edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6718b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6719edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6720b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6721edd16368SStephen M. Cameron } 6722edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6723a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6724a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6725edd16368SStephen M. Cameron c->Request.Timeout = 0; 6726edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6727edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6728edd16368SStephen M. Cameron break; 67290a7c3bb8SDon Brace case RECEIVE_DIAGNOSTIC: 67300a7c3bb8SDon Brace c->Request.CDBLen = 6; 67310a7c3bb8SDon Brace c->Request.type_attr_dir = 67320a7c3bb8SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 67330a7c3bb8SDon Brace c->Request.Timeout = 0; 67340a7c3bb8SDon Brace c->Request.CDB[0] = cmd; 67350a7c3bb8SDon Brace c->Request.CDB[1] = 1; 67360a7c3bb8SDon Brace c->Request.CDB[2] = 1; 67370a7c3bb8SDon Brace c->Request.CDB[3] = (size >> 8) & 0xFF; 67380a7c3bb8SDon Brace c->Request.CDB[4] = size & 0xFF; 67390a7c3bb8SDon Brace break; 6740edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6741edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6742edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6743edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6744edd16368SStephen M. Cameron */ 6745edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6746a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6747a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6748edd16368SStephen M. Cameron c->Request.Timeout = 0; 6749edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6750edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6751edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6752edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6753edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6754edd16368SStephen M. Cameron break; 6755c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6756c2adae44SScott Teel c->Request.CDBLen = 16; 6757c2adae44SScott Teel c->Request.type_attr_dir = 6758c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6759c2adae44SScott Teel c->Request.Timeout = 0; 6760c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6761c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6762c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6763c2adae44SScott Teel break; 6764c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6765c2adae44SScott Teel c->Request.CDBLen = 16; 6766c2adae44SScott Teel c->Request.type_attr_dir = 6767c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6768c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6769c2adae44SScott Teel c->Request.Timeout = 0; 6770c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6771c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6772c2adae44SScott Teel break; 6773edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6774edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6775a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6776a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6777a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6778edd16368SStephen M. Cameron c->Request.Timeout = 0; 6779edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6780edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6781bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6782bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6783edd16368SStephen M. Cameron break; 6784edd16368SStephen M. Cameron case TEST_UNIT_READY: 6785edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6786a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6787a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6788edd16368SStephen M. Cameron c->Request.Timeout = 0; 6789edd16368SStephen M. Cameron break; 6790283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6791283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6792a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6793a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6794283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6795283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6796283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6797283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6798283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6799283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6800283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6801283b4a9bSStephen M. Cameron break; 6802316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6803316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6804a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6805a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6806316b221aSStephen M. Cameron c->Request.Timeout = 0; 6807316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6808316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6809316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6810316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6811316b221aSStephen M. Cameron break; 681203383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 681303383736SDon Brace c->Request.CDBLen = 10; 681403383736SDon Brace c->Request.type_attr_dir = 681503383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 681603383736SDon Brace c->Request.Timeout = 0; 681703383736SDon Brace c->Request.CDB[0] = BMIC_READ; 681803383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 681903383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 682003383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 682103383736SDon Brace break; 6822d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6823d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6824d04e62b9SKevin Barnett c->Request.type_attr_dir = 6825d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6826d04e62b9SKevin Barnett c->Request.Timeout = 0; 6827d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6828d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6829d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6830d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6831d04e62b9SKevin Barnett break; 6832cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6833cca8f13bSDon Brace c->Request.CDBLen = 10; 6834cca8f13bSDon Brace c->Request.type_attr_dir = 6835cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6836cca8f13bSDon Brace c->Request.Timeout = 0; 6837cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6838cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6839cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6840cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6841cca8f13bSDon Brace break; 684266749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 684366749d0dSScott Teel c->Request.CDBLen = 10; 684466749d0dSScott Teel c->Request.type_attr_dir = 684566749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 684666749d0dSScott Teel c->Request.Timeout = 0; 684766749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 684866749d0dSScott Teel c->Request.CDB[1] = 0; 684966749d0dSScott Teel c->Request.CDB[2] = 0; 685066749d0dSScott Teel c->Request.CDB[3] = 0; 685166749d0dSScott Teel c->Request.CDB[4] = 0; 685266749d0dSScott Teel c->Request.CDB[5] = 0; 685366749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 685466749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 685566749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 685666749d0dSScott Teel c->Request.CDB[9] = 0; 685766749d0dSScott Teel break; 6858edd16368SStephen M. Cameron default: 6859edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6860edd16368SStephen M. Cameron BUG(); 6861edd16368SStephen M. Cameron } 6862edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6863edd16368SStephen M. Cameron switch (cmd) { 6864edd16368SStephen M. Cameron 68650b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 68660b9b7b6eSScott Teel c->Request.CDBLen = 16; 68670b9b7b6eSScott Teel c->Request.type_attr_dir = 68680b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 68690b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 68700b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 68710b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 68720b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 68730b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 68740b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 68750b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 68760b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 68770b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 68780b9b7b6eSScott Teel break; 6879edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6880edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6881a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6882a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6883edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 688464670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 688564670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 688621e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6887edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6888edd16368SStephen M. Cameron /* LunID device */ 6889edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6890edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6891edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6892edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6893edd16368SStephen M. Cameron break; 6894edd16368SStephen M. Cameron default: 6895edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6896edd16368SStephen M. Cameron cmd); 6897edd16368SStephen M. Cameron BUG(); 6898edd16368SStephen M. Cameron } 6899edd16368SStephen M. Cameron } else { 6900edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6901edd16368SStephen M. Cameron BUG(); 6902edd16368SStephen M. Cameron } 6903edd16368SStephen M. Cameron 6904a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6905edd16368SStephen M. Cameron case XFER_READ: 69068bc8f47eSChristoph Hellwig dir = DMA_FROM_DEVICE; 6907edd16368SStephen M. Cameron break; 6908edd16368SStephen M. Cameron case XFER_WRITE: 69098bc8f47eSChristoph Hellwig dir = DMA_TO_DEVICE; 6910edd16368SStephen M. Cameron break; 6911edd16368SStephen M. Cameron case XFER_NONE: 69128bc8f47eSChristoph Hellwig dir = DMA_NONE; 6913edd16368SStephen M. Cameron break; 6914edd16368SStephen M. Cameron default: 69158bc8f47eSChristoph Hellwig dir = DMA_BIDIRECTIONAL; 6916edd16368SStephen M. Cameron } 69178bc8f47eSChristoph Hellwig if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6918a2dac136SStephen M. Cameron return -1; 6919a2dac136SStephen M. Cameron return 0; 6920edd16368SStephen M. Cameron } 6921edd16368SStephen M. Cameron 6922edd16368SStephen M. Cameron /* 6923edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6924edd16368SStephen M. Cameron */ 6925edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6926edd16368SStephen M. Cameron { 6927edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6928edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 69294bdc0d67SChristoph Hellwig void __iomem *page_remapped = ioremap(page_base, 6930088ba34cSStephen M. Cameron page_offs + size); 6931edd16368SStephen M. Cameron 6932edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6933edd16368SStephen M. Cameron } 6934edd16368SStephen M. Cameron 6935254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6936edd16368SStephen M. Cameron { 6937254f796bSMatt Gates return h->access.command_completed(h, q); 6938edd16368SStephen M. Cameron } 6939edd16368SStephen M. Cameron 6940900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6941edd16368SStephen M. Cameron { 6942edd16368SStephen M. Cameron return h->access.intr_pending(h); 6943edd16368SStephen M. Cameron } 6944edd16368SStephen M. Cameron 6945edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6946edd16368SStephen M. Cameron { 694710f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 694810f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6949edd16368SStephen M. Cameron } 6950edd16368SStephen M. Cameron 695101a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 695201a02ffcSStephen M. Cameron u32 raw_tag) 6953edd16368SStephen M. Cameron { 6954edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6955edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6956edd16368SStephen M. Cameron return 1; 6957edd16368SStephen M. Cameron } 6958edd16368SStephen M. Cameron return 0; 6959edd16368SStephen M. Cameron } 6960edd16368SStephen M. Cameron 69615a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6962edd16368SStephen M. Cameron { 6963e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6964c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6965c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 69661fb011fbSStephen M. Cameron complete_scsi_command(c); 69678be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6968edd16368SStephen M. Cameron complete(c->waiting); 6969a104c99fSStephen M. Cameron } 6970a104c99fSStephen M. Cameron 6971303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 69721d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6973303932fdSDon Brace u32 raw_tag) 6974303932fdSDon Brace { 6975303932fdSDon Brace u32 tag_index; 6976303932fdSDon Brace struct CommandList *c; 6977303932fdSDon Brace 6978f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 69791d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6980303932fdSDon Brace c = h->cmd_pool + tag_index; 69815a3d16f5SStephen M. Cameron finish_cmd(c); 69821d94f94dSStephen M. Cameron } 6983303932fdSDon Brace } 6984303932fdSDon Brace 698564670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 698664670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 698764670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 698864670ac8SStephen M. Cameron * functions. 698964670ac8SStephen M. Cameron */ 699064670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 699164670ac8SStephen M. Cameron { 699264670ac8SStephen M. Cameron if (likely(!reset_devices)) 699364670ac8SStephen M. Cameron return 0; 699464670ac8SStephen M. Cameron 699564670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 699664670ac8SStephen M. Cameron return 0; 699764670ac8SStephen M. Cameron 699864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 699964670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 700064670ac8SStephen M. Cameron 700164670ac8SStephen M. Cameron return 1; 700264670ac8SStephen M. Cameron } 700364670ac8SStephen M. Cameron 7004254f796bSMatt Gates /* 7005254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7006254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7007254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7008254f796bSMatt Gates */ 7009254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 701064670ac8SStephen M. Cameron { 7011254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7012254f796bSMatt Gates } 7013254f796bSMatt Gates 7014254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7015254f796bSMatt Gates { 7016254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7017254f796bSMatt Gates u8 q = *(u8 *) queue; 701864670ac8SStephen M. Cameron u32 raw_tag; 701964670ac8SStephen M. Cameron 702064670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 702164670ac8SStephen M. Cameron return IRQ_NONE; 702264670ac8SStephen M. Cameron 702364670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 702464670ac8SStephen M. Cameron return IRQ_NONE; 7025a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 702664670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7027254f796bSMatt Gates raw_tag = get_next_completion(h, q); 702864670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7029254f796bSMatt Gates raw_tag = next_command(h, q); 703064670ac8SStephen M. Cameron } 703164670ac8SStephen M. Cameron return IRQ_HANDLED; 703264670ac8SStephen M. Cameron } 703364670ac8SStephen M. Cameron 7034254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 703564670ac8SStephen M. Cameron { 7036254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 703764670ac8SStephen M. Cameron u32 raw_tag; 7038254f796bSMatt Gates u8 q = *(u8 *) queue; 703964670ac8SStephen M. Cameron 704064670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 704164670ac8SStephen M. Cameron return IRQ_NONE; 704264670ac8SStephen M. Cameron 7043a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7044254f796bSMatt Gates raw_tag = get_next_completion(h, q); 704564670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7046254f796bSMatt Gates raw_tag = next_command(h, q); 704764670ac8SStephen M. Cameron return IRQ_HANDLED; 704864670ac8SStephen M. Cameron } 704964670ac8SStephen M. Cameron 7050254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7051edd16368SStephen M. Cameron { 7052254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7053303932fdSDon Brace u32 raw_tag; 7054254f796bSMatt Gates u8 q = *(u8 *) queue; 7055edd16368SStephen M. Cameron 7056edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7057edd16368SStephen M. Cameron return IRQ_NONE; 7058a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 705910f66018SStephen M. Cameron while (interrupt_pending(h)) { 7060254f796bSMatt Gates raw_tag = get_next_completion(h, q); 706110f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 70621d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7063254f796bSMatt Gates raw_tag = next_command(h, q); 706410f66018SStephen M. Cameron } 706510f66018SStephen M. Cameron } 706610f66018SStephen M. Cameron return IRQ_HANDLED; 706710f66018SStephen M. Cameron } 706810f66018SStephen M. Cameron 7069254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 707010f66018SStephen M. Cameron { 7071254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 707210f66018SStephen M. Cameron u32 raw_tag; 7073254f796bSMatt Gates u8 q = *(u8 *) queue; 707410f66018SStephen M. Cameron 7075a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7076254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7077303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 70781d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7079254f796bSMatt Gates raw_tag = next_command(h, q); 7080edd16368SStephen M. Cameron } 7081edd16368SStephen M. Cameron return IRQ_HANDLED; 7082edd16368SStephen M. Cameron } 7083edd16368SStephen M. Cameron 7084a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7085a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7086a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7087a9a3a273SStephen M. Cameron */ 70886f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7089edd16368SStephen M. Cameron unsigned char type) 7090edd16368SStephen M. Cameron { 7091edd16368SStephen M. Cameron struct Command { 7092edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7093edd16368SStephen M. Cameron struct RequestBlock Request; 7094edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7095edd16368SStephen M. Cameron }; 7096edd16368SStephen M. Cameron struct Command *cmd; 7097edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7098edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7099edd16368SStephen M. Cameron dma_addr_t paddr64; 71002b08b3e9SDon Brace __le32 paddr32; 71012b08b3e9SDon Brace u32 tag; 7102edd16368SStephen M. Cameron void __iomem *vaddr; 7103edd16368SStephen M. Cameron int i, err; 7104edd16368SStephen M. Cameron 7105edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7106edd16368SStephen M. Cameron if (vaddr == NULL) 7107edd16368SStephen M. Cameron return -ENOMEM; 7108edd16368SStephen M. Cameron 7109edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7110edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7111edd16368SStephen M. Cameron * memory. 7112edd16368SStephen M. Cameron */ 71138bc8f47eSChristoph Hellwig err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 7114edd16368SStephen M. Cameron if (err) { 7115edd16368SStephen M. Cameron iounmap(vaddr); 71161eaec8f3SRobert Elliott return err; 7117edd16368SStephen M. Cameron } 7118edd16368SStephen M. Cameron 71198bc8f47eSChristoph Hellwig cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 7120edd16368SStephen M. Cameron if (cmd == NULL) { 7121edd16368SStephen M. Cameron iounmap(vaddr); 7122edd16368SStephen M. Cameron return -ENOMEM; 7123edd16368SStephen M. Cameron } 7124edd16368SStephen M. Cameron 7125edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7126edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7127edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7128edd16368SStephen M. Cameron */ 71292b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7130edd16368SStephen M. Cameron 7131edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7132edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 713350a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 71342b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7135edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7136edd16368SStephen M. Cameron 7137edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7138a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7139a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7140edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7141edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7142edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7143edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 714450a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 71452b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 714650a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7147edd16368SStephen M. Cameron 71482b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7149edd16368SStephen M. Cameron 7150edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7151edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 71522b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7153edd16368SStephen M. Cameron break; 7154edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7155edd16368SStephen M. Cameron } 7156edd16368SStephen M. Cameron 7157edd16368SStephen M. Cameron iounmap(vaddr); 7158edd16368SStephen M. Cameron 7159edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7160edd16368SStephen M. Cameron * still complete the command. 7161edd16368SStephen M. Cameron */ 7162edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7163edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7164edd16368SStephen M. Cameron opcode, type); 7165edd16368SStephen M. Cameron return -ETIMEDOUT; 7166edd16368SStephen M. Cameron } 7167edd16368SStephen M. Cameron 71688bc8f47eSChristoph Hellwig dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7169edd16368SStephen M. Cameron 7170edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7171edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7172edd16368SStephen M. Cameron opcode, type); 7173edd16368SStephen M. Cameron return -EIO; 7174edd16368SStephen M. Cameron } 7175edd16368SStephen M. Cameron 7176edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7177edd16368SStephen M. Cameron opcode, type); 7178edd16368SStephen M. Cameron return 0; 7179edd16368SStephen M. Cameron } 7180edd16368SStephen M. Cameron 7181edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7182edd16368SStephen M. Cameron 71831df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 718442a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7185edd16368SStephen M. Cameron { 7186edd16368SStephen M. Cameron 71871df8552aSStephen M. Cameron if (use_doorbell) { 71881df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 71891df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 71901df8552aSStephen M. Cameron * other way using the doorbell register. 7191edd16368SStephen M. Cameron */ 71921df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7193cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 719485009239SStephen M. Cameron 719500701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 719685009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 719785009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 719885009239SStephen M. Cameron * over in some weird corner cases. 719985009239SStephen M. Cameron */ 720000701a96SJustin Lindley msleep(10000); 72011df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7202edd16368SStephen M. Cameron 7203edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7204edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7205edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7206edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 72071df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 72081df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 72091df8552aSStephen M. Cameron * controller." */ 7210edd16368SStephen M. Cameron 72112662cab8SDon Brace int rc = 0; 72122662cab8SDon Brace 72131df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 72142662cab8SDon Brace 7215edd16368SStephen M. Cameron /* enter the D3hot power management state */ 72162662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 72172662cab8SDon Brace if (rc) 72182662cab8SDon Brace return rc; 7219edd16368SStephen M. Cameron 7220edd16368SStephen M. Cameron msleep(500); 7221edd16368SStephen M. Cameron 7222edd16368SStephen M. Cameron /* enter the D0 power management state */ 72232662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 72242662cab8SDon Brace if (rc) 72252662cab8SDon Brace return rc; 7226c4853efeSMike Miller 7227c4853efeSMike Miller /* 7228c4853efeSMike Miller * The P600 requires a small delay when changing states. 7229c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7230c4853efeSMike Miller * This for kdump only and is particular to the P600. 7231c4853efeSMike Miller */ 7232c4853efeSMike Miller msleep(500); 72331df8552aSStephen M. Cameron } 72341df8552aSStephen M. Cameron return 0; 72351df8552aSStephen M. Cameron } 72361df8552aSStephen M. Cameron 72376f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7238580ada3cSStephen M. Cameron { 7239580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7240f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7241580ada3cSStephen M. Cameron } 7242580ada3cSStephen M. Cameron 72436f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7244580ada3cSStephen M. Cameron { 7245580ada3cSStephen M. Cameron char *driver_version; 7246580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7247580ada3cSStephen M. Cameron 7248580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7249580ada3cSStephen M. Cameron if (!driver_version) 7250580ada3cSStephen M. Cameron return -ENOMEM; 7251580ada3cSStephen M. Cameron 7252580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7253580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7254580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7255580ada3cSStephen M. Cameron kfree(driver_version); 7256580ada3cSStephen M. Cameron return 0; 7257580ada3cSStephen M. Cameron } 7258580ada3cSStephen M. Cameron 72596f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 72606f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7261580ada3cSStephen M. Cameron { 7262580ada3cSStephen M. Cameron int i; 7263580ada3cSStephen M. Cameron 7264580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7265580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7266580ada3cSStephen M. Cameron } 7267580ada3cSStephen M. Cameron 72686f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7269580ada3cSStephen M. Cameron { 7270580ada3cSStephen M. Cameron 7271580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7272580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7273580ada3cSStephen M. Cameron 72746da2ec56SKees Cook old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7275580ada3cSStephen M. Cameron if (!old_driver_ver) 7276580ada3cSStephen M. Cameron return -ENOMEM; 7277580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7278580ada3cSStephen M. Cameron 7279580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7280580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7281580ada3cSStephen M. Cameron */ 7282580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7283580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7284580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7285580ada3cSStephen M. Cameron kfree(old_driver_ver); 7286580ada3cSStephen M. Cameron return rc; 7287580ada3cSStephen M. Cameron } 72881df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 72891df8552aSStephen M. Cameron * states or the using the doorbell register. 72901df8552aSStephen M. Cameron */ 72916b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 72921df8552aSStephen M. Cameron { 72931df8552aSStephen M. Cameron u64 cfg_offset; 72941df8552aSStephen M. Cameron u32 cfg_base_addr; 72951df8552aSStephen M. Cameron u64 cfg_base_addr_index; 72961df8552aSStephen M. Cameron void __iomem *vaddr; 72971df8552aSStephen M. Cameron unsigned long paddr; 7298580ada3cSStephen M. Cameron u32 misc_fw_support; 7299270d05deSStephen M. Cameron int rc; 73001df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7301cf0b08d0SStephen M. Cameron u32 use_doorbell; 7302270d05deSStephen M. Cameron u16 command_register; 73031df8552aSStephen M. Cameron 73041df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 73051df8552aSStephen M. Cameron * the same thing as 73061df8552aSStephen M. Cameron * 73071df8552aSStephen M. Cameron * pci_save_state(pci_dev); 73081df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 73091df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 73101df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 73111df8552aSStephen M. Cameron * 73121df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 73131df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 73141df8552aSStephen M. Cameron * using the doorbell register. 73151df8552aSStephen M. Cameron */ 731618867659SStephen M. Cameron 731760f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 731860f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 731925c1e56aSStephen M. Cameron return -ENODEV; 732025c1e56aSStephen M. Cameron } 732146380786SStephen M. Cameron 732246380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 732346380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 732446380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 732518867659SStephen M. Cameron 7326270d05deSStephen M. Cameron /* Save the PCI command register */ 7327270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7328270d05deSStephen M. Cameron pci_save_state(pdev); 73291df8552aSStephen M. Cameron 73301df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 73311df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 73321df8552aSStephen M. Cameron if (rc) 73331df8552aSStephen M. Cameron return rc; 73341df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 73351df8552aSStephen M. Cameron if (!vaddr) 73361df8552aSStephen M. Cameron return -ENOMEM; 73371df8552aSStephen M. Cameron 73381df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 73391df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 73401df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 73411df8552aSStephen M. Cameron if (rc) 73421df8552aSStephen M. Cameron goto unmap_vaddr; 73431df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 73441df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 73451df8552aSStephen M. Cameron if (!cfgtable) { 73461df8552aSStephen M. Cameron rc = -ENOMEM; 73471df8552aSStephen M. Cameron goto unmap_vaddr; 73481df8552aSStephen M. Cameron } 7349580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7350580ada3cSStephen M. Cameron if (rc) 735103741d95STomas Henzl goto unmap_cfgtable; 73521df8552aSStephen M. Cameron 7353cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7354cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7355cf0b08d0SStephen M. Cameron */ 73561df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7357cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7358cf0b08d0SStephen M. Cameron if (use_doorbell) { 7359cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7360cf0b08d0SStephen M. Cameron } else { 73611df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7362cf0b08d0SStephen M. Cameron if (use_doorbell) { 7363050f7147SStephen Cameron dev_warn(&pdev->dev, 7364050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 736564670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7366cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7367cf0b08d0SStephen M. Cameron } 7368cf0b08d0SStephen M. Cameron } 73691df8552aSStephen M. Cameron 73701df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 73711df8552aSStephen M. Cameron if (rc) 73721df8552aSStephen M. Cameron goto unmap_cfgtable; 7373edd16368SStephen M. Cameron 7374270d05deSStephen M. Cameron pci_restore_state(pdev); 7375270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7376edd16368SStephen M. Cameron 73771df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 73781df8552aSStephen M. Cameron need a little pause here */ 73791df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 73801df8552aSStephen M. Cameron 7381fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7382fe5389c8SStephen M. Cameron if (rc) { 7383fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7384050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7385fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7386fe5389c8SStephen M. Cameron } 7387fe5389c8SStephen M. Cameron 7388580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7389580ada3cSStephen M. Cameron if (rc < 0) 7390580ada3cSStephen M. Cameron goto unmap_cfgtable; 7391580ada3cSStephen M. Cameron if (rc) { 739264670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 739364670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 739464670ac8SStephen M. Cameron rc = -ENOTSUPP; 7395580ada3cSStephen M. Cameron } else { 739664670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 73971df8552aSStephen M. Cameron } 73981df8552aSStephen M. Cameron 73991df8552aSStephen M. Cameron unmap_cfgtable: 74001df8552aSStephen M. Cameron iounmap(cfgtable); 74011df8552aSStephen M. Cameron 74021df8552aSStephen M. Cameron unmap_vaddr: 74031df8552aSStephen M. Cameron iounmap(vaddr); 74041df8552aSStephen M. Cameron return rc; 7405edd16368SStephen M. Cameron } 7406edd16368SStephen M. Cameron 7407edd16368SStephen M. Cameron /* 7408edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7409edd16368SStephen M. Cameron * the io functions. 7410edd16368SStephen M. Cameron * This is for debug only. 7411edd16368SStephen M. Cameron */ 741242a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7413edd16368SStephen M. Cameron { 741458f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7415edd16368SStephen M. Cameron int i; 7416edd16368SStephen M. Cameron char temp_name[17]; 7417edd16368SStephen M. Cameron 7418edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7419edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7420edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7421edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7422edd16368SStephen M. Cameron temp_name[4] = '\0'; 7423edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7424edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7425edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7426edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7427edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7428edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7429edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7430edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7431edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7432edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7433edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7434edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 743569d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7436edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7437edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7438edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7439edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7440edd16368SStephen M. Cameron temp_name[16] = '\0'; 7441edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7442edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7443edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7444edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 744558f8665cSStephen M. Cameron } 7446edd16368SStephen M. Cameron 7447edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7448edd16368SStephen M. Cameron { 7449edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7450edd16368SStephen M. Cameron 7451edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7452edd16368SStephen M. Cameron return 0; 7453edd16368SStephen M. Cameron offset = 0; 7454edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7455edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7456edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7457edd16368SStephen M. Cameron offset += 4; 7458edd16368SStephen M. Cameron else { 7459edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7460edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7461edd16368SStephen M. Cameron switch (mem_type) { 7462edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7463edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7464edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7465edd16368SStephen M. Cameron break; 7466edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7467edd16368SStephen M. Cameron offset += 8; 7468edd16368SStephen M. Cameron break; 7469edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7470edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7471edd16368SStephen M. Cameron "base address is invalid\n"); 7472edd16368SStephen M. Cameron return -1; 7473edd16368SStephen M. Cameron } 7474edd16368SStephen M. Cameron } 7475edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7476edd16368SStephen M. Cameron return i + 1; 7477edd16368SStephen M. Cameron } 7478edd16368SStephen M. Cameron return -1; 7479edd16368SStephen M. Cameron } 7480edd16368SStephen M. Cameron 7481cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7482cc64c817SRobert Elliott { 7483bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7484bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7485cc64c817SRobert Elliott } 7486cc64c817SRobert Elliott 74878b834bffSMing Lei static void hpsa_setup_reply_map(struct ctlr_info *h) 74888b834bffSMing Lei { 74898b834bffSMing Lei const struct cpumask *mask; 74908b834bffSMing Lei unsigned int queue, cpu; 74918b834bffSMing Lei 74928b834bffSMing Lei for (queue = 0; queue < h->msix_vectors; queue++) { 74938b834bffSMing Lei mask = pci_irq_get_affinity(h->pdev, queue); 74948b834bffSMing Lei if (!mask) 74958b834bffSMing Lei goto fallback; 74968b834bffSMing Lei 74978b834bffSMing Lei for_each_cpu(cpu, mask) 74988b834bffSMing Lei h->reply_map[cpu] = queue; 74998b834bffSMing Lei } 75008b834bffSMing Lei return; 75018b834bffSMing Lei 75028b834bffSMing Lei fallback: 75038b834bffSMing Lei for_each_possible_cpu(cpu) 75048b834bffSMing Lei h->reply_map[cpu] = 0; 75058b834bffSMing Lei } 75068b834bffSMing Lei 7507edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7508050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7509edd16368SStephen M. Cameron */ 7510bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7511edd16368SStephen M. Cameron { 7512bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7513bc2bb154SChristoph Hellwig int ret; 7514edd16368SStephen M. Cameron 7515edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7516bc2bb154SChristoph Hellwig switch (h->board_id) { 7517bc2bb154SChristoph Hellwig case 0x40700E11: 7518bc2bb154SChristoph Hellwig case 0x40800E11: 7519bc2bb154SChristoph Hellwig case 0x40820E11: 7520bc2bb154SChristoph Hellwig case 0x40830E11: 7521bc2bb154SChristoph Hellwig break; 7522bc2bb154SChristoph Hellwig default: 7523bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7524bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7525bc2bb154SChristoph Hellwig if (ret > 0) { 7526bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7527bc2bb154SChristoph Hellwig return 0; 7528eee0f03aSHannes Reinecke } 7529bc2bb154SChristoph Hellwig 7530bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7531bc2bb154SChristoph Hellwig break; 7532edd16368SStephen M. Cameron } 7533bc2bb154SChristoph Hellwig 7534bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7535bc2bb154SChristoph Hellwig if (ret < 0) 7536bc2bb154SChristoph Hellwig return ret; 7537bc2bb154SChristoph Hellwig return 0; 7538edd16368SStephen M. Cameron } 7539edd16368SStephen M. Cameron 7540135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7541135ae6edSHannes Reinecke bool *legacy_board) 7542e5c880d1SStephen M. Cameron { 7543e5c880d1SStephen M. Cameron int i; 7544e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7545e5c880d1SStephen M. Cameron 7546e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7547e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7548e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7549e5c880d1SStephen M. Cameron subsystem_vendor_id; 7550e5c880d1SStephen M. Cameron 7551135ae6edSHannes Reinecke if (legacy_board) 7552135ae6edSHannes Reinecke *legacy_board = false; 7553e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7554135ae6edSHannes Reinecke if (*board_id == products[i].board_id) { 7555135ae6edSHannes Reinecke if (products[i].access != &SA5A_access && 7556135ae6edSHannes Reinecke products[i].access != &SA5B_access) 7557e5c880d1SStephen M. Cameron return i; 7558135ae6edSHannes Reinecke dev_warn(&pdev->dev, 7559135ae6edSHannes Reinecke "legacy board ID: 0x%08x\n", 7560135ae6edSHannes Reinecke *board_id); 7561135ae6edSHannes Reinecke if (legacy_board) 7562135ae6edSHannes Reinecke *legacy_board = true; 7563135ae6edSHannes Reinecke return i; 7564135ae6edSHannes Reinecke } 7565e5c880d1SStephen M. Cameron 7566c8cd71f1SHannes Reinecke dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7567135ae6edSHannes Reinecke if (legacy_board) 7568135ae6edSHannes Reinecke *legacy_board = true; 7569e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7570e5c880d1SStephen M. Cameron } 7571e5c880d1SStephen M. Cameron 75726f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 75733a7774ceSStephen M. Cameron unsigned long *memory_bar) 75743a7774ceSStephen M. Cameron { 75753a7774ceSStephen M. Cameron int i; 75763a7774ceSStephen M. Cameron 75773a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 757812d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 75793a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 758012d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 758112d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 75823a7774ceSStephen M. Cameron *memory_bar); 75833a7774ceSStephen M. Cameron return 0; 75843a7774ceSStephen M. Cameron } 758512d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 75863a7774ceSStephen M. Cameron return -ENODEV; 75873a7774ceSStephen M. Cameron } 75883a7774ceSStephen M. Cameron 75896f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 75906f039790SGreg Kroah-Hartman int wait_for_ready) 75912c4c8c8bSStephen M. Cameron { 7592fe5389c8SStephen M. Cameron int i, iterations; 75932c4c8c8bSStephen M. Cameron u32 scratchpad; 7594fe5389c8SStephen M. Cameron if (wait_for_ready) 7595fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7596fe5389c8SStephen M. Cameron else 7597fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 75982c4c8c8bSStephen M. Cameron 7599fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7600fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7601fe5389c8SStephen M. Cameron if (wait_for_ready) { 76022c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 76032c4c8c8bSStephen M. Cameron return 0; 7604fe5389c8SStephen M. Cameron } else { 7605fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7606fe5389c8SStephen M. Cameron return 0; 7607fe5389c8SStephen M. Cameron } 76082c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 76092c4c8c8bSStephen M. Cameron } 7610fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 76112c4c8c8bSStephen M. Cameron return -ENODEV; 76122c4c8c8bSStephen M. Cameron } 76132c4c8c8bSStephen M. Cameron 76146f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 76156f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7616a51fd47fSStephen M. Cameron u64 *cfg_offset) 7617a51fd47fSStephen M. Cameron { 7618a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7619a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7620a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7621a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7622a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7623a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7624a51fd47fSStephen M. Cameron return -ENODEV; 7625a51fd47fSStephen M. Cameron } 7626a51fd47fSStephen M. Cameron return 0; 7627a51fd47fSStephen M. Cameron } 7628a51fd47fSStephen M. Cameron 7629195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7630195f2c65SRobert Elliott { 7631105a3dbcSRobert Elliott if (h->transtable) { 7632195f2c65SRobert Elliott iounmap(h->transtable); 7633105a3dbcSRobert Elliott h->transtable = NULL; 7634105a3dbcSRobert Elliott } 7635105a3dbcSRobert Elliott if (h->cfgtable) { 7636195f2c65SRobert Elliott iounmap(h->cfgtable); 7637105a3dbcSRobert Elliott h->cfgtable = NULL; 7638105a3dbcSRobert Elliott } 7639195f2c65SRobert Elliott } 7640195f2c65SRobert Elliott 7641195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7642195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7643195f2c65SRobert Elliott + * */ 76446f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7645edd16368SStephen M. Cameron { 764601a02ffcSStephen M. Cameron u64 cfg_offset; 764701a02ffcSStephen M. Cameron u32 cfg_base_addr; 764801a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7649303932fdSDon Brace u32 trans_offset; 7650a51fd47fSStephen M. Cameron int rc; 765177c4495cSStephen M. Cameron 7652a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7653a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7654a51fd47fSStephen M. Cameron if (rc) 7655a51fd47fSStephen M. Cameron return rc; 765677c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7657a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7658cd3c81c4SRobert Elliott if (!h->cfgtable) { 7659cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 766077c4495cSStephen M. Cameron return -ENOMEM; 7661cd3c81c4SRobert Elliott } 7662580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7663580ada3cSStephen M. Cameron if (rc) 7664580ada3cSStephen M. Cameron return rc; 766577c4495cSStephen M. Cameron /* Find performant mode table. */ 7666a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 766777c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 766877c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 766977c4495cSStephen M. Cameron sizeof(*h->transtable)); 7670195f2c65SRobert Elliott if (!h->transtable) { 7671195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7672195f2c65SRobert Elliott hpsa_free_cfgtables(h); 767377c4495cSStephen M. Cameron return -ENOMEM; 7674195f2c65SRobert Elliott } 767577c4495cSStephen M. Cameron return 0; 767677c4495cSStephen M. Cameron } 767777c4495cSStephen M. Cameron 76786f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7679cba3d38bSStephen M. Cameron { 768041ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 768141ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 768241ce4c35SStephen Cameron 768341ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 768472ceeaecSStephen M. Cameron 768572ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 768672ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 768772ceeaecSStephen M. Cameron h->max_commands = 32; 768872ceeaecSStephen M. Cameron 768941ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 769041ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 769141ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 769241ce4c35SStephen Cameron h->max_commands, 769341ce4c35SStephen Cameron MIN_MAX_COMMANDS); 769441ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7695cba3d38bSStephen M. Cameron } 7696cba3d38bSStephen M. Cameron } 7697cba3d38bSStephen M. Cameron 7698c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7699c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7700c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7701c7ee65b3SWebb Scales */ 7702c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7703c7ee65b3SWebb Scales { 7704c7ee65b3SWebb Scales return h->maxsgentries > 512; 7705c7ee65b3SWebb Scales } 7706c7ee65b3SWebb Scales 7707b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7708b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7709b93d7536SStephen M. Cameron * SG chain block size, etc. 7710b93d7536SStephen M. Cameron */ 77116f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7712b93d7536SStephen M. Cameron { 7713cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 771445fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7715b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7716283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7717c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7718c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7719b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 77201a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7721b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7722b93d7536SStephen M. Cameron } else { 7723c7ee65b3SWebb Scales /* 7724c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7725c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7726c7ee65b3SWebb Scales * would lock up the controller) 7727c7ee65b3SWebb Scales */ 7728c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 77291a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7730c7ee65b3SWebb Scales h->chainsize = 0; 7731b93d7536SStephen M. Cameron } 773275167d2cSStephen M. Cameron 773375167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 773475167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 77350e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 77360e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 77370e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 77380e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 77398be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 77408be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7741b93d7536SStephen M. Cameron } 7742b93d7536SStephen M. Cameron 774376c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 774476c46e49SStephen M. Cameron { 77450fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7746050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 774776c46e49SStephen M. Cameron return false; 774876c46e49SStephen M. Cameron } 774976c46e49SStephen M. Cameron return true; 775076c46e49SStephen M. Cameron } 775176c46e49SStephen M. Cameron 775297a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7753f7c39101SStephen M. Cameron { 775497a5e98cSStephen M. Cameron u32 driver_support; 7755f7c39101SStephen M. Cameron 775697a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 77570b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 77580b9e7b74SArnd Bergmann #ifdef CONFIG_X86 775997a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7760f7c39101SStephen M. Cameron #endif 776128e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 776228e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7763f7c39101SStephen M. Cameron } 7764f7c39101SStephen M. Cameron 77653d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 77663d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 77673d0eab67SStephen M. Cameron */ 77683d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 77693d0eab67SStephen M. Cameron { 77703d0eab67SStephen M. Cameron u32 dma_prefetch; 77713d0eab67SStephen M. Cameron 77723d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 77733d0eab67SStephen M. Cameron return; 77743d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 77753d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 77763d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 77773d0eab67SStephen M. Cameron } 77783d0eab67SStephen M. Cameron 7779c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 778076438d08SStephen M. Cameron { 778176438d08SStephen M. Cameron int i; 778276438d08SStephen M. Cameron u32 doorbell_value; 778376438d08SStephen M. Cameron unsigned long flags; 778476438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7785007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 778676438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 778776438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 778876438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 778976438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7790c706a795SRobert Elliott goto done; 779176438d08SStephen M. Cameron /* delay and try again */ 7792007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 779376438d08SStephen M. Cameron } 7794c706a795SRobert Elliott return -ENODEV; 7795c706a795SRobert Elliott done: 7796c706a795SRobert Elliott return 0; 779776438d08SStephen M. Cameron } 779876438d08SStephen M. Cameron 7799c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7800eb6b2ae9SStephen M. Cameron { 7801eb6b2ae9SStephen M. Cameron int i; 78026eaf46fdSStephen M. Cameron u32 doorbell_value; 78036eaf46fdSStephen M. Cameron unsigned long flags; 7804eb6b2ae9SStephen M. Cameron 7805eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7806eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7807eb6b2ae9SStephen M. Cameron * as we enter this code.) 7808eb6b2ae9SStephen M. Cameron */ 7809007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 781025163bd5SWebb Scales if (h->remove_in_progress) 781125163bd5SWebb Scales goto done; 78126eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 78136eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 78146eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7815382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7816c706a795SRobert Elliott goto done; 7817eb6b2ae9SStephen M. Cameron /* delay and try again */ 7818007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7819eb6b2ae9SStephen M. Cameron } 7820c706a795SRobert Elliott return -ENODEV; 7821c706a795SRobert Elliott done: 7822c706a795SRobert Elliott return 0; 78233f4336f3SStephen M. Cameron } 78243f4336f3SStephen M. Cameron 7825c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 78266f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 78273f4336f3SStephen M. Cameron { 78283f4336f3SStephen M. Cameron u32 trans_support; 78293f4336f3SStephen M. Cameron 78303f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 78313f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 78323f4336f3SStephen M. Cameron return -ENOTSUPP; 78333f4336f3SStephen M. Cameron 78343f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7835283b4a9bSStephen M. Cameron 78363f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 78373f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7838b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 78393f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7840c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7841c706a795SRobert Elliott goto error; 7842eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7843283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7844283b4a9bSStephen M. Cameron goto error; 7845960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7846eb6b2ae9SStephen M. Cameron return 0; 7847283b4a9bSStephen M. Cameron error: 7848050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7849283b4a9bSStephen M. Cameron return -ENODEV; 7850eb6b2ae9SStephen M. Cameron } 7851eb6b2ae9SStephen M. Cameron 7852195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7853195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7854195f2c65SRobert Elliott { 7855195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7856195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7857105a3dbcSRobert Elliott h->vaddr = NULL; 7858195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7859943a7021SRobert Elliott /* 7860943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7861bff9e34cSMauro Carvalho Chehab * Documentation/driver-api/pci/pci.rst 7862943a7021SRobert Elliott */ 7863195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7864943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7865195f2c65SRobert Elliott } 7866195f2c65SRobert Elliott 7867195f2c65SRobert Elliott /* several items must be freed later */ 78686f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 786977c4495cSStephen M. Cameron { 7870eb6b2ae9SStephen M. Cameron int prod_index, err; 7871135ae6edSHannes Reinecke bool legacy_board; 7872edd16368SStephen M. Cameron 7873135ae6edSHannes Reinecke prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7874e5c880d1SStephen M. Cameron if (prod_index < 0) 787560f923b9SRobert Elliott return prod_index; 7876e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7877e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7878135ae6edSHannes Reinecke h->legacy_board = legacy_board; 7879e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7880e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7881e5a44df8SMatthew Garrett 788255c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7883edd16368SStephen M. Cameron if (err) { 7884195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7885943a7021SRobert Elliott pci_disable_device(h->pdev); 7886edd16368SStephen M. Cameron return err; 7887edd16368SStephen M. Cameron } 7888edd16368SStephen M. Cameron 7889f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7890edd16368SStephen M. Cameron if (err) { 789155c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7892195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7893943a7021SRobert Elliott pci_disable_device(h->pdev); 7894943a7021SRobert Elliott return err; 7895edd16368SStephen M. Cameron } 78964fa604e1SRobert Elliott 78974fa604e1SRobert Elliott pci_set_master(h->pdev); 78984fa604e1SRobert Elliott 7899bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 7900bc2bb154SChristoph Hellwig if (err) 7901bc2bb154SChristoph Hellwig goto clean1; 79028b834bffSMing Lei 79038b834bffSMing Lei /* setup mapping between CPU and reply queue */ 79048b834bffSMing Lei hpsa_setup_reply_map(h); 79058b834bffSMing Lei 790612d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 79073a7774ceSStephen M. Cameron if (err) 7908195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7909edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7910204892e9SStephen M. Cameron if (!h->vaddr) { 7911195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7912204892e9SStephen M. Cameron err = -ENOMEM; 7913195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7914204892e9SStephen M. Cameron } 7915fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 79162c4c8c8bSStephen M. Cameron if (err) 7917195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 791877c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 791977c4495cSStephen M. Cameron if (err) 7920195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7921b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7922edd16368SStephen M. Cameron 792376c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7924edd16368SStephen M. Cameron err = -ENODEV; 7925195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7926edd16368SStephen M. Cameron } 792797a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 79283d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7929eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7930eb6b2ae9SStephen M. Cameron if (err) 7931195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7932edd16368SStephen M. Cameron return 0; 7933edd16368SStephen M. Cameron 7934195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7935195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7936195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7937204892e9SStephen M. Cameron iounmap(h->vaddr); 7938105a3dbcSRobert Elliott h->vaddr = NULL; 7939195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7940195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7941bc2bb154SChristoph Hellwig clean1: 7942943a7021SRobert Elliott /* 7943943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7944bff9e34cSMauro Carvalho Chehab * Documentation/driver-api/pci/pci.rst 7945943a7021SRobert Elliott */ 7946195f2c65SRobert Elliott pci_disable_device(h->pdev); 7947943a7021SRobert Elliott pci_release_regions(h->pdev); 7948edd16368SStephen M. Cameron return err; 7949edd16368SStephen M. Cameron } 7950edd16368SStephen M. Cameron 79516f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7952339b2b14SStephen M. Cameron { 7953339b2b14SStephen M. Cameron int rc; 7954339b2b14SStephen M. Cameron 7955339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7956339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7957339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7958339b2b14SStephen M. Cameron return; 7959339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7960339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7961339b2b14SStephen M. Cameron if (rc != 0) { 7962339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7963339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7964339b2b14SStephen M. Cameron } 7965339b2b14SStephen M. Cameron } 7966339b2b14SStephen M. Cameron 79676b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7968edd16368SStephen M. Cameron { 79691df8552aSStephen M. Cameron int rc, i; 79703b747298STomas Henzl void __iomem *vaddr; 7971edd16368SStephen M. Cameron 79724c2a8c40SStephen M. Cameron if (!reset_devices) 79734c2a8c40SStephen M. Cameron return 0; 79744c2a8c40SStephen M. Cameron 7975132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7976132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7977132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7978132aa220STomas Henzl */ 7979132aa220STomas Henzl rc = pci_enable_device(pdev); 7980132aa220STomas Henzl if (rc) { 7981132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7982132aa220STomas Henzl return -ENODEV; 7983132aa220STomas Henzl } 7984132aa220STomas Henzl pci_disable_device(pdev); 7985132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7986132aa220STomas Henzl rc = pci_enable_device(pdev); 7987132aa220STomas Henzl if (rc) { 7988132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7989132aa220STomas Henzl return -ENODEV; 7990132aa220STomas Henzl } 79914fa604e1SRobert Elliott 7992859c75abSTomas Henzl pci_set_master(pdev); 79934fa604e1SRobert Elliott 79943b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 79953b747298STomas Henzl if (vaddr == NULL) { 79963b747298STomas Henzl rc = -ENOMEM; 79973b747298STomas Henzl goto out_disable; 79983b747298STomas Henzl } 79993b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 80003b747298STomas Henzl iounmap(vaddr); 80013b747298STomas Henzl 80021df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 80036b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8004edd16368SStephen M. Cameron 80051df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 80061df8552aSStephen M. Cameron * but it's already (and still) up and running in 800718867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 800818867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 80091df8552aSStephen M. Cameron */ 8010adf1b3a3SRobert Elliott if (rc) 8011132aa220STomas Henzl goto out_disable; 8012edd16368SStephen M. Cameron 8013edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 80141ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8015edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8016edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8017edd16368SStephen M. Cameron break; 8018edd16368SStephen M. Cameron else 8019edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8020edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8021edd16368SStephen M. Cameron } 8022132aa220STomas Henzl 8023132aa220STomas Henzl out_disable: 8024132aa220STomas Henzl 8025132aa220STomas Henzl pci_disable_device(pdev); 8026132aa220STomas Henzl return rc; 8027edd16368SStephen M. Cameron } 8028edd16368SStephen M. Cameron 80291fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 80301fb7c98aSRobert Elliott { 80315afdd990SChristophe JAILLET bitmap_free(h->cmd_pool_bits); 8032105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8033105a3dbcSRobert Elliott if (h->cmd_pool) { 80348bc8f47eSChristoph Hellwig dma_free_coherent(&h->pdev->dev, 80351fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 80361fb7c98aSRobert Elliott h->cmd_pool, 80371fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8038105a3dbcSRobert Elliott h->cmd_pool = NULL; 8039105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8040105a3dbcSRobert Elliott } 8041105a3dbcSRobert Elliott if (h->errinfo_pool) { 80428bc8f47eSChristoph Hellwig dma_free_coherent(&h->pdev->dev, 80431fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 80441fb7c98aSRobert Elliott h->errinfo_pool, 80451fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8046105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8047105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8048105a3dbcSRobert Elliott } 80491fb7c98aSRobert Elliott } 80501fb7c98aSRobert Elliott 8051d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 80522e9d1b36SStephen M. Cameron { 80535afdd990SChristophe JAILLET h->cmd_pool_bits = bitmap_zalloc(h->nr_cmds, GFP_KERNEL); 80548bc8f47eSChristoph Hellwig h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 80552e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 80568bc8f47eSChristoph Hellwig &h->cmd_pool_dhandle, GFP_KERNEL); 80578bc8f47eSChristoph Hellwig h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 80582e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 80598bc8f47eSChristoph Hellwig &h->errinfo_pool_dhandle, GFP_KERNEL); 80602e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 80612e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 80622e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 80632e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 80642c143342SRobert Elliott goto clean_up; 80652e9d1b36SStephen M. Cameron } 8066360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 80672e9d1b36SStephen M. Cameron return 0; 80682c143342SRobert Elliott clean_up: 80692c143342SRobert Elliott hpsa_free_cmd_pool(h); 80702c143342SRobert Elliott return -ENOMEM; 80712e9d1b36SStephen M. Cameron } 80722e9d1b36SStephen M. Cameron 8073ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8074ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8075ec501a18SRobert Elliott { 8076ec501a18SRobert Elliott int i; 8077a68fdb3aSDon Brace int irq_vector = 0; 8078a68fdb3aSDon Brace 8079a68fdb3aSDon Brace if (hpsa_simple_mode) 8080a68fdb3aSDon Brace irq_vector = h->intr_mode; 8081ec501a18SRobert Elliott 8082bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8083ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 8084a68fdb3aSDon Brace free_irq(pci_irq_vector(h->pdev, irq_vector), 8085a68fdb3aSDon Brace &h->q[h->intr_mode]); 8086bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8087ec501a18SRobert Elliott return; 8088ec501a18SRobert Elliott } 8089ec501a18SRobert Elliott 8090bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8091bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8092105a3dbcSRobert Elliott h->q[i] = 0; 8093ec501a18SRobert Elliott } 8094a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8095a4e17fc1SRobert Elliott h->q[i] = 0; 8096ec501a18SRobert Elliott } 8097ec501a18SRobert Elliott 80989ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 80999ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 81000ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 81010ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 81020ae01a32SStephen M. Cameron { 8103254f796bSMatt Gates int rc, i; 8104a68fdb3aSDon Brace int irq_vector = 0; 8105a68fdb3aSDon Brace 8106a68fdb3aSDon Brace if (hpsa_simple_mode) 8107a68fdb3aSDon Brace irq_vector = h->intr_mode; 81080ae01a32SStephen M. Cameron 8109254f796bSMatt Gates /* 8110254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8111254f796bSMatt Gates * queue to process. 8112254f796bSMatt Gates */ 8113254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8114254f796bSMatt Gates h->q[i] = (u8) i; 8115254f796bSMatt Gates 8116bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8117254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8118bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 81198b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8120bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 81218b47004aSRobert Elliott 0, h->intrname[i], 8122254f796bSMatt Gates &h->q[i]); 8123a4e17fc1SRobert Elliott if (rc) { 8124a4e17fc1SRobert Elliott int j; 8125a4e17fc1SRobert Elliott 8126a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8127a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8128bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8129a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8130bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8131a4e17fc1SRobert Elliott h->q[j] = 0; 8132a4e17fc1SRobert Elliott } 8133a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8134a4e17fc1SRobert Elliott h->q[j] = 0; 8135a4e17fc1SRobert Elliott return rc; 8136a4e17fc1SRobert Elliott } 8137a4e17fc1SRobert Elliott } 8138254f796bSMatt Gates } else { 8139254f796bSMatt Gates /* Use single reply pool */ 8140bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8141bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8142bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8143a68fdb3aSDon Brace rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 81448b47004aSRobert Elliott msixhandler, 0, 8145bc2bb154SChristoph Hellwig h->intrname[0], 8146254f796bSMatt Gates &h->q[h->intr_mode]); 8147254f796bSMatt Gates } else { 81488b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 81498b47004aSRobert Elliott "%s-intx", h->devname); 8150a68fdb3aSDon Brace rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 81518b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8152bc2bb154SChristoph Hellwig h->intrname[0], 8153254f796bSMatt Gates &h->q[h->intr_mode]); 8154254f796bSMatt Gates } 8155254f796bSMatt Gates } 81560ae01a32SStephen M. Cameron if (rc) { 8157195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8158a68fdb3aSDon Brace pci_irq_vector(h->pdev, irq_vector), h->devname); 8159195f2c65SRobert Elliott hpsa_free_irqs(h); 81600ae01a32SStephen M. Cameron return -ENODEV; 81610ae01a32SStephen M. Cameron } 81620ae01a32SStephen M. Cameron return 0; 81630ae01a32SStephen M. Cameron } 81640ae01a32SStephen M. Cameron 81656f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 816664670ac8SStephen M. Cameron { 816739c53f55SRobert Elliott int rc; 8168c5dfd106SDon Brace hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER); 816964670ac8SStephen M. Cameron 817064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 817139c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 817239c53f55SRobert Elliott if (rc) { 817364670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 817439c53f55SRobert Elliott return rc; 817564670ac8SStephen M. Cameron } 817664670ac8SStephen M. Cameron 817764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 817839c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 817939c53f55SRobert Elliott if (rc) { 818064670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 818164670ac8SStephen M. Cameron "after soft reset.\n"); 818239c53f55SRobert Elliott return rc; 818364670ac8SStephen M. Cameron } 818464670ac8SStephen M. Cameron 818564670ac8SStephen M. Cameron return 0; 818664670ac8SStephen M. Cameron } 818764670ac8SStephen M. Cameron 8188072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8189072b0518SStephen M. Cameron { 8190072b0518SStephen M. Cameron int i; 8191072b0518SStephen M. Cameron 8192072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8193072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8194072b0518SStephen M. Cameron continue; 81958bc8f47eSChristoph Hellwig dma_free_coherent(&h->pdev->dev, 81961fb7c98aSRobert Elliott h->reply_queue_size, 81971fb7c98aSRobert Elliott h->reply_queue[i].head, 81981fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8199072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8200072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8201072b0518SStephen M. Cameron } 8202105a3dbcSRobert Elliott h->reply_queue_size = 0; 8203072b0518SStephen M. Cameron } 8204072b0518SStephen M. Cameron 82050097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 82060097f0f4SStephen M. Cameron { 8207105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8208105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8209105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8210105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 82112946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 82122946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 82132946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 82149ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 82159ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 82169ecd953aSRobert Elliott if (h->resubmit_wq) { 82179ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 82189ecd953aSRobert Elliott h->resubmit_wq = NULL; 82199ecd953aSRobert Elliott } 82209ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 82219ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 82229ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 82239ecd953aSRobert Elliott } 822401192088SDon Brace if (h->monitor_ctlr_wq) { 822501192088SDon Brace destroy_workqueue(h->monitor_ctlr_wq); 822601192088SDon Brace h->monitor_ctlr_wq = NULL; 822701192088SDon Brace } 822801192088SDon Brace 8229105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 823064670ac8SStephen M. Cameron } 823164670ac8SStephen M. Cameron 8232a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8233f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8234a0c12413SStephen M. Cameron { 8235281a7fd0SWebb Scales int i, refcount; 8236281a7fd0SWebb Scales struct CommandList *c; 823725163bd5SWebb Scales int failcount = 0; 8238a0c12413SStephen M. Cameron 8239080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8240f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8241f2405db8SDon Brace c = h->cmd_pool + i; 8242281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8243281a7fd0SWebb Scales if (refcount > 1) { 824425163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 82455a3d16f5SStephen M. Cameron finish_cmd(c); 8246433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 824725163bd5SWebb Scales failcount++; 8248a0c12413SStephen M. Cameron } 8249281a7fd0SWebb Scales cmd_free(h, c); 8250281a7fd0SWebb Scales } 825125163bd5SWebb Scales dev_warn(&h->pdev->dev, 825225163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8253a0c12413SStephen M. Cameron } 8254a0c12413SStephen M. Cameron 8255094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8256094963daSStephen M. Cameron { 8257c8ed0010SRusty Russell int cpu; 8258094963daSStephen M. Cameron 8259c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8260094963daSStephen M. Cameron u32 *lockup_detected; 8261094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8262094963daSStephen M. Cameron *lockup_detected = value; 8263094963daSStephen M. Cameron } 8264094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8265094963daSStephen M. Cameron } 8266094963daSStephen M. Cameron 8267a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8268a0c12413SStephen M. Cameron { 8269a0c12413SStephen M. Cameron unsigned long flags; 8270094963daSStephen M. Cameron u32 lockup_detected; 8271a0c12413SStephen M. Cameron 8272a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8273a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8274094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8275094963daSStephen M. Cameron if (!lockup_detected) { 8276094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8277094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 827825163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 827925163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8280094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8281094963daSStephen M. Cameron } 8282094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8283a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 828425163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 828525163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8286b9b08cadSDon Brace if (lockup_detected == 0xffff0000) { 8287b9b08cadSDon Brace dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8288b9b08cadSDon Brace writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8289b9b08cadSDon Brace } 8290a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8291f2405db8SDon Brace fail_all_outstanding_cmds(h); 8292a0c12413SStephen M. Cameron } 8293a0c12413SStephen M. Cameron 829425163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8295a0c12413SStephen M. Cameron { 8296a0c12413SStephen M. Cameron u64 now; 8297a0c12413SStephen M. Cameron u32 heartbeat; 8298a0c12413SStephen M. Cameron unsigned long flags; 8299a0c12413SStephen M. Cameron 8300a0c12413SStephen M. Cameron now = get_jiffies_64(); 8301a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8302a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8303e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 830425163bd5SWebb Scales return false; 8305a0c12413SStephen M. Cameron 8306a0c12413SStephen M. Cameron /* 8307a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8308a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8309a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8310a0c12413SStephen M. Cameron */ 8311a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8312e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 831325163bd5SWebb Scales return false; 8314a0c12413SStephen M. Cameron 8315a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8316a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8317a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8318a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8319a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8320a0c12413SStephen M. Cameron controller_lockup_detected(h); 832125163bd5SWebb Scales return true; 8322a0c12413SStephen M. Cameron } 8323a0c12413SStephen M. Cameron 8324a0c12413SStephen M. Cameron /* We're ok. */ 8325a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8326a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 832725163bd5SWebb Scales return false; 8328a0c12413SStephen M. Cameron } 8329a0c12413SStephen M. Cameron 8330b2582a65SDon Brace /* 8331b2582a65SDon Brace * Set ioaccel status for all ioaccel volumes. 8332b2582a65SDon Brace * 8333b2582a65SDon Brace * Called from monitor controller worker (hpsa_event_monitor_worker) 8334b2582a65SDon Brace * 83353e16e83aSDon Brace * A Volume (or Volumes that comprise an Array set) may be undergoing a 8336b2582a65SDon Brace * transformation, so we will be turning off ioaccel for all volumes that 8337b2582a65SDon Brace * make up the Array. 8338b2582a65SDon Brace */ 8339b2582a65SDon Brace static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8340b2582a65SDon Brace { 8341b2582a65SDon Brace int rc; 8342b2582a65SDon Brace int i; 8343b2582a65SDon Brace u8 ioaccel_status; 8344b2582a65SDon Brace unsigned char *buf; 8345b2582a65SDon Brace struct hpsa_scsi_dev_t *device; 8346b2582a65SDon Brace 8347b2582a65SDon Brace if (!h) 8348b2582a65SDon Brace return; 8349b2582a65SDon Brace 8350b2582a65SDon Brace buf = kmalloc(64, GFP_KERNEL); 8351b2582a65SDon Brace if (!buf) 8352b2582a65SDon Brace return; 8353b2582a65SDon Brace 8354b2582a65SDon Brace /* 8355b2582a65SDon Brace * Run through current device list used during I/O requests. 8356b2582a65SDon Brace */ 8357b2582a65SDon Brace for (i = 0; i < h->ndevices; i++) { 83583e16e83aSDon Brace int offload_to_be_enabled = 0; 83593e16e83aSDon Brace int offload_config = 0; 83603e16e83aSDon Brace 8361b2582a65SDon Brace device = h->dev[i]; 8362b2582a65SDon Brace 8363b2582a65SDon Brace if (!device) 8364b2582a65SDon Brace continue; 8365b2582a65SDon Brace if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8366b2582a65SDon Brace HPSA_VPD_LV_IOACCEL_STATUS)) 8367b2582a65SDon Brace continue; 8368b2582a65SDon Brace 8369b2582a65SDon Brace memset(buf, 0, 64); 8370b2582a65SDon Brace 8371b2582a65SDon Brace rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8372b2582a65SDon Brace VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8373b2582a65SDon Brace buf, 64); 8374b2582a65SDon Brace if (rc != 0) 8375b2582a65SDon Brace continue; 8376b2582a65SDon Brace 8377b2582a65SDon Brace ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 83783e16e83aSDon Brace 83793e16e83aSDon Brace /* 83803e16e83aSDon Brace * Check if offload is still configured on 83813e16e83aSDon Brace */ 83823e16e83aSDon Brace offload_config = 8383b2582a65SDon Brace !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 83843e16e83aSDon Brace /* 83853e16e83aSDon Brace * If offload is configured on, check to see if ioaccel 83863e16e83aSDon Brace * needs to be enabled. 83873e16e83aSDon Brace */ 83883e16e83aSDon Brace if (offload_config) 83893e16e83aSDon Brace offload_to_be_enabled = 8390b2582a65SDon Brace !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8391b2582a65SDon Brace 8392b2582a65SDon Brace /* 83933e16e83aSDon Brace * If ioaccel is to be re-enabled, re-enable later during the 83943e16e83aSDon Brace * scan operation so the driver can get a fresh raidmap 83953e16e83aSDon Brace * before turning ioaccel back on. 83963e16e83aSDon Brace */ 83973e16e83aSDon Brace if (offload_to_be_enabled) 83983e16e83aSDon Brace continue; 83993e16e83aSDon Brace 84003e16e83aSDon Brace /* 8401b2582a65SDon Brace * Immediately turn off ioaccel for any volume the 8402b2582a65SDon Brace * controller tells us to. Some of the reasons could be: 8403b2582a65SDon Brace * transformation - change to the LVs of an Array. 8404b2582a65SDon Brace * degraded volume - component failure 8405b2582a65SDon Brace */ 84063e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(device); 8407b2582a65SDon Brace } 8408b2582a65SDon Brace 8409b2582a65SDon Brace kfree(buf); 8410b2582a65SDon Brace } 8411b2582a65SDon Brace 84129846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 841376438d08SStephen M. Cameron { 841476438d08SStephen M. Cameron char *event_type; 841576438d08SStephen M. Cameron 8416e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8417e4aa3e6aSStephen Cameron return; 8418e4aa3e6aSStephen Cameron 841976438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 84201f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 84211f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 842276438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 842376438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 842476438d08SStephen M. Cameron 842576438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 842676438d08SStephen M. Cameron event_type = "state change"; 842776438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 842876438d08SStephen M. Cameron event_type = "configuration change"; 842976438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 843076438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 8431b2582a65SDon Brace hpsa_set_ioaccel_status(h); 843223100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 843376438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 843476438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 843576438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 843676438d08SStephen M. Cameron h->events, event_type); 843776438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 843876438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 843976438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 844076438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 844176438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 844276438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 844376438d08SStephen M. Cameron } else { 844476438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 844576438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 844676438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 844776438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 844876438d08SStephen M. Cameron } 84499846590eSStephen M. Cameron return; 845076438d08SStephen M. Cameron } 845176438d08SStephen M. Cameron 845276438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 845376438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8454e863d68eSScott Teel * we should rescan the controller for devices. 8455e863d68eSScott Teel * Also check flag for driver-initiated rescan. 845676438d08SStephen M. Cameron */ 84579846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 845876438d08SStephen M. Cameron { 8459853633e8SDon Brace if (h->drv_req_rescan) { 8460853633e8SDon Brace h->drv_req_rescan = 0; 8461853633e8SDon Brace return 1; 8462853633e8SDon Brace } 8463853633e8SDon Brace 846476438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 84659846590eSStephen M. Cameron return 0; 846676438d08SStephen M. Cameron 846776438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 84689846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 84699846590eSStephen M. Cameron } 847076438d08SStephen M. Cameron 847176438d08SStephen M. Cameron /* 84729846590eSStephen M. Cameron * Check if any of the offline devices have become ready 847376438d08SStephen M. Cameron */ 84749846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 84759846590eSStephen M. Cameron { 84769846590eSStephen M. Cameron unsigned long flags; 84779846590eSStephen M. Cameron struct offline_device_entry *d; 84789846590eSStephen M. Cameron struct list_head *this, *tmp; 84799846590eSStephen M. Cameron 84809846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 84819846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 84829846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 84839846590eSStephen M. Cameron offline_list); 84849846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8485d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8486d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8487d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8488d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84899846590eSStephen M. Cameron return 1; 8490d1fea47cSStephen M. Cameron } 84919846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 849276438d08SStephen M. Cameron } 84939846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84949846590eSStephen M. Cameron return 0; 84959846590eSStephen M. Cameron } 84969846590eSStephen M. Cameron 849734592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 849834592254SScott Teel { 849934592254SScott Teel int rc = 1; /* assume there are changes */ 850034592254SScott Teel struct ReportLUNdata *logdev = NULL; 850134592254SScott Teel 850234592254SScott Teel /* if we can't find out if lun data has changed, 850334592254SScott Teel * assume that it has. 850434592254SScott Teel */ 850534592254SScott Teel 850634592254SScott Teel if (!h->lastlogicals) 85077e8a9486SAmit Kushwaha return rc; 850834592254SScott Teel 850934592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 85107e8a9486SAmit Kushwaha if (!logdev) 85117e8a9486SAmit Kushwaha return rc; 85127e8a9486SAmit Kushwaha 851334592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 851434592254SScott Teel dev_warn(&h->pdev->dev, 851534592254SScott Teel "report luns failed, can't track lun changes.\n"); 851634592254SScott Teel goto out; 851734592254SScott Teel } 851834592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 851934592254SScott Teel dev_info(&h->pdev->dev, 852034592254SScott Teel "Lun changes detected.\n"); 852134592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 852234592254SScott Teel goto out; 852334592254SScott Teel } else 852434592254SScott Teel rc = 0; /* no changes detected. */ 852534592254SScott Teel out: 852634592254SScott Teel kfree(logdev); 852734592254SScott Teel return rc; 852834592254SScott Teel } 852934592254SScott Teel 85303d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h) 8531a0c12413SStephen M. Cameron { 85323d38f00cSScott Teel struct Scsi_Host *sh = NULL; 8533a0c12413SStephen M. Cameron unsigned long flags; 85349846590eSStephen M. Cameron 8535bfd7546cSDon Brace /* 8536bfd7546cSDon Brace * Do the scan after the reset 8537bfd7546cSDon Brace */ 8538c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 8539bfd7546cSDon Brace if (h->reset_in_progress) { 8540bfd7546cSDon Brace h->drv_req_rescan = 1; 8541c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8542bfd7546cSDon Brace return; 8543bfd7546cSDon Brace } 8544c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8545bfd7546cSDon Brace 854634592254SScott Teel sh = scsi_host_get(h->scsi_host); 854734592254SScott Teel if (sh != NULL) { 854834592254SScott Teel hpsa_scan_start(sh); 854934592254SScott Teel scsi_host_put(sh); 85503d38f00cSScott Teel h->drv_req_rescan = 0; 855134592254SScott Teel } 855234592254SScott Teel } 85533d38f00cSScott Teel 85543d38f00cSScott Teel /* 85553d38f00cSScott Teel * watch for controller events 85563d38f00cSScott Teel */ 85573d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work) 85583d38f00cSScott Teel { 85593d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 85603d38f00cSScott Teel struct ctlr_info, event_monitor_work); 85613d38f00cSScott Teel unsigned long flags; 85623d38f00cSScott Teel 85633d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 85643d38f00cSScott Teel if (h->remove_in_progress) { 85653d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85663d38f00cSScott Teel return; 85673d38f00cSScott Teel } 85683d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85693d38f00cSScott Teel 85703d38f00cSScott Teel if (hpsa_ctlr_needs_rescan(h)) { 85713d38f00cSScott Teel hpsa_ack_ctlr_events(h); 85723d38f00cSScott Teel hpsa_perform_rescan(h); 85733d38f00cSScott Teel } 85743d38f00cSScott Teel 85753d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 85763d38f00cSScott Teel if (!h->remove_in_progress) 857701192088SDon Brace queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work, 85783d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 85793d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85803d38f00cSScott Teel } 85813d38f00cSScott Teel 85823d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work) 85833d38f00cSScott Teel { 85843d38f00cSScott Teel unsigned long flags; 85853d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 85863d38f00cSScott Teel struct ctlr_info, rescan_ctlr_work); 85873d38f00cSScott Teel 85883d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 85893d38f00cSScott Teel if (h->remove_in_progress) { 85903d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85913d38f00cSScott Teel return; 85923d38f00cSScott Teel } 85933d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85943d38f00cSScott Teel 85953d38f00cSScott Teel if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 85963d38f00cSScott Teel hpsa_perform_rescan(h); 85973d38f00cSScott Teel } else if (h->discovery_polling) { 85983d38f00cSScott Teel if (hpsa_luns_changed(h)) { 85993d38f00cSScott Teel dev_info(&h->pdev->dev, 86003d38f00cSScott Teel "driver discovery polling rescan.\n"); 86013d38f00cSScott Teel hpsa_perform_rescan(h); 86023d38f00cSScott Teel } 86039846590eSStephen M. Cameron } 86046636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86056636e7f4SDon Brace if (!h->remove_in_progress) 86066636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86076636e7f4SDon Brace h->heartbeat_sample_interval); 86086636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86096636e7f4SDon Brace } 86106636e7f4SDon Brace 86116636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86126636e7f4SDon Brace { 86136636e7f4SDon Brace unsigned long flags; 86146636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86156636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86166636e7f4SDon Brace 86176636e7f4SDon Brace detect_controller_lockup(h); 86186636e7f4SDon Brace if (lockup_detected(h)) 86196636e7f4SDon Brace return; 86209846590eSStephen M. Cameron 86218a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86226636e7f4SDon Brace if (!h->remove_in_progress) 862301192088SDon Brace queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work, 86248a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86258a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8626a0c12413SStephen M. Cameron } 8627a0c12413SStephen M. Cameron 86286636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86296636e7f4SDon Brace char *name) 86306636e7f4SDon Brace { 86316636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86326636e7f4SDon Brace 8633397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86346636e7f4SDon Brace if (!wq) 86356636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86366636e7f4SDon Brace 86376636e7f4SDon Brace return wq; 86386636e7f4SDon Brace } 86396636e7f4SDon Brace 86408b834bffSMing Lei static void hpda_free_ctlr_info(struct ctlr_info *h) 86418b834bffSMing Lei { 86428b834bffSMing Lei kfree(h->reply_map); 86438b834bffSMing Lei kfree(h); 86448b834bffSMing Lei } 86458b834bffSMing Lei 86468b834bffSMing Lei static struct ctlr_info *hpda_alloc_ctlr_info(void) 86478b834bffSMing Lei { 86488b834bffSMing Lei struct ctlr_info *h; 86498b834bffSMing Lei 86508b834bffSMing Lei h = kzalloc(sizeof(*h), GFP_KERNEL); 86518b834bffSMing Lei if (!h) 86528b834bffSMing Lei return NULL; 86538b834bffSMing Lei 86546396bb22SKees Cook h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 86558b834bffSMing Lei if (!h->reply_map) { 86568b834bffSMing Lei kfree(h); 86578b834bffSMing Lei return NULL; 86588b834bffSMing Lei } 86598b834bffSMing Lei return h; 86608b834bffSMing Lei } 86618b834bffSMing Lei 86626f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86634c2a8c40SStephen M. Cameron { 86641fc65919SLee Jones int rc; 86654c2a8c40SStephen M. Cameron struct ctlr_info *h; 866664670ac8SStephen M. Cameron int try_soft_reset = 0; 866764670ac8SStephen M. Cameron unsigned long flags; 86686b6c1cd7STomas Henzl u32 board_id; 86694c2a8c40SStephen M. Cameron 86704c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86714c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86724c2a8c40SStephen M. Cameron 8673135ae6edSHannes Reinecke rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 86746b6c1cd7STomas Henzl if (rc < 0) { 86756b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 86766b6c1cd7STomas Henzl return rc; 86776b6c1cd7STomas Henzl } 86786b6c1cd7STomas Henzl 86796b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 868064670ac8SStephen M. Cameron if (rc) { 868164670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 86824c2a8c40SStephen M. Cameron return rc; 868364670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 868464670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 868564670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 868664670ac8SStephen M. Cameron * point that it can accept a command. 868764670ac8SStephen M. Cameron */ 868864670ac8SStephen M. Cameron try_soft_reset = 1; 868964670ac8SStephen M. Cameron rc = 0; 869064670ac8SStephen M. Cameron } 869164670ac8SStephen M. Cameron 869264670ac8SStephen M. Cameron reinit_after_soft_reset: 86934c2a8c40SStephen M. Cameron 8694303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8695303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8696303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8697303932fdSDon Brace */ 8698303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 86998b834bffSMing Lei h = hpda_alloc_ctlr_info(); 8700105a3dbcSRobert Elliott if (!h) { 8701105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8702ecd9aad4SStephen M. Cameron return -ENOMEM; 8703105a3dbcSRobert Elliott } 8704edd16368SStephen M. Cameron 870555c06c71SStephen M. Cameron h->pdev = pdev; 8706105a3dbcSRobert Elliott 8707a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 87089846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 87096eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 87109846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 87116eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 8712c59d04f3SDon Brace spin_lock_init(&h->reset_lock); 871334f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8714094963daSStephen M. Cameron 8715094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8716094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87172a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8718105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87192a5ac326SStephen M. Cameron rc = -ENOMEM; 87202efa5929SRobert Elliott goto clean1; /* aer/h */ 87212a5ac326SStephen M. Cameron } 8722094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8723094963daSStephen M. Cameron 872455c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8725105a3dbcSRobert Elliott if (rc) 87262946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8727edd16368SStephen M. Cameron 87282946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87292946e82bSRobert Elliott * interrupt_mode h->intr */ 87302946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87312946e82bSRobert Elliott if (rc) 87322946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87332946e82bSRobert Elliott 87342946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8735edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8736edd16368SStephen M. Cameron number_of_controllers++; 8737edd16368SStephen M. Cameron 8738edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 87398bc8f47eSChristoph Hellwig rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 87401fc65919SLee Jones if (rc != 0) { 87418bc8f47eSChristoph Hellwig rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 87421fc65919SLee Jones if (rc != 0) { 8743edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87442946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8745edd16368SStephen M. Cameron } 8746ecd9aad4SStephen M. Cameron } 8747edd16368SStephen M. Cameron 8748edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8749edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 875010f66018SStephen M. Cameron 8751105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8752105a3dbcSRobert Elliott if (rc) 87532946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8754d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87558947fd10SRobert Elliott if (rc) 87562946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8757105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8758105a3dbcSRobert Elliott if (rc) 87592946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8760a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 8761d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8762d604f533SWebb Scales mutex_init(&h->reset_mutex); 8763a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 876487b9e6aaSDon Brace h->scan_waiting = 0; 8765edd16368SStephen M. Cameron 8766edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87679a41338eSStephen M. Cameron h->ndevices = 0; 87682946e82bSRobert Elliott 87699a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8770105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8771105a3dbcSRobert Elliott if (rc) 87722946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 87732946e82bSRobert Elliott 87742efa5929SRobert Elliott /* create the resubmit workqueue */ 87752efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 87762efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 87772efa5929SRobert Elliott rc = -ENOMEM; 87782efa5929SRobert Elliott goto clean7; 87792efa5929SRobert Elliott } 87802efa5929SRobert Elliott 87812efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 87822efa5929SRobert Elliott if (!h->resubmit_wq) { 87832efa5929SRobert Elliott rc = -ENOMEM; 87842efa5929SRobert Elliott goto clean7; /* aer/h */ 87852efa5929SRobert Elliott } 878664670ac8SStephen M. Cameron 878701192088SDon Brace h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor"); 878801192088SDon Brace if (!h->monitor_ctlr_wq) { 878901192088SDon Brace rc = -ENOMEM; 879001192088SDon Brace goto clean7; 879101192088SDon Brace } 879201192088SDon Brace 8793105a3dbcSRobert Elliott /* 8794105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 879564670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 879664670ac8SStephen M. Cameron * the soft reset and see if that works. 879764670ac8SStephen M. Cameron */ 879864670ac8SStephen M. Cameron if (try_soft_reset) { 879964670ac8SStephen M. Cameron 880064670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 880164670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 880264670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 880364670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 880464670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 880564670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 880664670ac8SStephen M. Cameron */ 880764670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 880864670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 880964670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8810ec501a18SRobert Elliott hpsa_free_irqs(h); 88119ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 881264670ac8SStephen M. Cameron hpsa_intx_discard_completions); 881364670ac8SStephen M. Cameron if (rc) { 88149ee61794SRobert Elliott dev_warn(&h->pdev->dev, 88159ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8816d498757cSRobert Elliott /* 8817b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8818b2ef480cSRobert Elliott * again. Instead, do its work 8819b2ef480cSRobert Elliott */ 8820b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8821b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8822b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8823b2ef480cSRobert Elliott /* 8824b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8825b2ef480cSRobert Elliott * was just called before request_irqs failed 8826d498757cSRobert Elliott */ 8827d498757cSRobert Elliott goto clean3; 882864670ac8SStephen M. Cameron } 882964670ac8SStephen M. Cameron 883064670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 883164670ac8SStephen M. Cameron if (rc) 883264670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88337ef7323fSDon Brace goto clean7; 883464670ac8SStephen M. Cameron 883564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 883664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 883764670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 883864670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 883964670ac8SStephen M. Cameron msleep(10000); 884064670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 884164670ac8SStephen M. Cameron 884264670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 884364670ac8SStephen M. Cameron if (rc) 884464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 884564670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 884664670ac8SStephen M. Cameron 884764670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 884864670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 884964670ac8SStephen M. Cameron * all over again. 885064670ac8SStephen M. Cameron */ 885164670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 885264670ac8SStephen M. Cameron try_soft_reset = 0; 885364670ac8SStephen M. Cameron if (rc) 8854b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 885564670ac8SStephen M. Cameron return -ENODEV; 885664670ac8SStephen M. Cameron 885764670ac8SStephen M. Cameron goto reinit_after_soft_reset; 885864670ac8SStephen M. Cameron } 8859edd16368SStephen M. Cameron 8860da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8861da0697bdSScott Teel h->acciopath_status = 1; 886234592254SScott Teel /* Disable discovery polling.*/ 886334592254SScott Teel h->discovery_polling = 0; 8864da0697bdSScott Teel 8865e863d68eSScott Teel 8866edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8867edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8868edd16368SStephen M. Cameron 8869339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88708a98db73SStephen M. Cameron 887134592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 887234592254SScott Teel if (!h->lastlogicals) 887334592254SScott Teel dev_info(&h->pdev->dev, 887434592254SScott Teel "Can't track change to report lun data\n"); 887534592254SScott Teel 8876cf477237SDon Brace /* hook into SCSI subsystem */ 8877cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8878cf477237SDon Brace if (rc) 8879af61bc1eSKeita Suzuki goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8880cf477237SDon Brace 88818a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 88828a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 88838a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 88848a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 88858a98db73SStephen M. Cameron h->heartbeat_sample_interval); 88866636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 88876636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 88886636e7f4SDon Brace h->heartbeat_sample_interval); 88893d38f00cSScott Teel INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 88903d38f00cSScott Teel schedule_delayed_work(&h->event_monitor_work, 88913d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 889288bf6d62SStephen M. Cameron return 0; 8893edd16368SStephen M. Cameron 8894af61bc1eSKeita Suzuki clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8895af61bc1eSKeita Suzuki kfree(h->lastlogicals); 88962946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8897105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8898105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8899105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 890033a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 89012946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 89022e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 89032946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8904ec501a18SRobert Elliott hpsa_free_irqs(h); 89052946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 89062946e82bSRobert Elliott scsi_host_put(h->scsi_host); 89072946e82bSRobert Elliott h->scsi_host = NULL; 89082946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8909195f2c65SRobert Elliott hpsa_free_pci_init(h); 89102946e82bSRobert Elliott clean2: /* lu, aer/h */ 8911105a3dbcSRobert Elliott if (h->lockup_detected) { 8912094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8913105a3dbcSRobert Elliott h->lockup_detected = NULL; 8914105a3dbcSRobert Elliott } 8915105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8916105a3dbcSRobert Elliott if (h->resubmit_wq) { 8917105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8918105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8919105a3dbcSRobert Elliott } 8920105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8921105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8922105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8923105a3dbcSRobert Elliott } 892401192088SDon Brace if (h->monitor_ctlr_wq) { 892501192088SDon Brace destroy_workqueue(h->monitor_ctlr_wq); 892601192088SDon Brace h->monitor_ctlr_wq = NULL; 892701192088SDon Brace } 89289c9ff300SYuan Can hpda_free_ctlr_info(h); 8929ecd9aad4SStephen M. Cameron return rc; 8930edd16368SStephen M. Cameron } 8931edd16368SStephen M. Cameron 8932edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8933edd16368SStephen M. Cameron { 8934edd16368SStephen M. Cameron char *flush_buf; 8935edd16368SStephen M. Cameron struct CommandList *c; 893625163bd5SWebb Scales int rc; 8937702890e3SStephen M. Cameron 8938094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8939702890e3SStephen M. Cameron return; 8940edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8941edd16368SStephen M. Cameron if (!flush_buf) 8942edd16368SStephen M. Cameron return; 8943edd16368SStephen M. Cameron 894445fcb86eSStephen Cameron c = cmd_alloc(h); 8945bf43caf3SRobert Elliott 8946a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8947a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8948a2dac136SStephen M. Cameron goto out; 8949a2dac136SStephen M. Cameron } 89508bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 89518bc8f47eSChristoph Hellwig DEFAULT_TIMEOUT); 895225163bd5SWebb Scales if (rc) 895325163bd5SWebb Scales goto out; 8954edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8955a2dac136SStephen M. Cameron out: 8956edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8957edd16368SStephen M. Cameron "error flushing cache on controller\n"); 895845fcb86eSStephen Cameron cmd_free(h, c); 8959edd16368SStephen M. Cameron kfree(flush_buf); 8960edd16368SStephen M. Cameron } 8961edd16368SStephen M. Cameron 8962c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8963c2adae44SScott Teel * send down a report luns request 8964c2adae44SScott Teel */ 8965c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8966c2adae44SScott Teel { 8967c2adae44SScott Teel u32 *options; 8968c2adae44SScott Teel struct CommandList *c; 8969c2adae44SScott Teel int rc; 8970c2adae44SScott Teel 8971c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8972c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8973c2adae44SScott Teel return; 8974c2adae44SScott Teel 8975c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 89767e8a9486SAmit Kushwaha if (!options) 8977c2adae44SScott Teel return; 8978c2adae44SScott Teel 8979c2adae44SScott Teel c = cmd_alloc(h); 8980c2adae44SScott Teel 8981c2adae44SScott Teel /* first, get the current diag options settings */ 8982c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8983c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8984c2adae44SScott Teel goto errout; 8985c2adae44SScott Teel 89868bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 89878bc8f47eSChristoph Hellwig NO_TIMEOUT); 8988c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8989c2adae44SScott Teel goto errout; 8990c2adae44SScott Teel 8991c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8992c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8993c2adae44SScott Teel 8994c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8995c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8996c2adae44SScott Teel goto errout; 8997c2adae44SScott Teel 89988bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 89998bc8f47eSChristoph Hellwig NO_TIMEOUT); 9000c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9001c2adae44SScott Teel goto errout; 9002c2adae44SScott Teel 9003c2adae44SScott Teel /* Now verify that it got set: */ 9004c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9005c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9006c2adae44SScott Teel goto errout; 9007c2adae44SScott Teel 90088bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 90098bc8f47eSChristoph Hellwig NO_TIMEOUT); 9010c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9011c2adae44SScott Teel goto errout; 9012c2adae44SScott Teel 9013d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9014c2adae44SScott Teel goto out; 9015c2adae44SScott Teel 9016c2adae44SScott Teel errout: 9017c2adae44SScott Teel dev_err(&h->pdev->dev, 9018c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 9019c2adae44SScott Teel out: 9020c2adae44SScott Teel cmd_free(h, c); 9021c2adae44SScott Teel kfree(options); 9022c2adae44SScott Teel } 9023c2adae44SScott Teel 90240d98ba8dSSinan Kaya static void __hpsa_shutdown(struct pci_dev *pdev) 9025edd16368SStephen M. Cameron { 9026edd16368SStephen M. Cameron struct ctlr_info *h; 9027edd16368SStephen M. Cameron 9028edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9029edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9030edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9031edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9032edd16368SStephen M. Cameron */ 9033edd16368SStephen M. Cameron hpsa_flush_cache(h); 9034edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9035105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9036cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9037edd16368SStephen M. Cameron } 9038edd16368SStephen M. Cameron 90390d98ba8dSSinan Kaya static void hpsa_shutdown(struct pci_dev *pdev) 90400d98ba8dSSinan Kaya { 90410d98ba8dSSinan Kaya __hpsa_shutdown(pdev); 90420d98ba8dSSinan Kaya pci_disable_device(pdev); 90430d98ba8dSSinan Kaya } 90440d98ba8dSSinan Kaya 90456f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 904655e14e76SStephen M. Cameron { 904755e14e76SStephen M. Cameron int i; 904855e14e76SStephen M. Cameron 9049105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 905055e14e76SStephen M. Cameron kfree(h->dev[i]); 9051105a3dbcSRobert Elliott h->dev[i] = NULL; 9052105a3dbcSRobert Elliott } 905355e14e76SStephen M. Cameron } 905455e14e76SStephen M. Cameron 90556f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9056edd16368SStephen M. Cameron { 9057edd16368SStephen M. Cameron struct ctlr_info *h; 90588a98db73SStephen M. Cameron unsigned long flags; 9059edd16368SStephen M. Cameron 9060edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9061edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9062edd16368SStephen M. Cameron return; 9063edd16368SStephen M. Cameron } 9064edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90658a98db73SStephen M. Cameron 90668a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90678a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90688a98db73SStephen M. Cameron h->remove_in_progress = 1; 90698a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90706636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90716636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90723d38f00cSScott Teel cancel_delayed_work_sync(&h->event_monitor_work); 90736636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90746636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 907501192088SDon Brace destroy_workqueue(h->monitor_ctlr_wq); 9076cc64c817SRobert Elliott 9077dfb2e6f4SMartin Wilck hpsa_delete_sas_host(h); 9078dfb2e6f4SMartin Wilck 90792d041306SDon Brace /* 90802d041306SDon Brace * Call before disabling interrupts. 90812d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90822d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90832d041306SDon Brace * operations which cannot complete and will hang the system. 90842d041306SDon Brace */ 90852d041306SDon Brace if (h->scsi_host) 90862d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9087105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9088195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 90890d98ba8dSSinan Kaya __hpsa_shutdown(pdev); 9090cc64c817SRobert Elliott 9091105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9092105a3dbcSRobert Elliott 90932946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90942946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 90952946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9096105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9097105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 90981fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 909934592254SScott Teel kfree(h->lastlogicals); 9100105a3dbcSRobert Elliott 9101105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9102195f2c65SRobert Elliott 91032946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 91042946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 91052946e82bSRobert Elliott 9106195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 91072946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9108195f2c65SRobert Elliott 9109105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9110105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9111105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9112d04e62b9SKevin Barnett 91138b834bffSMing Lei hpda_free_ctlr_info(h); /* init_one 1 */ 9114edd16368SStephen M. Cameron } 9115edd16368SStephen M. Cameron 9116e5b79ebfSVaibhav Gupta static int __maybe_unused hpsa_suspend( 9117e5b79ebfSVaibhav Gupta __attribute__((unused)) struct device *dev) 9118edd16368SStephen M. Cameron { 9119edd16368SStephen M. Cameron return -ENOSYS; 9120edd16368SStephen M. Cameron } 9121edd16368SStephen M. Cameron 9122e5b79ebfSVaibhav Gupta static int __maybe_unused hpsa_resume 9123e5b79ebfSVaibhav Gupta (__attribute__((unused)) struct device *dev) 9124edd16368SStephen M. Cameron { 9125edd16368SStephen M. Cameron return -ENOSYS; 9126edd16368SStephen M. Cameron } 9127edd16368SStephen M. Cameron 9128e5b79ebfSVaibhav Gupta static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume); 9129e5b79ebfSVaibhav Gupta 9130edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9131f79cfec6SStephen M. Cameron .name = HPSA, 9132edd16368SStephen M. Cameron .probe = hpsa_init_one, 91336f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9134edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9135edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9136e5b79ebfSVaibhav Gupta .driver.pm = &hpsa_pm_ops, 9137edd16368SStephen M. Cameron }; 9138edd16368SStephen M. Cameron 9139303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9140303932fdSDon Brace * scatter gather elements supported) and bucket[], 9141303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9142303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9143303932fdSDon Brace * byte increments) which the controller uses to fetch 9144303932fdSDon Brace * commands. This function fills in bucket_map[], which 9145303932fdSDon Brace * maps a given number of scatter gather elements to one of 9146303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9147303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9148303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9149303932fdSDon Brace * bits of the command address. 9150303932fdSDon Brace */ 9151303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91522b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9153303932fdSDon Brace { 9154303932fdSDon Brace int i, j, b, size; 9155303932fdSDon Brace 9156303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9157303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9158303932fdSDon Brace /* Compute size of a command with i SG entries */ 9159e1f7de0cSMatt Gates size = i + min_blocks; 9160303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9161303932fdSDon Brace /* Find the bucket that is just big enough */ 9162e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9163303932fdSDon Brace if (bucket[j] >= size) { 9164303932fdSDon Brace b = j; 9165303932fdSDon Brace break; 9166303932fdSDon Brace } 9167303932fdSDon Brace } 9168303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9169303932fdSDon Brace bucket_map[i] = b; 9170303932fdSDon Brace } 9171303932fdSDon Brace } 9172303932fdSDon Brace 9173105a3dbcSRobert Elliott /* 9174105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9175105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9176105a3dbcSRobert Elliott */ 9177c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9178303932fdSDon Brace { 91796c311b57SStephen M. Cameron int i; 91806c311b57SStephen M. Cameron unsigned long register_value; 9181e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9182e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9183e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9184b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9185b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9186e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9187def342bdSStephen M. Cameron 9188def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9189def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9190def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9191def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9192def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9193def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9194def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9195def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9196def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9197def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9198d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9199def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9200def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9201def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9202def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9203def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9204def342bdSStephen M. Cameron */ 9205d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9206b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9207b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9208b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9209b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9210b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9211b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9212b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9213b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9214b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9215b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9216d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9217303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9218303932fdSDon Brace * 6 = 2 s/g entry or 8k 9219303932fdSDon Brace * 8 = 4 s/g entry or 16k 9220303932fdSDon Brace * 10 = 6 s/g entry or 24k 9221303932fdSDon Brace */ 9222303932fdSDon Brace 9223b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9224b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9225b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9226b3a52e79SStephen M. Cameron */ 9227b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9228b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9229b3a52e79SStephen M. Cameron 9230303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9231072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9232072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9233303932fdSDon Brace 9234d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9235d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9236e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9237303932fdSDon Brace for (i = 0; i < 8; i++) 9238303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9239303932fdSDon Brace 9240303932fdSDon Brace /* size of controller ring buffer */ 9241303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9242254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9243303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9244303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9245254f796bSMatt Gates 9246254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9247254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9248072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9249254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9250254f796bSMatt Gates } 9251254f796bSMatt Gates 9252b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9253e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9254e1f7de0cSMatt Gates /* 9255e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9256e1f7de0cSMatt Gates */ 9257e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9258e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9259e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9260e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 926196b6ce4eSDon Brace } else 926296b6ce4eSDon Brace if (trans_support & CFGTBL_Trans_io_accel2) 9263c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9264303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9265c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9266c706a795SRobert Elliott dev_err(&h->pdev->dev, 9267c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9268c706a795SRobert Elliott return -ENODEV; 9269c706a795SRobert Elliott } 9270303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9271303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9272050f7147SStephen Cameron dev_err(&h->pdev->dev, 9273050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9274c706a795SRobert Elliott return -ENODEV; 9275303932fdSDon Brace } 9276960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9277e1f7de0cSMatt Gates h->access = access; 9278e1f7de0cSMatt Gates h->transMethod = transMethod; 9279e1f7de0cSMatt Gates 9280b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9281b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9282c706a795SRobert Elliott return 0; 9283e1f7de0cSMatt Gates 9284b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9285e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9286e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9287e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9288e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9289e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9290e1f7de0cSMatt Gates } 9291283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9292283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9293e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9294e1f7de0cSMatt Gates 9295e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9296072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9297072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9298072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9299072b0518SStephen M. Cameron h->reply_queue_size); 9300e1f7de0cSMatt Gates 9301e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9302e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9303e1f7de0cSMatt Gates */ 9304e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9305e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9306e1f7de0cSMatt Gates 9307e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9308e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9309e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9310e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9311e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 93122b08b3e9SDon Brace cp->host_context_flags = 93132b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9314e1f7de0cSMatt Gates cp->timeout_sec = 0; 9315e1f7de0cSMatt Gates cp->ReplyQueue = 0; 931650a0decfSStephen M. Cameron cp->tag = 9317f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 931850a0decfSStephen M. Cameron cp->host_addr = 931950a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9320e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9321e1f7de0cSMatt Gates } 9322b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9323b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9324b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9325b9af4937SStephen M. Cameron 93261fc65919SLee Jones hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9327b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9328b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9329b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9330b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9331b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9332b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9333b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9334b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9335b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9336b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9337b9af4937SStephen M. Cameron cfg_base_addr_index) + 9338b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9339b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9340b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9341b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9342b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9343b9af4937SStephen M. Cameron } 9344b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9345c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9346c706a795SRobert Elliott dev_err(&h->pdev->dev, 9347c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9348c706a795SRobert Elliott return -ENODEV; 9349c706a795SRobert Elliott } 9350c706a795SRobert Elliott return 0; 9351e1f7de0cSMatt Gates } 9352e1f7de0cSMatt Gates 93531fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93541fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93551fb7c98aSRobert Elliott { 9356105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93578f31fa53SSuraj Upadhyay dma_free_coherent(&h->pdev->dev, 93581fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93591fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93601fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9361105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9362105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9363105a3dbcSRobert Elliott } 93641fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9365105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93661fb7c98aSRobert Elliott } 93671fb7c98aSRobert Elliott 9368d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9369d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9370e1f7de0cSMatt Gates { 9371283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9372283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9373283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9374283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9375283b4a9bSStephen M. Cameron 9376e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9377e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9378e1f7de0cSMatt Gates * hardware. 9379e1f7de0cSMatt Gates */ 9380e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9381e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9382e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 93838bc8f47eSChristoph Hellwig dma_alloc_coherent(&h->pdev->dev, 9384e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93858bc8f47eSChristoph Hellwig &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9386e1f7de0cSMatt Gates 9387e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9388283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9389e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9390e1f7de0cSMatt Gates 9391e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9392e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9393e1f7de0cSMatt Gates goto clean_up; 9394e1f7de0cSMatt Gates 9395e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9396e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9397e1f7de0cSMatt Gates return 0; 9398e1f7de0cSMatt Gates 9399e1f7de0cSMatt Gates clean_up: 94001fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 94012dd02d74SRobert Elliott return -ENOMEM; 94026c311b57SStephen M. Cameron } 94036c311b57SStephen M. Cameron 94041fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 94051fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 94061fb7c98aSRobert Elliott { 9407d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9408d9a729f3SWebb Scales 9409105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 94108f31fa53SSuraj Upadhyay dma_free_coherent(&h->pdev->dev, 94111fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94121fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 94131fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9414105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9415105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9416105a3dbcSRobert Elliott } 94171fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9418105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 94191fb7c98aSRobert Elliott } 94201fb7c98aSRobert Elliott 9421d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9422d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9423aca9012aSStephen M. Cameron { 9424d9a729f3SWebb Scales int rc; 9425d9a729f3SWebb Scales 9426aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9427aca9012aSStephen M. Cameron 9428aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9429aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9430aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9431aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9432aca9012aSStephen M. Cameron 9433aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9434aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9435aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 94368bc8f47eSChristoph Hellwig dma_alloc_coherent(&h->pdev->dev, 9437aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94388bc8f47eSChristoph Hellwig &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9439aca9012aSStephen M. Cameron 9440aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9441aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9442aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9443aca9012aSStephen M. Cameron 9444aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9445d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9446d9a729f3SWebb Scales rc = -ENOMEM; 9447d9a729f3SWebb Scales goto clean_up; 9448d9a729f3SWebb Scales } 9449d9a729f3SWebb Scales 9450d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9451d9a729f3SWebb Scales if (rc) 9452aca9012aSStephen M. Cameron goto clean_up; 9453aca9012aSStephen M. Cameron 9454aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9455aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9456aca9012aSStephen M. Cameron return 0; 9457aca9012aSStephen M. Cameron 9458aca9012aSStephen M. Cameron clean_up: 94591fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9460d9a729f3SWebb Scales return rc; 9461aca9012aSStephen M. Cameron } 9462aca9012aSStephen M. Cameron 9463105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9464105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9465105a3dbcSRobert Elliott { 9466105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9467105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9468105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9469105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9470105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9471105a3dbcSRobert Elliott } 9472105a3dbcSRobert Elliott 9473105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9474105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9475105a3dbcSRobert Elliott */ 9476105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94776c311b57SStephen M. Cameron { 94786c311b57SStephen M. Cameron u32 trans_support; 9479e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9480e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9481105a3dbcSRobert Elliott int i, rc; 94826c311b57SStephen M. Cameron 948302ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9484105a3dbcSRobert Elliott return 0; 948502ec19c8SStephen M. Cameron 948667c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 948767c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9488105a3dbcSRobert Elliott return 0; 948967c99a72Sscameron@beardog.cce.hp.com 9490e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9491e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9492e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9493e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9494105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9495105a3dbcSRobert Elliott if (rc) 9496105a3dbcSRobert Elliott return rc; 9497105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9498aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9499aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9500105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9501105a3dbcSRobert Elliott if (rc) 9502105a3dbcSRobert Elliott return rc; 9503e1f7de0cSMatt Gates } 9504e1f7de0cSMatt Gates 9505bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9506cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 95076c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9508072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 95096c311b57SStephen M. Cameron 9510254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 95118bc8f47eSChristoph Hellwig h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9512072b0518SStephen M. Cameron h->reply_queue_size, 95138bc8f47eSChristoph Hellwig &h->reply_queue[i].busaddr, 95148bc8f47eSChristoph Hellwig GFP_KERNEL); 9515105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9516105a3dbcSRobert Elliott rc = -ENOMEM; 9517105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9518105a3dbcSRobert Elliott } 9519254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9520254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9521254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9522254f796bSMatt Gates } 9523254f796bSMatt Gates 95246c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9525d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95266c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9527105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9528105a3dbcSRobert Elliott rc = -ENOMEM; 9529105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9530105a3dbcSRobert Elliott } 95316c311b57SStephen M. Cameron 9532105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9533105a3dbcSRobert Elliott if (rc) 9534105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9535105a3dbcSRobert Elliott return 0; 9536303932fdSDon Brace 9537105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9538303932fdSDon Brace kfree(h->blockFetchTable); 9539105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9540105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9541105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9542105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9543105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9544105a3dbcSRobert Elliott return rc; 9545303932fdSDon Brace } 9546303932fdSDon Brace 954723100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 954876438d08SStephen M. Cameron { 954923100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 955023100dd9SStephen M. Cameron } 955123100dd9SStephen M. Cameron 955223100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 955323100dd9SStephen M. Cameron { 955423100dd9SStephen M. Cameron struct CommandList *c = NULL; 9555f2405db8SDon Brace int i, accel_cmds_out; 9556281a7fd0SWebb Scales int refcount; 955776438d08SStephen M. Cameron 9558f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 955923100dd9SStephen M. Cameron accel_cmds_out = 0; 9560f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9561f2405db8SDon Brace c = h->cmd_pool + i; 9562281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9563281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 956423100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9565281a7fd0SWebb Scales cmd_free(h, c); 9566f2405db8SDon Brace } 956723100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 956876438d08SStephen M. Cameron break; 956976438d08SStephen M. Cameron msleep(100); 957076438d08SStephen M. Cameron } while (1); 957176438d08SStephen M. Cameron } 957276438d08SStephen M. Cameron 9573d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9574d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9575d04e62b9SKevin Barnett { 9576d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9577d04e62b9SKevin Barnett struct sas_phy *phy; 9578d04e62b9SKevin Barnett 9579d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9580d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9581d04e62b9SKevin Barnett return NULL; 9582d04e62b9SKevin Barnett 9583d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9584d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9585d04e62b9SKevin Barnett if (!phy) { 9586d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9587d04e62b9SKevin Barnett return NULL; 9588d04e62b9SKevin Barnett } 9589d04e62b9SKevin Barnett 9590d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9591d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9592d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9593d04e62b9SKevin Barnett 9594d04e62b9SKevin Barnett return hpsa_sas_phy; 9595d04e62b9SKevin Barnett } 9596d04e62b9SKevin Barnett 9597d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9598d04e62b9SKevin Barnett { 9599d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9600d04e62b9SKevin Barnett 9601d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9602d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9603d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 960455ca38b4SMartin Wilck sas_phy_delete(phy); 9605d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9606d04e62b9SKevin Barnett } 9607d04e62b9SKevin Barnett 9608d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9609d04e62b9SKevin Barnett { 9610d04e62b9SKevin Barnett int rc; 9611d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9612d04e62b9SKevin Barnett struct sas_phy *phy; 9613d04e62b9SKevin Barnett struct sas_identify *identify; 9614d04e62b9SKevin Barnett 9615d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9616d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9617d04e62b9SKevin Barnett 9618d04e62b9SKevin Barnett identify = &phy->identify; 9619d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9620d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9621d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9622d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9623d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9624d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9625d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9626d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9627d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9628d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9629d04e62b9SKevin Barnett 9630d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9631d04e62b9SKevin Barnett if (rc) 9632d04e62b9SKevin Barnett return rc; 9633d04e62b9SKevin Barnett 9634d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9635d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9636d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9637d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9638d04e62b9SKevin Barnett 9639d04e62b9SKevin Barnett return 0; 9640d04e62b9SKevin Barnett } 9641d04e62b9SKevin Barnett 9642d04e62b9SKevin Barnett static int 9643d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9644d04e62b9SKevin Barnett struct sas_rphy *rphy) 9645d04e62b9SKevin Barnett { 9646d04e62b9SKevin Barnett struct sas_identify *identify; 9647d04e62b9SKevin Barnett 9648d04e62b9SKevin Barnett identify = &rphy->identify; 9649d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9650d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9651d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9652d04e62b9SKevin Barnett 9653d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9654d04e62b9SKevin Barnett } 9655d04e62b9SKevin Barnett 9656d04e62b9SKevin Barnett static struct hpsa_sas_port 9657d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9658d04e62b9SKevin Barnett u64 sas_address) 9659d04e62b9SKevin Barnett { 9660d04e62b9SKevin Barnett int rc; 9661d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9662d04e62b9SKevin Barnett struct sas_port *port; 9663d04e62b9SKevin Barnett 9664d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9665d04e62b9SKevin Barnett if (!hpsa_sas_port) 9666d04e62b9SKevin Barnett return NULL; 9667d04e62b9SKevin Barnett 9668d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9669d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9670d04e62b9SKevin Barnett 9671d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9672d04e62b9SKevin Barnett if (!port) 9673d04e62b9SKevin Barnett goto free_hpsa_port; 9674d04e62b9SKevin Barnett 9675d04e62b9SKevin Barnett rc = sas_port_add(port); 9676d04e62b9SKevin Barnett if (rc) 9677d04e62b9SKevin Barnett goto free_sas_port; 9678d04e62b9SKevin Barnett 9679d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9680d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9681d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9682d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9683d04e62b9SKevin Barnett 9684d04e62b9SKevin Barnett return hpsa_sas_port; 9685d04e62b9SKevin Barnett 9686d04e62b9SKevin Barnett free_sas_port: 9687d04e62b9SKevin Barnett sas_port_free(port); 9688d04e62b9SKevin Barnett free_hpsa_port: 9689d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9690d04e62b9SKevin Barnett 9691d04e62b9SKevin Barnett return NULL; 9692d04e62b9SKevin Barnett } 9693d04e62b9SKevin Barnett 9694d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9695d04e62b9SKevin Barnett { 9696d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9697d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9698d04e62b9SKevin Barnett 9699d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9700d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9701d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9702d04e62b9SKevin Barnett 9703d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9704d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9705d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9706d04e62b9SKevin Barnett } 9707d04e62b9SKevin Barnett 9708d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9709d04e62b9SKevin Barnett { 9710d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9711d04e62b9SKevin Barnett 9712d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9713d04e62b9SKevin Barnett if (hpsa_sas_node) { 9714d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9715d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9716d04e62b9SKevin Barnett } 9717d04e62b9SKevin Barnett 9718d04e62b9SKevin Barnett return hpsa_sas_node; 9719d04e62b9SKevin Barnett } 9720d04e62b9SKevin Barnett 9721d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9722d04e62b9SKevin Barnett { 9723d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9724d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9725d04e62b9SKevin Barnett 9726d04e62b9SKevin Barnett if (!hpsa_sas_node) 9727d04e62b9SKevin Barnett return; 9728d04e62b9SKevin Barnett 9729d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9730d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9731d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9732d04e62b9SKevin Barnett 9733d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9734d04e62b9SKevin Barnett } 9735d04e62b9SKevin Barnett 9736d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9737d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9738d04e62b9SKevin Barnett struct sas_rphy *rphy) 9739d04e62b9SKevin Barnett { 9740d04e62b9SKevin Barnett int i; 9741d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9742d04e62b9SKevin Barnett 9743d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9744d04e62b9SKevin Barnett device = h->dev[i]; 9745d04e62b9SKevin Barnett if (!device->sas_port) 9746d04e62b9SKevin Barnett continue; 9747d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9748d04e62b9SKevin Barnett return device; 9749d04e62b9SKevin Barnett } 9750d04e62b9SKevin Barnett 9751d04e62b9SKevin Barnett return NULL; 9752d04e62b9SKevin Barnett } 9753d04e62b9SKevin Barnett 9754d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9755d04e62b9SKevin Barnett { 9756d04e62b9SKevin Barnett int rc; 9757d04e62b9SKevin Barnett struct device *parent_dev; 9758d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9759d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9760d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9761d04e62b9SKevin Barnett 97620a7c3bb8SDon Brace parent_dev = &h->scsi_host->shost_dev; 9763d04e62b9SKevin Barnett 9764d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9765d04e62b9SKevin Barnett if (!hpsa_sas_node) 9766d04e62b9SKevin Barnett return -ENOMEM; 9767d04e62b9SKevin Barnett 9768d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9769d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9770d04e62b9SKevin Barnett rc = -ENODEV; 9771d04e62b9SKevin Barnett goto free_sas_node; 9772d04e62b9SKevin Barnett } 9773d04e62b9SKevin Barnett 9774d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9775d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9776d04e62b9SKevin Barnett rc = -ENODEV; 9777d04e62b9SKevin Barnett goto free_sas_port; 9778d04e62b9SKevin Barnett } 9779d04e62b9SKevin Barnett 9780d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9781d04e62b9SKevin Barnett if (rc) 9782d04e62b9SKevin Barnett goto free_sas_phy; 9783d04e62b9SKevin Barnett 9784d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9785d04e62b9SKevin Barnett 9786d04e62b9SKevin Barnett return 0; 9787d04e62b9SKevin Barnett 9788d04e62b9SKevin Barnett free_sas_phy: 9789*4ef174a3SYang Yingliang sas_phy_free(hpsa_sas_phy->phy); 9790*4ef174a3SYang Yingliang kfree(hpsa_sas_phy); 9791d04e62b9SKevin Barnett free_sas_port: 9792d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9793d04e62b9SKevin Barnett free_sas_node: 9794d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9795d04e62b9SKevin Barnett 9796d04e62b9SKevin Barnett return rc; 9797d04e62b9SKevin Barnett } 9798d04e62b9SKevin Barnett 9799d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9800d04e62b9SKevin Barnett { 9801d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9802d04e62b9SKevin Barnett } 9803d04e62b9SKevin Barnett 9804d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9805d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9806d04e62b9SKevin Barnett { 9807d04e62b9SKevin Barnett int rc; 9808d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9809d04e62b9SKevin Barnett struct sas_rphy *rphy; 9810d04e62b9SKevin Barnett 9811d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9812d04e62b9SKevin Barnett if (!hpsa_sas_port) 9813d04e62b9SKevin Barnett return -ENOMEM; 9814d04e62b9SKevin Barnett 9815d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9816d04e62b9SKevin Barnett if (!rphy) { 9817d04e62b9SKevin Barnett rc = -ENODEV; 9818d04e62b9SKevin Barnett goto free_sas_port; 9819d04e62b9SKevin Barnett } 9820d04e62b9SKevin Barnett 9821d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9822d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9823d04e62b9SKevin Barnett 9824d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9825d04e62b9SKevin Barnett if (rc) 9826d04e62b9SKevin Barnett goto free_sas_port; 9827d04e62b9SKevin Barnett 9828d04e62b9SKevin Barnett return 0; 9829d04e62b9SKevin Barnett 9830d04e62b9SKevin Barnett free_sas_port: 9831d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9832d04e62b9SKevin Barnett device->sas_port = NULL; 9833d04e62b9SKevin Barnett 9834d04e62b9SKevin Barnett return rc; 9835d04e62b9SKevin Barnett } 9836d04e62b9SKevin Barnett 9837d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9838d04e62b9SKevin Barnett { 9839d04e62b9SKevin Barnett if (device->sas_port) { 9840d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9841d04e62b9SKevin Barnett device->sas_port = NULL; 9842d04e62b9SKevin Barnett } 9843d04e62b9SKevin Barnett } 9844d04e62b9SKevin Barnett 9845d04e62b9SKevin Barnett static int 9846d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9847d04e62b9SKevin Barnett { 9848d04e62b9SKevin Barnett return 0; 9849d04e62b9SKevin Barnett } 9850d04e62b9SKevin Barnett 9851d04e62b9SKevin Barnett static int 9852d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9853d04e62b9SKevin Barnett { 985401d0e789SDon Brace struct Scsi_Host *shost = phy_to_shost(rphy); 985501d0e789SDon Brace struct ctlr_info *h; 985601d0e789SDon Brace struct hpsa_scsi_dev_t *sd; 985701d0e789SDon Brace 985801d0e789SDon Brace if (!shost) 985901d0e789SDon Brace return -ENXIO; 986001d0e789SDon Brace 986101d0e789SDon Brace h = shost_to_hba(shost); 986201d0e789SDon Brace 986301d0e789SDon Brace if (!h) 986401d0e789SDon Brace return -ENXIO; 986501d0e789SDon Brace 986601d0e789SDon Brace sd = hpsa_find_device_by_sas_rphy(h, rphy); 986701d0e789SDon Brace if (!sd) 986801d0e789SDon Brace return -ENXIO; 986901d0e789SDon Brace 987001d0e789SDon Brace *identifier = sd->eli; 987101d0e789SDon Brace 9872d04e62b9SKevin Barnett return 0; 9873d04e62b9SKevin Barnett } 9874d04e62b9SKevin Barnett 9875d04e62b9SKevin Barnett static int 9876d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9877d04e62b9SKevin Barnett { 9878d04e62b9SKevin Barnett return -ENXIO; 9879d04e62b9SKevin Barnett } 9880d04e62b9SKevin Barnett 9881d04e62b9SKevin Barnett static int 9882d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9883d04e62b9SKevin Barnett { 9884d04e62b9SKevin Barnett return 0; 9885d04e62b9SKevin Barnett } 9886d04e62b9SKevin Barnett 9887d04e62b9SKevin Barnett static int 9888d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9889d04e62b9SKevin Barnett { 9890d04e62b9SKevin Barnett return 0; 9891d04e62b9SKevin Barnett } 9892d04e62b9SKevin Barnett 9893d04e62b9SKevin Barnett static int 9894d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9895d04e62b9SKevin Barnett { 9896d04e62b9SKevin Barnett return 0; 9897d04e62b9SKevin Barnett } 9898d04e62b9SKevin Barnett 9899d04e62b9SKevin Barnett static void 9900d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9901d04e62b9SKevin Barnett { 9902d04e62b9SKevin Barnett } 9903d04e62b9SKevin Barnett 9904d04e62b9SKevin Barnett static int 9905d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9906d04e62b9SKevin Barnett { 9907d04e62b9SKevin Barnett return -EINVAL; 9908d04e62b9SKevin Barnett } 9909d04e62b9SKevin Barnett 9910d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9911d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9912d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9913d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9914d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9915d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9916d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9917d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9918d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9919d04e62b9SKevin Barnett }; 9920d04e62b9SKevin Barnett 9921edd16368SStephen M. Cameron /* 9922edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9923edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9924edd16368SStephen M. Cameron */ 9925edd16368SStephen M. Cameron static int __init hpsa_init(void) 9926edd16368SStephen M. Cameron { 9927d04e62b9SKevin Barnett int rc; 9928d04e62b9SKevin Barnett 9929d04e62b9SKevin Barnett hpsa_sas_transport_template = 9930d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9931d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9932d04e62b9SKevin Barnett return -ENODEV; 9933d04e62b9SKevin Barnett 9934d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9935d04e62b9SKevin Barnett 9936d04e62b9SKevin Barnett if (rc) 9937d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9938d04e62b9SKevin Barnett 9939d04e62b9SKevin Barnett return rc; 9940edd16368SStephen M. Cameron } 9941edd16368SStephen M. Cameron 9942edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9943edd16368SStephen M. Cameron { 9944edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9945d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9946edd16368SStephen M. Cameron } 9947edd16368SStephen M. Cameron 9948e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9949e1f7de0cSMatt Gates { 9950e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9951dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9952dd0e19f3SScott Teel 9953dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9954dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9955dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9956dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9957dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9958dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9959dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9960dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9961dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9962dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9963dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9964dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9965dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9966dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9967dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9968dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9969dd0e19f3SScott Teel 9970dd0e19f3SScott Teel #undef VERIFY_OFFSET 9971dd0e19f3SScott Teel 9972dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9973b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9974b66cc250SMike Miller 9975b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9976b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9977b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9978b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9979b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9980b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9981b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9982b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9983b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9984b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9985b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9986b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9987b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9988b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9989b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9990b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9991b66cc250SMike Miller 9992b66cc250SMike Miller #undef VERIFY_OFFSET 9993b66cc250SMike Miller 9994b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9995e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9996e1f7de0cSMatt Gates 9997e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9998e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9999e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 10000e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 10001e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 10002e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 10003e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 10004e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 10005e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 10006e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 10007e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 10008e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 10009e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 10010e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 10011e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 10012e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 10013e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 10014e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 10015e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 10016e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 10017e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 10018e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 1001950a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 10020e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 10021e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 10022e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 10023e1f7de0cSMatt Gates #undef VERIFY_OFFSET 10024e1f7de0cSMatt Gates } 10025e1f7de0cSMatt Gates 10026edd16368SStephen M. Cameron module_init(hpsa_init); 10027edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10028