xref: /openbmc/linux/drivers/scsi/hpsa.c (revision 4bdc0d676a643140bdf17dbf7eafedee3d496a3c)
1edd16368SStephen M. Cameron /*
2edd16368SStephen M. Cameron  *    Disk Array driver for HP Smart Array SAS controllers
394c7bc31SDon Brace  *    Copyright 2016 Microsemi Corporation
41358f6dcSDon Brace  *    Copyright 2014-2015 PMC-Sierra, Inc.
51358f6dcSDon Brace  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6edd16368SStephen M. Cameron  *
7edd16368SStephen M. Cameron  *    This program is free software; you can redistribute it and/or modify
8edd16368SStephen M. Cameron  *    it under the terms of the GNU General Public License as published by
9edd16368SStephen M. Cameron  *    the Free Software Foundation; version 2 of the License.
10edd16368SStephen M. Cameron  *
11edd16368SStephen M. Cameron  *    This program is distributed in the hope that it will be useful,
12edd16368SStephen M. Cameron  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13edd16368SStephen M. Cameron  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14edd16368SStephen M. Cameron  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
15edd16368SStephen M. Cameron  *
1694c7bc31SDon Brace  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17edd16368SStephen M. Cameron  *
18edd16368SStephen M. Cameron  */
19edd16368SStephen M. Cameron 
20edd16368SStephen M. Cameron #include <linux/module.h>
21edd16368SStephen M. Cameron #include <linux/interrupt.h>
22edd16368SStephen M. Cameron #include <linux/types.h>
23edd16368SStephen M. Cameron #include <linux/pci.h>
24edd16368SStephen M. Cameron #include <linux/kernel.h>
25edd16368SStephen M. Cameron #include <linux/slab.h>
26edd16368SStephen M. Cameron #include <linux/delay.h>
27edd16368SStephen M. Cameron #include <linux/fs.h>
28edd16368SStephen M. Cameron #include <linux/timer.h>
29edd16368SStephen M. Cameron #include <linux/init.h>
30edd16368SStephen M. Cameron #include <linux/spinlock.h>
31edd16368SStephen M. Cameron #include <linux/compat.h>
32edd16368SStephen M. Cameron #include <linux/blktrace_api.h>
33edd16368SStephen M. Cameron #include <linux/uaccess.h>
34edd16368SStephen M. Cameron #include <linux/io.h>
35edd16368SStephen M. Cameron #include <linux/dma-mapping.h>
36edd16368SStephen M. Cameron #include <linux/completion.h>
37edd16368SStephen M. Cameron #include <linux/moduleparam.h>
38edd16368SStephen M. Cameron #include <scsi/scsi.h>
39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h>
40edd16368SStephen M. Cameron #include <scsi/scsi_device.h>
41edd16368SStephen M. Cameron #include <scsi/scsi_host.h>
42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h>
439437ac43SStephen Cameron #include <scsi/scsi_eh.h>
44d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h>
4573153fe5SWebb Scales #include <scsi/scsi_dbg.h>
46edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h>
47edd16368SStephen M. Cameron #include <linux/string.h>
48edd16368SStephen M. Cameron #include <linux/bitmap.h>
4960063497SArun Sharma #include <linux/atomic.h>
50a0c12413SStephen M. Cameron #include <linux/jiffies.h>
5142a91641SDon Brace #include <linux/percpu-defs.h>
52094963daSStephen M. Cameron #include <linux/percpu.h>
532b08b3e9SDon Brace #include <asm/unaligned.h>
54283b4a9bSStephen M. Cameron #include <asm/div64.h>
55edd16368SStephen M. Cameron #include "hpsa_cmd.h"
56edd16368SStephen M. Cameron #include "hpsa.h"
57edd16368SStephen M. Cameron 
58ec2c3aa9SDon Brace /*
59ec2c3aa9SDon Brace  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
60ec2c3aa9SDon Brace  * with an optional trailing '-' followed by a byte value (0-255).
61ec2c3aa9SDon Brace  */
629a14f9b1SDon Brace #define HPSA_DRIVER_VERSION "3.4.20-170"
63edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
64f79cfec6SStephen M. Cameron #define HPSA "hpsa"
65edd16368SStephen M. Cameron 
66007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */
67007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
68007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
69007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
70007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
71edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000
72edd16368SStephen M. Cameron 
73edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */
74edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3
75b443d3eaSDon Brace /* How long to wait before giving up on a command */
76b443d3eaSDon Brace #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
77edd16368SStephen M. Cameron 
78edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */
79edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company");
80edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
81edd16368SStephen M. Cameron 	HPSA_DRIVER_VERSION);
82edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
83edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION);
84edd16368SStephen M. Cameron MODULE_LICENSE("GPL");
85253d2464SHannes Reinecke MODULE_ALIAS("cciss");
86edd16368SStephen M. Cameron 
8702ec19c8SStephen M. Cameron static int hpsa_simple_mode;
8802ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
8902ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode,
9002ec19c8SStephen M. Cameron 	"Use 'simple mode' rather than 'performant mode'");
91edd16368SStephen M. Cameron 
92edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */
93edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = {
94edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
95edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
96edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
97edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
98edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
99163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
100163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
101f8b01eb9SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
1029143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
1039143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
1049143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
1059143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
1069143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
1079143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
1089143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
1097f1974a7SDon Brace 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1920},
110fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
111fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
112fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
113fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
1147f1974a7SDon Brace 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1925},
115fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
116fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
11797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
11897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
11997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
12097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
12197b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
12297b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
12397b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
12497b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
12597b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
12697b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
1273b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
12897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
12997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
13097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
1313b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
1323b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
1333b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
1343b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
1353b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
136fdfa4b6dSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
1428e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
1438e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
1448e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
1458e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
1468e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
148edd16368SStephen M. Cameron 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149135ae6edSHannes Reinecke 	{PCI_VENDOR_ID_COMPAQ,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
150135ae6edSHannes Reinecke 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151edd16368SStephen M. Cameron 	{0,}
152edd16368SStephen M. Cameron };
153edd16368SStephen M. Cameron 
154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155edd16368SStephen M. Cameron 
156edd16368SStephen M. Cameron /*  board_id = Subsystem Device ID & Vendor ID
157edd16368SStephen M. Cameron  *  product = Marketing Name for the board
158edd16368SStephen M. Cameron  *  access = Address of the struct of function pointers
159edd16368SStephen M. Cameron  */
160edd16368SStephen M. Cameron static struct board_type products[] = {
161135ae6edSHannes Reinecke 	{0x40700E11, "Smart Array 5300", &SA5A_access},
162135ae6edSHannes Reinecke 	{0x40800E11, "Smart Array 5i", &SA5B_access},
163135ae6edSHannes Reinecke 	{0x40820E11, "Smart Array 532", &SA5B_access},
164135ae6edSHannes Reinecke 	{0x40830E11, "Smart Array 5312", &SA5B_access},
165135ae6edSHannes Reinecke 	{0x409A0E11, "Smart Array 641", &SA5A_access},
166135ae6edSHannes Reinecke 	{0x409B0E11, "Smart Array 642", &SA5A_access},
167135ae6edSHannes Reinecke 	{0x409C0E11, "Smart Array 6400", &SA5A_access},
168135ae6edSHannes Reinecke 	{0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169135ae6edSHannes Reinecke 	{0x40910E11, "Smart Array 6i", &SA5A_access},
170135ae6edSHannes Reinecke 	{0x3225103C, "Smart Array P600", &SA5A_access},
171135ae6edSHannes Reinecke 	{0x3223103C, "Smart Array P800", &SA5A_access},
172135ae6edSHannes Reinecke 	{0x3234103C, "Smart Array P400", &SA5A_access},
173135ae6edSHannes Reinecke 	{0x3235103C, "Smart Array P400i", &SA5A_access},
174135ae6edSHannes Reinecke 	{0x3211103C, "Smart Array E200i", &SA5A_access},
175135ae6edSHannes Reinecke 	{0x3212103C, "Smart Array E200", &SA5A_access},
176135ae6edSHannes Reinecke 	{0x3213103C, "Smart Array E200i", &SA5A_access},
177135ae6edSHannes Reinecke 	{0x3214103C, "Smart Array E200i", &SA5A_access},
178135ae6edSHannes Reinecke 	{0x3215103C, "Smart Array E200i", &SA5A_access},
179135ae6edSHannes Reinecke 	{0x3237103C, "Smart Array E500", &SA5A_access},
180135ae6edSHannes Reinecke 	{0x323D103C, "Smart Array P700m", &SA5A_access},
181edd16368SStephen M. Cameron 	{0x3241103C, "Smart Array P212", &SA5_access},
182edd16368SStephen M. Cameron 	{0x3243103C, "Smart Array P410", &SA5_access},
183edd16368SStephen M. Cameron 	{0x3245103C, "Smart Array P410i", &SA5_access},
184edd16368SStephen M. Cameron 	{0x3247103C, "Smart Array P411", &SA5_access},
185edd16368SStephen M. Cameron 	{0x3249103C, "Smart Array P812", &SA5_access},
186163dbcd8SMike Miller 	{0x324A103C, "Smart Array P712m", &SA5_access},
187163dbcd8SMike Miller 	{0x324B103C, "Smart Array P711m", &SA5_access},
1887d2cce58SStephen M. Cameron 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
189fe0c9610SMike Miller 	{0x3350103C, "Smart Array P222", &SA5_access},
190fe0c9610SMike Miller 	{0x3351103C, "Smart Array P420", &SA5_access},
191fe0c9610SMike Miller 	{0x3352103C, "Smart Array P421", &SA5_access},
192fe0c9610SMike Miller 	{0x3353103C, "Smart Array P822", &SA5_access},
193fe0c9610SMike Miller 	{0x3354103C, "Smart Array P420i", &SA5_access},
194fe0c9610SMike Miller 	{0x3355103C, "Smart Array P220i", &SA5_access},
195fe0c9610SMike Miller 	{0x3356103C, "Smart Array P721m", &SA5_access},
1967f1974a7SDon Brace 	{0x1920103C, "Smart Array P430i", &SA5_access},
1971fd6c8e3SMike Miller 	{0x1921103C, "Smart Array P830i", &SA5_access},
1981fd6c8e3SMike Miller 	{0x1922103C, "Smart Array P430", &SA5_access},
1991fd6c8e3SMike Miller 	{0x1923103C, "Smart Array P431", &SA5_access},
2001fd6c8e3SMike Miller 	{0x1924103C, "Smart Array P830", &SA5_access},
2017f1974a7SDon Brace 	{0x1925103C, "Smart Array P831", &SA5_access},
2021fd6c8e3SMike Miller 	{0x1926103C, "Smart Array P731m", &SA5_access},
2031fd6c8e3SMike Miller 	{0x1928103C, "Smart Array P230i", &SA5_access},
2041fd6c8e3SMike Miller 	{0x1929103C, "Smart Array P530", &SA5_access},
20527fb8137SDon Brace 	{0x21BD103C, "Smart Array P244br", &SA5_access},
20627fb8137SDon Brace 	{0x21BE103C, "Smart Array P741m", &SA5_access},
20727fb8137SDon Brace 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
20827fb8137SDon Brace 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
209c8ae0ab1SDon Brace 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
21027fb8137SDon Brace 	{0x21C2103C, "Smart Array P440", &SA5_access},
21127fb8137SDon Brace 	{0x21C3103C, "Smart Array P441", &SA5_access},
21297b9f53dSMike Miller 	{0x21C4103C, "Smart Array", &SA5_access},
21327fb8137SDon Brace 	{0x21C5103C, "Smart Array P841", &SA5_access},
21427fb8137SDon Brace 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
21527fb8137SDon Brace 	{0x21C7103C, "Smart HBA H240", &SA5_access},
21627fb8137SDon Brace 	{0x21C8103C, "Smart HBA H241", &SA5_access},
21797b9f53dSMike Miller 	{0x21C9103C, "Smart Array", &SA5_access},
21827fb8137SDon Brace 	{0x21CA103C, "Smart Array P246br", &SA5_access},
21927fb8137SDon Brace 	{0x21CB103C, "Smart Array P840", &SA5_access},
2203b7a45e5SJoe Handzik 	{0x21CC103C, "Smart Array", &SA5_access},
2213b7a45e5SJoe Handzik 	{0x21CD103C, "Smart Array", &SA5_access},
22227fb8137SDon Brace 	{0x21CE103C, "Smart HBA", &SA5_access},
223fdfa4b6dSDon Brace 	{0x05809005, "SmartHBA-SA", &SA5_access},
224cbb47dcbSDon Brace 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
225cbb47dcbSDon Brace 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226cbb47dcbSDon Brace 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
227cbb47dcbSDon Brace 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
228cbb47dcbSDon Brace 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
2298e616a5eSStephen M. Cameron 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
2308e616a5eSStephen M. Cameron 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
2318e616a5eSStephen M. Cameron 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
2328e616a5eSStephen M. Cameron 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
2338e616a5eSStephen M. Cameron 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234edd16368SStephen M. Cameron 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
235edd16368SStephen M. Cameron };
236edd16368SStephen M. Cameron 
237d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template;
238d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h);
239d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h);
240d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241d04e62b9SKevin Barnett 			struct hpsa_scsi_dev_t *device);
242d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
244d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245d04e62b9SKevin Barnett 		struct sas_rphy *rphy);
246d04e62b9SKevin Barnett 
247a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy;
249a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle;
251edd16368SStephen M. Cameron static int number_of_controllers;
252edd16368SStephen M. Cameron 
25310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
25410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
2556f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
2566f4e626fSNathan Chancellor 		      void __user *arg);
257edd16368SStephen M. Cameron 
258edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
2596f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
26042a91641SDon Brace 	void __user *arg);
261edd16368SStephen M. Cameron #endif
262edd16368SStephen M. Cameron 
263edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c);
264edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h);
26573153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
26673153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
26773153fe5SWebb Scales 					    struct scsi_cmnd *scmd);
268a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
269b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
270edd16368SStephen M. Cameron 	int cmd_type);
2712c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h);
272b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8)
273b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03
274edd16368SStephen M. Cameron 
275f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
276a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *);
277a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
278a08a8471SStephen M. Cameron 	unsigned long elapsed_time);
2797c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
280edd16368SStephen M. Cameron 
281edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
282edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev);
28341ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev);
284edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev);
285edd16368SStephen M. Cameron 
2868aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h);
287edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
288edd16368SStephen M. Cameron 	struct CommandList *c);
289edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
290edd16368SStephen M. Cameron 	struct CommandList *c);
291303932fdSDon Brace /* performant mode helper functions */
292303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets,
2932b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map);
294105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h);
295105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
296254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q);
2976f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
2986f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
2991df8552aSStephen M. Cameron 			       u64 *cfg_offset);
3006f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3011df8552aSStephen M. Cameron 				    unsigned long *memory_bar);
302135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
303135ae6edSHannes Reinecke 				bool *legacy_board);
304bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h,
305bfd7546cSDon Brace 					   unsigned char lunaddr[],
306bfd7546cSDon Brace 					   int reply_queue);
3076f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
3086f039790SGreg Kroah-Hartman 				     int wait_for_ready);
30975167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c);
310c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
311fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0
312fe5389c8SStephen M. Cameron #define BOARD_READY 1
31323100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h);
31476438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h);
315c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
316c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
31703383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
318080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work);
31925163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h);
32025163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h);
321c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h);
322d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
323d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *buf, int bufsize);
3248383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3258383278dSScott Teel 	unsigned char scsi3addr[], u8 page);
32634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h);
327ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
328ba74fdc4SDon Brace 			       struct hpsa_scsi_dev_t *dev,
329ba74fdc4SDon Brace 			       unsigned char *scsi3addr);
330edd16368SStephen M. Cameron 
331edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
332edd16368SStephen M. Cameron {
333edd16368SStephen M. Cameron 	unsigned long *priv = shost_priv(sdev->host);
334edd16368SStephen M. Cameron 	return (struct ctlr_info *) *priv;
335edd16368SStephen M. Cameron }
336edd16368SStephen M. Cameron 
337a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
338a23513e8SStephen M. Cameron {
339a23513e8SStephen M. Cameron 	unsigned long *priv = shost_priv(sh);
340a23513e8SStephen M. Cameron 	return (struct ctlr_info *) *priv;
341a23513e8SStephen M. Cameron }
342a23513e8SStephen M. Cameron 
343a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c)
344a58e7e53SWebb Scales {
345a58e7e53SWebb Scales 	return c->scsi_cmd == SCSI_CMD_IDLE;
346a58e7e53SWebb Scales }
347a58e7e53SWebb Scales 
3489437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
3499437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len,
3509437ac43SStephen Cameron 			u8 *sense_key, u8 *asc, u8 *ascq)
3519437ac43SStephen Cameron {
3529437ac43SStephen Cameron 	struct scsi_sense_hdr sshdr;
3539437ac43SStephen Cameron 	bool rc;
3549437ac43SStephen Cameron 
3559437ac43SStephen Cameron 	*sense_key = -1;
3569437ac43SStephen Cameron 	*asc = -1;
3579437ac43SStephen Cameron 	*ascq = -1;
3589437ac43SStephen Cameron 
3599437ac43SStephen Cameron 	if (sense_data_len < 1)
3609437ac43SStephen Cameron 		return;
3619437ac43SStephen Cameron 
3629437ac43SStephen Cameron 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
3639437ac43SStephen Cameron 	if (rc) {
3649437ac43SStephen Cameron 		*sense_key = sshdr.sense_key;
3659437ac43SStephen Cameron 		*asc = sshdr.asc;
3669437ac43SStephen Cameron 		*ascq = sshdr.ascq;
3679437ac43SStephen Cameron 	}
3689437ac43SStephen Cameron }
3699437ac43SStephen Cameron 
370edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
371edd16368SStephen M. Cameron 	struct CommandList *c)
372edd16368SStephen M. Cameron {
3739437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
3749437ac43SStephen Cameron 	int sense_len;
3759437ac43SStephen Cameron 
3769437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3779437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
3789437ac43SStephen Cameron 	else
3799437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
3809437ac43SStephen Cameron 
3819437ac43SStephen Cameron 	decode_sense_data(c->err_info->SenseInfo, sense_len,
3829437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
38381c27557SDon Brace 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
384edd16368SStephen M. Cameron 		return 0;
385edd16368SStephen M. Cameron 
3869437ac43SStephen Cameron 	switch (asc) {
387edd16368SStephen M. Cameron 	case STATE_CHANGED:
3889437ac43SStephen Cameron 		dev_warn(&h->pdev->dev,
3892946e82bSRobert Elliott 			"%s: a state change detected, command retried\n",
3902946e82bSRobert Elliott 			h->devname);
391edd16368SStephen M. Cameron 		break;
392edd16368SStephen M. Cameron 	case LUN_FAILED:
3937f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3942946e82bSRobert Elliott 			"%s: LUN failure detected\n", h->devname);
395edd16368SStephen M. Cameron 		break;
396edd16368SStephen M. Cameron 	case REPORT_LUNS_CHANGED:
3977f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3982946e82bSRobert Elliott 			"%s: report LUN data changed\n", h->devname);
399edd16368SStephen M. Cameron 	/*
4004f4eb9f1SScott Teel 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
4014f4eb9f1SScott Teel 	 * target (array) devices.
402edd16368SStephen M. Cameron 	 */
403edd16368SStephen M. Cameron 		break;
404edd16368SStephen M. Cameron 	case POWER_OR_RESET:
4052946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4062946e82bSRobert Elliott 			"%s: a power on or device reset detected\n",
4072946e82bSRobert Elliott 			h->devname);
408edd16368SStephen M. Cameron 		break;
409edd16368SStephen M. Cameron 	case UNIT_ATTENTION_CLEARED:
4102946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4112946e82bSRobert Elliott 			"%s: unit attention cleared by another initiator\n",
4122946e82bSRobert Elliott 			h->devname);
413edd16368SStephen M. Cameron 		break;
414edd16368SStephen M. Cameron 	default:
4152946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4162946e82bSRobert Elliott 			"%s: unknown unit attention detected\n",
4172946e82bSRobert Elliott 			h->devname);
418edd16368SStephen M. Cameron 		break;
419edd16368SStephen M. Cameron 	}
420edd16368SStephen M. Cameron 	return 1;
421edd16368SStephen M. Cameron }
422edd16368SStephen M. Cameron 
423852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
424852af20aSMatt Bondurant {
425852af20aSMatt Bondurant 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
426852af20aSMatt Bondurant 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
427852af20aSMatt Bondurant 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
428852af20aSMatt Bondurant 		return 0;
429852af20aSMatt Bondurant 	dev_warn(&h->pdev->dev, HPSA "device busy");
430852af20aSMatt Bondurant 	return 1;
431852af20aSMatt Bondurant }
432852af20aSMatt Bondurant 
433e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h);
434e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev,
435e985c58fSStephen Cameron 		struct device_attribute *attr, char *buf)
436e985c58fSStephen Cameron {
437e985c58fSStephen Cameron 	int ld;
438e985c58fSStephen Cameron 	struct ctlr_info *h;
439e985c58fSStephen Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
440e985c58fSStephen Cameron 
441e985c58fSStephen Cameron 	h = shost_to_hba(shost);
442e985c58fSStephen Cameron 	ld = lockup_detected(h);
443e985c58fSStephen Cameron 
444e985c58fSStephen Cameron 	return sprintf(buf, "ld=%d\n", ld);
445e985c58fSStephen Cameron }
446e985c58fSStephen Cameron 
447da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
448da0697bdSScott Teel 					 struct device_attribute *attr,
449da0697bdSScott Teel 					 const char *buf, size_t count)
450da0697bdSScott Teel {
451da0697bdSScott Teel 	int status, len;
452da0697bdSScott Teel 	struct ctlr_info *h;
453da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
454da0697bdSScott Teel 	char tmpbuf[10];
455da0697bdSScott Teel 
456da0697bdSScott Teel 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
457da0697bdSScott Teel 		return -EACCES;
458da0697bdSScott Teel 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
459da0697bdSScott Teel 	strncpy(tmpbuf, buf, len);
460da0697bdSScott Teel 	tmpbuf[len] = '\0';
461da0697bdSScott Teel 	if (sscanf(tmpbuf, "%d", &status) != 1)
462da0697bdSScott Teel 		return -EINVAL;
463da0697bdSScott Teel 	h = shost_to_hba(shost);
464da0697bdSScott Teel 	h->acciopath_status = !!status;
465da0697bdSScott Teel 	dev_warn(&h->pdev->dev,
466da0697bdSScott Teel 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
467da0697bdSScott Teel 		h->acciopath_status ? "enabled" : "disabled");
468da0697bdSScott Teel 	return count;
469da0697bdSScott Teel }
470da0697bdSScott Teel 
4712ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev,
4722ba8bfc8SStephen M. Cameron 					 struct device_attribute *attr,
4732ba8bfc8SStephen M. Cameron 					 const char *buf, size_t count)
4742ba8bfc8SStephen M. Cameron {
4752ba8bfc8SStephen M. Cameron 	int debug_level, len;
4762ba8bfc8SStephen M. Cameron 	struct ctlr_info *h;
4772ba8bfc8SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
4782ba8bfc8SStephen M. Cameron 	char tmpbuf[10];
4792ba8bfc8SStephen M. Cameron 
4802ba8bfc8SStephen M. Cameron 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
4812ba8bfc8SStephen M. Cameron 		return -EACCES;
4822ba8bfc8SStephen M. Cameron 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
4832ba8bfc8SStephen M. Cameron 	strncpy(tmpbuf, buf, len);
4842ba8bfc8SStephen M. Cameron 	tmpbuf[len] = '\0';
4852ba8bfc8SStephen M. Cameron 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
4862ba8bfc8SStephen M. Cameron 		return -EINVAL;
4872ba8bfc8SStephen M. Cameron 	if (debug_level < 0)
4882ba8bfc8SStephen M. Cameron 		debug_level = 0;
4892ba8bfc8SStephen M. Cameron 	h = shost_to_hba(shost);
4902ba8bfc8SStephen M. Cameron 	h->raid_offload_debug = debug_level;
4912ba8bfc8SStephen M. Cameron 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
4922ba8bfc8SStephen M. Cameron 		h->raid_offload_debug);
4932ba8bfc8SStephen M. Cameron 	return count;
4942ba8bfc8SStephen M. Cameron }
4952ba8bfc8SStephen M. Cameron 
496edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev,
497edd16368SStephen M. Cameron 				 struct device_attribute *attr,
498edd16368SStephen M. Cameron 				 const char *buf, size_t count)
499edd16368SStephen M. Cameron {
500edd16368SStephen M. Cameron 	struct ctlr_info *h;
501edd16368SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
502a23513e8SStephen M. Cameron 	h = shost_to_hba(shost);
50331468401SMike Miller 	hpsa_scan_start(h->scsi_host);
504edd16368SStephen M. Cameron 	return count;
505edd16368SStephen M. Cameron }
506edd16368SStephen M. Cameron 
507d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev,
508d28ce020SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
509d28ce020SStephen M. Cameron {
510d28ce020SStephen M. Cameron 	struct ctlr_info *h;
511d28ce020SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
512d28ce020SStephen M. Cameron 	unsigned char *fwrev;
513d28ce020SStephen M. Cameron 
514d28ce020SStephen M. Cameron 	h = shost_to_hba(shost);
515d28ce020SStephen M. Cameron 	if (!h->hba_inquiry_data)
516d28ce020SStephen M. Cameron 		return 0;
517d28ce020SStephen M. Cameron 	fwrev = &h->hba_inquiry_data[32];
518d28ce020SStephen M. Cameron 	return snprintf(buf, 20, "%c%c%c%c\n",
519d28ce020SStephen M. Cameron 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
520d28ce020SStephen M. Cameron }
521d28ce020SStephen M. Cameron 
52294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev,
52394a13649SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
52494a13649SStephen M. Cameron {
52594a13649SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
52694a13649SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(shost);
52794a13649SStephen M. Cameron 
5280cbf768eSStephen M. Cameron 	return snprintf(buf, 20, "%d\n",
5290cbf768eSStephen M. Cameron 			atomic_read(&h->commands_outstanding));
53094a13649SStephen M. Cameron }
53194a13649SStephen M. Cameron 
532745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev,
533745a7a25SStephen M. Cameron 	struct device_attribute *attr, char *buf)
534745a7a25SStephen M. Cameron {
535745a7a25SStephen M. Cameron 	struct ctlr_info *h;
536745a7a25SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
537745a7a25SStephen M. Cameron 
538745a7a25SStephen M. Cameron 	h = shost_to_hba(shost);
539745a7a25SStephen M. Cameron 	return snprintf(buf, 20, "%s\n",
540960a30e7SStephen M. Cameron 		h->transMethod & CFGTBL_Trans_Performant ?
541745a7a25SStephen M. Cameron 			"performant" : "simple");
542745a7a25SStephen M. Cameron }
543745a7a25SStephen M. Cameron 
544da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
545da0697bdSScott Teel 	struct device_attribute *attr, char *buf)
546da0697bdSScott Teel {
547da0697bdSScott Teel 	struct ctlr_info *h;
548da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
549da0697bdSScott Teel 
550da0697bdSScott Teel 	h = shost_to_hba(shost);
551da0697bdSScott Teel 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
552da0697bdSScott Teel 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
553da0697bdSScott Teel }
554da0697bdSScott Teel 
55546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */
556941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = {
557941b1cdaSStephen M. Cameron 	0x324a103C, /* Smart Array P712m */
558941b1cdaSStephen M. Cameron 	0x324b103C, /* Smart Array P711m */
559941b1cdaSStephen M. Cameron 	0x3223103C, /* Smart Array P800 */
560941b1cdaSStephen M. Cameron 	0x3234103C, /* Smart Array P400 */
561941b1cdaSStephen M. Cameron 	0x3235103C, /* Smart Array P400i */
562941b1cdaSStephen M. Cameron 	0x3211103C, /* Smart Array E200i */
563941b1cdaSStephen M. Cameron 	0x3212103C, /* Smart Array E200 */
564941b1cdaSStephen M. Cameron 	0x3213103C, /* Smart Array E200i */
565941b1cdaSStephen M. Cameron 	0x3214103C, /* Smart Array E200i */
566941b1cdaSStephen M. Cameron 	0x3215103C, /* Smart Array E200i */
567941b1cdaSStephen M. Cameron 	0x3237103C, /* Smart Array E500 */
568941b1cdaSStephen M. Cameron 	0x323D103C, /* Smart Array P700m */
5697af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
570941b1cdaSStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
571941b1cdaSStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
5725a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5735a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5745a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5755a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5765a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5775a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
578941b1cdaSStephen M. Cameron };
579941b1cdaSStephen M. Cameron 
58046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */
58146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = {
5827af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
5835a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5845a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5855a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5865a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5875a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5885a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
58946380786SStephen M. Cameron 	/* Exclude 640x boards.  These are two pci devices in one slot
59046380786SStephen M. Cameron 	 * which share a battery backed cache module.  One controls the
59146380786SStephen M. Cameron 	 * cache, the other accesses the cache through the one that controls
59246380786SStephen M. Cameron 	 * it.  If we reset the one controlling the cache, the other will
59346380786SStephen M. Cameron 	 * likely not be happy.  Just forbid resetting this conjoined mess.
59446380786SStephen M. Cameron 	 * The 640x isn't really supported by hpsa anyway.
59546380786SStephen M. Cameron 	 */
59646380786SStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
59746380786SStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
59846380786SStephen M. Cameron };
59946380786SStephen M. Cameron 
6009b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id)
601941b1cdaSStephen M. Cameron {
602941b1cdaSStephen M. Cameron 	int i;
603941b1cdaSStephen M. Cameron 
6049b5c48c2SStephen Cameron 	for (i = 0; i < nelems; i++)
6059b5c48c2SStephen Cameron 		if (a[i] == board_id)
606941b1cdaSStephen M. Cameron 			return 1;
6079b5c48c2SStephen Cameron 	return 0;
6089b5c48c2SStephen Cameron }
6099b5c48c2SStephen Cameron 
6109b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id)
6119b5c48c2SStephen Cameron {
6129b5c48c2SStephen Cameron 	return !board_id_in_array(unresettable_controller,
6139b5c48c2SStephen Cameron 			ARRAY_SIZE(unresettable_controller), board_id);
614941b1cdaSStephen M. Cameron }
615941b1cdaSStephen M. Cameron 
61646380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id)
61746380786SStephen M. Cameron {
6189b5c48c2SStephen Cameron 	return !board_id_in_array(soft_unresettable_controller,
6199b5c48c2SStephen Cameron 			ARRAY_SIZE(soft_unresettable_controller), board_id);
62046380786SStephen M. Cameron }
62146380786SStephen M. Cameron 
62246380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id)
62346380786SStephen M. Cameron {
62446380786SStephen M. Cameron 	return ctlr_is_hard_resettable(board_id) ||
62546380786SStephen M. Cameron 		ctlr_is_soft_resettable(board_id);
62646380786SStephen M. Cameron }
62746380786SStephen M. Cameron 
628941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev,
629941b1cdaSStephen M. Cameron 	struct device_attribute *attr, char *buf)
630941b1cdaSStephen M. Cameron {
631941b1cdaSStephen M. Cameron 	struct ctlr_info *h;
632941b1cdaSStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
633941b1cdaSStephen M. Cameron 
634941b1cdaSStephen M. Cameron 	h = shost_to_hba(shost);
63546380786SStephen M. Cameron 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
636941b1cdaSStephen M. Cameron }
637941b1cdaSStephen M. Cameron 
638edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
639edd16368SStephen M. Cameron {
640edd16368SStephen M. Cameron 	return (scsi3addr[3] & 0xC0) == 0x40;
641edd16368SStephen M. Cameron }
642edd16368SStephen M. Cameron 
643f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
6447c59a0d4SDon Brace 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
645edd16368SStephen M. Cameron };
6466b80b18fSScott Teel #define HPSA_RAID_0	0
6476b80b18fSScott Teel #define HPSA_RAID_4	1
6486b80b18fSScott Teel #define HPSA_RAID_1	2	/* also used for RAID 10 */
6496b80b18fSScott Teel #define HPSA_RAID_5	3	/* also used for RAID 50 */
6506b80b18fSScott Teel #define HPSA_RAID_51	4
6516b80b18fSScott Teel #define HPSA_RAID_6	5	/* also used for RAID 60 */
6526b80b18fSScott Teel #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
6537c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
6547c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
655edd16368SStephen M. Cameron 
656f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
657f3f01730SKevin Barnett {
658f3f01730SKevin Barnett 	return !device->physical_device;
659f3f01730SKevin Barnett }
660edd16368SStephen M. Cameron 
661edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev,
662edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
663edd16368SStephen M. Cameron {
664edd16368SStephen M. Cameron 	ssize_t l = 0;
66582a72c0aSStephen M. Cameron 	unsigned char rlevel;
666edd16368SStephen M. Cameron 	struct ctlr_info *h;
667edd16368SStephen M. Cameron 	struct scsi_device *sdev;
668edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
669edd16368SStephen M. Cameron 	unsigned long flags;
670edd16368SStephen M. Cameron 
671edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
672edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
673edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
674edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
675edd16368SStephen M. Cameron 	if (!hdev) {
676edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
677edd16368SStephen M. Cameron 		return -ENODEV;
678edd16368SStephen M. Cameron 	}
679edd16368SStephen M. Cameron 
680edd16368SStephen M. Cameron 	/* Is this even a logical drive? */
681f3f01730SKevin Barnett 	if (!is_logical_device(hdev)) {
682edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
683edd16368SStephen M. Cameron 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
684edd16368SStephen M. Cameron 		return l;
685edd16368SStephen M. Cameron 	}
686edd16368SStephen M. Cameron 
687edd16368SStephen M. Cameron 	rlevel = hdev->raid_level;
688edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
68982a72c0aSStephen M. Cameron 	if (rlevel > RAID_UNKNOWN)
690edd16368SStephen M. Cameron 		rlevel = RAID_UNKNOWN;
691edd16368SStephen M. Cameron 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
692edd16368SStephen M. Cameron 	return l;
693edd16368SStephen M. Cameron }
694edd16368SStephen M. Cameron 
695edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev,
696edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
697edd16368SStephen M. Cameron {
698edd16368SStephen M. Cameron 	struct ctlr_info *h;
699edd16368SStephen M. Cameron 	struct scsi_device *sdev;
700edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
701edd16368SStephen M. Cameron 	unsigned long flags;
702edd16368SStephen M. Cameron 	unsigned char lunid[8];
703edd16368SStephen M. Cameron 
704edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
705edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
706edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
707edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
708edd16368SStephen M. Cameron 	if (!hdev) {
709edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
710edd16368SStephen M. Cameron 		return -ENODEV;
711edd16368SStephen M. Cameron 	}
712edd16368SStephen M. Cameron 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
713edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
714609a70dfSRasmus Villemoes 	return snprintf(buf, 20, "0x%8phN\n", lunid);
715edd16368SStephen M. Cameron }
716edd16368SStephen M. Cameron 
717edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev,
718edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
719edd16368SStephen M. Cameron {
720edd16368SStephen M. Cameron 	struct ctlr_info *h;
721edd16368SStephen M. Cameron 	struct scsi_device *sdev;
722edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
723edd16368SStephen M. Cameron 	unsigned long flags;
724edd16368SStephen M. Cameron 	unsigned char sn[16];
725edd16368SStephen M. Cameron 
726edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
727edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
728edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
729edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
730edd16368SStephen M. Cameron 	if (!hdev) {
731edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
732edd16368SStephen M. Cameron 		return -ENODEV;
733edd16368SStephen M. Cameron 	}
734edd16368SStephen M. Cameron 	memcpy(sn, hdev->device_id, sizeof(sn));
735edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
736edd16368SStephen M. Cameron 	return snprintf(buf, 16 * 2 + 2,
737edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X"
738edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
739edd16368SStephen M. Cameron 			sn[0], sn[1], sn[2], sn[3],
740edd16368SStephen M. Cameron 			sn[4], sn[5], sn[6], sn[7],
741edd16368SStephen M. Cameron 			sn[8], sn[9], sn[10], sn[11],
742edd16368SStephen M. Cameron 			sn[12], sn[13], sn[14], sn[15]);
743edd16368SStephen M. Cameron }
744edd16368SStephen M. Cameron 
745ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev,
746ded1be4aSJoseph T Handzik 	      struct device_attribute *attr, char *buf)
747ded1be4aSJoseph T Handzik {
748ded1be4aSJoseph T Handzik 	struct ctlr_info *h;
749ded1be4aSJoseph T Handzik 	struct scsi_device *sdev;
750ded1be4aSJoseph T Handzik 	struct hpsa_scsi_dev_t *hdev;
751ded1be4aSJoseph T Handzik 	unsigned long flags;
752ded1be4aSJoseph T Handzik 	u64 sas_address;
753ded1be4aSJoseph T Handzik 
754ded1be4aSJoseph T Handzik 	sdev = to_scsi_device(dev);
755ded1be4aSJoseph T Handzik 	h = sdev_to_hba(sdev);
756ded1be4aSJoseph T Handzik 	spin_lock_irqsave(&h->lock, flags);
757ded1be4aSJoseph T Handzik 	hdev = sdev->hostdata;
758ded1be4aSJoseph T Handzik 	if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
759ded1be4aSJoseph T Handzik 		spin_unlock_irqrestore(&h->lock, flags);
760ded1be4aSJoseph T Handzik 		return -ENODEV;
761ded1be4aSJoseph T Handzik 	}
762ded1be4aSJoseph T Handzik 	sas_address = hdev->sas_address;
763ded1be4aSJoseph T Handzik 	spin_unlock_irqrestore(&h->lock, flags);
764ded1be4aSJoseph T Handzik 
765ded1be4aSJoseph T Handzik 	return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
766ded1be4aSJoseph T Handzik }
767ded1be4aSJoseph T Handzik 
768c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
769c1988684SScott Teel 	     struct device_attribute *attr, char *buf)
770c1988684SScott Teel {
771c1988684SScott Teel 	struct ctlr_info *h;
772c1988684SScott Teel 	struct scsi_device *sdev;
773c1988684SScott Teel 	struct hpsa_scsi_dev_t *hdev;
774c1988684SScott Teel 	unsigned long flags;
775c1988684SScott Teel 	int offload_enabled;
776c1988684SScott Teel 
777c1988684SScott Teel 	sdev = to_scsi_device(dev);
778c1988684SScott Teel 	h = sdev_to_hba(sdev);
779c1988684SScott Teel 	spin_lock_irqsave(&h->lock, flags);
780c1988684SScott Teel 	hdev = sdev->hostdata;
781c1988684SScott Teel 	if (!hdev) {
782c1988684SScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
783c1988684SScott Teel 		return -ENODEV;
784c1988684SScott Teel 	}
785c1988684SScott Teel 	offload_enabled = hdev->offload_enabled;
786c1988684SScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
787b2582a65SDon Brace 
788b2582a65SDon Brace 	if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
789c1988684SScott Teel 		return snprintf(buf, 20, "%d\n", offload_enabled);
790b2582a65SDon Brace 	else
791b2582a65SDon Brace 		return snprintf(buf, 40, "%s\n",
792b2582a65SDon Brace 				"Not applicable for a controller");
793c1988684SScott Teel }
794c1988684SScott Teel 
7958270b862SJoe Handzik #define MAX_PATHS 8
7968270b862SJoe Handzik static ssize_t path_info_show(struct device *dev,
7978270b862SJoe Handzik 	     struct device_attribute *attr, char *buf)
7988270b862SJoe Handzik {
7998270b862SJoe Handzik 	struct ctlr_info *h;
8008270b862SJoe Handzik 	struct scsi_device *sdev;
8018270b862SJoe Handzik 	struct hpsa_scsi_dev_t *hdev;
8028270b862SJoe Handzik 	unsigned long flags;
8038270b862SJoe Handzik 	int i;
8048270b862SJoe Handzik 	int output_len = 0;
8058270b862SJoe Handzik 	u8 box;
8068270b862SJoe Handzik 	u8 bay;
8078270b862SJoe Handzik 	u8 path_map_index = 0;
8088270b862SJoe Handzik 	char *active;
8098270b862SJoe Handzik 	unsigned char phys_connector[2];
8108270b862SJoe Handzik 
8118270b862SJoe Handzik 	sdev = to_scsi_device(dev);
8128270b862SJoe Handzik 	h = sdev_to_hba(sdev);
8138270b862SJoe Handzik 	spin_lock_irqsave(&h->devlock, flags);
8148270b862SJoe Handzik 	hdev = sdev->hostdata;
8158270b862SJoe Handzik 	if (!hdev) {
8168270b862SJoe Handzik 		spin_unlock_irqrestore(&h->devlock, flags);
8178270b862SJoe Handzik 		return -ENODEV;
8188270b862SJoe Handzik 	}
8198270b862SJoe Handzik 
8208270b862SJoe Handzik 	bay = hdev->bay;
8218270b862SJoe Handzik 	for (i = 0; i < MAX_PATHS; i++) {
8228270b862SJoe Handzik 		path_map_index = 1<<i;
8238270b862SJoe Handzik 		if (i == hdev->active_path_index)
8248270b862SJoe Handzik 			active = "Active";
8258270b862SJoe Handzik 		else if (hdev->path_map & path_map_index)
8268270b862SJoe Handzik 			active = "Inactive";
8278270b862SJoe Handzik 		else
8288270b862SJoe Handzik 			continue;
8298270b862SJoe Handzik 
8301faf072cSRasmus Villemoes 		output_len += scnprintf(buf + output_len,
8311faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8321faf072cSRasmus Villemoes 				"[%d:%d:%d:%d] %20.20s ",
8338270b862SJoe Handzik 				h->scsi_host->host_no,
8348270b862SJoe Handzik 				hdev->bus, hdev->target, hdev->lun,
8358270b862SJoe Handzik 				scsi_device_type(hdev->devtype));
8368270b862SJoe Handzik 
837cca8f13bSDon Brace 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
8382708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8391faf072cSRasmus Villemoes 						PAGE_SIZE - output_len,
8401faf072cSRasmus Villemoes 						"%s\n", active);
8418270b862SJoe Handzik 			continue;
8428270b862SJoe Handzik 		}
8438270b862SJoe Handzik 
8448270b862SJoe Handzik 		box = hdev->box[i];
8458270b862SJoe Handzik 		memcpy(&phys_connector, &hdev->phys_connector[i],
8468270b862SJoe Handzik 			sizeof(phys_connector));
8478270b862SJoe Handzik 		if (phys_connector[0] < '0')
8488270b862SJoe Handzik 			phys_connector[0] = '0';
8498270b862SJoe Handzik 		if (phys_connector[1] < '0')
8508270b862SJoe Handzik 			phys_connector[1] = '0';
8512708f295SDon Brace 		output_len += scnprintf(buf + output_len,
8521faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8538270b862SJoe Handzik 				"PORT: %.2s ",
8548270b862SJoe Handzik 				phys_connector);
855af15ed36SDon Brace 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
856af15ed36SDon Brace 			hdev->expose_device) {
8578270b862SJoe Handzik 			if (box == 0 || box == 0xFF) {
8582708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8591faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8608270b862SJoe Handzik 					"BAY: %hhu %s\n",
8618270b862SJoe Handzik 					bay, active);
8628270b862SJoe Handzik 			} else {
8632708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8641faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8658270b862SJoe Handzik 					"BOX: %hhu BAY: %hhu %s\n",
8668270b862SJoe Handzik 					box, bay, active);
8678270b862SJoe Handzik 			}
8688270b862SJoe Handzik 		} else if (box != 0 && box != 0xFF) {
8692708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8701faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8718270b862SJoe Handzik 				box, active);
8728270b862SJoe Handzik 		} else
8732708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8741faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "%s\n", active);
8758270b862SJoe Handzik 	}
8768270b862SJoe Handzik 
8778270b862SJoe Handzik 	spin_unlock_irqrestore(&h->devlock, flags);
8781faf072cSRasmus Villemoes 	return output_len;
8798270b862SJoe Handzik }
8808270b862SJoe Handzik 
88116961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev,
88216961204SHannes Reinecke 	struct device_attribute *attr, char *buf)
88316961204SHannes Reinecke {
88416961204SHannes Reinecke 	struct ctlr_info *h;
88516961204SHannes Reinecke 	struct Scsi_Host *shost = class_to_shost(dev);
88616961204SHannes Reinecke 
88716961204SHannes Reinecke 	h = shost_to_hba(shost);
88816961204SHannes Reinecke 	return snprintf(buf, 20, "%d\n", h->ctlr);
88916961204SHannes Reinecke }
89016961204SHannes Reinecke 
891135ae6edSHannes Reinecke static ssize_t host_show_legacy_board(struct device *dev,
892135ae6edSHannes Reinecke 	struct device_attribute *attr, char *buf)
893135ae6edSHannes Reinecke {
894135ae6edSHannes Reinecke 	struct ctlr_info *h;
895135ae6edSHannes Reinecke 	struct Scsi_Host *shost = class_to_shost(dev);
896135ae6edSHannes Reinecke 
897135ae6edSHannes Reinecke 	h = shost_to_hba(shost);
898135ae6edSHannes Reinecke 	return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
899135ae6edSHannes Reinecke }
900135ae6edSHannes Reinecke 
901c828a892SJoe Perches static DEVICE_ATTR_RO(raid_level);
902c828a892SJoe Perches static DEVICE_ATTR_RO(lunid);
903c828a892SJoe Perches static DEVICE_ATTR_RO(unique_id);
9043f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
905c828a892SJoe Perches static DEVICE_ATTR_RO(sas_address);
906c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
907c1988684SScott Teel 			host_show_hp_ssd_smart_path_enabled, NULL);
908c828a892SJoe Perches static DEVICE_ATTR_RO(path_info);
909da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
910da0697bdSScott Teel 		host_show_hp_ssd_smart_path_status,
911da0697bdSScott Teel 		host_store_hp_ssd_smart_path_status);
9122ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
9132ba8bfc8SStephen M. Cameron 			host_store_raid_offload_debug);
9143f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO,
9153f5eac3aSStephen M. Cameron 	host_show_firmware_revision, NULL);
9163f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO,
9173f5eac3aSStephen M. Cameron 	host_show_commands_outstanding, NULL);
9183f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO,
9193f5eac3aSStephen M. Cameron 	host_show_transport_mode, NULL);
920941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO,
921941b1cdaSStephen M. Cameron 	host_show_resettable, NULL);
922e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO,
923e985c58fSStephen Cameron 	host_show_lockup_detected, NULL);
92416961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO,
92516961204SHannes Reinecke 	host_show_ctlr_num, NULL);
926135ae6edSHannes Reinecke static DEVICE_ATTR(legacy_board, S_IRUGO,
927135ae6edSHannes Reinecke 	host_show_legacy_board, NULL);
9283f5eac3aSStephen M. Cameron 
9293f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = {
9303f5eac3aSStephen M. Cameron 	&dev_attr_raid_level,
9313f5eac3aSStephen M. Cameron 	&dev_attr_lunid,
9323f5eac3aSStephen M. Cameron 	&dev_attr_unique_id,
933c1988684SScott Teel 	&dev_attr_hp_ssd_smart_path_enabled,
9348270b862SJoe Handzik 	&dev_attr_path_info,
935ded1be4aSJoseph T Handzik 	&dev_attr_sas_address,
9363f5eac3aSStephen M. Cameron 	NULL,
9373f5eac3aSStephen M. Cameron };
9383f5eac3aSStephen M. Cameron 
9393f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = {
9403f5eac3aSStephen M. Cameron 	&dev_attr_rescan,
9413f5eac3aSStephen M. Cameron 	&dev_attr_firmware_revision,
9423f5eac3aSStephen M. Cameron 	&dev_attr_commands_outstanding,
9433f5eac3aSStephen M. Cameron 	&dev_attr_transport_mode,
944941b1cdaSStephen M. Cameron 	&dev_attr_resettable,
945da0697bdSScott Teel 	&dev_attr_hp_ssd_smart_path_status,
9462ba8bfc8SStephen M. Cameron 	&dev_attr_raid_offload_debug,
947fb53c439STomas Henzl 	&dev_attr_lockup_detected,
94816961204SHannes Reinecke 	&dev_attr_ctlr_num,
949135ae6edSHannes Reinecke 	&dev_attr_legacy_board,
9503f5eac3aSStephen M. Cameron 	NULL,
9513f5eac3aSStephen M. Cameron };
9523f5eac3aSStephen M. Cameron 
95308ec46f6SDon Brace #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_DRIVER +\
95408ec46f6SDon Brace 				 HPSA_MAX_CONCURRENT_PASSTHRUS)
95541ce4c35SStephen Cameron 
9563f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = {
9573f5eac3aSStephen M. Cameron 	.module			= THIS_MODULE,
958f79cfec6SStephen M. Cameron 	.name			= HPSA,
959f79cfec6SStephen M. Cameron 	.proc_name		= HPSA,
9603f5eac3aSStephen M. Cameron 	.queuecommand		= hpsa_scsi_queue_command,
9613f5eac3aSStephen M. Cameron 	.scan_start		= hpsa_scan_start,
9623f5eac3aSStephen M. Cameron 	.scan_finished		= hpsa_scan_finished,
9637c0a0229SDon Brace 	.change_queue_depth	= hpsa_change_queue_depth,
9643f5eac3aSStephen M. Cameron 	.this_id		= -1,
9653f5eac3aSStephen M. Cameron 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
9663f5eac3aSStephen M. Cameron 	.ioctl			= hpsa_ioctl,
9673f5eac3aSStephen M. Cameron 	.slave_alloc		= hpsa_slave_alloc,
96841ce4c35SStephen Cameron 	.slave_configure	= hpsa_slave_configure,
9693f5eac3aSStephen M. Cameron 	.slave_destroy		= hpsa_slave_destroy,
9703f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT
9713f5eac3aSStephen M. Cameron 	.compat_ioctl		= hpsa_compat_ioctl,
9723f5eac3aSStephen M. Cameron #endif
9733f5eac3aSStephen M. Cameron 	.sdev_attrs = hpsa_sdev_attrs,
9743f5eac3aSStephen M. Cameron 	.shost_attrs = hpsa_shost_attrs,
975eb53a3eaSMartin Wilck 	.max_sectors = 2048,
97654b2b50cSMartin K. Petersen 	.no_write_same = 1,
9773f5eac3aSStephen M. Cameron };
9783f5eac3aSStephen M. Cameron 
979254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q)
9803f5eac3aSStephen M. Cameron {
9813f5eac3aSStephen M. Cameron 	u32 a;
982072b0518SStephen M. Cameron 	struct reply_queue_buffer *rq = &h->reply_queue[q];
9833f5eac3aSStephen M. Cameron 
984e1f7de0cSMatt Gates 	if (h->transMethod & CFGTBL_Trans_io_accel1)
985e1f7de0cSMatt Gates 		return h->access.command_completed(h, q);
986e1f7de0cSMatt Gates 
9873f5eac3aSStephen M. Cameron 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
988254f796bSMatt Gates 		return h->access.command_completed(h, q);
9893f5eac3aSStephen M. Cameron 
990254f796bSMatt Gates 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
991254f796bSMatt Gates 		a = rq->head[rq->current_entry];
992254f796bSMatt Gates 		rq->current_entry++;
9930cbf768eSStephen M. Cameron 		atomic_dec(&h->commands_outstanding);
9943f5eac3aSStephen M. Cameron 	} else {
9953f5eac3aSStephen M. Cameron 		a = FIFO_EMPTY;
9963f5eac3aSStephen M. Cameron 	}
9973f5eac3aSStephen M. Cameron 	/* Check for wraparound */
998254f796bSMatt Gates 	if (rq->current_entry == h->max_commands) {
999254f796bSMatt Gates 		rq->current_entry = 0;
1000254f796bSMatt Gates 		rq->wraparound ^= 1;
10013f5eac3aSStephen M. Cameron 	}
10023f5eac3aSStephen M. Cameron 	return a;
10033f5eac3aSStephen M. Cameron }
10043f5eac3aSStephen M. Cameron 
1005c349775eSScott Teel /*
1006c349775eSScott Teel  * There are some special bits in the bus address of the
1007c349775eSScott Teel  * command that we have to set for the controller to know
1008c349775eSScott Teel  * how to process the command:
1009c349775eSScott Teel  *
1010c349775eSScott Teel  * Normal performant mode:
1011c349775eSScott Teel  * bit 0: 1 means performant mode, 0 means simple mode.
1012c349775eSScott Teel  * bits 1-3 = block fetch table entry
1013c349775eSScott Teel  * bits 4-6 = command type (== 0)
1014c349775eSScott Teel  *
1015c349775eSScott Teel  * ioaccel1 mode:
1016c349775eSScott Teel  * bit 0 = "performant mode" bit.
1017c349775eSScott Teel  * bits 1-3 = block fetch table entry
1018c349775eSScott Teel  * bits 4-6 = command type (== 110)
1019c349775eSScott Teel  * (command type is needed because ioaccel1 mode
1020c349775eSScott Teel  * commands are submitted through the same register as normal
1021c349775eSScott Teel  * mode commands, so this is how the controller knows whether
1022c349775eSScott Teel  * the command is normal mode or ioaccel1 mode.)
1023c349775eSScott Teel  *
1024c349775eSScott Teel  * ioaccel2 mode:
1025c349775eSScott Teel  * bit 0 = "performant mode" bit.
1026c349775eSScott Teel  * bits 1-4 = block fetch table entry (note extra bit)
1027c349775eSScott Teel  * bits 4-6 = not needed, because ioaccel2 mode has
1028c349775eSScott Teel  * a separate special register for submitting commands.
1029c349775eSScott Teel  */
1030c349775eSScott Teel 
103125163bd5SWebb Scales /*
103225163bd5SWebb Scales  * set_performant_mode: Modify the tag for cciss performant
10333f5eac3aSStephen M. Cameron  * set bit 0 for pull model, bits 3-1 for block fetch
10343f5eac3aSStephen M. Cameron  * register number
10353f5eac3aSStephen M. Cameron  */
103625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1)
103725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
103825163bd5SWebb Scales 					int reply_queue)
10393f5eac3aSStephen M. Cameron {
1040254f796bSMatt Gates 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
10413f5eac3aSStephen M. Cameron 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1042bc2bb154SChristoph Hellwig 		if (unlikely(!h->msix_vectors))
104325163bd5SWebb Scales 			return;
10448b834bffSMing Lei 		c->Header.ReplyQueue = reply_queue;
1045254f796bSMatt Gates 	}
10463f5eac3aSStephen M. Cameron }
10473f5eac3aSStephen M. Cameron 
1048c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h,
104925163bd5SWebb Scales 						struct CommandList *c,
105025163bd5SWebb Scales 						int reply_queue)
1051c349775eSScott Teel {
1052c349775eSScott Teel 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1053c349775eSScott Teel 
105425163bd5SWebb Scales 	/*
105525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1056c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1057c349775eSScott Teel 	 */
10588b834bffSMing Lei 	cp->ReplyQueue = reply_queue;
105925163bd5SWebb Scales 	/*
106025163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1061c349775eSScott Teel 	 *  - performant mode bit (bit 0)
1062c349775eSScott Teel 	 *  - pull count (bits 1-3)
1063c349775eSScott Teel 	 *  - command type (bits 4-6)
1064c349775eSScott Teel 	 */
1065c349775eSScott Teel 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1066c349775eSScott Teel 					IOACCEL1_BUSADDR_CMDTYPE;
1067c349775eSScott Teel }
1068c349775eSScott Teel 
10698be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
10708be986ccSStephen Cameron 						struct CommandList *c,
10718be986ccSStephen Cameron 						int reply_queue)
10728be986ccSStephen Cameron {
10738be986ccSStephen Cameron 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
10748be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[c->cmdindex];
10758be986ccSStephen Cameron 
10768be986ccSStephen Cameron 	/* Tell the controller to post the reply to the queue for this
10778be986ccSStephen Cameron 	 * processor.  This seems to give the best I/O throughput.
10788be986ccSStephen Cameron 	 */
10798b834bffSMing Lei 	cp->reply_queue = reply_queue;
10808be986ccSStephen Cameron 	/* Set the bits in the address sent down to include:
10818be986ccSStephen Cameron 	 *  - performant mode bit not used in ioaccel mode 2
10828be986ccSStephen Cameron 	 *  - pull count (bits 0-3)
10838be986ccSStephen Cameron 	 *  - command type isn't needed for ioaccel2
10848be986ccSStephen Cameron 	 */
10858be986ccSStephen Cameron 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
10868be986ccSStephen Cameron }
10878be986ccSStephen Cameron 
1088c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h,
108925163bd5SWebb Scales 						struct CommandList *c,
109025163bd5SWebb Scales 						int reply_queue)
1091c349775eSScott Teel {
1092c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1093c349775eSScott Teel 
109425163bd5SWebb Scales 	/*
109525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1096c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1097c349775eSScott Teel 	 */
10988b834bffSMing Lei 	cp->reply_queue = reply_queue;
109925163bd5SWebb Scales 	/*
110025163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1101c349775eSScott Teel 	 *  - performant mode bit not used in ioaccel mode 2
1102c349775eSScott Teel 	 *  - pull count (bits 0-3)
1103c349775eSScott Teel 	 *  - command type isn't needed for ioaccel2
1104c349775eSScott Teel 	 */
1105c349775eSScott Teel 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1106c349775eSScott Teel }
1107c349775eSScott Teel 
1108e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb)
1109e85c5974SStephen M. Cameron {
1110e85c5974SStephen M. Cameron 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1111e85c5974SStephen M. Cameron }
1112e85c5974SStephen M. Cameron 
1113e85c5974SStephen M. Cameron /*
1114e85c5974SStephen M. Cameron  * During firmware flash, the heartbeat register may not update as frequently
1115e85c5974SStephen M. Cameron  * as it should.  So we dial down lockup detection during firmware flash. and
1116e85c5974SStephen M. Cameron  * dial it back up when firmware flash completes.
1117e85c5974SStephen M. Cameron  */
1118e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1119e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
11203d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1121e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1122e85c5974SStephen M. Cameron 		struct CommandList *c)
1123e85c5974SStephen M. Cameron {
1124e85c5974SStephen M. Cameron 	if (!is_firmware_flash_cmd(c->Request.CDB))
1125e85c5974SStephen M. Cameron 		return;
1126e85c5974SStephen M. Cameron 	atomic_inc(&h->firmware_flash_in_progress);
1127e85c5974SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1128e85c5974SStephen M. Cameron }
1129e85c5974SStephen M. Cameron 
1130e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1131e85c5974SStephen M. Cameron 		struct CommandList *c)
1132e85c5974SStephen M. Cameron {
1133e85c5974SStephen M. Cameron 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1134e85c5974SStephen M. Cameron 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1135e85c5974SStephen M. Cameron 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1136e85c5974SStephen M. Cameron }
1137e85c5974SStephen M. Cameron 
113825163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
113925163bd5SWebb Scales 	struct CommandList *c, int reply_queue)
11403f5eac3aSStephen M. Cameron {
1141c05e8866SStephen Cameron 	dial_down_lockup_detection_during_fw_flash(h, c);
1142c05e8866SStephen Cameron 	atomic_inc(&h->commands_outstanding);
1143c5dfd106SDon Brace 	if (c->device)
1144c5dfd106SDon Brace 		atomic_inc(&c->device->commands_outstanding);
11458b834bffSMing Lei 
11468b834bffSMing Lei 	reply_queue = h->reply_map[raw_smp_processor_id()];
1147c349775eSScott Teel 	switch (c->cmd_type) {
1148c349775eSScott Teel 	case CMD_IOACCEL1:
114925163bd5SWebb Scales 		set_ioaccel1_performant_mode(h, c, reply_queue);
1150c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1151c349775eSScott Teel 		break;
1152c349775eSScott Teel 	case CMD_IOACCEL2:
115325163bd5SWebb Scales 		set_ioaccel2_performant_mode(h, c, reply_queue);
1154c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1155c349775eSScott Teel 		break;
11568be986ccSStephen Cameron 	case IOACCEL2_TMF:
11578be986ccSStephen Cameron 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
11588be986ccSStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
11598be986ccSStephen Cameron 		break;
1160c349775eSScott Teel 	default:
116125163bd5SWebb Scales 		set_performant_mode(h, c, reply_queue);
1162f2405db8SDon Brace 		h->access.submit_command(h, c);
11633f5eac3aSStephen M. Cameron 	}
1164c05e8866SStephen Cameron }
11653f5eac3aSStephen M. Cameron 
1166a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
116725163bd5SWebb Scales {
116825163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
116925163bd5SWebb Scales }
117025163bd5SWebb Scales 
11713f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[])
11723f5eac3aSStephen M. Cameron {
11733f5eac3aSStephen M. Cameron 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
11743f5eac3aSStephen M. Cameron }
11753f5eac3aSStephen M. Cameron 
11763f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h)
11773f5eac3aSStephen M. Cameron {
11783f5eac3aSStephen M. Cameron 	if (!h->hba_inquiry_data)
11793f5eac3aSStephen M. Cameron 		return 0;
11803f5eac3aSStephen M. Cameron 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
11813f5eac3aSStephen M. Cameron 		return 1;
11823f5eac3aSStephen M. Cameron 	return 0;
11833f5eac3aSStephen M. Cameron }
11843f5eac3aSStephen M. Cameron 
1185edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h,
1186edd16368SStephen M. Cameron 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1187edd16368SStephen M. Cameron {
1188edd16368SStephen M. Cameron 	/* finds an unused bus, target, lun for a new physical device
1189edd16368SStephen M. Cameron 	 * assumes h->devlock is held
1190edd16368SStephen M. Cameron 	 */
1191edd16368SStephen M. Cameron 	int i, found = 0;
1192cfe5badcSScott Teel 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1193edd16368SStephen M. Cameron 
1194263d9401SAkinobu Mita 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1195edd16368SStephen M. Cameron 
1196edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1197edd16368SStephen M. Cameron 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1198263d9401SAkinobu Mita 			__set_bit(h->dev[i]->target, lun_taken);
1199edd16368SStephen M. Cameron 	}
1200edd16368SStephen M. Cameron 
1201263d9401SAkinobu Mita 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1202263d9401SAkinobu Mita 	if (i < HPSA_MAX_DEVICES) {
1203edd16368SStephen M. Cameron 		/* *bus = 1; */
1204edd16368SStephen M. Cameron 		*target = i;
1205edd16368SStephen M. Cameron 		*lun = 0;
1206edd16368SStephen M. Cameron 		found = 1;
1207edd16368SStephen M. Cameron 	}
1208edd16368SStephen M. Cameron 	return !found;
1209edd16368SStephen M. Cameron }
1210edd16368SStephen M. Cameron 
12111d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
12120d96ef5fSWebb Scales 	struct hpsa_scsi_dev_t *dev, char *description)
12130d96ef5fSWebb Scales {
12147c59a0d4SDon Brace #define LABEL_SIZE 25
12157c59a0d4SDon Brace 	char label[LABEL_SIZE];
12167c59a0d4SDon Brace 
12179975ec9dSDon Brace 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
12189975ec9dSDon Brace 		return;
12199975ec9dSDon Brace 
12207c59a0d4SDon Brace 	switch (dev->devtype) {
12217c59a0d4SDon Brace 	case TYPE_RAID:
12227c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "controller");
12237c59a0d4SDon Brace 		break;
12247c59a0d4SDon Brace 	case TYPE_ENCLOSURE:
12257c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "enclosure");
12267c59a0d4SDon Brace 		break;
12277c59a0d4SDon Brace 	case TYPE_DISK:
1228af15ed36SDon Brace 	case TYPE_ZBC:
12297c59a0d4SDon Brace 		if (dev->external)
12307c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "external");
12317c59a0d4SDon Brace 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
12327c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "%s",
12337c59a0d4SDon Brace 				raid_label[PHYSICAL_DRIVE]);
12347c59a0d4SDon Brace 		else
12357c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "RAID-%s",
12367c59a0d4SDon Brace 				dev->raid_level > RAID_UNKNOWN ? "?" :
12377c59a0d4SDon Brace 				raid_label[dev->raid_level]);
12387c59a0d4SDon Brace 		break;
12397c59a0d4SDon Brace 	case TYPE_ROM:
12407c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "rom");
12417c59a0d4SDon Brace 		break;
12427c59a0d4SDon Brace 	case TYPE_TAPE:
12437c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "tape");
12447c59a0d4SDon Brace 		break;
12457c59a0d4SDon Brace 	case TYPE_MEDIUM_CHANGER:
12467c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "changer");
12477c59a0d4SDon Brace 		break;
12487c59a0d4SDon Brace 	default:
12497c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "UNKNOWN");
12507c59a0d4SDon Brace 		break;
12517c59a0d4SDon Brace 	}
12527c59a0d4SDon Brace 
12530d96ef5fSWebb Scales 	dev_printk(level, &h->pdev->dev,
12547c59a0d4SDon Brace 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
12550d96ef5fSWebb Scales 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
12560d96ef5fSWebb Scales 			description,
12570d96ef5fSWebb Scales 			scsi_device_type(dev->devtype),
12580d96ef5fSWebb Scales 			dev->vendor,
12590d96ef5fSWebb Scales 			dev->model,
12607c59a0d4SDon Brace 			label,
12610d96ef5fSWebb Scales 			dev->offload_config ? '+' : '-',
1262b2582a65SDon Brace 			dev->offload_to_be_enabled ? '+' : '-',
12632a168208SKevin Barnett 			dev->expose_device);
12640d96ef5fSWebb Scales }
12650d96ef5fSWebb Scales 
1266edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */
12678aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h,
1268edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *device,
1269edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *added[], int *nadded)
1270edd16368SStephen M. Cameron {
1271edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1272edd16368SStephen M. Cameron 	int n = h->ndevices;
1273edd16368SStephen M. Cameron 	int i;
1274edd16368SStephen M. Cameron 	unsigned char addr1[8], addr2[8];
1275edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1276edd16368SStephen M. Cameron 
1277cfe5badcSScott Teel 	if (n >= HPSA_MAX_DEVICES) {
1278edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "too many devices, some will be "
1279edd16368SStephen M. Cameron 			"inaccessible.\n");
1280edd16368SStephen M. Cameron 		return -1;
1281edd16368SStephen M. Cameron 	}
1282edd16368SStephen M. Cameron 
1283edd16368SStephen M. Cameron 	/* physical devices do not have lun or target assigned until now. */
1284edd16368SStephen M. Cameron 	if (device->lun != -1)
1285edd16368SStephen M. Cameron 		/* Logical device, lun is already assigned. */
1286edd16368SStephen M. Cameron 		goto lun_assigned;
1287edd16368SStephen M. Cameron 
1288edd16368SStephen M. Cameron 	/* If this device a non-zero lun of a multi-lun device
1289edd16368SStephen M. Cameron 	 * byte 4 of the 8-byte LUN addr will contain the logical
12902b08b3e9SDon Brace 	 * unit no, zero otherwise.
1291edd16368SStephen M. Cameron 	 */
1292edd16368SStephen M. Cameron 	if (device->scsi3addr[4] == 0) {
1293edd16368SStephen M. Cameron 		/* This is not a non-zero lun of a multi-lun device */
1294edd16368SStephen M. Cameron 		if (hpsa_find_target_lun(h, device->scsi3addr,
1295edd16368SStephen M. Cameron 			device->bus, &device->target, &device->lun) != 0)
1296edd16368SStephen M. Cameron 			return -1;
1297edd16368SStephen M. Cameron 		goto lun_assigned;
1298edd16368SStephen M. Cameron 	}
1299edd16368SStephen M. Cameron 
1300edd16368SStephen M. Cameron 	/* This is a non-zero lun of a multi-lun device.
1301edd16368SStephen M. Cameron 	 * Search through our list and find the device which
13029a4178b7Sshane.seymour 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1303edd16368SStephen M. Cameron 	 * Assign the same bus and target for this new LUN.
1304edd16368SStephen M. Cameron 	 * Use the logical unit number from the firmware.
1305edd16368SStephen M. Cameron 	 */
1306edd16368SStephen M. Cameron 	memcpy(addr1, device->scsi3addr, 8);
1307edd16368SStephen M. Cameron 	addr1[4] = 0;
13089a4178b7Sshane.seymour 	addr1[5] = 0;
1309edd16368SStephen M. Cameron 	for (i = 0; i < n; i++) {
1310edd16368SStephen M. Cameron 		sd = h->dev[i];
1311edd16368SStephen M. Cameron 		memcpy(addr2, sd->scsi3addr, 8);
1312edd16368SStephen M. Cameron 		addr2[4] = 0;
13139a4178b7Sshane.seymour 		addr2[5] = 0;
13149a4178b7Sshane.seymour 		/* differ only in byte 4 and 5? */
1315edd16368SStephen M. Cameron 		if (memcmp(addr1, addr2, 8) == 0) {
1316edd16368SStephen M. Cameron 			device->bus = sd->bus;
1317edd16368SStephen M. Cameron 			device->target = sd->target;
1318edd16368SStephen M. Cameron 			device->lun = device->scsi3addr[4];
1319edd16368SStephen M. Cameron 			break;
1320edd16368SStephen M. Cameron 		}
1321edd16368SStephen M. Cameron 	}
1322edd16368SStephen M. Cameron 	if (device->lun == -1) {
1323edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1324edd16368SStephen M. Cameron 			" suspect firmware bug or unsupported hardware "
1325edd16368SStephen M. Cameron 			"configuration.\n");
1326edd16368SStephen M. Cameron 		return -1;
1327edd16368SStephen M. Cameron 	}
1328edd16368SStephen M. Cameron 
1329edd16368SStephen M. Cameron lun_assigned:
1330edd16368SStephen M. Cameron 
1331edd16368SStephen M. Cameron 	h->dev[n] = device;
1332edd16368SStephen M. Cameron 	h->ndevices++;
1333edd16368SStephen M. Cameron 	added[*nadded] = device;
1334edd16368SStephen M. Cameron 	(*nadded)++;
13350d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, device,
13362a168208SKevin Barnett 		device->expose_device ? "added" : "masked");
1337edd16368SStephen M. Cameron 	return 0;
1338edd16368SStephen M. Cameron }
1339edd16368SStephen M. Cameron 
1340b2582a65SDon Brace /*
1341b2582a65SDon Brace  * Called during a scan operation.
1342b2582a65SDon Brace  *
1343b2582a65SDon Brace  * Update an entry in h->dev[] array.
1344b2582a65SDon Brace  */
13458aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h,
1346bd9244f7SScott Teel 	int entry, struct hpsa_scsi_dev_t *new_entry)
1347bd9244f7SScott Teel {
1348bd9244f7SScott Teel 	/* assumes h->devlock is held */
1349bd9244f7SScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1350bd9244f7SScott Teel 
1351bd9244f7SScott Teel 	/* Raid level changed. */
1352bd9244f7SScott Teel 	h->dev[entry]->raid_level = new_entry->raid_level;
1353250fb125SStephen M. Cameron 
1354b2582a65SDon Brace 	/*
1355b2582a65SDon Brace 	 * ioacccel_handle may have changed for a dual domain disk
1356b2582a65SDon Brace 	 */
1357b2582a65SDon Brace 	h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1358b2582a65SDon Brace 
135903383736SDon Brace 	/* Raid offload parameters changed.  Careful about the ordering. */
1360b2582a65SDon Brace 	if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
136103383736SDon Brace 		/*
136203383736SDon Brace 		 * if drive is newly offload_enabled, we want to copy the
136303383736SDon Brace 		 * raid map data first.  If previously offload_enabled and
136403383736SDon Brace 		 * offload_config were set, raid map data had better be
1365b2582a65SDon Brace 		 * the same as it was before. If raid map data has changed
136603383736SDon Brace 		 * then it had better be the case that
136703383736SDon Brace 		 * h->dev[entry]->offload_enabled is currently 0.
136803383736SDon Brace 		 */
13699fb0de2dSStephen M. Cameron 		h->dev[entry]->raid_map = new_entry->raid_map;
137003383736SDon Brace 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
137103383736SDon Brace 	}
1372b2582a65SDon Brace 	if (new_entry->offload_to_be_enabled) {
1373a3144e0bSJoe Handzik 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1374a3144e0bSJoe Handzik 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1375a3144e0bSJoe Handzik 	}
1376a3144e0bSJoe Handzik 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
137703383736SDon Brace 	h->dev[entry]->offload_config = new_entry->offload_config;
137803383736SDon Brace 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
137903383736SDon Brace 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1380250fb125SStephen M. Cameron 
138141ce4c35SStephen Cameron 	/*
138241ce4c35SStephen Cameron 	 * We can turn off ioaccel offload now, but need to delay turning
1383b2582a65SDon Brace 	 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
138441ce4c35SStephen Cameron 	 * can't do that until all the devices are updated.
138541ce4c35SStephen Cameron 	 */
1386b2582a65SDon Brace 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1387b2582a65SDon Brace 
1388b2582a65SDon Brace 	/*
1389b2582a65SDon Brace 	 * turn ioaccel off immediately if told to do so.
1390b2582a65SDon Brace 	 */
1391b2582a65SDon Brace 	if (!new_entry->offload_to_be_enabled)
139241ce4c35SStephen Cameron 		h->dev[entry]->offload_enabled = 0;
139341ce4c35SStephen Cameron 
13940d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1395bd9244f7SScott Teel }
1396bd9244f7SScott Teel 
13972a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */
13988aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h,
13992a8ccf31SStephen M. Cameron 	int entry, struct hpsa_scsi_dev_t *new_entry,
14002a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *added[], int *nadded,
14012a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
14022a8ccf31SStephen M. Cameron {
14032a8ccf31SStephen M. Cameron 	/* assumes h->devlock is held */
1404cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
14052a8ccf31SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
14062a8ccf31SStephen M. Cameron 	(*nremoved)++;
140701350d05SStephen M. Cameron 
140801350d05SStephen M. Cameron 	/*
140901350d05SStephen M. Cameron 	 * New physical devices won't have target/lun assigned yet
141001350d05SStephen M. Cameron 	 * so we need to preserve the values in the slot we are replacing.
141101350d05SStephen M. Cameron 	 */
141201350d05SStephen M. Cameron 	if (new_entry->target == -1) {
141301350d05SStephen M. Cameron 		new_entry->target = h->dev[entry]->target;
141401350d05SStephen M. Cameron 		new_entry->lun = h->dev[entry]->lun;
141501350d05SStephen M. Cameron 	}
141601350d05SStephen M. Cameron 
14172a8ccf31SStephen M. Cameron 	h->dev[entry] = new_entry;
14182a8ccf31SStephen M. Cameron 	added[*nadded] = new_entry;
14192a8ccf31SStephen M. Cameron 	(*nadded)++;
1420b2582a65SDon Brace 
14210d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
14222a8ccf31SStephen M. Cameron }
14232a8ccf31SStephen M. Cameron 
1424edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */
14258aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1426edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1427edd16368SStephen M. Cameron {
1428edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1429edd16368SStephen M. Cameron 	int i;
1430edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1431edd16368SStephen M. Cameron 
1432cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1433edd16368SStephen M. Cameron 
1434edd16368SStephen M. Cameron 	sd = h->dev[entry];
1435edd16368SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
1436edd16368SStephen M. Cameron 	(*nremoved)++;
1437edd16368SStephen M. Cameron 
1438edd16368SStephen M. Cameron 	for (i = entry; i < h->ndevices-1; i++)
1439edd16368SStephen M. Cameron 		h->dev[i] = h->dev[i+1];
1440edd16368SStephen M. Cameron 	h->ndevices--;
14410d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1442edd16368SStephen M. Cameron }
1443edd16368SStephen M. Cameron 
1444edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \
1445edd16368SStephen M. Cameron 	(a)[7] == (b)[7] && \
1446edd16368SStephen M. Cameron 	(a)[6] == (b)[6] && \
1447edd16368SStephen M. Cameron 	(a)[5] == (b)[5] && \
1448edd16368SStephen M. Cameron 	(a)[4] == (b)[4] && \
1449edd16368SStephen M. Cameron 	(a)[3] == (b)[3] && \
1450edd16368SStephen M. Cameron 	(a)[2] == (b)[2] && \
1451edd16368SStephen M. Cameron 	(a)[1] == (b)[1] && \
1452edd16368SStephen M. Cameron 	(a)[0] == (b)[0])
1453edd16368SStephen M. Cameron 
1454edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h,
1455edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *added)
1456edd16368SStephen M. Cameron {
1457edd16368SStephen M. Cameron 	/* called when scsi_add_device fails in order to re-adjust
1458edd16368SStephen M. Cameron 	 * h->dev[] to match the mid layer's view.
1459edd16368SStephen M. Cameron 	 */
1460edd16368SStephen M. Cameron 	unsigned long flags;
1461edd16368SStephen M. Cameron 	int i, j;
1462edd16368SStephen M. Cameron 
1463edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
1464edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1465edd16368SStephen M. Cameron 		if (h->dev[i] == added) {
1466edd16368SStephen M. Cameron 			for (j = i; j < h->ndevices-1; j++)
1467edd16368SStephen M. Cameron 				h->dev[j] = h->dev[j+1];
1468edd16368SStephen M. Cameron 			h->ndevices--;
1469edd16368SStephen M. Cameron 			break;
1470edd16368SStephen M. Cameron 		}
1471edd16368SStephen M. Cameron 	}
1472edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
1473edd16368SStephen M. Cameron 	kfree(added);
1474edd16368SStephen M. Cameron }
1475edd16368SStephen M. Cameron 
1476edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1477edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev2)
1478edd16368SStephen M. Cameron {
1479edd16368SStephen M. Cameron 	/* we compare everything except lun and target as these
1480edd16368SStephen M. Cameron 	 * are not yet assigned.  Compare parts likely
1481edd16368SStephen M. Cameron 	 * to differ first
1482edd16368SStephen M. Cameron 	 */
1483edd16368SStephen M. Cameron 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1484edd16368SStephen M. Cameron 		sizeof(dev1->scsi3addr)) != 0)
1485edd16368SStephen M. Cameron 		return 0;
1486edd16368SStephen M. Cameron 	if (memcmp(dev1->device_id, dev2->device_id,
1487edd16368SStephen M. Cameron 		sizeof(dev1->device_id)) != 0)
1488edd16368SStephen M. Cameron 		return 0;
1489edd16368SStephen M. Cameron 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1490edd16368SStephen M. Cameron 		return 0;
1491edd16368SStephen M. Cameron 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1492edd16368SStephen M. Cameron 		return 0;
1493edd16368SStephen M. Cameron 	if (dev1->devtype != dev2->devtype)
1494edd16368SStephen M. Cameron 		return 0;
1495edd16368SStephen M. Cameron 	if (dev1->bus != dev2->bus)
1496edd16368SStephen M. Cameron 		return 0;
1497edd16368SStephen M. Cameron 	return 1;
1498edd16368SStephen M. Cameron }
1499edd16368SStephen M. Cameron 
1500bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1501bd9244f7SScott Teel 	struct hpsa_scsi_dev_t *dev2)
1502bd9244f7SScott Teel {
1503bd9244f7SScott Teel 	/* Device attributes that can change, but don't mean
1504bd9244f7SScott Teel 	 * that the device is a different device, nor that the OS
1505bd9244f7SScott Teel 	 * needs to be told anything about the change.
1506bd9244f7SScott Teel 	 */
1507bd9244f7SScott Teel 	if (dev1->raid_level != dev2->raid_level)
1508bd9244f7SScott Teel 		return 1;
1509250fb125SStephen M. Cameron 	if (dev1->offload_config != dev2->offload_config)
1510250fb125SStephen M. Cameron 		return 1;
1511b2582a65SDon Brace 	if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1512250fb125SStephen M. Cameron 		return 1;
151393849508SDon Brace 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
151403383736SDon Brace 		if (dev1->queue_depth != dev2->queue_depth)
151503383736SDon Brace 			return 1;
1516b2582a65SDon Brace 	/*
1517b2582a65SDon Brace 	 * This can happen for dual domain devices. An active
1518b2582a65SDon Brace 	 * path change causes the ioaccel handle to change
1519b2582a65SDon Brace 	 *
1520b2582a65SDon Brace 	 * for example note the handle differences between p0 and p1
1521b2582a65SDon Brace 	 * Device                    WWN               ,WWN hash,Handle
1522b2582a65SDon Brace 	 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1523b2582a65SDon Brace 	 *	p1                   0x5000C5005FC4DAC9,0x6798C0,0x00040004
1524b2582a65SDon Brace 	 */
1525b2582a65SDon Brace 	if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1526b2582a65SDon Brace 		return 1;
1527bd9244f7SScott Teel 	return 0;
1528bd9244f7SScott Teel }
1529bd9244f7SScott Teel 
1530edd16368SStephen M. Cameron /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1531edd16368SStephen M. Cameron  * and return needle location in *index.  If scsi3addr matches, but not
1532edd16368SStephen M. Cameron  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1533bd9244f7SScott Teel  * location in *index.
1534bd9244f7SScott Teel  * In the case of a minor device attribute change, such as RAID level, just
1535bd9244f7SScott Teel  * return DEVICE_UPDATED, along with the updated device's location in index.
1536bd9244f7SScott Teel  * If needle not found, return DEVICE_NOT_FOUND.
1537edd16368SStephen M. Cameron  */
1538edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1539edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1540edd16368SStephen M. Cameron 	int *index)
1541edd16368SStephen M. Cameron {
1542edd16368SStephen M. Cameron 	int i;
1543edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0
1544edd16368SStephen M. Cameron #define DEVICE_CHANGED 1
1545edd16368SStephen M. Cameron #define DEVICE_SAME 2
1546bd9244f7SScott Teel #define DEVICE_UPDATED 3
15471d33d85dSDon Brace 	if (needle == NULL)
15481d33d85dSDon Brace 		return DEVICE_NOT_FOUND;
15491d33d85dSDon Brace 
1550edd16368SStephen M. Cameron 	for (i = 0; i < haystack_size; i++) {
155123231048SStephen M. Cameron 		if (haystack[i] == NULL) /* previously removed. */
155223231048SStephen M. Cameron 			continue;
1553edd16368SStephen M. Cameron 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1554edd16368SStephen M. Cameron 			*index = i;
1555bd9244f7SScott Teel 			if (device_is_the_same(needle, haystack[i])) {
1556bd9244f7SScott Teel 				if (device_updated(needle, haystack[i]))
1557bd9244f7SScott Teel 					return DEVICE_UPDATED;
1558edd16368SStephen M. Cameron 				return DEVICE_SAME;
1559bd9244f7SScott Teel 			} else {
15609846590eSStephen M. Cameron 				/* Keep offline devices offline */
15619846590eSStephen M. Cameron 				if (needle->volume_offline)
15629846590eSStephen M. Cameron 					return DEVICE_NOT_FOUND;
1563edd16368SStephen M. Cameron 				return DEVICE_CHANGED;
1564edd16368SStephen M. Cameron 			}
1565edd16368SStephen M. Cameron 		}
1566bd9244f7SScott Teel 	}
1567edd16368SStephen M. Cameron 	*index = -1;
1568edd16368SStephen M. Cameron 	return DEVICE_NOT_FOUND;
1569edd16368SStephen M. Cameron }
1570edd16368SStephen M. Cameron 
15719846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h,
15729846590eSStephen M. Cameron 					unsigned char scsi3addr[])
15739846590eSStephen M. Cameron {
15749846590eSStephen M. Cameron 	struct offline_device_entry *device;
15759846590eSStephen M. Cameron 	unsigned long flags;
15769846590eSStephen M. Cameron 
15779846590eSStephen M. Cameron 	/* Check to see if device is already on the list */
15789846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15799846590eSStephen M. Cameron 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
15809846590eSStephen M. Cameron 		if (memcmp(device->scsi3addr, scsi3addr,
15819846590eSStephen M. Cameron 			sizeof(device->scsi3addr)) == 0) {
15829846590eSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
15839846590eSStephen M. Cameron 			return;
15849846590eSStephen M. Cameron 		}
15859846590eSStephen M. Cameron 	}
15869846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15879846590eSStephen M. Cameron 
15889846590eSStephen M. Cameron 	/* Device is not on the list, add it. */
15899846590eSStephen M. Cameron 	device = kmalloc(sizeof(*device), GFP_KERNEL);
15907e8a9486SAmit Kushwaha 	if (!device)
15919846590eSStephen M. Cameron 		return;
15927e8a9486SAmit Kushwaha 
15939846590eSStephen M. Cameron 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
15949846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15959846590eSStephen M. Cameron 	list_add_tail(&device->offline_list, &h->offline_device_list);
15969846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15979846590eSStephen M. Cameron }
15989846590eSStephen M. Cameron 
15999846590eSStephen M. Cameron /* Print a message explaining various offline volume states */
16009846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h,
16019846590eSStephen M. Cameron 	struct hpsa_scsi_dev_t *sd)
16029846590eSStephen M. Cameron {
16039846590eSStephen M. Cameron 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
16049846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16059846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
16069846590eSStephen M. Cameron 			h->scsi_host->host_no,
16079846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16089846590eSStephen M. Cameron 	switch (sd->volume_offline) {
16099846590eSStephen M. Cameron 	case HPSA_LV_OK:
16109846590eSStephen M. Cameron 		break;
16119846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
16129846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16139846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
16149846590eSStephen M. Cameron 			h->scsi_host->host_no,
16159846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16169846590eSStephen M. Cameron 		break;
16175ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
16185ca01204SScott Benesh 		dev_info(&h->pdev->dev,
16195ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
16205ca01204SScott Benesh 			h->scsi_host->host_no,
16215ca01204SScott Benesh 			sd->bus, sd->target, sd->lun);
16225ca01204SScott Benesh 		break;
16239846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
16249846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16255ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
16269846590eSStephen M. Cameron 			h->scsi_host->host_no,
16279846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16289846590eSStephen M. Cameron 		break;
16299846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
16309846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16319846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
16329846590eSStephen M. Cameron 			h->scsi_host->host_no,
16339846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16349846590eSStephen M. Cameron 		break;
16359846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
16369846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16379846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
16389846590eSStephen M. Cameron 			h->scsi_host->host_no,
16399846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16409846590eSStephen M. Cameron 		break;
16419846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
16429846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16439846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
16449846590eSStephen M. Cameron 			h->scsi_host->host_no,
16459846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16469846590eSStephen M. Cameron 		break;
16479846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
16489846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16499846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
16509846590eSStephen M. Cameron 			h->scsi_host->host_no,
16519846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16529846590eSStephen M. Cameron 		break;
16539846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
16549846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16559846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
16569846590eSStephen M. Cameron 			h->scsi_host->host_no,
16579846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16589846590eSStephen M. Cameron 		break;
16599846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
16609846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16619846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
16629846590eSStephen M. Cameron 			h->scsi_host->host_no,
16639846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16649846590eSStephen M. Cameron 		break;
16659846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION:
16669846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16679846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
16689846590eSStephen M. Cameron 			h->scsi_host->host_no,
16699846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16709846590eSStephen M. Cameron 		break;
16719846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
16729846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16739846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
16749846590eSStephen M. Cameron 			h->scsi_host->host_no,
16759846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16769846590eSStephen M. Cameron 		break;
16779846590eSStephen M. Cameron 	}
16789846590eSStephen M. Cameron }
16799846590eSStephen M. Cameron 
168003383736SDon Brace /*
168103383736SDon Brace  * Figure the list of physical drive pointers for a logical drive with
168203383736SDon Brace  * raid offload configured.
168303383736SDon Brace  */
168403383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
168503383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices,
168603383736SDon Brace 				struct hpsa_scsi_dev_t *logical_drive)
168703383736SDon Brace {
168803383736SDon Brace 	struct raid_map_data *map = &logical_drive->raid_map;
168903383736SDon Brace 	struct raid_map_disk_data *dd = &map->data[0];
169003383736SDon Brace 	int i, j;
169103383736SDon Brace 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
169203383736SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
169303383736SDon Brace 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
169403383736SDon Brace 				le16_to_cpu(map->layout_map_count) *
169503383736SDon Brace 				total_disks_per_row;
169603383736SDon Brace 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
169703383736SDon Brace 				total_disks_per_row;
169803383736SDon Brace 	int qdepth;
169903383736SDon Brace 
170003383736SDon Brace 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
170103383736SDon Brace 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
170203383736SDon Brace 
1703d604f533SWebb Scales 	logical_drive->nphysical_disks = nraid_map_entries;
1704d604f533SWebb Scales 
170503383736SDon Brace 	qdepth = 0;
170603383736SDon Brace 	for (i = 0; i < nraid_map_entries; i++) {
170703383736SDon Brace 		logical_drive->phys_disk[i] = NULL;
170803383736SDon Brace 		if (!logical_drive->offload_config)
170903383736SDon Brace 			continue;
171003383736SDon Brace 		for (j = 0; j < ndevices; j++) {
17111d33d85dSDon Brace 			if (dev[j] == NULL)
17121d33d85dSDon Brace 				continue;
1713ff615f06SPetros Koutoupis 			if (dev[j]->devtype != TYPE_DISK &&
1714ff615f06SPetros Koutoupis 			    dev[j]->devtype != TYPE_ZBC)
1715af15ed36SDon Brace 				continue;
1716f3f01730SKevin Barnett 			if (is_logical_device(dev[j]))
171703383736SDon Brace 				continue;
171803383736SDon Brace 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
171903383736SDon Brace 				continue;
172003383736SDon Brace 
172103383736SDon Brace 			logical_drive->phys_disk[i] = dev[j];
172203383736SDon Brace 			if (i < nphys_disk)
172303383736SDon Brace 				qdepth = min(h->nr_cmds, qdepth +
172403383736SDon Brace 				    logical_drive->phys_disk[i]->queue_depth);
172503383736SDon Brace 			break;
172603383736SDon Brace 		}
172703383736SDon Brace 
172803383736SDon Brace 		/*
172903383736SDon Brace 		 * This can happen if a physical drive is removed and
173003383736SDon Brace 		 * the logical drive is degraded.  In that case, the RAID
173103383736SDon Brace 		 * map data will refer to a physical disk which isn't actually
173203383736SDon Brace 		 * present.  And in that case offload_enabled should already
173303383736SDon Brace 		 * be 0, but we'll turn it off here just in case
173403383736SDon Brace 		 */
173503383736SDon Brace 		if (!logical_drive->phys_disk[i]) {
1736b2582a65SDon Brace 			dev_warn(&h->pdev->dev,
1737b2582a65SDon Brace 				"%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1738b2582a65SDon Brace 				__func__,
1739b2582a65SDon Brace 				h->scsi_host->host_no, logical_drive->bus,
1740b2582a65SDon Brace 				logical_drive->target, logical_drive->lun);
174103383736SDon Brace 			logical_drive->offload_enabled = 0;
174241ce4c35SStephen Cameron 			logical_drive->offload_to_be_enabled = 0;
174341ce4c35SStephen Cameron 			logical_drive->queue_depth = 8;
174403383736SDon Brace 		}
174503383736SDon Brace 	}
174603383736SDon Brace 	if (nraid_map_entries)
174703383736SDon Brace 		/*
174803383736SDon Brace 		 * This is correct for reads, too high for full stripe writes,
174903383736SDon Brace 		 * way too high for partial stripe writes
175003383736SDon Brace 		 */
175103383736SDon Brace 		logical_drive->queue_depth = qdepth;
17522c5fc363SDon Brace 	else {
17532c5fc363SDon Brace 		if (logical_drive->external)
17542c5fc363SDon Brace 			logical_drive->queue_depth = EXTERNAL_QD;
175503383736SDon Brace 		else
175603383736SDon Brace 			logical_drive->queue_depth = h->nr_cmds;
175703383736SDon Brace 	}
17582c5fc363SDon Brace }
175903383736SDon Brace 
176003383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
176103383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices)
176203383736SDon Brace {
176303383736SDon Brace 	int i;
176403383736SDon Brace 
176503383736SDon Brace 	for (i = 0; i < ndevices; i++) {
17661d33d85dSDon Brace 		if (dev[i] == NULL)
17671d33d85dSDon Brace 			continue;
1768ff615f06SPetros Koutoupis 		if (dev[i]->devtype != TYPE_DISK &&
1769ff615f06SPetros Koutoupis 		    dev[i]->devtype != TYPE_ZBC)
1770af15ed36SDon Brace 			continue;
1771f3f01730SKevin Barnett 		if (!is_logical_device(dev[i]))
177203383736SDon Brace 			continue;
177341ce4c35SStephen Cameron 
177441ce4c35SStephen Cameron 		/*
177541ce4c35SStephen Cameron 		 * If offload is currently enabled, the RAID map and
177641ce4c35SStephen Cameron 		 * phys_disk[] assignment *better* not be changing
1777b2582a65SDon Brace 		 * because we would be changing ioaccel phsy_disk[] pointers
1778b2582a65SDon Brace 		 * on a ioaccel volume processing I/O requests.
1779b2582a65SDon Brace 		 *
1780b2582a65SDon Brace 		 * If an ioaccel volume status changed, initially because it was
1781b2582a65SDon Brace 		 * re-configured and thus underwent a transformation, or
1782b2582a65SDon Brace 		 * a drive failed, we would have received a state change
1783b2582a65SDon Brace 		 * request and ioaccel should have been turned off. When the
1784b2582a65SDon Brace 		 * transformation completes, we get another state change
1785b2582a65SDon Brace 		 * request to turn ioaccel back on. In this case, we need
1786b2582a65SDon Brace 		 * to update the ioaccel information.
1787b2582a65SDon Brace 		 *
1788b2582a65SDon Brace 		 * Thus: If it is not currently enabled, but will be after
1789b2582a65SDon Brace 		 * the scan completes, make sure the ioaccel pointers
1790b2582a65SDon Brace 		 * are up to date.
179141ce4c35SStephen Cameron 		 */
179241ce4c35SStephen Cameron 
1793b2582a65SDon Brace 		if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
179403383736SDon Brace 			hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
179503383736SDon Brace 	}
179603383736SDon Brace }
179703383736SDon Brace 
1798096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1799096ccff4SKevin Barnett {
1800096ccff4SKevin Barnett 	int rc = 0;
1801096ccff4SKevin Barnett 
1802096ccff4SKevin Barnett 	if (!h->scsi_host)
1803096ccff4SKevin Barnett 		return 1;
1804096ccff4SKevin Barnett 
1805d04e62b9SKevin Barnett 	if (is_logical_device(device)) /* RAID */
1806096ccff4SKevin Barnett 		rc = scsi_add_device(h->scsi_host, device->bus,
1807096ccff4SKevin Barnett 					device->target, device->lun);
1808d04e62b9SKevin Barnett 	else /* HBA */
1809d04e62b9SKevin Barnett 		rc = hpsa_add_sas_device(h->sas_host, device);
1810d04e62b9SKevin Barnett 
1811096ccff4SKevin Barnett 	return rc;
1812096ccff4SKevin Barnett }
1813096ccff4SKevin Barnett 
1814ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1815ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *dev)
1816ba74fdc4SDon Brace {
1817ba74fdc4SDon Brace 	int i;
1818ba74fdc4SDon Brace 	int count = 0;
1819ba74fdc4SDon Brace 
1820ba74fdc4SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
1821ba74fdc4SDon Brace 		struct CommandList *c = h->cmd_pool + i;
1822ba74fdc4SDon Brace 		int refcount = atomic_inc_return(&c->refcount);
1823ba74fdc4SDon Brace 
1824ba74fdc4SDon Brace 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1825ba74fdc4SDon Brace 				dev->scsi3addr)) {
1826ba74fdc4SDon Brace 			unsigned long flags;
1827ba74fdc4SDon Brace 
1828ba74fdc4SDon Brace 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
1829ba74fdc4SDon Brace 			if (!hpsa_is_cmd_idle(c))
1830ba74fdc4SDon Brace 				++count;
1831ba74fdc4SDon Brace 			spin_unlock_irqrestore(&h->lock, flags);
1832ba74fdc4SDon Brace 		}
1833ba74fdc4SDon Brace 
1834ba74fdc4SDon Brace 		cmd_free(h, c);
1835ba74fdc4SDon Brace 	}
1836ba74fdc4SDon Brace 
1837ba74fdc4SDon Brace 	return count;
1838ba74fdc4SDon Brace }
1839ba74fdc4SDon Brace 
1840b443d3eaSDon Brace #define NUM_WAIT 20
1841ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1842ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *device)
1843ba74fdc4SDon Brace {
1844ba74fdc4SDon Brace 	int cmds = 0;
1845ba74fdc4SDon Brace 	int waits = 0;
1846b443d3eaSDon Brace 	int num_wait = NUM_WAIT;
1847b443d3eaSDon Brace 
1848b443d3eaSDon Brace 	if (device->external)
1849b443d3eaSDon Brace 		num_wait = HPSA_EH_PTRAID_TIMEOUT;
1850ba74fdc4SDon Brace 
1851ba74fdc4SDon Brace 	while (1) {
1852ba74fdc4SDon Brace 		cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1853ba74fdc4SDon Brace 		if (cmds == 0)
1854ba74fdc4SDon Brace 			break;
1855b443d3eaSDon Brace 		if (++waits > num_wait)
1856ba74fdc4SDon Brace 			break;
18579211a07fSDon Brace 		msleep(1000);
18589211a07fSDon Brace 	}
18599211a07fSDon Brace 
1860b443d3eaSDon Brace 	if (waits > num_wait) {
1861ba74fdc4SDon Brace 		dev_warn(&h->pdev->dev,
1862b443d3eaSDon Brace 			"%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1863b443d3eaSDon Brace 			__func__,
1864b443d3eaSDon Brace 			h->scsi_host->host_no,
1865b443d3eaSDon Brace 			device->bus, device->target, device->lun, cmds);
1866b443d3eaSDon Brace 	}
1867ba74fdc4SDon Brace }
1868ba74fdc4SDon Brace 
1869096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h,
1870096ccff4SKevin Barnett 			struct hpsa_scsi_dev_t *device)
1871096ccff4SKevin Barnett {
1872096ccff4SKevin Barnett 	struct scsi_device *sdev = NULL;
1873096ccff4SKevin Barnett 
1874096ccff4SKevin Barnett 	if (!h->scsi_host)
1875096ccff4SKevin Barnett 		return;
1876096ccff4SKevin Barnett 
18770ff365f5SDon Brace 	/*
18780ff365f5SDon Brace 	 * Allow for commands to drain
18790ff365f5SDon Brace 	 */
18800ff365f5SDon Brace 	device->removed = 1;
18810ff365f5SDon Brace 	hpsa_wait_for_outstanding_commands_for_dev(h, device);
18820ff365f5SDon Brace 
1883d04e62b9SKevin Barnett 	if (is_logical_device(device)) { /* RAID */
1884096ccff4SKevin Barnett 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1885096ccff4SKevin Barnett 						device->target, device->lun);
1886096ccff4SKevin Barnett 		if (sdev) {
1887096ccff4SKevin Barnett 			scsi_remove_device(sdev);
1888096ccff4SKevin Barnett 			scsi_device_put(sdev);
1889096ccff4SKevin Barnett 		} else {
1890096ccff4SKevin Barnett 			/*
1891096ccff4SKevin Barnett 			 * We don't expect to get here.  Future commands
1892096ccff4SKevin Barnett 			 * to this device will get a selection timeout as
1893096ccff4SKevin Barnett 			 * if the device were gone.
1894096ccff4SKevin Barnett 			 */
1895096ccff4SKevin Barnett 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1896096ccff4SKevin Barnett 					"didn't find device for removal.");
1897096ccff4SKevin Barnett 		}
1898ba74fdc4SDon Brace 	} else { /* HBA */
1899ba74fdc4SDon Brace 
1900d04e62b9SKevin Barnett 		hpsa_remove_sas_device(device);
1901096ccff4SKevin Barnett 	}
1902ba74fdc4SDon Brace }
1903096ccff4SKevin Barnett 
19048aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1905edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd[], int nsds)
1906edd16368SStephen M. Cameron {
1907edd16368SStephen M. Cameron 	/* sd contains scsi3 addresses and devtypes, and inquiry
1908edd16368SStephen M. Cameron 	 * data.  This function takes what's in sd to be the current
1909edd16368SStephen M. Cameron 	 * reality and updates h->dev[] to reflect that reality.
1910edd16368SStephen M. Cameron 	 */
1911edd16368SStephen M. Cameron 	int i, entry, device_change, changes = 0;
1912edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *csd;
1913edd16368SStephen M. Cameron 	unsigned long flags;
1914edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **added, **removed;
1915edd16368SStephen M. Cameron 	int nadded, nremoved;
1916edd16368SStephen M. Cameron 
1917da03ded0SDon Brace 	/*
1918da03ded0SDon Brace 	 * A reset can cause a device status to change
1919da03ded0SDon Brace 	 * re-schedule the scan to see what happened.
1920da03ded0SDon Brace 	 */
1921c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
1922da03ded0SDon Brace 	if (h->reset_in_progress) {
1923da03ded0SDon Brace 		h->drv_req_rescan = 1;
1924c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
1925da03ded0SDon Brace 		return;
1926da03ded0SDon Brace 	}
1927c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
1928edd16368SStephen M. Cameron 
19296396bb22SKees Cook 	added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
19306396bb22SKees Cook 	removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1931edd16368SStephen M. Cameron 
1932edd16368SStephen M. Cameron 	if (!added || !removed) {
1933edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in "
1934edd16368SStephen M. Cameron 			"adjust_hpsa_scsi_table\n");
1935edd16368SStephen M. Cameron 		goto free_and_out;
1936edd16368SStephen M. Cameron 	}
1937edd16368SStephen M. Cameron 
1938edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1939edd16368SStephen M. Cameron 
1940edd16368SStephen M. Cameron 	/* find any devices in h->dev[] that are not in
1941edd16368SStephen M. Cameron 	 * sd[] and remove them from h->dev[], and for any
1942edd16368SStephen M. Cameron 	 * devices which have changed, remove the old device
1943edd16368SStephen M. Cameron 	 * info and add the new device info.
1944bd9244f7SScott Teel 	 * If minor device attributes change, just update
1945bd9244f7SScott Teel 	 * the existing device structure.
1946edd16368SStephen M. Cameron 	 */
1947edd16368SStephen M. Cameron 	i = 0;
1948edd16368SStephen M. Cameron 	nremoved = 0;
1949edd16368SStephen M. Cameron 	nadded = 0;
1950edd16368SStephen M. Cameron 	while (i < h->ndevices) {
1951edd16368SStephen M. Cameron 		csd = h->dev[i];
1952edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1953edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1954edd16368SStephen M. Cameron 			changes++;
19558aa60681SDon Brace 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1956edd16368SStephen M. Cameron 			continue; /* remove ^^^, hence i not incremented */
1957edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1958edd16368SStephen M. Cameron 			changes++;
19598aa60681SDon Brace 			hpsa_scsi_replace_entry(h, i, sd[entry],
19602a8ccf31SStephen M. Cameron 				added, &nadded, removed, &nremoved);
1961c7f172dcSStephen M. Cameron 			/* Set it to NULL to prevent it from being freed
1962c7f172dcSStephen M. Cameron 			 * at the bottom of hpsa_update_scsi_devices()
1963c7f172dcSStephen M. Cameron 			 */
1964c7f172dcSStephen M. Cameron 			sd[entry] = NULL;
1965bd9244f7SScott Teel 		} else if (device_change == DEVICE_UPDATED) {
19668aa60681SDon Brace 			hpsa_scsi_update_entry(h, i, sd[entry]);
1967edd16368SStephen M. Cameron 		}
1968edd16368SStephen M. Cameron 		i++;
1969edd16368SStephen M. Cameron 	}
1970edd16368SStephen M. Cameron 
1971edd16368SStephen M. Cameron 	/* Now, make sure every device listed in sd[] is also
1972edd16368SStephen M. Cameron 	 * listed in h->dev[], adding them if they aren't found
1973edd16368SStephen M. Cameron 	 */
1974edd16368SStephen M. Cameron 
1975edd16368SStephen M. Cameron 	for (i = 0; i < nsds; i++) {
1976edd16368SStephen M. Cameron 		if (!sd[i]) /* if already added above. */
1977edd16368SStephen M. Cameron 			continue;
19789846590eSStephen M. Cameron 
19799846590eSStephen M. Cameron 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
19809846590eSStephen M. Cameron 		 * as the SCSI mid-layer does not handle such devices well.
19819846590eSStephen M. Cameron 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
19829846590eSStephen M. Cameron 		 * at 160Hz, and prevents the system from coming up.
19839846590eSStephen M. Cameron 		 */
19849846590eSStephen M. Cameron 		if (sd[i]->volume_offline) {
19859846590eSStephen M. Cameron 			hpsa_show_volume_status(h, sd[i]);
19860d96ef5fSWebb Scales 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
19879846590eSStephen M. Cameron 			continue;
19889846590eSStephen M. Cameron 		}
19899846590eSStephen M. Cameron 
1990edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1991edd16368SStephen M. Cameron 					h->ndevices, &entry);
1992edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1993edd16368SStephen M. Cameron 			changes++;
19948aa60681SDon Brace 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1995edd16368SStephen M. Cameron 				break;
1996edd16368SStephen M. Cameron 			sd[i] = NULL; /* prevent from being freed later. */
1997edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1998edd16368SStephen M. Cameron 			/* should never happen... */
1999edd16368SStephen M. Cameron 			changes++;
2000edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev,
2001edd16368SStephen M. Cameron 				"device unexpectedly changed.\n");
2002edd16368SStephen M. Cameron 			/* but if it does happen, we just ignore that device */
2003edd16368SStephen M. Cameron 		}
2004edd16368SStephen M. Cameron 	}
200541ce4c35SStephen Cameron 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
200641ce4c35SStephen Cameron 
2007b2582a65SDon Brace 	/*
2008b2582a65SDon Brace 	 * Now that h->dev[]->phys_disk[] is coherent, we can enable
200941ce4c35SStephen Cameron 	 * any logical drives that need it enabled.
2010b2582a65SDon Brace 	 *
2011b2582a65SDon Brace 	 * The raid map should be current by now.
2012b2582a65SDon Brace 	 *
2013b2582a65SDon Brace 	 * We are updating the device list used for I/O requests.
201441ce4c35SStephen Cameron 	 */
20151d33d85dSDon Brace 	for (i = 0; i < h->ndevices; i++) {
20161d33d85dSDon Brace 		if (h->dev[i] == NULL)
20171d33d85dSDon Brace 			continue;
201841ce4c35SStephen Cameron 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
20191d33d85dSDon Brace 	}
202041ce4c35SStephen Cameron 
2021edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2022edd16368SStephen M. Cameron 
20239846590eSStephen M. Cameron 	/* Monitor devices which are in one of several NOT READY states to be
20249846590eSStephen M. Cameron 	 * brought online later. This must be done without holding h->devlock,
20259846590eSStephen M. Cameron 	 * so don't touch h->dev[]
20269846590eSStephen M. Cameron 	 */
20279846590eSStephen M. Cameron 	for (i = 0; i < nsds; i++) {
20289846590eSStephen M. Cameron 		if (!sd[i]) /* if already added above. */
20299846590eSStephen M. Cameron 			continue;
20309846590eSStephen M. Cameron 		if (sd[i]->volume_offline)
20319846590eSStephen M. Cameron 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
20329846590eSStephen M. Cameron 	}
20339846590eSStephen M. Cameron 
2034edd16368SStephen M. Cameron 	/* Don't notify scsi mid layer of any changes the first time through
2035edd16368SStephen M. Cameron 	 * (or if there are no changes) scsi_scan_host will do it later the
2036edd16368SStephen M. Cameron 	 * first time through.
2037edd16368SStephen M. Cameron 	 */
20388aa60681SDon Brace 	if (!changes)
2039edd16368SStephen M. Cameron 		goto free_and_out;
2040edd16368SStephen M. Cameron 
2041edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any removed devices */
2042edd16368SStephen M. Cameron 	for (i = 0; i < nremoved; i++) {
20431d33d85dSDon Brace 		if (removed[i] == NULL)
20441d33d85dSDon Brace 			continue;
2045096ccff4SKevin Barnett 		if (removed[i]->expose_device)
2046096ccff4SKevin Barnett 			hpsa_remove_device(h, removed[i]);
2047edd16368SStephen M. Cameron 		kfree(removed[i]);
2048edd16368SStephen M. Cameron 		removed[i] = NULL;
2049edd16368SStephen M. Cameron 	}
2050edd16368SStephen M. Cameron 
2051edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any added devices */
2052edd16368SStephen M. Cameron 	for (i = 0; i < nadded; i++) {
2053096ccff4SKevin Barnett 		int rc = 0;
2054096ccff4SKevin Barnett 
20551d33d85dSDon Brace 		if (added[i] == NULL)
205641ce4c35SStephen Cameron 			continue;
20572a168208SKevin Barnett 		if (!(added[i]->expose_device))
2058edd16368SStephen M. Cameron 			continue;
2059096ccff4SKevin Barnett 		rc = hpsa_add_device(h, added[i]);
2060096ccff4SKevin Barnett 		if (!rc)
2061edd16368SStephen M. Cameron 			continue;
2062096ccff4SKevin Barnett 		dev_warn(&h->pdev->dev,
2063096ccff4SKevin Barnett 			"addition failed %d, device not added.", rc);
2064edd16368SStephen M. Cameron 		/* now we have to remove it from h->dev,
2065edd16368SStephen M. Cameron 		 * since it didn't get added to scsi mid layer
2066edd16368SStephen M. Cameron 		 */
2067edd16368SStephen M. Cameron 		fixup_botched_add(h, added[i]);
2068853633e8SDon Brace 		h->drv_req_rescan = 1;
2069edd16368SStephen M. Cameron 	}
2070edd16368SStephen M. Cameron 
2071edd16368SStephen M. Cameron free_and_out:
2072edd16368SStephen M. Cameron 	kfree(added);
2073edd16368SStephen M. Cameron 	kfree(removed);
2074edd16368SStephen M. Cameron }
2075edd16368SStephen M. Cameron 
2076edd16368SStephen M. Cameron /*
20779e03aa2fSJoe Perches  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2078edd16368SStephen M. Cameron  * Assume's h->devlock is held.
2079edd16368SStephen M. Cameron  */
2080edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2081edd16368SStephen M. Cameron 	int bus, int target, int lun)
2082edd16368SStephen M. Cameron {
2083edd16368SStephen M. Cameron 	int i;
2084edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
2085edd16368SStephen M. Cameron 
2086edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
2087edd16368SStephen M. Cameron 		sd = h->dev[i];
2088edd16368SStephen M. Cameron 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
2089edd16368SStephen M. Cameron 			return sd;
2090edd16368SStephen M. Cameron 	}
2091edd16368SStephen M. Cameron 	return NULL;
2092edd16368SStephen M. Cameron }
2093edd16368SStephen M. Cameron 
2094edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev)
2095edd16368SStephen M. Cameron {
20967630b3a5SHannes Reinecke 	struct hpsa_scsi_dev_t *sd = NULL;
2097edd16368SStephen M. Cameron 	unsigned long flags;
2098edd16368SStephen M. Cameron 	struct ctlr_info *h;
2099edd16368SStephen M. Cameron 
2100edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
2101edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
2102d04e62b9SKevin Barnett 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2103d04e62b9SKevin Barnett 		struct scsi_target *starget;
2104d04e62b9SKevin Barnett 		struct sas_rphy *rphy;
2105d04e62b9SKevin Barnett 
2106d04e62b9SKevin Barnett 		starget = scsi_target(sdev);
2107d04e62b9SKevin Barnett 		rphy = target_to_rphy(starget);
2108d04e62b9SKevin Barnett 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
2109d04e62b9SKevin Barnett 		if (sd) {
2110d04e62b9SKevin Barnett 			sd->target = sdev_id(sdev);
2111d04e62b9SKevin Barnett 			sd->lun = sdev->lun;
2112d04e62b9SKevin Barnett 		}
21137630b3a5SHannes Reinecke 	}
21147630b3a5SHannes Reinecke 	if (!sd)
2115edd16368SStephen M. Cameron 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2116edd16368SStephen M. Cameron 					sdev_id(sdev), sdev->lun);
2117d04e62b9SKevin Barnett 
2118d04e62b9SKevin Barnett 	if (sd && sd->expose_device) {
211903383736SDon Brace 		atomic_set(&sd->ioaccel_cmds_out, 0);
2120d04e62b9SKevin Barnett 		sdev->hostdata = sd;
212141ce4c35SStephen Cameron 	} else
212241ce4c35SStephen Cameron 		sdev->hostdata = NULL;
2123edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2124edd16368SStephen M. Cameron 	return 0;
2125edd16368SStephen M. Cameron }
2126edd16368SStephen M. Cameron 
212741ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */
212841ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev)
212941ce4c35SStephen Cameron {
213041ce4c35SStephen Cameron 	struct hpsa_scsi_dev_t *sd;
213141ce4c35SStephen Cameron 	int queue_depth;
213241ce4c35SStephen Cameron 
213341ce4c35SStephen Cameron 	sd = sdev->hostdata;
21342a168208SKevin Barnett 	sdev->no_uld_attach = !sd || !sd->expose_device;
213541ce4c35SStephen Cameron 
21365086435eSDon Brace 	if (sd) {
21379e33f0d5SDon Brace 		sd->was_removed = 0;
2138b443d3eaSDon Brace 		if (sd->external) {
21395086435eSDon Brace 			queue_depth = EXTERNAL_QD;
2140b443d3eaSDon Brace 			sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2141b443d3eaSDon Brace 			blk_queue_rq_timeout(sdev->request_queue,
2142b443d3eaSDon Brace 						HPSA_EH_PTRAID_TIMEOUT);
2143b443d3eaSDon Brace 		} else {
214441ce4c35SStephen Cameron 			queue_depth = sd->queue_depth != 0 ?
214541ce4c35SStephen Cameron 					sd->queue_depth : sdev->host->can_queue;
2146b443d3eaSDon Brace 		}
21475086435eSDon Brace 	} else
214841ce4c35SStephen Cameron 		queue_depth = sdev->host->can_queue;
214941ce4c35SStephen Cameron 
215041ce4c35SStephen Cameron 	scsi_change_queue_depth(sdev, queue_depth);
215141ce4c35SStephen Cameron 
215241ce4c35SStephen Cameron 	return 0;
215341ce4c35SStephen Cameron }
215441ce4c35SStephen Cameron 
2155edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev)
2156edd16368SStephen M. Cameron {
21579e33f0d5SDon Brace 	struct hpsa_scsi_dev_t *hdev = NULL;
21589e33f0d5SDon Brace 
21599e33f0d5SDon Brace 	hdev = sdev->hostdata;
21609e33f0d5SDon Brace 
21619e33f0d5SDon Brace 	if (hdev)
21629e33f0d5SDon Brace 		hdev->was_removed = 1;
2163edd16368SStephen M. Cameron }
2164edd16368SStephen M. Cameron 
2165d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2166d9a729f3SWebb Scales {
2167d9a729f3SWebb Scales 	int i;
2168d9a729f3SWebb Scales 
2169d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2170d9a729f3SWebb Scales 		return;
2171d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2172d9a729f3SWebb Scales 		kfree(h->ioaccel2_cmd_sg_list[i]);
2173d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] = NULL;
2174d9a729f3SWebb Scales 	}
2175d9a729f3SWebb Scales 	kfree(h->ioaccel2_cmd_sg_list);
2176d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list = NULL;
2177d9a729f3SWebb Scales }
2178d9a729f3SWebb Scales 
2179d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2180d9a729f3SWebb Scales {
2181d9a729f3SWebb Scales 	int i;
2182d9a729f3SWebb Scales 
2183d9a729f3SWebb Scales 	if (h->chainsize <= 0)
2184d9a729f3SWebb Scales 		return 0;
2185d9a729f3SWebb Scales 
2186d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list =
21876396bb22SKees Cook 		kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2188d9a729f3SWebb Scales 					GFP_KERNEL);
2189d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2190d9a729f3SWebb Scales 		return -ENOMEM;
2191d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2192d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] =
21936da2ec56SKees Cook 			kmalloc_array(h->maxsgentries,
21946da2ec56SKees Cook 				      sizeof(*h->ioaccel2_cmd_sg_list[i]),
21956da2ec56SKees Cook 				      GFP_KERNEL);
2196d9a729f3SWebb Scales 		if (!h->ioaccel2_cmd_sg_list[i])
2197d9a729f3SWebb Scales 			goto clean;
2198d9a729f3SWebb Scales 	}
2199d9a729f3SWebb Scales 	return 0;
2200d9a729f3SWebb Scales 
2201d9a729f3SWebb Scales clean:
2202d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2203d9a729f3SWebb Scales 	return -ENOMEM;
2204d9a729f3SWebb Scales }
2205d9a729f3SWebb Scales 
220633a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
220733a2ffceSStephen M. Cameron {
220833a2ffceSStephen M. Cameron 	int i;
220933a2ffceSStephen M. Cameron 
221033a2ffceSStephen M. Cameron 	if (!h->cmd_sg_list)
221133a2ffceSStephen M. Cameron 		return;
221233a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
221333a2ffceSStephen M. Cameron 		kfree(h->cmd_sg_list[i]);
221433a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = NULL;
221533a2ffceSStephen M. Cameron 	}
221633a2ffceSStephen M. Cameron 	kfree(h->cmd_sg_list);
221733a2ffceSStephen M. Cameron 	h->cmd_sg_list = NULL;
221833a2ffceSStephen M. Cameron }
221933a2ffceSStephen M. Cameron 
2220105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
222133a2ffceSStephen M. Cameron {
222233a2ffceSStephen M. Cameron 	int i;
222333a2ffceSStephen M. Cameron 
222433a2ffceSStephen M. Cameron 	if (h->chainsize <= 0)
222533a2ffceSStephen M. Cameron 		return 0;
222633a2ffceSStephen M. Cameron 
22276396bb22SKees Cook 	h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
222833a2ffceSStephen M. Cameron 				 GFP_KERNEL);
22297e8a9486SAmit Kushwaha 	if (!h->cmd_sg_list)
223033a2ffceSStephen M. Cameron 		return -ENOMEM;
22317e8a9486SAmit Kushwaha 
223233a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
22336da2ec56SKees Cook 		h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
22346da2ec56SKees Cook 						  sizeof(*h->cmd_sg_list[i]),
22356da2ec56SKees Cook 						  GFP_KERNEL);
22367e8a9486SAmit Kushwaha 		if (!h->cmd_sg_list[i])
223733a2ffceSStephen M. Cameron 			goto clean;
22387e8a9486SAmit Kushwaha 
22393d4e6af8SRobert Elliott 	}
224033a2ffceSStephen M. Cameron 	return 0;
224133a2ffceSStephen M. Cameron 
224233a2ffceSStephen M. Cameron clean:
224333a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
224433a2ffceSStephen M. Cameron 	return -ENOMEM;
224533a2ffceSStephen M. Cameron }
224633a2ffceSStephen M. Cameron 
2247d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2248d9a729f3SWebb Scales 	struct io_accel2_cmd *cp, struct CommandList *c)
2249d9a729f3SWebb Scales {
2250d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_block;
2251d9a729f3SWebb Scales 	u64 temp64;
2252d9a729f3SWebb Scales 	u32 chain_size;
2253d9a729f3SWebb Scales 
2254d9a729f3SWebb Scales 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2255a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
22568bc8f47eSChristoph Hellwig 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
22578bc8f47eSChristoph Hellwig 				DMA_TO_DEVICE);
2258d9a729f3SWebb Scales 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2259d9a729f3SWebb Scales 		/* prevent subsequent unmapping */
2260d9a729f3SWebb Scales 		cp->sg->address = 0;
2261d9a729f3SWebb Scales 		return -1;
2262d9a729f3SWebb Scales 	}
2263d9a729f3SWebb Scales 	cp->sg->address = cpu_to_le64(temp64);
2264d9a729f3SWebb Scales 	return 0;
2265d9a729f3SWebb Scales }
2266d9a729f3SWebb Scales 
2267d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2268d9a729f3SWebb Scales 	struct io_accel2_cmd *cp)
2269d9a729f3SWebb Scales {
2270d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_sg;
2271d9a729f3SWebb Scales 	u64 temp64;
2272d9a729f3SWebb Scales 	u32 chain_size;
2273d9a729f3SWebb Scales 
2274d9a729f3SWebb Scales 	chain_sg = cp->sg;
2275d9a729f3SWebb Scales 	temp64 = le64_to_cpu(chain_sg->address);
2276a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
22778bc8f47eSChristoph Hellwig 	dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2278d9a729f3SWebb Scales }
2279d9a729f3SWebb Scales 
2280e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h,
228133a2ffceSStephen M. Cameron 	struct CommandList *c)
228233a2ffceSStephen M. Cameron {
228333a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg, *chain_block;
228433a2ffceSStephen M. Cameron 	u64 temp64;
228550a0decfSStephen M. Cameron 	u32 chain_len;
228633a2ffceSStephen M. Cameron 
228733a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
228833a2ffceSStephen M. Cameron 	chain_block = h->cmd_sg_list[c->cmdindex];
228950a0decfSStephen M. Cameron 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
229050a0decfSStephen M. Cameron 	chain_len = sizeof(*chain_sg) *
22912b08b3e9SDon Brace 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
229250a0decfSStephen M. Cameron 	chain_sg->Len = cpu_to_le32(chain_len);
22938bc8f47eSChristoph Hellwig 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
22948bc8f47eSChristoph Hellwig 				DMA_TO_DEVICE);
2295e2bea6dfSStephen M. Cameron 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2296e2bea6dfSStephen M. Cameron 		/* prevent subsequent unmapping */
229750a0decfSStephen M. Cameron 		chain_sg->Addr = cpu_to_le64(0);
2298e2bea6dfSStephen M. Cameron 		return -1;
2299e2bea6dfSStephen M. Cameron 	}
230050a0decfSStephen M. Cameron 	chain_sg->Addr = cpu_to_le64(temp64);
2301e2bea6dfSStephen M. Cameron 	return 0;
230233a2ffceSStephen M. Cameron }
230333a2ffceSStephen M. Cameron 
230433a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
230533a2ffceSStephen M. Cameron 	struct CommandList *c)
230633a2ffceSStephen M. Cameron {
230733a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg;
230833a2ffceSStephen M. Cameron 
230950a0decfSStephen M. Cameron 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
231033a2ffceSStephen M. Cameron 		return;
231133a2ffceSStephen M. Cameron 
231233a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
23138bc8f47eSChristoph Hellwig 	dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
23148bc8f47eSChristoph Hellwig 			le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
231533a2ffceSStephen M. Cameron }
231633a2ffceSStephen M. Cameron 
2317a09c1441SScott Teel 
2318a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path.
2319a09c1441SScott Teel  * Return 1 for any error that should generate a RAID path retry.
2320a09c1441SScott Teel  * Return 0 for errors that don't require a RAID path retry.
2321a09c1441SScott Teel  */
2322a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2323c349775eSScott Teel 					struct CommandList *c,
2324c349775eSScott Teel 					struct scsi_cmnd *cmd,
2325ba74fdc4SDon Brace 					struct io_accel2_cmd *c2,
2326ba74fdc4SDon Brace 					struct hpsa_scsi_dev_t *dev)
2327c349775eSScott Teel {
2328c349775eSScott Teel 	int data_len;
2329a09c1441SScott Teel 	int retry = 0;
2330c40820d5SJoe Handzik 	u32 ioaccel2_resid = 0;
2331c349775eSScott Teel 
2332c349775eSScott Teel 	switch (c2->error_data.serv_response) {
2333c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2334c349775eSScott Teel 		switch (c2->error_data.status) {
2335c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2336eeebce18SDon Brace 			if (cmd)
2337eeebce18SDon Brace 				cmd->result = 0;
2338c349775eSScott Teel 			break;
2339c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2340ee6b1889SStephen M. Cameron 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2341c349775eSScott Teel 			if (c2->error_data.data_present !=
2342ee6b1889SStephen M. Cameron 					IOACCEL2_SENSE_DATA_PRESENT) {
2343ee6b1889SStephen M. Cameron 				memset(cmd->sense_buffer, 0,
2344ee6b1889SStephen M. Cameron 					SCSI_SENSE_BUFFERSIZE);
2345c349775eSScott Teel 				break;
2346ee6b1889SStephen M. Cameron 			}
2347c349775eSScott Teel 			/* copy the sense data */
2348c349775eSScott Teel 			data_len = c2->error_data.sense_data_len;
2349c349775eSScott Teel 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2350c349775eSScott Teel 				data_len = SCSI_SENSE_BUFFERSIZE;
2351c349775eSScott Teel 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2352c349775eSScott Teel 				data_len =
2353c349775eSScott Teel 					sizeof(c2->error_data.sense_data_buff);
2354c349775eSScott Teel 			memcpy(cmd->sense_buffer,
2355c349775eSScott Teel 				c2->error_data.sense_data_buff, data_len);
2356a09c1441SScott Teel 			retry = 1;
2357c349775eSScott Teel 			break;
2358c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2359a09c1441SScott Teel 			retry = 1;
2360c349775eSScott Teel 			break;
2361c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2362a09c1441SScott Teel 			retry = 1;
2363c349775eSScott Teel 			break;
2364c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
23654a8da22bSStephen Cameron 			retry = 1;
2366c349775eSScott Teel 			break;
2367c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2368a09c1441SScott Teel 			retry = 1;
2369c349775eSScott Teel 			break;
2370c349775eSScott Teel 		default:
2371a09c1441SScott Teel 			retry = 1;
2372c349775eSScott Teel 			break;
2373c349775eSScott Teel 		}
2374c349775eSScott Teel 		break;
2375c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2376c40820d5SJoe Handzik 		switch (c2->error_data.status) {
2377c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ERROR:
2378c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2379c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_OVERRUN:
2380c40820d5SJoe Handzik 			retry = 1;
2381c40820d5SJoe Handzik 			break;
2382c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_UNDERRUN:
2383c40820d5SJoe Handzik 			cmd->result = (DID_OK << 16);		/* host byte */
2384c40820d5SJoe Handzik 			cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2385c40820d5SJoe Handzik 			ioaccel2_resid = get_unaligned_le32(
2386c40820d5SJoe Handzik 						&c2->error_data.resid_cnt[0]);
2387c40820d5SJoe Handzik 			scsi_set_resid(cmd, ioaccel2_resid);
2388c40820d5SJoe Handzik 			break;
2389c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2390c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2391c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2392ba74fdc4SDon Brace 			/*
2393ba74fdc4SDon Brace 			 * Did an HBA disk disappear? We will eventually
2394ba74fdc4SDon Brace 			 * get a state change event from the controller but
2395ba74fdc4SDon Brace 			 * in the meantime, we need to tell the OS that the
2396ba74fdc4SDon Brace 			 * HBA disk is no longer there and stop I/O
2397ba74fdc4SDon Brace 			 * from going down. This allows the potential re-insert
2398ba74fdc4SDon Brace 			 * of the disk to get the same device node.
2399ba74fdc4SDon Brace 			 */
2400ba74fdc4SDon Brace 			if (dev->physical_device && dev->expose_device) {
2401ba74fdc4SDon Brace 				cmd->result = DID_NO_CONNECT << 16;
2402ba74fdc4SDon Brace 				dev->removed = 1;
2403ba74fdc4SDon Brace 				h->drv_req_rescan = 1;
2404ba74fdc4SDon Brace 				dev_warn(&h->pdev->dev,
2405ba74fdc4SDon Brace 					"%s: device is gone!\n", __func__);
2406ba74fdc4SDon Brace 			} else
2407ba74fdc4SDon Brace 				/*
2408ba74fdc4SDon Brace 				 * Retry by sending down the RAID path.
2409ba74fdc4SDon Brace 				 * We will get an event from ctlr to
2410ba74fdc4SDon Brace 				 * trigger rescan regardless.
2411ba74fdc4SDon Brace 				 */
2412c40820d5SJoe Handzik 				retry = 1;
2413c40820d5SJoe Handzik 			break;
2414c40820d5SJoe Handzik 		default:
2415c40820d5SJoe Handzik 			retry = 1;
2416c40820d5SJoe Handzik 		}
2417c349775eSScott Teel 		break;
2418c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2419c349775eSScott Teel 		break;
2420c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2421c349775eSScott Teel 		break;
2422c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2423a09c1441SScott Teel 		retry = 1;
2424c349775eSScott Teel 		break;
2425c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2426c349775eSScott Teel 		break;
2427c349775eSScott Teel 	default:
2428a09c1441SScott Teel 		retry = 1;
2429c349775eSScott Teel 		break;
2430c349775eSScott Teel 	}
2431a09c1441SScott Teel 
2432c5dfd106SDon Brace 	if (dev->in_reset)
2433c5dfd106SDon Brace 		retry = 0;
2434c5dfd106SDon Brace 
2435a09c1441SScott Teel 	return retry;	/* retry on raid path? */
2436c349775eSScott Teel }
2437c349775eSScott Teel 
2438a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2439a58e7e53SWebb Scales 		struct CommandList *c)
2440a58e7e53SWebb Scales {
2441c5dfd106SDon Brace 	struct hpsa_scsi_dev_t *dev = c->device;
2442d604f533SWebb Scales 
2443a58e7e53SWebb Scales 	/*
244408ec46f6SDon Brace 	 * Reset c->scsi_cmd here so that the reset handler will know
2445d604f533SWebb Scales 	 * this command has completed.  Then, check to see if the handler is
2446a58e7e53SWebb Scales 	 * waiting for this command, and, if so, wake it.
2447a58e7e53SWebb Scales 	 */
2448a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
2449d604f533SWebb Scales 	mb();	/* Declare command idle before checking for pending events. */
2450c5dfd106SDon Brace 	if (dev) {
2451c5dfd106SDon Brace 		atomic_dec(&dev->commands_outstanding);
2452c5dfd106SDon Brace 		if (dev->in_reset &&
2453c5dfd106SDon Brace 			atomic_read(&dev->commands_outstanding) <= 0)
2454d604f533SWebb Scales 			wake_up_all(&h->event_sync_wait_queue);
2455a58e7e53SWebb Scales 	}
2456c5dfd106SDon Brace }
2457a58e7e53SWebb Scales 
245873153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
245973153fe5SWebb Scales 				      struct CommandList *c)
246073153fe5SWebb Scales {
246173153fe5SWebb Scales 	hpsa_cmd_resolve_events(h, c);
246273153fe5SWebb Scales 	cmd_tagged_free(h, c);
246373153fe5SWebb Scales }
246473153fe5SWebb Scales 
24658a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h,
24668a0ff92cSWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd)
24678a0ff92cSWebb Scales {
246873153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2469d49c2077SDon Brace 	if (cmd && cmd->scsi_done)
24708a0ff92cSWebb Scales 		cmd->scsi_done(cmd);
24718a0ff92cSWebb Scales }
24728a0ff92cSWebb Scales 
24738a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
24748a0ff92cSWebb Scales {
24758a0ff92cSWebb Scales 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
24768a0ff92cSWebb Scales 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
24778a0ff92cSWebb Scales }
24788a0ff92cSWebb Scales 
2479c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h,
2480c349775eSScott Teel 		struct CommandList *c, struct scsi_cmnd *cmd,
2481c349775eSScott Teel 		struct hpsa_scsi_dev_t *dev)
2482c349775eSScott Teel {
2483c349775eSScott Teel 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2484c349775eSScott Teel 
2485c349775eSScott Teel 	/* check for good status */
2486c349775eSScott Teel 	if (likely(c2->error_data.serv_response == 0 &&
2487eeebce18SDon Brace 			c2->error_data.status == 0)) {
2488eeebce18SDon Brace 		cmd->result = 0;
24898a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, c, cmd);
2490eeebce18SDon Brace 	}
2491c349775eSScott Teel 
24928a0ff92cSWebb Scales 	/*
24938a0ff92cSWebb Scales 	 * Any RAID offload error results in retry which will use
2494b2582a65SDon Brace 	 * the normal I/O path so the controller can handle whatever is
2495c349775eSScott Teel 	 * wrong.
2496c349775eSScott Teel 	 */
2497f3f01730SKevin Barnett 	if (is_logical_device(dev) &&
2498c349775eSScott Teel 		c2->error_data.serv_response ==
2499c349775eSScott Teel 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2500080ef1ccSDon Brace 		if (c2->error_data.status ==
2501064d1b1dSDon Brace 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2502c349775eSScott Teel 			dev->offload_enabled = 0;
2503064d1b1dSDon Brace 			dev->offload_to_be_enabled = 0;
2504064d1b1dSDon Brace 		}
25058a0ff92cSWebb Scales 
2506c5dfd106SDon Brace 		if (dev->in_reset) {
2507c5dfd106SDon Brace 			cmd->result = DID_RESET << 16;
2508c5dfd106SDon Brace 			return hpsa_cmd_free_and_done(h, c, cmd);
2509c5dfd106SDon Brace 		}
2510c5dfd106SDon Brace 
25118a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2512080ef1ccSDon Brace 	}
2513080ef1ccSDon Brace 
2514ba74fdc4SDon Brace 	if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
25158a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2516080ef1ccSDon Brace 
25178a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, c, cmd);
2518c349775eSScott Teel }
2519c349775eSScott Teel 
25209437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */
25219437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
25229437ac43SStephen Cameron 					struct CommandList *cp)
25239437ac43SStephen Cameron {
25249437ac43SStephen Cameron 	u8 tmf_status = cp->err_info->ScsiStatus;
25259437ac43SStephen Cameron 
25269437ac43SStephen Cameron 	switch (tmf_status) {
25279437ac43SStephen Cameron 	case CISS_TMF_COMPLETE:
25289437ac43SStephen Cameron 		/*
25299437ac43SStephen Cameron 		 * CISS_TMF_COMPLETE never happens, instead,
25309437ac43SStephen Cameron 		 * ei->CommandStatus == 0 for this case.
25319437ac43SStephen Cameron 		 */
25329437ac43SStephen Cameron 	case CISS_TMF_SUCCESS:
25339437ac43SStephen Cameron 		return 0;
25349437ac43SStephen Cameron 	case CISS_TMF_INVALID_FRAME:
25359437ac43SStephen Cameron 	case CISS_TMF_NOT_SUPPORTED:
25369437ac43SStephen Cameron 	case CISS_TMF_FAILED:
25379437ac43SStephen Cameron 	case CISS_TMF_WRONG_LUN:
25389437ac43SStephen Cameron 	case CISS_TMF_OVERLAPPED_TAG:
25399437ac43SStephen Cameron 		break;
25409437ac43SStephen Cameron 	default:
25419437ac43SStephen Cameron 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
25429437ac43SStephen Cameron 				tmf_status);
25439437ac43SStephen Cameron 		break;
25449437ac43SStephen Cameron 	}
25459437ac43SStephen Cameron 	return -tmf_status;
25469437ac43SStephen Cameron }
25479437ac43SStephen Cameron 
25481fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp)
2549edd16368SStephen M. Cameron {
2550edd16368SStephen M. Cameron 	struct scsi_cmnd *cmd;
2551edd16368SStephen M. Cameron 	struct ctlr_info *h;
2552edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2553283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
2554d9a729f3SWebb Scales 	struct io_accel2_cmd *c2;
2555edd16368SStephen M. Cameron 
25569437ac43SStephen Cameron 	u8 sense_key;
25579437ac43SStephen Cameron 	u8 asc;      /* additional sense code */
25589437ac43SStephen Cameron 	u8 ascq;     /* additional sense code qualifier */
2559db111e18SStephen M. Cameron 	unsigned long sense_data_size;
2560edd16368SStephen M. Cameron 
2561edd16368SStephen M. Cameron 	ei = cp->err_info;
25627fa3030cSStephen Cameron 	cmd = cp->scsi_cmd;
2563edd16368SStephen M. Cameron 	h = cp->h;
2564d49c2077SDon Brace 
2565d49c2077SDon Brace 	if (!cmd->device) {
2566d49c2077SDon Brace 		cmd->result = DID_NO_CONNECT << 16;
2567d49c2077SDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
2568d49c2077SDon Brace 	}
2569d49c2077SDon Brace 
2570283b4a9bSStephen M. Cameron 	dev = cmd->device->hostdata;
257145e596cdSDon Brace 	if (!dev) {
257245e596cdSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
257345e596cdSDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
257445e596cdSDon Brace 	}
2575d9a729f3SWebb Scales 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2576edd16368SStephen M. Cameron 
2577edd16368SStephen M. Cameron 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2578e1f7de0cSMatt Gates 	if ((cp->cmd_type == CMD_SCSI) &&
25792b08b3e9SDon Brace 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
258033a2ffceSStephen M. Cameron 		hpsa_unmap_sg_chain_block(h, cp);
2581edd16368SStephen M. Cameron 
2582d9a729f3SWebb Scales 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2583d9a729f3SWebb Scales 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2584d9a729f3SWebb Scales 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2585d9a729f3SWebb Scales 
2586edd16368SStephen M. Cameron 	cmd->result = (DID_OK << 16); 		/* host byte */
2587edd16368SStephen M. Cameron 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2588c349775eSScott Teel 
25899e33f0d5SDon Brace 	/* SCSI command has already been cleaned up in SML */
25909e33f0d5SDon Brace 	if (dev->was_removed) {
25919e33f0d5SDon Brace 		hpsa_cmd_resolve_and_free(h, cp);
25929e33f0d5SDon Brace 		return;
25939e33f0d5SDon Brace 	}
25949e33f0d5SDon Brace 
2595d49c2077SDon Brace 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2596d49c2077SDon Brace 		if (dev->physical_device && dev->expose_device &&
2597d49c2077SDon Brace 			dev->removed) {
2598d49c2077SDon Brace 			cmd->result = DID_NO_CONNECT << 16;
2599d49c2077SDon Brace 			return hpsa_cmd_free_and_done(h, cp, cmd);
2600d49c2077SDon Brace 		}
2601d49c2077SDon Brace 		if (likely(cp->phys_disk != NULL))
260203383736SDon Brace 			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2603d49c2077SDon Brace 	}
260403383736SDon Brace 
260525163bd5SWebb Scales 	/*
260625163bd5SWebb Scales 	 * We check for lockup status here as it may be set for
260725163bd5SWebb Scales 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
260825163bd5SWebb Scales 	 * fail_all_oustanding_cmds()
260925163bd5SWebb Scales 	 */
261025163bd5SWebb Scales 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
261125163bd5SWebb Scales 		/* DID_NO_CONNECT will prevent a retry */
261225163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
26138a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
261425163bd5SWebb Scales 	}
261525163bd5SWebb Scales 
2616c349775eSScott Teel 	if (cp->cmd_type == CMD_IOACCEL2)
2617c349775eSScott Teel 		return process_ioaccel2_completion(h, cp, cmd, dev);
2618c349775eSScott Teel 
26196aa4c361SRobert Elliott 	scsi_set_resid(cmd, ei->ResidualCnt);
26208a0ff92cSWebb Scales 	if (ei->CommandStatus == 0)
26218a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
26226aa4c361SRobert Elliott 
2623e1f7de0cSMatt Gates 	/* For I/O accelerator commands, copy over some fields to the normal
2624e1f7de0cSMatt Gates 	 * CISS header used below for error handling.
2625e1f7de0cSMatt Gates 	 */
2626e1f7de0cSMatt Gates 	if (cp->cmd_type == CMD_IOACCEL1) {
2627e1f7de0cSMatt Gates 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
26282b08b3e9SDon Brace 		cp->Header.SGList = scsi_sg_count(cmd);
26292b08b3e9SDon Brace 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
26302b08b3e9SDon Brace 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
26312b08b3e9SDon Brace 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
263250a0decfSStephen M. Cameron 		cp->Header.tag = c->tag;
2633e1f7de0cSMatt Gates 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2634e1f7de0cSMatt Gates 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2635283b4a9bSStephen M. Cameron 
2636283b4a9bSStephen M. Cameron 		/* Any RAID offload error results in retry which will use
2637283b4a9bSStephen M. Cameron 		 * the normal I/O path so the controller can handle whatever's
2638283b4a9bSStephen M. Cameron 		 * wrong.
2639283b4a9bSStephen M. Cameron 		 */
2640f3f01730SKevin Barnett 		if (is_logical_device(dev)) {
2641283b4a9bSStephen M. Cameron 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2642283b4a9bSStephen M. Cameron 				dev->offload_enabled = 0;
26438a0ff92cSWebb Scales 			return hpsa_retry_cmd(h, cp);
2644283b4a9bSStephen M. Cameron 		}
2645e1f7de0cSMatt Gates 	}
2646e1f7de0cSMatt Gates 
2647edd16368SStephen M. Cameron 	/* an error has occurred */
2648edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2649edd16368SStephen M. Cameron 
2650edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
26519437ac43SStephen Cameron 		cmd->result |= ei->ScsiStatus;
26529437ac43SStephen Cameron 		/* copy the sense data */
26539437ac43SStephen Cameron 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
26549437ac43SStephen Cameron 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
26559437ac43SStephen Cameron 		else
26569437ac43SStephen Cameron 			sense_data_size = sizeof(ei->SenseInfo);
26579437ac43SStephen Cameron 		if (ei->SenseLen < sense_data_size)
26589437ac43SStephen Cameron 			sense_data_size = ei->SenseLen;
26599437ac43SStephen Cameron 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
26609437ac43SStephen Cameron 		if (ei->ScsiStatus)
26619437ac43SStephen Cameron 			decode_sense_data(ei->SenseInfo, sense_data_size,
26629437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
2663edd16368SStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
266449ea45cbSDon Brace 			switch (sense_key) {
266549ea45cbSDon Brace 			case ABORTED_COMMAND:
26662e311fbaSStephen M. Cameron 				cmd->result |= DID_SOFT_ERROR << 16;
26671d3b3609SMatt Gates 				break;
266849ea45cbSDon Brace 			case UNIT_ATTENTION:
266949ea45cbSDon Brace 				if (asc == 0x3F && ascq == 0x0E)
267049ea45cbSDon Brace 					h->drv_req_rescan = 1;
267149ea45cbSDon Brace 				break;
267249ea45cbSDon Brace 			case ILLEGAL_REQUEST:
267349ea45cbSDon Brace 				if (asc == 0x25 && ascq == 0x00) {
267449ea45cbSDon Brace 					dev->removed = 1;
267549ea45cbSDon Brace 					cmd->result = DID_NO_CONNECT << 16;
267649ea45cbSDon Brace 				}
267749ea45cbSDon Brace 				break;
26781d3b3609SMatt Gates 			}
2679edd16368SStephen M. Cameron 			break;
2680edd16368SStephen M. Cameron 		}
2681edd16368SStephen M. Cameron 		/* Problem was not a check condition
2682edd16368SStephen M. Cameron 		 * Pass it up to the upper layers...
2683edd16368SStephen M. Cameron 		 */
2684edd16368SStephen M. Cameron 		if (ei->ScsiStatus) {
2685edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2686edd16368SStephen M. Cameron 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2687edd16368SStephen M. Cameron 				"Returning result: 0x%x\n",
2688edd16368SStephen M. Cameron 				cp, ei->ScsiStatus,
2689edd16368SStephen M. Cameron 				sense_key, asc, ascq,
2690edd16368SStephen M. Cameron 				cmd->result);
2691edd16368SStephen M. Cameron 		} else {  /* scsi status is zero??? How??? */
2692edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2693edd16368SStephen M. Cameron 				"Returning no connection.\n", cp),
2694edd16368SStephen M. Cameron 
2695edd16368SStephen M. Cameron 			/* Ordinarily, this case should never happen,
2696edd16368SStephen M. Cameron 			 * but there is a bug in some released firmware
2697edd16368SStephen M. Cameron 			 * revisions that allows it to happen if, for
2698edd16368SStephen M. Cameron 			 * example, a 4100 backplane loses power and
2699edd16368SStephen M. Cameron 			 * the tape drive is in it.  We assume that
2700edd16368SStephen M. Cameron 			 * it's a fatal error of some kind because we
2701edd16368SStephen M. Cameron 			 * can't show that it wasn't. We will make it
2702edd16368SStephen M. Cameron 			 * look like selection timeout since that is
2703edd16368SStephen M. Cameron 			 * the most common reason for this to occur,
2704edd16368SStephen M. Cameron 			 * and it's severe enough.
2705edd16368SStephen M. Cameron 			 */
2706edd16368SStephen M. Cameron 
2707edd16368SStephen M. Cameron 			cmd->result = DID_NO_CONNECT << 16;
2708edd16368SStephen M. Cameron 		}
2709edd16368SStephen M. Cameron 		break;
2710edd16368SStephen M. Cameron 
2711edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2712edd16368SStephen M. Cameron 		break;
2713edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2714f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev,
2715f42e81e1SStephen Cameron 			"CDB %16phN data overrun\n", cp->Request.CDB);
2716edd16368SStephen M. Cameron 		break;
2717edd16368SStephen M. Cameron 	case CMD_INVALID: {
2718edd16368SStephen M. Cameron 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2719edd16368SStephen M. Cameron 		print_cmd(cp); */
2720edd16368SStephen M. Cameron 		/* We get CMD_INVALID if you address a non-existent device
2721edd16368SStephen M. Cameron 		 * instead of a selection timeout (no response).  You will
2722edd16368SStephen M. Cameron 		 * see this if you yank out a drive, then try to access it.
2723edd16368SStephen M. Cameron 		 * This is kind of a shame because it means that any other
2724edd16368SStephen M. Cameron 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2725edd16368SStephen M. Cameron 		 * missing target. */
2726edd16368SStephen M. Cameron 		cmd->result = DID_NO_CONNECT << 16;
2727edd16368SStephen M. Cameron 	}
2728edd16368SStephen M. Cameron 		break;
2729edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2730256d0eaaSStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2731f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2732f42e81e1SStephen Cameron 				cp->Request.CDB);
2733edd16368SStephen M. Cameron 		break;
2734edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2735edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2736f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2737f42e81e1SStephen Cameron 			cp->Request.CDB);
2738edd16368SStephen M. Cameron 		break;
2739edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2740edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2741f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2742f42e81e1SStephen Cameron 			cp->Request.CDB);
2743edd16368SStephen M. Cameron 		break;
2744edd16368SStephen M. Cameron 	case CMD_ABORTED:
274508ec46f6SDon Brace 		cmd->result = DID_ABORT << 16;
274608ec46f6SDon Brace 		break;
2747edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2748edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2749f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2750f42e81e1SStephen Cameron 			cp->Request.CDB);
2751edd16368SStephen M. Cameron 		break;
2752edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2753f6e76055SStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2754f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2755f42e81e1SStephen Cameron 			cp->Request.CDB);
2756edd16368SStephen M. Cameron 		break;
2757edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2758edd16368SStephen M. Cameron 		cmd->result = DID_TIME_OUT << 16;
2759f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2760f42e81e1SStephen Cameron 			cp->Request.CDB);
2761edd16368SStephen M. Cameron 		break;
27621d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
27631d5e2ed0SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
27641d5e2ed0SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Command unabortable\n");
27651d5e2ed0SStephen M. Cameron 		break;
27669437ac43SStephen Cameron 	case CMD_TMF_STATUS:
27679437ac43SStephen Cameron 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
27689437ac43SStephen Cameron 			cmd->result = DID_ERROR << 16;
27699437ac43SStephen Cameron 		break;
2770283b4a9bSStephen M. Cameron 	case CMD_IOACCEL_DISABLED:
2771283b4a9bSStephen M. Cameron 		/* This only handles the direct pass-through case since RAID
2772283b4a9bSStephen M. Cameron 		 * offload is handled above.  Just attempt a retry.
2773283b4a9bSStephen M. Cameron 		 */
2774283b4a9bSStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16;
2775283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev,
2776283b4a9bSStephen M. Cameron 				"cp %p had HP SSD Smart Path error\n", cp);
2777283b4a9bSStephen M. Cameron 		break;
2778edd16368SStephen M. Cameron 	default:
2779edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2780edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2781edd16368SStephen M. Cameron 				cp, ei->CommandStatus);
2782edd16368SStephen M. Cameron 	}
27838a0ff92cSWebb Scales 
27848a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, cp, cmd);
2785edd16368SStephen M. Cameron }
2786edd16368SStephen M. Cameron 
27878bc8f47eSChristoph Hellwig static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
27888bc8f47eSChristoph Hellwig 		int sg_used, enum dma_data_direction data_direction)
2789edd16368SStephen M. Cameron {
2790edd16368SStephen M. Cameron 	int i;
2791edd16368SStephen M. Cameron 
279250a0decfSStephen M. Cameron 	for (i = 0; i < sg_used; i++)
27938bc8f47eSChristoph Hellwig 		dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
279450a0decfSStephen M. Cameron 				le32_to_cpu(c->SG[i].Len),
2795edd16368SStephen M. Cameron 				data_direction);
2796edd16368SStephen M. Cameron }
2797edd16368SStephen M. Cameron 
2798a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev,
2799edd16368SStephen M. Cameron 		struct CommandList *cp,
2800edd16368SStephen M. Cameron 		unsigned char *buf,
2801edd16368SStephen M. Cameron 		size_t buflen,
28028bc8f47eSChristoph Hellwig 		enum dma_data_direction data_direction)
2803edd16368SStephen M. Cameron {
280401a02ffcSStephen M. Cameron 	u64 addr64;
2805edd16368SStephen M. Cameron 
28068bc8f47eSChristoph Hellwig 	if (buflen == 0 || data_direction == DMA_NONE) {
2807edd16368SStephen M. Cameron 		cp->Header.SGList = 0;
280850a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2809a2dac136SStephen M. Cameron 		return 0;
2810edd16368SStephen M. Cameron 	}
2811edd16368SStephen M. Cameron 
28128bc8f47eSChristoph Hellwig 	addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2813eceaae18SShuah Khan 	if (dma_mapping_error(&pdev->dev, addr64)) {
2814a2dac136SStephen M. Cameron 		/* Prevent subsequent unmap of something never mapped */
2815eceaae18SShuah Khan 		cp->Header.SGList = 0;
281650a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2817a2dac136SStephen M. Cameron 		return -1;
2818eceaae18SShuah Khan 	}
281950a0decfSStephen M. Cameron 	cp->SG[0].Addr = cpu_to_le64(addr64);
282050a0decfSStephen M. Cameron 	cp->SG[0].Len = cpu_to_le32(buflen);
282150a0decfSStephen M. Cameron 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
282250a0decfSStephen M. Cameron 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
282350a0decfSStephen M. Cameron 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2824a2dac136SStephen M. Cameron 	return 0;
2825edd16368SStephen M. Cameron }
2826edd16368SStephen M. Cameron 
282725163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1)
282825163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */
282925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
283025163bd5SWebb Scales 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2831edd16368SStephen M. Cameron {
2832edd16368SStephen M. Cameron 	DECLARE_COMPLETION_ONSTACK(wait);
2833edd16368SStephen M. Cameron 
2834edd16368SStephen M. Cameron 	c->waiting = &wait;
283525163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, reply_queue);
283625163bd5SWebb Scales 	if (timeout_msecs == NO_TIMEOUT) {
283725163bd5SWebb Scales 		/* TODO: get rid of this no-timeout thing */
283825163bd5SWebb Scales 		wait_for_completion_io(&wait);
283925163bd5SWebb Scales 		return IO_OK;
284025163bd5SWebb Scales 	}
284125163bd5SWebb Scales 	if (!wait_for_completion_io_timeout(&wait,
284225163bd5SWebb Scales 					msecs_to_jiffies(timeout_msecs))) {
284325163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Command timed out.\n");
284425163bd5SWebb Scales 		return -ETIMEDOUT;
284525163bd5SWebb Scales 	}
284625163bd5SWebb Scales 	return IO_OK;
284725163bd5SWebb Scales }
284825163bd5SWebb Scales 
284925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
285025163bd5SWebb Scales 				   int reply_queue, unsigned long timeout_msecs)
285125163bd5SWebb Scales {
285225163bd5SWebb Scales 	if (unlikely(lockup_detected(h))) {
285325163bd5SWebb Scales 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
285425163bd5SWebb Scales 		return IO_OK;
285525163bd5SWebb Scales 	}
285625163bd5SWebb Scales 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2857edd16368SStephen M. Cameron }
2858edd16368SStephen M. Cameron 
2859094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h)
2860094963daSStephen M. Cameron {
2861094963daSStephen M. Cameron 	int cpu;
2862094963daSStephen M. Cameron 	u32 rc, *lockup_detected;
2863094963daSStephen M. Cameron 
2864094963daSStephen M. Cameron 	cpu = get_cpu();
2865094963daSStephen M. Cameron 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2866094963daSStephen M. Cameron 	rc = *lockup_detected;
2867094963daSStephen M. Cameron 	put_cpu();
2868094963daSStephen M. Cameron 	return rc;
2869094963daSStephen M. Cameron }
2870094963daSStephen M. Cameron 
28719c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25
287225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
28738bc8f47eSChristoph Hellwig 		struct CommandList *c, enum dma_data_direction data_direction,
28748bc8f47eSChristoph Hellwig 		unsigned long timeout_msecs)
2875edd16368SStephen M. Cameron {
28769c2fc160SStephen M. Cameron 	int backoff_time = 10, retry_count = 0;
287725163bd5SWebb Scales 	int rc;
2878edd16368SStephen M. Cameron 
2879edd16368SStephen M. Cameron 	do {
28807630abd0SJoe Perches 		memset(c->err_info, 0, sizeof(*c->err_info));
288125163bd5SWebb Scales 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
288225163bd5SWebb Scales 						  timeout_msecs);
288325163bd5SWebb Scales 		if (rc)
288425163bd5SWebb Scales 			break;
2885edd16368SStephen M. Cameron 		retry_count++;
28869c2fc160SStephen M. Cameron 		if (retry_count > 3) {
28879c2fc160SStephen M. Cameron 			msleep(backoff_time);
28889c2fc160SStephen M. Cameron 			if (backoff_time < 1000)
28899c2fc160SStephen M. Cameron 				backoff_time *= 2;
28909c2fc160SStephen M. Cameron 		}
2891852af20aSMatt Bondurant 	} while ((check_for_unit_attention(h, c) ||
28929c2fc160SStephen M. Cameron 			check_for_busy(h, c)) &&
28939c2fc160SStephen M. Cameron 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2894edd16368SStephen M. Cameron 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
289525163bd5SWebb Scales 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
289625163bd5SWebb Scales 		rc = -EIO;
289725163bd5SWebb Scales 	return rc;
2898edd16368SStephen M. Cameron }
2899edd16368SStephen M. Cameron 
2900d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2901d1e8beacSStephen M. Cameron 				struct CommandList *c)
2902edd16368SStephen M. Cameron {
2903d1e8beacSStephen M. Cameron 	const u8 *cdb = c->Request.CDB;
2904d1e8beacSStephen M. Cameron 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2905edd16368SStephen M. Cameron 
2906609a70dfSRasmus Villemoes 	dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2907609a70dfSRasmus Villemoes 		 txt, lun, cdb);
2908d1e8beacSStephen M. Cameron }
2909d1e8beacSStephen M. Cameron 
2910d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2911d1e8beacSStephen M. Cameron 			struct CommandList *cp)
2912d1e8beacSStephen M. Cameron {
2913d1e8beacSStephen M. Cameron 	const struct ErrorInfo *ei = cp->err_info;
2914d1e8beacSStephen M. Cameron 	struct device *d = &cp->h->pdev->dev;
29159437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
29169437ac43SStephen Cameron 	int sense_len;
2917d1e8beacSStephen M. Cameron 
2918edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2919edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
29209437ac43SStephen Cameron 		if (ei->SenseLen > sizeof(ei->SenseInfo))
29219437ac43SStephen Cameron 			sense_len = sizeof(ei->SenseInfo);
29229437ac43SStephen Cameron 		else
29239437ac43SStephen Cameron 			sense_len = ei->SenseLen;
29249437ac43SStephen Cameron 		decode_sense_data(ei->SenseInfo, sense_len,
29259437ac43SStephen Cameron 					&sense_key, &asc, &ascq);
2926d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "SCSI status", cp);
2927d1e8beacSStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
29289437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
29299437ac43SStephen Cameron 				sense_key, asc, ascq);
2930d1e8beacSStephen M. Cameron 		else
29319437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2932edd16368SStephen M. Cameron 		if (ei->ScsiStatus == 0)
2933edd16368SStephen M. Cameron 			dev_warn(d, "SCSI status is abnormally zero.  "
2934edd16368SStephen M. Cameron 			"(probably indicates selection timeout "
2935edd16368SStephen M. Cameron 			"reported incorrectly due to a known "
2936edd16368SStephen M. Cameron 			"firmware bug, circa July, 2001.)\n");
2937edd16368SStephen M. Cameron 		break;
2938edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2939edd16368SStephen M. Cameron 		break;
2940edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2941d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "overrun condition", cp);
2942edd16368SStephen M. Cameron 		break;
2943edd16368SStephen M. Cameron 	case CMD_INVALID: {
2944edd16368SStephen M. Cameron 		/* controller unfortunately reports SCSI passthru's
2945edd16368SStephen M. Cameron 		 * to non-existent targets as invalid commands.
2946edd16368SStephen M. Cameron 		 */
2947d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "invalid command", cp);
2948d1e8beacSStephen M. Cameron 		dev_warn(d, "probably means device no longer present\n");
2949edd16368SStephen M. Cameron 		}
2950edd16368SStephen M. Cameron 		break;
2951edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2952d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "protocol error", cp);
2953edd16368SStephen M. Cameron 		break;
2954edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2955d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "hardware error", cp);
2956edd16368SStephen M. Cameron 		break;
2957edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2958d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "connection lost", cp);
2959edd16368SStephen M. Cameron 		break;
2960edd16368SStephen M. Cameron 	case CMD_ABORTED:
2961d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "aborted", cp);
2962edd16368SStephen M. Cameron 		break;
2963edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2964d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "abort failed", cp);
2965edd16368SStephen M. Cameron 		break;
2966edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2967d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unsolicited abort", cp);
2968edd16368SStephen M. Cameron 		break;
2969edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2970d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "timed out", cp);
2971edd16368SStephen M. Cameron 		break;
29721d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
2973d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unabortable", cp);
29741d5e2ed0SStephen M. Cameron 		break;
297525163bd5SWebb Scales 	case CMD_CTLR_LOCKUP:
297625163bd5SWebb Scales 		hpsa_print_cmd(h, "controller lockup detected", cp);
297725163bd5SWebb Scales 		break;
2978edd16368SStephen M. Cameron 	default:
2979d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unknown status", cp);
2980d1e8beacSStephen M. Cameron 		dev_warn(d, "Unknown command status %x\n",
2981edd16368SStephen M. Cameron 				ei->CommandStatus);
2982edd16368SStephen M. Cameron 	}
2983edd16368SStephen M. Cameron }
2984edd16368SStephen M. Cameron 
29850a7c3bb8SDon Brace static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
29860a7c3bb8SDon Brace 					u8 page, u8 *buf, size_t bufsize)
29870a7c3bb8SDon Brace {
29880a7c3bb8SDon Brace 	int rc = IO_OK;
29890a7c3bb8SDon Brace 	struct CommandList *c;
29900a7c3bb8SDon Brace 	struct ErrorInfo *ei;
29910a7c3bb8SDon Brace 
29920a7c3bb8SDon Brace 	c = cmd_alloc(h);
29930a7c3bb8SDon Brace 	if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
29940a7c3bb8SDon Brace 			page, scsi3addr, TYPE_CMD)) {
29950a7c3bb8SDon Brace 		rc = -1;
29960a7c3bb8SDon Brace 		goto out;
29970a7c3bb8SDon Brace 	}
29988bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
29998bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
30000a7c3bb8SDon Brace 	if (rc)
30010a7c3bb8SDon Brace 		goto out;
30020a7c3bb8SDon Brace 	ei = c->err_info;
30030a7c3bb8SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
30040a7c3bb8SDon Brace 		hpsa_scsi_interpret_error(h, c);
30050a7c3bb8SDon Brace 		rc = -1;
30060a7c3bb8SDon Brace 	}
30070a7c3bb8SDon Brace out:
30080a7c3bb8SDon Brace 	cmd_free(h, c);
30090a7c3bb8SDon Brace 	return rc;
30100a7c3bb8SDon Brace }
30110a7c3bb8SDon Brace 
30120a7c3bb8SDon Brace static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
30130a7c3bb8SDon Brace 						u8 *scsi3addr)
30140a7c3bb8SDon Brace {
30150a7c3bb8SDon Brace 	u8 *buf;
30160a7c3bb8SDon Brace 	u64 sa = 0;
30170a7c3bb8SDon Brace 	int rc = 0;
30180a7c3bb8SDon Brace 
30190a7c3bb8SDon Brace 	buf = kzalloc(1024, GFP_KERNEL);
30200a7c3bb8SDon Brace 	if (!buf)
30210a7c3bb8SDon Brace 		return 0;
30220a7c3bb8SDon Brace 
30230a7c3bb8SDon Brace 	rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
30240a7c3bb8SDon Brace 					buf, 1024);
30250a7c3bb8SDon Brace 
30260a7c3bb8SDon Brace 	if (rc)
30270a7c3bb8SDon Brace 		goto out;
30280a7c3bb8SDon Brace 
30290a7c3bb8SDon Brace 	sa = get_unaligned_be64(buf+12);
30300a7c3bb8SDon Brace 
30310a7c3bb8SDon Brace out:
30320a7c3bb8SDon Brace 	kfree(buf);
30330a7c3bb8SDon Brace 	return sa;
30340a7c3bb8SDon Brace }
30350a7c3bb8SDon Brace 
3036edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3037b7bb24ebSStephen M. Cameron 			u16 page, unsigned char *buf,
3038edd16368SStephen M. Cameron 			unsigned char bufsize)
3039edd16368SStephen M. Cameron {
3040edd16368SStephen M. Cameron 	int rc = IO_OK;
3041edd16368SStephen M. Cameron 	struct CommandList *c;
3042edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3043edd16368SStephen M. Cameron 
304445fcb86eSStephen Cameron 	c = cmd_alloc(h);
3045edd16368SStephen M. Cameron 
3046a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3047a2dac136SStephen M. Cameron 			page, scsi3addr, TYPE_CMD)) {
3048a2dac136SStephen M. Cameron 		rc = -1;
3049a2dac136SStephen M. Cameron 		goto out;
3050a2dac136SStephen M. Cameron 	}
30518bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
30528bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
305325163bd5SWebb Scales 	if (rc)
305425163bd5SWebb Scales 		goto out;
3055edd16368SStephen M. Cameron 	ei = c->err_info;
3056edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3057d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3058edd16368SStephen M. Cameron 		rc = -1;
3059edd16368SStephen M. Cameron 	}
3060a2dac136SStephen M. Cameron out:
306145fcb86eSStephen Cameron 	cmd_free(h, c);
3062edd16368SStephen M. Cameron 	return rc;
3063edd16368SStephen M. Cameron }
3064edd16368SStephen M. Cameron 
3065c5dfd106SDon Brace static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
306625163bd5SWebb Scales 	u8 reset_type, int reply_queue)
3067edd16368SStephen M. Cameron {
3068edd16368SStephen M. Cameron 	int rc = IO_OK;
3069edd16368SStephen M. Cameron 	struct CommandList *c;
3070edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3071edd16368SStephen M. Cameron 
307245fcb86eSStephen Cameron 	c = cmd_alloc(h);
3073c5dfd106SDon Brace 	c->device = dev;
3074edd16368SStephen M. Cameron 
3075a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map. */
3076c5dfd106SDon Brace 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
30772ef28849SDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
307825163bd5SWebb Scales 	if (rc) {
307925163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
308025163bd5SWebb Scales 		goto out;
308125163bd5SWebb Scales 	}
3082edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
3083edd16368SStephen M. Cameron 
3084edd16368SStephen M. Cameron 	ei = c->err_info;
3085edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0) {
3086d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3087edd16368SStephen M. Cameron 		rc = -1;
3088edd16368SStephen M. Cameron 	}
308925163bd5SWebb Scales out:
309045fcb86eSStephen Cameron 	cmd_free(h, c);
3091edd16368SStephen M. Cameron 	return rc;
3092edd16368SStephen M. Cameron }
3093edd16368SStephen M. Cameron 
3094d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3095d604f533SWebb Scales 			       struct hpsa_scsi_dev_t *dev,
3096d604f533SWebb Scales 			       unsigned char *scsi3addr)
3097d604f533SWebb Scales {
3098d604f533SWebb Scales 	int i;
3099d604f533SWebb Scales 	bool match = false;
3100d604f533SWebb Scales 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3101d604f533SWebb Scales 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3102d604f533SWebb Scales 
3103d604f533SWebb Scales 	if (hpsa_is_cmd_idle(c))
3104d604f533SWebb Scales 		return false;
3105d604f533SWebb Scales 
3106d604f533SWebb Scales 	switch (c->cmd_type) {
3107d604f533SWebb Scales 	case CMD_SCSI:
3108d604f533SWebb Scales 	case CMD_IOCTL_PEND:
3109d604f533SWebb Scales 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3110d604f533SWebb Scales 				sizeof(c->Header.LUN.LunAddrBytes));
3111d604f533SWebb Scales 		break;
3112d604f533SWebb Scales 
3113d604f533SWebb Scales 	case CMD_IOACCEL1:
3114d604f533SWebb Scales 	case CMD_IOACCEL2:
3115d604f533SWebb Scales 		if (c->phys_disk == dev) {
3116d604f533SWebb Scales 			/* HBA mode match */
3117d604f533SWebb Scales 			match = true;
3118d604f533SWebb Scales 		} else {
3119d604f533SWebb Scales 			/* Possible RAID mode -- check each phys dev. */
3120d604f533SWebb Scales 			/* FIXME:  Do we need to take out a lock here?  If
3121d604f533SWebb Scales 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3122d604f533SWebb Scales 			 * instead. */
3123d604f533SWebb Scales 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
3124d604f533SWebb Scales 				/* FIXME: an alternate test might be
3125d604f533SWebb Scales 				 *
3126d604f533SWebb Scales 				 * match = dev->phys_disk[i]->ioaccel_handle
3127d604f533SWebb Scales 				 *              == c2->scsi_nexus;      */
3128d604f533SWebb Scales 				match = dev->phys_disk[i] == c->phys_disk;
3129d604f533SWebb Scales 			}
3130d604f533SWebb Scales 		}
3131d604f533SWebb Scales 		break;
3132d604f533SWebb Scales 
3133d604f533SWebb Scales 	case IOACCEL2_TMF:
3134d604f533SWebb Scales 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
3135d604f533SWebb Scales 			match = dev->phys_disk[i]->ioaccel_handle ==
3136d604f533SWebb Scales 					le32_to_cpu(ac->it_nexus);
3137d604f533SWebb Scales 		}
3138d604f533SWebb Scales 		break;
3139d604f533SWebb Scales 
3140d604f533SWebb Scales 	case 0:		/* The command is in the middle of being initialized. */
3141d604f533SWebb Scales 		match = false;
3142d604f533SWebb Scales 		break;
3143d604f533SWebb Scales 
3144d604f533SWebb Scales 	default:
3145d604f533SWebb Scales 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3146d604f533SWebb Scales 			c->cmd_type);
3147d604f533SWebb Scales 		BUG();
3148d604f533SWebb Scales 	}
3149d604f533SWebb Scales 
3150d604f533SWebb Scales 	return match;
3151d604f533SWebb Scales }
3152d604f533SWebb Scales 
3153d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3154c5dfd106SDon Brace 	u8 reset_type, int reply_queue)
3155d604f533SWebb Scales {
3156d604f533SWebb Scales 	int rc = 0;
3157d604f533SWebb Scales 
3158d604f533SWebb Scales 	/* We can really only handle one reset at a time */
3159d604f533SWebb Scales 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3160d604f533SWebb Scales 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3161d604f533SWebb Scales 		return -EINTR;
3162d604f533SWebb Scales 	}
3163d604f533SWebb Scales 
3164c5dfd106SDon Brace 	rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3165c5dfd106SDon Brace 	if (!rc) {
3166c5dfd106SDon Brace 		/* incremented by sending the reset request */
3167c5dfd106SDon Brace 		atomic_dec(&dev->commands_outstanding);
3168d604f533SWebb Scales 		wait_event(h->event_sync_wait_queue,
3169c5dfd106SDon Brace 			atomic_read(&dev->commands_outstanding) <= 0 ||
3170d604f533SWebb Scales 			lockup_detected(h));
3171c5dfd106SDon Brace 	}
3172d604f533SWebb Scales 
3173d604f533SWebb Scales 	if (unlikely(lockup_detected(h))) {
3174d604f533SWebb Scales 		dev_warn(&h->pdev->dev,
3175d604f533SWebb Scales 			 "Controller lockup detected during reset wait\n");
3176d604f533SWebb Scales 		rc = -ENODEV;
3177d604f533SWebb Scales 	}
3178d604f533SWebb Scales 
3179c5dfd106SDon Brace 	if (!rc)
3180c5dfd106SDon Brace 		rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3181d604f533SWebb Scales 
3182d604f533SWebb Scales 	mutex_unlock(&h->reset_mutex);
3183d604f533SWebb Scales 	return rc;
3184d604f533SWebb Scales }
3185d604f533SWebb Scales 
3186edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h,
3187edd16368SStephen M. Cameron 	unsigned char *scsi3addr, unsigned char *raid_level)
3188edd16368SStephen M. Cameron {
3189edd16368SStephen M. Cameron 	int rc;
3190edd16368SStephen M. Cameron 	unsigned char *buf;
3191edd16368SStephen M. Cameron 
3192edd16368SStephen M. Cameron 	*raid_level = RAID_UNKNOWN;
3193edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3194edd16368SStephen M. Cameron 	if (!buf)
3195edd16368SStephen M. Cameron 		return;
31968383278dSScott Teel 
31978383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr,
31988383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY))
31998383278dSScott Teel 		goto exit;
32008383278dSScott Teel 
32018383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
32028383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
32038383278dSScott Teel 
3204edd16368SStephen M. Cameron 	if (rc == 0)
3205edd16368SStephen M. Cameron 		*raid_level = buf[8];
3206edd16368SStephen M. Cameron 	if (*raid_level > RAID_UNKNOWN)
3207edd16368SStephen M. Cameron 		*raid_level = RAID_UNKNOWN;
32088383278dSScott Teel exit:
3209edd16368SStephen M. Cameron 	kfree(buf);
3210edd16368SStephen M. Cameron 	return;
3211edd16368SStephen M. Cameron }
3212edd16368SStephen M. Cameron 
3213283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG
3214283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG
3215283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3216283b4a9bSStephen M. Cameron 				struct raid_map_data *map_buff)
3217283b4a9bSStephen M. Cameron {
3218283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map_buff->data[0];
3219283b4a9bSStephen M. Cameron 	int map, row, col;
3220283b4a9bSStephen M. Cameron 	u16 map_cnt, row_cnt, disks_per_row;
3221283b4a9bSStephen M. Cameron 
3222283b4a9bSStephen M. Cameron 	if (rc != 0)
3223283b4a9bSStephen M. Cameron 		return;
3224283b4a9bSStephen M. Cameron 
32252ba8bfc8SStephen M. Cameron 	/* Show details only if debugging has been activated. */
32262ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug < 2)
32272ba8bfc8SStephen M. Cameron 		return;
32282ba8bfc8SStephen M. Cameron 
3229283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3230283b4a9bSStephen M. Cameron 				le32_to_cpu(map_buff->structure_size));
3231283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3232283b4a9bSStephen M. Cameron 			le32_to_cpu(map_buff->volume_blk_size));
3233283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3234283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->volume_blk_cnt));
3235283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3236283b4a9bSStephen M. Cameron 			map_buff->phys_blk_shift);
3237283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3238283b4a9bSStephen M. Cameron 			map_buff->parity_rotation_shift);
3239283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3240283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->strip_size));
3241283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3242283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_starting_blk));
3243283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3244283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_blk_cnt));
3245283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3246283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->data_disks_per_row));
3247283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3248283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->metadata_disks_per_row));
3249283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3250283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->row_cnt));
3251283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3252283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->layout_map_count));
32532b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3254dd0e19f3SScott Teel 			le16_to_cpu(map_buff->flags));
3255ba82d91bSColin Ian King 	dev_info(&h->pdev->dev, "encryption = %s\n",
32562b08b3e9SDon Brace 			le16_to_cpu(map_buff->flags) &
32572b08b3e9SDon Brace 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3258dd0e19f3SScott Teel 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3259dd0e19f3SScott Teel 			le16_to_cpu(map_buff->dekindex));
3260283b4a9bSStephen M. Cameron 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3261283b4a9bSStephen M. Cameron 	for (map = 0; map < map_cnt; map++) {
3262283b4a9bSStephen M. Cameron 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3263283b4a9bSStephen M. Cameron 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3264283b4a9bSStephen M. Cameron 		for (row = 0; row < row_cnt; row++) {
3265283b4a9bSStephen M. Cameron 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3266283b4a9bSStephen M. Cameron 			disks_per_row =
3267283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->data_disks_per_row);
3268283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3269283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3270283b4a9bSStephen M. Cameron 					"    D%02u: h=0x%04x xor=%u,%u\n",
3271283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3272283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3273283b4a9bSStephen M. Cameron 			disks_per_row =
3274283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->metadata_disks_per_row);
3275283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3276283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3277283b4a9bSStephen M. Cameron 					"    M%02u: h=0x%04x xor=%u,%u\n",
3278283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3279283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3280283b4a9bSStephen M. Cameron 		}
3281283b4a9bSStephen M. Cameron 	}
3282283b4a9bSStephen M. Cameron }
3283283b4a9bSStephen M. Cameron #else
3284283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3285283b4a9bSStephen M. Cameron 			__attribute__((unused)) int rc,
3286283b4a9bSStephen M. Cameron 			__attribute__((unused)) struct raid_map_data *map_buff)
3287283b4a9bSStephen M. Cameron {
3288283b4a9bSStephen M. Cameron }
3289283b4a9bSStephen M. Cameron #endif
3290283b4a9bSStephen M. Cameron 
3291283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h,
3292283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3293283b4a9bSStephen M. Cameron {
3294283b4a9bSStephen M. Cameron 	int rc = 0;
3295283b4a9bSStephen M. Cameron 	struct CommandList *c;
3296283b4a9bSStephen M. Cameron 	struct ErrorInfo *ei;
3297283b4a9bSStephen M. Cameron 
329845fcb86eSStephen Cameron 	c = cmd_alloc(h);
3299bf43caf3SRobert Elliott 
3300283b4a9bSStephen M. Cameron 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3301283b4a9bSStephen M. Cameron 			sizeof(this_device->raid_map), 0,
3302283b4a9bSStephen M. Cameron 			scsi3addr, TYPE_CMD)) {
33032dd02d74SRobert Elliott 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
33042dd02d74SRobert Elliott 		cmd_free(h, c);
33052dd02d74SRobert Elliott 		return -1;
3306283b4a9bSStephen M. Cameron 	}
33078bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33088bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
330925163bd5SWebb Scales 	if (rc)
331025163bd5SWebb Scales 		goto out;
3311283b4a9bSStephen M. Cameron 	ei = c->err_info;
3312283b4a9bSStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3313d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
331425163bd5SWebb Scales 		rc = -1;
331525163bd5SWebb Scales 		goto out;
3316283b4a9bSStephen M. Cameron 	}
331745fcb86eSStephen Cameron 	cmd_free(h, c);
3318283b4a9bSStephen M. Cameron 
3319283b4a9bSStephen M. Cameron 	/* @todo in the future, dynamically allocate RAID map memory */
3320283b4a9bSStephen M. Cameron 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3321283b4a9bSStephen M. Cameron 				sizeof(this_device->raid_map)) {
3322283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3323283b4a9bSStephen M. Cameron 		rc = -1;
3324283b4a9bSStephen M. Cameron 	}
3325283b4a9bSStephen M. Cameron 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3326283b4a9bSStephen M. Cameron 	return rc;
332725163bd5SWebb Scales out:
332825163bd5SWebb Scales 	cmd_free(h, c);
332925163bd5SWebb Scales 	return rc;
3330283b4a9bSStephen M. Cameron }
3331283b4a9bSStephen M. Cameron 
3332d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3333d04e62b9SKevin Barnett 		unsigned char scsi3addr[], u16 bmic_device_index,
3334d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3335d04e62b9SKevin Barnett {
3336d04e62b9SKevin Barnett 	int rc = IO_OK;
3337d04e62b9SKevin Barnett 	struct CommandList *c;
3338d04e62b9SKevin Barnett 	struct ErrorInfo *ei;
3339d04e62b9SKevin Barnett 
3340d04e62b9SKevin Barnett 	c = cmd_alloc(h);
3341d04e62b9SKevin Barnett 
3342d04e62b9SKevin Barnett 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3343d04e62b9SKevin Barnett 		0, RAID_CTLR_LUNID, TYPE_CMD);
3344d04e62b9SKevin Barnett 	if (rc)
3345d04e62b9SKevin Barnett 		goto out;
3346d04e62b9SKevin Barnett 
3347d04e62b9SKevin Barnett 	c->Request.CDB[2] = bmic_device_index & 0xff;
3348d04e62b9SKevin Barnett 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3349d04e62b9SKevin Barnett 
33508bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33518bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
3352d04e62b9SKevin Barnett 	if (rc)
3353d04e62b9SKevin Barnett 		goto out;
3354d04e62b9SKevin Barnett 	ei = c->err_info;
3355d04e62b9SKevin Barnett 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3356d04e62b9SKevin Barnett 		hpsa_scsi_interpret_error(h, c);
3357d04e62b9SKevin Barnett 		rc = -1;
3358d04e62b9SKevin Barnett 	}
3359d04e62b9SKevin Barnett out:
3360d04e62b9SKevin Barnett 	cmd_free(h, c);
3361d04e62b9SKevin Barnett 	return rc;
3362d04e62b9SKevin Barnett }
3363d04e62b9SKevin Barnett 
336466749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h,
336566749d0dSScott Teel 	struct bmic_identify_controller *buf, size_t bufsize)
336666749d0dSScott Teel {
336766749d0dSScott Teel 	int rc = IO_OK;
336866749d0dSScott Teel 	struct CommandList *c;
336966749d0dSScott Teel 	struct ErrorInfo *ei;
337066749d0dSScott Teel 
337166749d0dSScott Teel 	c = cmd_alloc(h);
337266749d0dSScott Teel 
337366749d0dSScott Teel 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
337466749d0dSScott Teel 		0, RAID_CTLR_LUNID, TYPE_CMD);
337566749d0dSScott Teel 	if (rc)
337666749d0dSScott Teel 		goto out;
337766749d0dSScott Teel 
33788bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33798bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
338066749d0dSScott Teel 	if (rc)
338166749d0dSScott Teel 		goto out;
338266749d0dSScott Teel 	ei = c->err_info;
338366749d0dSScott Teel 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
338466749d0dSScott Teel 		hpsa_scsi_interpret_error(h, c);
338566749d0dSScott Teel 		rc = -1;
338666749d0dSScott Teel 	}
338766749d0dSScott Teel out:
338866749d0dSScott Teel 	cmd_free(h, c);
338966749d0dSScott Teel 	return rc;
339066749d0dSScott Teel }
339166749d0dSScott Teel 
339203383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
339303383736SDon Brace 		unsigned char scsi3addr[], u16 bmic_device_index,
339403383736SDon Brace 		struct bmic_identify_physical_device *buf, size_t bufsize)
339503383736SDon Brace {
339603383736SDon Brace 	int rc = IO_OK;
339703383736SDon Brace 	struct CommandList *c;
339803383736SDon Brace 	struct ErrorInfo *ei;
339903383736SDon Brace 
340003383736SDon Brace 	c = cmd_alloc(h);
340103383736SDon Brace 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
340203383736SDon Brace 		0, RAID_CTLR_LUNID, TYPE_CMD);
340303383736SDon Brace 	if (rc)
340403383736SDon Brace 		goto out;
340503383736SDon Brace 
340603383736SDon Brace 	c->Request.CDB[2] = bmic_device_index & 0xff;
340703383736SDon Brace 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
340803383736SDon Brace 
34098bc8f47eSChristoph Hellwig 	hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
34103026ff9bSDon Brace 						NO_TIMEOUT);
341103383736SDon Brace 	ei = c->err_info;
341203383736SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
341303383736SDon Brace 		hpsa_scsi_interpret_error(h, c);
341403383736SDon Brace 		rc = -1;
341503383736SDon Brace 	}
341603383736SDon Brace out:
341703383736SDon Brace 	cmd_free(h, c);
3418d04e62b9SKevin Barnett 
341903383736SDon Brace 	return rc;
342003383736SDon Brace }
342103383736SDon Brace 
3422cca8f13bSDon Brace /*
3423cca8f13bSDon Brace  * get enclosure information
3424cca8f13bSDon Brace  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3425cca8f13bSDon Brace  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3426cca8f13bSDon Brace  * Uses id_physical_device to determine the box_index.
3427cca8f13bSDon Brace  */
3428cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h,
3429cca8f13bSDon Brace 			unsigned char *scsi3addr,
3430cca8f13bSDon Brace 			struct ReportExtendedLUNdata *rlep, int rle_index,
3431cca8f13bSDon Brace 			struct hpsa_scsi_dev_t *encl_dev)
3432cca8f13bSDon Brace {
3433cca8f13bSDon Brace 	int rc = -1;
3434cca8f13bSDon Brace 	struct CommandList *c = NULL;
3435cca8f13bSDon Brace 	struct ErrorInfo *ei = NULL;
3436cca8f13bSDon Brace 	struct bmic_sense_storage_box_params *bssbp = NULL;
3437cca8f13bSDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
3438cca8f13bSDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3439cca8f13bSDon Brace 	u16 bmic_device_index = 0;
3440cca8f13bSDon Brace 
344101d0e789SDon Brace 	encl_dev->eli =
34420a7c3bb8SDon Brace 		hpsa_get_enclosure_logical_identifier(h, scsi3addr);
34430a7c3bb8SDon Brace 
344401d0e789SDon Brace 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
344501d0e789SDon Brace 
34465ac517b8SDon Brace 	if (encl_dev->target == -1 || encl_dev->lun == -1) {
34475ac517b8SDon Brace 		rc = IO_OK;
34485ac517b8SDon Brace 		goto out;
34495ac517b8SDon Brace 	}
34505ac517b8SDon Brace 
345117a9e54aSDon Brace 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
345217a9e54aSDon Brace 		rc = IO_OK;
3453cca8f13bSDon Brace 		goto out;
345417a9e54aSDon Brace 	}
3455cca8f13bSDon Brace 
3456cca8f13bSDon Brace 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3457cca8f13bSDon Brace 	if (!bssbp)
3458cca8f13bSDon Brace 		goto out;
3459cca8f13bSDon Brace 
3460cca8f13bSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3461cca8f13bSDon Brace 	if (!id_phys)
3462cca8f13bSDon Brace 		goto out;
3463cca8f13bSDon Brace 
3464cca8f13bSDon Brace 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3465cca8f13bSDon Brace 						id_phys, sizeof(*id_phys));
3466cca8f13bSDon Brace 	if (rc) {
3467cca8f13bSDon Brace 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3468cca8f13bSDon Brace 			__func__, encl_dev->external, bmic_device_index);
3469cca8f13bSDon Brace 		goto out;
3470cca8f13bSDon Brace 	}
3471cca8f13bSDon Brace 
3472cca8f13bSDon Brace 	c = cmd_alloc(h);
3473cca8f13bSDon Brace 
3474cca8f13bSDon Brace 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3475cca8f13bSDon Brace 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3476cca8f13bSDon Brace 
3477cca8f13bSDon Brace 	if (rc)
3478cca8f13bSDon Brace 		goto out;
3479cca8f13bSDon Brace 
3480cca8f13bSDon Brace 	if (id_phys->phys_connector[1] == 'E')
3481cca8f13bSDon Brace 		c->Request.CDB[5] = id_phys->box_index;
3482cca8f13bSDon Brace 	else
3483cca8f13bSDon Brace 		c->Request.CDB[5] = 0;
3484cca8f13bSDon Brace 
34858bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
34863026ff9bSDon Brace 						NO_TIMEOUT);
3487cca8f13bSDon Brace 	if (rc)
3488cca8f13bSDon Brace 		goto out;
3489cca8f13bSDon Brace 
3490cca8f13bSDon Brace 	ei = c->err_info;
3491cca8f13bSDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3492cca8f13bSDon Brace 		rc = -1;
3493cca8f13bSDon Brace 		goto out;
3494cca8f13bSDon Brace 	}
3495cca8f13bSDon Brace 
3496cca8f13bSDon Brace 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3497cca8f13bSDon Brace 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3498cca8f13bSDon Brace 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3499cca8f13bSDon Brace 
3500cca8f13bSDon Brace 	rc = IO_OK;
3501cca8f13bSDon Brace out:
3502cca8f13bSDon Brace 	kfree(bssbp);
3503cca8f13bSDon Brace 	kfree(id_phys);
3504cca8f13bSDon Brace 
3505cca8f13bSDon Brace 	if (c)
3506cca8f13bSDon Brace 		cmd_free(h, c);
3507cca8f13bSDon Brace 
3508cca8f13bSDon Brace 	if (rc != IO_OK)
3509cca8f13bSDon Brace 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3510b4e9ce1cSJulia Lawall 			"Error, could not get enclosure information");
3511cca8f13bSDon Brace }
3512cca8f13bSDon Brace 
3513d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3514d04e62b9SKevin Barnett 						unsigned char *scsi3addr)
3515d04e62b9SKevin Barnett {
3516d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *physdev;
3517d04e62b9SKevin Barnett 	u32 nphysicals;
3518d04e62b9SKevin Barnett 	u64 sa = 0;
3519d04e62b9SKevin Barnett 	int i;
3520d04e62b9SKevin Barnett 
3521d04e62b9SKevin Barnett 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3522d04e62b9SKevin Barnett 	if (!physdev)
3523d04e62b9SKevin Barnett 		return 0;
3524d04e62b9SKevin Barnett 
3525d04e62b9SKevin Barnett 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3526d04e62b9SKevin Barnett 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3527d04e62b9SKevin Barnett 		kfree(physdev);
3528d04e62b9SKevin Barnett 		return 0;
3529d04e62b9SKevin Barnett 	}
3530d04e62b9SKevin Barnett 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3531d04e62b9SKevin Barnett 
3532d04e62b9SKevin Barnett 	for (i = 0; i < nphysicals; i++)
3533d04e62b9SKevin Barnett 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3534d04e62b9SKevin Barnett 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3535d04e62b9SKevin Barnett 			break;
3536d04e62b9SKevin Barnett 		}
3537d04e62b9SKevin Barnett 
3538d04e62b9SKevin Barnett 	kfree(physdev);
3539d04e62b9SKevin Barnett 
3540d04e62b9SKevin Barnett 	return sa;
3541d04e62b9SKevin Barnett }
3542d04e62b9SKevin Barnett 
3543d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3544d04e62b9SKevin Barnett 					struct hpsa_scsi_dev_t *dev)
3545d04e62b9SKevin Barnett {
3546d04e62b9SKevin Barnett 	int rc;
3547d04e62b9SKevin Barnett 	u64 sa = 0;
3548d04e62b9SKevin Barnett 
3549d04e62b9SKevin Barnett 	if (is_hba_lunid(scsi3addr)) {
3550d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *ssi;
3551d04e62b9SKevin Barnett 
3552d04e62b9SKevin Barnett 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
35537e8a9486SAmit Kushwaha 		if (!ssi)
3554d04e62b9SKevin Barnett 			return;
3555d04e62b9SKevin Barnett 
3556d04e62b9SKevin Barnett 		rc = hpsa_bmic_sense_subsystem_information(h,
3557d04e62b9SKevin Barnett 					scsi3addr, 0, ssi, sizeof(*ssi));
3558d04e62b9SKevin Barnett 		if (rc == 0) {
3559d04e62b9SKevin Barnett 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3560d04e62b9SKevin Barnett 			h->sas_address = sa;
3561d04e62b9SKevin Barnett 		}
3562d04e62b9SKevin Barnett 
3563d04e62b9SKevin Barnett 		kfree(ssi);
3564d04e62b9SKevin Barnett 	} else
3565d04e62b9SKevin Barnett 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3566d04e62b9SKevin Barnett 
3567d04e62b9SKevin Barnett 	dev->sas_address = sa;
3568d04e62b9SKevin Barnett }
3569d04e62b9SKevin Barnett 
35704e188184SBader Ali Saleh static void hpsa_ext_ctrl_present(struct ctlr_info *h,
35714e188184SBader Ali Saleh 	struct ReportExtendedLUNdata *physdev)
35724e188184SBader Ali Saleh {
35734e188184SBader Ali Saleh 	u32 nphysicals;
35744e188184SBader Ali Saleh 	int i;
35754e188184SBader Ali Saleh 
35764e188184SBader Ali Saleh 	if (h->discovery_polling)
35774e188184SBader Ali Saleh 		return;
35784e188184SBader Ali Saleh 
35794e188184SBader Ali Saleh 	nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
35804e188184SBader Ali Saleh 
35814e188184SBader Ali Saleh 	for (i = 0; i < nphysicals; i++) {
35824e188184SBader Ali Saleh 		if (physdev->LUN[i].device_type ==
35834e188184SBader Ali Saleh 			BMIC_DEVICE_TYPE_CONTROLLER
35844e188184SBader Ali Saleh 			&& !is_hba_lunid(physdev->LUN[i].lunid)) {
35854e188184SBader Ali Saleh 			dev_info(&h->pdev->dev,
35864e188184SBader Ali Saleh 				"External controller present, activate discovery polling and disable rld caching\n");
35874e188184SBader Ali Saleh 			hpsa_disable_rld_caching(h);
35884e188184SBader Ali Saleh 			h->discovery_polling = 1;
35894e188184SBader Ali Saleh 			break;
35904e188184SBader Ali Saleh 		}
35914e188184SBader Ali Saleh 	}
35924e188184SBader Ali Saleh }
35934e188184SBader Ali Saleh 
3594d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */
35958383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
35961b70150aSStephen M. Cameron 	unsigned char scsi3addr[], u8 page)
35971b70150aSStephen M. Cameron {
35981b70150aSStephen M. Cameron 	int rc;
35991b70150aSStephen M. Cameron 	int i;
36001b70150aSStephen M. Cameron 	int pages;
36011b70150aSStephen M. Cameron 	unsigned char *buf, bufsize;
36021b70150aSStephen M. Cameron 
36031b70150aSStephen M. Cameron 	buf = kzalloc(256, GFP_KERNEL);
36041b70150aSStephen M. Cameron 	if (!buf)
36058383278dSScott Teel 		return false;
36061b70150aSStephen M. Cameron 
36071b70150aSStephen M. Cameron 	/* Get the size of the page list first */
36081b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
36091b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
36101b70150aSStephen M. Cameron 				buf, HPSA_VPD_HEADER_SZ);
36111b70150aSStephen M. Cameron 	if (rc != 0)
36121b70150aSStephen M. Cameron 		goto exit_unsupported;
36131b70150aSStephen M. Cameron 	pages = buf[3];
36141b70150aSStephen M. Cameron 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
36151b70150aSStephen M. Cameron 		bufsize = pages + HPSA_VPD_HEADER_SZ;
36161b70150aSStephen M. Cameron 	else
36171b70150aSStephen M. Cameron 		bufsize = 255;
36181b70150aSStephen M. Cameron 
36191b70150aSStephen M. Cameron 	/* Get the whole VPD page list */
36201b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
36211b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
36221b70150aSStephen M. Cameron 				buf, bufsize);
36231b70150aSStephen M. Cameron 	if (rc != 0)
36241b70150aSStephen M. Cameron 		goto exit_unsupported;
36251b70150aSStephen M. Cameron 
36261b70150aSStephen M. Cameron 	pages = buf[3];
36271b70150aSStephen M. Cameron 	for (i = 1; i <= pages; i++)
36281b70150aSStephen M. Cameron 		if (buf[3 + i] == page)
36291b70150aSStephen M. Cameron 			goto exit_supported;
36301b70150aSStephen M. Cameron exit_unsupported:
36311b70150aSStephen M. Cameron 	kfree(buf);
36328383278dSScott Teel 	return false;
36331b70150aSStephen M. Cameron exit_supported:
36341b70150aSStephen M. Cameron 	kfree(buf);
36358383278dSScott Teel 	return true;
36361b70150aSStephen M. Cameron }
36371b70150aSStephen M. Cameron 
3638b2582a65SDon Brace /*
3639b2582a65SDon Brace  * Called during a scan operation.
3640b2582a65SDon Brace  * Sets ioaccel status on the new device list, not the existing device list
3641b2582a65SDon Brace  *
3642b2582a65SDon Brace  * The device list used during I/O will be updated later in
3643b2582a65SDon Brace  * adjust_hpsa_scsi_table.
3644b2582a65SDon Brace  */
3645283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3646283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3647283b4a9bSStephen M. Cameron {
3648283b4a9bSStephen M. Cameron 	int rc;
3649283b4a9bSStephen M. Cameron 	unsigned char *buf;
3650283b4a9bSStephen M. Cameron 	u8 ioaccel_status;
3651283b4a9bSStephen M. Cameron 
3652283b4a9bSStephen M. Cameron 	this_device->offload_config = 0;
3653283b4a9bSStephen M. Cameron 	this_device->offload_enabled = 0;
365441ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = 0;
3655283b4a9bSStephen M. Cameron 
3656283b4a9bSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3657283b4a9bSStephen M. Cameron 	if (!buf)
3658283b4a9bSStephen M. Cameron 		return;
36591b70150aSStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
36601b70150aSStephen M. Cameron 		goto out;
3661283b4a9bSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3662b7bb24ebSStephen M. Cameron 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3663283b4a9bSStephen M. Cameron 	if (rc != 0)
3664283b4a9bSStephen M. Cameron 		goto out;
3665283b4a9bSStephen M. Cameron 
3666283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4
3667283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01
3668283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02
3669283b4a9bSStephen M. Cameron 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3670283b4a9bSStephen M. Cameron 	this_device->offload_config =
3671283b4a9bSStephen M. Cameron 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3672283b4a9bSStephen M. Cameron 	if (this_device->offload_config) {
3673b2582a65SDon Brace 		this_device->offload_to_be_enabled =
3674283b4a9bSStephen M. Cameron 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3675283b4a9bSStephen M. Cameron 		if (hpsa_get_raid_map(h, scsi3addr, this_device))
3676b2582a65SDon Brace 			this_device->offload_to_be_enabled = 0;
3677283b4a9bSStephen M. Cameron 	}
3678b2582a65SDon Brace 
3679283b4a9bSStephen M. Cameron out:
3680283b4a9bSStephen M. Cameron 	kfree(buf);
3681283b4a9bSStephen M. Cameron 	return;
3682283b4a9bSStephen M. Cameron }
3683283b4a9bSStephen M. Cameron 
3684edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */
3685edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
368675d23d89SDon Brace 	unsigned char *device_id, int index, int buflen)
3687edd16368SStephen M. Cameron {
3688edd16368SStephen M. Cameron 	int rc;
3689edd16368SStephen M. Cameron 	unsigned char *buf;
3690edd16368SStephen M. Cameron 
36918383278dSScott Teel 	/* Does controller have VPD for device id? */
36928383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
36938383278dSScott Teel 		return 1; /* not supported */
36948383278dSScott Teel 
3695edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3696edd16368SStephen M. Cameron 	if (!buf)
3697a84d794dSStephen M. Cameron 		return -ENOMEM;
36988383278dSScott Teel 
36998383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
37008383278dSScott Teel 					HPSA_VPD_LV_DEVICE_ID, buf, 64);
37018383278dSScott Teel 	if (rc == 0) {
37028383278dSScott Teel 		if (buflen > 16)
37038383278dSScott Teel 			buflen = 16;
37048383278dSScott Teel 		memcpy(device_id, &buf[8], buflen);
37058383278dSScott Teel 	}
370675d23d89SDon Brace 
3707edd16368SStephen M. Cameron 	kfree(buf);
370875d23d89SDon Brace 
37098383278dSScott Teel 	return rc; /*0 - got id,  otherwise, didn't */
3710edd16368SStephen M. Cameron }
3711edd16368SStephen M. Cameron 
3712edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
371303383736SDon Brace 		void *buf, int bufsize,
3714edd16368SStephen M. Cameron 		int extended_response)
3715edd16368SStephen M. Cameron {
3716edd16368SStephen M. Cameron 	int rc = IO_OK;
3717edd16368SStephen M. Cameron 	struct CommandList *c;
3718edd16368SStephen M. Cameron 	unsigned char scsi3addr[8];
3719edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3720edd16368SStephen M. Cameron 
372145fcb86eSStephen Cameron 	c = cmd_alloc(h);
3722bf43caf3SRobert Elliott 
3723e89c0ae7SStephen M. Cameron 	/* address the controller */
3724e89c0ae7SStephen M. Cameron 	memset(scsi3addr, 0, sizeof(scsi3addr));
3725a2dac136SStephen M. Cameron 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3726a2dac136SStephen M. Cameron 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
372745f769b2SHannes Reinecke 		rc = -EAGAIN;
3728a2dac136SStephen M. Cameron 		goto out;
3729a2dac136SStephen M. Cameron 	}
3730edd16368SStephen M. Cameron 	if (extended_response)
3731edd16368SStephen M. Cameron 		c->Request.CDB[1] = extended_response;
37328bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
37338bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
373425163bd5SWebb Scales 	if (rc)
373525163bd5SWebb Scales 		goto out;
3736edd16368SStephen M. Cameron 	ei = c->err_info;
3737edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 &&
3738edd16368SStephen M. Cameron 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3739d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
374045f769b2SHannes Reinecke 		rc = -EIO;
3741283b4a9bSStephen M. Cameron 	} else {
374203383736SDon Brace 		struct ReportLUNdata *rld = buf;
374303383736SDon Brace 
374403383736SDon Brace 		if (rld->extended_response_flag != extended_response) {
374545f769b2SHannes Reinecke 			if (!h->legacy_board) {
3746283b4a9bSStephen M. Cameron 				dev_err(&h->pdev->dev,
3747283b4a9bSStephen M. Cameron 					"report luns requested format %u, got %u\n",
3748283b4a9bSStephen M. Cameron 					extended_response,
374903383736SDon Brace 					rld->extended_response_flag);
375045f769b2SHannes Reinecke 				rc = -EINVAL;
375145f769b2SHannes Reinecke 			} else
375245f769b2SHannes Reinecke 				rc = -EOPNOTSUPP;
3753283b4a9bSStephen M. Cameron 		}
3754edd16368SStephen M. Cameron 	}
3755a2dac136SStephen M. Cameron out:
375645fcb86eSStephen Cameron 	cmd_free(h, c);
3757edd16368SStephen M. Cameron 	return rc;
3758edd16368SStephen M. Cameron }
3759edd16368SStephen M. Cameron 
3760edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
376103383736SDon Brace 		struct ReportExtendedLUNdata *buf, int bufsize)
3762edd16368SStephen M. Cameron {
37632a80d545SHannes Reinecke 	int rc;
37642a80d545SHannes Reinecke 	struct ReportLUNdata *lbuf;
37652a80d545SHannes Reinecke 
37662a80d545SHannes Reinecke 	rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
376703383736SDon Brace 				      HPSA_REPORT_PHYS_EXTENDED);
376845f769b2SHannes Reinecke 	if (!rc || rc != -EOPNOTSUPP)
37692a80d545SHannes Reinecke 		return rc;
37702a80d545SHannes Reinecke 
37712a80d545SHannes Reinecke 	/* REPORT PHYS EXTENDED is not supported */
37722a80d545SHannes Reinecke 	lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
37732a80d545SHannes Reinecke 	if (!lbuf)
37742a80d545SHannes Reinecke 		return -ENOMEM;
37752a80d545SHannes Reinecke 
37762a80d545SHannes Reinecke 	rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
37772a80d545SHannes Reinecke 	if (!rc) {
37782a80d545SHannes Reinecke 		int i;
37792a80d545SHannes Reinecke 		u32 nphys;
37802a80d545SHannes Reinecke 
37812a80d545SHannes Reinecke 		/* Copy ReportLUNdata header */
37822a80d545SHannes Reinecke 		memcpy(buf, lbuf, 8);
37832a80d545SHannes Reinecke 		nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
37842a80d545SHannes Reinecke 		for (i = 0; i < nphys; i++)
37852a80d545SHannes Reinecke 			memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
37862a80d545SHannes Reinecke 	}
37872a80d545SHannes Reinecke 	kfree(lbuf);
37882a80d545SHannes Reinecke 	return rc;
3789edd16368SStephen M. Cameron }
3790edd16368SStephen M. Cameron 
3791edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3792edd16368SStephen M. Cameron 		struct ReportLUNdata *buf, int bufsize)
3793edd16368SStephen M. Cameron {
3794edd16368SStephen M. Cameron 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3795edd16368SStephen M. Cameron }
3796edd16368SStephen M. Cameron 
3797edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3798edd16368SStephen M. Cameron 	int bus, int target, int lun)
3799edd16368SStephen M. Cameron {
3800edd16368SStephen M. Cameron 	device->bus = bus;
3801edd16368SStephen M. Cameron 	device->target = target;
3802edd16368SStephen M. Cameron 	device->lun = lun;
3803edd16368SStephen M. Cameron }
3804edd16368SStephen M. Cameron 
38059846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */
38069846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h,
38079846590eSStephen M. Cameron 					unsigned char scsi3addr[])
38089846590eSStephen M. Cameron {
38099846590eSStephen M. Cameron 	int rc;
38109846590eSStephen M. Cameron 	int status;
38119846590eSStephen M. Cameron 	int size;
38129846590eSStephen M. Cameron 	unsigned char *buf;
38139846590eSStephen M. Cameron 
38149846590eSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
38159846590eSStephen M. Cameron 	if (!buf)
38169846590eSStephen M. Cameron 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
38179846590eSStephen M. Cameron 
38189846590eSStephen M. Cameron 	/* Does controller have VPD for logical volume status? */
381924a4b078SStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
38209846590eSStephen M. Cameron 		goto exit_failed;
38219846590eSStephen M. Cameron 
38229846590eSStephen M. Cameron 	/* Get the size of the VPD return buffer */
38239846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
38249846590eSStephen M. Cameron 					buf, HPSA_VPD_HEADER_SZ);
382524a4b078SStephen M. Cameron 	if (rc != 0)
38269846590eSStephen M. Cameron 		goto exit_failed;
38279846590eSStephen M. Cameron 	size = buf[3];
38289846590eSStephen M. Cameron 
38299846590eSStephen M. Cameron 	/* Now get the whole VPD buffer */
38309846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
38319846590eSStephen M. Cameron 					buf, size + HPSA_VPD_HEADER_SZ);
383224a4b078SStephen M. Cameron 	if (rc != 0)
38339846590eSStephen M. Cameron 		goto exit_failed;
38349846590eSStephen M. Cameron 	status = buf[4]; /* status byte */
38359846590eSStephen M. Cameron 
38369846590eSStephen M. Cameron 	kfree(buf);
38379846590eSStephen M. Cameron 	return status;
38389846590eSStephen M. Cameron exit_failed:
38399846590eSStephen M. Cameron 	kfree(buf);
38409846590eSStephen M. Cameron 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
38419846590eSStephen M. Cameron }
38429846590eSStephen M. Cameron 
38439846590eSStephen M. Cameron /* Determine offline status of a volume.
38449846590eSStephen M. Cameron  * Return either:
38459846590eSStephen M. Cameron  *  0 (not offline)
384667955ba3SStephen M. Cameron  *  0xff (offline for unknown reasons)
38479846590eSStephen M. Cameron  *  # (integer code indicating one of several NOT READY states
38489846590eSStephen M. Cameron  *     describing why a volume is to be kept offline)
38499846590eSStephen M. Cameron  */
385085b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h,
38519846590eSStephen M. Cameron 					unsigned char scsi3addr[])
38529846590eSStephen M. Cameron {
38539846590eSStephen M. Cameron 	struct CommandList *c;
38549437ac43SStephen Cameron 	unsigned char *sense;
38559437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
38569437ac43SStephen Cameron 	int sense_len;
385725163bd5SWebb Scales 	int rc, ldstat = 0;
38589846590eSStephen M. Cameron 	u16 cmd_status;
38599846590eSStephen M. Cameron 	u8 scsi_status;
38609846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04
38619846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
38629846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
38639846590eSStephen M. Cameron 
38649846590eSStephen M. Cameron 	c = cmd_alloc(h);
3865bf43caf3SRobert Elliott 
38669846590eSStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3867c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
38683026ff9bSDon Brace 					NO_TIMEOUT);
386925163bd5SWebb Scales 	if (rc) {
387025163bd5SWebb Scales 		cmd_free(h, c);
387185b29008SDon Brace 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
387225163bd5SWebb Scales 	}
38739846590eSStephen M. Cameron 	sense = c->err_info->SenseInfo;
38749437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
38759437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
38769437ac43SStephen Cameron 	else
38779437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
38789437ac43SStephen Cameron 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
38799846590eSStephen M. Cameron 	cmd_status = c->err_info->CommandStatus;
38809846590eSStephen M. Cameron 	scsi_status = c->err_info->ScsiStatus;
38819846590eSStephen M. Cameron 	cmd_free(h, c);
38829846590eSStephen M. Cameron 
38839846590eSStephen M. Cameron 	/* Determine the reason for not ready state */
38849846590eSStephen M. Cameron 	ldstat = hpsa_get_volume_status(h, scsi3addr);
38859846590eSStephen M. Cameron 
38869846590eSStephen M. Cameron 	/* Keep volume offline in certain cases: */
38879846590eSStephen M. Cameron 	switch (ldstat) {
388885b29008SDon Brace 	case HPSA_LV_FAILED:
38899846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
38905ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
38919846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
38929846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
38939846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
38949846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
38959846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
38969846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
38979846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
38989846590eSStephen M. Cameron 		return ldstat;
38999846590eSStephen M. Cameron 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
39009846590eSStephen M. Cameron 		/* If VPD status page isn't available,
39019846590eSStephen M. Cameron 		 * use ASC/ASCQ to determine state
39029846590eSStephen M. Cameron 		 */
39039846590eSStephen M. Cameron 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
39049846590eSStephen M. Cameron 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
39059846590eSStephen M. Cameron 			return ldstat;
39069846590eSStephen M. Cameron 		break;
39079846590eSStephen M. Cameron 	default:
39089846590eSStephen M. Cameron 		break;
39099846590eSStephen M. Cameron 	}
391085b29008SDon Brace 	return HPSA_LV_OK;
39119846590eSStephen M. Cameron }
39129846590eSStephen M. Cameron 
3913edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h,
39140b0e1d6cSStephen M. Cameron 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
39150b0e1d6cSStephen M. Cameron 	unsigned char *is_OBDR_device)
3916edd16368SStephen M. Cameron {
39170b0e1d6cSStephen M. Cameron 
39180b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43
39190b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10"
39200b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
39210b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
39220b0e1d6cSStephen M. Cameron 
3923ea6d3bc3SStephen M. Cameron 	unsigned char *inq_buff;
39240b0e1d6cSStephen M. Cameron 	unsigned char *obdr_sig;
3925683fc444SDon Brace 	int rc = 0;
3926edd16368SStephen M. Cameron 
3927ea6d3bc3SStephen M. Cameron 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3928683fc444SDon Brace 	if (!inq_buff) {
3929683fc444SDon Brace 		rc = -ENOMEM;
3930edd16368SStephen M. Cameron 		goto bail_out;
3931683fc444SDon Brace 	}
3932edd16368SStephen M. Cameron 
3933edd16368SStephen M. Cameron 	/* Do an inquiry to the device to see what it is. */
3934edd16368SStephen M. Cameron 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3935edd16368SStephen M. Cameron 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3936edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev,
393785b29008SDon Brace 			"%s: inquiry failed, device will be skipped.\n",
393885b29008SDon Brace 			__func__);
393985b29008SDon Brace 		rc = HPSA_INQUIRY_FAILED;
3940edd16368SStephen M. Cameron 		goto bail_out;
3941edd16368SStephen M. Cameron 	}
3942edd16368SStephen M. Cameron 
39434af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[8], 8);
39444af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[16], 16);
394575d23d89SDon Brace 
3946edd16368SStephen M. Cameron 	this_device->devtype = (inq_buff[0] & 0x1f);
3947edd16368SStephen M. Cameron 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3948edd16368SStephen M. Cameron 	memcpy(this_device->vendor, &inq_buff[8],
3949edd16368SStephen M. Cameron 		sizeof(this_device->vendor));
3950edd16368SStephen M. Cameron 	memcpy(this_device->model, &inq_buff[16],
3951edd16368SStephen M. Cameron 		sizeof(this_device->model));
39527630b3a5SHannes Reinecke 	this_device->rev = inq_buff[2];
3953edd16368SStephen M. Cameron 	memset(this_device->device_id, 0,
3954edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
39558383278dSScott Teel 	if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3956a45bcc4eSDon Brace 		sizeof(this_device->device_id)) < 0) {
39578383278dSScott Teel 		dev_err(&h->pdev->dev,
3958a45bcc4eSDon Brace 			"hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
39598383278dSScott Teel 			h->ctlr, __func__,
39608383278dSScott Teel 			h->scsi_host->host_no,
3961a45bcc4eSDon Brace 			this_device->bus, this_device->target,
3962a45bcc4eSDon Brace 			this_device->lun,
39638383278dSScott Teel 			scsi_device_type(this_device->devtype),
39648383278dSScott Teel 			this_device->model);
3965a45bcc4eSDon Brace 		rc = HPSA_LV_FAILED;
3966a45bcc4eSDon Brace 		goto bail_out;
3967a45bcc4eSDon Brace 	}
3968edd16368SStephen M. Cameron 
3969af15ed36SDon Brace 	if ((this_device->devtype == TYPE_DISK ||
3970af15ed36SDon Brace 		this_device->devtype == TYPE_ZBC) &&
3971283b4a9bSStephen M. Cameron 		is_logical_dev_addr_mode(scsi3addr)) {
397285b29008SDon Brace 		unsigned char volume_offline;
397367955ba3SStephen M. Cameron 
3974edd16368SStephen M. Cameron 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3975283b4a9bSStephen M. Cameron 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3976283b4a9bSStephen M. Cameron 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
397767955ba3SStephen M. Cameron 		volume_offline = hpsa_volume_offline(h, scsi3addr);
39784d17944aSHannes Reinecke 		if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
39794d17944aSHannes Reinecke 		    h->legacy_board) {
39804d17944aSHannes Reinecke 			/*
39814d17944aSHannes Reinecke 			 * Legacy boards might not support volume status
39824d17944aSHannes Reinecke 			 */
39834d17944aSHannes Reinecke 			dev_info(&h->pdev->dev,
39844d17944aSHannes Reinecke 				 "C0:T%d:L%d Volume status not available, assuming online.\n",
39854d17944aSHannes Reinecke 				 this_device->target, this_device->lun);
39864d17944aSHannes Reinecke 			volume_offline = 0;
39874d17944aSHannes Reinecke 		}
3988eb94588dSTomas Henzl 		this_device->volume_offline = volume_offline;
398985b29008SDon Brace 		if (volume_offline == HPSA_LV_FAILED) {
399085b29008SDon Brace 			rc = HPSA_LV_FAILED;
399185b29008SDon Brace 			dev_err(&h->pdev->dev,
399285b29008SDon Brace 				"%s: LV failed, device will be skipped.\n",
399385b29008SDon Brace 				__func__);
399485b29008SDon Brace 			goto bail_out;
399585b29008SDon Brace 		}
3996283b4a9bSStephen M. Cameron 	} else {
3997edd16368SStephen M. Cameron 		this_device->raid_level = RAID_UNKNOWN;
3998283b4a9bSStephen M. Cameron 		this_device->offload_config = 0;
3999283b4a9bSStephen M. Cameron 		this_device->offload_enabled = 0;
400041ce4c35SStephen Cameron 		this_device->offload_to_be_enabled = 0;
4001a3144e0bSJoe Handzik 		this_device->hba_ioaccel_enabled = 0;
40029846590eSStephen M. Cameron 		this_device->volume_offline = 0;
400303383736SDon Brace 		this_device->queue_depth = h->nr_cmds;
4004283b4a9bSStephen M. Cameron 	}
4005edd16368SStephen M. Cameron 
40065086435eSDon Brace 	if (this_device->external)
40075086435eSDon Brace 		this_device->queue_depth = EXTERNAL_QD;
40085086435eSDon Brace 
40090b0e1d6cSStephen M. Cameron 	if (is_OBDR_device) {
40100b0e1d6cSStephen M. Cameron 		/* See if this is a One-Button-Disaster-Recovery device
40110b0e1d6cSStephen M. Cameron 		 * by looking for "$DR-10" at offset 43 in inquiry data.
40120b0e1d6cSStephen M. Cameron 		 */
40130b0e1d6cSStephen M. Cameron 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
40140b0e1d6cSStephen M. Cameron 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
40150b0e1d6cSStephen M. Cameron 					strncmp(obdr_sig, OBDR_TAPE_SIG,
40160b0e1d6cSStephen M. Cameron 						OBDR_SIG_LEN) == 0);
40170b0e1d6cSStephen M. Cameron 	}
4018edd16368SStephen M. Cameron 	kfree(inq_buff);
4019edd16368SStephen M. Cameron 	return 0;
4020edd16368SStephen M. Cameron 
4021edd16368SStephen M. Cameron bail_out:
4022edd16368SStephen M. Cameron 	kfree(inq_buff);
4023683fc444SDon Brace 	return rc;
4024edd16368SStephen M. Cameron }
4025edd16368SStephen M. Cameron 
4026c795505aSKevin Barnett /*
4027c795505aSKevin Barnett  * Helper function to assign bus, target, lun mapping of devices.
4028edd16368SStephen M. Cameron  * Logical drive target and lun are assigned at this time, but
4029edd16368SStephen M. Cameron  * physical device lun and target assignment are deferred (assigned
4030edd16368SStephen M. Cameron  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4031edd16368SStephen M. Cameron */
4032edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h,
40331f310bdeSStephen M. Cameron 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4034edd16368SStephen M. Cameron {
4035c795505aSKevin Barnett 	u32 lunid = get_unaligned_le32(lunaddrbytes);
4036edd16368SStephen M. Cameron 
40371f310bdeSStephen M. Cameron 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
40381f310bdeSStephen M. Cameron 		/* physical device, target and lun filled in later */
40397630b3a5SHannes Reinecke 		if (is_hba_lunid(lunaddrbytes)) {
40407630b3a5SHannes Reinecke 			int bus = HPSA_HBA_BUS;
40417630b3a5SHannes Reinecke 
40427630b3a5SHannes Reinecke 			if (!device->rev)
40437630b3a5SHannes Reinecke 				bus = HPSA_LEGACY_HBA_BUS;
4044c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
40457630b3a5SHannes Reinecke 					bus, 0, lunid & 0x3fff);
40467630b3a5SHannes Reinecke 		} else
40471f310bdeSStephen M. Cameron 			/* defer target, lun assignment for physical devices */
4048c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
4049c795505aSKevin Barnett 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
40501f310bdeSStephen M. Cameron 		return;
40511f310bdeSStephen M. Cameron 	}
40521f310bdeSStephen M. Cameron 	/* It's a logical device */
405366749d0dSScott Teel 	if (device->external) {
40541f310bdeSStephen M. Cameron 		hpsa_set_bus_target_lun(device,
4055c795505aSKevin Barnett 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4056c795505aSKevin Barnett 			lunid & 0x00ff);
40571f310bdeSStephen M. Cameron 		return;
4058339b2b14SStephen M. Cameron 	}
4059c795505aSKevin Barnett 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4060c795505aSKevin Barnett 				0, lunid & 0x3fff);
4061edd16368SStephen M. Cameron }
4062edd16368SStephen M. Cameron 
406366749d0dSScott Teel static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
406466749d0dSScott Teel 	int i, int nphysicals, int nlocal_logicals)
406566749d0dSScott Teel {
406666749d0dSScott Teel 	/* In report logicals, local logicals are listed first,
406766749d0dSScott Teel 	* then any externals.
406866749d0dSScott Teel 	*/
406966749d0dSScott Teel 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
407066749d0dSScott Teel 
407166749d0dSScott Teel 	if (i == raid_ctlr_position)
407266749d0dSScott Teel 		return 0;
407366749d0dSScott Teel 
407466749d0dSScott Teel 	if (i < logicals_start)
407566749d0dSScott Teel 		return 0;
407666749d0dSScott Teel 
407766749d0dSScott Teel 	/* i is in logicals range, but still within local logicals */
407866749d0dSScott Teel 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
407966749d0dSScott Teel 		return 0;
408066749d0dSScott Teel 
408166749d0dSScott Teel 	return 1; /* it's an external lun */
408266749d0dSScott Teel }
408366749d0dSScott Teel 
408454b6e9e9SScott Teel /*
4085edd16368SStephen M. Cameron  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
4086edd16368SStephen M. Cameron  * logdev.  The number of luns in physdev and logdev are returned in
4087edd16368SStephen M. Cameron  * *nphysicals and *nlogicals, respectively.
4088edd16368SStephen M. Cameron  * Returns 0 on success, -1 otherwise.
4089edd16368SStephen M. Cameron  */
4090edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h,
409103383736SDon Brace 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
409201a02ffcSStephen M. Cameron 	struct ReportLUNdata *logdev, u32 *nlogicals)
4093edd16368SStephen M. Cameron {
409403383736SDon Brace 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4095edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4096edd16368SStephen M. Cameron 		return -1;
4097edd16368SStephen M. Cameron 	}
409803383736SDon Brace 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4099edd16368SStephen M. Cameron 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
410003383736SDon Brace 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
410103383736SDon Brace 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4102edd16368SStephen M. Cameron 		*nphysicals = HPSA_MAX_PHYS_LUN;
4103edd16368SStephen M. Cameron 	}
410403383736SDon Brace 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4105edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4106edd16368SStephen M. Cameron 		return -1;
4107edd16368SStephen M. Cameron 	}
41086df1e954SStephen M. Cameron 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4109edd16368SStephen M. Cameron 	/* Reject Logicals in excess of our max capability. */
4110edd16368SStephen M. Cameron 	if (*nlogicals > HPSA_MAX_LUN) {
4111edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4112edd16368SStephen M. Cameron 			"maximum logical LUNs (%d) exceeded.  "
4113edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
4114edd16368SStephen M. Cameron 			*nlogicals - HPSA_MAX_LUN);
4115edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_LUN;
4116edd16368SStephen M. Cameron 	}
4117edd16368SStephen M. Cameron 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4118edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4119edd16368SStephen M. Cameron 			"maximum logical + physical LUNs (%d) exceeded. "
4120edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4121edd16368SStephen M. Cameron 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4122edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4123edd16368SStephen M. Cameron 	}
4124edd16368SStephen M. Cameron 	return 0;
4125edd16368SStephen M. Cameron }
4126edd16368SStephen M. Cameron 
412742a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
412842a91641SDon Brace 	int i, int nphysicals, int nlogicals,
4129a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list,
4130339b2b14SStephen M. Cameron 	struct ReportLUNdata *logdev_list)
4131339b2b14SStephen M. Cameron {
4132339b2b14SStephen M. Cameron 	/* Helper function, figure out where the LUN ID info is coming from
4133339b2b14SStephen M. Cameron 	 * given index i, lists of physical and logical devices, where in
4134339b2b14SStephen M. Cameron 	 * the list the raid controller is supposed to appear (first or last)
4135339b2b14SStephen M. Cameron 	 */
4136339b2b14SStephen M. Cameron 
4137339b2b14SStephen M. Cameron 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4138339b2b14SStephen M. Cameron 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4139339b2b14SStephen M. Cameron 
4140339b2b14SStephen M. Cameron 	if (i == raid_ctlr_position)
4141339b2b14SStephen M. Cameron 		return RAID_CTLR_LUNID;
4142339b2b14SStephen M. Cameron 
4143339b2b14SStephen M. Cameron 	if (i < logicals_start)
4144d5b5d964SStephen M. Cameron 		return &physdev_list->LUN[i -
4145d5b5d964SStephen M. Cameron 				(raid_ctlr_position == 0)].lunid[0];
4146339b2b14SStephen M. Cameron 
4147339b2b14SStephen M. Cameron 	if (i < last_device)
4148339b2b14SStephen M. Cameron 		return &logdev_list->LUN[i - nphysicals -
4149339b2b14SStephen M. Cameron 			(raid_ctlr_position == 0)][0];
4150339b2b14SStephen M. Cameron 	BUG();
4151339b2b14SStephen M. Cameron 	return NULL;
4152339b2b14SStephen M. Cameron }
4153339b2b14SStephen M. Cameron 
415403383736SDon Brace /* get physical drive ioaccel handle and queue depth */
415503383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
415603383736SDon Brace 		struct hpsa_scsi_dev_t *dev,
4157f2039b03SDon Brace 		struct ReportExtendedLUNdata *rlep, int rle_index,
415803383736SDon Brace 		struct bmic_identify_physical_device *id_phys)
415903383736SDon Brace {
416003383736SDon Brace 	int rc;
41614b6e5597SScott Teel 	struct ext_report_lun_entry *rle;
41624b6e5597SScott Teel 
41634b6e5597SScott Teel 	rle = &rlep->LUN[rle_index];
416403383736SDon Brace 
416503383736SDon Brace 	dev->ioaccel_handle = rle->ioaccel_handle;
4166f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4167a3144e0bSJoe Handzik 		dev->hba_ioaccel_enabled = 1;
416803383736SDon Brace 	memset(id_phys, 0, sizeof(*id_phys));
4169f2039b03SDon Brace 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4170f2039b03SDon Brace 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
417103383736SDon Brace 			sizeof(*id_phys));
417203383736SDon Brace 	if (!rc)
417303383736SDon Brace 		/* Reserve space for FW operations */
417403383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2
417503383736SDon Brace #define DRIVE_QUEUE_DEPTH 7
417603383736SDon Brace 		dev->queue_depth =
417703383736SDon Brace 			le16_to_cpu(id_phys->current_queue_depth_limit) -
417803383736SDon Brace 				DRIVE_CMDS_RESERVED_FOR_FW;
417903383736SDon Brace 	else
418003383736SDon Brace 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
418103383736SDon Brace }
418203383736SDon Brace 
41838270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4184f2039b03SDon Brace 	struct ReportExtendedLUNdata *rlep, int rle_index,
41858270b862SJoe Handzik 	struct bmic_identify_physical_device *id_phys)
41868270b862SJoe Handzik {
4187f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4188f2039b03SDon Brace 
4189f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
41908270b862SJoe Handzik 		this_device->hba_ioaccel_enabled = 1;
41918270b862SJoe Handzik 
41928270b862SJoe Handzik 	memcpy(&this_device->active_path_index,
41938270b862SJoe Handzik 		&id_phys->active_path_number,
41948270b862SJoe Handzik 		sizeof(this_device->active_path_index));
41958270b862SJoe Handzik 	memcpy(&this_device->path_map,
41968270b862SJoe Handzik 		&id_phys->redundant_path_present_map,
41978270b862SJoe Handzik 		sizeof(this_device->path_map));
41988270b862SJoe Handzik 	memcpy(&this_device->box,
41998270b862SJoe Handzik 		&id_phys->alternate_paths_phys_box_on_port,
42008270b862SJoe Handzik 		sizeof(this_device->box));
42018270b862SJoe Handzik 	memcpy(&this_device->phys_connector,
42028270b862SJoe Handzik 		&id_phys->alternate_paths_phys_connector,
42038270b862SJoe Handzik 		sizeof(this_device->phys_connector));
42048270b862SJoe Handzik 	memcpy(&this_device->bay,
42058270b862SJoe Handzik 		&id_phys->phys_bay_in_box,
42068270b862SJoe Handzik 		sizeof(this_device->bay));
42078270b862SJoe Handzik }
42088270b862SJoe Handzik 
420966749d0dSScott Teel /* get number of local logical disks. */
421066749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h,
421166749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr,
421266749d0dSScott Teel 	u32 *nlocals)
421366749d0dSScott Teel {
421466749d0dSScott Teel 	int rc;
421566749d0dSScott Teel 
421666749d0dSScott Teel 	if (!id_ctlr) {
421766749d0dSScott Teel 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
421866749d0dSScott Teel 			__func__);
421966749d0dSScott Teel 		return -ENOMEM;
422066749d0dSScott Teel 	}
422166749d0dSScott Teel 	memset(id_ctlr, 0, sizeof(*id_ctlr));
422266749d0dSScott Teel 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
422366749d0dSScott Teel 	if (!rc)
4224c99dfd20SChristos Gkekas 		if (id_ctlr->configured_logical_drive_count < 255)
422566749d0dSScott Teel 			*nlocals = id_ctlr->configured_logical_drive_count;
422666749d0dSScott Teel 		else
422766749d0dSScott Teel 			*nlocals = le16_to_cpu(
422866749d0dSScott Teel 					id_ctlr->extended_logical_unit_count);
422966749d0dSScott Teel 	else
423066749d0dSScott Teel 		*nlocals = -1;
423166749d0dSScott Teel 	return rc;
423266749d0dSScott Teel }
423366749d0dSScott Teel 
423464ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
423564ce60caSDon Brace {
423664ce60caSDon Brace 	struct bmic_identify_physical_device *id_phys;
423764ce60caSDon Brace 	bool is_spare = false;
423864ce60caSDon Brace 	int rc;
423964ce60caSDon Brace 
424064ce60caSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
424164ce60caSDon Brace 	if (!id_phys)
424264ce60caSDon Brace 		return false;
424364ce60caSDon Brace 
424464ce60caSDon Brace 	rc = hpsa_bmic_id_physical_device(h,
424564ce60caSDon Brace 					lunaddrbytes,
424664ce60caSDon Brace 					GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
424764ce60caSDon Brace 					id_phys, sizeof(*id_phys));
424864ce60caSDon Brace 	if (rc == 0)
424964ce60caSDon Brace 		is_spare = (id_phys->more_flags >> 6) & 0x01;
425064ce60caSDon Brace 
425164ce60caSDon Brace 	kfree(id_phys);
425264ce60caSDon Brace 	return is_spare;
425364ce60caSDon Brace }
425464ce60caSDon Brace 
425564ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK                           0x1
425664ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
425764ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
425864ce60caSDon Brace 
425964ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE  6
426064ce60caSDon Brace 
426164ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
426264ce60caSDon Brace 				struct ext_report_lun_entry *rle)
426364ce60caSDon Brace {
426464ce60caSDon Brace 	u8 device_flags;
426564ce60caSDon Brace 	u8 device_type;
426664ce60caSDon Brace 
426764ce60caSDon Brace 	if (!MASKED_DEVICE(lunaddrbytes))
426864ce60caSDon Brace 		return false;
426964ce60caSDon Brace 
427064ce60caSDon Brace 	device_flags = rle->device_flags;
427164ce60caSDon Brace 	device_type = rle->device_type;
427264ce60caSDon Brace 
427364ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_NON_DISK) {
427464ce60caSDon Brace 		if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
427564ce60caSDon Brace 			return false;
427664ce60caSDon Brace 		return true;
427764ce60caSDon Brace 	}
427864ce60caSDon Brace 
427964ce60caSDon Brace 	if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
428064ce60caSDon Brace 		return false;
428164ce60caSDon Brace 
428264ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
428364ce60caSDon Brace 		return false;
428464ce60caSDon Brace 
428564ce60caSDon Brace 	/*
428664ce60caSDon Brace 	 * Spares may be spun down, we do not want to
428764ce60caSDon Brace 	 * do an Inquiry to a RAID set spare drive as
428864ce60caSDon Brace 	 * that would have them spun up, that is a
428964ce60caSDon Brace 	 * performance hit because I/O to the RAID device
429064ce60caSDon Brace 	 * stops while the spin up occurs which can take
429164ce60caSDon Brace 	 * over 50 seconds.
429264ce60caSDon Brace 	 */
429364ce60caSDon Brace 	if (hpsa_is_disk_spare(h, lunaddrbytes))
429464ce60caSDon Brace 		return true;
429564ce60caSDon Brace 
429664ce60caSDon Brace 	return false;
429764ce60caSDon Brace }
429866749d0dSScott Teel 
42998aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h)
4300edd16368SStephen M. Cameron {
4301edd16368SStephen M. Cameron 	/* the idea here is we could get notified
4302edd16368SStephen M. Cameron 	 * that some devices have changed, so we do a report
4303edd16368SStephen M. Cameron 	 * physical luns and report logical luns cmd, and adjust
4304edd16368SStephen M. Cameron 	 * our list of devices accordingly.
4305edd16368SStephen M. Cameron 	 *
4306edd16368SStephen M. Cameron 	 * The scsi3addr's of devices won't change so long as the
4307edd16368SStephen M. Cameron 	 * adapter is not reset.  That means we can rescan and
4308edd16368SStephen M. Cameron 	 * tell which devices we already know about, vs. new
4309edd16368SStephen M. Cameron 	 * devices, vs.  disappearing devices.
4310edd16368SStephen M. Cameron 	 */
4311a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list = NULL;
4312edd16368SStephen M. Cameron 	struct ReportLUNdata *logdev_list = NULL;
431303383736SDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
431466749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr = NULL;
431501a02ffcSStephen M. Cameron 	u32 nphysicals = 0;
431601a02ffcSStephen M. Cameron 	u32 nlogicals = 0;
431766749d0dSScott Teel 	u32 nlocal_logicals = 0;
431801a02ffcSStephen M. Cameron 	u32 ndev_allocated = 0;
4319edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4320edd16368SStephen M. Cameron 	int ncurrent = 0;
43214f4eb9f1SScott Teel 	int i, n_ext_target_devs, ndevs_to_allocate;
4322339b2b14SStephen M. Cameron 	int raid_ctlr_position;
432304fa2f44SKevin Barnett 	bool physical_device;
4324aca4a520SScott Teel 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4325edd16368SStephen M. Cameron 
43266396bb22SKees Cook 	currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
432792084715SStephen M. Cameron 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
432892084715SStephen M. Cameron 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4329edd16368SStephen M. Cameron 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
433003383736SDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
433166749d0dSScott Teel 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4332edd16368SStephen M. Cameron 
433303383736SDon Brace 	if (!currentsd || !physdev_list || !logdev_list ||
433466749d0dSScott Teel 		!tmpdevice || !id_phys || !id_ctlr) {
4335edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory\n");
4336edd16368SStephen M. Cameron 		goto out;
4337edd16368SStephen M. Cameron 	}
4338edd16368SStephen M. Cameron 	memset(lunzerobits, 0, sizeof(lunzerobits));
4339edd16368SStephen M. Cameron 
4340853633e8SDon Brace 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4341853633e8SDon Brace 
434203383736SDon Brace 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4343853633e8SDon Brace 			logdev_list, &nlogicals)) {
4344853633e8SDon Brace 		h->drv_req_rescan = 1;
4345edd16368SStephen M. Cameron 		goto out;
4346853633e8SDon Brace 	}
4347edd16368SStephen M. Cameron 
434866749d0dSScott Teel 	/* Set number of local logicals (non PTRAID) */
434966749d0dSScott Teel 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
435066749d0dSScott Teel 		dev_warn(&h->pdev->dev,
435166749d0dSScott Teel 			"%s: Can't determine number of local logical devices.\n",
435266749d0dSScott Teel 			__func__);
435366749d0dSScott Teel 	}
4354edd16368SStephen M. Cameron 
4355aca4a520SScott Teel 	/* We might see up to the maximum number of logical and physical disks
4356aca4a520SScott Teel 	 * plus external target devices, and a device for the local RAID
4357aca4a520SScott Teel 	 * controller.
4358edd16368SStephen M. Cameron 	 */
4359aca4a520SScott Teel 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4360edd16368SStephen M. Cameron 
43614e188184SBader Ali Saleh 	hpsa_ext_ctrl_present(h, physdev_list);
43624e188184SBader Ali Saleh 
4363edd16368SStephen M. Cameron 	/* Allocate the per device structures */
4364edd16368SStephen M. Cameron 	for (i = 0; i < ndevs_to_allocate; i++) {
4365b7ec021fSScott Teel 		if (i >= HPSA_MAX_DEVICES) {
4366b7ec021fSScott Teel 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4367b7ec021fSScott Teel 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4368b7ec021fSScott Teel 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4369b7ec021fSScott Teel 			break;
4370b7ec021fSScott Teel 		}
4371b7ec021fSScott Teel 
4372edd16368SStephen M. Cameron 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4373edd16368SStephen M. Cameron 		if (!currentsd[i]) {
4374853633e8SDon Brace 			h->drv_req_rescan = 1;
4375edd16368SStephen M. Cameron 			goto out;
4376edd16368SStephen M. Cameron 		}
4377edd16368SStephen M. Cameron 		ndev_allocated++;
4378edd16368SStephen M. Cameron 	}
4379edd16368SStephen M. Cameron 
43808645291bSStephen M. Cameron 	if (is_scsi_rev_5(h))
4381339b2b14SStephen M. Cameron 		raid_ctlr_position = 0;
4382339b2b14SStephen M. Cameron 	else
4383339b2b14SStephen M. Cameron 		raid_ctlr_position = nphysicals + nlogicals;
4384339b2b14SStephen M. Cameron 
4385edd16368SStephen M. Cameron 	/* adjust our table of devices */
43864f4eb9f1SScott Teel 	n_ext_target_devs = 0;
4387edd16368SStephen M. Cameron 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
43880b0e1d6cSStephen M. Cameron 		u8 *lunaddrbytes, is_OBDR = 0;
4389683fc444SDon Brace 		int rc = 0;
4390f2039b03SDon Brace 		int phys_dev_index = i - (raid_ctlr_position == 0);
439164ce60caSDon Brace 		bool skip_device = false;
4392edd16368SStephen M. Cameron 
4393421bf80cSScott Teel 		memset(tmpdevice, 0, sizeof(*tmpdevice));
4394421bf80cSScott Teel 
439504fa2f44SKevin Barnett 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4396edd16368SStephen M. Cameron 
4397edd16368SStephen M. Cameron 		/* Figure out where the LUN ID info is coming from */
4398339b2b14SStephen M. Cameron 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4399339b2b14SStephen M. Cameron 			i, nphysicals, nlogicals, physdev_list, logdev_list);
440041ce4c35SStephen Cameron 
440186cf7130SDon Brace 		/* Determine if this is a lun from an external target array */
440286cf7130SDon Brace 		tmpdevice->external =
440386cf7130SDon Brace 			figure_external_status(h, raid_ctlr_position, i,
440486cf7130SDon Brace 						nphysicals, nlocal_logicals);
440586cf7130SDon Brace 
440664ce60caSDon Brace 		/*
440764ce60caSDon Brace 		 * Skip over some devices such as a spare.
440864ce60caSDon Brace 		 */
440964ce60caSDon Brace 		if (!tmpdevice->external && physical_device) {
441064ce60caSDon Brace 			skip_device = hpsa_skip_device(h, lunaddrbytes,
441164ce60caSDon Brace 					&physdev_list->LUN[phys_dev_index]);
441264ce60caSDon Brace 			if (skip_device)
4413edd16368SStephen M. Cameron 				continue;
441464ce60caSDon Brace 		}
4415edd16368SStephen M. Cameron 
4416b2582a65SDon Brace 		/* Get device type, vendor, model, device id, raid_map */
4417683fc444SDon Brace 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4418683fc444SDon Brace 							&is_OBDR);
4419683fc444SDon Brace 		if (rc == -ENOMEM) {
4420683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4421683fc444SDon Brace 				"Out of memory, rescan deferred.\n");
4422853633e8SDon Brace 			h->drv_req_rescan = 1;
4423683fc444SDon Brace 			goto out;
4424853633e8SDon Brace 		}
4425683fc444SDon Brace 		if (rc) {
442685b29008SDon Brace 			h->drv_req_rescan = 1;
4427683fc444SDon Brace 			continue;
4428683fc444SDon Brace 		}
4429683fc444SDon Brace 
44301f310bdeSStephen M. Cameron 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4431edd16368SStephen M. Cameron 		this_device = currentsd[ncurrent];
4432edd16368SStephen M. Cameron 
4433edd16368SStephen M. Cameron 		*this_device = *tmpdevice;
443404fa2f44SKevin Barnett 		this_device->physical_device = physical_device;
4435edd16368SStephen M. Cameron 
443604fa2f44SKevin Barnett 		/*
443704fa2f44SKevin Barnett 		 * Expose all devices except for physical devices that
443804fa2f44SKevin Barnett 		 * are masked.
443904fa2f44SKevin Barnett 		 */
444004fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
44412a168208SKevin Barnett 			this_device->expose_device = 0;
44422a168208SKevin Barnett 		else
44432a168208SKevin Barnett 			this_device->expose_device = 1;
444441ce4c35SStephen Cameron 
4445d04e62b9SKevin Barnett 
4446d04e62b9SKevin Barnett 		/*
4447d04e62b9SKevin Barnett 		 * Get the SAS address for physical devices that are exposed.
4448d04e62b9SKevin Barnett 		 */
4449d04e62b9SKevin Barnett 		if (this_device->physical_device && this_device->expose_device)
4450d04e62b9SKevin Barnett 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4451edd16368SStephen M. Cameron 
4452edd16368SStephen M. Cameron 		switch (this_device->devtype) {
44530b0e1d6cSStephen M. Cameron 		case TYPE_ROM:
4454edd16368SStephen M. Cameron 			/* We don't *really* support actual CD-ROM devices,
4455edd16368SStephen M. Cameron 			 * just "One Button Disaster Recovery" tape drive
4456edd16368SStephen M. Cameron 			 * which temporarily pretends to be a CD-ROM drive.
4457edd16368SStephen M. Cameron 			 * So we check that the device is really an OBDR tape
4458edd16368SStephen M. Cameron 			 * device by checking for "$DR-10" in bytes 43-48 of
4459edd16368SStephen M. Cameron 			 * the inquiry data.
4460edd16368SStephen M. Cameron 			 */
44610b0e1d6cSStephen M. Cameron 			if (is_OBDR)
4462edd16368SStephen M. Cameron 				ncurrent++;
4463edd16368SStephen M. Cameron 			break;
4464edd16368SStephen M. Cameron 		case TYPE_DISK:
4465af15ed36SDon Brace 		case TYPE_ZBC:
446604fa2f44SKevin Barnett 			if (this_device->physical_device) {
4467b9092b79SKevin Barnett 				/* The disk is in HBA mode. */
4468b9092b79SKevin Barnett 				/* Never use RAID mapper in HBA mode. */
4469ecf418d1SJoe Handzik 				this_device->offload_enabled = 0;
447003383736SDon Brace 				hpsa_get_ioaccel_drive_info(h, this_device,
4471f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4472f2039b03SDon Brace 				hpsa_get_path_info(this_device,
4473f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4474b9092b79SKevin Barnett 			}
4475edd16368SStephen M. Cameron 			ncurrent++;
4476edd16368SStephen M. Cameron 			break;
4477edd16368SStephen M. Cameron 		case TYPE_TAPE:
4478edd16368SStephen M. Cameron 		case TYPE_MEDIUM_CHANGER:
4479cca8f13bSDon Brace 			ncurrent++;
4480cca8f13bSDon Brace 			break;
448141ce4c35SStephen Cameron 		case TYPE_ENCLOSURE:
448217a9e54aSDon Brace 			if (!this_device->external)
4483cca8f13bSDon Brace 				hpsa_get_enclosure_info(h, lunaddrbytes,
4484cca8f13bSDon Brace 						physdev_list, phys_dev_index,
4485cca8f13bSDon Brace 						this_device);
448641ce4c35SStephen Cameron 			ncurrent++;
448741ce4c35SStephen Cameron 			break;
4488edd16368SStephen M. Cameron 		case TYPE_RAID:
4489edd16368SStephen M. Cameron 			/* Only present the Smartarray HBA as a RAID controller.
4490edd16368SStephen M. Cameron 			 * If it's a RAID controller other than the HBA itself
4491edd16368SStephen M. Cameron 			 * (an external RAID controller, MSA500 or similar)
4492edd16368SStephen M. Cameron 			 * don't present it.
4493edd16368SStephen M. Cameron 			 */
4494edd16368SStephen M. Cameron 			if (!is_hba_lunid(lunaddrbytes))
4495edd16368SStephen M. Cameron 				break;
4496edd16368SStephen M. Cameron 			ncurrent++;
4497edd16368SStephen M. Cameron 			break;
4498edd16368SStephen M. Cameron 		default:
4499edd16368SStephen M. Cameron 			break;
4500edd16368SStephen M. Cameron 		}
4501cfe5badcSScott Teel 		if (ncurrent >= HPSA_MAX_DEVICES)
4502edd16368SStephen M. Cameron 			break;
4503edd16368SStephen M. Cameron 	}
4504d04e62b9SKevin Barnett 
4505d04e62b9SKevin Barnett 	if (h->sas_host == NULL) {
4506d04e62b9SKevin Barnett 		int rc = 0;
4507d04e62b9SKevin Barnett 
4508d04e62b9SKevin Barnett 		rc = hpsa_add_sas_host(h);
4509d04e62b9SKevin Barnett 		if (rc) {
4510d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
4511d04e62b9SKevin Barnett 				"Could not add sas host %d\n", rc);
4512d04e62b9SKevin Barnett 			goto out;
4513d04e62b9SKevin Barnett 		}
4514d04e62b9SKevin Barnett 	}
4515d04e62b9SKevin Barnett 
45168aa60681SDon Brace 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4517edd16368SStephen M. Cameron out:
4518edd16368SStephen M. Cameron 	kfree(tmpdevice);
4519edd16368SStephen M. Cameron 	for (i = 0; i < ndev_allocated; i++)
4520edd16368SStephen M. Cameron 		kfree(currentsd[i]);
4521edd16368SStephen M. Cameron 	kfree(currentsd);
4522edd16368SStephen M. Cameron 	kfree(physdev_list);
4523edd16368SStephen M. Cameron 	kfree(logdev_list);
452466749d0dSScott Teel 	kfree(id_ctlr);
452503383736SDon Brace 	kfree(id_phys);
4526edd16368SStephen M. Cameron }
4527edd16368SStephen M. Cameron 
4528ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4529ec5cbf04SWebb Scales 				   struct scatterlist *sg)
4530ec5cbf04SWebb Scales {
4531ec5cbf04SWebb Scales 	u64 addr64 = (u64) sg_dma_address(sg);
4532ec5cbf04SWebb Scales 	unsigned int len = sg_dma_len(sg);
4533ec5cbf04SWebb Scales 
4534ec5cbf04SWebb Scales 	desc->Addr = cpu_to_le64(addr64);
4535ec5cbf04SWebb Scales 	desc->Len = cpu_to_le32(len);
4536ec5cbf04SWebb Scales 	desc->Ext = 0;
4537ec5cbf04SWebb Scales }
4538ec5cbf04SWebb Scales 
4539c7ee65b3SWebb Scales /*
4540c7ee65b3SWebb Scales  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4541edd16368SStephen M. Cameron  * dma mapping  and fills in the scatter gather entries of the
4542edd16368SStephen M. Cameron  * hpsa command, cp.
4543edd16368SStephen M. Cameron  */
454433a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h,
4545edd16368SStephen M. Cameron 		struct CommandList *cp,
4546edd16368SStephen M. Cameron 		struct scsi_cmnd *cmd)
4547edd16368SStephen M. Cameron {
4548edd16368SStephen M. Cameron 	struct scatterlist *sg;
4549b3a7ba7cSWebb Scales 	int use_sg, i, sg_limit, chained, last_sg;
455033a2ffceSStephen M. Cameron 	struct SGDescriptor *curr_sg;
4551edd16368SStephen M. Cameron 
455233a2ffceSStephen M. Cameron 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4553edd16368SStephen M. Cameron 
4554edd16368SStephen M. Cameron 	use_sg = scsi_dma_map(cmd);
4555edd16368SStephen M. Cameron 	if (use_sg < 0)
4556edd16368SStephen M. Cameron 		return use_sg;
4557edd16368SStephen M. Cameron 
4558edd16368SStephen M. Cameron 	if (!use_sg)
4559edd16368SStephen M. Cameron 		goto sglist_finished;
4560edd16368SStephen M. Cameron 
4561b3a7ba7cSWebb Scales 	/*
4562b3a7ba7cSWebb Scales 	 * If the number of entries is greater than the max for a single list,
4563b3a7ba7cSWebb Scales 	 * then we have a chained list; we will set up all but one entry in the
4564b3a7ba7cSWebb Scales 	 * first list (the last entry is saved for link information);
4565b3a7ba7cSWebb Scales 	 * otherwise, we don't have a chained list and we'll set up at each of
4566b3a7ba7cSWebb Scales 	 * the entries in the one list.
4567b3a7ba7cSWebb Scales 	 */
456833a2ffceSStephen M. Cameron 	curr_sg = cp->SG;
4569b3a7ba7cSWebb Scales 	chained = use_sg > h->max_cmd_sg_entries;
4570b3a7ba7cSWebb Scales 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4571b3a7ba7cSWebb Scales 	last_sg = scsi_sg_count(cmd) - 1;
4572b3a7ba7cSWebb Scales 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4573ec5cbf04SWebb Scales 		hpsa_set_sg_descriptor(curr_sg, sg);
457433a2ffceSStephen M. Cameron 		curr_sg++;
457533a2ffceSStephen M. Cameron 	}
4576ec5cbf04SWebb Scales 
4577b3a7ba7cSWebb Scales 	if (chained) {
4578b3a7ba7cSWebb Scales 		/*
4579b3a7ba7cSWebb Scales 		 * Continue with the chained list.  Set curr_sg to the chained
4580b3a7ba7cSWebb Scales 		 * list.  Modify the limit to the total count less the entries
4581b3a7ba7cSWebb Scales 		 * we've already set up.  Resume the scan at the list entry
4582b3a7ba7cSWebb Scales 		 * where the previous loop left off.
4583b3a7ba7cSWebb Scales 		 */
4584b3a7ba7cSWebb Scales 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4585b3a7ba7cSWebb Scales 		sg_limit = use_sg - sg_limit;
4586b3a7ba7cSWebb Scales 		for_each_sg(sg, sg, sg_limit, i) {
4587b3a7ba7cSWebb Scales 			hpsa_set_sg_descriptor(curr_sg, sg);
4588b3a7ba7cSWebb Scales 			curr_sg++;
4589b3a7ba7cSWebb Scales 		}
4590b3a7ba7cSWebb Scales 	}
4591b3a7ba7cSWebb Scales 
4592ec5cbf04SWebb Scales 	/* Back the pointer up to the last entry and mark it as "last". */
4593b3a7ba7cSWebb Scales 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
459433a2ffceSStephen M. Cameron 
459533a2ffceSStephen M. Cameron 	if (use_sg + chained > h->maxSG)
459633a2ffceSStephen M. Cameron 		h->maxSG = use_sg + chained;
459733a2ffceSStephen M. Cameron 
459833a2ffceSStephen M. Cameron 	if (chained) {
459933a2ffceSStephen M. Cameron 		cp->Header.SGList = h->max_cmd_sg_entries;
460050a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4601e2bea6dfSStephen M. Cameron 		if (hpsa_map_sg_chain_block(h, cp)) {
4602e2bea6dfSStephen M. Cameron 			scsi_dma_unmap(cmd);
4603e2bea6dfSStephen M. Cameron 			return -1;
4604e2bea6dfSStephen M. Cameron 		}
460533a2ffceSStephen M. Cameron 		return 0;
4606edd16368SStephen M. Cameron 	}
4607edd16368SStephen M. Cameron 
4608edd16368SStephen M. Cameron sglist_finished:
4609edd16368SStephen M. Cameron 
461001a02ffcSStephen M. Cameron 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4611c7ee65b3SWebb Scales 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4612edd16368SStephen M. Cameron 	return 0;
4613edd16368SStephen M. Cameron }
4614edd16368SStephen M. Cameron 
4615b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h,
4616b63c64acSDon Brace 						u8 *cdb, int cdb_len,
4617b63c64acSDon Brace 						const char *func)
4618b63c64acSDon Brace {
4619f4d0ad1fSAndy Shevchenko 	dev_warn(&h->pdev->dev,
4620f4d0ad1fSAndy Shevchenko 		 "%s: Blocking zero-length request: CDB:%*phN\n",
4621f4d0ad1fSAndy Shevchenko 		 func, cdb_len, cdb);
4622b63c64acSDon Brace }
4623b63c64acSDon Brace 
4624b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1
4625b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */
4626b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb)
4627b63c64acSDon Brace {
4628b63c64acSDon Brace 	u32 block_cnt;
4629b63c64acSDon Brace 
4630b63c64acSDon Brace 	/* Block zero-length transfer sizes on certain commands. */
4631b63c64acSDon Brace 	switch (cdb[0]) {
4632b63c64acSDon Brace 	case READ_10:
4633b63c64acSDon Brace 	case WRITE_10:
4634b63c64acSDon Brace 	case VERIFY:		/* 0x2F */
4635b63c64acSDon Brace 	case WRITE_VERIFY:	/* 0x2E */
4636b63c64acSDon Brace 		block_cnt = get_unaligned_be16(&cdb[7]);
4637b63c64acSDon Brace 		break;
4638b63c64acSDon Brace 	case READ_12:
4639b63c64acSDon Brace 	case WRITE_12:
4640b63c64acSDon Brace 	case VERIFY_12: /* 0xAF */
4641b63c64acSDon Brace 	case WRITE_VERIFY_12:	/* 0xAE */
4642b63c64acSDon Brace 		block_cnt = get_unaligned_be32(&cdb[6]);
4643b63c64acSDon Brace 		break;
4644b63c64acSDon Brace 	case READ_16:
4645b63c64acSDon Brace 	case WRITE_16:
4646b63c64acSDon Brace 	case VERIFY_16:		/* 0x8F */
4647b63c64acSDon Brace 		block_cnt = get_unaligned_be32(&cdb[10]);
4648b63c64acSDon Brace 		break;
4649b63c64acSDon Brace 	default:
4650b63c64acSDon Brace 		return false;
4651b63c64acSDon Brace 	}
4652b63c64acSDon Brace 
4653b63c64acSDon Brace 	return block_cnt == 0;
4654b63c64acSDon Brace }
4655b63c64acSDon Brace 
4656283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4657283b4a9bSStephen M. Cameron {
4658283b4a9bSStephen M. Cameron 	int is_write = 0;
4659283b4a9bSStephen M. Cameron 	u32 block;
4660283b4a9bSStephen M. Cameron 	u32 block_cnt;
4661283b4a9bSStephen M. Cameron 
4662283b4a9bSStephen M. Cameron 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4663283b4a9bSStephen M. Cameron 	switch (cdb[0]) {
4664283b4a9bSStephen M. Cameron 	case WRITE_6:
4665283b4a9bSStephen M. Cameron 	case WRITE_12:
4666283b4a9bSStephen M. Cameron 		is_write = 1;
46675dfdb089SGustavo A. R. Silva 		/* fall through */
4668283b4a9bSStephen M. Cameron 	case READ_6:
4669283b4a9bSStephen M. Cameron 	case READ_12:
4670283b4a9bSStephen M. Cameron 		if (*cdb_len == 6) {
4671abbada71SMahesh Rajashekhara 			block = (((cdb[1] & 0x1F) << 16) |
4672abbada71SMahesh Rajashekhara 				(cdb[2] << 8) |
4673abbada71SMahesh Rajashekhara 				cdb[3]);
4674283b4a9bSStephen M. Cameron 			block_cnt = cdb[4];
4675c8a6c9a6SDon Brace 			if (block_cnt == 0)
4676c8a6c9a6SDon Brace 				block_cnt = 256;
4677283b4a9bSStephen M. Cameron 		} else {
4678283b4a9bSStephen M. Cameron 			BUG_ON(*cdb_len != 12);
4679c8a6c9a6SDon Brace 			block = get_unaligned_be32(&cdb[2]);
4680c8a6c9a6SDon Brace 			block_cnt = get_unaligned_be32(&cdb[6]);
4681283b4a9bSStephen M. Cameron 		}
4682283b4a9bSStephen M. Cameron 		if (block_cnt > 0xffff)
4683283b4a9bSStephen M. Cameron 			return IO_ACCEL_INELIGIBLE;
4684283b4a9bSStephen M. Cameron 
4685283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
4686283b4a9bSStephen M. Cameron 		cdb[1] = 0;
4687283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (block >> 24);
4688283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (block >> 16);
4689283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (block >> 8);
4690283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (block);
4691283b4a9bSStephen M. Cameron 		cdb[6] = 0;
4692283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (block_cnt >> 8);
4693283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (block_cnt);
4694283b4a9bSStephen M. Cameron 		cdb[9] = 0;
4695283b4a9bSStephen M. Cameron 		*cdb_len = 10;
4696283b4a9bSStephen M. Cameron 		break;
4697283b4a9bSStephen M. Cameron 	}
4698283b4a9bSStephen M. Cameron 	return 0;
4699283b4a9bSStephen M. Cameron }
4700283b4a9bSStephen M. Cameron 
4701c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4702283b4a9bSStephen M. Cameron 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
470303383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4704e1f7de0cSMatt Gates {
4705e1f7de0cSMatt Gates 	struct scsi_cmnd *cmd = c->scsi_cmd;
4706e1f7de0cSMatt Gates 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4707e1f7de0cSMatt Gates 	unsigned int len;
4708e1f7de0cSMatt Gates 	unsigned int total_len = 0;
4709e1f7de0cSMatt Gates 	struct scatterlist *sg;
4710e1f7de0cSMatt Gates 	u64 addr64;
4711e1f7de0cSMatt Gates 	int use_sg, i;
4712e1f7de0cSMatt Gates 	struct SGDescriptor *curr_sg;
4713e1f7de0cSMatt Gates 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4714e1f7de0cSMatt Gates 
4715283b4a9bSStephen M. Cameron 	/* TODO: implement chaining support */
471603383736SDon Brace 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
471703383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4718283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
471903383736SDon Brace 	}
4720283b4a9bSStephen M. Cameron 
4721e1f7de0cSMatt Gates 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4722e1f7de0cSMatt Gates 
4723b63c64acSDon Brace 	if (is_zero_length_transfer(cdb)) {
4724b63c64acSDon Brace 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4725b63c64acSDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4726b63c64acSDon Brace 		return IO_ACCEL_INELIGIBLE;
4727b63c64acSDon Brace 	}
4728b63c64acSDon Brace 
472903383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
473003383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4731283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
473203383736SDon Brace 	}
4733283b4a9bSStephen M. Cameron 
4734e1f7de0cSMatt Gates 	c->cmd_type = CMD_IOACCEL1;
4735e1f7de0cSMatt Gates 
4736e1f7de0cSMatt Gates 	/* Adjust the DMA address to point to the accelerated command buffer */
4737e1f7de0cSMatt Gates 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4738e1f7de0cSMatt Gates 				(c->cmdindex * sizeof(*cp));
4739e1f7de0cSMatt Gates 	BUG_ON(c->busaddr & 0x0000007F);
4740e1f7de0cSMatt Gates 
4741e1f7de0cSMatt Gates 	use_sg = scsi_dma_map(cmd);
474203383736SDon Brace 	if (use_sg < 0) {
474303383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4744e1f7de0cSMatt Gates 		return use_sg;
474503383736SDon Brace 	}
4746e1f7de0cSMatt Gates 
4747e1f7de0cSMatt Gates 	if (use_sg) {
4748e1f7de0cSMatt Gates 		curr_sg = cp->SG;
4749e1f7de0cSMatt Gates 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4750e1f7de0cSMatt Gates 			addr64 = (u64) sg_dma_address(sg);
4751e1f7de0cSMatt Gates 			len  = sg_dma_len(sg);
4752e1f7de0cSMatt Gates 			total_len += len;
475350a0decfSStephen M. Cameron 			curr_sg->Addr = cpu_to_le64(addr64);
475450a0decfSStephen M. Cameron 			curr_sg->Len = cpu_to_le32(len);
475550a0decfSStephen M. Cameron 			curr_sg->Ext = cpu_to_le32(0);
4756e1f7de0cSMatt Gates 			curr_sg++;
4757e1f7de0cSMatt Gates 		}
475850a0decfSStephen M. Cameron 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4759e1f7de0cSMatt Gates 
4760e1f7de0cSMatt Gates 		switch (cmd->sc_data_direction) {
4761e1f7de0cSMatt Gates 		case DMA_TO_DEVICE:
4762e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_OUT;
4763e1f7de0cSMatt Gates 			break;
4764e1f7de0cSMatt Gates 		case DMA_FROM_DEVICE:
4765e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_IN;
4766e1f7de0cSMatt Gates 			break;
4767e1f7de0cSMatt Gates 		case DMA_NONE:
4768e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_NODATAXFER;
4769e1f7de0cSMatt Gates 			break;
4770e1f7de0cSMatt Gates 		default:
4771e1f7de0cSMatt Gates 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4772e1f7de0cSMatt Gates 			cmd->sc_data_direction);
4773e1f7de0cSMatt Gates 			BUG();
4774e1f7de0cSMatt Gates 			break;
4775e1f7de0cSMatt Gates 		}
4776e1f7de0cSMatt Gates 	} else {
4777e1f7de0cSMatt Gates 		control |= IOACCEL1_CONTROL_NODATAXFER;
4778e1f7de0cSMatt Gates 	}
4779e1f7de0cSMatt Gates 
4780c349775eSScott Teel 	c->Header.SGList = use_sg;
4781e1f7de0cSMatt Gates 	/* Fill out the command structure to submit */
47822b08b3e9SDon Brace 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
47832b08b3e9SDon Brace 	cp->transfer_len = cpu_to_le32(total_len);
47842b08b3e9SDon Brace 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
47852b08b3e9SDon Brace 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
47862b08b3e9SDon Brace 	cp->control = cpu_to_le32(control);
4787283b4a9bSStephen M. Cameron 	memcpy(cp->CDB, cdb, cdb_len);
4788283b4a9bSStephen M. Cameron 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4789c349775eSScott Teel 	/* Tag was already set at init time. */
4790e1f7de0cSMatt Gates 	enqueue_cmd_and_start_io(h, c);
4791e1f7de0cSMatt Gates 	return 0;
4792e1f7de0cSMatt Gates }
4793edd16368SStephen M. Cameron 
4794283b4a9bSStephen M. Cameron /*
4795283b4a9bSStephen M. Cameron  * Queue a command directly to a device behind the controller using the
4796283b4a9bSStephen M. Cameron  * I/O accelerator path.
4797283b4a9bSStephen M. Cameron  */
4798283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4799283b4a9bSStephen M. Cameron 	struct CommandList *c)
4800283b4a9bSStephen M. Cameron {
4801283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4802283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4803283b4a9bSStephen M. Cameron 
480445e596cdSDon Brace 	if (!dev)
480545e596cdSDon Brace 		return -1;
480645e596cdSDon Brace 
480703383736SDon Brace 	c->phys_disk = dev;
480803383736SDon Brace 
4809c5dfd106SDon Brace 	if (dev->in_reset)
4810c5dfd106SDon Brace 		return -1;
4811c5dfd106SDon Brace 
4812283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
481303383736SDon Brace 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4814283b4a9bSStephen M. Cameron }
4815283b4a9bSStephen M. Cameron 
4816dd0e19f3SScott Teel /*
4817dd0e19f3SScott Teel  * Set encryption parameters for the ioaccel2 request
4818dd0e19f3SScott Teel  */
4819dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h,
4820dd0e19f3SScott Teel 	struct CommandList *c, struct io_accel2_cmd *cp)
4821dd0e19f3SScott Teel {
4822dd0e19f3SScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4823dd0e19f3SScott Teel 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4824dd0e19f3SScott Teel 	struct raid_map_data *map = &dev->raid_map;
4825dd0e19f3SScott Teel 	u64 first_block;
4826dd0e19f3SScott Teel 
4827dd0e19f3SScott Teel 	/* Are we doing encryption on this device */
48282b08b3e9SDon Brace 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4829dd0e19f3SScott Teel 		return;
4830dd0e19f3SScott Teel 	/* Set the data encryption key index. */
4831dd0e19f3SScott Teel 	cp->dekindex = map->dekindex;
4832dd0e19f3SScott Teel 
4833dd0e19f3SScott Teel 	/* Set the encryption enable flag, encoded into direction field. */
4834dd0e19f3SScott Teel 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4835dd0e19f3SScott Teel 
4836dd0e19f3SScott Teel 	/* Set encryption tweak values based on logical block address
4837dd0e19f3SScott Teel 	 * If block size is 512, tweak value is LBA.
4838dd0e19f3SScott Teel 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4839dd0e19f3SScott Teel 	 */
4840dd0e19f3SScott Teel 	switch (cmd->cmnd[0]) {
4841dd0e19f3SScott Teel 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4842dd0e19f3SScott Teel 	case READ_6:
4843abbada71SMahesh Rajashekhara 	case WRITE_6:
4844abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4845abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
4846abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
4847dd0e19f3SScott Teel 		break;
4848dd0e19f3SScott Teel 	case WRITE_10:
4849dd0e19f3SScott Teel 	case READ_10:
4850dd0e19f3SScott Teel 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4851dd0e19f3SScott Teel 	case WRITE_12:
4852dd0e19f3SScott Teel 	case READ_12:
48532b08b3e9SDon Brace 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4854dd0e19f3SScott Teel 		break;
4855dd0e19f3SScott Teel 	case WRITE_16:
4856dd0e19f3SScott Teel 	case READ_16:
48572b08b3e9SDon Brace 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4858dd0e19f3SScott Teel 		break;
4859dd0e19f3SScott Teel 	default:
4860dd0e19f3SScott Teel 		dev_err(&h->pdev->dev,
48612b08b3e9SDon Brace 			"ERROR: %s: size (0x%x) not supported for encryption\n",
48622b08b3e9SDon Brace 			__func__, cmd->cmnd[0]);
4863dd0e19f3SScott Teel 		BUG();
4864dd0e19f3SScott Teel 		break;
4865dd0e19f3SScott Teel 	}
48662b08b3e9SDon Brace 
48672b08b3e9SDon Brace 	if (le32_to_cpu(map->volume_blk_size) != 512)
48682b08b3e9SDon Brace 		first_block = first_block *
48692b08b3e9SDon Brace 				le32_to_cpu(map->volume_blk_size)/512;
48702b08b3e9SDon Brace 
48712b08b3e9SDon Brace 	cp->tweak_lower = cpu_to_le32(first_block);
48722b08b3e9SDon Brace 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4873dd0e19f3SScott Teel }
4874dd0e19f3SScott Teel 
4875c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4876c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
487703383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4878c349775eSScott Teel {
4879c349775eSScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4880c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4881c349775eSScott Teel 	struct ioaccel2_sg_element *curr_sg;
4882c349775eSScott Teel 	int use_sg, i;
4883c349775eSScott Teel 	struct scatterlist *sg;
4884c349775eSScott Teel 	u64 addr64;
4885c349775eSScott Teel 	u32 len;
4886c349775eSScott Teel 	u32 total_len = 0;
4887c349775eSScott Teel 
488845e596cdSDon Brace 	if (!cmd->device)
488945e596cdSDon Brace 		return -1;
489045e596cdSDon Brace 
489145e596cdSDon Brace 	if (!cmd->device->hostdata)
489245e596cdSDon Brace 		return -1;
489345e596cdSDon Brace 
4894d9a729f3SWebb Scales 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4895c349775eSScott Teel 
4896b63c64acSDon Brace 	if (is_zero_length_transfer(cdb)) {
4897b63c64acSDon Brace 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4898b63c64acSDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4899b63c64acSDon Brace 		return IO_ACCEL_INELIGIBLE;
4900b63c64acSDon Brace 	}
4901b63c64acSDon Brace 
490203383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
490303383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4904c349775eSScott Teel 		return IO_ACCEL_INELIGIBLE;
490503383736SDon Brace 	}
490603383736SDon Brace 
4907c349775eSScott Teel 	c->cmd_type = CMD_IOACCEL2;
4908c349775eSScott Teel 	/* Adjust the DMA address to point to the accelerated command buffer */
4909c349775eSScott Teel 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4910c349775eSScott Teel 				(c->cmdindex * sizeof(*cp));
4911c349775eSScott Teel 	BUG_ON(c->busaddr & 0x0000007F);
4912c349775eSScott Teel 
4913c349775eSScott Teel 	memset(cp, 0, sizeof(*cp));
4914c349775eSScott Teel 	cp->IU_type = IOACCEL2_IU_TYPE;
4915c349775eSScott Teel 
4916c349775eSScott Teel 	use_sg = scsi_dma_map(cmd);
491703383736SDon Brace 	if (use_sg < 0) {
491803383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4919c349775eSScott Teel 		return use_sg;
492003383736SDon Brace 	}
4921c349775eSScott Teel 
4922c349775eSScott Teel 	if (use_sg) {
4923c349775eSScott Teel 		curr_sg = cp->sg;
4924d9a729f3SWebb Scales 		if (use_sg > h->ioaccel_maxsg) {
4925d9a729f3SWebb Scales 			addr64 = le64_to_cpu(
4926d9a729f3SWebb Scales 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4927d9a729f3SWebb Scales 			curr_sg->address = cpu_to_le64(addr64);
4928d9a729f3SWebb Scales 			curr_sg->length = 0;
4929d9a729f3SWebb Scales 			curr_sg->reserved[0] = 0;
4930d9a729f3SWebb Scales 			curr_sg->reserved[1] = 0;
4931d9a729f3SWebb Scales 			curr_sg->reserved[2] = 0;
4932625d7d35SDon Brace 			curr_sg->chain_indicator = IOACCEL2_CHAIN;
4933d9a729f3SWebb Scales 
4934d9a729f3SWebb Scales 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4935d9a729f3SWebb Scales 		}
4936c349775eSScott Teel 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4937c349775eSScott Teel 			addr64 = (u64) sg_dma_address(sg);
4938c349775eSScott Teel 			len  = sg_dma_len(sg);
4939c349775eSScott Teel 			total_len += len;
4940c349775eSScott Teel 			curr_sg->address = cpu_to_le64(addr64);
4941c349775eSScott Teel 			curr_sg->length = cpu_to_le32(len);
4942c349775eSScott Teel 			curr_sg->reserved[0] = 0;
4943c349775eSScott Teel 			curr_sg->reserved[1] = 0;
4944c349775eSScott Teel 			curr_sg->reserved[2] = 0;
4945c349775eSScott Teel 			curr_sg->chain_indicator = 0;
4946c349775eSScott Teel 			curr_sg++;
4947c349775eSScott Teel 		}
4948c349775eSScott Teel 
4949625d7d35SDon Brace 		/*
4950625d7d35SDon Brace 		 * Set the last s/g element bit
4951625d7d35SDon Brace 		 */
4952625d7d35SDon Brace 		(curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4953625d7d35SDon Brace 
4954c349775eSScott Teel 		switch (cmd->sc_data_direction) {
4955c349775eSScott Teel 		case DMA_TO_DEVICE:
4956dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4957dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4958c349775eSScott Teel 			break;
4959c349775eSScott Teel 		case DMA_FROM_DEVICE:
4960dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4961dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4962c349775eSScott Teel 			break;
4963c349775eSScott Teel 		case DMA_NONE:
4964dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4965dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_NO_DATA;
4966c349775eSScott Teel 			break;
4967c349775eSScott Teel 		default:
4968c349775eSScott Teel 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4969c349775eSScott Teel 				cmd->sc_data_direction);
4970c349775eSScott Teel 			BUG();
4971c349775eSScott Teel 			break;
4972c349775eSScott Teel 		}
4973c349775eSScott Teel 	} else {
4974dd0e19f3SScott Teel 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4975dd0e19f3SScott Teel 		cp->direction |= IOACCEL2_DIR_NO_DATA;
4976c349775eSScott Teel 	}
4977dd0e19f3SScott Teel 
4978dd0e19f3SScott Teel 	/* Set encryption parameters, if necessary */
4979dd0e19f3SScott Teel 	set_encrypt_ioaccel2(h, c, cp);
4980dd0e19f3SScott Teel 
49812b08b3e9SDon Brace 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4982f2405db8SDon Brace 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4983c349775eSScott Teel 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4984c349775eSScott Teel 
4985c349775eSScott Teel 	cp->data_len = cpu_to_le32(total_len);
4986c349775eSScott Teel 	cp->err_ptr = cpu_to_le64(c->busaddr +
4987c349775eSScott Teel 			offsetof(struct io_accel2_cmd, error_data));
498850a0decfSStephen M. Cameron 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4989c349775eSScott Teel 
4990d9a729f3SWebb Scales 	/* fill in sg elements */
4991d9a729f3SWebb Scales 	if (use_sg > h->ioaccel_maxsg) {
4992d9a729f3SWebb Scales 		cp->sg_count = 1;
4993a736e9b6SDon Brace 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4994d9a729f3SWebb Scales 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4995d9a729f3SWebb Scales 			atomic_dec(&phys_disk->ioaccel_cmds_out);
4996d9a729f3SWebb Scales 			scsi_dma_unmap(cmd);
4997d9a729f3SWebb Scales 			return -1;
4998d9a729f3SWebb Scales 		}
4999d9a729f3SWebb Scales 	} else
5000d9a729f3SWebb Scales 		cp->sg_count = (u8) use_sg;
5001d9a729f3SWebb Scales 
5002c5dfd106SDon Brace 	if (phys_disk->in_reset) {
5003c5dfd106SDon Brace 		cmd->result = DID_RESET << 16;
5004c5dfd106SDon Brace 		return -1;
5005c5dfd106SDon Brace 	}
5006c5dfd106SDon Brace 
5007c349775eSScott Teel 	enqueue_cmd_and_start_io(h, c);
5008c349775eSScott Teel 	return 0;
5009c349775eSScott Teel }
5010c349775eSScott Teel 
5011c349775eSScott Teel /*
5012c349775eSScott Teel  * Queue a command to the correct I/O accelerator path.
5013c349775eSScott Teel  */
5014c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5015c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
501603383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5017c349775eSScott Teel {
501845e596cdSDon Brace 	if (!c->scsi_cmd->device)
501945e596cdSDon Brace 		return -1;
502045e596cdSDon Brace 
502145e596cdSDon Brace 	if (!c->scsi_cmd->device->hostdata)
502245e596cdSDon Brace 		return -1;
502345e596cdSDon Brace 
5024c5dfd106SDon Brace 	if (phys_disk->in_reset)
5025c5dfd106SDon Brace 		return -1;
5026c5dfd106SDon Brace 
502703383736SDon Brace 	/* Try to honor the device's queue depth */
502803383736SDon Brace 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
502903383736SDon Brace 					phys_disk->queue_depth) {
503003383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
503103383736SDon Brace 		return IO_ACCEL_INELIGIBLE;
503203383736SDon Brace 	}
5033c349775eSScott Teel 	if (h->transMethod & CFGTBL_Trans_io_accel1)
5034c349775eSScott Teel 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
503503383736SDon Brace 						cdb, cdb_len, scsi3addr,
503603383736SDon Brace 						phys_disk);
5037c349775eSScott Teel 	else
5038c349775eSScott Teel 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
503903383736SDon Brace 						cdb, cdb_len, scsi3addr,
504003383736SDon Brace 						phys_disk);
5041c349775eSScott Teel }
5042c349775eSScott Teel 
50436b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map,
50446b80b18fSScott Teel 		int offload_to_mirror, u32 *map_index, u32 *current_group)
50456b80b18fSScott Teel {
50466b80b18fSScott Teel 	if (offload_to_mirror == 0)  {
50476b80b18fSScott Teel 		/* use physical disk in the first mirrored group. */
50482b08b3e9SDon Brace 		*map_index %= le16_to_cpu(map->data_disks_per_row);
50496b80b18fSScott Teel 		return;
50506b80b18fSScott Teel 	}
50516b80b18fSScott Teel 	do {
50526b80b18fSScott Teel 		/* determine mirror group that *map_index indicates */
50532b08b3e9SDon Brace 		*current_group = *map_index /
50542b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
50556b80b18fSScott Teel 		if (offload_to_mirror == *current_group)
50566b80b18fSScott Teel 			continue;
50572b08b3e9SDon Brace 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
50586b80b18fSScott Teel 			/* select map index from next group */
50592b08b3e9SDon Brace 			*map_index += le16_to_cpu(map->data_disks_per_row);
50606b80b18fSScott Teel 			(*current_group)++;
50616b80b18fSScott Teel 		} else {
50626b80b18fSScott Teel 			/* select map index from first group */
50632b08b3e9SDon Brace 			*map_index %= le16_to_cpu(map->data_disks_per_row);
50646b80b18fSScott Teel 			*current_group = 0;
50656b80b18fSScott Teel 		}
50666b80b18fSScott Teel 	} while (offload_to_mirror != *current_group);
50676b80b18fSScott Teel }
50686b80b18fSScott Teel 
5069283b4a9bSStephen M. Cameron /*
5070283b4a9bSStephen M. Cameron  * Attempt to perform offload RAID mapping for a logical volume I/O.
5071283b4a9bSStephen M. Cameron  */
5072283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5073283b4a9bSStephen M. Cameron 	struct CommandList *c)
5074283b4a9bSStephen M. Cameron {
5075283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
5076283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5077283b4a9bSStephen M. Cameron 	struct raid_map_data *map = &dev->raid_map;
5078283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map->data[0];
5079283b4a9bSStephen M. Cameron 	int is_write = 0;
5080283b4a9bSStephen M. Cameron 	u32 map_index;
5081283b4a9bSStephen M. Cameron 	u64 first_block, last_block;
5082283b4a9bSStephen M. Cameron 	u32 block_cnt;
5083283b4a9bSStephen M. Cameron 	u32 blocks_per_row;
5084283b4a9bSStephen M. Cameron 	u64 first_row, last_row;
5085283b4a9bSStephen M. Cameron 	u32 first_row_offset, last_row_offset;
5086283b4a9bSStephen M. Cameron 	u32 first_column, last_column;
50876b80b18fSScott Teel 	u64 r0_first_row, r0_last_row;
50886b80b18fSScott Teel 	u32 r5or6_blocks_per_row;
50896b80b18fSScott Teel 	u64 r5or6_first_row, r5or6_last_row;
50906b80b18fSScott Teel 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
50916b80b18fSScott Teel 	u32 r5or6_first_column, r5or6_last_column;
50926b80b18fSScott Teel 	u32 total_disks_per_row;
50936b80b18fSScott Teel 	u32 stripesize;
50946b80b18fSScott Teel 	u32 first_group, last_group, current_group;
5095283b4a9bSStephen M. Cameron 	u32 map_row;
5096283b4a9bSStephen M. Cameron 	u32 disk_handle;
5097283b4a9bSStephen M. Cameron 	u64 disk_block;
5098283b4a9bSStephen M. Cameron 	u32 disk_block_cnt;
5099283b4a9bSStephen M. Cameron 	u8 cdb[16];
5100283b4a9bSStephen M. Cameron 	u8 cdb_len;
51012b08b3e9SDon Brace 	u16 strip_size;
5102283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5103283b4a9bSStephen M. Cameron 	u64 tmpdiv;
5104283b4a9bSStephen M. Cameron #endif
51056b80b18fSScott Teel 	int offload_to_mirror;
5106283b4a9bSStephen M. Cameron 
510745e596cdSDon Brace 	if (!dev)
510845e596cdSDon Brace 		return -1;
510945e596cdSDon Brace 
5110c5dfd106SDon Brace 	if (dev->in_reset)
5111c5dfd106SDon Brace 		return -1;
5112c5dfd106SDon Brace 
5113283b4a9bSStephen M. Cameron 	/* check for valid opcode, get LBA and block count */
5114283b4a9bSStephen M. Cameron 	switch (cmd->cmnd[0]) {
5115283b4a9bSStephen M. Cameron 	case WRITE_6:
5116283b4a9bSStephen M. Cameron 		is_write = 1;
51175dfdb089SGustavo A. R. Silva 		/* fall through */
5118283b4a9bSStephen M. Cameron 	case READ_6:
5119abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5120abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
5121abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
5122283b4a9bSStephen M. Cameron 		block_cnt = cmd->cmnd[4];
51233fa89a04SStephen M. Cameron 		if (block_cnt == 0)
51243fa89a04SStephen M. Cameron 			block_cnt = 256;
5125283b4a9bSStephen M. Cameron 		break;
5126283b4a9bSStephen M. Cameron 	case WRITE_10:
5127283b4a9bSStephen M. Cameron 		is_write = 1;
51285dfdb089SGustavo A. R. Silva 		/* fall through */
5129283b4a9bSStephen M. Cameron 	case READ_10:
5130283b4a9bSStephen M. Cameron 		first_block =
5131283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5132283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5133283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5134283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5135283b4a9bSStephen M. Cameron 		block_cnt =
5136283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 8) |
5137283b4a9bSStephen M. Cameron 			cmd->cmnd[8];
5138283b4a9bSStephen M. Cameron 		break;
5139283b4a9bSStephen M. Cameron 	case WRITE_12:
5140283b4a9bSStephen M. Cameron 		is_write = 1;
51415dfdb089SGustavo A. R. Silva 		/* fall through */
5142283b4a9bSStephen M. Cameron 	case READ_12:
5143283b4a9bSStephen M. Cameron 		first_block =
5144283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5145283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5146283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5147283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5148283b4a9bSStephen M. Cameron 		block_cnt =
5149283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[6]) << 24) |
5150283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 16) |
5151283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[8]) << 8) |
5152283b4a9bSStephen M. Cameron 		cmd->cmnd[9];
5153283b4a9bSStephen M. Cameron 		break;
5154283b4a9bSStephen M. Cameron 	case WRITE_16:
5155283b4a9bSStephen M. Cameron 		is_write = 1;
51565dfdb089SGustavo A. R. Silva 		/* fall through */
5157283b4a9bSStephen M. Cameron 	case READ_16:
5158283b4a9bSStephen M. Cameron 		first_block =
5159283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 56) |
5160283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 48) |
5161283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 40) |
5162283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[5]) << 32) |
5163283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[6]) << 24) |
5164283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[7]) << 16) |
5165283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[8]) << 8) |
5166283b4a9bSStephen M. Cameron 			cmd->cmnd[9];
5167283b4a9bSStephen M. Cameron 		block_cnt =
5168283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[10]) << 24) |
5169283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[11]) << 16) |
5170283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[12]) << 8) |
5171283b4a9bSStephen M. Cameron 			cmd->cmnd[13];
5172283b4a9bSStephen M. Cameron 		break;
5173283b4a9bSStephen M. Cameron 	default:
5174283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5175283b4a9bSStephen M. Cameron 	}
5176283b4a9bSStephen M. Cameron 	last_block = first_block + block_cnt - 1;
5177283b4a9bSStephen M. Cameron 
5178283b4a9bSStephen M. Cameron 	/* check for write to non-RAID-0 */
5179283b4a9bSStephen M. Cameron 	if (is_write && dev->raid_level != 0)
5180283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5181283b4a9bSStephen M. Cameron 
5182283b4a9bSStephen M. Cameron 	/* check for invalid block or wraparound */
51832b08b3e9SDon Brace 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
51842b08b3e9SDon Brace 		last_block < first_block)
5185283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5186283b4a9bSStephen M. Cameron 
5187283b4a9bSStephen M. Cameron 	/* calculate stripe information for the request */
51882b08b3e9SDon Brace 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
51892b08b3e9SDon Brace 				le16_to_cpu(map->strip_size);
51902b08b3e9SDon Brace 	strip_size = le16_to_cpu(map->strip_size);
5191283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5192283b4a9bSStephen M. Cameron 	tmpdiv = first_block;
5193283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5194283b4a9bSStephen M. Cameron 	first_row = tmpdiv;
5195283b4a9bSStephen M. Cameron 	tmpdiv = last_block;
5196283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5197283b4a9bSStephen M. Cameron 	last_row = tmpdiv;
5198283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5199283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5200283b4a9bSStephen M. Cameron 	tmpdiv = first_row_offset;
52012b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5202283b4a9bSStephen M. Cameron 	first_column = tmpdiv;
5203283b4a9bSStephen M. Cameron 	tmpdiv = last_row_offset;
52042b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5205283b4a9bSStephen M. Cameron 	last_column = tmpdiv;
5206283b4a9bSStephen M. Cameron #else
5207283b4a9bSStephen M. Cameron 	first_row = first_block / blocks_per_row;
5208283b4a9bSStephen M. Cameron 	last_row = last_block / blocks_per_row;
5209283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5210283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
52112b08b3e9SDon Brace 	first_column = first_row_offset / strip_size;
52122b08b3e9SDon Brace 	last_column = last_row_offset / strip_size;
5213283b4a9bSStephen M. Cameron #endif
5214283b4a9bSStephen M. Cameron 
5215283b4a9bSStephen M. Cameron 	/* if this isn't a single row/column then give to the controller */
5216283b4a9bSStephen M. Cameron 	if ((first_row != last_row) || (first_column != last_column))
5217283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5218283b4a9bSStephen M. Cameron 
5219283b4a9bSStephen M. Cameron 	/* proceeding with driver mapping */
52202b08b3e9SDon Brace 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
52212b08b3e9SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
5222283b4a9bSStephen M. Cameron 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
52232b08b3e9SDon Brace 				le16_to_cpu(map->row_cnt);
52246b80b18fSScott Teel 	map_index = (map_row * total_disks_per_row) + first_column;
52256b80b18fSScott Teel 
52266b80b18fSScott Teel 	switch (dev->raid_level) {
52276b80b18fSScott Teel 	case HPSA_RAID_0:
52286b80b18fSScott Teel 		break; /* nothing special to do */
52296b80b18fSScott Teel 	case HPSA_RAID_1:
52306b80b18fSScott Teel 		/* Handles load balance across RAID 1 members.
52316b80b18fSScott Teel 		 * (2-drive R1 and R10 with even # of drives.)
52326b80b18fSScott Teel 		 * Appropriate for SSDs, not optimal for HDDs
5233283b4a9bSStephen M. Cameron 		 */
52342b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5235283b4a9bSStephen M. Cameron 		if (dev->offload_to_mirror)
52362b08b3e9SDon Brace 			map_index += le16_to_cpu(map->data_disks_per_row);
5237283b4a9bSStephen M. Cameron 		dev->offload_to_mirror = !dev->offload_to_mirror;
52386b80b18fSScott Teel 		break;
52396b80b18fSScott Teel 	case HPSA_RAID_ADM:
52406b80b18fSScott Teel 		/* Handles N-way mirrors  (R1-ADM)
52416b80b18fSScott Teel 		 * and R10 with # of drives divisible by 3.)
52426b80b18fSScott Teel 		 */
52432b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
52446b80b18fSScott Teel 
52456b80b18fSScott Teel 		offload_to_mirror = dev->offload_to_mirror;
52466b80b18fSScott Teel 		raid_map_helper(map, offload_to_mirror,
52476b80b18fSScott Teel 				&map_index, &current_group);
52486b80b18fSScott Teel 		/* set mirror group to use next time */
52496b80b18fSScott Teel 		offload_to_mirror =
52502b08b3e9SDon Brace 			(offload_to_mirror >=
52512b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count) - 1)
52526b80b18fSScott Teel 			? 0 : offload_to_mirror + 1;
52536b80b18fSScott Teel 		dev->offload_to_mirror = offload_to_mirror;
52546b80b18fSScott Teel 		/* Avoid direct use of dev->offload_to_mirror within this
52556b80b18fSScott Teel 		 * function since multiple threads might simultaneously
52566b80b18fSScott Teel 		 * increment it beyond the range of dev->layout_map_count -1.
52576b80b18fSScott Teel 		 */
52586b80b18fSScott Teel 		break;
52596b80b18fSScott Teel 	case HPSA_RAID_5:
52606b80b18fSScott Teel 	case HPSA_RAID_6:
52612b08b3e9SDon Brace 		if (le16_to_cpu(map->layout_map_count) <= 1)
52626b80b18fSScott Teel 			break;
52636b80b18fSScott Teel 
52646b80b18fSScott Teel 		/* Verify first and last block are in same RAID group */
52656b80b18fSScott Teel 		r5or6_blocks_per_row =
52662b08b3e9SDon Brace 			le16_to_cpu(map->strip_size) *
52672b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
52686b80b18fSScott Teel 		BUG_ON(r5or6_blocks_per_row == 0);
52692b08b3e9SDon Brace 		stripesize = r5or6_blocks_per_row *
52702b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count);
52716b80b18fSScott Teel #if BITS_PER_LONG == 32
52726b80b18fSScott Teel 		tmpdiv = first_block;
52736b80b18fSScott Teel 		first_group = do_div(tmpdiv, stripesize);
52746b80b18fSScott Teel 		tmpdiv = first_group;
52756b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
52766b80b18fSScott Teel 		first_group = tmpdiv;
52776b80b18fSScott Teel 		tmpdiv = last_block;
52786b80b18fSScott Teel 		last_group = do_div(tmpdiv, stripesize);
52796b80b18fSScott Teel 		tmpdiv = last_group;
52806b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
52816b80b18fSScott Teel 		last_group = tmpdiv;
52826b80b18fSScott Teel #else
52836b80b18fSScott Teel 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
52846b80b18fSScott Teel 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
52856b80b18fSScott Teel #endif
5286000ff7c2SStephen M. Cameron 		if (first_group != last_group)
52876b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
52886b80b18fSScott Teel 
52896b80b18fSScott Teel 		/* Verify request is in a single row of RAID 5/6 */
52906b80b18fSScott Teel #if BITS_PER_LONG == 32
52916b80b18fSScott Teel 		tmpdiv = first_block;
52926b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
52936b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
52946b80b18fSScott Teel 		tmpdiv = last_block;
52956b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
52966b80b18fSScott Teel 		r5or6_last_row = r0_last_row = tmpdiv;
52976b80b18fSScott Teel #else
52986b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row =
52996b80b18fSScott Teel 						first_block / stripesize;
53006b80b18fSScott Teel 		r5or6_last_row = r0_last_row = last_block / stripesize;
53016b80b18fSScott Teel #endif
53026b80b18fSScott Teel 		if (r5or6_first_row != r5or6_last_row)
53036b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53046b80b18fSScott Teel 
53056b80b18fSScott Teel 
53066b80b18fSScott Teel 		/* Verify request is in a single column */
53076b80b18fSScott Teel #if BITS_PER_LONG == 32
53086b80b18fSScott Teel 		tmpdiv = first_block;
53096b80b18fSScott Teel 		first_row_offset = do_div(tmpdiv, stripesize);
53106b80b18fSScott Teel 		tmpdiv = first_row_offset;
53116b80b18fSScott Teel 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
53126b80b18fSScott Teel 		r5or6_first_row_offset = first_row_offset;
53136b80b18fSScott Teel 		tmpdiv = last_block;
53146b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
53156b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
53166b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
53176b80b18fSScott Teel 		tmpdiv = r5or6_first_row_offset;
53186b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
53196b80b18fSScott Teel 		first_column = r5or6_first_column = tmpdiv;
53206b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
53216b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
53226b80b18fSScott Teel 		r5or6_last_column = tmpdiv;
53236b80b18fSScott Teel #else
53246b80b18fSScott Teel 		first_row_offset = r5or6_first_row_offset =
53256b80b18fSScott Teel 			(u32)((first_block % stripesize) %
53266b80b18fSScott Teel 						r5or6_blocks_per_row);
53276b80b18fSScott Teel 
53286b80b18fSScott Teel 		r5or6_last_row_offset =
53296b80b18fSScott Teel 			(u32)((last_block % stripesize) %
53306b80b18fSScott Teel 						r5or6_blocks_per_row);
53316b80b18fSScott Teel 
53326b80b18fSScott Teel 		first_column = r5or6_first_column =
53332b08b3e9SDon Brace 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
53346b80b18fSScott Teel 		r5or6_last_column =
53352b08b3e9SDon Brace 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
53366b80b18fSScott Teel #endif
53376b80b18fSScott Teel 		if (r5or6_first_column != r5or6_last_column)
53386b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53396b80b18fSScott Teel 
53406b80b18fSScott Teel 		/* Request is eligible */
53416b80b18fSScott Teel 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
53422b08b3e9SDon Brace 			le16_to_cpu(map->row_cnt);
53436b80b18fSScott Teel 
53446b80b18fSScott Teel 		map_index = (first_group *
53452b08b3e9SDon Brace 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
53466b80b18fSScott Teel 			(map_row * total_disks_per_row) + first_column;
53476b80b18fSScott Teel 		break;
53486b80b18fSScott Teel 	default:
53496b80b18fSScott Teel 		return IO_ACCEL_INELIGIBLE;
5350283b4a9bSStephen M. Cameron 	}
53516b80b18fSScott Teel 
535207543e0cSStephen Cameron 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
535307543e0cSStephen Cameron 		return IO_ACCEL_INELIGIBLE;
535407543e0cSStephen Cameron 
535503383736SDon Brace 	c->phys_disk = dev->phys_disk[map_index];
5356c3390df4SDon Brace 	if (!c->phys_disk)
5357c3390df4SDon Brace 		return IO_ACCEL_INELIGIBLE;
535803383736SDon Brace 
5359283b4a9bSStephen M. Cameron 	disk_handle = dd[map_index].ioaccel_handle;
53602b08b3e9SDon Brace 	disk_block = le64_to_cpu(map->disk_starting_blk) +
53612b08b3e9SDon Brace 			first_row * le16_to_cpu(map->strip_size) +
53622b08b3e9SDon Brace 			(first_row_offset - first_column *
53632b08b3e9SDon Brace 			le16_to_cpu(map->strip_size));
5364283b4a9bSStephen M. Cameron 	disk_block_cnt = block_cnt;
5365283b4a9bSStephen M. Cameron 
5366283b4a9bSStephen M. Cameron 	/* handle differing logical/physical block sizes */
5367283b4a9bSStephen M. Cameron 	if (map->phys_blk_shift) {
5368283b4a9bSStephen M. Cameron 		disk_block <<= map->phys_blk_shift;
5369283b4a9bSStephen M. Cameron 		disk_block_cnt <<= map->phys_blk_shift;
5370283b4a9bSStephen M. Cameron 	}
5371283b4a9bSStephen M. Cameron 	BUG_ON(disk_block_cnt > 0xffff);
5372283b4a9bSStephen M. Cameron 
5373283b4a9bSStephen M. Cameron 	/* build the new CDB for the physical disk I/O */
5374283b4a9bSStephen M. Cameron 	if (disk_block > 0xffffffff) {
5375283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_16 : READ_16;
5376283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5377283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 56);
5378283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 48);
5379283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 40);
5380283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block >> 32);
5381283b4a9bSStephen M. Cameron 		cdb[6] = (u8) (disk_block >> 24);
5382283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block >> 16);
5383283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block >> 8);
5384283b4a9bSStephen M. Cameron 		cdb[9] = (u8) (disk_block);
5385283b4a9bSStephen M. Cameron 		cdb[10] = (u8) (disk_block_cnt >> 24);
5386283b4a9bSStephen M. Cameron 		cdb[11] = (u8) (disk_block_cnt >> 16);
5387283b4a9bSStephen M. Cameron 		cdb[12] = (u8) (disk_block_cnt >> 8);
5388283b4a9bSStephen M. Cameron 		cdb[13] = (u8) (disk_block_cnt);
5389283b4a9bSStephen M. Cameron 		cdb[14] = 0;
5390283b4a9bSStephen M. Cameron 		cdb[15] = 0;
5391283b4a9bSStephen M. Cameron 		cdb_len = 16;
5392283b4a9bSStephen M. Cameron 	} else {
5393283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
5394283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5395283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 24);
5396283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 16);
5397283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 8);
5398283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block);
5399283b4a9bSStephen M. Cameron 		cdb[6] = 0;
5400283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block_cnt >> 8);
5401283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block_cnt);
5402283b4a9bSStephen M. Cameron 		cdb[9] = 0;
5403283b4a9bSStephen M. Cameron 		cdb_len = 10;
5404283b4a9bSStephen M. Cameron 	}
5405283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
540603383736SDon Brace 						dev->scsi3addr,
540703383736SDon Brace 						dev->phys_disk[map_index]);
5408283b4a9bSStephen M. Cameron }
5409283b4a9bSStephen M. Cameron 
541025163bd5SWebb Scales /*
541125163bd5SWebb Scales  * Submit commands down the "normal" RAID stack path
541225163bd5SWebb Scales  * All callers to hpsa_ciss_submit must check lockup_detected
541325163bd5SWebb Scales  * beforehand, before (opt.) and after calling cmd_alloc
541425163bd5SWebb Scales  */
5415574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h,
5416574f05d3SStephen Cameron 	struct CommandList *c, struct scsi_cmnd *cmd,
5417c5dfd106SDon Brace 	struct hpsa_scsi_dev_t *dev)
5418edd16368SStephen M. Cameron {
5419edd16368SStephen M. Cameron 	cmd->host_scribble = (unsigned char *) c;
5420edd16368SStephen M. Cameron 	c->cmd_type = CMD_SCSI;
5421edd16368SStephen M. Cameron 	c->scsi_cmd = cmd;
5422edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5423c5dfd106SDon Brace 	memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5424f2405db8SDon Brace 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5425edd16368SStephen M. Cameron 
5426edd16368SStephen M. Cameron 	/* Fill in the request block... */
5427edd16368SStephen M. Cameron 
5428edd16368SStephen M. Cameron 	c->Request.Timeout = 0;
5429edd16368SStephen M. Cameron 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5430edd16368SStephen M. Cameron 	c->Request.CDBLen = cmd->cmd_len;
5431edd16368SStephen M. Cameron 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5432edd16368SStephen M. Cameron 	switch (cmd->sc_data_direction) {
5433edd16368SStephen M. Cameron 	case DMA_TO_DEVICE:
5434a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5435a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5436edd16368SStephen M. Cameron 		break;
5437edd16368SStephen M. Cameron 	case DMA_FROM_DEVICE:
5438a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5439a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5440edd16368SStephen M. Cameron 		break;
5441edd16368SStephen M. Cameron 	case DMA_NONE:
5442a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5443a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5444edd16368SStephen M. Cameron 		break;
5445edd16368SStephen M. Cameron 	case DMA_BIDIRECTIONAL:
5446edd16368SStephen M. Cameron 		/* This can happen if a buggy application does a scsi passthru
5447edd16368SStephen M. Cameron 		 * and sets both inlen and outlen to non-zero. ( see
5448edd16368SStephen M. Cameron 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5449edd16368SStephen M. Cameron 		 */
5450edd16368SStephen M. Cameron 
5451a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5452a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5453edd16368SStephen M. Cameron 		/* This is technically wrong, and hpsa controllers should
5454edd16368SStephen M. Cameron 		 * reject it with CMD_INVALID, which is the most correct
5455edd16368SStephen M. Cameron 		 * response, but non-fibre backends appear to let it
5456edd16368SStephen M. Cameron 		 * slide by, and give the same results as if this field
5457edd16368SStephen M. Cameron 		 * were set correctly.  Either way is acceptable for
5458edd16368SStephen M. Cameron 		 * our purposes here.
5459edd16368SStephen M. Cameron 		 */
5460edd16368SStephen M. Cameron 
5461edd16368SStephen M. Cameron 		break;
5462edd16368SStephen M. Cameron 
5463edd16368SStephen M. Cameron 	default:
5464edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5465edd16368SStephen M. Cameron 			cmd->sc_data_direction);
5466edd16368SStephen M. Cameron 		BUG();
5467edd16368SStephen M. Cameron 		break;
5468edd16368SStephen M. Cameron 	}
5469edd16368SStephen M. Cameron 
547033a2ffceSStephen M. Cameron 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
547173153fe5SWebb Scales 		hpsa_cmd_resolve_and_free(h, c);
5472edd16368SStephen M. Cameron 		return SCSI_MLQUEUE_HOST_BUSY;
5473edd16368SStephen M. Cameron 	}
5474c5dfd106SDon Brace 
5475c5dfd106SDon Brace 	if (dev->in_reset) {
5476c5dfd106SDon Brace 		hpsa_cmd_resolve_and_free(h, c);
5477c5dfd106SDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
5478c5dfd106SDon Brace 	}
5479c5dfd106SDon Brace 
548013499345SDon Brace 	c->device = dev;
548113499345SDon Brace 
5482edd16368SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
5483edd16368SStephen M. Cameron 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5484edd16368SStephen M. Cameron 	return 0;
5485edd16368SStephen M. Cameron }
5486edd16368SStephen M. Cameron 
5487360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index,
5488360c73bdSStephen Cameron 				struct CommandList *c)
5489360c73bdSStephen Cameron {
5490360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle, err_dma_handle;
5491360c73bdSStephen Cameron 
5492360c73bdSStephen Cameron 	/* Zero out all of commandlist except the last field, refcount */
5493360c73bdSStephen Cameron 	memset(c, 0, offsetof(struct CommandList, refcount));
5494360c73bdSStephen Cameron 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5495360c73bdSStephen Cameron 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5496360c73bdSStephen Cameron 	c->err_info = h->errinfo_pool + index;
5497360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5498360c73bdSStephen Cameron 	err_dma_handle = h->errinfo_pool_dhandle
5499360c73bdSStephen Cameron 	    + index * sizeof(*c->err_info);
5500360c73bdSStephen Cameron 	c->cmdindex = index;
5501360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5502360c73bdSStephen Cameron 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5503360c73bdSStephen Cameron 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5504360c73bdSStephen Cameron 	c->h = h;
5505a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
5506360c73bdSStephen Cameron }
5507360c73bdSStephen Cameron 
5508360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h)
5509360c73bdSStephen Cameron {
5510360c73bdSStephen Cameron 	int i;
5511360c73bdSStephen Cameron 
5512360c73bdSStephen Cameron 	for (i = 0; i < h->nr_cmds; i++) {
5513360c73bdSStephen Cameron 		struct CommandList *c = h->cmd_pool + i;
5514360c73bdSStephen Cameron 
5515360c73bdSStephen Cameron 		hpsa_cmd_init(h, i, c);
5516360c73bdSStephen Cameron 		atomic_set(&c->refcount, 0);
5517360c73bdSStephen Cameron 	}
5518360c73bdSStephen Cameron }
5519360c73bdSStephen Cameron 
5520360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5521360c73bdSStephen Cameron 				struct CommandList *c)
5522360c73bdSStephen Cameron {
5523360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5524360c73bdSStephen Cameron 
552573153fe5SWebb Scales 	BUG_ON(c->cmdindex != index);
552673153fe5SWebb Scales 
5527360c73bdSStephen Cameron 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5528360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5529360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5530360c73bdSStephen Cameron }
5531360c73bdSStephen Cameron 
5532592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h,
5533c5dfd106SDon Brace 		struct CommandList *c, struct scsi_cmnd *cmd)
5534592a0ad5SWebb Scales {
5535592a0ad5SWebb Scales 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5536592a0ad5SWebb Scales 	int rc = IO_ACCEL_INELIGIBLE;
5537592a0ad5SWebb Scales 
553845e596cdSDon Brace 	if (!dev)
553945e596cdSDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
554045e596cdSDon Brace 
5541c5dfd106SDon Brace 	if (dev->in_reset)
5542c5dfd106SDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
5543c5dfd106SDon Brace 
5544a68fdb3aSDon Brace 	if (hpsa_simple_mode)
5545a68fdb3aSDon Brace 		return IO_ACCEL_INELIGIBLE;
5546a68fdb3aSDon Brace 
5547592a0ad5SWebb Scales 	cmd->host_scribble = (unsigned char *) c;
5548592a0ad5SWebb Scales 
5549592a0ad5SWebb Scales 	if (dev->offload_enabled) {
5550592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5551592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5552592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
555313499345SDon Brace 		c->device = dev;
5554592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5555592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5556592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5557a3144e0bSJoe Handzik 	} else if (dev->hba_ioaccel_enabled) {
5558592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5559592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5560592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
556113499345SDon Brace 		c->device = dev;
5562592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5563592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5564592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5565592a0ad5SWebb Scales 	}
5566592a0ad5SWebb Scales 	return rc;
5567592a0ad5SWebb Scales }
5568592a0ad5SWebb Scales 
5569080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work)
5570080ef1ccSDon Brace {
5571080ef1ccSDon Brace 	struct scsi_cmnd *cmd;
5572080ef1ccSDon Brace 	struct hpsa_scsi_dev_t *dev;
55738a0ff92cSWebb Scales 	struct CommandList *c = container_of(work, struct CommandList, work);
5574080ef1ccSDon Brace 
5575080ef1ccSDon Brace 	cmd = c->scsi_cmd;
5576080ef1ccSDon Brace 	dev = cmd->device->hostdata;
5577080ef1ccSDon Brace 	if (!dev) {
5578080ef1ccSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
55798a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5580080ef1ccSDon Brace 	}
5581c5dfd106SDon Brace 
5582c5dfd106SDon Brace 	if (dev->in_reset) {
5583c5dfd106SDon Brace 		cmd->result = DID_RESET << 16;
5584d2315ce6SDon Brace 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5585c5dfd106SDon Brace 	}
5586c5dfd106SDon Brace 
5587592a0ad5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2) {
5588592a0ad5SWebb Scales 		struct ctlr_info *h = c->h;
5589592a0ad5SWebb Scales 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5590592a0ad5SWebb Scales 		int rc;
5591592a0ad5SWebb Scales 
5592592a0ad5SWebb Scales 		if (c2->error_data.serv_response ==
5593592a0ad5SWebb Scales 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5594c5dfd106SDon Brace 			rc = hpsa_ioaccel_submit(h, c, cmd);
5595592a0ad5SWebb Scales 			if (rc == 0)
5596592a0ad5SWebb Scales 				return;
5597592a0ad5SWebb Scales 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5598592a0ad5SWebb Scales 				/*
5599592a0ad5SWebb Scales 				 * If we get here, it means dma mapping failed.
5600592a0ad5SWebb Scales 				 * Try again via scsi mid layer, which will
5601592a0ad5SWebb Scales 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5602592a0ad5SWebb Scales 				 */
5603592a0ad5SWebb Scales 				cmd->result = DID_IMM_RETRY << 16;
56048a0ff92cSWebb Scales 				return hpsa_cmd_free_and_done(h, c, cmd);
5605592a0ad5SWebb Scales 			}
5606592a0ad5SWebb Scales 			/* else, fall thru and resubmit down CISS path */
5607592a0ad5SWebb Scales 		}
5608592a0ad5SWebb Scales 	}
5609360c73bdSStephen Cameron 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5610c5dfd106SDon Brace 	if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5611080ef1ccSDon Brace 		/*
5612080ef1ccSDon Brace 		 * If we get here, it means dma mapping failed. Try
5613080ef1ccSDon Brace 		 * again via scsi mid layer, which will then get
5614080ef1ccSDon Brace 		 * SCSI_MLQUEUE_HOST_BUSY.
5615592a0ad5SWebb Scales 		 *
5616592a0ad5SWebb Scales 		 * hpsa_ciss_submit will have already freed c
5617592a0ad5SWebb Scales 		 * if it encountered a dma mapping failure.
5618080ef1ccSDon Brace 		 */
5619080ef1ccSDon Brace 		cmd->result = DID_IMM_RETRY << 16;
5620080ef1ccSDon Brace 		cmd->scsi_done(cmd);
5621080ef1ccSDon Brace 	}
5622080ef1ccSDon Brace }
5623080ef1ccSDon Brace 
5624574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */
5625574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5626574f05d3SStephen Cameron {
5627574f05d3SStephen Cameron 	struct ctlr_info *h;
5628574f05d3SStephen Cameron 	struct hpsa_scsi_dev_t *dev;
5629574f05d3SStephen Cameron 	struct CommandList *c;
5630574f05d3SStephen Cameron 	int rc = 0;
5631574f05d3SStephen Cameron 
5632574f05d3SStephen Cameron 	/* Get the ptr to our adapter structure out of cmd->host. */
5633574f05d3SStephen Cameron 	h = sdev_to_hba(cmd->device);
563473153fe5SWebb Scales 
563573153fe5SWebb Scales 	BUG_ON(cmd->request->tag < 0);
563673153fe5SWebb Scales 
5637574f05d3SStephen Cameron 	dev = cmd->device->hostdata;
5638574f05d3SStephen Cameron 	if (!dev) {
56391ccde700SHannes Reinecke 		cmd->result = DID_NO_CONNECT << 16;
5640ba74fdc4SDon Brace 		cmd->scsi_done(cmd);
5641ba74fdc4SDon Brace 		return 0;
5642ba74fdc4SDon Brace 	}
5643ba74fdc4SDon Brace 
5644ba74fdc4SDon Brace 	if (dev->removed) {
5645574f05d3SStephen Cameron 		cmd->result = DID_NO_CONNECT << 16;
5646574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5647574f05d3SStephen Cameron 		return 0;
5648574f05d3SStephen Cameron 	}
564973153fe5SWebb Scales 
5650574f05d3SStephen Cameron 	if (unlikely(lockup_detected(h))) {
565125163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
5652574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5653574f05d3SStephen Cameron 		return 0;
5654574f05d3SStephen Cameron 	}
5655c5dfd106SDon Brace 
5656c5dfd106SDon Brace 	if (dev->in_reset)
5657c5dfd106SDon Brace 		return SCSI_MLQUEUE_DEVICE_BUSY;
5658c5dfd106SDon Brace 
565973153fe5SWebb Scales 	c = cmd_tagged_alloc(h, cmd);
56604770e68dSDon Brace 	if (c == NULL)
56614770e68dSDon Brace 		return SCSI_MLQUEUE_DEVICE_BUSY;
5662574f05d3SStephen Cameron 
5663407863cbSStephen Cameron 	/*
5664eeebce18SDon Brace 	 * This is necessary because the SML doesn't zero out this field during
5665eeebce18SDon Brace 	 * error recovery.
5666eeebce18SDon Brace 	 */
5667eeebce18SDon Brace 	cmd->result = 0;
5668eeebce18SDon Brace 
5669eeebce18SDon Brace 	/*
5670407863cbSStephen Cameron 	 * Call alternate submit routine for I/O accelerated commands.
5671574f05d3SStephen Cameron 	 * Retries always go down the normal I/O path.
5672574f05d3SStephen Cameron 	 */
5673574f05d3SStephen Cameron 	if (likely(cmd->retries == 0 &&
567457292b58SChristoph Hellwig 			!blk_rq_is_passthrough(cmd->request) &&
5675574f05d3SStephen Cameron 			h->acciopath_status)) {
5676c5dfd106SDon Brace 		rc = hpsa_ioaccel_submit(h, c, cmd);
5677574f05d3SStephen Cameron 		if (rc == 0)
5678592a0ad5SWebb Scales 			return 0;
5679592a0ad5SWebb Scales 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
568073153fe5SWebb Scales 			hpsa_cmd_resolve_and_free(h, c);
5681574f05d3SStephen Cameron 			return SCSI_MLQUEUE_HOST_BUSY;
5682574f05d3SStephen Cameron 		}
5683574f05d3SStephen Cameron 	}
5684c5dfd106SDon Brace 	return hpsa_ciss_submit(h, c, cmd, dev);
5685574f05d3SStephen Cameron }
5686574f05d3SStephen Cameron 
56878ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h)
56885f389360SStephen M. Cameron {
56895f389360SStephen M. Cameron 	unsigned long flags;
56905f389360SStephen M. Cameron 
56915f389360SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
56925f389360SStephen M. Cameron 	h->scan_finished = 1;
569387b9e6aaSDon Brace 	wake_up(&h->scan_wait_queue);
56945f389360SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
56955f389360SStephen M. Cameron }
56965f389360SStephen M. Cameron 
5697a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh)
5698a08a8471SStephen M. Cameron {
5699a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5700a08a8471SStephen M. Cameron 	unsigned long flags;
5701a08a8471SStephen M. Cameron 
57028ebc9248SWebb Scales 	/*
57038ebc9248SWebb Scales 	 * Don't let rescans be initiated on a controller known to be locked
57048ebc9248SWebb Scales 	 * up.  If the controller locks up *during* a rescan, that thread is
57058ebc9248SWebb Scales 	 * probably hosed, but at least we can prevent new rescan threads from
57068ebc9248SWebb Scales 	 * piling up on a locked up controller.
57078ebc9248SWebb Scales 	 */
57088ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
57098ebc9248SWebb Scales 		return hpsa_scan_complete(h);
57105f389360SStephen M. Cameron 
571187b9e6aaSDon Brace 	/*
571287b9e6aaSDon Brace 	 * If a scan is already waiting to run, no need to add another
571387b9e6aaSDon Brace 	 */
571487b9e6aaSDon Brace 	spin_lock_irqsave(&h->scan_lock, flags);
571587b9e6aaSDon Brace 	if (h->scan_waiting) {
571687b9e6aaSDon Brace 		spin_unlock_irqrestore(&h->scan_lock, flags);
571787b9e6aaSDon Brace 		return;
571887b9e6aaSDon Brace 	}
571987b9e6aaSDon Brace 
572087b9e6aaSDon Brace 	spin_unlock_irqrestore(&h->scan_lock, flags);
572187b9e6aaSDon Brace 
5722a08a8471SStephen M. Cameron 	/* wait until any scan already in progress is finished. */
5723a08a8471SStephen M. Cameron 	while (1) {
5724a08a8471SStephen M. Cameron 		spin_lock_irqsave(&h->scan_lock, flags);
5725a08a8471SStephen M. Cameron 		if (h->scan_finished)
5726a08a8471SStephen M. Cameron 			break;
572787b9e6aaSDon Brace 		h->scan_waiting = 1;
5728a08a8471SStephen M. Cameron 		spin_unlock_irqrestore(&h->scan_lock, flags);
5729a08a8471SStephen M. Cameron 		wait_event(h->scan_wait_queue, h->scan_finished);
5730a08a8471SStephen M. Cameron 		/* Note: We don't need to worry about a race between this
5731a08a8471SStephen M. Cameron 		 * thread and driver unload because the midlayer will
5732a08a8471SStephen M. Cameron 		 * have incremented the reference count, so unload won't
5733a08a8471SStephen M. Cameron 		 * happen if we're in here.
5734a08a8471SStephen M. Cameron 		 */
5735a08a8471SStephen M. Cameron 	}
5736a08a8471SStephen M. Cameron 	h->scan_finished = 0; /* mark scan as in progress */
573787b9e6aaSDon Brace 	h->scan_waiting = 0;
5738a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5739a08a8471SStephen M. Cameron 
57408ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
57418ebc9248SWebb Scales 		return hpsa_scan_complete(h);
57425f389360SStephen M. Cameron 
5743bfd7546cSDon Brace 	/*
5744bfd7546cSDon Brace 	 * Do the scan after a reset completion
5745bfd7546cSDon Brace 	 */
5746c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
5747bfd7546cSDon Brace 	if (h->reset_in_progress) {
5748bfd7546cSDon Brace 		h->drv_req_rescan = 1;
5749c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
57503b476aa2SDon Brace 		hpsa_scan_complete(h);
5751bfd7546cSDon Brace 		return;
5752bfd7546cSDon Brace 	}
5753c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
5754bfd7546cSDon Brace 
57558aa60681SDon Brace 	hpsa_update_scsi_devices(h);
5756a08a8471SStephen M. Cameron 
57578ebc9248SWebb Scales 	hpsa_scan_complete(h);
5758a08a8471SStephen M. Cameron }
5759a08a8471SStephen M. Cameron 
57607c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
57617c0a0229SDon Brace {
576203383736SDon Brace 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
576303383736SDon Brace 
576403383736SDon Brace 	if (!logical_drive)
576503383736SDon Brace 		return -ENODEV;
57667c0a0229SDon Brace 
57677c0a0229SDon Brace 	if (qdepth < 1)
57687c0a0229SDon Brace 		qdepth = 1;
576903383736SDon Brace 	else if (qdepth > logical_drive->queue_depth)
577003383736SDon Brace 		qdepth = logical_drive->queue_depth;
577103383736SDon Brace 
577203383736SDon Brace 	return scsi_change_queue_depth(sdev, qdepth);
57737c0a0229SDon Brace }
57747c0a0229SDon Brace 
5775a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
5776a08a8471SStephen M. Cameron 	unsigned long elapsed_time)
5777a08a8471SStephen M. Cameron {
5778a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5779a08a8471SStephen M. Cameron 	unsigned long flags;
5780a08a8471SStephen M. Cameron 	int finished;
5781a08a8471SStephen M. Cameron 
5782a08a8471SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
5783a08a8471SStephen M. Cameron 	finished = h->scan_finished;
5784a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5785a08a8471SStephen M. Cameron 	return finished;
5786a08a8471SStephen M. Cameron }
5787a08a8471SStephen M. Cameron 
57882946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5789edd16368SStephen M. Cameron {
5790b705690dSStephen M. Cameron 	struct Scsi_Host *sh;
5791edd16368SStephen M. Cameron 
5792b705690dSStephen M. Cameron 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
57932946e82bSRobert Elliott 	if (sh == NULL) {
57942946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
57952946e82bSRobert Elliott 		return -ENOMEM;
57962946e82bSRobert Elliott 	}
5797b705690dSStephen M. Cameron 
5798b705690dSStephen M. Cameron 	sh->io_port = 0;
5799b705690dSStephen M. Cameron 	sh->n_io_port = 0;
5800b705690dSStephen M. Cameron 	sh->this_id = -1;
5801b705690dSStephen M. Cameron 	sh->max_channel = 3;
5802b705690dSStephen M. Cameron 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5803b705690dSStephen M. Cameron 	sh->max_lun = HPSA_MAX_LUN;
5804b705690dSStephen M. Cameron 	sh->max_id = HPSA_MAX_LUN;
580541ce4c35SStephen Cameron 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5806d54c5c24SStephen Cameron 	sh->cmd_per_lun = sh->can_queue;
5807b705690dSStephen M. Cameron 	sh->sg_tablesize = h->maxsgentries;
5808d04e62b9SKevin Barnett 	sh->transportt = hpsa_sas_transport_template;
5809b705690dSStephen M. Cameron 	sh->hostdata[0] = (unsigned long) h;
5810bc2bb154SChristoph Hellwig 	sh->irq = pci_irq_vector(h->pdev, 0);
5811b705690dSStephen M. Cameron 	sh->unique_id = sh->irq;
581264d513acSChristoph Hellwig 
58132946e82bSRobert Elliott 	h->scsi_host = sh;
58142946e82bSRobert Elliott 	return 0;
58152946e82bSRobert Elliott }
58162946e82bSRobert Elliott 
58172946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h)
58182946e82bSRobert Elliott {
58192946e82bSRobert Elliott 	int rv;
58202946e82bSRobert Elliott 
58212946e82bSRobert Elliott 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
58222946e82bSRobert Elliott 	if (rv) {
58232946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
58242946e82bSRobert Elliott 		return rv;
58252946e82bSRobert Elliott 	}
58262946e82bSRobert Elliott 	scsi_scan_host(h->scsi_host);
58272946e82bSRobert Elliott 	return 0;
5828edd16368SStephen M. Cameron }
5829edd16368SStephen M. Cameron 
5830b69324ffSWebb Scales /*
583173153fe5SWebb Scales  * The block layer has already gone to the trouble of picking out a unique,
583273153fe5SWebb Scales  * small-integer tag for this request.  We use an offset from that value as
583373153fe5SWebb Scales  * an index to select our command block.  (The offset allows us to reserve the
583473153fe5SWebb Scales  * low-numbered entries for our own uses.)
583573153fe5SWebb Scales  */
583673153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
583773153fe5SWebb Scales {
583873153fe5SWebb Scales 	int idx = scmd->request->tag;
583973153fe5SWebb Scales 
584073153fe5SWebb Scales 	if (idx < 0)
584173153fe5SWebb Scales 		return idx;
584273153fe5SWebb Scales 
584373153fe5SWebb Scales 	/* Offset to leave space for internal cmds. */
584473153fe5SWebb Scales 	return idx += HPSA_NRESERVED_CMDS;
584573153fe5SWebb Scales }
584673153fe5SWebb Scales 
584773153fe5SWebb Scales /*
5848b69324ffSWebb Scales  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5849b69324ffSWebb Scales  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5850b69324ffSWebb Scales  */
5851b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5852b69324ffSWebb Scales 				struct CommandList *c, unsigned char lunaddr[],
5853b69324ffSWebb Scales 				int reply_queue)
5854edd16368SStephen M. Cameron {
58558919358eSTomas Henzl 	int rc;
5856edd16368SStephen M. Cameron 
5857a2dac136SStephen M. Cameron 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5858a2dac136SStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5859a2dac136SStephen M. Cameron 			NULL, 0, 0, lunaddr, TYPE_CMD);
58601edb6934SDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
586125163bd5SWebb Scales 	if (rc)
5862b69324ffSWebb Scales 		return rc;
5863edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
5864edd16368SStephen M. Cameron 
5865b69324ffSWebb Scales 	/* Check if the unit is already ready. */
5866edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5867b69324ffSWebb Scales 		return 0;
5868edd16368SStephen M. Cameron 
5869b69324ffSWebb Scales 	/*
5870b69324ffSWebb Scales 	 * The first command sent after reset will receive "unit attention" to
5871b69324ffSWebb Scales 	 * indicate that the LUN has been reset...this is actually what we're
5872b69324ffSWebb Scales 	 * looking for (but, success is good too).
5873b69324ffSWebb Scales 	 */
5874edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5875edd16368SStephen M. Cameron 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5876edd16368SStephen M. Cameron 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5877edd16368SStephen M. Cameron 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5878b69324ffSWebb Scales 		return 0;
5879b69324ffSWebb Scales 
5880b69324ffSWebb Scales 	return 1;
5881b69324ffSWebb Scales }
5882b69324ffSWebb Scales 
5883b69324ffSWebb Scales /*
5884b69324ffSWebb Scales  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5885b69324ffSWebb Scales  * returns zero when the unit is ready, and non-zero when giving up.
5886b69324ffSWebb Scales  */
5887b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5888b69324ffSWebb Scales 				struct CommandList *c,
5889b69324ffSWebb Scales 				unsigned char lunaddr[], int reply_queue)
5890b69324ffSWebb Scales {
5891b69324ffSWebb Scales 	int rc;
5892b69324ffSWebb Scales 	int count = 0;
5893b69324ffSWebb Scales 	int waittime = 1; /* seconds */
5894b69324ffSWebb Scales 
5895b69324ffSWebb Scales 	/* Send test unit ready until device ready, or give up. */
5896b69324ffSWebb Scales 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5897b69324ffSWebb Scales 
5898b69324ffSWebb Scales 		/*
5899b69324ffSWebb Scales 		 * Wait for a bit.  do this first, because if we send
5900b69324ffSWebb Scales 		 * the TUR right away, the reset will just abort it.
5901b69324ffSWebb Scales 		 */
5902b69324ffSWebb Scales 		msleep(1000 * waittime);
5903b69324ffSWebb Scales 
5904b69324ffSWebb Scales 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5905b69324ffSWebb Scales 		if (!rc)
5906edd16368SStephen M. Cameron 			break;
5907b69324ffSWebb Scales 
5908b69324ffSWebb Scales 		/* Increase wait time with each try, up to a point. */
5909b69324ffSWebb Scales 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5910b69324ffSWebb Scales 			waittime *= 2;
5911b69324ffSWebb Scales 
5912b69324ffSWebb Scales 		dev_warn(&h->pdev->dev,
5913b69324ffSWebb Scales 			 "waiting %d secs for device to become ready.\n",
5914b69324ffSWebb Scales 			 waittime);
5915b69324ffSWebb Scales 	}
5916b69324ffSWebb Scales 
5917b69324ffSWebb Scales 	return rc;
5918b69324ffSWebb Scales }
5919b69324ffSWebb Scales 
5920b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h,
5921b69324ffSWebb Scales 					   unsigned char lunaddr[],
5922b69324ffSWebb Scales 					   int reply_queue)
5923b69324ffSWebb Scales {
5924b69324ffSWebb Scales 	int first_queue;
5925b69324ffSWebb Scales 	int last_queue;
5926b69324ffSWebb Scales 	int rq;
5927b69324ffSWebb Scales 	int rc = 0;
5928b69324ffSWebb Scales 	struct CommandList *c;
5929b69324ffSWebb Scales 
5930b69324ffSWebb Scales 	c = cmd_alloc(h);
5931b69324ffSWebb Scales 
5932b69324ffSWebb Scales 	/*
5933b69324ffSWebb Scales 	 * If no specific reply queue was requested, then send the TUR
5934b69324ffSWebb Scales 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5935b69324ffSWebb Scales 	 * the loop exactly once using only the specified queue.
5936b69324ffSWebb Scales 	 */
5937b69324ffSWebb Scales 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5938b69324ffSWebb Scales 		first_queue = 0;
5939b69324ffSWebb Scales 		last_queue = h->nreply_queues - 1;
5940b69324ffSWebb Scales 	} else {
5941b69324ffSWebb Scales 		first_queue = reply_queue;
5942b69324ffSWebb Scales 		last_queue = reply_queue;
5943b69324ffSWebb Scales 	}
5944b69324ffSWebb Scales 
5945b69324ffSWebb Scales 	for (rq = first_queue; rq <= last_queue; rq++) {
5946b69324ffSWebb Scales 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5947b69324ffSWebb Scales 		if (rc)
5948b69324ffSWebb Scales 			break;
5949edd16368SStephen M. Cameron 	}
5950edd16368SStephen M. Cameron 
5951edd16368SStephen M. Cameron 	if (rc)
5952edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "giving up on device.\n");
5953edd16368SStephen M. Cameron 	else
5954edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "device is ready.\n");
5955edd16368SStephen M. Cameron 
595645fcb86eSStephen Cameron 	cmd_free(h, c);
5957edd16368SStephen M. Cameron 	return rc;
5958edd16368SStephen M. Cameron }
5959edd16368SStephen M. Cameron 
5960edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5961edd16368SStephen M. Cameron  * complaining.  Doing a host- or bus-reset can't do anything good here.
5962edd16368SStephen M. Cameron  */
5963edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5964edd16368SStephen M. Cameron {
5965c59d04f3SDon Brace 	int rc = SUCCESS;
5966c5dfd106SDon Brace 	int i;
5967edd16368SStephen M. Cameron 	struct ctlr_info *h;
596836631157SColin Ian King 	struct hpsa_scsi_dev_t *dev = NULL;
59690b9b7b6eSScott Teel 	u8 reset_type;
59702dc127bbSDan Carpenter 	char msg[48];
5971c59d04f3SDon Brace 	unsigned long flags;
5972edd16368SStephen M. Cameron 
5973edd16368SStephen M. Cameron 	/* find the controller to which the command to be aborted was sent */
5974edd16368SStephen M. Cameron 	h = sdev_to_hba(scsicmd->device);
5975edd16368SStephen M. Cameron 	if (h == NULL) /* paranoia */
5976edd16368SStephen M. Cameron 		return FAILED;
5977e345893bSDon Brace 
5978c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
5979c59d04f3SDon Brace 	h->reset_in_progress = 1;
5980c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
5981c59d04f3SDon Brace 
5982c59d04f3SDon Brace 	if (lockup_detected(h)) {
5983c59d04f3SDon Brace 		rc = FAILED;
5984c59d04f3SDon Brace 		goto return_reset_status;
5985c59d04f3SDon Brace 	}
5986e345893bSDon Brace 
5987edd16368SStephen M. Cameron 	dev = scsicmd->device->hostdata;
5988edd16368SStephen M. Cameron 	if (!dev) {
5989d604f533SWebb Scales 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5990c59d04f3SDon Brace 		rc = FAILED;
5991c59d04f3SDon Brace 		goto return_reset_status;
5992edd16368SStephen M. Cameron 	}
599325163bd5SWebb Scales 
5994c59d04f3SDon Brace 	if (dev->devtype == TYPE_ENCLOSURE) {
5995c59d04f3SDon Brace 		rc = SUCCESS;
5996c59d04f3SDon Brace 		goto return_reset_status;
5997c59d04f3SDon Brace 	}
5998ef8a5203SDon Brace 
599925163bd5SWebb Scales 	/* if controller locked up, we can guarantee command won't complete */
600025163bd5SWebb Scales 	if (lockup_detected(h)) {
60012dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
60022dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, lockup detected",
600373153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
600473153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6005c59d04f3SDon Brace 		rc = FAILED;
6006c59d04f3SDon Brace 		goto return_reset_status;
600725163bd5SWebb Scales 	}
600825163bd5SWebb Scales 
600925163bd5SWebb Scales 	/* this reset request might be the result of a lockup; check */
601025163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
60112dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
60122dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, new lockup detected",
601373153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
601473153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6015c59d04f3SDon Brace 		rc = FAILED;
6016c59d04f3SDon Brace 		goto return_reset_status;
601725163bd5SWebb Scales 	}
601825163bd5SWebb Scales 
6019d604f533SWebb Scales 	/* Do not attempt on controller */
6020c59d04f3SDon Brace 	if (is_hba_lunid(dev->scsi3addr)) {
6021c59d04f3SDon Brace 		rc = SUCCESS;
6022c59d04f3SDon Brace 		goto return_reset_status;
6023c59d04f3SDon Brace 	}
6024d604f533SWebb Scales 
60250b9b7b6eSScott Teel 	if (is_logical_dev_addr_mode(dev->scsi3addr))
60260b9b7b6eSScott Teel 		reset_type = HPSA_DEVICE_RESET_MSG;
60270b9b7b6eSScott Teel 	else
60280b9b7b6eSScott Teel 		reset_type = HPSA_PHYS_TARGET_RESET;
60290b9b7b6eSScott Teel 
60300b9b7b6eSScott Teel 	sprintf(msg, "resetting %s",
60310b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
60320b9b7b6eSScott Teel 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
603325163bd5SWebb Scales 
6034c5dfd106SDon Brace 	/*
6035c5dfd106SDon Brace 	 * wait to see if any commands will complete before sending reset
6036c5dfd106SDon Brace 	 */
6037c5dfd106SDon Brace 	dev->in_reset = true; /* block any new cmds from OS for this device */
6038c5dfd106SDon Brace 	for (i = 0; i < 10; i++) {
6039c5dfd106SDon Brace 		if (atomic_read(&dev->commands_outstanding) > 0)
6040c5dfd106SDon Brace 			msleep(1000);
6041c5dfd106SDon Brace 		else
6042c5dfd106SDon Brace 			break;
6043c5dfd106SDon Brace 	}
6044c5dfd106SDon Brace 
6045edd16368SStephen M. Cameron 	/* send a reset to the SCSI LUN which the command was sent to */
6046c5dfd106SDon Brace 	rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6047c59d04f3SDon Brace 	if (rc == 0)
6048c59d04f3SDon Brace 		rc = SUCCESS;
6049c59d04f3SDon Brace 	else
6050c59d04f3SDon Brace 		rc = FAILED;
6051c59d04f3SDon Brace 
60520b9b7b6eSScott Teel 	sprintf(msg, "reset %s %s",
60530b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6054c59d04f3SDon Brace 		rc == SUCCESS ? "completed successfully" : "failed");
6055d604f533SWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6056c59d04f3SDon Brace 
6057c59d04f3SDon Brace return_reset_status:
6058c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
6059da03ded0SDon Brace 	h->reset_in_progress = 0;
6060c5dfd106SDon Brace 	if (dev)
6061c5dfd106SDon Brace 		dev->in_reset = false;
6062c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
6063c59d04f3SDon Brace 	return rc;
6064edd16368SStephen M. Cameron }
6065edd16368SStephen M. Cameron 
6066edd16368SStephen M. Cameron /*
606773153fe5SWebb Scales  * For operations with an associated SCSI command, a command block is allocated
606873153fe5SWebb Scales  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
606973153fe5SWebb Scales  * block request tag as an index into a table of entries.  cmd_tagged_free() is
607073153fe5SWebb Scales  * the complement, although cmd_free() may be called instead.
607173153fe5SWebb Scales  */
607273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
607373153fe5SWebb Scales 					    struct scsi_cmnd *scmd)
607473153fe5SWebb Scales {
607573153fe5SWebb Scales 	int idx = hpsa_get_cmd_index(scmd);
607673153fe5SWebb Scales 	struct CommandList *c = h->cmd_pool + idx;
607773153fe5SWebb Scales 
607873153fe5SWebb Scales 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
607973153fe5SWebb Scales 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
608073153fe5SWebb Scales 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
608173153fe5SWebb Scales 		/* The index value comes from the block layer, so if it's out of
608273153fe5SWebb Scales 		 * bounds, it's probably not our bug.
608373153fe5SWebb Scales 		 */
608473153fe5SWebb Scales 		BUG();
608573153fe5SWebb Scales 	}
608673153fe5SWebb Scales 
608773153fe5SWebb Scales 	if (unlikely(!hpsa_is_cmd_idle(c))) {
608873153fe5SWebb Scales 		/*
608973153fe5SWebb Scales 		 * We expect that the SCSI layer will hand us a unique tag
609073153fe5SWebb Scales 		 * value.  Thus, there should never be a collision here between
609173153fe5SWebb Scales 		 * two requests...because if the selected command isn't idle
609273153fe5SWebb Scales 		 * then someone is going to be very disappointed.
609373153fe5SWebb Scales 		 */
60944770e68dSDon Brace 		if (idx != h->last_collision_tag) { /* Print once per tag */
60954770e68dSDon Brace 			dev_warn(&h->pdev->dev,
60964770e68dSDon Brace 				"%s: tag collision (tag=%d)\n", __func__, idx);
60974770e68dSDon Brace 			if (scmd)
609873153fe5SWebb Scales 				scsi_print_command(scmd);
60994770e68dSDon Brace 			h->last_collision_tag = idx;
610073153fe5SWebb Scales 		}
61014770e68dSDon Brace 		return NULL;
61024770e68dSDon Brace 	}
61034770e68dSDon Brace 
61044770e68dSDon Brace 	atomic_inc(&c->refcount);
610573153fe5SWebb Scales 
610673153fe5SWebb Scales 	hpsa_cmd_partial_init(h, idx, c);
610773153fe5SWebb Scales 	return c;
610873153fe5SWebb Scales }
610973153fe5SWebb Scales 
611073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
611173153fe5SWebb Scales {
611273153fe5SWebb Scales 	/*
611373153fe5SWebb Scales 	 * Release our reference to the block.  We don't need to do anything
611408ec46f6SDon Brace 	 * else to free it, because it is accessed by index.
611573153fe5SWebb Scales 	 */
611673153fe5SWebb Scales 	(void)atomic_dec(&c->refcount);
611773153fe5SWebb Scales }
611873153fe5SWebb Scales 
611973153fe5SWebb Scales /*
6120edd16368SStephen M. Cameron  * For operations that cannot sleep, a command block is allocated at init,
6121edd16368SStephen M. Cameron  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6122edd16368SStephen M. Cameron  * which ones are free or in use.  Lock must be held when calling this.
6123edd16368SStephen M. Cameron  * cmd_free() is the complement.
6124bf43caf3SRobert Elliott  * This function never gives up and returns NULL.  If it hangs,
6125bf43caf3SRobert Elliott  * another thread must call cmd_free() to free some tags.
6126edd16368SStephen M. Cameron  */
6127281a7fd0SWebb Scales 
6128edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h)
6129edd16368SStephen M. Cameron {
6130edd16368SStephen M. Cameron 	struct CommandList *c;
6131360c73bdSStephen Cameron 	int refcount, i;
613273153fe5SWebb Scales 	int offset = 0;
6133edd16368SStephen M. Cameron 
613433811026SRobert Elliott 	/*
613533811026SRobert Elliott 	 * There is some *extremely* small but non-zero chance that that
61364c413128SStephen M. Cameron 	 * multiple threads could get in here, and one thread could
61374c413128SStephen M. Cameron 	 * be scanning through the list of bits looking for a free
61384c413128SStephen M. Cameron 	 * one, but the free ones are always behind him, and other
61394c413128SStephen M. Cameron 	 * threads sneak in behind him and eat them before he can
61404c413128SStephen M. Cameron 	 * get to them, so that while there is always a free one, a
61414c413128SStephen M. Cameron 	 * very unlucky thread might be starved anyway, never able to
61424c413128SStephen M. Cameron 	 * beat the other threads.  In reality, this happens so
61434c413128SStephen M. Cameron 	 * infrequently as to be indistinguishable from never.
614473153fe5SWebb Scales 	 *
614573153fe5SWebb Scales 	 * Note that we start allocating commands before the SCSI host structure
614673153fe5SWebb Scales 	 * is initialized.  Since the search starts at bit zero, this
614773153fe5SWebb Scales 	 * all works, since we have at least one command structure available;
614873153fe5SWebb Scales 	 * however, it means that the structures with the low indexes have to be
614973153fe5SWebb Scales 	 * reserved for driver-initiated requests, while requests from the block
615073153fe5SWebb Scales 	 * layer will use the higher indexes.
61514c413128SStephen M. Cameron 	 */
61524c413128SStephen M. Cameron 
6153281a7fd0SWebb Scales 	for (;;) {
615473153fe5SWebb Scales 		i = find_next_zero_bit(h->cmd_pool_bits,
615573153fe5SWebb Scales 					HPSA_NRESERVED_CMDS,
615673153fe5SWebb Scales 					offset);
615773153fe5SWebb Scales 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6158281a7fd0SWebb Scales 			offset = 0;
6159281a7fd0SWebb Scales 			continue;
6160281a7fd0SWebb Scales 		}
6161edd16368SStephen M. Cameron 		c = h->cmd_pool + i;
6162281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
6163281a7fd0SWebb Scales 		if (unlikely(refcount > 1)) {
6164281a7fd0SWebb Scales 			cmd_free(h, c); /* already in use */
616573153fe5SWebb Scales 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6166281a7fd0SWebb Scales 			continue;
6167281a7fd0SWebb Scales 		}
6168281a7fd0SWebb Scales 		set_bit(i & (BITS_PER_LONG - 1),
6169281a7fd0SWebb Scales 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6170281a7fd0SWebb Scales 		break; /* it's ours now. */
6171281a7fd0SWebb Scales 	}
6172360c73bdSStephen Cameron 	hpsa_cmd_partial_init(h, i, c);
6173c5dfd106SDon Brace 	c->device = NULL;
6174edd16368SStephen M. Cameron 	return c;
6175edd16368SStephen M. Cameron }
6176edd16368SStephen M. Cameron 
617773153fe5SWebb Scales /*
617873153fe5SWebb Scales  * This is the complementary operation to cmd_alloc().  Note, however, in some
617973153fe5SWebb Scales  * corner cases it may also be used to free blocks allocated by
618073153fe5SWebb Scales  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
618173153fe5SWebb Scales  * the clear-bit is harmless.
618273153fe5SWebb Scales  */
6183edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6184edd16368SStephen M. Cameron {
6185281a7fd0SWebb Scales 	if (atomic_dec_and_test(&c->refcount)) {
6186edd16368SStephen M. Cameron 		int i;
6187edd16368SStephen M. Cameron 
6188edd16368SStephen M. Cameron 		i = c - h->cmd_pool;
6189edd16368SStephen M. Cameron 		clear_bit(i & (BITS_PER_LONG - 1),
6190edd16368SStephen M. Cameron 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6191edd16368SStephen M. Cameron 	}
6192281a7fd0SWebb Scales }
6193edd16368SStephen M. Cameron 
6194edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
6195edd16368SStephen M. Cameron 
61966f4e626fSNathan Chancellor static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
619742a91641SDon Brace 	void __user *arg)
6198edd16368SStephen M. Cameron {
6199edd16368SStephen M. Cameron 	IOCTL32_Command_struct __user *arg32 =
6200edd16368SStephen M. Cameron 	    (IOCTL32_Command_struct __user *) arg;
6201edd16368SStephen M. Cameron 	IOCTL_Command_struct arg64;
6202edd16368SStephen M. Cameron 	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6203edd16368SStephen M. Cameron 	int err;
6204edd16368SStephen M. Cameron 	u32 cp;
6205edd16368SStephen M. Cameron 
6206938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6207edd16368SStephen M. Cameron 	err = 0;
6208edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6209edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6210edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6211edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6212edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6213edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6214edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6215edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6216edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6217edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6218edd16368SStephen M. Cameron 
6219edd16368SStephen M. Cameron 	if (err)
6220edd16368SStephen M. Cameron 		return -EFAULT;
6221edd16368SStephen M. Cameron 
622242a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6223edd16368SStephen M. Cameron 	if (err)
6224edd16368SStephen M. Cameron 		return err;
6225edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6226edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6227edd16368SStephen M. Cameron 	if (err)
6228edd16368SStephen M. Cameron 		return -EFAULT;
6229edd16368SStephen M. Cameron 	return err;
6230edd16368SStephen M. Cameron }
6231edd16368SStephen M. Cameron 
6232edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
62336f4e626fSNathan Chancellor 	unsigned int cmd, void __user *arg)
6234edd16368SStephen M. Cameron {
6235edd16368SStephen M. Cameron 	BIG_IOCTL32_Command_struct __user *arg32 =
6236edd16368SStephen M. Cameron 	    (BIG_IOCTL32_Command_struct __user *) arg;
6237edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct arg64;
6238edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct __user *p =
6239edd16368SStephen M. Cameron 	    compat_alloc_user_space(sizeof(arg64));
6240edd16368SStephen M. Cameron 	int err;
6241edd16368SStephen M. Cameron 	u32 cp;
6242edd16368SStephen M. Cameron 
6243938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6244edd16368SStephen M. Cameron 	err = 0;
6245edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6246edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6247edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6248edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6249edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6250edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6251edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6252edd16368SStephen M. Cameron 	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6253edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6254edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6255edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6256edd16368SStephen M. Cameron 
6257edd16368SStephen M. Cameron 	if (err)
6258edd16368SStephen M. Cameron 		return -EFAULT;
6259edd16368SStephen M. Cameron 
626042a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6261edd16368SStephen M. Cameron 	if (err)
6262edd16368SStephen M. Cameron 		return err;
6263edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6264edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6265edd16368SStephen M. Cameron 	if (err)
6266edd16368SStephen M. Cameron 		return -EFAULT;
6267edd16368SStephen M. Cameron 	return err;
6268edd16368SStephen M. Cameron }
626971fe75a7SStephen M. Cameron 
62706f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
62716f4e626fSNathan Chancellor 			     void __user *arg)
627271fe75a7SStephen M. Cameron {
627371fe75a7SStephen M. Cameron 	switch (cmd) {
627471fe75a7SStephen M. Cameron 	case CCISS_GETPCIINFO:
627571fe75a7SStephen M. Cameron 	case CCISS_GETINTINFO:
627671fe75a7SStephen M. Cameron 	case CCISS_SETINTINFO:
627771fe75a7SStephen M. Cameron 	case CCISS_GETNODENAME:
627871fe75a7SStephen M. Cameron 	case CCISS_SETNODENAME:
627971fe75a7SStephen M. Cameron 	case CCISS_GETHEARTBEAT:
628071fe75a7SStephen M. Cameron 	case CCISS_GETBUSTYPES:
628171fe75a7SStephen M. Cameron 	case CCISS_GETFIRMVER:
628271fe75a7SStephen M. Cameron 	case CCISS_GETDRIVVER:
628371fe75a7SStephen M. Cameron 	case CCISS_REVALIDVOLS:
628471fe75a7SStephen M. Cameron 	case CCISS_DEREGDISK:
628571fe75a7SStephen M. Cameron 	case CCISS_REGNEWDISK:
628671fe75a7SStephen M. Cameron 	case CCISS_REGNEWD:
628771fe75a7SStephen M. Cameron 	case CCISS_RESCANDISK:
628871fe75a7SStephen M. Cameron 	case CCISS_GETLUNINFO:
628971fe75a7SStephen M. Cameron 		return hpsa_ioctl(dev, cmd, arg);
629071fe75a7SStephen M. Cameron 
629171fe75a7SStephen M. Cameron 	case CCISS_PASSTHRU32:
629271fe75a7SStephen M. Cameron 		return hpsa_ioctl32_passthru(dev, cmd, arg);
629371fe75a7SStephen M. Cameron 	case CCISS_BIG_PASSTHRU32:
629471fe75a7SStephen M. Cameron 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
629571fe75a7SStephen M. Cameron 
629671fe75a7SStephen M. Cameron 	default:
629771fe75a7SStephen M. Cameron 		return -ENOIOCTLCMD;
629871fe75a7SStephen M. Cameron 	}
629971fe75a7SStephen M. Cameron }
6300edd16368SStephen M. Cameron #endif
6301edd16368SStephen M. Cameron 
6302edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6303edd16368SStephen M. Cameron {
6304edd16368SStephen M. Cameron 	struct hpsa_pci_info pciinfo;
6305edd16368SStephen M. Cameron 
6306edd16368SStephen M. Cameron 	if (!argp)
6307edd16368SStephen M. Cameron 		return -EINVAL;
6308edd16368SStephen M. Cameron 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6309edd16368SStephen M. Cameron 	pciinfo.bus = h->pdev->bus->number;
6310edd16368SStephen M. Cameron 	pciinfo.dev_fn = h->pdev->devfn;
6311edd16368SStephen M. Cameron 	pciinfo.board_id = h->board_id;
6312edd16368SStephen M. Cameron 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6313edd16368SStephen M. Cameron 		return -EFAULT;
6314edd16368SStephen M. Cameron 	return 0;
6315edd16368SStephen M. Cameron }
6316edd16368SStephen M. Cameron 
6317edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6318edd16368SStephen M. Cameron {
6319edd16368SStephen M. Cameron 	DriverVer_type DriverVer;
6320edd16368SStephen M. Cameron 	unsigned char vmaj, vmin, vsubmin;
6321edd16368SStephen M. Cameron 	int rc;
6322edd16368SStephen M. Cameron 
6323edd16368SStephen M. Cameron 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6324edd16368SStephen M. Cameron 		&vmaj, &vmin, &vsubmin);
6325edd16368SStephen M. Cameron 	if (rc != 3) {
6326edd16368SStephen M. Cameron 		dev_info(&h->pdev->dev, "driver version string '%s' "
6327edd16368SStephen M. Cameron 			"unrecognized.", HPSA_DRIVER_VERSION);
6328edd16368SStephen M. Cameron 		vmaj = 0;
6329edd16368SStephen M. Cameron 		vmin = 0;
6330edd16368SStephen M. Cameron 		vsubmin = 0;
6331edd16368SStephen M. Cameron 	}
6332edd16368SStephen M. Cameron 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6333edd16368SStephen M. Cameron 	if (!argp)
6334edd16368SStephen M. Cameron 		return -EINVAL;
6335edd16368SStephen M. Cameron 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6336edd16368SStephen M. Cameron 		return -EFAULT;
6337edd16368SStephen M. Cameron 	return 0;
6338edd16368SStephen M. Cameron }
6339edd16368SStephen M. Cameron 
6340edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6341edd16368SStephen M. Cameron {
6342edd16368SStephen M. Cameron 	IOCTL_Command_struct iocommand;
6343edd16368SStephen M. Cameron 	struct CommandList *c;
6344edd16368SStephen M. Cameron 	char *buff = NULL;
634550a0decfSStephen M. Cameron 	u64 temp64;
6346c1f63c8fSStephen M. Cameron 	int rc = 0;
6347edd16368SStephen M. Cameron 
6348edd16368SStephen M. Cameron 	if (!argp)
6349edd16368SStephen M. Cameron 		return -EINVAL;
6350edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6351edd16368SStephen M. Cameron 		return -EPERM;
6352edd16368SStephen M. Cameron 	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6353edd16368SStephen M. Cameron 		return -EFAULT;
6354edd16368SStephen M. Cameron 	if ((iocommand.buf_size < 1) &&
6355edd16368SStephen M. Cameron 	    (iocommand.Request.Type.Direction != XFER_NONE)) {
6356edd16368SStephen M. Cameron 		return -EINVAL;
6357edd16368SStephen M. Cameron 	}
6358edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
6359edd16368SStephen M. Cameron 		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6360edd16368SStephen M. Cameron 		if (buff == NULL)
63612dd02d74SRobert Elliott 			return -ENOMEM;
63629233fb10SStephen M. Cameron 		if (iocommand.Request.Type.Direction & XFER_WRITE) {
6363edd16368SStephen M. Cameron 			/* Copy the data into the buffer we created */
6364b03a7771SStephen M. Cameron 			if (copy_from_user(buff, iocommand.buf,
6365b03a7771SStephen M. Cameron 				iocommand.buf_size)) {
6366c1f63c8fSStephen M. Cameron 				rc = -EFAULT;
6367c1f63c8fSStephen M. Cameron 				goto out_kfree;
6368edd16368SStephen M. Cameron 			}
6369b03a7771SStephen M. Cameron 		} else {
6370edd16368SStephen M. Cameron 			memset(buff, 0, iocommand.buf_size);
6371b03a7771SStephen M. Cameron 		}
6372b03a7771SStephen M. Cameron 	}
637345fcb86eSStephen Cameron 	c = cmd_alloc(h);
6374bf43caf3SRobert Elliott 
6375edd16368SStephen M. Cameron 	/* Fill in the command type */
6376edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6377a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6378edd16368SStephen M. Cameron 	/* Fill in Command Header */
6379edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6380edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {	/* buffer to fill */
6381edd16368SStephen M. Cameron 		c->Header.SGList = 1;
638250a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6383edd16368SStephen M. Cameron 	} else	{ /* no buffers to fill */
6384edd16368SStephen M. Cameron 		c->Header.SGList = 0;
638550a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6386edd16368SStephen M. Cameron 	}
6387edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6388edd16368SStephen M. Cameron 
6389edd16368SStephen M. Cameron 	/* Fill in Request block */
6390edd16368SStephen M. Cameron 	memcpy(&c->Request, &iocommand.Request,
6391edd16368SStephen M. Cameron 		sizeof(c->Request));
6392edd16368SStephen M. Cameron 
6393edd16368SStephen M. Cameron 	/* Fill in the scatter gather information */
6394edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
63958bc8f47eSChristoph Hellwig 		temp64 = dma_map_single(&h->pdev->dev, buff,
63968bc8f47eSChristoph Hellwig 			iocommand.buf_size, DMA_BIDIRECTIONAL);
639750a0decfSStephen M. Cameron 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
639850a0decfSStephen M. Cameron 			c->SG[0].Addr = cpu_to_le64(0);
639950a0decfSStephen M. Cameron 			c->SG[0].Len = cpu_to_le32(0);
6400bcc48ffaSStephen M. Cameron 			rc = -ENOMEM;
6401bcc48ffaSStephen M. Cameron 			goto out;
6402bcc48ffaSStephen M. Cameron 		}
640350a0decfSStephen M. Cameron 		c->SG[0].Addr = cpu_to_le64(temp64);
640450a0decfSStephen M. Cameron 		c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
640550a0decfSStephen M. Cameron 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6406edd16368SStephen M. Cameron 	}
6407c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
64083fb134cbSDon Brace 					NO_TIMEOUT);
6409c2dd32e0SStephen M. Cameron 	if (iocommand.buf_size > 0)
64108bc8f47eSChristoph Hellwig 		hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6411edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
641225163bd5SWebb Scales 	if (rc) {
641325163bd5SWebb Scales 		rc = -EIO;
641425163bd5SWebb Scales 		goto out;
641525163bd5SWebb Scales 	}
6416edd16368SStephen M. Cameron 
6417edd16368SStephen M. Cameron 	/* Copy the error information out */
6418edd16368SStephen M. Cameron 	memcpy(&iocommand.error_info, c->err_info,
6419edd16368SStephen M. Cameron 		sizeof(iocommand.error_info));
6420edd16368SStephen M. Cameron 	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6421c1f63c8fSStephen M. Cameron 		rc = -EFAULT;
6422c1f63c8fSStephen M. Cameron 		goto out;
6423edd16368SStephen M. Cameron 	}
64249233fb10SStephen M. Cameron 	if ((iocommand.Request.Type.Direction & XFER_READ) &&
6425b03a7771SStephen M. Cameron 		iocommand.buf_size > 0) {
6426edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6427edd16368SStephen M. Cameron 		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6428c1f63c8fSStephen M. Cameron 			rc = -EFAULT;
6429c1f63c8fSStephen M. Cameron 			goto out;
6430edd16368SStephen M. Cameron 		}
6431edd16368SStephen M. Cameron 	}
6432c1f63c8fSStephen M. Cameron out:
643345fcb86eSStephen Cameron 	cmd_free(h, c);
6434c1f63c8fSStephen M. Cameron out_kfree:
6435c1f63c8fSStephen M. Cameron 	kfree(buff);
6436c1f63c8fSStephen M. Cameron 	return rc;
6437edd16368SStephen M. Cameron }
6438edd16368SStephen M. Cameron 
6439edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6440edd16368SStephen M. Cameron {
6441edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct *ioc;
6442edd16368SStephen M. Cameron 	struct CommandList *c;
6443edd16368SStephen M. Cameron 	unsigned char **buff = NULL;
6444edd16368SStephen M. Cameron 	int *buff_size = NULL;
644550a0decfSStephen M. Cameron 	u64 temp64;
6446edd16368SStephen M. Cameron 	BYTE sg_used = 0;
6447edd16368SStephen M. Cameron 	int status = 0;
644801a02ffcSStephen M. Cameron 	u32 left;
644901a02ffcSStephen M. Cameron 	u32 sz;
6450edd16368SStephen M. Cameron 	BYTE __user *data_ptr;
6451edd16368SStephen M. Cameron 
6452edd16368SStephen M. Cameron 	if (!argp)
6453edd16368SStephen M. Cameron 		return -EINVAL;
6454edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6455edd16368SStephen M. Cameron 		return -EPERM;
6456048a864eSzhong jiang 	ioc = vmemdup_user(argp, sizeof(*ioc));
6457048a864eSzhong jiang 	if (IS_ERR(ioc)) {
6458048a864eSzhong jiang 		status = PTR_ERR(ioc);
6459edd16368SStephen M. Cameron 		goto cleanup1;
6460edd16368SStephen M. Cameron 	}
6461edd16368SStephen M. Cameron 	if ((ioc->buf_size < 1) &&
6462edd16368SStephen M. Cameron 	    (ioc->Request.Type.Direction != XFER_NONE)) {
6463edd16368SStephen M. Cameron 		status = -EINVAL;
6464edd16368SStephen M. Cameron 		goto cleanup1;
6465edd16368SStephen M. Cameron 	}
6466edd16368SStephen M. Cameron 	/* Check kmalloc limits  using all SGs */
6467edd16368SStephen M. Cameron 	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6468edd16368SStephen M. Cameron 		status = -EINVAL;
6469edd16368SStephen M. Cameron 		goto cleanup1;
6470edd16368SStephen M. Cameron 	}
6471d66ae08bSStephen M. Cameron 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6472edd16368SStephen M. Cameron 		status = -EINVAL;
6473edd16368SStephen M. Cameron 		goto cleanup1;
6474edd16368SStephen M. Cameron 	}
64756396bb22SKees Cook 	buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6476edd16368SStephen M. Cameron 	if (!buff) {
6477edd16368SStephen M. Cameron 		status = -ENOMEM;
6478edd16368SStephen M. Cameron 		goto cleanup1;
6479edd16368SStephen M. Cameron 	}
64806da2ec56SKees Cook 	buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6481edd16368SStephen M. Cameron 	if (!buff_size) {
6482edd16368SStephen M. Cameron 		status = -ENOMEM;
6483edd16368SStephen M. Cameron 		goto cleanup1;
6484edd16368SStephen M. Cameron 	}
6485edd16368SStephen M. Cameron 	left = ioc->buf_size;
6486edd16368SStephen M. Cameron 	data_ptr = ioc->buf;
6487edd16368SStephen M. Cameron 	while (left) {
6488edd16368SStephen M. Cameron 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6489edd16368SStephen M. Cameron 		buff_size[sg_used] = sz;
6490edd16368SStephen M. Cameron 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6491edd16368SStephen M. Cameron 		if (buff[sg_used] == NULL) {
6492edd16368SStephen M. Cameron 			status = -ENOMEM;
6493edd16368SStephen M. Cameron 			goto cleanup1;
6494edd16368SStephen M. Cameron 		}
64959233fb10SStephen M. Cameron 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6496edd16368SStephen M. Cameron 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
64970758f4f7SStephen M. Cameron 				status = -EFAULT;
6498edd16368SStephen M. Cameron 				goto cleanup1;
6499edd16368SStephen M. Cameron 			}
6500edd16368SStephen M. Cameron 		} else
6501edd16368SStephen M. Cameron 			memset(buff[sg_used], 0, sz);
6502edd16368SStephen M. Cameron 		left -= sz;
6503edd16368SStephen M. Cameron 		data_ptr += sz;
6504edd16368SStephen M. Cameron 		sg_used++;
6505edd16368SStephen M. Cameron 	}
650645fcb86eSStephen Cameron 	c = cmd_alloc(h);
6507bf43caf3SRobert Elliott 
6508edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6509a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6510edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
651150a0decfSStephen M. Cameron 	c->Header.SGList = (u8) sg_used;
651250a0decfSStephen M. Cameron 	c->Header.SGTotal = cpu_to_le16(sg_used);
6513edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6514edd16368SStephen M. Cameron 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6515edd16368SStephen M. Cameron 	if (ioc->buf_size > 0) {
6516edd16368SStephen M. Cameron 		int i;
6517edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
65188bc8f47eSChristoph Hellwig 			temp64 = dma_map_single(&h->pdev->dev, buff[i],
65198bc8f47eSChristoph Hellwig 				    buff_size[i], DMA_BIDIRECTIONAL);
652050a0decfSStephen M. Cameron 			if (dma_mapping_error(&h->pdev->dev,
652150a0decfSStephen M. Cameron 							(dma_addr_t) temp64)) {
652250a0decfSStephen M. Cameron 				c->SG[i].Addr = cpu_to_le64(0);
652350a0decfSStephen M. Cameron 				c->SG[i].Len = cpu_to_le32(0);
6524bcc48ffaSStephen M. Cameron 				hpsa_pci_unmap(h->pdev, c, i,
65258bc8f47eSChristoph Hellwig 					DMA_BIDIRECTIONAL);
6526bcc48ffaSStephen M. Cameron 				status = -ENOMEM;
6527e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6528bcc48ffaSStephen M. Cameron 			}
652950a0decfSStephen M. Cameron 			c->SG[i].Addr = cpu_to_le64(temp64);
653050a0decfSStephen M. Cameron 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
653150a0decfSStephen M. Cameron 			c->SG[i].Ext = cpu_to_le32(0);
6532edd16368SStephen M. Cameron 		}
653350a0decfSStephen M. Cameron 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6534edd16368SStephen M. Cameron 	}
6535c448ecfaSDon Brace 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
65363fb134cbSDon Brace 						NO_TIMEOUT);
6537b03a7771SStephen M. Cameron 	if (sg_used)
65388bc8f47eSChristoph Hellwig 		hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6539edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
654025163bd5SWebb Scales 	if (status) {
654125163bd5SWebb Scales 		status = -EIO;
654225163bd5SWebb Scales 		goto cleanup0;
654325163bd5SWebb Scales 	}
654425163bd5SWebb Scales 
6545edd16368SStephen M. Cameron 	/* Copy the error information out */
6546edd16368SStephen M. Cameron 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6547edd16368SStephen M. Cameron 	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6548edd16368SStephen M. Cameron 		status = -EFAULT;
6549e2d4a1f6SStephen M. Cameron 		goto cleanup0;
6550edd16368SStephen M. Cameron 	}
65519233fb10SStephen M. Cameron 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
65522b08b3e9SDon Brace 		int i;
65532b08b3e9SDon Brace 
6554edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6555edd16368SStephen M. Cameron 		BYTE __user *ptr = ioc->buf;
6556edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
6557edd16368SStephen M. Cameron 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6558edd16368SStephen M. Cameron 				status = -EFAULT;
6559e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6560edd16368SStephen M. Cameron 			}
6561edd16368SStephen M. Cameron 			ptr += buff_size[i];
6562edd16368SStephen M. Cameron 		}
6563edd16368SStephen M. Cameron 	}
6564edd16368SStephen M. Cameron 	status = 0;
6565e2d4a1f6SStephen M. Cameron cleanup0:
656645fcb86eSStephen Cameron 	cmd_free(h, c);
6567edd16368SStephen M. Cameron cleanup1:
6568edd16368SStephen M. Cameron 	if (buff) {
65692b08b3e9SDon Brace 		int i;
65702b08b3e9SDon Brace 
6571edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++)
6572edd16368SStephen M. Cameron 			kfree(buff[i]);
6573edd16368SStephen M. Cameron 		kfree(buff);
6574edd16368SStephen M. Cameron 	}
6575edd16368SStephen M. Cameron 	kfree(buff_size);
6576048a864eSzhong jiang 	kvfree(ioc);
6577edd16368SStephen M. Cameron 	return status;
6578edd16368SStephen M. Cameron }
6579edd16368SStephen M. Cameron 
6580edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
6581edd16368SStephen M. Cameron 	struct CommandList *c)
6582edd16368SStephen M. Cameron {
6583edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6584edd16368SStephen M. Cameron 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6585edd16368SStephen M. Cameron 		(void) check_for_unit_attention(h, c);
6586edd16368SStephen M. Cameron }
65870390f0c0SStephen M. Cameron 
6588edd16368SStephen M. Cameron /*
6589edd16368SStephen M. Cameron  * ioctl
6590edd16368SStephen M. Cameron  */
65916f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
65926f4e626fSNathan Chancellor 		      void __user *arg)
6593edd16368SStephen M. Cameron {
6594edd16368SStephen M. Cameron 	struct ctlr_info *h;
6595edd16368SStephen M. Cameron 	void __user *argp = (void __user *)arg;
65960390f0c0SStephen M. Cameron 	int rc;
6597edd16368SStephen M. Cameron 
6598edd16368SStephen M. Cameron 	h = sdev_to_hba(dev);
6599edd16368SStephen M. Cameron 
6600edd16368SStephen M. Cameron 	switch (cmd) {
6601edd16368SStephen M. Cameron 	case CCISS_DEREGDISK:
6602edd16368SStephen M. Cameron 	case CCISS_REGNEWDISK:
6603edd16368SStephen M. Cameron 	case CCISS_REGNEWD:
6604a08a8471SStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
6605edd16368SStephen M. Cameron 		return 0;
6606edd16368SStephen M. Cameron 	case CCISS_GETPCIINFO:
6607edd16368SStephen M. Cameron 		return hpsa_getpciinfo_ioctl(h, argp);
6608edd16368SStephen M. Cameron 	case CCISS_GETDRIVVER:
6609edd16368SStephen M. Cameron 		return hpsa_getdrivver_ioctl(h, argp);
6610edd16368SStephen M. Cameron 	case CCISS_PASSTHRU:
661134f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
66120390f0c0SStephen M. Cameron 			return -EAGAIN;
66130390f0c0SStephen M. Cameron 		rc = hpsa_passthru_ioctl(h, argp);
661434f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
66150390f0c0SStephen M. Cameron 		return rc;
6616edd16368SStephen M. Cameron 	case CCISS_BIG_PASSTHRU:
661734f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
66180390f0c0SStephen M. Cameron 			return -EAGAIN;
66190390f0c0SStephen M. Cameron 		rc = hpsa_big_passthru_ioctl(h, argp);
662034f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
66210390f0c0SStephen M. Cameron 		return rc;
6622edd16368SStephen M. Cameron 	default:
6623edd16368SStephen M. Cameron 		return -ENOTTY;
6624edd16368SStephen M. Cameron 	}
6625edd16368SStephen M. Cameron }
6626edd16368SStephen M. Cameron 
6627c5dfd106SDon Brace static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
662864670ac8SStephen M. Cameron {
662964670ac8SStephen M. Cameron 	struct CommandList *c;
663064670ac8SStephen M. Cameron 
663164670ac8SStephen M. Cameron 	c = cmd_alloc(h);
6632bf43caf3SRobert Elliott 
6633a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map */
6634a2dac136SStephen M. Cameron 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
663564670ac8SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_MSG);
663664670ac8SStephen M. Cameron 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
663764670ac8SStephen M. Cameron 	c->waiting = NULL;
663864670ac8SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
663964670ac8SStephen M. Cameron 	/* Don't wait for completion, the reset won't complete.  Don't free
664064670ac8SStephen M. Cameron 	 * the command either.  This is the last command we will send before
664164670ac8SStephen M. Cameron 	 * re-initializing everything, so it doesn't matter and won't leak.
664264670ac8SStephen M. Cameron 	 */
6643bf43caf3SRobert Elliott 	return;
664464670ac8SStephen M. Cameron }
664564670ac8SStephen M. Cameron 
6646a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6647b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6648edd16368SStephen M. Cameron 	int cmd_type)
6649edd16368SStephen M. Cameron {
66508bc8f47eSChristoph Hellwig 	enum dma_data_direction dir = DMA_NONE;
6651edd16368SStephen M. Cameron 
6652edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6653a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6654edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
6655edd16368SStephen M. Cameron 	if (buff != NULL && size > 0) {
6656edd16368SStephen M. Cameron 		c->Header.SGList = 1;
665750a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6658edd16368SStephen M. Cameron 	} else {
6659edd16368SStephen M. Cameron 		c->Header.SGList = 0;
666050a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6661edd16368SStephen M. Cameron 	}
6662edd16368SStephen M. Cameron 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6663edd16368SStephen M. Cameron 
6664edd16368SStephen M. Cameron 	if (cmd_type == TYPE_CMD) {
6665edd16368SStephen M. Cameron 		switch (cmd) {
6666edd16368SStephen M. Cameron 		case HPSA_INQUIRY:
6667edd16368SStephen M. Cameron 			/* are we trying to read a vital product page */
6668b7bb24ebSStephen M. Cameron 			if (page_code & VPD_PAGE) {
6669edd16368SStephen M. Cameron 				c->Request.CDB[1] = 0x01;
6670b7bb24ebSStephen M. Cameron 				c->Request.CDB[2] = (page_code & 0xff);
6671edd16368SStephen M. Cameron 			}
6672edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6673a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6674a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6675edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6676edd16368SStephen M. Cameron 			c->Request.CDB[0] = HPSA_INQUIRY;
6677edd16368SStephen M. Cameron 			c->Request.CDB[4] = size & 0xFF;
6678edd16368SStephen M. Cameron 			break;
66790a7c3bb8SDon Brace 		case RECEIVE_DIAGNOSTIC:
66800a7c3bb8SDon Brace 			c->Request.CDBLen = 6;
66810a7c3bb8SDon Brace 			c->Request.type_attr_dir =
66820a7c3bb8SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
66830a7c3bb8SDon Brace 			c->Request.Timeout = 0;
66840a7c3bb8SDon Brace 			c->Request.CDB[0] = cmd;
66850a7c3bb8SDon Brace 			c->Request.CDB[1] = 1;
66860a7c3bb8SDon Brace 			c->Request.CDB[2] = 1;
66870a7c3bb8SDon Brace 			c->Request.CDB[3] = (size >> 8) & 0xFF;
66880a7c3bb8SDon Brace 			c->Request.CDB[4] = size & 0xFF;
66890a7c3bb8SDon Brace 			break;
6690edd16368SStephen M. Cameron 		case HPSA_REPORT_LOG:
6691edd16368SStephen M. Cameron 		case HPSA_REPORT_PHYS:
6692edd16368SStephen M. Cameron 			/* Talking to controller so It's a physical command
6693edd16368SStephen M. Cameron 			   mode = 00 target = 0.  Nothing to write.
6694edd16368SStephen M. Cameron 			 */
6695edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6696a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6697a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6698edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6699edd16368SStephen M. Cameron 			c->Request.CDB[0] = cmd;
6700edd16368SStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6701edd16368SStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6702edd16368SStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6703edd16368SStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6704edd16368SStephen M. Cameron 			break;
6705c2adae44SScott Teel 		case BMIC_SENSE_DIAG_OPTIONS:
6706c2adae44SScott Teel 			c->Request.CDBLen = 16;
6707c2adae44SScott Teel 			c->Request.type_attr_dir =
6708c2adae44SScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6709c2adae44SScott Teel 			c->Request.Timeout = 0;
6710c2adae44SScott Teel 			/* Spec says this should be BMIC_WRITE */
6711c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_READ;
6712c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6713c2adae44SScott Teel 			break;
6714c2adae44SScott Teel 		case BMIC_SET_DIAG_OPTIONS:
6715c2adae44SScott Teel 			c->Request.CDBLen = 16;
6716c2adae44SScott Teel 			c->Request.type_attr_dir =
6717c2adae44SScott Teel 					TYPE_ATTR_DIR(cmd_type,
6718c2adae44SScott Teel 						ATTR_SIMPLE, XFER_WRITE);
6719c2adae44SScott Teel 			c->Request.Timeout = 0;
6720c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_WRITE;
6721c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6722c2adae44SScott Teel 			break;
6723edd16368SStephen M. Cameron 		case HPSA_CACHE_FLUSH:
6724edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6725a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6726a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6727a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
6728edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6729edd16368SStephen M. Cameron 			c->Request.CDB[0] = BMIC_WRITE;
6730edd16368SStephen M. Cameron 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6731bb158eabSStephen M. Cameron 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6732bb158eabSStephen M. Cameron 			c->Request.CDB[8] = size & 0xFF;
6733edd16368SStephen M. Cameron 			break;
6734edd16368SStephen M. Cameron 		case TEST_UNIT_READY:
6735edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6736a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6737a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6738edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6739edd16368SStephen M. Cameron 			break;
6740283b4a9bSStephen M. Cameron 		case HPSA_GET_RAID_MAP:
6741283b4a9bSStephen M. Cameron 			c->Request.CDBLen = 12;
6742a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6743a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6744283b4a9bSStephen M. Cameron 			c->Request.Timeout = 0;
6745283b4a9bSStephen M. Cameron 			c->Request.CDB[0] = HPSA_CISS_READ;
6746283b4a9bSStephen M. Cameron 			c->Request.CDB[1] = cmd;
6747283b4a9bSStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6748283b4a9bSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6749283b4a9bSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6750283b4a9bSStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6751283b4a9bSStephen M. Cameron 			break;
6752316b221aSStephen M. Cameron 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6753316b221aSStephen M. Cameron 			c->Request.CDBLen = 10;
6754a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6755a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6756316b221aSStephen M. Cameron 			c->Request.Timeout = 0;
6757316b221aSStephen M. Cameron 			c->Request.CDB[0] = BMIC_READ;
6758316b221aSStephen M. Cameron 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6759316b221aSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6760316b221aSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6761316b221aSStephen M. Cameron 			break;
676203383736SDon Brace 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
676303383736SDon Brace 			c->Request.CDBLen = 10;
676403383736SDon Brace 			c->Request.type_attr_dir =
676503383736SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
676603383736SDon Brace 			c->Request.Timeout = 0;
676703383736SDon Brace 			c->Request.CDB[0] = BMIC_READ;
676803383736SDon Brace 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
676903383736SDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
677003383736SDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
677103383736SDon Brace 			break;
6772d04e62b9SKevin Barnett 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6773d04e62b9SKevin Barnett 			c->Request.CDBLen = 10;
6774d04e62b9SKevin Barnett 			c->Request.type_attr_dir =
6775d04e62b9SKevin Barnett 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6776d04e62b9SKevin Barnett 			c->Request.Timeout = 0;
6777d04e62b9SKevin Barnett 			c->Request.CDB[0] = BMIC_READ;
6778d04e62b9SKevin Barnett 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6779d04e62b9SKevin Barnett 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6780d04e62b9SKevin Barnett 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6781d04e62b9SKevin Barnett 			break;
6782cca8f13bSDon Brace 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6783cca8f13bSDon Brace 			c->Request.CDBLen = 10;
6784cca8f13bSDon Brace 			c->Request.type_attr_dir =
6785cca8f13bSDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6786cca8f13bSDon Brace 			c->Request.Timeout = 0;
6787cca8f13bSDon Brace 			c->Request.CDB[0] = BMIC_READ;
6788cca8f13bSDon Brace 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6789cca8f13bSDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6790cca8f13bSDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6791cca8f13bSDon Brace 			break;
679266749d0dSScott Teel 		case BMIC_IDENTIFY_CONTROLLER:
679366749d0dSScott Teel 			c->Request.CDBLen = 10;
679466749d0dSScott Teel 			c->Request.type_attr_dir =
679566749d0dSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
679666749d0dSScott Teel 			c->Request.Timeout = 0;
679766749d0dSScott Teel 			c->Request.CDB[0] = BMIC_READ;
679866749d0dSScott Teel 			c->Request.CDB[1] = 0;
679966749d0dSScott Teel 			c->Request.CDB[2] = 0;
680066749d0dSScott Teel 			c->Request.CDB[3] = 0;
680166749d0dSScott Teel 			c->Request.CDB[4] = 0;
680266749d0dSScott Teel 			c->Request.CDB[5] = 0;
680366749d0dSScott Teel 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
680466749d0dSScott Teel 			c->Request.CDB[7] = (size >> 16) & 0xFF;
680566749d0dSScott Teel 			c->Request.CDB[8] = (size >> 8) & 0XFF;
680666749d0dSScott Teel 			c->Request.CDB[9] = 0;
680766749d0dSScott Teel 			break;
6808edd16368SStephen M. Cameron 		default:
6809edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6810edd16368SStephen M. Cameron 			BUG();
6811edd16368SStephen M. Cameron 		}
6812edd16368SStephen M. Cameron 	} else if (cmd_type == TYPE_MSG) {
6813edd16368SStephen M. Cameron 		switch (cmd) {
6814edd16368SStephen M. Cameron 
68150b9b7b6eSScott Teel 		case  HPSA_PHYS_TARGET_RESET:
68160b9b7b6eSScott Teel 			c->Request.CDBLen = 16;
68170b9b7b6eSScott Teel 			c->Request.type_attr_dir =
68180b9b7b6eSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
68190b9b7b6eSScott Teel 			c->Request.Timeout = 0; /* Don't time out */
68200b9b7b6eSScott Teel 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
68210b9b7b6eSScott Teel 			c->Request.CDB[0] = HPSA_RESET;
68220b9b7b6eSScott Teel 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
68230b9b7b6eSScott Teel 			/* Physical target reset needs no control bytes 4-7*/
68240b9b7b6eSScott Teel 			c->Request.CDB[4] = 0x00;
68250b9b7b6eSScott Teel 			c->Request.CDB[5] = 0x00;
68260b9b7b6eSScott Teel 			c->Request.CDB[6] = 0x00;
68270b9b7b6eSScott Teel 			c->Request.CDB[7] = 0x00;
68280b9b7b6eSScott Teel 			break;
6829edd16368SStephen M. Cameron 		case  HPSA_DEVICE_RESET_MSG:
6830edd16368SStephen M. Cameron 			c->Request.CDBLen = 16;
6831a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6832a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6833edd16368SStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
683464670ac8SStephen M. Cameron 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
683564670ac8SStephen M. Cameron 			c->Request.CDB[0] =  cmd;
683621e89afdSStephen M. Cameron 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6837edd16368SStephen M. Cameron 			/* If bytes 4-7 are zero, it means reset the */
6838edd16368SStephen M. Cameron 			/* LunID device */
6839edd16368SStephen M. Cameron 			c->Request.CDB[4] = 0x00;
6840edd16368SStephen M. Cameron 			c->Request.CDB[5] = 0x00;
6841edd16368SStephen M. Cameron 			c->Request.CDB[6] = 0x00;
6842edd16368SStephen M. Cameron 			c->Request.CDB[7] = 0x00;
6843edd16368SStephen M. Cameron 			break;
6844edd16368SStephen M. Cameron 		default:
6845edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
6846edd16368SStephen M. Cameron 				cmd);
6847edd16368SStephen M. Cameron 			BUG();
6848edd16368SStephen M. Cameron 		}
6849edd16368SStephen M. Cameron 	} else {
6850edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6851edd16368SStephen M. Cameron 		BUG();
6852edd16368SStephen M. Cameron 	}
6853edd16368SStephen M. Cameron 
6854a505b86fSStephen M. Cameron 	switch (GET_DIR(c->Request.type_attr_dir)) {
6855edd16368SStephen M. Cameron 	case XFER_READ:
68568bc8f47eSChristoph Hellwig 		dir = DMA_FROM_DEVICE;
6857edd16368SStephen M. Cameron 		break;
6858edd16368SStephen M. Cameron 	case XFER_WRITE:
68598bc8f47eSChristoph Hellwig 		dir = DMA_TO_DEVICE;
6860edd16368SStephen M. Cameron 		break;
6861edd16368SStephen M. Cameron 	case XFER_NONE:
68628bc8f47eSChristoph Hellwig 		dir = DMA_NONE;
6863edd16368SStephen M. Cameron 		break;
6864edd16368SStephen M. Cameron 	default:
68658bc8f47eSChristoph Hellwig 		dir = DMA_BIDIRECTIONAL;
6866edd16368SStephen M. Cameron 	}
68678bc8f47eSChristoph Hellwig 	if (hpsa_map_one(h->pdev, c, buff, size, dir))
6868a2dac136SStephen M. Cameron 		return -1;
6869a2dac136SStephen M. Cameron 	return 0;
6870edd16368SStephen M. Cameron }
6871edd16368SStephen M. Cameron 
6872edd16368SStephen M. Cameron /*
6873edd16368SStephen M. Cameron  * Map (physical) PCI mem into (virtual) kernel space
6874edd16368SStephen M. Cameron  */
6875edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size)
6876edd16368SStephen M. Cameron {
6877edd16368SStephen M. Cameron 	ulong page_base = ((ulong) base) & PAGE_MASK;
6878edd16368SStephen M. Cameron 	ulong page_offs = ((ulong) base) - page_base;
6879*4bdc0d67SChristoph Hellwig 	void __iomem *page_remapped = ioremap(page_base,
6880088ba34cSStephen M. Cameron 		page_offs + size);
6881edd16368SStephen M. Cameron 
6882edd16368SStephen M. Cameron 	return page_remapped ? (page_remapped + page_offs) : NULL;
6883edd16368SStephen M. Cameron }
6884edd16368SStephen M. Cameron 
6885254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6886edd16368SStephen M. Cameron {
6887254f796bSMatt Gates 	return h->access.command_completed(h, q);
6888edd16368SStephen M. Cameron }
6889edd16368SStephen M. Cameron 
6890900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h)
6891edd16368SStephen M. Cameron {
6892edd16368SStephen M. Cameron 	return h->access.intr_pending(h);
6893edd16368SStephen M. Cameron }
6894edd16368SStephen M. Cameron 
6895edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h)
6896edd16368SStephen M. Cameron {
689710f66018SStephen M. Cameron 	return (h->access.intr_pending(h) == 0) ||
689810f66018SStephen M. Cameron 		(h->interrupts_enabled == 0);
6899edd16368SStephen M. Cameron }
6900edd16368SStephen M. Cameron 
690101a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
690201a02ffcSStephen M. Cameron 	u32 raw_tag)
6903edd16368SStephen M. Cameron {
6904edd16368SStephen M. Cameron 	if (unlikely(tag_index >= h->nr_cmds)) {
6905edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6906edd16368SStephen M. Cameron 		return 1;
6907edd16368SStephen M. Cameron 	}
6908edd16368SStephen M. Cameron 	return 0;
6909edd16368SStephen M. Cameron }
6910edd16368SStephen M. Cameron 
69115a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c)
6912edd16368SStephen M. Cameron {
6913e85c5974SStephen M. Cameron 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6914c349775eSScott Teel 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6915c349775eSScott Teel 			|| c->cmd_type == CMD_IOACCEL2))
69161fb011fbSStephen M. Cameron 		complete_scsi_command(c);
69178be986ccSStephen Cameron 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6918edd16368SStephen M. Cameron 		complete(c->waiting);
6919a104c99fSStephen M. Cameron }
6920a104c99fSStephen M. Cameron 
6921303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */
69221d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h,
6923303932fdSDon Brace 	u32 raw_tag)
6924303932fdSDon Brace {
6925303932fdSDon Brace 	u32 tag_index;
6926303932fdSDon Brace 	struct CommandList *c;
6927303932fdSDon Brace 
6928f2405db8SDon Brace 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
69291d94f94dSStephen M. Cameron 	if (!bad_tag(h, tag_index, raw_tag)) {
6930303932fdSDon Brace 		c = h->cmd_pool + tag_index;
69315a3d16f5SStephen M. Cameron 		finish_cmd(c);
69321d94f94dSStephen M. Cameron 	}
6933303932fdSDon Brace }
6934303932fdSDon Brace 
693564670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt
693664670ac8SStephen M. Cameron  * after a soft reset, even if we turned interrupts off.
693764670ac8SStephen M. Cameron  * Only need to check for this in the hpsa_xxx_discard_completions
693864670ac8SStephen M. Cameron  * functions.
693964670ac8SStephen M. Cameron  */
694064670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h)
694164670ac8SStephen M. Cameron {
694264670ac8SStephen M. Cameron 	if (likely(!reset_devices))
694364670ac8SStephen M. Cameron 		return 0;
694464670ac8SStephen M. Cameron 
694564670ac8SStephen M. Cameron 	if (likely(h->interrupts_enabled))
694664670ac8SStephen M. Cameron 		return 0;
694764670ac8SStephen M. Cameron 
694864670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
694964670ac8SStephen M. Cameron 		"(known firmware bug.)  Ignoring.\n");
695064670ac8SStephen M. Cameron 
695164670ac8SStephen M. Cameron 	return 1;
695264670ac8SStephen M. Cameron }
695364670ac8SStephen M. Cameron 
6954254f796bSMatt Gates /*
6955254f796bSMatt Gates  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6956254f796bSMatt Gates  * Relies on (h-q[x] == x) being true for x such that
6957254f796bSMatt Gates  * 0 <= x < MAX_REPLY_QUEUES.
6958254f796bSMatt Gates  */
6959254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue)
696064670ac8SStephen M. Cameron {
6961254f796bSMatt Gates 	return container_of((queue - *queue), struct ctlr_info, q[0]);
6962254f796bSMatt Gates }
6963254f796bSMatt Gates 
6964254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6965254f796bSMatt Gates {
6966254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
6967254f796bSMatt Gates 	u8 q = *(u8 *) queue;
696864670ac8SStephen M. Cameron 	u32 raw_tag;
696964670ac8SStephen M. Cameron 
697064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
697164670ac8SStephen M. Cameron 		return IRQ_NONE;
697264670ac8SStephen M. Cameron 
697364670ac8SStephen M. Cameron 	if (interrupt_not_for_us(h))
697464670ac8SStephen M. Cameron 		return IRQ_NONE;
6975a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
697664670ac8SStephen M. Cameron 	while (interrupt_pending(h)) {
6977254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
697864670ac8SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY)
6979254f796bSMatt Gates 			raw_tag = next_command(h, q);
698064670ac8SStephen M. Cameron 	}
698164670ac8SStephen M. Cameron 	return IRQ_HANDLED;
698264670ac8SStephen M. Cameron }
698364670ac8SStephen M. Cameron 
6984254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
698564670ac8SStephen M. Cameron {
6986254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
698764670ac8SStephen M. Cameron 	u32 raw_tag;
6988254f796bSMatt Gates 	u8 q = *(u8 *) queue;
698964670ac8SStephen M. Cameron 
699064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
699164670ac8SStephen M. Cameron 		return IRQ_NONE;
699264670ac8SStephen M. Cameron 
6993a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
6994254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
699564670ac8SStephen M. Cameron 	while (raw_tag != FIFO_EMPTY)
6996254f796bSMatt Gates 		raw_tag = next_command(h, q);
699764670ac8SStephen M. Cameron 	return IRQ_HANDLED;
699864670ac8SStephen M. Cameron }
699964670ac8SStephen M. Cameron 
7000254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7001edd16368SStephen M. Cameron {
7002254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
7003303932fdSDon Brace 	u32 raw_tag;
7004254f796bSMatt Gates 	u8 q = *(u8 *) queue;
7005edd16368SStephen M. Cameron 
7006edd16368SStephen M. Cameron 	if (interrupt_not_for_us(h))
7007edd16368SStephen M. Cameron 		return IRQ_NONE;
7008a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
700910f66018SStephen M. Cameron 	while (interrupt_pending(h)) {
7010254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
701110f66018SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY) {
70121d94f94dSStephen M. Cameron 			process_indexed_cmd(h, raw_tag);
7013254f796bSMatt Gates 			raw_tag = next_command(h, q);
701410f66018SStephen M. Cameron 		}
701510f66018SStephen M. Cameron 	}
701610f66018SStephen M. Cameron 	return IRQ_HANDLED;
701710f66018SStephen M. Cameron }
701810f66018SStephen M. Cameron 
7019254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
702010f66018SStephen M. Cameron {
7021254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
702210f66018SStephen M. Cameron 	u32 raw_tag;
7023254f796bSMatt Gates 	u8 q = *(u8 *) queue;
702410f66018SStephen M. Cameron 
7025a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7026254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
7027303932fdSDon Brace 	while (raw_tag != FIFO_EMPTY) {
70281d94f94dSStephen M. Cameron 		process_indexed_cmd(h, raw_tag);
7029254f796bSMatt Gates 		raw_tag = next_command(h, q);
7030edd16368SStephen M. Cameron 	}
7031edd16368SStephen M. Cameron 	return IRQ_HANDLED;
7032edd16368SStephen M. Cameron }
7033edd16368SStephen M. Cameron 
7034a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works
7035a9a3a273SStephen M. Cameron  * in simple mode, not performant mode due to the tag lookup.
7036a9a3a273SStephen M. Cameron  * We only ever use this immediately after a controller reset.
7037a9a3a273SStephen M. Cameron  */
70386f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7039edd16368SStephen M. Cameron 			unsigned char type)
7040edd16368SStephen M. Cameron {
7041edd16368SStephen M. Cameron 	struct Command {
7042edd16368SStephen M. Cameron 		struct CommandListHeader CommandHeader;
7043edd16368SStephen M. Cameron 		struct RequestBlock Request;
7044edd16368SStephen M. Cameron 		struct ErrDescriptor ErrorDescriptor;
7045edd16368SStephen M. Cameron 	};
7046edd16368SStephen M. Cameron 	struct Command *cmd;
7047edd16368SStephen M. Cameron 	static const size_t cmd_sz = sizeof(*cmd) +
7048edd16368SStephen M. Cameron 					sizeof(cmd->ErrorDescriptor);
7049edd16368SStephen M. Cameron 	dma_addr_t paddr64;
70502b08b3e9SDon Brace 	__le32 paddr32;
70512b08b3e9SDon Brace 	u32 tag;
7052edd16368SStephen M. Cameron 	void __iomem *vaddr;
7053edd16368SStephen M. Cameron 	int i, err;
7054edd16368SStephen M. Cameron 
7055edd16368SStephen M. Cameron 	vaddr = pci_ioremap_bar(pdev, 0);
7056edd16368SStephen M. Cameron 	if (vaddr == NULL)
7057edd16368SStephen M. Cameron 		return -ENOMEM;
7058edd16368SStephen M. Cameron 
7059edd16368SStephen M. Cameron 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7060edd16368SStephen M. Cameron 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7061edd16368SStephen M. Cameron 	 * memory.
7062edd16368SStephen M. Cameron 	 */
70638bc8f47eSChristoph Hellwig 	err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7064edd16368SStephen M. Cameron 	if (err) {
7065edd16368SStephen M. Cameron 		iounmap(vaddr);
70661eaec8f3SRobert Elliott 		return err;
7067edd16368SStephen M. Cameron 	}
7068edd16368SStephen M. Cameron 
70698bc8f47eSChristoph Hellwig 	cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7070edd16368SStephen M. Cameron 	if (cmd == NULL) {
7071edd16368SStephen M. Cameron 		iounmap(vaddr);
7072edd16368SStephen M. Cameron 		return -ENOMEM;
7073edd16368SStephen M. Cameron 	}
7074edd16368SStephen M. Cameron 
7075edd16368SStephen M. Cameron 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7076edd16368SStephen M. Cameron 	 * although there's no guarantee, we assume that the address is at
7077edd16368SStephen M. Cameron 	 * least 4-byte aligned (most likely, it's page-aligned).
7078edd16368SStephen M. Cameron 	 */
70792b08b3e9SDon Brace 	paddr32 = cpu_to_le32(paddr64);
7080edd16368SStephen M. Cameron 
7081edd16368SStephen M. Cameron 	cmd->CommandHeader.ReplyQueue = 0;
7082edd16368SStephen M. Cameron 	cmd->CommandHeader.SGList = 0;
708350a0decfSStephen M. Cameron 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
70842b08b3e9SDon Brace 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7085edd16368SStephen M. Cameron 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7086edd16368SStephen M. Cameron 
7087edd16368SStephen M. Cameron 	cmd->Request.CDBLen = 16;
7088a505b86fSStephen M. Cameron 	cmd->Request.type_attr_dir =
7089a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7090edd16368SStephen M. Cameron 	cmd->Request.Timeout = 0; /* Don't time out */
7091edd16368SStephen M. Cameron 	cmd->Request.CDB[0] = opcode;
7092edd16368SStephen M. Cameron 	cmd->Request.CDB[1] = type;
7093edd16368SStephen M. Cameron 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
709450a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Addr =
70952b08b3e9SDon Brace 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
709650a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7097edd16368SStephen M. Cameron 
70982b08b3e9SDon Brace 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7099edd16368SStephen M. Cameron 
7100edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7101edd16368SStephen M. Cameron 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
71022b08b3e9SDon Brace 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7103edd16368SStephen M. Cameron 			break;
7104edd16368SStephen M. Cameron 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7105edd16368SStephen M. Cameron 	}
7106edd16368SStephen M. Cameron 
7107edd16368SStephen M. Cameron 	iounmap(vaddr);
7108edd16368SStephen M. Cameron 
7109edd16368SStephen M. Cameron 	/* we leak the DMA buffer here ... no choice since the controller could
7110edd16368SStephen M. Cameron 	 *  still complete the command.
7111edd16368SStephen M. Cameron 	 */
7112edd16368SStephen M. Cameron 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7113edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7114edd16368SStephen M. Cameron 			opcode, type);
7115edd16368SStephen M. Cameron 		return -ETIMEDOUT;
7116edd16368SStephen M. Cameron 	}
7117edd16368SStephen M. Cameron 
71188bc8f47eSChristoph Hellwig 	dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7119edd16368SStephen M. Cameron 
7120edd16368SStephen M. Cameron 	if (tag & HPSA_ERROR_BIT) {
7121edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7122edd16368SStephen M. Cameron 			opcode, type);
7123edd16368SStephen M. Cameron 		return -EIO;
7124edd16368SStephen M. Cameron 	}
7125edd16368SStephen M. Cameron 
7126edd16368SStephen M. Cameron 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7127edd16368SStephen M. Cameron 		opcode, type);
7128edd16368SStephen M. Cameron 	return 0;
7129edd16368SStephen M. Cameron }
7130edd16368SStephen M. Cameron 
7131edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0)
7132edd16368SStephen M. Cameron 
71331df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev,
713442a91641SDon Brace 	void __iomem *vaddr, u32 use_doorbell)
7135edd16368SStephen M. Cameron {
7136edd16368SStephen M. Cameron 
71371df8552aSStephen M. Cameron 	if (use_doorbell) {
71381df8552aSStephen M. Cameron 		/* For everything after the P600, the PCI power state method
71391df8552aSStephen M. Cameron 		 * of resetting the controller doesn't work, so we have this
71401df8552aSStephen M. Cameron 		 * other way using the doorbell register.
7141edd16368SStephen M. Cameron 		 */
71421df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7143cf0b08d0SStephen M. Cameron 		writel(use_doorbell, vaddr + SA5_DOORBELL);
714485009239SStephen M. Cameron 
714500701a96SJustin Lindley 		/* PMC hardware guys tell us we need a 10 second delay after
714685009239SStephen M. Cameron 		 * doorbell reset and before any attempt to talk to the board
714785009239SStephen M. Cameron 		 * at all to ensure that this actually works and doesn't fall
714885009239SStephen M. Cameron 		 * over in some weird corner cases.
714985009239SStephen M. Cameron 		 */
715000701a96SJustin Lindley 		msleep(10000);
71511df8552aSStephen M. Cameron 	} else { /* Try to do it the PCI power state way */
7152edd16368SStephen M. Cameron 
7153edd16368SStephen M. Cameron 		/* Quoting from the Open CISS Specification: "The Power
7154edd16368SStephen M. Cameron 		 * Management Control/Status Register (CSR) controls the power
7155edd16368SStephen M. Cameron 		 * state of the device.  The normal operating state is D0,
7156edd16368SStephen M. Cameron 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
71571df8552aSStephen M. Cameron 		 * the controller, place the interface device in D3 then to D0,
71581df8552aSStephen M. Cameron 		 * this causes a secondary PCI reset which will reset the
71591df8552aSStephen M. Cameron 		 * controller." */
7160edd16368SStephen M. Cameron 
71612662cab8SDon Brace 		int rc = 0;
71622662cab8SDon Brace 
71631df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
71642662cab8SDon Brace 
7165edd16368SStephen M. Cameron 		/* enter the D3hot power management state */
71662662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D3hot);
71672662cab8SDon Brace 		if (rc)
71682662cab8SDon Brace 			return rc;
7169edd16368SStephen M. Cameron 
7170edd16368SStephen M. Cameron 		msleep(500);
7171edd16368SStephen M. Cameron 
7172edd16368SStephen M. Cameron 		/* enter the D0 power management state */
71732662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D0);
71742662cab8SDon Brace 		if (rc)
71752662cab8SDon Brace 			return rc;
7176c4853efeSMike Miller 
7177c4853efeSMike Miller 		/*
7178c4853efeSMike Miller 		 * The P600 requires a small delay when changing states.
7179c4853efeSMike Miller 		 * Otherwise we may think the board did not reset and we bail.
7180c4853efeSMike Miller 		 * This for kdump only and is particular to the P600.
7181c4853efeSMike Miller 		 */
7182c4853efeSMike Miller 		msleep(500);
71831df8552aSStephen M. Cameron 	}
71841df8552aSStephen M. Cameron 	return 0;
71851df8552aSStephen M. Cameron }
71861df8552aSStephen M. Cameron 
71876f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len)
7188580ada3cSStephen M. Cameron {
7189580ada3cSStephen M. Cameron 	memset(driver_version, 0, len);
7190f79cfec6SStephen M. Cameron 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7191580ada3cSStephen M. Cameron }
7192580ada3cSStephen M. Cameron 
71936f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7194580ada3cSStephen M. Cameron {
7195580ada3cSStephen M. Cameron 	char *driver_version;
7196580ada3cSStephen M. Cameron 	int i, size = sizeof(cfgtable->driver_version);
7197580ada3cSStephen M. Cameron 
7198580ada3cSStephen M. Cameron 	driver_version = kmalloc(size, GFP_KERNEL);
7199580ada3cSStephen M. Cameron 	if (!driver_version)
7200580ada3cSStephen M. Cameron 		return -ENOMEM;
7201580ada3cSStephen M. Cameron 
7202580ada3cSStephen M. Cameron 	init_driver_version(driver_version, size);
7203580ada3cSStephen M. Cameron 	for (i = 0; i < size; i++)
7204580ada3cSStephen M. Cameron 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7205580ada3cSStephen M. Cameron 	kfree(driver_version);
7206580ada3cSStephen M. Cameron 	return 0;
7207580ada3cSStephen M. Cameron }
7208580ada3cSStephen M. Cameron 
72096f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
72106f039790SGreg Kroah-Hartman 					  unsigned char *driver_ver)
7211580ada3cSStephen M. Cameron {
7212580ada3cSStephen M. Cameron 	int i;
7213580ada3cSStephen M. Cameron 
7214580ada3cSStephen M. Cameron 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7215580ada3cSStephen M. Cameron 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7216580ada3cSStephen M. Cameron }
7217580ada3cSStephen M. Cameron 
72186f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7219580ada3cSStephen M. Cameron {
7220580ada3cSStephen M. Cameron 
7221580ada3cSStephen M. Cameron 	char *driver_ver, *old_driver_ver;
7222580ada3cSStephen M. Cameron 	int rc, size = sizeof(cfgtable->driver_version);
7223580ada3cSStephen M. Cameron 
72246da2ec56SKees Cook 	old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7225580ada3cSStephen M. Cameron 	if (!old_driver_ver)
7226580ada3cSStephen M. Cameron 		return -ENOMEM;
7227580ada3cSStephen M. Cameron 	driver_ver = old_driver_ver + size;
7228580ada3cSStephen M. Cameron 
7229580ada3cSStephen M. Cameron 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7230580ada3cSStephen M. Cameron 	 * should have been changed, otherwise we know the reset failed.
7231580ada3cSStephen M. Cameron 	 */
7232580ada3cSStephen M. Cameron 	init_driver_version(old_driver_ver, size);
7233580ada3cSStephen M. Cameron 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7234580ada3cSStephen M. Cameron 	rc = !memcmp(driver_ver, old_driver_ver, size);
7235580ada3cSStephen M. Cameron 	kfree(old_driver_ver);
7236580ada3cSStephen M. Cameron 	return rc;
7237580ada3cSStephen M. Cameron }
72381df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management
72391df8552aSStephen M. Cameron  * states or the using the doorbell register.
72401df8552aSStephen M. Cameron  */
72416b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
72421df8552aSStephen M. Cameron {
72431df8552aSStephen M. Cameron 	u64 cfg_offset;
72441df8552aSStephen M. Cameron 	u32 cfg_base_addr;
72451df8552aSStephen M. Cameron 	u64 cfg_base_addr_index;
72461df8552aSStephen M. Cameron 	void __iomem *vaddr;
72471df8552aSStephen M. Cameron 	unsigned long paddr;
7248580ada3cSStephen M. Cameron 	u32 misc_fw_support;
7249270d05deSStephen M. Cameron 	int rc;
72501df8552aSStephen M. Cameron 	struct CfgTable __iomem *cfgtable;
7251cf0b08d0SStephen M. Cameron 	u32 use_doorbell;
7252270d05deSStephen M. Cameron 	u16 command_register;
72531df8552aSStephen M. Cameron 
72541df8552aSStephen M. Cameron 	/* For controllers as old as the P600, this is very nearly
72551df8552aSStephen M. Cameron 	 * the same thing as
72561df8552aSStephen M. Cameron 	 *
72571df8552aSStephen M. Cameron 	 * pci_save_state(pci_dev);
72581df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D3hot);
72591df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D0);
72601df8552aSStephen M. Cameron 	 * pci_restore_state(pci_dev);
72611df8552aSStephen M. Cameron 	 *
72621df8552aSStephen M. Cameron 	 * For controllers newer than the P600, the pci power state
72631df8552aSStephen M. Cameron 	 * method of resetting doesn't work so we have another way
72641df8552aSStephen M. Cameron 	 * using the doorbell register.
72651df8552aSStephen M. Cameron 	 */
726618867659SStephen M. Cameron 
726760f923b9SRobert Elliott 	if (!ctlr_is_resettable(board_id)) {
726860f923b9SRobert Elliott 		dev_warn(&pdev->dev, "Controller not resettable\n");
726925c1e56aSStephen M. Cameron 		return -ENODEV;
727025c1e56aSStephen M. Cameron 	}
727146380786SStephen M. Cameron 
727246380786SStephen M. Cameron 	/* if controller is soft- but not hard resettable... */
727346380786SStephen M. Cameron 	if (!ctlr_is_hard_resettable(board_id))
727446380786SStephen M. Cameron 		return -ENOTSUPP; /* try soft reset later. */
727518867659SStephen M. Cameron 
7276270d05deSStephen M. Cameron 	/* Save the PCI command register */
7277270d05deSStephen M. Cameron 	pci_read_config_word(pdev, 4, &command_register);
7278270d05deSStephen M. Cameron 	pci_save_state(pdev);
72791df8552aSStephen M. Cameron 
72801df8552aSStephen M. Cameron 	/* find the first memory BAR, so we can find the cfg table */
72811df8552aSStephen M. Cameron 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
72821df8552aSStephen M. Cameron 	if (rc)
72831df8552aSStephen M. Cameron 		return rc;
72841df8552aSStephen M. Cameron 	vaddr = remap_pci_mem(paddr, 0x250);
72851df8552aSStephen M. Cameron 	if (!vaddr)
72861df8552aSStephen M. Cameron 		return -ENOMEM;
72871df8552aSStephen M. Cameron 
72881df8552aSStephen M. Cameron 	/* find cfgtable in order to check if reset via doorbell is supported */
72891df8552aSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
72901df8552aSStephen M. Cameron 					&cfg_base_addr_index, &cfg_offset);
72911df8552aSStephen M. Cameron 	if (rc)
72921df8552aSStephen M. Cameron 		goto unmap_vaddr;
72931df8552aSStephen M. Cameron 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
72941df8552aSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
72951df8552aSStephen M. Cameron 	if (!cfgtable) {
72961df8552aSStephen M. Cameron 		rc = -ENOMEM;
72971df8552aSStephen M. Cameron 		goto unmap_vaddr;
72981df8552aSStephen M. Cameron 	}
7299580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(cfgtable);
7300580ada3cSStephen M. Cameron 	if (rc)
730103741d95STomas Henzl 		goto unmap_cfgtable;
73021df8552aSStephen M. Cameron 
7303cf0b08d0SStephen M. Cameron 	/* If reset via doorbell register is supported, use that.
7304cf0b08d0SStephen M. Cameron 	 * There are two such methods.  Favor the newest method.
7305cf0b08d0SStephen M. Cameron 	 */
73061df8552aSStephen M. Cameron 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7307cf0b08d0SStephen M. Cameron 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7308cf0b08d0SStephen M. Cameron 	if (use_doorbell) {
7309cf0b08d0SStephen M. Cameron 		use_doorbell = DOORBELL_CTLR_RESET2;
7310cf0b08d0SStephen M. Cameron 	} else {
73111df8552aSStephen M. Cameron 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7312cf0b08d0SStephen M. Cameron 		if (use_doorbell) {
7313050f7147SStephen Cameron 			dev_warn(&pdev->dev,
7314050f7147SStephen Cameron 				"Soft reset not supported. Firmware update is required.\n");
731564670ac8SStephen M. Cameron 			rc = -ENOTSUPP; /* try soft reset */
7316cf0b08d0SStephen M. Cameron 			goto unmap_cfgtable;
7317cf0b08d0SStephen M. Cameron 		}
7318cf0b08d0SStephen M. Cameron 	}
73191df8552aSStephen M. Cameron 
73201df8552aSStephen M. Cameron 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
73211df8552aSStephen M. Cameron 	if (rc)
73221df8552aSStephen M. Cameron 		goto unmap_cfgtable;
7323edd16368SStephen M. Cameron 
7324270d05deSStephen M. Cameron 	pci_restore_state(pdev);
7325270d05deSStephen M. Cameron 	pci_write_config_word(pdev, 4, command_register);
7326edd16368SStephen M. Cameron 
73271df8552aSStephen M. Cameron 	/* Some devices (notably the HP Smart Array 5i Controller)
73281df8552aSStephen M. Cameron 	   need a little pause here */
73291df8552aSStephen M. Cameron 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
73301df8552aSStephen M. Cameron 
7331fe5389c8SStephen M. Cameron 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7332fe5389c8SStephen M. Cameron 	if (rc) {
7333fe5389c8SStephen M. Cameron 		dev_warn(&pdev->dev,
7334050f7147SStephen Cameron 			"Failed waiting for board to become ready after hard reset\n");
7335fe5389c8SStephen M. Cameron 		goto unmap_cfgtable;
7336fe5389c8SStephen M. Cameron 	}
7337fe5389c8SStephen M. Cameron 
7338580ada3cSStephen M. Cameron 	rc = controller_reset_failed(vaddr);
7339580ada3cSStephen M. Cameron 	if (rc < 0)
7340580ada3cSStephen M. Cameron 		goto unmap_cfgtable;
7341580ada3cSStephen M. Cameron 	if (rc) {
734264670ac8SStephen M. Cameron 		dev_warn(&pdev->dev, "Unable to successfully reset "
734364670ac8SStephen M. Cameron 			"controller. Will try soft reset.\n");
734464670ac8SStephen M. Cameron 		rc = -ENOTSUPP;
7345580ada3cSStephen M. Cameron 	} else {
734664670ac8SStephen M. Cameron 		dev_info(&pdev->dev, "board ready after hard reset.\n");
73471df8552aSStephen M. Cameron 	}
73481df8552aSStephen M. Cameron 
73491df8552aSStephen M. Cameron unmap_cfgtable:
73501df8552aSStephen M. Cameron 	iounmap(cfgtable);
73511df8552aSStephen M. Cameron 
73521df8552aSStephen M. Cameron unmap_vaddr:
73531df8552aSStephen M. Cameron 	iounmap(vaddr);
73541df8552aSStephen M. Cameron 	return rc;
7355edd16368SStephen M. Cameron }
7356edd16368SStephen M. Cameron 
7357edd16368SStephen M. Cameron /*
7358edd16368SStephen M. Cameron  *  We cannot read the structure directly, for portability we must use
7359edd16368SStephen M. Cameron  *   the io functions.
7360edd16368SStephen M. Cameron  *   This is for debug only.
7361edd16368SStephen M. Cameron  */
736242a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7363edd16368SStephen M. Cameron {
736458f8665cSStephen M. Cameron #ifdef HPSA_DEBUG
7365edd16368SStephen M. Cameron 	int i;
7366edd16368SStephen M. Cameron 	char temp_name[17];
7367edd16368SStephen M. Cameron 
7368edd16368SStephen M. Cameron 	dev_info(dev, "Controller Configuration information\n");
7369edd16368SStephen M. Cameron 	dev_info(dev, "------------------------------------\n");
7370edd16368SStephen M. Cameron 	for (i = 0; i < 4; i++)
7371edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->Signature[i]));
7372edd16368SStephen M. Cameron 	temp_name[4] = '\0';
7373edd16368SStephen M. Cameron 	dev_info(dev, "   Signature = %s\n", temp_name);
7374edd16368SStephen M. Cameron 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7375edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7376edd16368SStephen M. Cameron 	       readl(&(tb->TransportSupport)));
7377edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods active = 0x%x\n",
7378edd16368SStephen M. Cameron 	       readl(&(tb->TransportActive)));
7379edd16368SStephen M. Cameron 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7380edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.TransportRequest)));
7381edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7382edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntDelay)));
7383edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7384edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntCount)));
738569d6e33dSRobert Elliott 	dev_info(dev, "   Max outstanding commands = %d\n",
7386edd16368SStephen M. Cameron 	       readl(&(tb->CmdsOutMax)));
7387edd16368SStephen M. Cameron 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7388edd16368SStephen M. Cameron 	for (i = 0; i < 16; i++)
7389edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->ServerName[i]));
7390edd16368SStephen M. Cameron 	temp_name[16] = '\0';
7391edd16368SStephen M. Cameron 	dev_info(dev, "   Server Name = %s\n", temp_name);
7392edd16368SStephen M. Cameron 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7393edd16368SStephen M. Cameron 		readl(&(tb->HeartBeat)));
7394edd16368SStephen M. Cameron #endif				/* HPSA_DEBUG */
739558f8665cSStephen M. Cameron }
7396edd16368SStephen M. Cameron 
7397edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7398edd16368SStephen M. Cameron {
7399edd16368SStephen M. Cameron 	int i, offset, mem_type, bar_type;
7400edd16368SStephen M. Cameron 
7401edd16368SStephen M. Cameron 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7402edd16368SStephen M. Cameron 		return 0;
7403edd16368SStephen M. Cameron 	offset = 0;
7404edd16368SStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7405edd16368SStephen M. Cameron 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7406edd16368SStephen M. Cameron 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7407edd16368SStephen M. Cameron 			offset += 4;
7408edd16368SStephen M. Cameron 		else {
7409edd16368SStephen M. Cameron 			mem_type = pci_resource_flags(pdev, i) &
7410edd16368SStephen M. Cameron 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7411edd16368SStephen M. Cameron 			switch (mem_type) {
7412edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7413edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7414edd16368SStephen M. Cameron 				offset += 4;	/* 32 bit */
7415edd16368SStephen M. Cameron 				break;
7416edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7417edd16368SStephen M. Cameron 				offset += 8;
7418edd16368SStephen M. Cameron 				break;
7419edd16368SStephen M. Cameron 			default:	/* reserved in PCI 2.2 */
7420edd16368SStephen M. Cameron 				dev_warn(&pdev->dev,
7421edd16368SStephen M. Cameron 				       "base address is invalid\n");
7422edd16368SStephen M. Cameron 				return -1;
7423edd16368SStephen M. Cameron 				break;
7424edd16368SStephen M. Cameron 			}
7425edd16368SStephen M. Cameron 		}
7426edd16368SStephen M. Cameron 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7427edd16368SStephen M. Cameron 			return i + 1;
7428edd16368SStephen M. Cameron 	}
7429edd16368SStephen M. Cameron 	return -1;
7430edd16368SStephen M. Cameron }
7431edd16368SStephen M. Cameron 
7432cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7433cc64c817SRobert Elliott {
7434bc2bb154SChristoph Hellwig 	pci_free_irq_vectors(h->pdev);
7435bc2bb154SChristoph Hellwig 	h->msix_vectors = 0;
7436cc64c817SRobert Elliott }
7437cc64c817SRobert Elliott 
74388b834bffSMing Lei static void hpsa_setup_reply_map(struct ctlr_info *h)
74398b834bffSMing Lei {
74408b834bffSMing Lei 	const struct cpumask *mask;
74418b834bffSMing Lei 	unsigned int queue, cpu;
74428b834bffSMing Lei 
74438b834bffSMing Lei 	for (queue = 0; queue < h->msix_vectors; queue++) {
74448b834bffSMing Lei 		mask = pci_irq_get_affinity(h->pdev, queue);
74458b834bffSMing Lei 		if (!mask)
74468b834bffSMing Lei 			goto fallback;
74478b834bffSMing Lei 
74488b834bffSMing Lei 		for_each_cpu(cpu, mask)
74498b834bffSMing Lei 			h->reply_map[cpu] = queue;
74508b834bffSMing Lei 	}
74518b834bffSMing Lei 	return;
74528b834bffSMing Lei 
74538b834bffSMing Lei fallback:
74548b834bffSMing Lei 	for_each_possible_cpu(cpu)
74558b834bffSMing Lei 		h->reply_map[cpu] = 0;
74568b834bffSMing Lei }
74578b834bffSMing Lei 
7458edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7459050f7147SStephen Cameron  * controllers that are capable. If not, we use legacy INTx mode.
7460edd16368SStephen M. Cameron  */
7461bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h)
7462edd16368SStephen M. Cameron {
7463bc2bb154SChristoph Hellwig 	unsigned int flags = PCI_IRQ_LEGACY;
7464bc2bb154SChristoph Hellwig 	int ret;
7465edd16368SStephen M. Cameron 
7466edd16368SStephen M. Cameron 	/* Some boards advertise MSI but don't really support it */
7467bc2bb154SChristoph Hellwig 	switch (h->board_id) {
7468bc2bb154SChristoph Hellwig 	case 0x40700E11:
7469bc2bb154SChristoph Hellwig 	case 0x40800E11:
7470bc2bb154SChristoph Hellwig 	case 0x40820E11:
7471bc2bb154SChristoph Hellwig 	case 0x40830E11:
7472bc2bb154SChristoph Hellwig 		break;
7473bc2bb154SChristoph Hellwig 	default:
7474bc2bb154SChristoph Hellwig 		ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7475bc2bb154SChristoph Hellwig 				PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7476bc2bb154SChristoph Hellwig 		if (ret > 0) {
7477bc2bb154SChristoph Hellwig 			h->msix_vectors = ret;
7478bc2bb154SChristoph Hellwig 			return 0;
7479eee0f03aSHannes Reinecke 		}
7480bc2bb154SChristoph Hellwig 
7481bc2bb154SChristoph Hellwig 		flags |= PCI_IRQ_MSI;
7482bc2bb154SChristoph Hellwig 		break;
7483edd16368SStephen M. Cameron 	}
7484bc2bb154SChristoph Hellwig 
7485bc2bb154SChristoph Hellwig 	ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7486bc2bb154SChristoph Hellwig 	if (ret < 0)
7487bc2bb154SChristoph Hellwig 		return ret;
7488bc2bb154SChristoph Hellwig 	return 0;
7489edd16368SStephen M. Cameron }
7490edd16368SStephen M. Cameron 
7491135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7492135ae6edSHannes Reinecke 				bool *legacy_board)
7493e5c880d1SStephen M. Cameron {
7494e5c880d1SStephen M. Cameron 	int i;
7495e5c880d1SStephen M. Cameron 	u32 subsystem_vendor_id, subsystem_device_id;
7496e5c880d1SStephen M. Cameron 
7497e5c880d1SStephen M. Cameron 	subsystem_vendor_id = pdev->subsystem_vendor;
7498e5c880d1SStephen M. Cameron 	subsystem_device_id = pdev->subsystem_device;
7499e5c880d1SStephen M. Cameron 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7500e5c880d1SStephen M. Cameron 		    subsystem_vendor_id;
7501e5c880d1SStephen M. Cameron 
7502135ae6edSHannes Reinecke 	if (legacy_board)
7503135ae6edSHannes Reinecke 		*legacy_board = false;
7504e5c880d1SStephen M. Cameron 	for (i = 0; i < ARRAY_SIZE(products); i++)
7505135ae6edSHannes Reinecke 		if (*board_id == products[i].board_id) {
7506135ae6edSHannes Reinecke 			if (products[i].access != &SA5A_access &&
7507135ae6edSHannes Reinecke 			    products[i].access != &SA5B_access)
7508e5c880d1SStephen M. Cameron 				return i;
7509135ae6edSHannes Reinecke 			dev_warn(&pdev->dev,
7510135ae6edSHannes Reinecke 				 "legacy board ID: 0x%08x\n",
7511135ae6edSHannes Reinecke 				 *board_id);
7512135ae6edSHannes Reinecke 			if (legacy_board)
7513135ae6edSHannes Reinecke 			    *legacy_board = true;
7514135ae6edSHannes Reinecke 			return i;
7515135ae6edSHannes Reinecke 		}
7516e5c880d1SStephen M. Cameron 
7517c8cd71f1SHannes Reinecke 	dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7518135ae6edSHannes Reinecke 	if (legacy_board)
7519135ae6edSHannes Reinecke 		*legacy_board = true;
7520e5c880d1SStephen M. Cameron 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7521e5c880d1SStephen M. Cameron }
7522e5c880d1SStephen M. Cameron 
75236f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
75243a7774ceSStephen M. Cameron 				    unsigned long *memory_bar)
75253a7774ceSStephen M. Cameron {
75263a7774ceSStephen M. Cameron 	int i;
75273a7774ceSStephen M. Cameron 
75283a7774ceSStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
752912d2cd47SStephen M. Cameron 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
75303a7774ceSStephen M. Cameron 			/* addressing mode bits already removed */
753112d2cd47SStephen M. Cameron 			*memory_bar = pci_resource_start(pdev, i);
753212d2cd47SStephen M. Cameron 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
75333a7774ceSStephen M. Cameron 				*memory_bar);
75343a7774ceSStephen M. Cameron 			return 0;
75353a7774ceSStephen M. Cameron 		}
753612d2cd47SStephen M. Cameron 	dev_warn(&pdev->dev, "no memory BAR found\n");
75373a7774ceSStephen M. Cameron 	return -ENODEV;
75383a7774ceSStephen M. Cameron }
75393a7774ceSStephen M. Cameron 
75406f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
75416f039790SGreg Kroah-Hartman 				     int wait_for_ready)
75422c4c8c8bSStephen M. Cameron {
7543fe5389c8SStephen M. Cameron 	int i, iterations;
75442c4c8c8bSStephen M. Cameron 	u32 scratchpad;
7545fe5389c8SStephen M. Cameron 	if (wait_for_ready)
7546fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_READY_ITERATIONS;
7547fe5389c8SStephen M. Cameron 	else
7548fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
75492c4c8c8bSStephen M. Cameron 
7550fe5389c8SStephen M. Cameron 	for (i = 0; i < iterations; i++) {
7551fe5389c8SStephen M. Cameron 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7552fe5389c8SStephen M. Cameron 		if (wait_for_ready) {
75532c4c8c8bSStephen M. Cameron 			if (scratchpad == HPSA_FIRMWARE_READY)
75542c4c8c8bSStephen M. Cameron 				return 0;
7555fe5389c8SStephen M. Cameron 		} else {
7556fe5389c8SStephen M. Cameron 			if (scratchpad != HPSA_FIRMWARE_READY)
7557fe5389c8SStephen M. Cameron 				return 0;
7558fe5389c8SStephen M. Cameron 		}
75592c4c8c8bSStephen M. Cameron 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
75602c4c8c8bSStephen M. Cameron 	}
7561fe5389c8SStephen M. Cameron 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
75622c4c8c8bSStephen M. Cameron 	return -ENODEV;
75632c4c8c8bSStephen M. Cameron }
75642c4c8c8bSStephen M. Cameron 
75656f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
75666f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7567a51fd47fSStephen M. Cameron 			       u64 *cfg_offset)
7568a51fd47fSStephen M. Cameron {
7569a51fd47fSStephen M. Cameron 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7570a51fd47fSStephen M. Cameron 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7571a51fd47fSStephen M. Cameron 	*cfg_base_addr &= (u32) 0x0000ffff;
7572a51fd47fSStephen M. Cameron 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7573a51fd47fSStephen M. Cameron 	if (*cfg_base_addr_index == -1) {
7574a51fd47fSStephen M. Cameron 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7575a51fd47fSStephen M. Cameron 		return -ENODEV;
7576a51fd47fSStephen M. Cameron 	}
7577a51fd47fSStephen M. Cameron 	return 0;
7578a51fd47fSStephen M. Cameron }
7579a51fd47fSStephen M. Cameron 
7580195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h)
7581195f2c65SRobert Elliott {
7582105a3dbcSRobert Elliott 	if (h->transtable) {
7583195f2c65SRobert Elliott 		iounmap(h->transtable);
7584105a3dbcSRobert Elliott 		h->transtable = NULL;
7585105a3dbcSRobert Elliott 	}
7586105a3dbcSRobert Elliott 	if (h->cfgtable) {
7587195f2c65SRobert Elliott 		iounmap(h->cfgtable);
7588105a3dbcSRobert Elliott 		h->cfgtable = NULL;
7589105a3dbcSRobert Elliott 	}
7590195f2c65SRobert Elliott }
7591195f2c65SRobert Elliott 
7592195f2c65SRobert Elliott /* Find and map CISS config table and transfer table
7593195f2c65SRobert Elliott + * several items must be unmapped (freed) later
7594195f2c65SRobert Elliott + * */
75956f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h)
7596edd16368SStephen M. Cameron {
759701a02ffcSStephen M. Cameron 	u64 cfg_offset;
759801a02ffcSStephen M. Cameron 	u32 cfg_base_addr;
759901a02ffcSStephen M. Cameron 	u64 cfg_base_addr_index;
7600303932fdSDon Brace 	u32 trans_offset;
7601a51fd47fSStephen M. Cameron 	int rc;
760277c4495cSStephen M. Cameron 
7603a51fd47fSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7604a51fd47fSStephen M. Cameron 		&cfg_base_addr_index, &cfg_offset);
7605a51fd47fSStephen M. Cameron 	if (rc)
7606a51fd47fSStephen M. Cameron 		return rc;
760777c4495cSStephen M. Cameron 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7608a51fd47fSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7609cd3c81c4SRobert Elliott 	if (!h->cfgtable) {
7610cd3c81c4SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
761177c4495cSStephen M. Cameron 		return -ENOMEM;
7612cd3c81c4SRobert Elliott 	}
7613580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7614580ada3cSStephen M. Cameron 	if (rc)
7615580ada3cSStephen M. Cameron 		return rc;
761677c4495cSStephen M. Cameron 	/* Find performant mode table. */
7617a51fd47fSStephen M. Cameron 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
761877c4495cSStephen M. Cameron 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
761977c4495cSStephen M. Cameron 				cfg_base_addr_index)+cfg_offset+trans_offset,
762077c4495cSStephen M. Cameron 				sizeof(*h->transtable));
7621195f2c65SRobert Elliott 	if (!h->transtable) {
7622195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7623195f2c65SRobert Elliott 		hpsa_free_cfgtables(h);
762477c4495cSStephen M. Cameron 		return -ENOMEM;
7625195f2c65SRobert Elliott 	}
762677c4495cSStephen M. Cameron 	return 0;
762777c4495cSStephen M. Cameron }
762877c4495cSStephen M. Cameron 
76296f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7630cba3d38bSStephen M. Cameron {
763141ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16
763241ce4c35SStephen Cameron 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
763341ce4c35SStephen Cameron 
763441ce4c35SStephen Cameron 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
763572ceeaecSStephen M. Cameron 
763672ceeaecSStephen M. Cameron 	/* Limit commands in memory limited kdump scenario. */
763772ceeaecSStephen M. Cameron 	if (reset_devices && h->max_commands > 32)
763872ceeaecSStephen M. Cameron 		h->max_commands = 32;
763972ceeaecSStephen M. Cameron 
764041ce4c35SStephen Cameron 	if (h->max_commands < MIN_MAX_COMMANDS) {
764141ce4c35SStephen Cameron 		dev_warn(&h->pdev->dev,
764241ce4c35SStephen Cameron 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
764341ce4c35SStephen Cameron 			h->max_commands,
764441ce4c35SStephen Cameron 			MIN_MAX_COMMANDS);
764541ce4c35SStephen Cameron 		h->max_commands = MIN_MAX_COMMANDS;
7646cba3d38bSStephen M. Cameron 	}
7647cba3d38bSStephen M. Cameron }
7648cba3d38bSStephen M. Cameron 
7649c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512,
7650c7ee65b3SWebb Scales  * then we know that chained SG blocks work.  (Original smart arrays did not
7651c7ee65b3SWebb Scales  * support chained SG blocks and would return zero for max sg entries.)
7652c7ee65b3SWebb Scales  */
7653c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7654c7ee65b3SWebb Scales {
7655c7ee65b3SWebb Scales 	return h->maxsgentries > 512;
7656c7ee65b3SWebb Scales }
7657c7ee65b3SWebb Scales 
7658b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits:
7659b93d7536SStephen M. Cameron  * max commands, max SG elements without chaining, and with chaining,
7660b93d7536SStephen M. Cameron  * SG chain block size, etc.
7661b93d7536SStephen M. Cameron  */
76626f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h)
7663b93d7536SStephen M. Cameron {
7664cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
766545fcb86eSStephen Cameron 	h->nr_cmds = h->max_commands;
7666b93d7536SStephen M. Cameron 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7667283b4a9bSStephen M. Cameron 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7668c7ee65b3SWebb Scales 	if (hpsa_supports_chained_sg_blocks(h)) {
7669c7ee65b3SWebb Scales 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7670b93d7536SStephen M. Cameron 		h->max_cmd_sg_entries = 32;
76711a63ea6fSWebb Scales 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7672b93d7536SStephen M. Cameron 		h->maxsgentries--; /* save one for chain pointer */
7673b93d7536SStephen M. Cameron 	} else {
7674c7ee65b3SWebb Scales 		/*
7675c7ee65b3SWebb Scales 		 * Original smart arrays supported at most 31 s/g entries
7676c7ee65b3SWebb Scales 		 * embedded inline in the command (trying to use more
7677c7ee65b3SWebb Scales 		 * would lock up the controller)
7678c7ee65b3SWebb Scales 		 */
7679c7ee65b3SWebb Scales 		h->max_cmd_sg_entries = 31;
76801a63ea6fSWebb Scales 		h->maxsgentries = 31; /* default to traditional values */
7681c7ee65b3SWebb Scales 		h->chainsize = 0;
7682b93d7536SStephen M. Cameron 	}
768375167d2cSStephen M. Cameron 
768475167d2cSStephen M. Cameron 	/* Find out what task management functions are supported and cache */
768575167d2cSStephen M. Cameron 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
76860e7a7fceSScott Teel 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
76870e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
76880e7a7fceSScott Teel 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
76890e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
76908be986ccSStephen Cameron 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
76918be986ccSStephen Cameron 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7692b93d7536SStephen M. Cameron }
7693b93d7536SStephen M. Cameron 
769476c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
769576c46e49SStephen M. Cameron {
76960fc9fd40SAkinobu Mita 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7697050f7147SStephen Cameron 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
769876c46e49SStephen M. Cameron 		return false;
769976c46e49SStephen M. Cameron 	}
770076c46e49SStephen M. Cameron 	return true;
770176c46e49SStephen M. Cameron }
770276c46e49SStephen M. Cameron 
770397a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7704f7c39101SStephen M. Cameron {
770597a5e98cSStephen M. Cameron 	u32 driver_support;
7706f7c39101SStephen M. Cameron 
770797a5e98cSStephen M. Cameron 	driver_support = readl(&(h->cfgtable->driver_support));
77080b9e7b74SArnd Bergmann 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
77090b9e7b74SArnd Bergmann #ifdef CONFIG_X86
771097a5e98cSStephen M. Cameron 	driver_support |= ENABLE_SCSI_PREFETCH;
7711f7c39101SStephen M. Cameron #endif
771228e13446SStephen M. Cameron 	driver_support |= ENABLE_UNIT_ATTN;
771328e13446SStephen M. Cameron 	writel(driver_support, &(h->cfgtable->driver_support));
7714f7c39101SStephen M. Cameron }
7715f7c39101SStephen M. Cameron 
77163d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
77173d0eab67SStephen M. Cameron  * in a prefetch beyond physical memory.
77183d0eab67SStephen M. Cameron  */
77193d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
77203d0eab67SStephen M. Cameron {
77213d0eab67SStephen M. Cameron 	u32 dma_prefetch;
77223d0eab67SStephen M. Cameron 
77233d0eab67SStephen M. Cameron 	if (h->board_id != 0x3225103C)
77243d0eab67SStephen M. Cameron 		return;
77253d0eab67SStephen M. Cameron 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
77263d0eab67SStephen M. Cameron 	dma_prefetch |= 0x8000;
77273d0eab67SStephen M. Cameron 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
77283d0eab67SStephen M. Cameron }
77293d0eab67SStephen M. Cameron 
7730c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
773176438d08SStephen M. Cameron {
773276438d08SStephen M. Cameron 	int i;
773376438d08SStephen M. Cameron 	u32 doorbell_value;
773476438d08SStephen M. Cameron 	unsigned long flags;
773576438d08SStephen M. Cameron 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7736007e7aa9SRobert Elliott 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
773776438d08SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
773876438d08SStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
773976438d08SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
774076438d08SStephen M. Cameron 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7741c706a795SRobert Elliott 			goto done;
774276438d08SStephen M. Cameron 		/* delay and try again */
7743007e7aa9SRobert Elliott 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
774476438d08SStephen M. Cameron 	}
7745c706a795SRobert Elliott 	return -ENODEV;
7746c706a795SRobert Elliott done:
7747c706a795SRobert Elliott 	return 0;
774876438d08SStephen M. Cameron }
774976438d08SStephen M. Cameron 
7750c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7751eb6b2ae9SStephen M. Cameron {
7752eb6b2ae9SStephen M. Cameron 	int i;
77536eaf46fdSStephen M. Cameron 	u32 doorbell_value;
77546eaf46fdSStephen M. Cameron 	unsigned long flags;
7755eb6b2ae9SStephen M. Cameron 
7756eb6b2ae9SStephen M. Cameron 	/* under certain very rare conditions, this can take awhile.
7757eb6b2ae9SStephen M. Cameron 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7758eb6b2ae9SStephen M. Cameron 	 * as we enter this code.)
7759eb6b2ae9SStephen M. Cameron 	 */
7760007e7aa9SRobert Elliott 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
776125163bd5SWebb Scales 		if (h->remove_in_progress)
776225163bd5SWebb Scales 			goto done;
77636eaf46fdSStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
77646eaf46fdSStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
77656eaf46fdSStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
7766382be668SDan Carpenter 		if (!(doorbell_value & CFGTBL_ChangeReq))
7767c706a795SRobert Elliott 			goto done;
7768eb6b2ae9SStephen M. Cameron 		/* delay and try again */
7769007e7aa9SRobert Elliott 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7770eb6b2ae9SStephen M. Cameron 	}
7771c706a795SRobert Elliott 	return -ENODEV;
7772c706a795SRobert Elliott done:
7773c706a795SRobert Elliott 	return 0;
77743f4336f3SStephen M. Cameron }
77753f4336f3SStephen M. Cameron 
7776c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */
77776f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h)
77783f4336f3SStephen M. Cameron {
77793f4336f3SStephen M. Cameron 	u32 trans_support;
77803f4336f3SStephen M. Cameron 
77813f4336f3SStephen M. Cameron 	trans_support = readl(&(h->cfgtable->TransportSupport));
77823f4336f3SStephen M. Cameron 	if (!(trans_support & SIMPLE_MODE))
77833f4336f3SStephen M. Cameron 		return -ENOTSUPP;
77843f4336f3SStephen M. Cameron 
77853f4336f3SStephen M. Cameron 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7786283b4a9bSStephen M. Cameron 
77873f4336f3SStephen M. Cameron 	/* Update the field, and then ring the doorbell */
77883f4336f3SStephen M. Cameron 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7789b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
77903f4336f3SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7791c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h))
7792c706a795SRobert Elliott 		goto error;
7793eb6b2ae9SStephen M. Cameron 	print_cfg_table(&h->pdev->dev, h->cfgtable);
7794283b4a9bSStephen M. Cameron 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7795283b4a9bSStephen M. Cameron 		goto error;
7796960a30e7SStephen M. Cameron 	h->transMethod = CFGTBL_Trans_Simple;
7797eb6b2ae9SStephen M. Cameron 	return 0;
7798283b4a9bSStephen M. Cameron error:
7799050f7147SStephen Cameron 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7800283b4a9bSStephen M. Cameron 	return -ENODEV;
7801eb6b2ae9SStephen M. Cameron }
7802eb6b2ae9SStephen M. Cameron 
7803195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */
7804195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h)
7805195f2c65SRobert Elliott {
7806195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);			/* pci_init 4 */
7807195f2c65SRobert Elliott 	iounmap(h->vaddr);			/* pci_init 3 */
7808105a3dbcSRobert Elliott 	h->vaddr = NULL;
7809195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7810943a7021SRobert Elliott 	/*
7811943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7812bff9e34cSMauro Carvalho Chehab 	 * Documentation/driver-api/pci/pci.rst
7813943a7021SRobert Elliott 	 */
7814195f2c65SRobert Elliott 	pci_disable_device(h->pdev);		/* pci_init 1 */
7815943a7021SRobert Elliott 	pci_release_regions(h->pdev);		/* pci_init 2 */
7816195f2c65SRobert Elliott }
7817195f2c65SRobert Elliott 
7818195f2c65SRobert Elliott /* several items must be freed later */
78196f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h)
782077c4495cSStephen M. Cameron {
7821eb6b2ae9SStephen M. Cameron 	int prod_index, err;
7822135ae6edSHannes Reinecke 	bool legacy_board;
7823edd16368SStephen M. Cameron 
7824135ae6edSHannes Reinecke 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7825e5c880d1SStephen M. Cameron 	if (prod_index < 0)
782660f923b9SRobert Elliott 		return prod_index;
7827e5c880d1SStephen M. Cameron 	h->product_name = products[prod_index].product_name;
7828e5c880d1SStephen M. Cameron 	h->access = *(products[prod_index].access);
7829135ae6edSHannes Reinecke 	h->legacy_board = legacy_board;
7830e5a44df8SMatthew Garrett 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7831e5a44df8SMatthew Garrett 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7832e5a44df8SMatthew Garrett 
783355c06c71SStephen M. Cameron 	err = pci_enable_device(h->pdev);
7834edd16368SStephen M. Cameron 	if (err) {
7835195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7836943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7837edd16368SStephen M. Cameron 		return err;
7838edd16368SStephen M. Cameron 	}
7839edd16368SStephen M. Cameron 
7840f79cfec6SStephen M. Cameron 	err = pci_request_regions(h->pdev, HPSA);
7841edd16368SStephen M. Cameron 	if (err) {
784255c06c71SStephen M. Cameron 		dev_err(&h->pdev->dev,
7843195f2c65SRobert Elliott 			"failed to obtain PCI resources\n");
7844943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7845943a7021SRobert Elliott 		return err;
7846edd16368SStephen M. Cameron 	}
78474fa604e1SRobert Elliott 
78484fa604e1SRobert Elliott 	pci_set_master(h->pdev);
78494fa604e1SRobert Elliott 
7850bc2bb154SChristoph Hellwig 	err = hpsa_interrupt_mode(h);
7851bc2bb154SChristoph Hellwig 	if (err)
7852bc2bb154SChristoph Hellwig 		goto clean1;
78538b834bffSMing Lei 
78548b834bffSMing Lei 	/* setup mapping between CPU and reply queue */
78558b834bffSMing Lei 	hpsa_setup_reply_map(h);
78568b834bffSMing Lei 
785712d2cd47SStephen M. Cameron 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
78583a7774ceSStephen M. Cameron 	if (err)
7859195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7860edd16368SStephen M. Cameron 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
7861204892e9SStephen M. Cameron 	if (!h->vaddr) {
7862195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7863204892e9SStephen M. Cameron 		err = -ENOMEM;
7864195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7865204892e9SStephen M. Cameron 	}
7866fe5389c8SStephen M. Cameron 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
78672c4c8c8bSStephen M. Cameron 	if (err)
7868195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
786977c4495cSStephen M. Cameron 	err = hpsa_find_cfgtables(h);
787077c4495cSStephen M. Cameron 	if (err)
7871195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
7872b93d7536SStephen M. Cameron 	hpsa_find_board_params(h);
7873edd16368SStephen M. Cameron 
787476c46e49SStephen M. Cameron 	if (!hpsa_CISS_signature_present(h)) {
7875edd16368SStephen M. Cameron 		err = -ENODEV;
7876195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7877edd16368SStephen M. Cameron 	}
787897a5e98cSStephen M. Cameron 	hpsa_set_driver_support_bits(h);
78793d0eab67SStephen M. Cameron 	hpsa_p600_dma_prefetch_quirk(h);
7880eb6b2ae9SStephen M. Cameron 	err = hpsa_enter_simple_mode(h);
7881eb6b2ae9SStephen M. Cameron 	if (err)
7882195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7883edd16368SStephen M. Cameron 	return 0;
7884edd16368SStephen M. Cameron 
7885195f2c65SRobert Elliott clean4:	/* cfgtables, vaddr, intmode+region, pci */
7886195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);
7887195f2c65SRobert Elliott clean3:	/* vaddr, intmode+region, pci */
7888204892e9SStephen M. Cameron 	iounmap(h->vaddr);
7889105a3dbcSRobert Elliott 	h->vaddr = NULL;
7890195f2c65SRobert Elliott clean2:	/* intmode+region, pci */
7891195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);
7892bc2bb154SChristoph Hellwig clean1:
7893943a7021SRobert Elliott 	/*
7894943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7895bff9e34cSMauro Carvalho Chehab 	 * Documentation/driver-api/pci/pci.rst
7896943a7021SRobert Elliott 	 */
7897195f2c65SRobert Elliott 	pci_disable_device(h->pdev);
7898943a7021SRobert Elliott 	pci_release_regions(h->pdev);
7899edd16368SStephen M. Cameron 	return err;
7900edd16368SStephen M. Cameron }
7901edd16368SStephen M. Cameron 
79026f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h)
7903339b2b14SStephen M. Cameron {
7904339b2b14SStephen M. Cameron 	int rc;
7905339b2b14SStephen M. Cameron 
7906339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64
7907339b2b14SStephen M. Cameron 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7908339b2b14SStephen M. Cameron 	if (!h->hba_inquiry_data)
7909339b2b14SStephen M. Cameron 		return;
7910339b2b14SStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7911339b2b14SStephen M. Cameron 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7912339b2b14SStephen M. Cameron 	if (rc != 0) {
7913339b2b14SStephen M. Cameron 		kfree(h->hba_inquiry_data);
7914339b2b14SStephen M. Cameron 		h->hba_inquiry_data = NULL;
7915339b2b14SStephen M. Cameron 	}
7916339b2b14SStephen M. Cameron }
7917339b2b14SStephen M. Cameron 
79186b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7919edd16368SStephen M. Cameron {
79201df8552aSStephen M. Cameron 	int rc, i;
79213b747298STomas Henzl 	void __iomem *vaddr;
7922edd16368SStephen M. Cameron 
79234c2a8c40SStephen M. Cameron 	if (!reset_devices)
79244c2a8c40SStephen M. Cameron 		return 0;
79254c2a8c40SStephen M. Cameron 
7926132aa220STomas Henzl 	/* kdump kernel is loading, we don't know in which state is
7927132aa220STomas Henzl 	 * the pci interface. The dev->enable_cnt is equal zero
7928132aa220STomas Henzl 	 * so we call enable+disable, wait a while and switch it on.
7929132aa220STomas Henzl 	 */
7930132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7931132aa220STomas Henzl 	if (rc) {
7932132aa220STomas Henzl 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7933132aa220STomas Henzl 		return -ENODEV;
7934132aa220STomas Henzl 	}
7935132aa220STomas Henzl 	pci_disable_device(pdev);
7936132aa220STomas Henzl 	msleep(260);			/* a randomly chosen number */
7937132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7938132aa220STomas Henzl 	if (rc) {
7939132aa220STomas Henzl 		dev_warn(&pdev->dev, "failed to enable device.\n");
7940132aa220STomas Henzl 		return -ENODEV;
7941132aa220STomas Henzl 	}
79424fa604e1SRobert Elliott 
7943859c75abSTomas Henzl 	pci_set_master(pdev);
79444fa604e1SRobert Elliott 
79453b747298STomas Henzl 	vaddr = pci_ioremap_bar(pdev, 0);
79463b747298STomas Henzl 	if (vaddr == NULL) {
79473b747298STomas Henzl 		rc = -ENOMEM;
79483b747298STomas Henzl 		goto out_disable;
79493b747298STomas Henzl 	}
79503b747298STomas Henzl 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
79513b747298STomas Henzl 	iounmap(vaddr);
79523b747298STomas Henzl 
79531df8552aSStephen M. Cameron 	/* Reset the controller with a PCI power-cycle or via doorbell */
79546b6c1cd7STomas Henzl 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7955edd16368SStephen M. Cameron 
79561df8552aSStephen M. Cameron 	/* -ENOTSUPP here means we cannot reset the controller
79571df8552aSStephen M. Cameron 	 * but it's already (and still) up and running in
795818867659SStephen M. Cameron 	 * "performant mode".  Or, it might be 640x, which can't reset
795918867659SStephen M. Cameron 	 * due to concerns about shared bbwc between 6402/6404 pair.
79601df8552aSStephen M. Cameron 	 */
7961adf1b3a3SRobert Elliott 	if (rc)
7962132aa220STomas Henzl 		goto out_disable;
7963edd16368SStephen M. Cameron 
7964edd16368SStephen M. Cameron 	/* Now try to get the controller to respond to a no-op */
79651ba66c9cSRobert Elliott 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7966edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7967edd16368SStephen M. Cameron 		if (hpsa_noop(pdev) == 0)
7968edd16368SStephen M. Cameron 			break;
7969edd16368SStephen M. Cameron 		else
7970edd16368SStephen M. Cameron 			dev_warn(&pdev->dev, "no-op failed%s\n",
7971edd16368SStephen M. Cameron 					(i < 11 ? "; re-trying" : ""));
7972edd16368SStephen M. Cameron 	}
7973132aa220STomas Henzl 
7974132aa220STomas Henzl out_disable:
7975132aa220STomas Henzl 
7976132aa220STomas Henzl 	pci_disable_device(pdev);
7977132aa220STomas Henzl 	return rc;
7978edd16368SStephen M. Cameron }
7979edd16368SStephen M. Cameron 
79801fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h)
79811fb7c98aSRobert Elliott {
79821fb7c98aSRobert Elliott 	kfree(h->cmd_pool_bits);
7983105a3dbcSRobert Elliott 	h->cmd_pool_bits = NULL;
7984105a3dbcSRobert Elliott 	if (h->cmd_pool) {
79858bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
79861fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct CommandList),
79871fb7c98aSRobert Elliott 				h->cmd_pool,
79881fb7c98aSRobert Elliott 				h->cmd_pool_dhandle);
7989105a3dbcSRobert Elliott 		h->cmd_pool = NULL;
7990105a3dbcSRobert Elliott 		h->cmd_pool_dhandle = 0;
7991105a3dbcSRobert Elliott 	}
7992105a3dbcSRobert Elliott 	if (h->errinfo_pool) {
79938bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
79941fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct ErrorInfo),
79951fb7c98aSRobert Elliott 				h->errinfo_pool,
79961fb7c98aSRobert Elliott 				h->errinfo_pool_dhandle);
7997105a3dbcSRobert Elliott 		h->errinfo_pool = NULL;
7998105a3dbcSRobert Elliott 		h->errinfo_pool_dhandle = 0;
7999105a3dbcSRobert Elliott 	}
80001fb7c98aSRobert Elliott }
80011fb7c98aSRobert Elliott 
8002d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
80032e9d1b36SStephen M. Cameron {
80046396bb22SKees Cook 	h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
80056396bb22SKees Cook 				   sizeof(unsigned long),
80066396bb22SKees Cook 				   GFP_KERNEL);
80078bc8f47eSChristoph Hellwig 	h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
80082e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->cmd_pool),
80098bc8f47eSChristoph Hellwig 		    &h->cmd_pool_dhandle, GFP_KERNEL);
80108bc8f47eSChristoph Hellwig 	h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
80112e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->errinfo_pool),
80128bc8f47eSChristoph Hellwig 		    &h->errinfo_pool_dhandle, GFP_KERNEL);
80132e9d1b36SStephen M. Cameron 	if ((h->cmd_pool_bits == NULL)
80142e9d1b36SStephen M. Cameron 	    || (h->cmd_pool == NULL)
80152e9d1b36SStephen M. Cameron 	    || (h->errinfo_pool == NULL)) {
80162e9d1b36SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
80172c143342SRobert Elliott 		goto clean_up;
80182e9d1b36SStephen M. Cameron 	}
8019360c73bdSStephen Cameron 	hpsa_preinitialize_commands(h);
80202e9d1b36SStephen M. Cameron 	return 0;
80212c143342SRobert Elliott clean_up:
80222c143342SRobert Elliott 	hpsa_free_cmd_pool(h);
80232c143342SRobert Elliott 	return -ENOMEM;
80242e9d1b36SStephen M. Cameron }
80252e9d1b36SStephen M. Cameron 
8026ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8027ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h)
8028ec501a18SRobert Elliott {
8029ec501a18SRobert Elliott 	int i;
8030a68fdb3aSDon Brace 	int irq_vector = 0;
8031a68fdb3aSDon Brace 
8032a68fdb3aSDon Brace 	if (hpsa_simple_mode)
8033a68fdb3aSDon Brace 		irq_vector = h->intr_mode;
8034ec501a18SRobert Elliott 
8035bc2bb154SChristoph Hellwig 	if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8036ec501a18SRobert Elliott 		/* Single reply queue, only one irq to free */
8037a68fdb3aSDon Brace 		free_irq(pci_irq_vector(h->pdev, irq_vector),
8038a68fdb3aSDon Brace 				&h->q[h->intr_mode]);
8039bc2bb154SChristoph Hellwig 		h->q[h->intr_mode] = 0;
8040ec501a18SRobert Elliott 		return;
8041ec501a18SRobert Elliott 	}
8042ec501a18SRobert Elliott 
8043bc2bb154SChristoph Hellwig 	for (i = 0; i < h->msix_vectors; i++) {
8044bc2bb154SChristoph Hellwig 		free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8045105a3dbcSRobert Elliott 		h->q[i] = 0;
8046ec501a18SRobert Elliott 	}
8047a4e17fc1SRobert Elliott 	for (; i < MAX_REPLY_QUEUES; i++)
8048a4e17fc1SRobert Elliott 		h->q[i] = 0;
8049ec501a18SRobert Elliott }
8050ec501a18SRobert Elliott 
80519ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */
80529ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h,
80530ae01a32SStephen M. Cameron 	irqreturn_t (*msixhandler)(int, void *),
80540ae01a32SStephen M. Cameron 	irqreturn_t (*intxhandler)(int, void *))
80550ae01a32SStephen M. Cameron {
8056254f796bSMatt Gates 	int rc, i;
8057a68fdb3aSDon Brace 	int irq_vector = 0;
8058a68fdb3aSDon Brace 
8059a68fdb3aSDon Brace 	if (hpsa_simple_mode)
8060a68fdb3aSDon Brace 		irq_vector = h->intr_mode;
80610ae01a32SStephen M. Cameron 
8062254f796bSMatt Gates 	/*
8063254f796bSMatt Gates 	 * initialize h->q[x] = x so that interrupt handlers know which
8064254f796bSMatt Gates 	 * queue to process.
8065254f796bSMatt Gates 	 */
8066254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8067254f796bSMatt Gates 		h->q[i] = (u8) i;
8068254f796bSMatt Gates 
8069bc2bb154SChristoph Hellwig 	if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8070254f796bSMatt Gates 		/* If performant mode and MSI-X, use multiple reply queues */
8071bc2bb154SChristoph Hellwig 		for (i = 0; i < h->msix_vectors; i++) {
80728b47004aSRobert Elliott 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8073bc2bb154SChristoph Hellwig 			rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
80748b47004aSRobert Elliott 					0, h->intrname[i],
8075254f796bSMatt Gates 					&h->q[i]);
8076a4e17fc1SRobert Elliott 			if (rc) {
8077a4e17fc1SRobert Elliott 				int j;
8078a4e17fc1SRobert Elliott 
8079a4e17fc1SRobert Elliott 				dev_err(&h->pdev->dev,
8080a4e17fc1SRobert Elliott 					"failed to get irq %d for %s\n",
8081bc2bb154SChristoph Hellwig 				       pci_irq_vector(h->pdev, i), h->devname);
8082a4e17fc1SRobert Elliott 				for (j = 0; j < i; j++) {
8083bc2bb154SChristoph Hellwig 					free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8084a4e17fc1SRobert Elliott 					h->q[j] = 0;
8085a4e17fc1SRobert Elliott 				}
8086a4e17fc1SRobert Elliott 				for (; j < MAX_REPLY_QUEUES; j++)
8087a4e17fc1SRobert Elliott 					h->q[j] = 0;
8088a4e17fc1SRobert Elliott 				return rc;
8089a4e17fc1SRobert Elliott 			}
8090a4e17fc1SRobert Elliott 		}
8091254f796bSMatt Gates 	} else {
8092254f796bSMatt Gates 		/* Use single reply pool */
8093bc2bb154SChristoph Hellwig 		if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8094bc2bb154SChristoph Hellwig 			sprintf(h->intrname[0], "%s-msi%s", h->devname,
8095bc2bb154SChristoph Hellwig 				h->msix_vectors ? "x" : "");
8096a68fdb3aSDon Brace 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
80978b47004aSRobert Elliott 				msixhandler, 0,
8098bc2bb154SChristoph Hellwig 				h->intrname[0],
8099254f796bSMatt Gates 				&h->q[h->intr_mode]);
8100254f796bSMatt Gates 		} else {
81018b47004aSRobert Elliott 			sprintf(h->intrname[h->intr_mode],
81028b47004aSRobert Elliott 				"%s-intx", h->devname);
8103a68fdb3aSDon Brace 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
81048b47004aSRobert Elliott 				intxhandler, IRQF_SHARED,
8105bc2bb154SChristoph Hellwig 				h->intrname[0],
8106254f796bSMatt Gates 				&h->q[h->intr_mode]);
8107254f796bSMatt Gates 		}
8108254f796bSMatt Gates 	}
81090ae01a32SStephen M. Cameron 	if (rc) {
8110195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8111a68fdb3aSDon Brace 		       pci_irq_vector(h->pdev, irq_vector), h->devname);
8112195f2c65SRobert Elliott 		hpsa_free_irqs(h);
81130ae01a32SStephen M. Cameron 		return -ENODEV;
81140ae01a32SStephen M. Cameron 	}
81150ae01a32SStephen M. Cameron 	return 0;
81160ae01a32SStephen M. Cameron }
81170ae01a32SStephen M. Cameron 
81186f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h)
811964670ac8SStephen M. Cameron {
812039c53f55SRobert Elliott 	int rc;
8121c5dfd106SDon Brace 	hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
812264670ac8SStephen M. Cameron 
812364670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
812439c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
812539c53f55SRobert Elliott 	if (rc) {
812664670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
812739c53f55SRobert Elliott 		return rc;
812864670ac8SStephen M. Cameron 	}
812964670ac8SStephen M. Cameron 
813064670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
813139c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
813239c53f55SRobert Elliott 	if (rc) {
813364670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Board failed to become ready "
813464670ac8SStephen M. Cameron 			"after soft reset.\n");
813539c53f55SRobert Elliott 		return rc;
813664670ac8SStephen M. Cameron 	}
813764670ac8SStephen M. Cameron 
813864670ac8SStephen M. Cameron 	return 0;
813964670ac8SStephen M. Cameron }
814064670ac8SStephen M. Cameron 
8141072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h)
8142072b0518SStephen M. Cameron {
8143072b0518SStephen M. Cameron 	int i;
8144072b0518SStephen M. Cameron 
8145072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++) {
8146072b0518SStephen M. Cameron 		if (!h->reply_queue[i].head)
8147072b0518SStephen M. Cameron 			continue;
81488bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
81491fb7c98aSRobert Elliott 					h->reply_queue_size,
81501fb7c98aSRobert Elliott 					h->reply_queue[i].head,
81511fb7c98aSRobert Elliott 					h->reply_queue[i].busaddr);
8152072b0518SStephen M. Cameron 		h->reply_queue[i].head = NULL;
8153072b0518SStephen M. Cameron 		h->reply_queue[i].busaddr = 0;
8154072b0518SStephen M. Cameron 	}
8155105a3dbcSRobert Elliott 	h->reply_queue_size = 0;
8156072b0518SStephen M. Cameron }
8157072b0518SStephen M. Cameron 
81580097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
81590097f0f4SStephen M. Cameron {
8160105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);		/* init_one 7 */
8161105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8162105a3dbcSRobert Elliott 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8163105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
81642946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);		/* init_one 3 */
81652946e82bSRobert Elliott 	h->scsi_host = NULL;			/* init_one 3 */
81662946e82bSRobert Elliott 	hpsa_free_pci_init(h);			/* init_one 2_5 */
81679ecd953aSRobert Elliott 	free_percpu(h->lockup_detected);	/* init_one 2 */
81689ecd953aSRobert Elliott 	h->lockup_detected = NULL;		/* init_one 2 */
81699ecd953aSRobert Elliott 	if (h->resubmit_wq) {
81709ecd953aSRobert Elliott 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
81719ecd953aSRobert Elliott 		h->resubmit_wq = NULL;
81729ecd953aSRobert Elliott 	}
81739ecd953aSRobert Elliott 	if (h->rescan_ctlr_wq) {
81749ecd953aSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
81759ecd953aSRobert Elliott 		h->rescan_ctlr_wq = NULL;
81769ecd953aSRobert Elliott 	}
817701192088SDon Brace 	if (h->monitor_ctlr_wq) {
817801192088SDon Brace 		destroy_workqueue(h->monitor_ctlr_wq);
817901192088SDon Brace 		h->monitor_ctlr_wq = NULL;
818001192088SDon Brace 	}
818101192088SDon Brace 
8182105a3dbcSRobert Elliott 	kfree(h);				/* init_one 1 */
818364670ac8SStephen M. Cameron }
818464670ac8SStephen M. Cameron 
8185a0c12413SStephen M. Cameron /* Called when controller lockup detected. */
8186f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h)
8187a0c12413SStephen M. Cameron {
8188281a7fd0SWebb Scales 	int i, refcount;
8189281a7fd0SWebb Scales 	struct CommandList *c;
819025163bd5SWebb Scales 	int failcount = 0;
8191a0c12413SStephen M. Cameron 
8192080ef1ccSDon Brace 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8193f2405db8SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
8194f2405db8SDon Brace 		c = h->cmd_pool + i;
8195281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
8196281a7fd0SWebb Scales 		if (refcount > 1) {
819725163bd5SWebb Scales 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
81985a3d16f5SStephen M. Cameron 			finish_cmd(c);
8199433b5f4dSStephen Cameron 			atomic_dec(&h->commands_outstanding);
820025163bd5SWebb Scales 			failcount++;
8201a0c12413SStephen M. Cameron 		}
8202281a7fd0SWebb Scales 		cmd_free(h, c);
8203281a7fd0SWebb Scales 	}
820425163bd5SWebb Scales 	dev_warn(&h->pdev->dev,
820525163bd5SWebb Scales 		"failed %d commands in fail_all\n", failcount);
8206a0c12413SStephen M. Cameron }
8207a0c12413SStephen M. Cameron 
8208094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8209094963daSStephen M. Cameron {
8210c8ed0010SRusty Russell 	int cpu;
8211094963daSStephen M. Cameron 
8212c8ed0010SRusty Russell 	for_each_online_cpu(cpu) {
8213094963daSStephen M. Cameron 		u32 *lockup_detected;
8214094963daSStephen M. Cameron 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8215094963daSStephen M. Cameron 		*lockup_detected = value;
8216094963daSStephen M. Cameron 	}
8217094963daSStephen M. Cameron 	wmb(); /* be sure the per-cpu variables are out to memory */
8218094963daSStephen M. Cameron }
8219094963daSStephen M. Cameron 
8220a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h)
8221a0c12413SStephen M. Cameron {
8222a0c12413SStephen M. Cameron 	unsigned long flags;
8223094963daSStephen M. Cameron 	u32 lockup_detected;
8224a0c12413SStephen M. Cameron 
8225a0c12413SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8226a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8227094963daSStephen M. Cameron 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8228094963daSStephen M. Cameron 	if (!lockup_detected) {
8229094963daSStephen M. Cameron 		/* no heartbeat, but controller gave us a zero. */
8230094963daSStephen M. Cameron 		dev_warn(&h->pdev->dev,
823125163bd5SWebb Scales 			"lockup detected after %d but scratchpad register is zero\n",
823225163bd5SWebb Scales 			h->heartbeat_sample_interval / HZ);
8233094963daSStephen M. Cameron 		lockup_detected = 0xffffffff;
8234094963daSStephen M. Cameron 	}
8235094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8236a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
823725163bd5SWebb Scales 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
823825163bd5SWebb Scales 			lockup_detected, h->heartbeat_sample_interval / HZ);
8239b9b08cadSDon Brace 	if (lockup_detected == 0xffff0000) {
8240b9b08cadSDon Brace 		dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8241b9b08cadSDon Brace 		writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8242b9b08cadSDon Brace 	}
8243a0c12413SStephen M. Cameron 	pci_disable_device(h->pdev);
8244f2405db8SDon Brace 	fail_all_outstanding_cmds(h);
8245a0c12413SStephen M. Cameron }
8246a0c12413SStephen M. Cameron 
824725163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h)
8248a0c12413SStephen M. Cameron {
8249a0c12413SStephen M. Cameron 	u64 now;
8250a0c12413SStephen M. Cameron 	u32 heartbeat;
8251a0c12413SStephen M. Cameron 	unsigned long flags;
8252a0c12413SStephen M. Cameron 
8253a0c12413SStephen M. Cameron 	now = get_jiffies_64();
8254a0c12413SStephen M. Cameron 	/* If we've received an interrupt recently, we're ok. */
8255a0c12413SStephen M. Cameron 	if (time_after64(h->last_intr_timestamp +
8256e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
825725163bd5SWebb Scales 		return false;
8258a0c12413SStephen M. Cameron 
8259a0c12413SStephen M. Cameron 	/*
8260a0c12413SStephen M. Cameron 	 * If we've already checked the heartbeat recently, we're ok.
8261a0c12413SStephen M. Cameron 	 * This could happen if someone sends us a signal. We
8262a0c12413SStephen M. Cameron 	 * otherwise don't care about signals in this thread.
8263a0c12413SStephen M. Cameron 	 */
8264a0c12413SStephen M. Cameron 	if (time_after64(h->last_heartbeat_timestamp +
8265e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
826625163bd5SWebb Scales 		return false;
8267a0c12413SStephen M. Cameron 
8268a0c12413SStephen M. Cameron 	/* If heartbeat has not changed since we last looked, we're not ok. */
8269a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8270a0c12413SStephen M. Cameron 	heartbeat = readl(&h->cfgtable->HeartBeat);
8271a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8272a0c12413SStephen M. Cameron 	if (h->last_heartbeat == heartbeat) {
8273a0c12413SStephen M. Cameron 		controller_lockup_detected(h);
827425163bd5SWebb Scales 		return true;
8275a0c12413SStephen M. Cameron 	}
8276a0c12413SStephen M. Cameron 
8277a0c12413SStephen M. Cameron 	/* We're ok. */
8278a0c12413SStephen M. Cameron 	h->last_heartbeat = heartbeat;
8279a0c12413SStephen M. Cameron 	h->last_heartbeat_timestamp = now;
828025163bd5SWebb Scales 	return false;
8281a0c12413SStephen M. Cameron }
8282a0c12413SStephen M. Cameron 
8283b2582a65SDon Brace /*
8284b2582a65SDon Brace  * Set ioaccel status for all ioaccel volumes.
8285b2582a65SDon Brace  *
8286b2582a65SDon Brace  * Called from monitor controller worker (hpsa_event_monitor_worker)
8287b2582a65SDon Brace  *
8288b2582a65SDon Brace  * A Volume (or Volumes that comprise an Array set may be undergoing a
8289b2582a65SDon Brace  * transformation, so we will be turning off ioaccel for all volumes that
8290b2582a65SDon Brace  * make up the Array.
8291b2582a65SDon Brace  */
8292b2582a65SDon Brace static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8293b2582a65SDon Brace {
8294b2582a65SDon Brace 	int rc;
8295b2582a65SDon Brace 	int i;
8296b2582a65SDon Brace 	u8 ioaccel_status;
8297b2582a65SDon Brace 	unsigned char *buf;
8298b2582a65SDon Brace 	struct hpsa_scsi_dev_t *device;
8299b2582a65SDon Brace 
8300b2582a65SDon Brace 	if (!h)
8301b2582a65SDon Brace 		return;
8302b2582a65SDon Brace 
8303b2582a65SDon Brace 	buf = kmalloc(64, GFP_KERNEL);
8304b2582a65SDon Brace 	if (!buf)
8305b2582a65SDon Brace 		return;
8306b2582a65SDon Brace 
8307b2582a65SDon Brace 	/*
8308b2582a65SDon Brace 	 * Run through current device list used during I/O requests.
8309b2582a65SDon Brace 	 */
8310b2582a65SDon Brace 	for (i = 0; i < h->ndevices; i++) {
8311b2582a65SDon Brace 		device = h->dev[i];
8312b2582a65SDon Brace 
8313b2582a65SDon Brace 		if (!device)
8314b2582a65SDon Brace 			continue;
8315b2582a65SDon Brace 		if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8316b2582a65SDon Brace 						HPSA_VPD_LV_IOACCEL_STATUS))
8317b2582a65SDon Brace 			continue;
8318b2582a65SDon Brace 
8319b2582a65SDon Brace 		memset(buf, 0, 64);
8320b2582a65SDon Brace 
8321b2582a65SDon Brace 		rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8322b2582a65SDon Brace 					VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8323b2582a65SDon Brace 					buf, 64);
8324b2582a65SDon Brace 		if (rc != 0)
8325b2582a65SDon Brace 			continue;
8326b2582a65SDon Brace 
8327b2582a65SDon Brace 		ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8328b2582a65SDon Brace 		device->offload_config =
8329b2582a65SDon Brace 				!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8330b2582a65SDon Brace 		if (device->offload_config)
8331b2582a65SDon Brace 			device->offload_to_be_enabled =
8332b2582a65SDon Brace 				!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8333b2582a65SDon Brace 
8334b2582a65SDon Brace 		/*
8335b2582a65SDon Brace 		 * Immediately turn off ioaccel for any volume the
8336b2582a65SDon Brace 		 * controller tells us to. Some of the reasons could be:
8337b2582a65SDon Brace 		 *    transformation - change to the LVs of an Array.
8338b2582a65SDon Brace 		 *    degraded volume - component failure
8339b2582a65SDon Brace 		 *
8340b2582a65SDon Brace 		 * If ioaccel is to be re-enabled, re-enable later during the
8341b2582a65SDon Brace 		 * scan operation so the driver can get a fresh raidmap
8342b2582a65SDon Brace 		 * before turning ioaccel back on.
8343b2582a65SDon Brace 		 *
8344b2582a65SDon Brace 		 */
8345b2582a65SDon Brace 		if (!device->offload_to_be_enabled)
8346b2582a65SDon Brace 			device->offload_enabled = 0;
8347b2582a65SDon Brace 	}
8348b2582a65SDon Brace 
8349b2582a65SDon Brace 	kfree(buf);
8350b2582a65SDon Brace }
8351b2582a65SDon Brace 
83529846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h)
835376438d08SStephen M. Cameron {
835476438d08SStephen M. Cameron 	char *event_type;
835576438d08SStephen M. Cameron 
8356e4aa3e6aSStephen Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8357e4aa3e6aSStephen Cameron 		return;
8358e4aa3e6aSStephen Cameron 
835976438d08SStephen M. Cameron 	/* Ask the controller to clear the events we're handling. */
83601f7cee8cSStephen M. Cameron 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
83611f7cee8cSStephen M. Cameron 			| CFGTBL_Trans_io_accel2)) &&
836276438d08SStephen M. Cameron 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
836376438d08SStephen M. Cameron 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
836476438d08SStephen M. Cameron 
836576438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
836676438d08SStephen M. Cameron 			event_type = "state change";
836776438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
836876438d08SStephen M. Cameron 			event_type = "configuration change";
836976438d08SStephen M. Cameron 		/* Stop sending new RAID offload reqs via the IO accelerator */
837076438d08SStephen M. Cameron 		scsi_block_requests(h->scsi_host);
8371b2582a65SDon Brace 		hpsa_set_ioaccel_status(h);
837223100dd9SStephen M. Cameron 		hpsa_drain_accel_commands(h);
837376438d08SStephen M. Cameron 		/* Set 'accelerator path config change' bit */
837476438d08SStephen M. Cameron 		dev_warn(&h->pdev->dev,
837576438d08SStephen M. Cameron 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
837676438d08SStephen M. Cameron 			h->events, event_type);
837776438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
837876438d08SStephen M. Cameron 		/* Set the "clear event notify field update" bit 6 */
837976438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
838076438d08SStephen M. Cameron 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
838176438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
838276438d08SStephen M. Cameron 		scsi_unblock_requests(h->scsi_host);
838376438d08SStephen M. Cameron 	} else {
838476438d08SStephen M. Cameron 		/* Acknowledge controller notification events. */
838576438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
838676438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
838776438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
838876438d08SStephen M. Cameron 	}
83899846590eSStephen M. Cameron 	return;
839076438d08SStephen M. Cameron }
839176438d08SStephen M. Cameron 
839276438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration
839376438d08SStephen M. Cameron  * changes (added/changed/removed logical drives, etc.) which mean that
8394e863d68eSScott Teel  * we should rescan the controller for devices.
8395e863d68eSScott Teel  * Also check flag for driver-initiated rescan.
839676438d08SStephen M. Cameron  */
83979846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
839876438d08SStephen M. Cameron {
8399853633e8SDon Brace 	if (h->drv_req_rescan) {
8400853633e8SDon Brace 		h->drv_req_rescan = 0;
8401853633e8SDon Brace 		return 1;
8402853633e8SDon Brace 	}
8403853633e8SDon Brace 
840476438d08SStephen M. Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
84059846590eSStephen M. Cameron 		return 0;
840676438d08SStephen M. Cameron 
840776438d08SStephen M. Cameron 	h->events = readl(&(h->cfgtable->event_notify));
84089846590eSStephen M. Cameron 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
84099846590eSStephen M. Cameron }
841076438d08SStephen M. Cameron 
841176438d08SStephen M. Cameron /*
84129846590eSStephen M. Cameron  * Check if any of the offline devices have become ready
841376438d08SStephen M. Cameron  */
84149846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h)
84159846590eSStephen M. Cameron {
84169846590eSStephen M. Cameron 	unsigned long flags;
84179846590eSStephen M. Cameron 	struct offline_device_entry *d;
84189846590eSStephen M. Cameron 	struct list_head *this, *tmp;
84199846590eSStephen M. Cameron 
84209846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
84219846590eSStephen M. Cameron 	list_for_each_safe(this, tmp, &h->offline_device_list) {
84229846590eSStephen M. Cameron 		d = list_entry(this, struct offline_device_entry,
84239846590eSStephen M. Cameron 				offline_list);
84249846590eSStephen M. Cameron 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8425d1fea47cSStephen M. Cameron 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8426d1fea47cSStephen M. Cameron 			spin_lock_irqsave(&h->offline_device_lock, flags);
8427d1fea47cSStephen M. Cameron 			list_del(&d->offline_list);
8428d1fea47cSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
84299846590eSStephen M. Cameron 			return 1;
8430d1fea47cSStephen M. Cameron 		}
84319846590eSStephen M. Cameron 		spin_lock_irqsave(&h->offline_device_lock, flags);
843276438d08SStephen M. Cameron 	}
84339846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
84349846590eSStephen M. Cameron 	return 0;
84359846590eSStephen M. Cameron }
84369846590eSStephen M. Cameron 
843734592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h)
843834592254SScott Teel {
843934592254SScott Teel 	int rc = 1; /* assume there are changes */
844034592254SScott Teel 	struct ReportLUNdata *logdev = NULL;
844134592254SScott Teel 
844234592254SScott Teel 	/* if we can't find out if lun data has changed,
844334592254SScott Teel 	 * assume that it has.
844434592254SScott Teel 	 */
844534592254SScott Teel 
844634592254SScott Teel 	if (!h->lastlogicals)
84477e8a9486SAmit Kushwaha 		return rc;
844834592254SScott Teel 
844934592254SScott Teel 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
84507e8a9486SAmit Kushwaha 	if (!logdev)
84517e8a9486SAmit Kushwaha 		return rc;
84527e8a9486SAmit Kushwaha 
845334592254SScott Teel 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
845434592254SScott Teel 		dev_warn(&h->pdev->dev,
845534592254SScott Teel 			"report luns failed, can't track lun changes.\n");
845634592254SScott Teel 		goto out;
845734592254SScott Teel 	}
845834592254SScott Teel 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
845934592254SScott Teel 		dev_info(&h->pdev->dev,
846034592254SScott Teel 			"Lun changes detected.\n");
846134592254SScott Teel 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
846234592254SScott Teel 		goto out;
846334592254SScott Teel 	} else
846434592254SScott Teel 		rc = 0; /* no changes detected. */
846534592254SScott Teel out:
846634592254SScott Teel 	kfree(logdev);
846734592254SScott Teel 	return rc;
846834592254SScott Teel }
846934592254SScott Teel 
84703d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h)
8471a0c12413SStephen M. Cameron {
84723d38f00cSScott Teel 	struct Scsi_Host *sh = NULL;
8473a0c12413SStephen M. Cameron 	unsigned long flags;
84749846590eSStephen M. Cameron 
8475bfd7546cSDon Brace 	/*
8476bfd7546cSDon Brace 	 * Do the scan after the reset
8477bfd7546cSDon Brace 	 */
8478c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
8479bfd7546cSDon Brace 	if (h->reset_in_progress) {
8480bfd7546cSDon Brace 		h->drv_req_rescan = 1;
8481c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
8482bfd7546cSDon Brace 		return;
8483bfd7546cSDon Brace 	}
8484c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
8485bfd7546cSDon Brace 
848634592254SScott Teel 	sh = scsi_host_get(h->scsi_host);
848734592254SScott Teel 	if (sh != NULL) {
848834592254SScott Teel 		hpsa_scan_start(sh);
848934592254SScott Teel 		scsi_host_put(sh);
84903d38f00cSScott Teel 		h->drv_req_rescan = 0;
849134592254SScott Teel 	}
849234592254SScott Teel }
84933d38f00cSScott Teel 
84943d38f00cSScott Teel /*
84953d38f00cSScott Teel  * watch for controller events
84963d38f00cSScott Teel  */
84973d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work)
84983d38f00cSScott Teel {
84993d38f00cSScott Teel 	struct ctlr_info *h = container_of(to_delayed_work(work),
85003d38f00cSScott Teel 					struct ctlr_info, event_monitor_work);
85013d38f00cSScott Teel 	unsigned long flags;
85023d38f00cSScott Teel 
85033d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85043d38f00cSScott Teel 	if (h->remove_in_progress) {
85053d38f00cSScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
85063d38f00cSScott Teel 		return;
85073d38f00cSScott Teel 	}
85083d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85093d38f00cSScott Teel 
85103d38f00cSScott Teel 	if (hpsa_ctlr_needs_rescan(h)) {
85113d38f00cSScott Teel 		hpsa_ack_ctlr_events(h);
85123d38f00cSScott Teel 		hpsa_perform_rescan(h);
85133d38f00cSScott Teel 	}
85143d38f00cSScott Teel 
85153d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85163d38f00cSScott Teel 	if (!h->remove_in_progress)
851701192088SDon Brace 		queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
85183d38f00cSScott Teel 				HPSA_EVENT_MONITOR_INTERVAL);
85193d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85203d38f00cSScott Teel }
85213d38f00cSScott Teel 
85223d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work)
85233d38f00cSScott Teel {
85243d38f00cSScott Teel 	unsigned long flags;
85253d38f00cSScott Teel 	struct ctlr_info *h = container_of(to_delayed_work(work),
85263d38f00cSScott Teel 					struct ctlr_info, rescan_ctlr_work);
85273d38f00cSScott Teel 
85283d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85293d38f00cSScott Teel 	if (h->remove_in_progress) {
85303d38f00cSScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
85313d38f00cSScott Teel 		return;
85323d38f00cSScott Teel 	}
85333d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85343d38f00cSScott Teel 
85353d38f00cSScott Teel 	if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
85363d38f00cSScott Teel 		hpsa_perform_rescan(h);
85373d38f00cSScott Teel 	} else if (h->discovery_polling) {
85383d38f00cSScott Teel 		if (hpsa_luns_changed(h)) {
85393d38f00cSScott Teel 			dev_info(&h->pdev->dev,
85403d38f00cSScott Teel 				"driver discovery polling rescan.\n");
85413d38f00cSScott Teel 			hpsa_perform_rescan(h);
85423d38f00cSScott Teel 		}
85439846590eSStephen M. Cameron 	}
85446636e7f4SDon Brace 	spin_lock_irqsave(&h->lock, flags);
85456636e7f4SDon Brace 	if (!h->remove_in_progress)
85466636e7f4SDon Brace 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
85476636e7f4SDon Brace 				h->heartbeat_sample_interval);
85486636e7f4SDon Brace 	spin_unlock_irqrestore(&h->lock, flags);
85496636e7f4SDon Brace }
85506636e7f4SDon Brace 
85516636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work)
85526636e7f4SDon Brace {
85536636e7f4SDon Brace 	unsigned long flags;
85546636e7f4SDon Brace 	struct ctlr_info *h = container_of(to_delayed_work(work),
85556636e7f4SDon Brace 					struct ctlr_info, monitor_ctlr_work);
85566636e7f4SDon Brace 
85576636e7f4SDon Brace 	detect_controller_lockup(h);
85586636e7f4SDon Brace 	if (lockup_detected(h))
85596636e7f4SDon Brace 		return;
85609846590eSStephen M. Cameron 
85618a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
85626636e7f4SDon Brace 	if (!h->remove_in_progress)
856301192088SDon Brace 		queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
85648a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
85658a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8566a0c12413SStephen M. Cameron }
8567a0c12413SStephen M. Cameron 
85686636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
85696636e7f4SDon Brace 						char *name)
85706636e7f4SDon Brace {
85716636e7f4SDon Brace 	struct workqueue_struct *wq = NULL;
85726636e7f4SDon Brace 
8573397ea9cbSDon Brace 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
85746636e7f4SDon Brace 	if (!wq)
85756636e7f4SDon Brace 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
85766636e7f4SDon Brace 
85776636e7f4SDon Brace 	return wq;
85786636e7f4SDon Brace }
85796636e7f4SDon Brace 
85808b834bffSMing Lei static void hpda_free_ctlr_info(struct ctlr_info *h)
85818b834bffSMing Lei {
85828b834bffSMing Lei 	kfree(h->reply_map);
85838b834bffSMing Lei 	kfree(h);
85848b834bffSMing Lei }
85858b834bffSMing Lei 
85868b834bffSMing Lei static struct ctlr_info *hpda_alloc_ctlr_info(void)
85878b834bffSMing Lei {
85888b834bffSMing Lei 	struct ctlr_info *h;
85898b834bffSMing Lei 
85908b834bffSMing Lei 	h = kzalloc(sizeof(*h), GFP_KERNEL);
85918b834bffSMing Lei 	if (!h)
85928b834bffSMing Lei 		return NULL;
85938b834bffSMing Lei 
85946396bb22SKees Cook 	h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
85958b834bffSMing Lei 	if (!h->reply_map) {
85968b834bffSMing Lei 		kfree(h);
85978b834bffSMing Lei 		return NULL;
85988b834bffSMing Lei 	}
85998b834bffSMing Lei 	return h;
86008b834bffSMing Lei }
86018b834bffSMing Lei 
86026f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
86034c2a8c40SStephen M. Cameron {
86044c2a8c40SStephen M. Cameron 	int dac, rc;
86054c2a8c40SStephen M. Cameron 	struct ctlr_info *h;
860664670ac8SStephen M. Cameron 	int try_soft_reset = 0;
860764670ac8SStephen M. Cameron 	unsigned long flags;
86086b6c1cd7STomas Henzl 	u32 board_id;
86094c2a8c40SStephen M. Cameron 
86104c2a8c40SStephen M. Cameron 	if (number_of_controllers == 0)
86114c2a8c40SStephen M. Cameron 		printk(KERN_INFO DRIVER_NAME "\n");
86124c2a8c40SStephen M. Cameron 
8613135ae6edSHannes Reinecke 	rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
86146b6c1cd7STomas Henzl 	if (rc < 0) {
86156b6c1cd7STomas Henzl 		dev_warn(&pdev->dev, "Board ID not found\n");
86166b6c1cd7STomas Henzl 		return rc;
86176b6c1cd7STomas Henzl 	}
86186b6c1cd7STomas Henzl 
86196b6c1cd7STomas Henzl 	rc = hpsa_init_reset_devices(pdev, board_id);
862064670ac8SStephen M. Cameron 	if (rc) {
862164670ac8SStephen M. Cameron 		if (rc != -ENOTSUPP)
86224c2a8c40SStephen M. Cameron 			return rc;
862364670ac8SStephen M. Cameron 		/* If the reset fails in a particular way (it has no way to do
862464670ac8SStephen M. Cameron 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
862564670ac8SStephen M. Cameron 		 * a soft reset once we get the controller configured up to the
862664670ac8SStephen M. Cameron 		 * point that it can accept a command.
862764670ac8SStephen M. Cameron 		 */
862864670ac8SStephen M. Cameron 		try_soft_reset = 1;
862964670ac8SStephen M. Cameron 		rc = 0;
863064670ac8SStephen M. Cameron 	}
863164670ac8SStephen M. Cameron 
863264670ac8SStephen M. Cameron reinit_after_soft_reset:
86334c2a8c40SStephen M. Cameron 
8634303932fdSDon Brace 	/* Command structures must be aligned on a 32-byte boundary because
8635303932fdSDon Brace 	 * the 5 lower bits of the address are used by the hardware. and by
8636303932fdSDon Brace 	 * the driver.  See comments in hpsa.h for more info.
8637303932fdSDon Brace 	 */
8638303932fdSDon Brace 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
86398b834bffSMing Lei 	h = hpda_alloc_ctlr_info();
8640105a3dbcSRobert Elliott 	if (!h) {
8641105a3dbcSRobert Elliott 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8642ecd9aad4SStephen M. Cameron 		return -ENOMEM;
8643105a3dbcSRobert Elliott 	}
8644edd16368SStephen M. Cameron 
864555c06c71SStephen M. Cameron 	h->pdev = pdev;
8646105a3dbcSRobert Elliott 
8647a9a3a273SStephen M. Cameron 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
86489846590eSStephen M. Cameron 	INIT_LIST_HEAD(&h->offline_device_list);
86496eaf46fdSStephen M. Cameron 	spin_lock_init(&h->lock);
86509846590eSStephen M. Cameron 	spin_lock_init(&h->offline_device_lock);
86516eaf46fdSStephen M. Cameron 	spin_lock_init(&h->scan_lock);
8652c59d04f3SDon Brace 	spin_lock_init(&h->reset_lock);
865334f0c627SDon Brace 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8654094963daSStephen M. Cameron 
8655094963daSStephen M. Cameron 	/* Allocate and clear per-cpu variable lockup_detected */
8656094963daSStephen M. Cameron 	h->lockup_detected = alloc_percpu(u32);
86572a5ac326SStephen M. Cameron 	if (!h->lockup_detected) {
8658105a3dbcSRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
86592a5ac326SStephen M. Cameron 		rc = -ENOMEM;
86602efa5929SRobert Elliott 		goto clean1;	/* aer/h */
86612a5ac326SStephen M. Cameron 	}
8662094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, 0);
8663094963daSStephen M. Cameron 
866455c06c71SStephen M. Cameron 	rc = hpsa_pci_init(h);
8665105a3dbcSRobert Elliott 	if (rc)
86662946e82bSRobert Elliott 		goto clean2;	/* lu, aer/h */
8667edd16368SStephen M. Cameron 
86682946e82bSRobert Elliott 	/* relies on h-> settings made by hpsa_pci_init, including
86692946e82bSRobert Elliott 	 * interrupt_mode h->intr */
86702946e82bSRobert Elliott 	rc = hpsa_scsi_host_alloc(h);
86712946e82bSRobert Elliott 	if (rc)
86722946e82bSRobert Elliott 		goto clean2_5;	/* pci, lu, aer/h */
86732946e82bSRobert Elliott 
86742946e82bSRobert Elliott 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8675edd16368SStephen M. Cameron 	h->ctlr = number_of_controllers;
8676edd16368SStephen M. Cameron 	number_of_controllers++;
8677edd16368SStephen M. Cameron 
8678edd16368SStephen M. Cameron 	/* configure PCI DMA stuff */
86798bc8f47eSChristoph Hellwig 	rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8680ecd9aad4SStephen M. Cameron 	if (rc == 0) {
8681edd16368SStephen M. Cameron 		dac = 1;
8682ecd9aad4SStephen M. Cameron 	} else {
86838bc8f47eSChristoph Hellwig 		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8684ecd9aad4SStephen M. Cameron 		if (rc == 0) {
8685edd16368SStephen M. Cameron 			dac = 0;
8686ecd9aad4SStephen M. Cameron 		} else {
8687edd16368SStephen M. Cameron 			dev_err(&pdev->dev, "no suitable DMA available\n");
86882946e82bSRobert Elliott 			goto clean3;	/* shost, pci, lu, aer/h */
8689edd16368SStephen M. Cameron 		}
8690ecd9aad4SStephen M. Cameron 	}
8691edd16368SStephen M. Cameron 
8692edd16368SStephen M. Cameron 	/* make sure the board interrupts are off */
8693edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
869410f66018SStephen M. Cameron 
8695105a3dbcSRobert Elliott 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8696105a3dbcSRobert Elliott 	if (rc)
86972946e82bSRobert Elliott 		goto clean3;	/* shost, pci, lu, aer/h */
8698d37ffbe4SRobert Elliott 	rc = hpsa_alloc_cmd_pool(h);
86998947fd10SRobert Elliott 	if (rc)
87002946e82bSRobert Elliott 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8701105a3dbcSRobert Elliott 	rc = hpsa_alloc_sg_chain_blocks(h);
8702105a3dbcSRobert Elliott 	if (rc)
87032946e82bSRobert Elliott 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8704a08a8471SStephen M. Cameron 	init_waitqueue_head(&h->scan_wait_queue);
8705d604f533SWebb Scales 	init_waitqueue_head(&h->event_sync_wait_queue);
8706d604f533SWebb Scales 	mutex_init(&h->reset_mutex);
8707a08a8471SStephen M. Cameron 	h->scan_finished = 1; /* no scan currently in progress */
870887b9e6aaSDon Brace 	h->scan_waiting = 0;
8709edd16368SStephen M. Cameron 
8710edd16368SStephen M. Cameron 	pci_set_drvdata(pdev, h);
87119a41338eSStephen M. Cameron 	h->ndevices = 0;
87122946e82bSRobert Elliott 
87139a41338eSStephen M. Cameron 	spin_lock_init(&h->devlock);
8714105a3dbcSRobert Elliott 	rc = hpsa_put_ctlr_into_performant_mode(h);
8715105a3dbcSRobert Elliott 	if (rc)
87162946e82bSRobert Elliott 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
87172946e82bSRobert Elliott 
87182efa5929SRobert Elliott 	/* create the resubmit workqueue */
87192efa5929SRobert Elliott 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
87202efa5929SRobert Elliott 	if (!h->rescan_ctlr_wq) {
87212efa5929SRobert Elliott 		rc = -ENOMEM;
87222efa5929SRobert Elliott 		goto clean7;
87232efa5929SRobert Elliott 	}
87242efa5929SRobert Elliott 
87252efa5929SRobert Elliott 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
87262efa5929SRobert Elliott 	if (!h->resubmit_wq) {
87272efa5929SRobert Elliott 		rc = -ENOMEM;
87282efa5929SRobert Elliott 		goto clean7;	/* aer/h */
87292efa5929SRobert Elliott 	}
873064670ac8SStephen M. Cameron 
873101192088SDon Brace 	h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
873201192088SDon Brace 	if (!h->monitor_ctlr_wq) {
873301192088SDon Brace 		rc = -ENOMEM;
873401192088SDon Brace 		goto clean7;
873501192088SDon Brace 	}
873601192088SDon Brace 
8737105a3dbcSRobert Elliott 	/*
8738105a3dbcSRobert Elliott 	 * At this point, the controller is ready to take commands.
873964670ac8SStephen M. Cameron 	 * Now, if reset_devices and the hard reset didn't work, try
874064670ac8SStephen M. Cameron 	 * the soft reset and see if that works.
874164670ac8SStephen M. Cameron 	 */
874264670ac8SStephen M. Cameron 	if (try_soft_reset) {
874364670ac8SStephen M. Cameron 
874464670ac8SStephen M. Cameron 		/* This is kind of gross.  We may or may not get a completion
874564670ac8SStephen M. Cameron 		 * from the soft reset command, and if we do, then the value
874664670ac8SStephen M. Cameron 		 * from the fifo may or may not be valid.  So, we wait 10 secs
874764670ac8SStephen M. Cameron 		 * after the reset throwing away any completions we get during
874864670ac8SStephen M. Cameron 		 * that time.  Unregister the interrupt handler and register
874964670ac8SStephen M. Cameron 		 * fake ones to scoop up any residual completions.
875064670ac8SStephen M. Cameron 		 */
875164670ac8SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
875264670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
875364670ac8SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
8754ec501a18SRobert Elliott 		hpsa_free_irqs(h);
87559ee61794SRobert Elliott 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
875664670ac8SStephen M. Cameron 					hpsa_intx_discard_completions);
875764670ac8SStephen M. Cameron 		if (rc) {
87589ee61794SRobert Elliott 			dev_warn(&h->pdev->dev,
87599ee61794SRobert Elliott 				"Failed to request_irq after soft reset.\n");
8760d498757cSRobert Elliott 			/*
8761b2ef480cSRobert Elliott 			 * cannot goto clean7 or free_irqs will be called
8762b2ef480cSRobert Elliott 			 * again. Instead, do its work
8763b2ef480cSRobert Elliott 			 */
8764b2ef480cSRobert Elliott 			hpsa_free_performant_mode(h);	/* clean7 */
8765b2ef480cSRobert Elliott 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8766b2ef480cSRobert Elliott 			hpsa_free_cmd_pool(h);		/* clean5 */
8767b2ef480cSRobert Elliott 			/*
8768b2ef480cSRobert Elliott 			 * skip hpsa_free_irqs(h) clean4 since that
8769b2ef480cSRobert Elliott 			 * was just called before request_irqs failed
8770d498757cSRobert Elliott 			 */
8771d498757cSRobert Elliott 			goto clean3;
877264670ac8SStephen M. Cameron 		}
877364670ac8SStephen M. Cameron 
877464670ac8SStephen M. Cameron 		rc = hpsa_kdump_soft_reset(h);
877564670ac8SStephen M. Cameron 		if (rc)
877664670ac8SStephen M. Cameron 			/* Neither hard nor soft reset worked, we're hosed. */
87777ef7323fSDon Brace 			goto clean7;
877864670ac8SStephen M. Cameron 
877964670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev, "Board READY.\n");
878064670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev,
878164670ac8SStephen M. Cameron 			"Waiting for stale completions to drain.\n");
878264670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_ON);
878364670ac8SStephen M. Cameron 		msleep(10000);
878464670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
878564670ac8SStephen M. Cameron 
878664670ac8SStephen M. Cameron 		rc = controller_reset_failed(h->cfgtable);
878764670ac8SStephen M. Cameron 		if (rc)
878864670ac8SStephen M. Cameron 			dev_info(&h->pdev->dev,
878964670ac8SStephen M. Cameron 				"Soft reset appears to have failed.\n");
879064670ac8SStephen M. Cameron 
879164670ac8SStephen M. Cameron 		/* since the controller's reset, we have to go back and re-init
879264670ac8SStephen M. Cameron 		 * everything.  Easiest to just forget what we've done and do it
879364670ac8SStephen M. Cameron 		 * all over again.
879464670ac8SStephen M. Cameron 		 */
879564670ac8SStephen M. Cameron 		hpsa_undo_allocations_after_kdump_soft_reset(h);
879664670ac8SStephen M. Cameron 		try_soft_reset = 0;
879764670ac8SStephen M. Cameron 		if (rc)
8798b2ef480cSRobert Elliott 			/* don't goto clean, we already unallocated */
879964670ac8SStephen M. Cameron 			return -ENODEV;
880064670ac8SStephen M. Cameron 
880164670ac8SStephen M. Cameron 		goto reinit_after_soft_reset;
880264670ac8SStephen M. Cameron 	}
8803edd16368SStephen M. Cameron 
8804da0697bdSScott Teel 	/* Enable Accelerated IO path at driver layer */
8805da0697bdSScott Teel 	h->acciopath_status = 1;
880634592254SScott Teel 	/* Disable discovery polling.*/
880734592254SScott Teel 	h->discovery_polling = 0;
8808da0697bdSScott Teel 
8809e863d68eSScott Teel 
8810edd16368SStephen M. Cameron 	/* Turn the interrupts on so we can service requests */
8811edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8812edd16368SStephen M. Cameron 
8813339b2b14SStephen M. Cameron 	hpsa_hba_inquiry(h);
88148a98db73SStephen M. Cameron 
881534592254SScott Teel 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
881634592254SScott Teel 	if (!h->lastlogicals)
881734592254SScott Teel 		dev_info(&h->pdev->dev,
881834592254SScott Teel 			"Can't track change to report lun data\n");
881934592254SScott Teel 
8820cf477237SDon Brace 	/* hook into SCSI subsystem */
8821cf477237SDon Brace 	rc = hpsa_scsi_add_host(h);
8822cf477237SDon Brace 	if (rc)
8823cf477237SDon Brace 		goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8824cf477237SDon Brace 
88258a98db73SStephen M. Cameron 	/* Monitor the controller for firmware lockups */
88268a98db73SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
88278a98db73SStephen M. Cameron 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
88288a98db73SStephen M. Cameron 	schedule_delayed_work(&h->monitor_ctlr_work,
88298a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
88306636e7f4SDon Brace 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
88316636e7f4SDon Brace 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
88326636e7f4SDon Brace 				h->heartbeat_sample_interval);
88333d38f00cSScott Teel 	INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
88343d38f00cSScott Teel 	schedule_delayed_work(&h->event_monitor_work,
88353d38f00cSScott Teel 				HPSA_EVENT_MONITOR_INTERVAL);
883688bf6d62SStephen M. Cameron 	return 0;
8837edd16368SStephen M. Cameron 
88382946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8839105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);
8840105a3dbcSRobert Elliott 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8841105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
884233a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
88432946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */
88442e9d1b36SStephen M. Cameron 	hpsa_free_cmd_pool(h);
88452946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */
8846ec501a18SRobert Elliott 	hpsa_free_irqs(h);
88472946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */
88482946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);
88492946e82bSRobert Elliott 	h->scsi_host = NULL;
88502946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */
8851195f2c65SRobert Elliott 	hpsa_free_pci_init(h);
88522946e82bSRobert Elliott clean2: /* lu, aer/h */
8853105a3dbcSRobert Elliott 	if (h->lockup_detected) {
8854094963daSStephen M. Cameron 		free_percpu(h->lockup_detected);
8855105a3dbcSRobert Elliott 		h->lockup_detected = NULL;
8856105a3dbcSRobert Elliott 	}
8857105a3dbcSRobert Elliott clean1:	/* wq/aer/h */
8858105a3dbcSRobert Elliott 	if (h->resubmit_wq) {
8859105a3dbcSRobert Elliott 		destroy_workqueue(h->resubmit_wq);
8860105a3dbcSRobert Elliott 		h->resubmit_wq = NULL;
8861105a3dbcSRobert Elliott 	}
8862105a3dbcSRobert Elliott 	if (h->rescan_ctlr_wq) {
8863105a3dbcSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
8864105a3dbcSRobert Elliott 		h->rescan_ctlr_wq = NULL;
8865105a3dbcSRobert Elliott 	}
886601192088SDon Brace 	if (h->monitor_ctlr_wq) {
886701192088SDon Brace 		destroy_workqueue(h->monitor_ctlr_wq);
886801192088SDon Brace 		h->monitor_ctlr_wq = NULL;
886901192088SDon Brace 	}
8870edd16368SStephen M. Cameron 	kfree(h);
8871ecd9aad4SStephen M. Cameron 	return rc;
8872edd16368SStephen M. Cameron }
8873edd16368SStephen M. Cameron 
8874edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h)
8875edd16368SStephen M. Cameron {
8876edd16368SStephen M. Cameron 	char *flush_buf;
8877edd16368SStephen M. Cameron 	struct CommandList *c;
887825163bd5SWebb Scales 	int rc;
8879702890e3SStephen M. Cameron 
8880094963daSStephen M. Cameron 	if (unlikely(lockup_detected(h)))
8881702890e3SStephen M. Cameron 		return;
8882edd16368SStephen M. Cameron 	flush_buf = kzalloc(4, GFP_KERNEL);
8883edd16368SStephen M. Cameron 	if (!flush_buf)
8884edd16368SStephen M. Cameron 		return;
8885edd16368SStephen M. Cameron 
888645fcb86eSStephen Cameron 	c = cmd_alloc(h);
8887bf43caf3SRobert Elliott 
8888a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8889a2dac136SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_CMD)) {
8890a2dac136SStephen M. Cameron 		goto out;
8891a2dac136SStephen M. Cameron 	}
88928bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
88938bc8f47eSChristoph Hellwig 			DEFAULT_TIMEOUT);
889425163bd5SWebb Scales 	if (rc)
889525163bd5SWebb Scales 		goto out;
8896edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus != 0)
8897a2dac136SStephen M. Cameron out:
8898edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
8899edd16368SStephen M. Cameron 			"error flushing cache on controller\n");
890045fcb86eSStephen Cameron 	cmd_free(h, c);
8901edd16368SStephen M. Cameron 	kfree(flush_buf);
8902edd16368SStephen M. Cameron }
8903edd16368SStephen M. Cameron 
8904c2adae44SScott Teel /* Make controller gather fresh report lun data each time we
8905c2adae44SScott Teel  * send down a report luns request
8906c2adae44SScott Teel  */
8907c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h)
8908c2adae44SScott Teel {
8909c2adae44SScott Teel 	u32 *options;
8910c2adae44SScott Teel 	struct CommandList *c;
8911c2adae44SScott Teel 	int rc;
8912c2adae44SScott Teel 
8913c2adae44SScott Teel 	/* Don't bother trying to set diag options if locked up */
8914c2adae44SScott Teel 	if (unlikely(h->lockup_detected))
8915c2adae44SScott Teel 		return;
8916c2adae44SScott Teel 
8917c2adae44SScott Teel 	options = kzalloc(sizeof(*options), GFP_KERNEL);
89187e8a9486SAmit Kushwaha 	if (!options)
8919c2adae44SScott Teel 		return;
8920c2adae44SScott Teel 
8921c2adae44SScott Teel 	c = cmd_alloc(h);
8922c2adae44SScott Teel 
8923c2adae44SScott Teel 	/* first, get the current diag options settings */
8924c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8925c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8926c2adae44SScott Teel 		goto errout;
8927c2adae44SScott Teel 
89288bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
89298bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8930c2adae44SScott Teel 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
8931c2adae44SScott Teel 		goto errout;
8932c2adae44SScott Teel 
8933c2adae44SScott Teel 	/* Now, set the bit for disabling the RLD caching */
8934c2adae44SScott Teel 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8935c2adae44SScott Teel 
8936c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8937c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8938c2adae44SScott Teel 		goto errout;
8939c2adae44SScott Teel 
89408bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
89418bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8942c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8943c2adae44SScott Teel 		goto errout;
8944c2adae44SScott Teel 
8945c2adae44SScott Teel 	/* Now verify that it got set: */
8946c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8947c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8948c2adae44SScott Teel 		goto errout;
8949c2adae44SScott Teel 
89508bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
89518bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8952c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8953c2adae44SScott Teel 		goto errout;
8954c2adae44SScott Teel 
8955d8a080c3SDan Carpenter 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8956c2adae44SScott Teel 		goto out;
8957c2adae44SScott Teel 
8958c2adae44SScott Teel errout:
8959c2adae44SScott Teel 	dev_err(&h->pdev->dev,
8960c2adae44SScott Teel 			"Error: failed to disable report lun data caching.\n");
8961c2adae44SScott Teel out:
8962c2adae44SScott Teel 	cmd_free(h, c);
8963c2adae44SScott Teel 	kfree(options);
8964c2adae44SScott Teel }
8965c2adae44SScott Teel 
89660d98ba8dSSinan Kaya static void __hpsa_shutdown(struct pci_dev *pdev)
8967edd16368SStephen M. Cameron {
8968edd16368SStephen M. Cameron 	struct ctlr_info *h;
8969edd16368SStephen M. Cameron 
8970edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
8971edd16368SStephen M. Cameron 	/* Turn board interrupts off  and send the flush cache command
8972edd16368SStephen M. Cameron 	 * sendcmd will turn off interrupt, and send the flush...
8973edd16368SStephen M. Cameron 	 * To write all data in the battery backed cache to disks
8974edd16368SStephen M. Cameron 	 */
8975edd16368SStephen M. Cameron 	hpsa_flush_cache(h);
8976edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8977105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
8978cc64c817SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
8979edd16368SStephen M. Cameron }
8980edd16368SStephen M. Cameron 
89810d98ba8dSSinan Kaya static void hpsa_shutdown(struct pci_dev *pdev)
89820d98ba8dSSinan Kaya {
89830d98ba8dSSinan Kaya 	__hpsa_shutdown(pdev);
89840d98ba8dSSinan Kaya 	pci_disable_device(pdev);
89850d98ba8dSSinan Kaya }
89860d98ba8dSSinan Kaya 
89876f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h)
898855e14e76SStephen M. Cameron {
898955e14e76SStephen M. Cameron 	int i;
899055e14e76SStephen M. Cameron 
8991105a3dbcSRobert Elliott 	for (i = 0; i < h->ndevices; i++) {
899255e14e76SStephen M. Cameron 		kfree(h->dev[i]);
8993105a3dbcSRobert Elliott 		h->dev[i] = NULL;
8994105a3dbcSRobert Elliott 	}
899555e14e76SStephen M. Cameron }
899655e14e76SStephen M. Cameron 
89976f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev)
8998edd16368SStephen M. Cameron {
8999edd16368SStephen M. Cameron 	struct ctlr_info *h;
90008a98db73SStephen M. Cameron 	unsigned long flags;
9001edd16368SStephen M. Cameron 
9002edd16368SStephen M. Cameron 	if (pci_get_drvdata(pdev) == NULL) {
9003edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "unable to remove device\n");
9004edd16368SStephen M. Cameron 		return;
9005edd16368SStephen M. Cameron 	}
9006edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
90078a98db73SStephen M. Cameron 
90088a98db73SStephen M. Cameron 	/* Get rid of any controller monitoring work items */
90098a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
90108a98db73SStephen M. Cameron 	h->remove_in_progress = 1;
90118a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
90126636e7f4SDon Brace 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
90136636e7f4SDon Brace 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
90143d38f00cSScott Teel 	cancel_delayed_work_sync(&h->event_monitor_work);
90156636e7f4SDon Brace 	destroy_workqueue(h->rescan_ctlr_wq);
90166636e7f4SDon Brace 	destroy_workqueue(h->resubmit_wq);
901701192088SDon Brace 	destroy_workqueue(h->monitor_ctlr_wq);
9018cc64c817SRobert Elliott 
9019dfb2e6f4SMartin Wilck 	hpsa_delete_sas_host(h);
9020dfb2e6f4SMartin Wilck 
90212d041306SDon Brace 	/*
90222d041306SDon Brace 	 * Call before disabling interrupts.
90232d041306SDon Brace 	 * scsi_remove_host can trigger I/O operations especially
90242d041306SDon Brace 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
90252d041306SDon Brace 	 * operations which cannot complete and will hang the system.
90262d041306SDon Brace 	 */
90272d041306SDon Brace 	if (h->scsi_host)
90282d041306SDon Brace 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
9029105a3dbcSRobert Elliott 	/* includes hpsa_free_irqs - init_one 4 */
9030195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
90310d98ba8dSSinan Kaya 	__hpsa_shutdown(pdev);
9032cc64c817SRobert Elliott 
9033105a3dbcSRobert Elliott 	hpsa_free_device_info(h);		/* scan */
9034105a3dbcSRobert Elliott 
90352946e82bSRobert Elliott 	kfree(h->hba_inquiry_data);			/* init_one 10 */
90362946e82bSRobert Elliott 	h->hba_inquiry_data = NULL;			/* init_one 10 */
90372946e82bSRobert Elliott 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9038105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);			/* init_one 7 */
9039105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
90401fb7c98aSRobert Elliott 	hpsa_free_cmd_pool(h);				/* init_one 5 */
904134592254SScott Teel 	kfree(h->lastlogicals);
9042105a3dbcSRobert Elliott 
9043105a3dbcSRobert Elliott 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9044195f2c65SRobert Elliott 
90452946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);			/* init_one 3 */
90462946e82bSRobert Elliott 	h->scsi_host = NULL;				/* init_one 3 */
90472946e82bSRobert Elliott 
9048195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
90492946e82bSRobert Elliott 	hpsa_free_pci_init(h);				/* init_one 2.5 */
9050195f2c65SRobert Elliott 
9051105a3dbcSRobert Elliott 	free_percpu(h->lockup_detected);		/* init_one 2 */
9052105a3dbcSRobert Elliott 	h->lockup_detected = NULL;			/* init_one 2 */
9053105a3dbcSRobert Elliott 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
9054d04e62b9SKevin Barnett 
90558b834bffSMing Lei 	hpda_free_ctlr_info(h);				/* init_one 1 */
9056edd16368SStephen M. Cameron }
9057edd16368SStephen M. Cameron 
9058edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9059edd16368SStephen M. Cameron 	__attribute__((unused)) pm_message_t state)
9060edd16368SStephen M. Cameron {
9061edd16368SStephen M. Cameron 	return -ENOSYS;
9062edd16368SStephen M. Cameron }
9063edd16368SStephen M. Cameron 
9064edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9065edd16368SStephen M. Cameron {
9066edd16368SStephen M. Cameron 	return -ENOSYS;
9067edd16368SStephen M. Cameron }
9068edd16368SStephen M. Cameron 
9069edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = {
9070f79cfec6SStephen M. Cameron 	.name = HPSA,
9071edd16368SStephen M. Cameron 	.probe = hpsa_init_one,
90726f039790SGreg Kroah-Hartman 	.remove = hpsa_remove_one,
9073edd16368SStephen M. Cameron 	.id_table = hpsa_pci_device_id,	/* id_table */
9074edd16368SStephen M. Cameron 	.shutdown = hpsa_shutdown,
9075edd16368SStephen M. Cameron 	.suspend = hpsa_suspend,
9076edd16368SStephen M. Cameron 	.resume = hpsa_resume,
9077edd16368SStephen M. Cameron };
9078edd16368SStephen M. Cameron 
9079303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of
9080303932fdSDon Brace  * scatter gather elements supported) and bucket[],
9081303932fdSDon Brace  * which is an array of 8 integers.  The bucket[] array
9082303932fdSDon Brace  * contains 8 different DMA transfer sizes (in 16
9083303932fdSDon Brace  * byte increments) which the controller uses to fetch
9084303932fdSDon Brace  * commands.  This function fills in bucket_map[], which
9085303932fdSDon Brace  * maps a given number of scatter gather elements to one of
9086303932fdSDon Brace  * the 8 DMA transfer sizes.  The point of it is to allow the
9087303932fdSDon Brace  * controller to only do as much DMA as needed to fetch the
9088303932fdSDon Brace  * command, with the DMA transfer size encoded in the lower
9089303932fdSDon Brace  * bits of the command address.
9090303932fdSDon Brace  */
9091303932fdSDon Brace static void  calc_bucket_map(int bucket[], int num_buckets,
90922b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map)
9093303932fdSDon Brace {
9094303932fdSDon Brace 	int i, j, b, size;
9095303932fdSDon Brace 
9096303932fdSDon Brace 	/* Note, bucket_map must have nsgs+1 entries. */
9097303932fdSDon Brace 	for (i = 0; i <= nsgs; i++) {
9098303932fdSDon Brace 		/* Compute size of a command with i SG entries */
9099e1f7de0cSMatt Gates 		size = i + min_blocks;
9100303932fdSDon Brace 		b = num_buckets; /* Assume the biggest bucket */
9101303932fdSDon Brace 		/* Find the bucket that is just big enough */
9102e1f7de0cSMatt Gates 		for (j = 0; j < num_buckets; j++) {
9103303932fdSDon Brace 			if (bucket[j] >= size) {
9104303932fdSDon Brace 				b = j;
9105303932fdSDon Brace 				break;
9106303932fdSDon Brace 			}
9107303932fdSDon Brace 		}
9108303932fdSDon Brace 		/* for a command with i SG entries, use bucket b. */
9109303932fdSDon Brace 		bucket_map[i] = b;
9110303932fdSDon Brace 	}
9111303932fdSDon Brace }
9112303932fdSDon Brace 
9113105a3dbcSRobert Elliott /*
9114105a3dbcSRobert Elliott  * return -ENODEV on err, 0 on success (or no action)
9115105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9116105a3dbcSRobert Elliott  */
9117c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9118303932fdSDon Brace {
91196c311b57SStephen M. Cameron 	int i;
91206c311b57SStephen M. Cameron 	unsigned long register_value;
9121e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9122e1f7de0cSMatt Gates 			(trans_support & CFGTBL_Trans_use_short_tags) |
9123e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix |
9124b9af4937SStephen M. Cameron 			(trans_support & (CFGTBL_Trans_io_accel1 |
9125b9af4937SStephen M. Cameron 				CFGTBL_Trans_io_accel2));
9126e1f7de0cSMatt Gates 	struct access_method access = SA5_performant_access;
9127def342bdSStephen M. Cameron 
9128def342bdSStephen M. Cameron 	/* This is a bit complicated.  There are 8 registers on
9129def342bdSStephen M. Cameron 	 * the controller which we write to to tell it 8 different
9130def342bdSStephen M. Cameron 	 * sizes of commands which there may be.  It's a way of
9131def342bdSStephen M. Cameron 	 * reducing the DMA done to fetch each command.  Encoded into
9132def342bdSStephen M. Cameron 	 * each command's tag are 3 bits which communicate to the controller
9133def342bdSStephen M. Cameron 	 * which of the eight sizes that command fits within.  The size of
9134def342bdSStephen M. Cameron 	 * each command depends on how many scatter gather entries there are.
9135def342bdSStephen M. Cameron 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
9136def342bdSStephen M. Cameron 	 * with the number of 16-byte blocks a command of that size requires.
9137def342bdSStephen M. Cameron 	 * The smallest command possible requires 5 such 16 byte blocks.
9138d66ae08bSStephen M. Cameron 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9139def342bdSStephen M. Cameron 	 * blocks.  Note, this only extends to the SG entries contained
9140def342bdSStephen M. Cameron 	 * within the command block, and does not extend to chained blocks
9141def342bdSStephen M. Cameron 	 * of SG elements.   bft[] contains the eight values we write to
9142def342bdSStephen M. Cameron 	 * the registers.  They are not evenly distributed, but have more
9143def342bdSStephen M. Cameron 	 * sizes for small commands, and fewer sizes for larger commands.
9144def342bdSStephen M. Cameron 	 */
9145d66ae08bSStephen M. Cameron 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9146b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5
9147b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4
9148b9af4937SStephen M. Cameron 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9149b9af4937SStephen M. Cameron 			13, 14, 15, 16, 17, 18, 19,
9150b9af4937SStephen M. Cameron 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9151b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9152b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9153b9af4937SStephen M. Cameron 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9154b9af4937SStephen M. Cameron 				 16 * MIN_IOACCEL2_BFT_ENTRY);
9155b9af4937SStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9156d66ae08bSStephen M. Cameron 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9157303932fdSDon Brace 	/*  5 = 1 s/g entry or 4k
9158303932fdSDon Brace 	 *  6 = 2 s/g entry or 8k
9159303932fdSDon Brace 	 *  8 = 4 s/g entry or 16k
9160303932fdSDon Brace 	 * 10 = 6 s/g entry or 24k
9161303932fdSDon Brace 	 */
9162303932fdSDon Brace 
9163b3a52e79SStephen M. Cameron 	/* If the controller supports either ioaccel method then
9164b3a52e79SStephen M. Cameron 	 * we can also use the RAID stack submit path that does not
9165b3a52e79SStephen M. Cameron 	 * perform the superfluous readl() after each command submission.
9166b3a52e79SStephen M. Cameron 	 */
9167b3a52e79SStephen M. Cameron 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9168b3a52e79SStephen M. Cameron 		access = SA5_performant_access_no_read;
9169b3a52e79SStephen M. Cameron 
9170303932fdSDon Brace 	/* Controller spec: zero out this buffer. */
9171072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++)
9172072b0518SStephen M. Cameron 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9173303932fdSDon Brace 
9174d66ae08bSStephen M. Cameron 	bft[7] = SG_ENTRIES_IN_CMD + 4;
9175d66ae08bSStephen M. Cameron 	calc_bucket_map(bft, ARRAY_SIZE(bft),
9176e1f7de0cSMatt Gates 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9177303932fdSDon Brace 	for (i = 0; i < 8; i++)
9178303932fdSDon Brace 		writel(bft[i], &h->transtable->BlockFetch[i]);
9179303932fdSDon Brace 
9180303932fdSDon Brace 	/* size of controller ring buffer */
9181303932fdSDon Brace 	writel(h->max_commands, &h->transtable->RepQSize);
9182254f796bSMatt Gates 	writel(h->nreply_queues, &h->transtable->RepQCount);
9183303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrLow32);
9184303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9185254f796bSMatt Gates 
9186254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9187254f796bSMatt Gates 		writel(0, &h->transtable->RepQAddr[i].upper);
9188072b0518SStephen M. Cameron 		writel(h->reply_queue[i].busaddr,
9189254f796bSMatt Gates 			&h->transtable->RepQAddr[i].lower);
9190254f796bSMatt Gates 	}
9191254f796bSMatt Gates 
9192b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9193e1f7de0cSMatt Gates 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9194e1f7de0cSMatt Gates 	/*
9195e1f7de0cSMatt Gates 	 * enable outbound interrupt coalescing in accelerator mode;
9196e1f7de0cSMatt Gates 	 */
9197e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9198e1f7de0cSMatt Gates 		access = SA5_ioaccel_mode1_access;
9199e1f7de0cSMatt Gates 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9200e1f7de0cSMatt Gates 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
920196b6ce4eSDon Brace 	} else
920296b6ce4eSDon Brace 		if (trans_support & CFGTBL_Trans_io_accel2)
9203c349775eSScott Teel 			access = SA5_ioaccel_mode2_access;
9204303932fdSDon Brace 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9205c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9206c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9207c706a795SRobert Elliott 			"performant mode problem - doorbell timeout\n");
9208c706a795SRobert Elliott 		return -ENODEV;
9209c706a795SRobert Elliott 	}
9210303932fdSDon Brace 	register_value = readl(&(h->cfgtable->TransportActive));
9211303932fdSDon Brace 	if (!(register_value & CFGTBL_Trans_Performant)) {
9212050f7147SStephen Cameron 		dev_err(&h->pdev->dev,
9213050f7147SStephen Cameron 			"performant mode problem - transport not active\n");
9214c706a795SRobert Elliott 		return -ENODEV;
9215303932fdSDon Brace 	}
9216960a30e7SStephen M. Cameron 	/* Change the access methods to the performant access methods */
9217e1f7de0cSMatt Gates 	h->access = access;
9218e1f7de0cSMatt Gates 	h->transMethod = transMethod;
9219e1f7de0cSMatt Gates 
9220b9af4937SStephen M. Cameron 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9221b9af4937SStephen M. Cameron 		(trans_support & CFGTBL_Trans_io_accel2)))
9222c706a795SRobert Elliott 		return 0;
9223e1f7de0cSMatt Gates 
9224b9af4937SStephen M. Cameron 	if (trans_support & CFGTBL_Trans_io_accel1) {
9225e1f7de0cSMatt Gates 		/* Set up I/O accelerator mode */
9226e1f7de0cSMatt Gates 		for (i = 0; i < h->nreply_queues; i++) {
9227e1f7de0cSMatt Gates 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9228e1f7de0cSMatt Gates 			h->reply_queue[i].current_entry =
9229e1f7de0cSMatt Gates 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9230e1f7de0cSMatt Gates 		}
9231283b4a9bSStephen M. Cameron 		bft[7] = h->ioaccel_maxsg + 8;
9232283b4a9bSStephen M. Cameron 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9233e1f7de0cSMatt Gates 				h->ioaccel1_blockFetchTable);
9234e1f7de0cSMatt Gates 
9235e1f7de0cSMatt Gates 		/* initialize all reply queue entries to unused */
9236072b0518SStephen M. Cameron 		for (i = 0; i < h->nreply_queues; i++)
9237072b0518SStephen M. Cameron 			memset(h->reply_queue[i].head,
9238072b0518SStephen M. Cameron 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9239072b0518SStephen M. Cameron 				h->reply_queue_size);
9240e1f7de0cSMatt Gates 
9241e1f7de0cSMatt Gates 		/* set all the constant fields in the accelerator command
9242e1f7de0cSMatt Gates 		 * frames once at init time to save CPU cycles later.
9243e1f7de0cSMatt Gates 		 */
9244e1f7de0cSMatt Gates 		for (i = 0; i < h->nr_cmds; i++) {
9245e1f7de0cSMatt Gates 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9246e1f7de0cSMatt Gates 
9247e1f7de0cSMatt Gates 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9248e1f7de0cSMatt Gates 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9249e1f7de0cSMatt Gates 					(i * sizeof(struct ErrorInfo)));
9250e1f7de0cSMatt Gates 			cp->err_info_len = sizeof(struct ErrorInfo);
9251e1f7de0cSMatt Gates 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
92522b08b3e9SDon Brace 			cp->host_context_flags =
92532b08b3e9SDon Brace 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9254e1f7de0cSMatt Gates 			cp->timeout_sec = 0;
9255e1f7de0cSMatt Gates 			cp->ReplyQueue = 0;
925650a0decfSStephen M. Cameron 			cp->tag =
9257f2405db8SDon Brace 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
925850a0decfSStephen M. Cameron 			cp->host_addr =
925950a0decfSStephen M. Cameron 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9260e1f7de0cSMatt Gates 					(i * sizeof(struct io_accel1_cmd)));
9261e1f7de0cSMatt Gates 		}
9262b9af4937SStephen M. Cameron 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9263b9af4937SStephen M. Cameron 		u64 cfg_offset, cfg_base_addr_index;
9264b9af4937SStephen M. Cameron 		u32 bft2_offset, cfg_base_addr;
9265b9af4937SStephen M. Cameron 		int rc;
9266b9af4937SStephen M. Cameron 
9267b9af4937SStephen M. Cameron 		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9268b9af4937SStephen M. Cameron 			&cfg_base_addr_index, &cfg_offset);
9269b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9270b9af4937SStephen M. Cameron 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9271b9af4937SStephen M. Cameron 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9272b9af4937SStephen M. Cameron 				4, h->ioaccel2_blockFetchTable);
9273b9af4937SStephen M. Cameron 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9274b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct CfgTable,
9275b9af4937SStephen M. Cameron 				io_accel_request_size_offset) != 0xb8);
9276b9af4937SStephen M. Cameron 		h->ioaccel2_bft2_regs =
9277b9af4937SStephen M. Cameron 			remap_pci_mem(pci_resource_start(h->pdev,
9278b9af4937SStephen M. Cameron 					cfg_base_addr_index) +
9279b9af4937SStephen M. Cameron 					cfg_offset + bft2_offset,
9280b9af4937SStephen M. Cameron 					ARRAY_SIZE(bft2) *
9281b9af4937SStephen M. Cameron 					sizeof(*h->ioaccel2_bft2_regs));
9282b9af4937SStephen M. Cameron 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9283b9af4937SStephen M. Cameron 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9284b9af4937SStephen M. Cameron 	}
9285b9af4937SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9286c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9287c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9288c706a795SRobert Elliott 			"performant mode problem - enabling ioaccel mode\n");
9289c706a795SRobert Elliott 		return -ENODEV;
9290c706a795SRobert Elliott 	}
9291c706a795SRobert Elliott 	return 0;
9292e1f7de0cSMatt Gates }
9293e1f7de0cSMatt Gates 
92941fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */
92951fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
92961fb7c98aSRobert Elliott {
9297105a3dbcSRobert Elliott 	if (h->ioaccel_cmd_pool) {
92981fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
92991fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93001fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool,
93011fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool_dhandle);
9302105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool = NULL;
9303105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool_dhandle = 0;
9304105a3dbcSRobert Elliott 	}
93051fb7c98aSRobert Elliott 	kfree(h->ioaccel1_blockFetchTable);
9306105a3dbcSRobert Elliott 	h->ioaccel1_blockFetchTable = NULL;
93071fb7c98aSRobert Elliott }
93081fb7c98aSRobert Elliott 
9309d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */
9310d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9311e1f7de0cSMatt Gates {
9312283b4a9bSStephen M. Cameron 	h->ioaccel_maxsg =
9313283b4a9bSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9314283b4a9bSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9315283b4a9bSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9316283b4a9bSStephen M. Cameron 
9317e1f7de0cSMatt Gates 	/* Command structures must be aligned on a 128-byte boundary
9318e1f7de0cSMatt Gates 	 * because the 7 lower bits of the address are used by the
9319e1f7de0cSMatt Gates 	 * hardware.
9320e1f7de0cSMatt Gates 	 */
9321e1f7de0cSMatt Gates 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9322e1f7de0cSMatt Gates 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9323e1f7de0cSMatt Gates 	h->ioaccel_cmd_pool =
93248bc8f47eSChristoph Hellwig 		dma_alloc_coherent(&h->pdev->dev,
9325e1f7de0cSMatt Gates 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93268bc8f47eSChristoph Hellwig 			&h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9327e1f7de0cSMatt Gates 
9328e1f7de0cSMatt Gates 	h->ioaccel1_blockFetchTable =
9329283b4a9bSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9330e1f7de0cSMatt Gates 				sizeof(u32)), GFP_KERNEL);
9331e1f7de0cSMatt Gates 
9332e1f7de0cSMatt Gates 	if ((h->ioaccel_cmd_pool == NULL) ||
9333e1f7de0cSMatt Gates 		(h->ioaccel1_blockFetchTable == NULL))
9334e1f7de0cSMatt Gates 		goto clean_up;
9335e1f7de0cSMatt Gates 
9336e1f7de0cSMatt Gates 	memset(h->ioaccel_cmd_pool, 0,
9337e1f7de0cSMatt Gates 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9338e1f7de0cSMatt Gates 	return 0;
9339e1f7de0cSMatt Gates 
9340e1f7de0cSMatt Gates clean_up:
93411fb7c98aSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
93422dd02d74SRobert Elliott 	return -ENOMEM;
93436c311b57SStephen M. Cameron }
93446c311b57SStephen M. Cameron 
93451fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */
93461fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
93471fb7c98aSRobert Elliott {
9348d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9349d9a729f3SWebb Scales 
9350105a3dbcSRobert Elliott 	if (h->ioaccel2_cmd_pool) {
93511fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
93521fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
93531fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool,
93541fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool_dhandle);
9355105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool = NULL;
9356105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool_dhandle = 0;
9357105a3dbcSRobert Elliott 	}
93581fb7c98aSRobert Elliott 	kfree(h->ioaccel2_blockFetchTable);
9359105a3dbcSRobert Elliott 	h->ioaccel2_blockFetchTable = NULL;
93601fb7c98aSRobert Elliott }
93611fb7c98aSRobert Elliott 
9362d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */
9363d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9364aca9012aSStephen M. Cameron {
9365d9a729f3SWebb Scales 	int rc;
9366d9a729f3SWebb Scales 
9367aca9012aSStephen M. Cameron 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9368aca9012aSStephen M. Cameron 
9369aca9012aSStephen M. Cameron 	h->ioaccel_maxsg =
9370aca9012aSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9371aca9012aSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9372aca9012aSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9373aca9012aSStephen M. Cameron 
9374aca9012aSStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9375aca9012aSStephen M. Cameron 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9376aca9012aSStephen M. Cameron 	h->ioaccel2_cmd_pool =
93778bc8f47eSChristoph Hellwig 		dma_alloc_coherent(&h->pdev->dev,
9378aca9012aSStephen M. Cameron 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
93798bc8f47eSChristoph Hellwig 			&h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9380aca9012aSStephen M. Cameron 
9381aca9012aSStephen M. Cameron 	h->ioaccel2_blockFetchTable =
9382aca9012aSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9383aca9012aSStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9384aca9012aSStephen M. Cameron 
9385aca9012aSStephen M. Cameron 	if ((h->ioaccel2_cmd_pool == NULL) ||
9386d9a729f3SWebb Scales 		(h->ioaccel2_blockFetchTable == NULL)) {
9387d9a729f3SWebb Scales 		rc = -ENOMEM;
9388d9a729f3SWebb Scales 		goto clean_up;
9389d9a729f3SWebb Scales 	}
9390d9a729f3SWebb Scales 
9391d9a729f3SWebb Scales 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9392d9a729f3SWebb Scales 	if (rc)
9393aca9012aSStephen M. Cameron 		goto clean_up;
9394aca9012aSStephen M. Cameron 
9395aca9012aSStephen M. Cameron 	memset(h->ioaccel2_cmd_pool, 0,
9396aca9012aSStephen M. Cameron 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9397aca9012aSStephen M. Cameron 	return 0;
9398aca9012aSStephen M. Cameron 
9399aca9012aSStephen M. Cameron clean_up:
94001fb7c98aSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9401d9a729f3SWebb Scales 	return rc;
9402aca9012aSStephen M. Cameron }
9403aca9012aSStephen M. Cameron 
9404105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9405105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h)
9406105a3dbcSRobert Elliott {
9407105a3dbcSRobert Elliott 	kfree(h->blockFetchTable);
9408105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9409105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9410105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9411105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9412105a3dbcSRobert Elliott }
9413105a3dbcSRobert Elliott 
9414105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action)
9415105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9416105a3dbcSRobert Elliott  */
9417105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
94186c311b57SStephen M. Cameron {
94196c311b57SStephen M. Cameron 	u32 trans_support;
9420e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9421e1f7de0cSMatt Gates 					CFGTBL_Trans_use_short_tags;
9422105a3dbcSRobert Elliott 	int i, rc;
94236c311b57SStephen M. Cameron 
942402ec19c8SStephen M. Cameron 	if (hpsa_simple_mode)
9425105a3dbcSRobert Elliott 		return 0;
942602ec19c8SStephen M. Cameron 
942767c99a72Sscameron@beardog.cce.hp.com 	trans_support = readl(&(h->cfgtable->TransportSupport));
942867c99a72Sscameron@beardog.cce.hp.com 	if (!(trans_support & PERFORMANT_MODE))
9429105a3dbcSRobert Elliott 		return 0;
943067c99a72Sscameron@beardog.cce.hp.com 
9431e1f7de0cSMatt Gates 	/* Check for I/O accelerator mode support */
9432e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9433e1f7de0cSMatt Gates 		transMethod |= CFGTBL_Trans_io_accel1 |
9434e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix;
9435105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9436105a3dbcSRobert Elliott 		if (rc)
9437105a3dbcSRobert Elliott 			return rc;
9438105a3dbcSRobert Elliott 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9439aca9012aSStephen M. Cameron 		transMethod |= CFGTBL_Trans_io_accel2 |
9440aca9012aSStephen M. Cameron 				CFGTBL_Trans_enable_directed_msix;
9441105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9442105a3dbcSRobert Elliott 		if (rc)
9443105a3dbcSRobert Elliott 			return rc;
9444e1f7de0cSMatt Gates 	}
9445e1f7de0cSMatt Gates 
9446bc2bb154SChristoph Hellwig 	h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9447cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
94486c311b57SStephen M. Cameron 	/* Performant mode ring buffer and supporting data structures */
9449072b0518SStephen M. Cameron 	h->reply_queue_size = h->max_commands * sizeof(u64);
94506c311b57SStephen M. Cameron 
9451254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
94528bc8f47eSChristoph Hellwig 		h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9453072b0518SStephen M. Cameron 						h->reply_queue_size,
94548bc8f47eSChristoph Hellwig 						&h->reply_queue[i].busaddr,
94558bc8f47eSChristoph Hellwig 						GFP_KERNEL);
9456105a3dbcSRobert Elliott 		if (!h->reply_queue[i].head) {
9457105a3dbcSRobert Elliott 			rc = -ENOMEM;
9458105a3dbcSRobert Elliott 			goto clean1;	/* rq, ioaccel */
9459105a3dbcSRobert Elliott 		}
9460254f796bSMatt Gates 		h->reply_queue[i].size = h->max_commands;
9461254f796bSMatt Gates 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9462254f796bSMatt Gates 		h->reply_queue[i].current_entry = 0;
9463254f796bSMatt Gates 	}
9464254f796bSMatt Gates 
94656c311b57SStephen M. Cameron 	/* Need a block fetch table for performant mode */
9466d66ae08bSStephen M. Cameron 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
94676c311b57SStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9468105a3dbcSRobert Elliott 	if (!h->blockFetchTable) {
9469105a3dbcSRobert Elliott 		rc = -ENOMEM;
9470105a3dbcSRobert Elliott 		goto clean1;	/* rq, ioaccel */
9471105a3dbcSRobert Elliott 	}
94726c311b57SStephen M. Cameron 
9473105a3dbcSRobert Elliott 	rc = hpsa_enter_performant_mode(h, trans_support);
9474105a3dbcSRobert Elliott 	if (rc)
9475105a3dbcSRobert Elliott 		goto clean2;	/* bft, rq, ioaccel */
9476105a3dbcSRobert Elliott 	return 0;
9477303932fdSDon Brace 
9478105a3dbcSRobert Elliott clean2:	/* bft, rq, ioaccel */
9479303932fdSDon Brace 	kfree(h->blockFetchTable);
9480105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9481105a3dbcSRobert Elliott clean1:	/* rq, ioaccel */
9482105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9483105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9484105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9485105a3dbcSRobert Elliott 	return rc;
9486303932fdSDon Brace }
9487303932fdSDon Brace 
948823100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c)
948976438d08SStephen M. Cameron {
949023100dd9SStephen M. Cameron 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
949123100dd9SStephen M. Cameron }
949223100dd9SStephen M. Cameron 
949323100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h)
949423100dd9SStephen M. Cameron {
949523100dd9SStephen M. Cameron 	struct CommandList *c = NULL;
9496f2405db8SDon Brace 	int i, accel_cmds_out;
9497281a7fd0SWebb Scales 	int refcount;
949876438d08SStephen M. Cameron 
9499f2405db8SDon Brace 	do { /* wait for all outstanding ioaccel commands to drain out */
950023100dd9SStephen M. Cameron 		accel_cmds_out = 0;
9501f2405db8SDon Brace 		for (i = 0; i < h->nr_cmds; i++) {
9502f2405db8SDon Brace 			c = h->cmd_pool + i;
9503281a7fd0SWebb Scales 			refcount = atomic_inc_return(&c->refcount);
9504281a7fd0SWebb Scales 			if (refcount > 1) /* Command is allocated */
950523100dd9SStephen M. Cameron 				accel_cmds_out += is_accelerated_cmd(c);
9506281a7fd0SWebb Scales 			cmd_free(h, c);
9507f2405db8SDon Brace 		}
950823100dd9SStephen M. Cameron 		if (accel_cmds_out <= 0)
950976438d08SStephen M. Cameron 			break;
951076438d08SStephen M. Cameron 		msleep(100);
951176438d08SStephen M. Cameron 	} while (1);
951276438d08SStephen M. Cameron }
951376438d08SStephen M. Cameron 
9514d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9515d04e62b9SKevin Barnett 				struct hpsa_sas_port *hpsa_sas_port)
9516d04e62b9SKevin Barnett {
9517d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9518d04e62b9SKevin Barnett 	struct sas_phy *phy;
9519d04e62b9SKevin Barnett 
9520d04e62b9SKevin Barnett 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9521d04e62b9SKevin Barnett 	if (!hpsa_sas_phy)
9522d04e62b9SKevin Barnett 		return NULL;
9523d04e62b9SKevin Barnett 
9524d04e62b9SKevin Barnett 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9525d04e62b9SKevin Barnett 		hpsa_sas_port->next_phy_index);
9526d04e62b9SKevin Barnett 	if (!phy) {
9527d04e62b9SKevin Barnett 		kfree(hpsa_sas_phy);
9528d04e62b9SKevin Barnett 		return NULL;
9529d04e62b9SKevin Barnett 	}
9530d04e62b9SKevin Barnett 
9531d04e62b9SKevin Barnett 	hpsa_sas_port->next_phy_index++;
9532d04e62b9SKevin Barnett 	hpsa_sas_phy->phy = phy;
9533d04e62b9SKevin Barnett 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9534d04e62b9SKevin Barnett 
9535d04e62b9SKevin Barnett 	return hpsa_sas_phy;
9536d04e62b9SKevin Barnett }
9537d04e62b9SKevin Barnett 
9538d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9539d04e62b9SKevin Barnett {
9540d04e62b9SKevin Barnett 	struct sas_phy *phy = hpsa_sas_phy->phy;
9541d04e62b9SKevin Barnett 
9542d04e62b9SKevin Barnett 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9543d04e62b9SKevin Barnett 	if (hpsa_sas_phy->added_to_port)
9544d04e62b9SKevin Barnett 		list_del(&hpsa_sas_phy->phy_list_entry);
954555ca38b4SMartin Wilck 	sas_phy_delete(phy);
9546d04e62b9SKevin Barnett 	kfree(hpsa_sas_phy);
9547d04e62b9SKevin Barnett }
9548d04e62b9SKevin Barnett 
9549d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9550d04e62b9SKevin Barnett {
9551d04e62b9SKevin Barnett 	int rc;
9552d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9553d04e62b9SKevin Barnett 	struct sas_phy *phy;
9554d04e62b9SKevin Barnett 	struct sas_identify *identify;
9555d04e62b9SKevin Barnett 
9556d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9557d04e62b9SKevin Barnett 	phy = hpsa_sas_phy->phy;
9558d04e62b9SKevin Barnett 
9559d04e62b9SKevin Barnett 	identify = &phy->identify;
9560d04e62b9SKevin Barnett 	memset(identify, 0, sizeof(*identify));
9561d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9562d04e62b9SKevin Barnett 	identify->device_type = SAS_END_DEVICE;
9563d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9564d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9565d04e62b9SKevin Barnett 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9566d04e62b9SKevin Barnett 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9567d04e62b9SKevin Barnett 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9568d04e62b9SKevin Barnett 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9569d04e62b9SKevin Barnett 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9570d04e62b9SKevin Barnett 
9571d04e62b9SKevin Barnett 	rc = sas_phy_add(hpsa_sas_phy->phy);
9572d04e62b9SKevin Barnett 	if (rc)
9573d04e62b9SKevin Barnett 		return rc;
9574d04e62b9SKevin Barnett 
9575d04e62b9SKevin Barnett 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9576d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9577d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head);
9578d04e62b9SKevin Barnett 	hpsa_sas_phy->added_to_port = true;
9579d04e62b9SKevin Barnett 
9580d04e62b9SKevin Barnett 	return 0;
9581d04e62b9SKevin Barnett }
9582d04e62b9SKevin Barnett 
9583d04e62b9SKevin Barnett static int
9584d04e62b9SKevin Barnett 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9585d04e62b9SKevin Barnett 				struct sas_rphy *rphy)
9586d04e62b9SKevin Barnett {
9587d04e62b9SKevin Barnett 	struct sas_identify *identify;
9588d04e62b9SKevin Barnett 
9589d04e62b9SKevin Barnett 	identify = &rphy->identify;
9590d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9591d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9592d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9593d04e62b9SKevin Barnett 
9594d04e62b9SKevin Barnett 	return sas_rphy_add(rphy);
9595d04e62b9SKevin Barnett }
9596d04e62b9SKevin Barnett 
9597d04e62b9SKevin Barnett static struct hpsa_sas_port
9598d04e62b9SKevin Barnett 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9599d04e62b9SKevin Barnett 				u64 sas_address)
9600d04e62b9SKevin Barnett {
9601d04e62b9SKevin Barnett 	int rc;
9602d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9603d04e62b9SKevin Barnett 	struct sas_port *port;
9604d04e62b9SKevin Barnett 
9605d04e62b9SKevin Barnett 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9606d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9607d04e62b9SKevin Barnett 		return NULL;
9608d04e62b9SKevin Barnett 
9609d04e62b9SKevin Barnett 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9610d04e62b9SKevin Barnett 	hpsa_sas_port->parent_node = hpsa_sas_node;
9611d04e62b9SKevin Barnett 
9612d04e62b9SKevin Barnett 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9613d04e62b9SKevin Barnett 	if (!port)
9614d04e62b9SKevin Barnett 		goto free_hpsa_port;
9615d04e62b9SKevin Barnett 
9616d04e62b9SKevin Barnett 	rc = sas_port_add(port);
9617d04e62b9SKevin Barnett 	if (rc)
9618d04e62b9SKevin Barnett 		goto free_sas_port;
9619d04e62b9SKevin Barnett 
9620d04e62b9SKevin Barnett 	hpsa_sas_port->port = port;
9621d04e62b9SKevin Barnett 	hpsa_sas_port->sas_address = sas_address;
9622d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_port->port_list_entry,
9623d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head);
9624d04e62b9SKevin Barnett 
9625d04e62b9SKevin Barnett 	return hpsa_sas_port;
9626d04e62b9SKevin Barnett 
9627d04e62b9SKevin Barnett free_sas_port:
9628d04e62b9SKevin Barnett 	sas_port_free(port);
9629d04e62b9SKevin Barnett free_hpsa_port:
9630d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9631d04e62b9SKevin Barnett 
9632d04e62b9SKevin Barnett 	return NULL;
9633d04e62b9SKevin Barnett }
9634d04e62b9SKevin Barnett 
9635d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9636d04e62b9SKevin Barnett {
9637d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9638d04e62b9SKevin Barnett 	struct hpsa_sas_phy *next;
9639d04e62b9SKevin Barnett 
9640d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_phy, next,
9641d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9642d04e62b9SKevin Barnett 		hpsa_free_sas_phy(hpsa_sas_phy);
9643d04e62b9SKevin Barnett 
9644d04e62b9SKevin Barnett 	sas_port_delete(hpsa_sas_port->port);
9645d04e62b9SKevin Barnett 	list_del(&hpsa_sas_port->port_list_entry);
9646d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9647d04e62b9SKevin Barnett }
9648d04e62b9SKevin Barnett 
9649d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9650d04e62b9SKevin Barnett {
9651d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9652d04e62b9SKevin Barnett 
9653d04e62b9SKevin Barnett 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9654d04e62b9SKevin Barnett 	if (hpsa_sas_node) {
9655d04e62b9SKevin Barnett 		hpsa_sas_node->parent_dev = parent_dev;
9656d04e62b9SKevin Barnett 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9657d04e62b9SKevin Barnett 	}
9658d04e62b9SKevin Barnett 
9659d04e62b9SKevin Barnett 	return hpsa_sas_node;
9660d04e62b9SKevin Barnett }
9661d04e62b9SKevin Barnett 
9662d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9663d04e62b9SKevin Barnett {
9664d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9665d04e62b9SKevin Barnett 	struct hpsa_sas_port *next;
9666d04e62b9SKevin Barnett 
9667d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9668d04e62b9SKevin Barnett 		return;
9669d04e62b9SKevin Barnett 
9670d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_port, next,
9671d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head, port_list_entry)
9672d04e62b9SKevin Barnett 		hpsa_free_sas_port(hpsa_sas_port);
9673d04e62b9SKevin Barnett 
9674d04e62b9SKevin Barnett 	kfree(hpsa_sas_node);
9675d04e62b9SKevin Barnett }
9676d04e62b9SKevin Barnett 
9677d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
9678d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9679d04e62b9SKevin Barnett 					struct sas_rphy *rphy)
9680d04e62b9SKevin Barnett {
9681d04e62b9SKevin Barnett 	int i;
9682d04e62b9SKevin Barnett 	struct hpsa_scsi_dev_t *device;
9683d04e62b9SKevin Barnett 
9684d04e62b9SKevin Barnett 	for (i = 0; i < h->ndevices; i++) {
9685d04e62b9SKevin Barnett 		device = h->dev[i];
9686d04e62b9SKevin Barnett 		if (!device->sas_port)
9687d04e62b9SKevin Barnett 			continue;
9688d04e62b9SKevin Barnett 		if (device->sas_port->rphy == rphy)
9689d04e62b9SKevin Barnett 			return device;
9690d04e62b9SKevin Barnett 	}
9691d04e62b9SKevin Barnett 
9692d04e62b9SKevin Barnett 	return NULL;
9693d04e62b9SKevin Barnett }
9694d04e62b9SKevin Barnett 
9695d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h)
9696d04e62b9SKevin Barnett {
9697d04e62b9SKevin Barnett 	int rc;
9698d04e62b9SKevin Barnett 	struct device *parent_dev;
9699d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9700d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9701d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9702d04e62b9SKevin Barnett 
97030a7c3bb8SDon Brace 	parent_dev = &h->scsi_host->shost_dev;
9704d04e62b9SKevin Barnett 
9705d04e62b9SKevin Barnett 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9706d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9707d04e62b9SKevin Barnett 		return -ENOMEM;
9708d04e62b9SKevin Barnett 
9709d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9710d04e62b9SKevin Barnett 	if (!hpsa_sas_port) {
9711d04e62b9SKevin Barnett 		rc = -ENODEV;
9712d04e62b9SKevin Barnett 		goto free_sas_node;
9713d04e62b9SKevin Barnett 	}
9714d04e62b9SKevin Barnett 
9715d04e62b9SKevin Barnett 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9716d04e62b9SKevin Barnett 	if (!hpsa_sas_phy) {
9717d04e62b9SKevin Barnett 		rc = -ENODEV;
9718d04e62b9SKevin Barnett 		goto free_sas_port;
9719d04e62b9SKevin Barnett 	}
9720d04e62b9SKevin Barnett 
9721d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9722d04e62b9SKevin Barnett 	if (rc)
9723d04e62b9SKevin Barnett 		goto free_sas_phy;
9724d04e62b9SKevin Barnett 
9725d04e62b9SKevin Barnett 	h->sas_host = hpsa_sas_node;
9726d04e62b9SKevin Barnett 
9727d04e62b9SKevin Barnett 	return 0;
9728d04e62b9SKevin Barnett 
9729d04e62b9SKevin Barnett free_sas_phy:
9730d04e62b9SKevin Barnett 	hpsa_free_sas_phy(hpsa_sas_phy);
9731d04e62b9SKevin Barnett free_sas_port:
9732d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9733d04e62b9SKevin Barnett free_sas_node:
9734d04e62b9SKevin Barnett 	hpsa_free_sas_node(hpsa_sas_node);
9735d04e62b9SKevin Barnett 
9736d04e62b9SKevin Barnett 	return rc;
9737d04e62b9SKevin Barnett }
9738d04e62b9SKevin Barnett 
9739d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h)
9740d04e62b9SKevin Barnett {
9741d04e62b9SKevin Barnett 	hpsa_free_sas_node(h->sas_host);
9742d04e62b9SKevin Barnett }
9743d04e62b9SKevin Barnett 
9744d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9745d04e62b9SKevin Barnett 				struct hpsa_scsi_dev_t *device)
9746d04e62b9SKevin Barnett {
9747d04e62b9SKevin Barnett 	int rc;
9748d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9749d04e62b9SKevin Barnett 	struct sas_rphy *rphy;
9750d04e62b9SKevin Barnett 
9751d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9752d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9753d04e62b9SKevin Barnett 		return -ENOMEM;
9754d04e62b9SKevin Barnett 
9755d04e62b9SKevin Barnett 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9756d04e62b9SKevin Barnett 	if (!rphy) {
9757d04e62b9SKevin Barnett 		rc = -ENODEV;
9758d04e62b9SKevin Barnett 		goto free_sas_port;
9759d04e62b9SKevin Barnett 	}
9760d04e62b9SKevin Barnett 
9761d04e62b9SKevin Barnett 	hpsa_sas_port->rphy = rphy;
9762d04e62b9SKevin Barnett 	device->sas_port = hpsa_sas_port;
9763d04e62b9SKevin Barnett 
9764d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9765d04e62b9SKevin Barnett 	if (rc)
9766d04e62b9SKevin Barnett 		goto free_sas_port;
9767d04e62b9SKevin Barnett 
9768d04e62b9SKevin Barnett 	return 0;
9769d04e62b9SKevin Barnett 
9770d04e62b9SKevin Barnett free_sas_port:
9771d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9772d04e62b9SKevin Barnett 	device->sas_port = NULL;
9773d04e62b9SKevin Barnett 
9774d04e62b9SKevin Barnett 	return rc;
9775d04e62b9SKevin Barnett }
9776d04e62b9SKevin Barnett 
9777d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9778d04e62b9SKevin Barnett {
9779d04e62b9SKevin Barnett 	if (device->sas_port) {
9780d04e62b9SKevin Barnett 		hpsa_free_sas_port(device->sas_port);
9781d04e62b9SKevin Barnett 		device->sas_port = NULL;
9782d04e62b9SKevin Barnett 	}
9783d04e62b9SKevin Barnett }
9784d04e62b9SKevin Barnett 
9785d04e62b9SKevin Barnett static int
9786d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy)
9787d04e62b9SKevin Barnett {
9788d04e62b9SKevin Barnett 	return 0;
9789d04e62b9SKevin Barnett }
9790d04e62b9SKevin Barnett 
9791d04e62b9SKevin Barnett static int
9792d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9793d04e62b9SKevin Barnett {
979401d0e789SDon Brace 	struct Scsi_Host *shost = phy_to_shost(rphy);
979501d0e789SDon Brace 	struct ctlr_info *h;
979601d0e789SDon Brace 	struct hpsa_scsi_dev_t *sd;
979701d0e789SDon Brace 
979801d0e789SDon Brace 	if (!shost)
979901d0e789SDon Brace 		return -ENXIO;
980001d0e789SDon Brace 
980101d0e789SDon Brace 	h = shost_to_hba(shost);
980201d0e789SDon Brace 
980301d0e789SDon Brace 	if (!h)
980401d0e789SDon Brace 		return -ENXIO;
980501d0e789SDon Brace 
980601d0e789SDon Brace 	sd = hpsa_find_device_by_sas_rphy(h, rphy);
980701d0e789SDon Brace 	if (!sd)
980801d0e789SDon Brace 		return -ENXIO;
980901d0e789SDon Brace 
981001d0e789SDon Brace 	*identifier = sd->eli;
981101d0e789SDon Brace 
9812d04e62b9SKevin Barnett 	return 0;
9813d04e62b9SKevin Barnett }
9814d04e62b9SKevin Barnett 
9815d04e62b9SKevin Barnett static int
9816d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9817d04e62b9SKevin Barnett {
9818d04e62b9SKevin Barnett 	return -ENXIO;
9819d04e62b9SKevin Barnett }
9820d04e62b9SKevin Barnett 
9821d04e62b9SKevin Barnett static int
9822d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9823d04e62b9SKevin Barnett {
9824d04e62b9SKevin Barnett 	return 0;
9825d04e62b9SKevin Barnett }
9826d04e62b9SKevin Barnett 
9827d04e62b9SKevin Barnett static int
9828d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9829d04e62b9SKevin Barnett {
9830d04e62b9SKevin Barnett 	return 0;
9831d04e62b9SKevin Barnett }
9832d04e62b9SKevin Barnett 
9833d04e62b9SKevin Barnett static int
9834d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy)
9835d04e62b9SKevin Barnett {
9836d04e62b9SKevin Barnett 	return 0;
9837d04e62b9SKevin Barnett }
9838d04e62b9SKevin Barnett 
9839d04e62b9SKevin Barnett static void
9840d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy)
9841d04e62b9SKevin Barnett {
9842d04e62b9SKevin Barnett }
9843d04e62b9SKevin Barnett 
9844d04e62b9SKevin Barnett static int
9845d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9846d04e62b9SKevin Barnett {
9847d04e62b9SKevin Barnett 	return -EINVAL;
9848d04e62b9SKevin Barnett }
9849d04e62b9SKevin Barnett 
9850d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = {
9851d04e62b9SKevin Barnett 	.get_linkerrors = hpsa_sas_get_linkerrors,
9852d04e62b9SKevin Barnett 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9853d04e62b9SKevin Barnett 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9854d04e62b9SKevin Barnett 	.phy_reset = hpsa_sas_phy_reset,
9855d04e62b9SKevin Barnett 	.phy_enable = hpsa_sas_phy_enable,
9856d04e62b9SKevin Barnett 	.phy_setup = hpsa_sas_phy_setup,
9857d04e62b9SKevin Barnett 	.phy_release = hpsa_sas_phy_release,
9858d04e62b9SKevin Barnett 	.set_phy_speed = hpsa_sas_phy_speed,
9859d04e62b9SKevin Barnett };
9860d04e62b9SKevin Barnett 
9861edd16368SStephen M. Cameron /*
9862edd16368SStephen M. Cameron  *  This is it.  Register the PCI driver information for the cards we control
9863edd16368SStephen M. Cameron  *  the OS will call our registered routines when it finds one of our cards.
9864edd16368SStephen M. Cameron  */
9865edd16368SStephen M. Cameron static int __init hpsa_init(void)
9866edd16368SStephen M. Cameron {
9867d04e62b9SKevin Barnett 	int rc;
9868d04e62b9SKevin Barnett 
9869d04e62b9SKevin Barnett 	hpsa_sas_transport_template =
9870d04e62b9SKevin Barnett 		sas_attach_transport(&hpsa_sas_transport_functions);
9871d04e62b9SKevin Barnett 	if (!hpsa_sas_transport_template)
9872d04e62b9SKevin Barnett 		return -ENODEV;
9873d04e62b9SKevin Barnett 
9874d04e62b9SKevin Barnett 	rc = pci_register_driver(&hpsa_pci_driver);
9875d04e62b9SKevin Barnett 
9876d04e62b9SKevin Barnett 	if (rc)
9877d04e62b9SKevin Barnett 		sas_release_transport(hpsa_sas_transport_template);
9878d04e62b9SKevin Barnett 
9879d04e62b9SKevin Barnett 	return rc;
9880edd16368SStephen M. Cameron }
9881edd16368SStephen M. Cameron 
9882edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void)
9883edd16368SStephen M. Cameron {
9884edd16368SStephen M. Cameron 	pci_unregister_driver(&hpsa_pci_driver);
9885d04e62b9SKevin Barnett 	sas_release_transport(hpsa_sas_transport_template);
9886edd16368SStephen M. Cameron }
9887edd16368SStephen M. Cameron 
9888e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void)
9889e1f7de0cSMatt Gates {
9890e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \
9891dd0e19f3SScott Teel 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9892dd0e19f3SScott Teel 
9893dd0e19f3SScott Teel 	VERIFY_OFFSET(structure_size, 0);
9894dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_size, 4);
9895dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_cnt, 8);
9896dd0e19f3SScott Teel 	VERIFY_OFFSET(phys_blk_shift, 16);
9897dd0e19f3SScott Teel 	VERIFY_OFFSET(parity_rotation_shift, 17);
9898dd0e19f3SScott Teel 	VERIFY_OFFSET(strip_size, 18);
9899dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_starting_blk, 20);
9900dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_blk_cnt, 28);
9901dd0e19f3SScott Teel 	VERIFY_OFFSET(data_disks_per_row, 36);
9902dd0e19f3SScott Teel 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9903dd0e19f3SScott Teel 	VERIFY_OFFSET(row_cnt, 40);
9904dd0e19f3SScott Teel 	VERIFY_OFFSET(layout_map_count, 42);
9905dd0e19f3SScott Teel 	VERIFY_OFFSET(flags, 44);
9906dd0e19f3SScott Teel 	VERIFY_OFFSET(dekindex, 46);
9907dd0e19f3SScott Teel 	/* VERIFY_OFFSET(reserved, 48 */
9908dd0e19f3SScott Teel 	VERIFY_OFFSET(data, 64);
9909dd0e19f3SScott Teel 
9910dd0e19f3SScott Teel #undef VERIFY_OFFSET
9911dd0e19f3SScott Teel 
9912dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \
9913b66cc250SMike Miller 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9914b66cc250SMike Miller 
9915b66cc250SMike Miller 	VERIFY_OFFSET(IU_type, 0);
9916b66cc250SMike Miller 	VERIFY_OFFSET(direction, 1);
9917b66cc250SMike Miller 	VERIFY_OFFSET(reply_queue, 2);
9918b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved1, 3);  */
9919b66cc250SMike Miller 	VERIFY_OFFSET(scsi_nexus, 4);
9920b66cc250SMike Miller 	VERIFY_OFFSET(Tag, 8);
9921b66cc250SMike Miller 	VERIFY_OFFSET(cdb, 16);
9922b66cc250SMike Miller 	VERIFY_OFFSET(cciss_lun, 32);
9923b66cc250SMike Miller 	VERIFY_OFFSET(data_len, 40);
9924b66cc250SMike Miller 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9925b66cc250SMike Miller 	VERIFY_OFFSET(sg_count, 45);
9926b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved3 */
9927b66cc250SMike Miller 	VERIFY_OFFSET(err_ptr, 48);
9928b66cc250SMike Miller 	VERIFY_OFFSET(err_len, 56);
9929b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved4  */
9930b66cc250SMike Miller 	VERIFY_OFFSET(sg, 64);
9931b66cc250SMike Miller 
9932b66cc250SMike Miller #undef VERIFY_OFFSET
9933b66cc250SMike Miller 
9934b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \
9935e1f7de0cSMatt Gates 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9936e1f7de0cSMatt Gates 
9937e1f7de0cSMatt Gates 	VERIFY_OFFSET(dev_handle, 0x00);
9938e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved1, 0x02);
9939e1f7de0cSMatt Gates 	VERIFY_OFFSET(function, 0x03);
9940e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved2, 0x04);
9941e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info, 0x0C);
9942e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved3, 0x10);
9943e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info_len, 0x12);
9944e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved4, 0x13);
9945e1f7de0cSMatt Gates 	VERIFY_OFFSET(sgl_offset, 0x14);
9946e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved5, 0x15);
9947e1f7de0cSMatt Gates 	VERIFY_OFFSET(transfer_len, 0x1C);
9948e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved6, 0x20);
9949e1f7de0cSMatt Gates 	VERIFY_OFFSET(io_flags, 0x24);
9950e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved7, 0x26);
9951e1f7de0cSMatt Gates 	VERIFY_OFFSET(LUN, 0x34);
9952e1f7de0cSMatt Gates 	VERIFY_OFFSET(control, 0x3C);
9953e1f7de0cSMatt Gates 	VERIFY_OFFSET(CDB, 0x40);
9954e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved8, 0x50);
9955e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_context_flags, 0x60);
9956e1f7de0cSMatt Gates 	VERIFY_OFFSET(timeout_sec, 0x62);
9957e1f7de0cSMatt Gates 	VERIFY_OFFSET(ReplyQueue, 0x64);
9958e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved9, 0x65);
995950a0decfSStephen M. Cameron 	VERIFY_OFFSET(tag, 0x68);
9960e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_addr, 0x70);
9961e1f7de0cSMatt Gates 	VERIFY_OFFSET(CISS_LUN, 0x78);
9962e1f7de0cSMatt Gates 	VERIFY_OFFSET(SG, 0x78 + 8);
9963e1f7de0cSMatt Gates #undef VERIFY_OFFSET
9964e1f7de0cSMatt Gates }
9965e1f7de0cSMatt Gates 
9966edd16368SStephen M. Cameron module_init(hpsa_init);
9967edd16368SStephen M. Cameron module_exit(hpsa_cleanup);
9968