1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2806f039790SGreg Kroah-Hartman int wait_for_ready); 28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 284fe5389c8SStephen M. Cameron #define BOARD_READY 1 28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 288c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 295d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 29634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 297ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 298ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 299ba74fdc4SDon Brace unsigned char *scsi3addr); 300edd16368SStephen M. Cameron 301edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 302edd16368SStephen M. Cameron { 303edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 304edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 305edd16368SStephen M. Cameron } 306edd16368SStephen M. Cameron 307a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 308a23513e8SStephen M. Cameron { 309a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 310a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 311a23513e8SStephen M. Cameron } 312a23513e8SStephen M. Cameron 313a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 314a58e7e53SWebb Scales { 315a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 316a58e7e53SWebb Scales } 317a58e7e53SWebb Scales 318d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 319d604f533SWebb Scales { 320d604f533SWebb Scales return c->abort_pending || c->reset_pending; 321d604f533SWebb Scales } 322d604f533SWebb Scales 3239437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3249437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3259437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3269437ac43SStephen Cameron { 3279437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3289437ac43SStephen Cameron bool rc; 3299437ac43SStephen Cameron 3309437ac43SStephen Cameron *sense_key = -1; 3319437ac43SStephen Cameron *asc = -1; 3329437ac43SStephen Cameron *ascq = -1; 3339437ac43SStephen Cameron 3349437ac43SStephen Cameron if (sense_data_len < 1) 3359437ac43SStephen Cameron return; 3369437ac43SStephen Cameron 3379437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3389437ac43SStephen Cameron if (rc) { 3399437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3409437ac43SStephen Cameron *asc = sshdr.asc; 3419437ac43SStephen Cameron *ascq = sshdr.ascq; 3429437ac43SStephen Cameron } 3439437ac43SStephen Cameron } 3449437ac43SStephen Cameron 345edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 346edd16368SStephen M. Cameron struct CommandList *c) 347edd16368SStephen M. Cameron { 3489437ac43SStephen Cameron u8 sense_key, asc, ascq; 3499437ac43SStephen Cameron int sense_len; 3509437ac43SStephen Cameron 3519437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3529437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3539437ac43SStephen Cameron else 3549437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3559437ac43SStephen Cameron 3569437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3579437ac43SStephen Cameron &sense_key, &asc, &ascq); 35881c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 359edd16368SStephen M. Cameron return 0; 360edd16368SStephen M. Cameron 3619437ac43SStephen Cameron switch (asc) { 362edd16368SStephen M. Cameron case STATE_CHANGED: 3639437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3642946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3652946e82bSRobert Elliott h->devname); 366edd16368SStephen M. Cameron break; 367edd16368SStephen M. Cameron case LUN_FAILED: 3687f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 370edd16368SStephen M. Cameron break; 371edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3727f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3732946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 374edd16368SStephen M. Cameron /* 3754f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3764f4eb9f1SScott Teel * target (array) devices. 377edd16368SStephen M. Cameron */ 378edd16368SStephen M. Cameron break; 379edd16368SStephen M. Cameron case POWER_OR_RESET: 3802946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3812946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3822946e82bSRobert Elliott h->devname); 383edd16368SStephen M. Cameron break; 384edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3852946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3862946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3872946e82bSRobert Elliott h->devname); 388edd16368SStephen M. Cameron break; 389edd16368SStephen M. Cameron default: 3902946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3912946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3922946e82bSRobert Elliott h->devname); 393edd16368SStephen M. Cameron break; 394edd16368SStephen M. Cameron } 395edd16368SStephen M. Cameron return 1; 396edd16368SStephen M. Cameron } 397edd16368SStephen M. Cameron 398852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 399852af20aSMatt Bondurant { 400852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 401852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 402852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 403852af20aSMatt Bondurant return 0; 404852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 405852af20aSMatt Bondurant return 1; 406852af20aSMatt Bondurant } 407852af20aSMatt Bondurant 408e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 409e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 410e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 411e985c58fSStephen Cameron { 412e985c58fSStephen Cameron int ld; 413e985c58fSStephen Cameron struct ctlr_info *h; 414e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 415e985c58fSStephen Cameron 416e985c58fSStephen Cameron h = shost_to_hba(shost); 417e985c58fSStephen Cameron ld = lockup_detected(h); 418e985c58fSStephen Cameron 419e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 420e985c58fSStephen Cameron } 421e985c58fSStephen Cameron 422da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 423da0697bdSScott Teel struct device_attribute *attr, 424da0697bdSScott Teel const char *buf, size_t count) 425da0697bdSScott Teel { 426da0697bdSScott Teel int status, len; 427da0697bdSScott Teel struct ctlr_info *h; 428da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 429da0697bdSScott Teel char tmpbuf[10]; 430da0697bdSScott Teel 431da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 432da0697bdSScott Teel return -EACCES; 433da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 434da0697bdSScott Teel strncpy(tmpbuf, buf, len); 435da0697bdSScott Teel tmpbuf[len] = '\0'; 436da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 437da0697bdSScott Teel return -EINVAL; 438da0697bdSScott Teel h = shost_to_hba(shost); 439da0697bdSScott Teel h->acciopath_status = !!status; 440da0697bdSScott Teel dev_warn(&h->pdev->dev, 441da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 442da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 443da0697bdSScott Teel return count; 444da0697bdSScott Teel } 445da0697bdSScott Teel 4462ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4472ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4482ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4492ba8bfc8SStephen M. Cameron { 4502ba8bfc8SStephen M. Cameron int debug_level, len; 4512ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4522ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4532ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4542ba8bfc8SStephen M. Cameron 4552ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4562ba8bfc8SStephen M. Cameron return -EACCES; 4572ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4582ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4592ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4602ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4612ba8bfc8SStephen M. Cameron return -EINVAL; 4622ba8bfc8SStephen M. Cameron if (debug_level < 0) 4632ba8bfc8SStephen M. Cameron debug_level = 0; 4642ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4652ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4662ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4672ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4682ba8bfc8SStephen M. Cameron return count; 4692ba8bfc8SStephen M. Cameron } 4702ba8bfc8SStephen M. Cameron 471edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 472edd16368SStephen M. Cameron struct device_attribute *attr, 473edd16368SStephen M. Cameron const char *buf, size_t count) 474edd16368SStephen M. Cameron { 475edd16368SStephen M. Cameron struct ctlr_info *h; 476edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 477a23513e8SStephen M. Cameron h = shost_to_hba(shost); 47831468401SMike Miller hpsa_scan_start(h->scsi_host); 479edd16368SStephen M. Cameron return count; 480edd16368SStephen M. Cameron } 481edd16368SStephen M. Cameron 482d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 483d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 484d28ce020SStephen M. Cameron { 485d28ce020SStephen M. Cameron struct ctlr_info *h; 486d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 487d28ce020SStephen M. Cameron unsigned char *fwrev; 488d28ce020SStephen M. Cameron 489d28ce020SStephen M. Cameron h = shost_to_hba(shost); 490d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 491d28ce020SStephen M. Cameron return 0; 492d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 493d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 494d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 495d28ce020SStephen M. Cameron } 496d28ce020SStephen M. Cameron 49794a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 49894a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 49994a13649SStephen M. Cameron { 50094a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50194a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50294a13649SStephen M. Cameron 5030cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5040cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 50594a13649SStephen M. Cameron } 50694a13649SStephen M. Cameron 507745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 508745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 509745a7a25SStephen M. Cameron { 510745a7a25SStephen M. Cameron struct ctlr_info *h; 511745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 512745a7a25SStephen M. Cameron 513745a7a25SStephen M. Cameron h = shost_to_hba(shost); 514745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 515960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 516745a7a25SStephen M. Cameron "performant" : "simple"); 517745a7a25SStephen M. Cameron } 518745a7a25SStephen M. Cameron 519da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 520da0697bdSScott Teel struct device_attribute *attr, char *buf) 521da0697bdSScott Teel { 522da0697bdSScott Teel struct ctlr_info *h; 523da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 524da0697bdSScott Teel 525da0697bdSScott Teel h = shost_to_hba(shost); 526da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 527da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 528da0697bdSScott Teel } 529da0697bdSScott Teel 53046380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 531941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 532941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 533941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 534941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 535941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 536941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 537941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 538941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 539941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 540941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 541941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 542941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 543941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5447af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 545941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 546941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5475a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5485a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5495a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5505a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5515a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5525a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 553941b1cdaSStephen M. Cameron }; 554941b1cdaSStephen M. Cameron 55546380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 55646380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5577af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5585a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5595a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5605a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5615a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5625a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5635a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56446380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 56546380786SStephen M. Cameron * which share a battery backed cache module. One controls the 56646380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56746380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 56846380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 56946380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57046380786SStephen M. Cameron */ 57146380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57246380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57346380786SStephen M. Cameron }; 57446380786SStephen M. Cameron 5759b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5769b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5779b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5789b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5799b5c48c2SStephen Cameron }; 5809b5c48c2SStephen Cameron 5819b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 582941b1cdaSStephen M. Cameron { 583941b1cdaSStephen M. Cameron int i; 584941b1cdaSStephen M. Cameron 5859b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5869b5c48c2SStephen Cameron if (a[i] == board_id) 587941b1cdaSStephen M. Cameron return 1; 5889b5c48c2SStephen Cameron return 0; 5899b5c48c2SStephen Cameron } 5909b5c48c2SStephen Cameron 5919b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5929b5c48c2SStephen Cameron { 5939b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5949b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 595941b1cdaSStephen M. Cameron } 596941b1cdaSStephen M. Cameron 59746380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 59846380786SStephen M. Cameron { 5999b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6009b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60146380786SStephen M. Cameron } 60246380786SStephen M. Cameron 60346380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60446380786SStephen M. Cameron { 60546380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60646380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60746380786SStephen M. Cameron } 60846380786SStephen M. Cameron 6099b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6109b5c48c2SStephen Cameron { 6119b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6129b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6139b5c48c2SStephen Cameron } 6149b5c48c2SStephen Cameron 615941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 616941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 617941b1cdaSStephen M. Cameron { 618941b1cdaSStephen M. Cameron struct ctlr_info *h; 619941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 620941b1cdaSStephen M. Cameron 621941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62246380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 623941b1cdaSStephen M. Cameron } 624941b1cdaSStephen M. Cameron 625edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 626edd16368SStephen M. Cameron { 627edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 628edd16368SStephen M. Cameron } 629edd16368SStephen M. Cameron 630f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6317c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 632edd16368SStephen M. Cameron }; 6336b80b18fSScott Teel #define HPSA_RAID_0 0 6346b80b18fSScott Teel #define HPSA_RAID_4 1 6356b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6366b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6376b80b18fSScott Teel #define HPSA_RAID_51 4 6386b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6396b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6407c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6417c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 642edd16368SStephen M. Cameron 643f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 644f3f01730SKevin Barnett { 645f3f01730SKevin Barnett return !device->physical_device; 646f3f01730SKevin Barnett } 647edd16368SStephen M. Cameron 648edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 649edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 650edd16368SStephen M. Cameron { 651edd16368SStephen M. Cameron ssize_t l = 0; 65282a72c0aSStephen M. Cameron unsigned char rlevel; 653edd16368SStephen M. Cameron struct ctlr_info *h; 654edd16368SStephen M. Cameron struct scsi_device *sdev; 655edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 656edd16368SStephen M. Cameron unsigned long flags; 657edd16368SStephen M. Cameron 658edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 659edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 660edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 661edd16368SStephen M. Cameron hdev = sdev->hostdata; 662edd16368SStephen M. Cameron if (!hdev) { 663edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 664edd16368SStephen M. Cameron return -ENODEV; 665edd16368SStephen M. Cameron } 666edd16368SStephen M. Cameron 667edd16368SStephen M. Cameron /* Is this even a logical drive? */ 668f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 669edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 670edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 671edd16368SStephen M. Cameron return l; 672edd16368SStephen M. Cameron } 673edd16368SStephen M. Cameron 674edd16368SStephen M. Cameron rlevel = hdev->raid_level; 675edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67682a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 677edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 678edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 679edd16368SStephen M. Cameron return l; 680edd16368SStephen M. Cameron } 681edd16368SStephen M. Cameron 682edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 683edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 684edd16368SStephen M. Cameron { 685edd16368SStephen M. Cameron struct ctlr_info *h; 686edd16368SStephen M. Cameron struct scsi_device *sdev; 687edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 688edd16368SStephen M. Cameron unsigned long flags; 689edd16368SStephen M. Cameron unsigned char lunid[8]; 690edd16368SStephen M. Cameron 691edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 692edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 693edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 694edd16368SStephen M. Cameron hdev = sdev->hostdata; 695edd16368SStephen M. Cameron if (!hdev) { 696edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 697edd16368SStephen M. Cameron return -ENODEV; 698edd16368SStephen M. Cameron } 699edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 700edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 701edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 702edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 703edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 704edd16368SStephen M. Cameron } 705edd16368SStephen M. Cameron 706edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 707edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 708edd16368SStephen M. Cameron { 709edd16368SStephen M. Cameron struct ctlr_info *h; 710edd16368SStephen M. Cameron struct scsi_device *sdev; 711edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 712edd16368SStephen M. Cameron unsigned long flags; 713edd16368SStephen M. Cameron unsigned char sn[16]; 714edd16368SStephen M. Cameron 715edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 716edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 717edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 718edd16368SStephen M. Cameron hdev = sdev->hostdata; 719edd16368SStephen M. Cameron if (!hdev) { 720edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 721edd16368SStephen M. Cameron return -ENODEV; 722edd16368SStephen M. Cameron } 723edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 724edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 725edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 726edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 727edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 728edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 729edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 730edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 731edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 732edd16368SStephen M. Cameron } 733edd16368SStephen M. Cameron 734ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 735ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 736ded1be4aSJoseph T Handzik { 737ded1be4aSJoseph T Handzik struct ctlr_info *h; 738ded1be4aSJoseph T Handzik struct scsi_device *sdev; 739ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 740ded1be4aSJoseph T Handzik unsigned long flags; 741ded1be4aSJoseph T Handzik u64 sas_address; 742ded1be4aSJoseph T Handzik 743ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 744ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 745ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 746ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 747ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 748ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 749ded1be4aSJoseph T Handzik return -ENODEV; 750ded1be4aSJoseph T Handzik } 751ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 752ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 753ded1be4aSJoseph T Handzik 754ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 755ded1be4aSJoseph T Handzik } 756ded1be4aSJoseph T Handzik 757c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 758c1988684SScott Teel struct device_attribute *attr, char *buf) 759c1988684SScott Teel { 760c1988684SScott Teel struct ctlr_info *h; 761c1988684SScott Teel struct scsi_device *sdev; 762c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 763c1988684SScott Teel unsigned long flags; 764c1988684SScott Teel int offload_enabled; 765c1988684SScott Teel 766c1988684SScott Teel sdev = to_scsi_device(dev); 767c1988684SScott Teel h = sdev_to_hba(sdev); 768c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 769c1988684SScott Teel hdev = sdev->hostdata; 770c1988684SScott Teel if (!hdev) { 771c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 772c1988684SScott Teel return -ENODEV; 773c1988684SScott Teel } 774c1988684SScott Teel offload_enabled = hdev->offload_enabled; 775c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 776c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 777c1988684SScott Teel } 778c1988684SScott Teel 7798270b862SJoe Handzik #define MAX_PATHS 8 7808270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7818270b862SJoe Handzik struct device_attribute *attr, char *buf) 7828270b862SJoe Handzik { 7838270b862SJoe Handzik struct ctlr_info *h; 7848270b862SJoe Handzik struct scsi_device *sdev; 7858270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7868270b862SJoe Handzik unsigned long flags; 7878270b862SJoe Handzik int i; 7888270b862SJoe Handzik int output_len = 0; 7898270b862SJoe Handzik u8 box; 7908270b862SJoe Handzik u8 bay; 7918270b862SJoe Handzik u8 path_map_index = 0; 7928270b862SJoe Handzik char *active; 7938270b862SJoe Handzik unsigned char phys_connector[2]; 7948270b862SJoe Handzik 7958270b862SJoe Handzik sdev = to_scsi_device(dev); 7968270b862SJoe Handzik h = sdev_to_hba(sdev); 7978270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7988270b862SJoe Handzik hdev = sdev->hostdata; 7998270b862SJoe Handzik if (!hdev) { 8008270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8018270b862SJoe Handzik return -ENODEV; 8028270b862SJoe Handzik } 8038270b862SJoe Handzik 8048270b862SJoe Handzik bay = hdev->bay; 8058270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8068270b862SJoe Handzik path_map_index = 1<<i; 8078270b862SJoe Handzik if (i == hdev->active_path_index) 8088270b862SJoe Handzik active = "Active"; 8098270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8108270b862SJoe Handzik active = "Inactive"; 8118270b862SJoe Handzik else 8128270b862SJoe Handzik continue; 8138270b862SJoe Handzik 8141faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8151faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8161faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8178270b862SJoe Handzik h->scsi_host->host_no, 8188270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8198270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8208270b862SJoe Handzik 821cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8222708f295SDon Brace output_len += scnprintf(buf + output_len, 8231faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8241faf072cSRasmus Villemoes "%s\n", active); 8258270b862SJoe Handzik continue; 8268270b862SJoe Handzik } 8278270b862SJoe Handzik 8288270b862SJoe Handzik box = hdev->box[i]; 8298270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8308270b862SJoe Handzik sizeof(phys_connector)); 8318270b862SJoe Handzik if (phys_connector[0] < '0') 8328270b862SJoe Handzik phys_connector[0] = '0'; 8338270b862SJoe Handzik if (phys_connector[1] < '0') 8348270b862SJoe Handzik phys_connector[1] = '0'; 8352708f295SDon Brace output_len += scnprintf(buf + output_len, 8361faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8378270b862SJoe Handzik "PORT: %.2s ", 8388270b862SJoe Handzik phys_connector); 839af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 840af15ed36SDon Brace hdev->expose_device) { 8418270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8422708f295SDon Brace output_len += scnprintf(buf + output_len, 8431faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8448270b862SJoe Handzik "BAY: %hhu %s\n", 8458270b862SJoe Handzik bay, active); 8468270b862SJoe Handzik } else { 8472708f295SDon Brace output_len += scnprintf(buf + output_len, 8481faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8498270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8508270b862SJoe Handzik box, bay, active); 8518270b862SJoe Handzik } 8528270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8532708f295SDon Brace output_len += scnprintf(buf + output_len, 8541faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8558270b862SJoe Handzik box, active); 8568270b862SJoe Handzik } else 8572708f295SDon Brace output_len += scnprintf(buf + output_len, 8581faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8598270b862SJoe Handzik } 8608270b862SJoe Handzik 8618270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8621faf072cSRasmus Villemoes return output_len; 8638270b862SJoe Handzik } 8648270b862SJoe Handzik 8653f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8663f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8673f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8683f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 869ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 870c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 871c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8728270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 873da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 874da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 875da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8762ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8772ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8783f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8793f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8813f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8833f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 884941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 885941b1cdaSStephen M. Cameron host_show_resettable, NULL); 886e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 887e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8883f5eac3aSStephen M. Cameron 8893f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8903f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8913f5eac3aSStephen M. Cameron &dev_attr_lunid, 8923f5eac3aSStephen M. Cameron &dev_attr_unique_id, 893c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8948270b862SJoe Handzik &dev_attr_path_info, 895ded1be4aSJoseph T Handzik &dev_attr_sas_address, 8963f5eac3aSStephen M. Cameron NULL, 8973f5eac3aSStephen M. Cameron }; 8983f5eac3aSStephen M. Cameron 8993f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9003f5eac3aSStephen M. Cameron &dev_attr_rescan, 9013f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9023f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9033f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 904941b1cdaSStephen M. Cameron &dev_attr_resettable, 905da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9062ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 907fb53c439STomas Henzl &dev_attr_lockup_detected, 9083f5eac3aSStephen M. Cameron NULL, 9093f5eac3aSStephen M. Cameron }; 9103f5eac3aSStephen M. Cameron 91141ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 91241ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 91341ce4c35SStephen Cameron 9143f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9153f5eac3aSStephen M. Cameron .module = THIS_MODULE, 916f79cfec6SStephen M. Cameron .name = HPSA, 917f79cfec6SStephen M. Cameron .proc_name = HPSA, 9183f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9193f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9203f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9217c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9223f5eac3aSStephen M. Cameron .this_id = -1, 9233f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 92475167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9253f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9263f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9273f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 92841ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9293f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9303f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9313f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9323f5eac3aSStephen M. Cameron #endif 9333f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9343f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 935c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 93654b2b50cSMartin K. Petersen .no_write_same = 1, 9373f5eac3aSStephen M. Cameron }; 9383f5eac3aSStephen M. Cameron 939254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9403f5eac3aSStephen M. Cameron { 9413f5eac3aSStephen M. Cameron u32 a; 942072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9433f5eac3aSStephen M. Cameron 944e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 945e1f7de0cSMatt Gates return h->access.command_completed(h, q); 946e1f7de0cSMatt Gates 9473f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 948254f796bSMatt Gates return h->access.command_completed(h, q); 9493f5eac3aSStephen M. Cameron 950254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 951254f796bSMatt Gates a = rq->head[rq->current_entry]; 952254f796bSMatt Gates rq->current_entry++; 9530cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9543f5eac3aSStephen M. Cameron } else { 9553f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9563f5eac3aSStephen M. Cameron } 9573f5eac3aSStephen M. Cameron /* Check for wraparound */ 958254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 959254f796bSMatt Gates rq->current_entry = 0; 960254f796bSMatt Gates rq->wraparound ^= 1; 9613f5eac3aSStephen M. Cameron } 9623f5eac3aSStephen M. Cameron return a; 9633f5eac3aSStephen M. Cameron } 9643f5eac3aSStephen M. Cameron 965c349775eSScott Teel /* 966c349775eSScott Teel * There are some special bits in the bus address of the 967c349775eSScott Teel * command that we have to set for the controller to know 968c349775eSScott Teel * how to process the command: 969c349775eSScott Teel * 970c349775eSScott Teel * Normal performant mode: 971c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 972c349775eSScott Teel * bits 1-3 = block fetch table entry 973c349775eSScott Teel * bits 4-6 = command type (== 0) 974c349775eSScott Teel * 975c349775eSScott Teel * ioaccel1 mode: 976c349775eSScott Teel * bit 0 = "performant mode" bit. 977c349775eSScott Teel * bits 1-3 = block fetch table entry 978c349775eSScott Teel * bits 4-6 = command type (== 110) 979c349775eSScott Teel * (command type is needed because ioaccel1 mode 980c349775eSScott Teel * commands are submitted through the same register as normal 981c349775eSScott Teel * mode commands, so this is how the controller knows whether 982c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 983c349775eSScott Teel * 984c349775eSScott Teel * ioaccel2 mode: 985c349775eSScott Teel * bit 0 = "performant mode" bit. 986c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 987c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 988c349775eSScott Teel * a separate special register for submitting commands. 989c349775eSScott Teel */ 990c349775eSScott Teel 99125163bd5SWebb Scales /* 99225163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9933f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9943f5eac3aSStephen M. Cameron * register number 9953f5eac3aSStephen M. Cameron */ 99625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 99725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 99825163bd5SWebb Scales int reply_queue) 9993f5eac3aSStephen M. Cameron { 1000254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10013f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 100225163bd5SWebb Scales if (unlikely(!h->msix_vector)) 100325163bd5SWebb Scales return; 100425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1005254f796bSMatt Gates c->Header.ReplyQueue = 1006804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 100725163bd5SWebb Scales else 100825163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1009254f796bSMatt Gates } 10103f5eac3aSStephen M. Cameron } 10113f5eac3aSStephen M. Cameron 1012c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 101325163bd5SWebb Scales struct CommandList *c, 101425163bd5SWebb Scales int reply_queue) 1015c349775eSScott Teel { 1016c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1017c349775eSScott Teel 101825163bd5SWebb Scales /* 101925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1020c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1021c349775eSScott Teel */ 102225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1023c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 102425163bd5SWebb Scales else 102525163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 102625163bd5SWebb Scales /* 102725163bd5SWebb Scales * Set the bits in the address sent down to include: 1028c349775eSScott Teel * - performant mode bit (bit 0) 1029c349775eSScott Teel * - pull count (bits 1-3) 1030c349775eSScott Teel * - command type (bits 4-6) 1031c349775eSScott Teel */ 1032c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1033c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1034c349775eSScott Teel } 1035c349775eSScott Teel 10368be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10378be986ccSStephen Cameron struct CommandList *c, 10388be986ccSStephen Cameron int reply_queue) 10398be986ccSStephen Cameron { 10408be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10418be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10428be986ccSStephen Cameron 10438be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10448be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10458be986ccSStephen Cameron */ 10468be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10478be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10488be986ccSStephen Cameron else 10498be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10508be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10518be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10528be986ccSStephen Cameron * - pull count (bits 0-3) 10538be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10548be986ccSStephen Cameron */ 10558be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10568be986ccSStephen Cameron } 10578be986ccSStephen Cameron 1058c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 105925163bd5SWebb Scales struct CommandList *c, 106025163bd5SWebb Scales int reply_queue) 1061c349775eSScott Teel { 1062c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1063c349775eSScott Teel 106425163bd5SWebb Scales /* 106525163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1066c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1067c349775eSScott Teel */ 106825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1069c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 107025163bd5SWebb Scales else 107125163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 107225163bd5SWebb Scales /* 107325163bd5SWebb Scales * Set the bits in the address sent down to include: 1074c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1075c349775eSScott Teel * - pull count (bits 0-3) 1076c349775eSScott Teel * - command type isn't needed for ioaccel2 1077c349775eSScott Teel */ 1078c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1079c349775eSScott Teel } 1080c349775eSScott Teel 1081e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1082e85c5974SStephen M. Cameron { 1083e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1084e85c5974SStephen M. Cameron } 1085e85c5974SStephen M. Cameron 1086e85c5974SStephen M. Cameron /* 1087e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1088e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1089e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1090e85c5974SStephen M. Cameron */ 1091e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1092e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1093e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1094e85c5974SStephen M. Cameron struct CommandList *c) 1095e85c5974SStephen M. Cameron { 1096e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1097e85c5974SStephen M. Cameron return; 1098e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1099e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1100e85c5974SStephen M. Cameron } 1101e85c5974SStephen M. Cameron 1102e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1103e85c5974SStephen M. Cameron struct CommandList *c) 1104e85c5974SStephen M. Cameron { 1105e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1106e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1107e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1108e85c5974SStephen M. Cameron } 1109e85c5974SStephen M. Cameron 111025163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 111125163bd5SWebb Scales struct CommandList *c, int reply_queue) 11123f5eac3aSStephen M. Cameron { 1113c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1114c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1115c349775eSScott Teel switch (c->cmd_type) { 1116c349775eSScott Teel case CMD_IOACCEL1: 111725163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1118c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1119c349775eSScott Teel break; 1120c349775eSScott Teel case CMD_IOACCEL2: 112125163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1122c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1123c349775eSScott Teel break; 11248be986ccSStephen Cameron case IOACCEL2_TMF: 11258be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11268be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11278be986ccSStephen Cameron break; 1128c349775eSScott Teel default: 112925163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1130f2405db8SDon Brace h->access.submit_command(h, c); 11313f5eac3aSStephen M. Cameron } 1132c05e8866SStephen Cameron } 11333f5eac3aSStephen M. Cameron 1134a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 113525163bd5SWebb Scales { 1136d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1137a58e7e53SWebb Scales return finish_cmd(c); 1138a58e7e53SWebb Scales 113925163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 114025163bd5SWebb Scales } 114125163bd5SWebb Scales 11423f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11433f5eac3aSStephen M. Cameron { 11443f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11453f5eac3aSStephen M. Cameron } 11463f5eac3aSStephen M. Cameron 11473f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11483f5eac3aSStephen M. Cameron { 11493f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11503f5eac3aSStephen M. Cameron return 0; 11513f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11523f5eac3aSStephen M. Cameron return 1; 11533f5eac3aSStephen M. Cameron return 0; 11543f5eac3aSStephen M. Cameron } 11553f5eac3aSStephen M. Cameron 1156edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1157edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1158edd16368SStephen M. Cameron { 1159edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1160edd16368SStephen M. Cameron * assumes h->devlock is held 1161edd16368SStephen M. Cameron */ 1162edd16368SStephen M. Cameron int i, found = 0; 1163cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1164edd16368SStephen M. Cameron 1165263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1166edd16368SStephen M. Cameron 1167edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1168edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1169263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1170edd16368SStephen M. Cameron } 1171edd16368SStephen M. Cameron 1172263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1173263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1174edd16368SStephen M. Cameron /* *bus = 1; */ 1175edd16368SStephen M. Cameron *target = i; 1176edd16368SStephen M. Cameron *lun = 0; 1177edd16368SStephen M. Cameron found = 1; 1178edd16368SStephen M. Cameron } 1179edd16368SStephen M. Cameron return !found; 1180edd16368SStephen M. Cameron } 1181edd16368SStephen M. Cameron 11821d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11830d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11840d96ef5fSWebb Scales { 11857c59a0d4SDon Brace #define LABEL_SIZE 25 11867c59a0d4SDon Brace char label[LABEL_SIZE]; 11877c59a0d4SDon Brace 11889975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11899975ec9dSDon Brace return; 11909975ec9dSDon Brace 11917c59a0d4SDon Brace switch (dev->devtype) { 11927c59a0d4SDon Brace case TYPE_RAID: 11937c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11947c59a0d4SDon Brace break; 11957c59a0d4SDon Brace case TYPE_ENCLOSURE: 11967c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11977c59a0d4SDon Brace break; 11987c59a0d4SDon Brace case TYPE_DISK: 1199af15ed36SDon Brace case TYPE_ZBC: 12007c59a0d4SDon Brace if (dev->external) 12017c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12027c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12037c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12047c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12057c59a0d4SDon Brace else 12067c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12077c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12087c59a0d4SDon Brace raid_label[dev->raid_level]); 12097c59a0d4SDon Brace break; 12107c59a0d4SDon Brace case TYPE_ROM: 12117c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12127c59a0d4SDon Brace break; 12137c59a0d4SDon Brace case TYPE_TAPE: 12147c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12157c59a0d4SDon Brace break; 12167c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12177c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12187c59a0d4SDon Brace break; 12197c59a0d4SDon Brace default: 12207c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12217c59a0d4SDon Brace break; 12227c59a0d4SDon Brace } 12237c59a0d4SDon Brace 12240d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12257c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12260d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12270d96ef5fSWebb Scales description, 12280d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12290d96ef5fSWebb Scales dev->vendor, 12300d96ef5fSWebb Scales dev->model, 12317c59a0d4SDon Brace label, 12320d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12330d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12342a168208SKevin Barnett dev->expose_device); 12350d96ef5fSWebb Scales } 12360d96ef5fSWebb Scales 1237edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12388aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1239edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1240edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1241edd16368SStephen M. Cameron { 1242edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1243edd16368SStephen M. Cameron int n = h->ndevices; 1244edd16368SStephen M. Cameron int i; 1245edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1246edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1247edd16368SStephen M. Cameron 1248cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1249edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1250edd16368SStephen M. Cameron "inaccessible.\n"); 1251edd16368SStephen M. Cameron return -1; 1252edd16368SStephen M. Cameron } 1253edd16368SStephen M. Cameron 1254edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1255edd16368SStephen M. Cameron if (device->lun != -1) 1256edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1257edd16368SStephen M. Cameron goto lun_assigned; 1258edd16368SStephen M. Cameron 1259edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1260edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12612b08b3e9SDon Brace * unit no, zero otherwise. 1262edd16368SStephen M. Cameron */ 1263edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1264edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1265edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1266edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1267edd16368SStephen M. Cameron return -1; 1268edd16368SStephen M. Cameron goto lun_assigned; 1269edd16368SStephen M. Cameron } 1270edd16368SStephen M. Cameron 1271edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1272edd16368SStephen M. Cameron * Search through our list and find the device which 12739a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1274edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1275edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1276edd16368SStephen M. Cameron */ 1277edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1278edd16368SStephen M. Cameron addr1[4] = 0; 12799a4178b7Sshane.seymour addr1[5] = 0; 1280edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1281edd16368SStephen M. Cameron sd = h->dev[i]; 1282edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1283edd16368SStephen M. Cameron addr2[4] = 0; 12849a4178b7Sshane.seymour addr2[5] = 0; 12859a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1286edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1287edd16368SStephen M. Cameron device->bus = sd->bus; 1288edd16368SStephen M. Cameron device->target = sd->target; 1289edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1290edd16368SStephen M. Cameron break; 1291edd16368SStephen M. Cameron } 1292edd16368SStephen M. Cameron } 1293edd16368SStephen M. Cameron if (device->lun == -1) { 1294edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1295edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1296edd16368SStephen M. Cameron "configuration.\n"); 1297edd16368SStephen M. Cameron return -1; 1298edd16368SStephen M. Cameron } 1299edd16368SStephen M. Cameron 1300edd16368SStephen M. Cameron lun_assigned: 1301edd16368SStephen M. Cameron 1302edd16368SStephen M. Cameron h->dev[n] = device; 1303edd16368SStephen M. Cameron h->ndevices++; 1304edd16368SStephen M. Cameron added[*nadded] = device; 1305edd16368SStephen M. Cameron (*nadded)++; 13060d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13072a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1308a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1309a473d86cSRobert Elliott device->offload_enabled = 0; 1310edd16368SStephen M. Cameron return 0; 1311edd16368SStephen M. Cameron } 1312edd16368SStephen M. Cameron 1313bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13148aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1315bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1316bd9244f7SScott Teel { 1317a473d86cSRobert Elliott int offload_enabled; 1318bd9244f7SScott Teel /* assumes h->devlock is held */ 1319bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1320bd9244f7SScott Teel 1321bd9244f7SScott Teel /* Raid level changed. */ 1322bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1323250fb125SStephen M. Cameron 132403383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 132503383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 132603383736SDon Brace /* 132703383736SDon Brace * if drive is newly offload_enabled, we want to copy the 132803383736SDon Brace * raid map data first. If previously offload_enabled and 132903383736SDon Brace * offload_config were set, raid map data had better be 133003383736SDon Brace * the same as it was before. if raid map data is changed 133103383736SDon Brace * then it had better be the case that 133203383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 133303383736SDon Brace */ 13349fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 133503383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 133603383736SDon Brace } 1337a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1338a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1339a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1340a3144e0bSJoe Handzik } 1341a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 134203383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 134303383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 134403383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1345250fb125SStephen M. Cameron 134641ce4c35SStephen Cameron /* 134741ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 134841ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 134941ce4c35SStephen Cameron * can't do that until all the devices are updated. 135041ce4c35SStephen Cameron */ 135141ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 135241ce4c35SStephen Cameron if (!new_entry->offload_enabled) 135341ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 135441ce4c35SStephen Cameron 1355a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1356a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13570d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1358a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1359bd9244f7SScott Teel } 1360bd9244f7SScott Teel 13612a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13628aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13632a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13642a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13652a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13662a8ccf31SStephen M. Cameron { 13672a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1368cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13692a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13702a8ccf31SStephen M. Cameron (*nremoved)++; 137101350d05SStephen M. Cameron 137201350d05SStephen M. Cameron /* 137301350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 137401350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 137501350d05SStephen M. Cameron */ 137601350d05SStephen M. Cameron if (new_entry->target == -1) { 137701350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 137801350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 137901350d05SStephen M. Cameron } 138001350d05SStephen M. Cameron 13812a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13822a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13832a8ccf31SStephen M. Cameron (*nadded)++; 13840d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1385a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1386a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13872a8ccf31SStephen M. Cameron } 13882a8ccf31SStephen M. Cameron 1389edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13908aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1391edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1392edd16368SStephen M. Cameron { 1393edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1394edd16368SStephen M. Cameron int i; 1395edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1396edd16368SStephen M. Cameron 1397cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1398edd16368SStephen M. Cameron 1399edd16368SStephen M. Cameron sd = h->dev[entry]; 1400edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1401edd16368SStephen M. Cameron (*nremoved)++; 1402edd16368SStephen M. Cameron 1403edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1404edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1405edd16368SStephen M. Cameron h->ndevices--; 14060d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1407edd16368SStephen M. Cameron } 1408edd16368SStephen M. Cameron 1409edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1410edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1411edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1412edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1413edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1414edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1415edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1416edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1417edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1418edd16368SStephen M. Cameron 1419edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1420edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1421edd16368SStephen M. Cameron { 1422edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1423edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1424edd16368SStephen M. Cameron */ 1425edd16368SStephen M. Cameron unsigned long flags; 1426edd16368SStephen M. Cameron int i, j; 1427edd16368SStephen M. Cameron 1428edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1429edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1430edd16368SStephen M. Cameron if (h->dev[i] == added) { 1431edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1432edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1433edd16368SStephen M. Cameron h->ndevices--; 1434edd16368SStephen M. Cameron break; 1435edd16368SStephen M. Cameron } 1436edd16368SStephen M. Cameron } 1437edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1438edd16368SStephen M. Cameron kfree(added); 1439edd16368SStephen M. Cameron } 1440edd16368SStephen M. Cameron 1441edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1442edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1443edd16368SStephen M. Cameron { 1444edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1445edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1446edd16368SStephen M. Cameron * to differ first 1447edd16368SStephen M. Cameron */ 1448edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1449edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1450edd16368SStephen M. Cameron return 0; 1451edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1452edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1453edd16368SStephen M. Cameron return 0; 1454edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1455edd16368SStephen M. Cameron return 0; 1456edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1457edd16368SStephen M. Cameron return 0; 1458edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1459edd16368SStephen M. Cameron return 0; 1460edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1461edd16368SStephen M. Cameron return 0; 1462edd16368SStephen M. Cameron return 1; 1463edd16368SStephen M. Cameron } 1464edd16368SStephen M. Cameron 1465bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1466bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1467bd9244f7SScott Teel { 1468bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1469bd9244f7SScott Teel * that the device is a different device, nor that the OS 1470bd9244f7SScott Teel * needs to be told anything about the change. 1471bd9244f7SScott Teel */ 1472bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1473bd9244f7SScott Teel return 1; 1474250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1475250fb125SStephen M. Cameron return 1; 1476250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1477250fb125SStephen M. Cameron return 1; 147893849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 147903383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 148003383736SDon Brace return 1; 1481bd9244f7SScott Teel return 0; 1482bd9244f7SScott Teel } 1483bd9244f7SScott Teel 1484edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1485edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1486edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1487bd9244f7SScott Teel * location in *index. 1488bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1489bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1490bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1491edd16368SStephen M. Cameron */ 1492edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1493edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1494edd16368SStephen M. Cameron int *index) 1495edd16368SStephen M. Cameron { 1496edd16368SStephen M. Cameron int i; 1497edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1498edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1499edd16368SStephen M. Cameron #define DEVICE_SAME 2 1500bd9244f7SScott Teel #define DEVICE_UPDATED 3 15011d33d85dSDon Brace if (needle == NULL) 15021d33d85dSDon Brace return DEVICE_NOT_FOUND; 15031d33d85dSDon Brace 1504edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 150523231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 150623231048SStephen M. Cameron continue; 1507edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1508edd16368SStephen M. Cameron *index = i; 1509bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1510bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1511bd9244f7SScott Teel return DEVICE_UPDATED; 1512edd16368SStephen M. Cameron return DEVICE_SAME; 1513bd9244f7SScott Teel } else { 15149846590eSStephen M. Cameron /* Keep offline devices offline */ 15159846590eSStephen M. Cameron if (needle->volume_offline) 15169846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1517edd16368SStephen M. Cameron return DEVICE_CHANGED; 1518edd16368SStephen M. Cameron } 1519edd16368SStephen M. Cameron } 1520bd9244f7SScott Teel } 1521edd16368SStephen M. Cameron *index = -1; 1522edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1523edd16368SStephen M. Cameron } 1524edd16368SStephen M. Cameron 15259846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15269846590eSStephen M. Cameron unsigned char scsi3addr[]) 15279846590eSStephen M. Cameron { 15289846590eSStephen M. Cameron struct offline_device_entry *device; 15299846590eSStephen M. Cameron unsigned long flags; 15309846590eSStephen M. Cameron 15319846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15329846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15339846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15349846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15359846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15369846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15379846590eSStephen M. Cameron return; 15389846590eSStephen M. Cameron } 15399846590eSStephen M. Cameron } 15409846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15419846590eSStephen M. Cameron 15429846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15439846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15449846590eSStephen M. Cameron if (!device) { 15459846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15469846590eSStephen M. Cameron return; 15479846590eSStephen M. Cameron } 15489846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15499846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15509846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15519846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15529846590eSStephen M. Cameron } 15539846590eSStephen M. Cameron 15549846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15559846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15569846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15579846590eSStephen M. Cameron { 15589846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15599846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15609846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15619846590eSStephen M. Cameron h->scsi_host->host_no, 15629846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15639846590eSStephen M. Cameron switch (sd->volume_offline) { 15649846590eSStephen M. Cameron case HPSA_LV_OK: 15659846590eSStephen M. Cameron break; 15669846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15679846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15689846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15699846590eSStephen M. Cameron h->scsi_host->host_no, 15709846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15719846590eSStephen M. Cameron break; 15725ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15735ca01204SScott Benesh dev_info(&h->pdev->dev, 15745ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15755ca01204SScott Benesh h->scsi_host->host_no, 15765ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15775ca01204SScott Benesh break; 15789846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15799846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15805ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15819846590eSStephen M. Cameron h->scsi_host->host_no, 15829846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15839846590eSStephen M. Cameron break; 15849846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15859846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15869846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15879846590eSStephen M. Cameron h->scsi_host->host_no, 15889846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15899846590eSStephen M. Cameron break; 15909846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15919846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15929846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15939846590eSStephen M. Cameron h->scsi_host->host_no, 15949846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15959846590eSStephen M. Cameron break; 15969846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15979846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15989846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15999846590eSStephen M. Cameron h->scsi_host->host_no, 16009846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16019846590eSStephen M. Cameron break; 16029846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16039846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16049846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16059846590eSStephen M. Cameron h->scsi_host->host_no, 16069846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16079846590eSStephen M. Cameron break; 16089846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16099846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16109846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16119846590eSStephen M. Cameron h->scsi_host->host_no, 16129846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16139846590eSStephen M. Cameron break; 16149846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16159846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16169846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16179846590eSStephen M. Cameron h->scsi_host->host_no, 16189846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16199846590eSStephen M. Cameron break; 16209846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16219846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16229846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16239846590eSStephen M. Cameron h->scsi_host->host_no, 16249846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16259846590eSStephen M. Cameron break; 16269846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16279846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16289846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16299846590eSStephen M. Cameron h->scsi_host->host_no, 16309846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16319846590eSStephen M. Cameron break; 16329846590eSStephen M. Cameron } 16339846590eSStephen M. Cameron } 16349846590eSStephen M. Cameron 163503383736SDon Brace /* 163603383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 163703383736SDon Brace * raid offload configured. 163803383736SDon Brace */ 163903383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 164003383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 164103383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 164203383736SDon Brace { 164303383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 164403383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 164503383736SDon Brace int i, j; 164603383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 164703383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 164803383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 164903383736SDon Brace le16_to_cpu(map->layout_map_count) * 165003383736SDon Brace total_disks_per_row; 165103383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 165203383736SDon Brace total_disks_per_row; 165303383736SDon Brace int qdepth; 165403383736SDon Brace 165503383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 165603383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 165703383736SDon Brace 1658d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1659d604f533SWebb Scales 166003383736SDon Brace qdepth = 0; 166103383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 166203383736SDon Brace logical_drive->phys_disk[i] = NULL; 166303383736SDon Brace if (!logical_drive->offload_config) 166403383736SDon Brace continue; 166503383736SDon Brace for (j = 0; j < ndevices; j++) { 16661d33d85dSDon Brace if (dev[j] == NULL) 16671d33d85dSDon Brace continue; 1668ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1669ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1670af15ed36SDon Brace continue; 1671f3f01730SKevin Barnett if (is_logical_device(dev[j])) 167203383736SDon Brace continue; 167303383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 167403383736SDon Brace continue; 167503383736SDon Brace 167603383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 167703383736SDon Brace if (i < nphys_disk) 167803383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 167903383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 168003383736SDon Brace break; 168103383736SDon Brace } 168203383736SDon Brace 168303383736SDon Brace /* 168403383736SDon Brace * This can happen if a physical drive is removed and 168503383736SDon Brace * the logical drive is degraded. In that case, the RAID 168603383736SDon Brace * map data will refer to a physical disk which isn't actually 168703383736SDon Brace * present. And in that case offload_enabled should already 168803383736SDon Brace * be 0, but we'll turn it off here just in case 168903383736SDon Brace */ 169003383736SDon Brace if (!logical_drive->phys_disk[i]) { 169103383736SDon Brace logical_drive->offload_enabled = 0; 169241ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 169341ce4c35SStephen Cameron logical_drive->queue_depth = 8; 169403383736SDon Brace } 169503383736SDon Brace } 169603383736SDon Brace if (nraid_map_entries) 169703383736SDon Brace /* 169803383736SDon Brace * This is correct for reads, too high for full stripe writes, 169903383736SDon Brace * way too high for partial stripe writes 170003383736SDon Brace */ 170103383736SDon Brace logical_drive->queue_depth = qdepth; 170203383736SDon Brace else 170303383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 170403383736SDon Brace } 170503383736SDon Brace 170603383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 170703383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 170803383736SDon Brace { 170903383736SDon Brace int i; 171003383736SDon Brace 171103383736SDon Brace for (i = 0; i < ndevices; i++) { 17121d33d85dSDon Brace if (dev[i] == NULL) 17131d33d85dSDon Brace continue; 1714ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1715ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1716af15ed36SDon Brace continue; 1717f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 171803383736SDon Brace continue; 171941ce4c35SStephen Cameron 172041ce4c35SStephen Cameron /* 172141ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 172241ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 172341ce4c35SStephen Cameron * and since it isn't changing, we do not need to 172441ce4c35SStephen Cameron * update it. 172541ce4c35SStephen Cameron */ 172641ce4c35SStephen Cameron if (dev[i]->offload_enabled) 172741ce4c35SStephen Cameron continue; 172841ce4c35SStephen Cameron 172903383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 173003383736SDon Brace } 173103383736SDon Brace } 173203383736SDon Brace 1733096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1734096ccff4SKevin Barnett { 1735096ccff4SKevin Barnett int rc = 0; 1736096ccff4SKevin Barnett 1737096ccff4SKevin Barnett if (!h->scsi_host) 1738096ccff4SKevin Barnett return 1; 1739096ccff4SKevin Barnett 1740d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1741096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1742096ccff4SKevin Barnett device->target, device->lun); 1743d04e62b9SKevin Barnett else /* HBA */ 1744d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1745d04e62b9SKevin Barnett 1746096ccff4SKevin Barnett return rc; 1747096ccff4SKevin Barnett } 1748096ccff4SKevin Barnett 1749ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1750ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1751ba74fdc4SDon Brace { 1752ba74fdc4SDon Brace int i; 1753ba74fdc4SDon Brace int count = 0; 1754ba74fdc4SDon Brace 1755ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1756ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1757ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1758ba74fdc4SDon Brace 1759ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1760ba74fdc4SDon Brace dev->scsi3addr)) { 1761ba74fdc4SDon Brace unsigned long flags; 1762ba74fdc4SDon Brace 1763ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1764ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1765ba74fdc4SDon Brace ++count; 1766ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1767ba74fdc4SDon Brace } 1768ba74fdc4SDon Brace 1769ba74fdc4SDon Brace cmd_free(h, c); 1770ba74fdc4SDon Brace } 1771ba74fdc4SDon Brace 1772ba74fdc4SDon Brace return count; 1773ba74fdc4SDon Brace } 1774ba74fdc4SDon Brace 1775ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1776ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1777ba74fdc4SDon Brace { 1778ba74fdc4SDon Brace int cmds = 0; 1779ba74fdc4SDon Brace int waits = 0; 1780ba74fdc4SDon Brace 1781ba74fdc4SDon Brace while (1) { 1782ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1783ba74fdc4SDon Brace if (cmds == 0) 1784ba74fdc4SDon Brace break; 1785ba74fdc4SDon Brace if (++waits > 20) 1786ba74fdc4SDon Brace break; 1787ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1788ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1789ba74fdc4SDon Brace __func__, cmds); 1790ba74fdc4SDon Brace msleep(1000); 1791ba74fdc4SDon Brace } 1792ba74fdc4SDon Brace } 1793ba74fdc4SDon Brace 1794096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1795096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1796096ccff4SKevin Barnett { 1797096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1798096ccff4SKevin Barnett 1799096ccff4SKevin Barnett if (!h->scsi_host) 1800096ccff4SKevin Barnett return; 1801096ccff4SKevin Barnett 1802d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1803096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1804096ccff4SKevin Barnett device->target, device->lun); 1805096ccff4SKevin Barnett if (sdev) { 1806096ccff4SKevin Barnett scsi_remove_device(sdev); 1807096ccff4SKevin Barnett scsi_device_put(sdev); 1808096ccff4SKevin Barnett } else { 1809096ccff4SKevin Barnett /* 1810096ccff4SKevin Barnett * We don't expect to get here. Future commands 1811096ccff4SKevin Barnett * to this device will get a selection timeout as 1812096ccff4SKevin Barnett * if the device were gone. 1813096ccff4SKevin Barnett */ 1814096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1815096ccff4SKevin Barnett "didn't find device for removal."); 1816096ccff4SKevin Barnett } 1817ba74fdc4SDon Brace } else { /* HBA */ 1818ba74fdc4SDon Brace 1819ba74fdc4SDon Brace device->removed = 1; 1820ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1821ba74fdc4SDon Brace 1822d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1823096ccff4SKevin Barnett } 1824ba74fdc4SDon Brace } 1825096ccff4SKevin Barnett 18268aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1827edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1828edd16368SStephen M. Cameron { 1829edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1830edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1831edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1832edd16368SStephen M. Cameron */ 1833edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1834edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1835edd16368SStephen M. Cameron unsigned long flags; 1836edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1837edd16368SStephen M. Cameron int nadded, nremoved; 1838edd16368SStephen M. Cameron 1839da03ded0SDon Brace /* 1840da03ded0SDon Brace * A reset can cause a device status to change 1841da03ded0SDon Brace * re-schedule the scan to see what happened. 1842da03ded0SDon Brace */ 1843da03ded0SDon Brace if (h->reset_in_progress) { 1844da03ded0SDon Brace h->drv_req_rescan = 1; 1845da03ded0SDon Brace return; 1846da03ded0SDon Brace } 1847edd16368SStephen M. Cameron 1848cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1849cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1850edd16368SStephen M. Cameron 1851edd16368SStephen M. Cameron if (!added || !removed) { 1852edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1853edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1854edd16368SStephen M. Cameron goto free_and_out; 1855edd16368SStephen M. Cameron } 1856edd16368SStephen M. Cameron 1857edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1858edd16368SStephen M. Cameron 1859edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1860edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1861edd16368SStephen M. Cameron * devices which have changed, remove the old device 1862edd16368SStephen M. Cameron * info and add the new device info. 1863bd9244f7SScott Teel * If minor device attributes change, just update 1864bd9244f7SScott Teel * the existing device structure. 1865edd16368SStephen M. Cameron */ 1866edd16368SStephen M. Cameron i = 0; 1867edd16368SStephen M. Cameron nremoved = 0; 1868edd16368SStephen M. Cameron nadded = 0; 1869edd16368SStephen M. Cameron while (i < h->ndevices) { 1870edd16368SStephen M. Cameron csd = h->dev[i]; 1871edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1872edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1873edd16368SStephen M. Cameron changes++; 18748aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1875edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1876edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1877edd16368SStephen M. Cameron changes++; 18788aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18792a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1880c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1881c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1882c7f172dcSStephen M. Cameron */ 1883c7f172dcSStephen M. Cameron sd[entry] = NULL; 1884bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18858aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1886edd16368SStephen M. Cameron } 1887edd16368SStephen M. Cameron i++; 1888edd16368SStephen M. Cameron } 1889edd16368SStephen M. Cameron 1890edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1891edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1892edd16368SStephen M. Cameron */ 1893edd16368SStephen M. Cameron 1894edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1895edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1896edd16368SStephen M. Cameron continue; 18979846590eSStephen M. Cameron 18989846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 18999846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19009846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19019846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19029846590eSStephen M. Cameron */ 19039846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19049846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19050d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19069846590eSStephen M. Cameron continue; 19079846590eSStephen M. Cameron } 19089846590eSStephen M. Cameron 1909edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1910edd16368SStephen M. Cameron h->ndevices, &entry); 1911edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1912edd16368SStephen M. Cameron changes++; 19138aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1914edd16368SStephen M. Cameron break; 1915edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1916edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1917edd16368SStephen M. Cameron /* should never happen... */ 1918edd16368SStephen M. Cameron changes++; 1919edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1920edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1921edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1922edd16368SStephen M. Cameron } 1923edd16368SStephen M. Cameron } 192441ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 192541ce4c35SStephen Cameron 192641ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 192741ce4c35SStephen Cameron * any logical drives that need it enabled. 192841ce4c35SStephen Cameron */ 19291d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19301d33d85dSDon Brace if (h->dev[i] == NULL) 19311d33d85dSDon Brace continue; 193241ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19331d33d85dSDon Brace } 193441ce4c35SStephen Cameron 1935edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1936edd16368SStephen M. Cameron 19379846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19389846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19399846590eSStephen M. Cameron * so don't touch h->dev[] 19409846590eSStephen M. Cameron */ 19419846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19429846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19439846590eSStephen M. Cameron continue; 19449846590eSStephen M. Cameron if (sd[i]->volume_offline) 19459846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19469846590eSStephen M. Cameron } 19479846590eSStephen M. Cameron 1948edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1949edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1950edd16368SStephen M. Cameron * first time through. 1951edd16368SStephen M. Cameron */ 19528aa60681SDon Brace if (!changes) 1953edd16368SStephen M. Cameron goto free_and_out; 1954edd16368SStephen M. Cameron 1955edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1956edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19571d33d85dSDon Brace if (removed[i] == NULL) 19581d33d85dSDon Brace continue; 1959096ccff4SKevin Barnett if (removed[i]->expose_device) 1960096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1961edd16368SStephen M. Cameron kfree(removed[i]); 1962edd16368SStephen M. Cameron removed[i] = NULL; 1963edd16368SStephen M. Cameron } 1964edd16368SStephen M. Cameron 1965edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1966edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1967096ccff4SKevin Barnett int rc = 0; 1968096ccff4SKevin Barnett 19691d33d85dSDon Brace if (added[i] == NULL) 197041ce4c35SStephen Cameron continue; 19712a168208SKevin Barnett if (!(added[i]->expose_device)) 1972edd16368SStephen M. Cameron continue; 1973096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1974096ccff4SKevin Barnett if (!rc) 1975edd16368SStephen M. Cameron continue; 1976096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1977096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1978edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1979edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1980edd16368SStephen M. Cameron */ 1981edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1982853633e8SDon Brace h->drv_req_rescan = 1; 1983edd16368SStephen M. Cameron } 1984edd16368SStephen M. Cameron 1985edd16368SStephen M. Cameron free_and_out: 1986edd16368SStephen M. Cameron kfree(added); 1987edd16368SStephen M. Cameron kfree(removed); 1988edd16368SStephen M. Cameron } 1989edd16368SStephen M. Cameron 1990edd16368SStephen M. Cameron /* 19919e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1992edd16368SStephen M. Cameron * Assume's h->devlock is held. 1993edd16368SStephen M. Cameron */ 1994edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1995edd16368SStephen M. Cameron int bus, int target, int lun) 1996edd16368SStephen M. Cameron { 1997edd16368SStephen M. Cameron int i; 1998edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1999edd16368SStephen M. Cameron 2000edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2001edd16368SStephen M. Cameron sd = h->dev[i]; 2002edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2003edd16368SStephen M. Cameron return sd; 2004edd16368SStephen M. Cameron } 2005edd16368SStephen M. Cameron return NULL; 2006edd16368SStephen M. Cameron } 2007edd16368SStephen M. Cameron 2008edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2009edd16368SStephen M. Cameron { 2010edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2011edd16368SStephen M. Cameron unsigned long flags; 2012edd16368SStephen M. Cameron struct ctlr_info *h; 2013edd16368SStephen M. Cameron 2014edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2015edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2016d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2017d04e62b9SKevin Barnett struct scsi_target *starget; 2018d04e62b9SKevin Barnett struct sas_rphy *rphy; 2019d04e62b9SKevin Barnett 2020d04e62b9SKevin Barnett starget = scsi_target(sdev); 2021d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2022d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2023d04e62b9SKevin Barnett if (sd) { 2024d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2025d04e62b9SKevin Barnett sd->lun = sdev->lun; 2026d04e62b9SKevin Barnett } 2027d04e62b9SKevin Barnett } else 2028edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2029edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2030d04e62b9SKevin Barnett 2031d04e62b9SKevin Barnett if (sd && sd->expose_device) { 203203383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2033d04e62b9SKevin Barnett sdev->hostdata = sd; 203441ce4c35SStephen Cameron } else 203541ce4c35SStephen Cameron sdev->hostdata = NULL; 2036edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2037edd16368SStephen M. Cameron return 0; 2038edd16368SStephen M. Cameron } 2039edd16368SStephen M. Cameron 204041ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 204141ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 204241ce4c35SStephen Cameron { 204341ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 204441ce4c35SStephen Cameron int queue_depth; 204541ce4c35SStephen Cameron 204641ce4c35SStephen Cameron sd = sdev->hostdata; 20472a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 204841ce4c35SStephen Cameron 204941ce4c35SStephen Cameron if (sd) 205041ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 205141ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 205241ce4c35SStephen Cameron else 205341ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 205441ce4c35SStephen Cameron 205541ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 205641ce4c35SStephen Cameron 205741ce4c35SStephen Cameron return 0; 205841ce4c35SStephen Cameron } 205941ce4c35SStephen Cameron 2060edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2061edd16368SStephen M. Cameron { 2062bcc44255SStephen M. Cameron /* nothing to do. */ 2063edd16368SStephen M. Cameron } 2064edd16368SStephen M. Cameron 2065d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2066d9a729f3SWebb Scales { 2067d9a729f3SWebb Scales int i; 2068d9a729f3SWebb Scales 2069d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2070d9a729f3SWebb Scales return; 2071d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2072d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2073d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2074d9a729f3SWebb Scales } 2075d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2076d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2077d9a729f3SWebb Scales } 2078d9a729f3SWebb Scales 2079d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2080d9a729f3SWebb Scales { 2081d9a729f3SWebb Scales int i; 2082d9a729f3SWebb Scales 2083d9a729f3SWebb Scales if (h->chainsize <= 0) 2084d9a729f3SWebb Scales return 0; 2085d9a729f3SWebb Scales 2086d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2087d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2088d9a729f3SWebb Scales GFP_KERNEL); 2089d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2090d9a729f3SWebb Scales return -ENOMEM; 2091d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2092d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2093d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2094d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2095d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2096d9a729f3SWebb Scales goto clean; 2097d9a729f3SWebb Scales } 2098d9a729f3SWebb Scales return 0; 2099d9a729f3SWebb Scales 2100d9a729f3SWebb Scales clean: 2101d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2102d9a729f3SWebb Scales return -ENOMEM; 2103d9a729f3SWebb Scales } 2104d9a729f3SWebb Scales 210533a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 210633a2ffceSStephen M. Cameron { 210733a2ffceSStephen M. Cameron int i; 210833a2ffceSStephen M. Cameron 210933a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 211033a2ffceSStephen M. Cameron return; 211133a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 211233a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 211333a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 211433a2ffceSStephen M. Cameron } 211533a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 211633a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 211733a2ffceSStephen M. Cameron } 211833a2ffceSStephen M. Cameron 2119105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 212033a2ffceSStephen M. Cameron { 212133a2ffceSStephen M. Cameron int i; 212233a2ffceSStephen M. Cameron 212333a2ffceSStephen M. Cameron if (h->chainsize <= 0) 212433a2ffceSStephen M. Cameron return 0; 212533a2ffceSStephen M. Cameron 212633a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 212733a2ffceSStephen M. Cameron GFP_KERNEL); 21283d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 21293d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 213033a2ffceSStephen M. Cameron return -ENOMEM; 21313d4e6af8SRobert Elliott } 213233a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 213333a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 213433a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21353d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 21363d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 213733a2ffceSStephen M. Cameron goto clean; 213833a2ffceSStephen M. Cameron } 21393d4e6af8SRobert Elliott } 214033a2ffceSStephen M. Cameron return 0; 214133a2ffceSStephen M. Cameron 214233a2ffceSStephen M. Cameron clean: 214333a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 214433a2ffceSStephen M. Cameron return -ENOMEM; 214533a2ffceSStephen M. Cameron } 214633a2ffceSStephen M. Cameron 2147d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2148d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2149d9a729f3SWebb Scales { 2150d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2151d9a729f3SWebb Scales u64 temp64; 2152d9a729f3SWebb Scales u32 chain_size; 2153d9a729f3SWebb Scales 2154d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2155a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2156d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2157d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2158d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2159d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2160d9a729f3SWebb Scales cp->sg->address = 0; 2161d9a729f3SWebb Scales return -1; 2162d9a729f3SWebb Scales } 2163d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2164d9a729f3SWebb Scales return 0; 2165d9a729f3SWebb Scales } 2166d9a729f3SWebb Scales 2167d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2168d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2169d9a729f3SWebb Scales { 2170d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2171d9a729f3SWebb Scales u64 temp64; 2172d9a729f3SWebb Scales u32 chain_size; 2173d9a729f3SWebb Scales 2174d9a729f3SWebb Scales chain_sg = cp->sg; 2175d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2176a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2177d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2178d9a729f3SWebb Scales } 2179d9a729f3SWebb Scales 2180e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 218133a2ffceSStephen M. Cameron struct CommandList *c) 218233a2ffceSStephen M. Cameron { 218333a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 218433a2ffceSStephen M. Cameron u64 temp64; 218550a0decfSStephen M. Cameron u32 chain_len; 218633a2ffceSStephen M. Cameron 218733a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 218833a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 218950a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 219050a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21912b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 219250a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 219350a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 219433a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2195e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2196e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 219750a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2198e2bea6dfSStephen M. Cameron return -1; 2199e2bea6dfSStephen M. Cameron } 220050a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2201e2bea6dfSStephen M. Cameron return 0; 220233a2ffceSStephen M. Cameron } 220333a2ffceSStephen M. Cameron 220433a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 220533a2ffceSStephen M. Cameron struct CommandList *c) 220633a2ffceSStephen M. Cameron { 220733a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 220833a2ffceSStephen M. Cameron 220950a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 221033a2ffceSStephen M. Cameron return; 221133a2ffceSStephen M. Cameron 221233a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 221350a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 221450a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 221533a2ffceSStephen M. Cameron } 221633a2ffceSStephen M. Cameron 2217a09c1441SScott Teel 2218a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2219a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2220a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2221a09c1441SScott Teel */ 2222a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2223c349775eSScott Teel struct CommandList *c, 2224c349775eSScott Teel struct scsi_cmnd *cmd, 2225ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2226ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2227c349775eSScott Teel { 2228c349775eSScott Teel int data_len; 2229a09c1441SScott Teel int retry = 0; 2230c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2231c349775eSScott Teel 2232c349775eSScott Teel switch (c2->error_data.serv_response) { 2233c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2234c349775eSScott Teel switch (c2->error_data.status) { 2235c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2236c349775eSScott Teel break; 2237c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2238ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2239c349775eSScott Teel if (c2->error_data.data_present != 2240ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2241ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2242ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2243c349775eSScott Teel break; 2244ee6b1889SStephen M. Cameron } 2245c349775eSScott Teel /* copy the sense data */ 2246c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2247c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2248c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2249c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2250c349775eSScott Teel data_len = 2251c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2252c349775eSScott Teel memcpy(cmd->sense_buffer, 2253c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2254a09c1441SScott Teel retry = 1; 2255c349775eSScott Teel break; 2256c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2257a09c1441SScott Teel retry = 1; 2258c349775eSScott Teel break; 2259c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2260a09c1441SScott Teel retry = 1; 2261c349775eSScott Teel break; 2262c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22634a8da22bSStephen Cameron retry = 1; 2264c349775eSScott Teel break; 2265c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2266a09c1441SScott Teel retry = 1; 2267c349775eSScott Teel break; 2268c349775eSScott Teel default: 2269a09c1441SScott Teel retry = 1; 2270c349775eSScott Teel break; 2271c349775eSScott Teel } 2272c349775eSScott Teel break; 2273c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2274c40820d5SJoe Handzik switch (c2->error_data.status) { 2275c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2276c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2277c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2278c40820d5SJoe Handzik retry = 1; 2279c40820d5SJoe Handzik break; 2280c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2281c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2282c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2283c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2284c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2285c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2286c40820d5SJoe Handzik break; 2287c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2288c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2289c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2290ba74fdc4SDon Brace /* 2291ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2292ba74fdc4SDon Brace * get a state change event from the controller but 2293ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2294ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2295ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2296ba74fdc4SDon Brace * of the disk to get the same device node. 2297ba74fdc4SDon Brace */ 2298ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2299ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2300ba74fdc4SDon Brace dev->removed = 1; 2301ba74fdc4SDon Brace h->drv_req_rescan = 1; 2302ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2303ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2304ba74fdc4SDon Brace } else 2305ba74fdc4SDon Brace /* 2306ba74fdc4SDon Brace * Retry by sending down the RAID path. 2307ba74fdc4SDon Brace * We will get an event from ctlr to 2308ba74fdc4SDon Brace * trigger rescan regardless. 2309ba74fdc4SDon Brace */ 2310c40820d5SJoe Handzik retry = 1; 2311c40820d5SJoe Handzik break; 2312c40820d5SJoe Handzik default: 2313c40820d5SJoe Handzik retry = 1; 2314c40820d5SJoe Handzik } 2315c349775eSScott Teel break; 2316c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2317c349775eSScott Teel break; 2318c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2319c349775eSScott Teel break; 2320c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2321a09c1441SScott Teel retry = 1; 2322c349775eSScott Teel break; 2323c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2324c349775eSScott Teel break; 2325c349775eSScott Teel default: 2326a09c1441SScott Teel retry = 1; 2327c349775eSScott Teel break; 2328c349775eSScott Teel } 2329a09c1441SScott Teel 2330a09c1441SScott Teel return retry; /* retry on raid path? */ 2331c349775eSScott Teel } 2332c349775eSScott Teel 2333a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2334a58e7e53SWebb Scales struct CommandList *c) 2335a58e7e53SWebb Scales { 2336d604f533SWebb Scales bool do_wake = false; 2337d604f533SWebb Scales 2338a58e7e53SWebb Scales /* 2339a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2340a58e7e53SWebb Scales * 2341a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2342a58e7e53SWebb Scales * 2. The SCSI command completes 2343a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2344a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2345a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2346a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2347a58e7e53SWebb Scales * Now we have aborted the wrong command. 2348a58e7e53SWebb Scales * 2349d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2350d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2351a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2352a58e7e53SWebb Scales */ 2353a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2354d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2355a58e7e53SWebb Scales if (c->abort_pending) { 2356d604f533SWebb Scales do_wake = true; 2357a58e7e53SWebb Scales c->abort_pending = false; 2358a58e7e53SWebb Scales } 2359d604f533SWebb Scales if (c->reset_pending) { 2360d604f533SWebb Scales unsigned long flags; 2361d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2362d604f533SWebb Scales 2363d604f533SWebb Scales /* 2364d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2365d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2366d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2367d604f533SWebb Scales */ 2368d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2369d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2370d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2371d604f533SWebb Scales do_wake = true; 2372d604f533SWebb Scales c->reset_pending = NULL; 2373d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2374d604f533SWebb Scales } 2375d604f533SWebb Scales 2376d604f533SWebb Scales if (do_wake) 2377d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2378a58e7e53SWebb Scales } 2379a58e7e53SWebb Scales 238073153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 238173153fe5SWebb Scales struct CommandList *c) 238273153fe5SWebb Scales { 238373153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 238473153fe5SWebb Scales cmd_tagged_free(h, c); 238573153fe5SWebb Scales } 238673153fe5SWebb Scales 23878a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 23888a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 23898a0ff92cSWebb Scales { 239073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 23918a0ff92cSWebb Scales cmd->scsi_done(cmd); 23928a0ff92cSWebb Scales } 23938a0ff92cSWebb Scales 23948a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 23958a0ff92cSWebb Scales { 23968a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 23978a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 23988a0ff92cSWebb Scales } 23998a0ff92cSWebb Scales 2400a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2401a58e7e53SWebb Scales { 2402a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2403a58e7e53SWebb Scales } 2404a58e7e53SWebb Scales 2405a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2406a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2407a58e7e53SWebb Scales { 2408a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2409a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2410a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 241173153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2412a58e7e53SWebb Scales } 2413a58e7e53SWebb Scales 2414c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2415c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2416c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2417c349775eSScott Teel { 2418c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2419c349775eSScott Teel 2420c349775eSScott Teel /* check for good status */ 2421c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24228a0ff92cSWebb Scales c2->error_data.status == 0)) 24238a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2424c349775eSScott Teel 24258a0ff92cSWebb Scales /* 24268a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2427c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2428c349775eSScott Teel * wrong. 2429c349775eSScott Teel */ 2430f3f01730SKevin Barnett if (is_logical_device(dev) && 2431c349775eSScott Teel c2->error_data.serv_response == 2432c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2433080ef1ccSDon Brace if (c2->error_data.status == 2434064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2435c349775eSScott Teel dev->offload_enabled = 0; 2436064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2437064d1b1dSDon Brace } 24388a0ff92cSWebb Scales 24398a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2440080ef1ccSDon Brace } 2441080ef1ccSDon Brace 2442ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24438a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2444080ef1ccSDon Brace 24458a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2446c349775eSScott Teel } 2447c349775eSScott Teel 24489437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24499437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24509437ac43SStephen Cameron struct CommandList *cp) 24519437ac43SStephen Cameron { 24529437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24539437ac43SStephen Cameron 24549437ac43SStephen Cameron switch (tmf_status) { 24559437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24569437ac43SStephen Cameron /* 24579437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24589437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24599437ac43SStephen Cameron */ 24609437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24619437ac43SStephen Cameron return 0; 24629437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24639437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24649437ac43SStephen Cameron case CISS_TMF_FAILED: 24659437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24669437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24679437ac43SStephen Cameron break; 24689437ac43SStephen Cameron default: 24699437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24709437ac43SStephen Cameron tmf_status); 24719437ac43SStephen Cameron break; 24729437ac43SStephen Cameron } 24739437ac43SStephen Cameron return -tmf_status; 24749437ac43SStephen Cameron } 24759437ac43SStephen Cameron 24761fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2477edd16368SStephen M. Cameron { 2478edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2479edd16368SStephen M. Cameron struct ctlr_info *h; 2480edd16368SStephen M. Cameron struct ErrorInfo *ei; 2481283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2482d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2483edd16368SStephen M. Cameron 24849437ac43SStephen Cameron u8 sense_key; 24859437ac43SStephen Cameron u8 asc; /* additional sense code */ 24869437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2487db111e18SStephen M. Cameron unsigned long sense_data_size; 2488edd16368SStephen M. Cameron 2489edd16368SStephen M. Cameron ei = cp->err_info; 24907fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2491edd16368SStephen M. Cameron h = cp->h; 2492283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2493d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2494edd16368SStephen M. Cameron 2495edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2496e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 24972b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 249833a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2499edd16368SStephen M. Cameron 2500d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2501d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2502d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2503d9a729f3SWebb Scales 2504edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2505edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2506c349775eSScott Teel 250703383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 250803383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 250903383736SDon Brace 251025163bd5SWebb Scales /* 251125163bd5SWebb Scales * We check for lockup status here as it may be set for 251225163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 251325163bd5SWebb Scales * fail_all_oustanding_cmds() 251425163bd5SWebb Scales */ 251525163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 251625163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 251725163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25188a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 251925163bd5SWebb Scales } 252025163bd5SWebb Scales 2521d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2522d604f533SWebb Scales if (cp->reset_pending) 2523d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2524d604f533SWebb Scales if (cp->abort_pending) 2525d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2526d604f533SWebb Scales } 2527d604f533SWebb Scales 2528c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2529c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2530c349775eSScott Teel 25316aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25328a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25338a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25346aa4c361SRobert Elliott 2535e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2536e1f7de0cSMatt Gates * CISS header used below for error handling. 2537e1f7de0cSMatt Gates */ 2538e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2539e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25402b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25412b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25422b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25432b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 254450a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2545e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2546e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2547283b4a9bSStephen M. Cameron 2548283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2549283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2550283b4a9bSStephen M. Cameron * wrong. 2551283b4a9bSStephen M. Cameron */ 2552f3f01730SKevin Barnett if (is_logical_device(dev)) { 2553283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2554283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25558a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2556283b4a9bSStephen M. Cameron } 2557e1f7de0cSMatt Gates } 2558e1f7de0cSMatt Gates 2559edd16368SStephen M. Cameron /* an error has occurred */ 2560edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2561edd16368SStephen M. Cameron 2562edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25639437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25649437ac43SStephen Cameron /* copy the sense data */ 25659437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 25669437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 25679437ac43SStephen Cameron else 25689437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 25699437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 25709437ac43SStephen Cameron sense_data_size = ei->SenseLen; 25719437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 25729437ac43SStephen Cameron if (ei->ScsiStatus) 25739437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 25749437ac43SStephen Cameron &sense_key, &asc, &ascq); 2575edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 25761d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 25772e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 25781d3b3609SMatt Gates break; 25791d3b3609SMatt Gates } 2580edd16368SStephen M. Cameron break; 2581edd16368SStephen M. Cameron } 2582edd16368SStephen M. Cameron /* Problem was not a check condition 2583edd16368SStephen M. Cameron * Pass it up to the upper layers... 2584edd16368SStephen M. Cameron */ 2585edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2586edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2587edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2588edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2589edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2590edd16368SStephen M. Cameron sense_key, asc, ascq, 2591edd16368SStephen M. Cameron cmd->result); 2592edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2593edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2594edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2595edd16368SStephen M. Cameron 2596edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2597edd16368SStephen M. Cameron * but there is a bug in some released firmware 2598edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2599edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2600edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2601edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2602edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2603edd16368SStephen M. Cameron * look like selection timeout since that is 2604edd16368SStephen M. Cameron * the most common reason for this to occur, 2605edd16368SStephen M. Cameron * and it's severe enough. 2606edd16368SStephen M. Cameron */ 2607edd16368SStephen M. Cameron 2608edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2609edd16368SStephen M. Cameron } 2610edd16368SStephen M. Cameron break; 2611edd16368SStephen M. Cameron 2612edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2613edd16368SStephen M. Cameron break; 2614edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2615f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2616f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2617edd16368SStephen M. Cameron break; 2618edd16368SStephen M. Cameron case CMD_INVALID: { 2619edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2620edd16368SStephen M. Cameron print_cmd(cp); */ 2621edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2622edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2623edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2624edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2625edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2626edd16368SStephen M. Cameron * missing target. */ 2627edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2628edd16368SStephen M. Cameron } 2629edd16368SStephen M. Cameron break; 2630edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2631256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2632f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2633f42e81e1SStephen Cameron cp->Request.CDB); 2634edd16368SStephen M. Cameron break; 2635edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2636edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2637f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2638f42e81e1SStephen Cameron cp->Request.CDB); 2639edd16368SStephen M. Cameron break; 2640edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2641edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2642f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2643f42e81e1SStephen Cameron cp->Request.CDB); 2644edd16368SStephen M. Cameron break; 2645edd16368SStephen M. Cameron case CMD_ABORTED: 2646a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2647a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2648edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2649edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2650f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2651f42e81e1SStephen Cameron cp->Request.CDB); 2652edd16368SStephen M. Cameron break; 2653edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2654f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2655f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2656f42e81e1SStephen Cameron cp->Request.CDB); 2657edd16368SStephen M. Cameron break; 2658edd16368SStephen M. Cameron case CMD_TIMEOUT: 2659edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2660f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2661f42e81e1SStephen Cameron cp->Request.CDB); 2662edd16368SStephen M. Cameron break; 26631d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26641d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26651d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 26661d5e2ed0SStephen M. Cameron break; 26679437ac43SStephen Cameron case CMD_TMF_STATUS: 26689437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 26699437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 26709437ac43SStephen Cameron break; 2671283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2672283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2673283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2674283b4a9bSStephen M. Cameron */ 2675283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2676283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2677283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2678283b4a9bSStephen M. Cameron break; 2679edd16368SStephen M. Cameron default: 2680edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2681edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2682edd16368SStephen M. Cameron cp, ei->CommandStatus); 2683edd16368SStephen M. Cameron } 26848a0ff92cSWebb Scales 26858a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2686edd16368SStephen M. Cameron } 2687edd16368SStephen M. Cameron 2688edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2689edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2690edd16368SStephen M. Cameron { 2691edd16368SStephen M. Cameron int i; 2692edd16368SStephen M. Cameron 269350a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 269450a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 269550a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2696edd16368SStephen M. Cameron data_direction); 2697edd16368SStephen M. Cameron } 2698edd16368SStephen M. Cameron 2699a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2700edd16368SStephen M. Cameron struct CommandList *cp, 2701edd16368SStephen M. Cameron unsigned char *buf, 2702edd16368SStephen M. Cameron size_t buflen, 2703edd16368SStephen M. Cameron int data_direction) 2704edd16368SStephen M. Cameron { 270501a02ffcSStephen M. Cameron u64 addr64; 2706edd16368SStephen M. Cameron 2707edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2708edd16368SStephen M. Cameron cp->Header.SGList = 0; 270950a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2710a2dac136SStephen M. Cameron return 0; 2711edd16368SStephen M. Cameron } 2712edd16368SStephen M. Cameron 271350a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2714eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2715a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2716eceaae18SShuah Khan cp->Header.SGList = 0; 271750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2718a2dac136SStephen M. Cameron return -1; 2719eceaae18SShuah Khan } 272050a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 272150a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 272250a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 272350a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 272450a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2725a2dac136SStephen M. Cameron return 0; 2726edd16368SStephen M. Cameron } 2727edd16368SStephen M. Cameron 272825163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 272925163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 273025163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 273125163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2732edd16368SStephen M. Cameron { 2733edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2734edd16368SStephen M. Cameron 2735edd16368SStephen M. Cameron c->waiting = &wait; 273625163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 273725163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 273825163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 273925163bd5SWebb Scales wait_for_completion_io(&wait); 274025163bd5SWebb Scales return IO_OK; 274125163bd5SWebb Scales } 274225163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 274325163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 274425163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 274525163bd5SWebb Scales return -ETIMEDOUT; 274625163bd5SWebb Scales } 274725163bd5SWebb Scales return IO_OK; 274825163bd5SWebb Scales } 274925163bd5SWebb Scales 275025163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 275125163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 275225163bd5SWebb Scales { 275325163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 275425163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 275525163bd5SWebb Scales return IO_OK; 275625163bd5SWebb Scales } 275725163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2758edd16368SStephen M. Cameron } 2759edd16368SStephen M. Cameron 2760094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2761094963daSStephen M. Cameron { 2762094963daSStephen M. Cameron int cpu; 2763094963daSStephen M. Cameron u32 rc, *lockup_detected; 2764094963daSStephen M. Cameron 2765094963daSStephen M. Cameron cpu = get_cpu(); 2766094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2767094963daSStephen M. Cameron rc = *lockup_detected; 2768094963daSStephen M. Cameron put_cpu(); 2769094963daSStephen M. Cameron return rc; 2770094963daSStephen M. Cameron } 2771094963daSStephen M. Cameron 27729c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 277325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 277425163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2775edd16368SStephen M. Cameron { 27769c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 277725163bd5SWebb Scales int rc; 2778edd16368SStephen M. Cameron 2779edd16368SStephen M. Cameron do { 27807630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 278125163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 278225163bd5SWebb Scales timeout_msecs); 278325163bd5SWebb Scales if (rc) 278425163bd5SWebb Scales break; 2785edd16368SStephen M. Cameron retry_count++; 27869c2fc160SStephen M. Cameron if (retry_count > 3) { 27879c2fc160SStephen M. Cameron msleep(backoff_time); 27889c2fc160SStephen M. Cameron if (backoff_time < 1000) 27899c2fc160SStephen M. Cameron backoff_time *= 2; 27909c2fc160SStephen M. Cameron } 2791852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 27929c2fc160SStephen M. Cameron check_for_busy(h, c)) && 27939c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2794edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 279525163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 279625163bd5SWebb Scales rc = -EIO; 279725163bd5SWebb Scales return rc; 2798edd16368SStephen M. Cameron } 2799edd16368SStephen M. Cameron 2800d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2801d1e8beacSStephen M. Cameron struct CommandList *c) 2802edd16368SStephen M. Cameron { 2803d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2804d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2805edd16368SStephen M. Cameron 2806d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2807d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2808d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2809d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2810d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2811d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2812d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2813d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2814d1e8beacSStephen M. Cameron } 2815d1e8beacSStephen M. Cameron 2816d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2817d1e8beacSStephen M. Cameron struct CommandList *cp) 2818d1e8beacSStephen M. Cameron { 2819d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2820d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28219437ac43SStephen Cameron u8 sense_key, asc, ascq; 28229437ac43SStephen Cameron int sense_len; 2823d1e8beacSStephen M. Cameron 2824edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2825edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28269437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28279437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28289437ac43SStephen Cameron else 28299437ac43SStephen Cameron sense_len = ei->SenseLen; 28309437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28319437ac43SStephen Cameron &sense_key, &asc, &ascq); 2832d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2833d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28349437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28359437ac43SStephen Cameron sense_key, asc, ascq); 2836d1e8beacSStephen M. Cameron else 28379437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2838edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2839edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2840edd16368SStephen M. Cameron "(probably indicates selection timeout " 2841edd16368SStephen M. Cameron "reported incorrectly due to a known " 2842edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2843edd16368SStephen M. Cameron break; 2844edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2845edd16368SStephen M. Cameron break; 2846edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2847d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2848edd16368SStephen M. Cameron break; 2849edd16368SStephen M. Cameron case CMD_INVALID: { 2850edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2851edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2852edd16368SStephen M. Cameron */ 2853d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2854d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2855edd16368SStephen M. Cameron } 2856edd16368SStephen M. Cameron break; 2857edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2858d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2859edd16368SStephen M. Cameron break; 2860edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2861d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2862edd16368SStephen M. Cameron break; 2863edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2864d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2865edd16368SStephen M. Cameron break; 2866edd16368SStephen M. Cameron case CMD_ABORTED: 2867d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2868edd16368SStephen M. Cameron break; 2869edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2870d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2871edd16368SStephen M. Cameron break; 2872edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2873d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2874edd16368SStephen M. Cameron break; 2875edd16368SStephen M. Cameron case CMD_TIMEOUT: 2876d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2877edd16368SStephen M. Cameron break; 28781d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2879d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 28801d5e2ed0SStephen M. Cameron break; 288125163bd5SWebb Scales case CMD_CTLR_LOCKUP: 288225163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 288325163bd5SWebb Scales break; 2884edd16368SStephen M. Cameron default: 2885d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2886d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2887edd16368SStephen M. Cameron ei->CommandStatus); 2888edd16368SStephen M. Cameron } 2889edd16368SStephen M. Cameron } 2890edd16368SStephen M. Cameron 2891edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2892b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2893edd16368SStephen M. Cameron unsigned char bufsize) 2894edd16368SStephen M. Cameron { 2895edd16368SStephen M. Cameron int rc = IO_OK; 2896edd16368SStephen M. Cameron struct CommandList *c; 2897edd16368SStephen M. Cameron struct ErrorInfo *ei; 2898edd16368SStephen M. Cameron 289945fcb86eSStephen Cameron c = cmd_alloc(h); 2900edd16368SStephen M. Cameron 2901a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2902a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2903a2dac136SStephen M. Cameron rc = -1; 2904a2dac136SStephen M. Cameron goto out; 2905a2dac136SStephen M. Cameron } 290625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2907c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 290825163bd5SWebb Scales if (rc) 290925163bd5SWebb Scales goto out; 2910edd16368SStephen M. Cameron ei = c->err_info; 2911edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2912d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2913edd16368SStephen M. Cameron rc = -1; 2914edd16368SStephen M. Cameron } 2915a2dac136SStephen M. Cameron out: 291645fcb86eSStephen Cameron cmd_free(h, c); 2917edd16368SStephen M. Cameron return rc; 2918edd16368SStephen M. Cameron } 2919edd16368SStephen M. Cameron 2920bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 292125163bd5SWebb Scales u8 reset_type, int reply_queue) 2922edd16368SStephen M. Cameron { 2923edd16368SStephen M. Cameron int rc = IO_OK; 2924edd16368SStephen M. Cameron struct CommandList *c; 2925edd16368SStephen M. Cameron struct ErrorInfo *ei; 2926edd16368SStephen M. Cameron 292745fcb86eSStephen Cameron c = cmd_alloc(h); 2928edd16368SStephen M. Cameron 2929edd16368SStephen M. Cameron 2930a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29310b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2932bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2933c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 293425163bd5SWebb Scales if (rc) { 293525163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 293625163bd5SWebb Scales goto out; 293725163bd5SWebb Scales } 2938edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2939edd16368SStephen M. Cameron 2940edd16368SStephen M. Cameron ei = c->err_info; 2941edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2942d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2943edd16368SStephen M. Cameron rc = -1; 2944edd16368SStephen M. Cameron } 294525163bd5SWebb Scales out: 294645fcb86eSStephen Cameron cmd_free(h, c); 2947edd16368SStephen M. Cameron return rc; 2948edd16368SStephen M. Cameron } 2949edd16368SStephen M. Cameron 2950d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2951d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2952d604f533SWebb Scales unsigned char *scsi3addr) 2953d604f533SWebb Scales { 2954d604f533SWebb Scales int i; 2955d604f533SWebb Scales bool match = false; 2956d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2957d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2958d604f533SWebb Scales 2959d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2960d604f533SWebb Scales return false; 2961d604f533SWebb Scales 2962d604f533SWebb Scales switch (c->cmd_type) { 2963d604f533SWebb Scales case CMD_SCSI: 2964d604f533SWebb Scales case CMD_IOCTL_PEND: 2965d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2966d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2967d604f533SWebb Scales break; 2968d604f533SWebb Scales 2969d604f533SWebb Scales case CMD_IOACCEL1: 2970d604f533SWebb Scales case CMD_IOACCEL2: 2971d604f533SWebb Scales if (c->phys_disk == dev) { 2972d604f533SWebb Scales /* HBA mode match */ 2973d604f533SWebb Scales match = true; 2974d604f533SWebb Scales } else { 2975d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2976d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2977d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2978d604f533SWebb Scales * instead. */ 2979d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2980d604f533SWebb Scales /* FIXME: an alternate test might be 2981d604f533SWebb Scales * 2982d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2983d604f533SWebb Scales * == c2->scsi_nexus; */ 2984d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2985d604f533SWebb Scales } 2986d604f533SWebb Scales } 2987d604f533SWebb Scales break; 2988d604f533SWebb Scales 2989d604f533SWebb Scales case IOACCEL2_TMF: 2990d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2991d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2992d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2993d604f533SWebb Scales } 2994d604f533SWebb Scales break; 2995d604f533SWebb Scales 2996d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2997d604f533SWebb Scales match = false; 2998d604f533SWebb Scales break; 2999d604f533SWebb Scales 3000d604f533SWebb Scales default: 3001d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3002d604f533SWebb Scales c->cmd_type); 3003d604f533SWebb Scales BUG(); 3004d604f533SWebb Scales } 3005d604f533SWebb Scales 3006d604f533SWebb Scales return match; 3007d604f533SWebb Scales } 3008d604f533SWebb Scales 3009d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3010d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3011d604f533SWebb Scales { 3012d604f533SWebb Scales int i; 3013d604f533SWebb Scales int rc = 0; 3014d604f533SWebb Scales 3015d604f533SWebb Scales /* We can really only handle one reset at a time */ 3016d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3017d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3018d604f533SWebb Scales return -EINTR; 3019d604f533SWebb Scales } 3020d604f533SWebb Scales 3021d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3022d604f533SWebb Scales 3023d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3024d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3025d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3026d604f533SWebb Scales 3027d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3028d604f533SWebb Scales unsigned long flags; 3029d604f533SWebb Scales 3030d604f533SWebb Scales /* 3031d604f533SWebb Scales * Mark the target command as having a reset pending, 3032d604f533SWebb Scales * then lock a lock so that the command cannot complete 3033d604f533SWebb Scales * while we're considering it. If the command is not 3034d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3035d604f533SWebb Scales */ 3036d604f533SWebb Scales c->reset_pending = dev; 3037d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3038d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3039d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3040d604f533SWebb Scales else 3041d604f533SWebb Scales c->reset_pending = NULL; 3042d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3043d604f533SWebb Scales } 3044d604f533SWebb Scales 3045d604f533SWebb Scales cmd_free(h, c); 3046d604f533SWebb Scales } 3047d604f533SWebb Scales 3048d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3049d604f533SWebb Scales if (!rc) 3050d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3051d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3052d604f533SWebb Scales lockup_detected(h)); 3053d604f533SWebb Scales 3054d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3055d604f533SWebb Scales dev_warn(&h->pdev->dev, 3056d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3057d604f533SWebb Scales rc = -ENODEV; 3058d604f533SWebb Scales } 3059d604f533SWebb Scales 3060d604f533SWebb Scales if (unlikely(rc)) 3061d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3062d604f533SWebb Scales 3063d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3064d604f533SWebb Scales return rc; 3065d604f533SWebb Scales } 3066d604f533SWebb Scales 3067edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3068edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3069edd16368SStephen M. Cameron { 3070edd16368SStephen M. Cameron int rc; 3071edd16368SStephen M. Cameron unsigned char *buf; 3072edd16368SStephen M. Cameron 3073edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3074edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3075edd16368SStephen M. Cameron if (!buf) 3076edd16368SStephen M. Cameron return; 3077b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 3078edd16368SStephen M. Cameron if (rc == 0) 3079edd16368SStephen M. Cameron *raid_level = buf[8]; 3080edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3081edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3082edd16368SStephen M. Cameron kfree(buf); 3083edd16368SStephen M. Cameron return; 3084edd16368SStephen M. Cameron } 3085edd16368SStephen M. Cameron 3086283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3087283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3088283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3089283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3090283b4a9bSStephen M. Cameron { 3091283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3092283b4a9bSStephen M. Cameron int map, row, col; 3093283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3094283b4a9bSStephen M. Cameron 3095283b4a9bSStephen M. Cameron if (rc != 0) 3096283b4a9bSStephen M. Cameron return; 3097283b4a9bSStephen M. Cameron 30982ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 30992ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31002ba8bfc8SStephen M. Cameron return; 31012ba8bfc8SStephen M. Cameron 3102283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3103283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3104283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3105283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3106283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3107283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3108283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3109283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3110283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3111283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3112283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3113283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3114283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3115283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3116283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3117283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3118283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3119283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3120283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3121283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3122283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3123283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3124283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3125283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31262b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3127dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31282b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31292b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31302b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3131dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3132dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3133283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3134283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3135283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3136283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3137283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3138283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3139283b4a9bSStephen M. Cameron disks_per_row = 3140283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3141283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3142283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3143283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3144283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3145283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3146283b4a9bSStephen M. Cameron disks_per_row = 3147283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3148283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3149283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3150283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3151283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3152283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3153283b4a9bSStephen M. Cameron } 3154283b4a9bSStephen M. Cameron } 3155283b4a9bSStephen M. Cameron } 3156283b4a9bSStephen M. Cameron #else 3157283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3158283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3159283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3160283b4a9bSStephen M. Cameron { 3161283b4a9bSStephen M. Cameron } 3162283b4a9bSStephen M. Cameron #endif 3163283b4a9bSStephen M. Cameron 3164283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3165283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3166283b4a9bSStephen M. Cameron { 3167283b4a9bSStephen M. Cameron int rc = 0; 3168283b4a9bSStephen M. Cameron struct CommandList *c; 3169283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3170283b4a9bSStephen M. Cameron 317145fcb86eSStephen Cameron c = cmd_alloc(h); 3172bf43caf3SRobert Elliott 3173283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3174283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3175283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 31762dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 31772dd02d74SRobert Elliott cmd_free(h, c); 31782dd02d74SRobert Elliott return -1; 3179283b4a9bSStephen M. Cameron } 318025163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3181c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 318225163bd5SWebb Scales if (rc) 318325163bd5SWebb Scales goto out; 3184283b4a9bSStephen M. Cameron ei = c->err_info; 3185283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3186d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 318725163bd5SWebb Scales rc = -1; 318825163bd5SWebb Scales goto out; 3189283b4a9bSStephen M. Cameron } 319045fcb86eSStephen Cameron cmd_free(h, c); 3191283b4a9bSStephen M. Cameron 3192283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3193283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3194283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3195283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3196283b4a9bSStephen M. Cameron rc = -1; 3197283b4a9bSStephen M. Cameron } 3198283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3199283b4a9bSStephen M. Cameron return rc; 320025163bd5SWebb Scales out: 320125163bd5SWebb Scales cmd_free(h, c); 320225163bd5SWebb Scales return rc; 3203283b4a9bSStephen M. Cameron } 3204283b4a9bSStephen M. Cameron 3205d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3206d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3207d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3208d04e62b9SKevin Barnett { 3209d04e62b9SKevin Barnett int rc = IO_OK; 3210d04e62b9SKevin Barnett struct CommandList *c; 3211d04e62b9SKevin Barnett struct ErrorInfo *ei; 3212d04e62b9SKevin Barnett 3213d04e62b9SKevin Barnett c = cmd_alloc(h); 3214d04e62b9SKevin Barnett 3215d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3216d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3217d04e62b9SKevin Barnett if (rc) 3218d04e62b9SKevin Barnett goto out; 3219d04e62b9SKevin Barnett 3220d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3221d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3222d04e62b9SKevin Barnett 3223d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3224c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3225d04e62b9SKevin Barnett if (rc) 3226d04e62b9SKevin Barnett goto out; 3227d04e62b9SKevin Barnett ei = c->err_info; 3228d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3229d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3230d04e62b9SKevin Barnett rc = -1; 3231d04e62b9SKevin Barnett } 3232d04e62b9SKevin Barnett out: 3233d04e62b9SKevin Barnett cmd_free(h, c); 3234d04e62b9SKevin Barnett return rc; 3235d04e62b9SKevin Barnett } 3236d04e62b9SKevin Barnett 323766749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 323866749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 323966749d0dSScott Teel { 324066749d0dSScott Teel int rc = IO_OK; 324166749d0dSScott Teel struct CommandList *c; 324266749d0dSScott Teel struct ErrorInfo *ei; 324366749d0dSScott Teel 324466749d0dSScott Teel c = cmd_alloc(h); 324566749d0dSScott Teel 324666749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 324766749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 324866749d0dSScott Teel if (rc) 324966749d0dSScott Teel goto out; 325066749d0dSScott Teel 325166749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3252c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 325366749d0dSScott Teel if (rc) 325466749d0dSScott Teel goto out; 325566749d0dSScott Teel ei = c->err_info; 325666749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 325766749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 325866749d0dSScott Teel rc = -1; 325966749d0dSScott Teel } 326066749d0dSScott Teel out: 326166749d0dSScott Teel cmd_free(h, c); 326266749d0dSScott Teel return rc; 326366749d0dSScott Teel } 326466749d0dSScott Teel 326503383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 326603383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 326703383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 326803383736SDon Brace { 326903383736SDon Brace int rc = IO_OK; 327003383736SDon Brace struct CommandList *c; 327103383736SDon Brace struct ErrorInfo *ei; 327203383736SDon Brace 327303383736SDon Brace c = cmd_alloc(h); 327403383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 327503383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 327603383736SDon Brace if (rc) 327703383736SDon Brace goto out; 327803383736SDon Brace 327903383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 328003383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 328103383736SDon Brace 328225163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3283c448ecfaSDon Brace DEFAULT_TIMEOUT); 328403383736SDon Brace ei = c->err_info; 328503383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 328603383736SDon Brace hpsa_scsi_interpret_error(h, c); 328703383736SDon Brace rc = -1; 328803383736SDon Brace } 328903383736SDon Brace out: 329003383736SDon Brace cmd_free(h, c); 3291d04e62b9SKevin Barnett 329203383736SDon Brace return rc; 329303383736SDon Brace } 329403383736SDon Brace 3295cca8f13bSDon Brace /* 3296cca8f13bSDon Brace * get enclosure information 3297cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3298cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3299cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3300cca8f13bSDon Brace */ 3301cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3302cca8f13bSDon Brace unsigned char *scsi3addr, 3303cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3304cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3305cca8f13bSDon Brace { 3306cca8f13bSDon Brace int rc = -1; 3307cca8f13bSDon Brace struct CommandList *c = NULL; 3308cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3309cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3310cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3311cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3312cca8f13bSDon Brace u16 bmic_device_index = 0; 3313cca8f13bSDon Brace 3314cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3315cca8f13bSDon Brace 331617a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 331717a9e54aSDon Brace rc = IO_OK; 3318cca8f13bSDon Brace goto out; 331917a9e54aSDon Brace } 3320cca8f13bSDon Brace 3321cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3322cca8f13bSDon Brace if (!bssbp) 3323cca8f13bSDon Brace goto out; 3324cca8f13bSDon Brace 3325cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3326cca8f13bSDon Brace if (!id_phys) 3327cca8f13bSDon Brace goto out; 3328cca8f13bSDon Brace 3329cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3330cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3331cca8f13bSDon Brace if (rc) { 3332cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3333cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3334cca8f13bSDon Brace goto out; 3335cca8f13bSDon Brace } 3336cca8f13bSDon Brace 3337cca8f13bSDon Brace c = cmd_alloc(h); 3338cca8f13bSDon Brace 3339cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3340cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3341cca8f13bSDon Brace 3342cca8f13bSDon Brace if (rc) 3343cca8f13bSDon Brace goto out; 3344cca8f13bSDon Brace 3345cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3346cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3347cca8f13bSDon Brace else 3348cca8f13bSDon Brace c->Request.CDB[5] = 0; 3349cca8f13bSDon Brace 3350cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3351c448ecfaSDon Brace DEFAULT_TIMEOUT); 3352cca8f13bSDon Brace if (rc) 3353cca8f13bSDon Brace goto out; 3354cca8f13bSDon Brace 3355cca8f13bSDon Brace ei = c->err_info; 3356cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3357cca8f13bSDon Brace rc = -1; 3358cca8f13bSDon Brace goto out; 3359cca8f13bSDon Brace } 3360cca8f13bSDon Brace 3361cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3362cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3363cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3364cca8f13bSDon Brace 3365cca8f13bSDon Brace rc = IO_OK; 3366cca8f13bSDon Brace out: 3367cca8f13bSDon Brace kfree(bssbp); 3368cca8f13bSDon Brace kfree(id_phys); 3369cca8f13bSDon Brace 3370cca8f13bSDon Brace if (c) 3371cca8f13bSDon Brace cmd_free(h, c); 3372cca8f13bSDon Brace 3373cca8f13bSDon Brace if (rc != IO_OK) 3374cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3375cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3376cca8f13bSDon Brace } 3377cca8f13bSDon Brace 3378d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3379d04e62b9SKevin Barnett unsigned char *scsi3addr) 3380d04e62b9SKevin Barnett { 3381d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3382d04e62b9SKevin Barnett u32 nphysicals; 3383d04e62b9SKevin Barnett u64 sa = 0; 3384d04e62b9SKevin Barnett int i; 3385d04e62b9SKevin Barnett 3386d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3387d04e62b9SKevin Barnett if (!physdev) 3388d04e62b9SKevin Barnett return 0; 3389d04e62b9SKevin Barnett 3390d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3391d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3392d04e62b9SKevin Barnett kfree(physdev); 3393d04e62b9SKevin Barnett return 0; 3394d04e62b9SKevin Barnett } 3395d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3396d04e62b9SKevin Barnett 3397d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3398d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3399d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3400d04e62b9SKevin Barnett break; 3401d04e62b9SKevin Barnett } 3402d04e62b9SKevin Barnett 3403d04e62b9SKevin Barnett kfree(physdev); 3404d04e62b9SKevin Barnett 3405d04e62b9SKevin Barnett return sa; 3406d04e62b9SKevin Barnett } 3407d04e62b9SKevin Barnett 3408d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3409d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3410d04e62b9SKevin Barnett { 3411d04e62b9SKevin Barnett int rc; 3412d04e62b9SKevin Barnett u64 sa = 0; 3413d04e62b9SKevin Barnett 3414d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3415d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3416d04e62b9SKevin Barnett 3417d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3418d04e62b9SKevin Barnett if (ssi == NULL) { 3419d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3420d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3421d04e62b9SKevin Barnett return; 3422d04e62b9SKevin Barnett } 3423d04e62b9SKevin Barnett 3424d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3425d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3426d04e62b9SKevin Barnett if (rc == 0) { 3427d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3428d04e62b9SKevin Barnett h->sas_address = sa; 3429d04e62b9SKevin Barnett } 3430d04e62b9SKevin Barnett 3431d04e62b9SKevin Barnett kfree(ssi); 3432d04e62b9SKevin Barnett } else 3433d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3434d04e62b9SKevin Barnett 3435d04e62b9SKevin Barnett dev->sas_address = sa; 3436d04e62b9SKevin Barnett } 3437d04e62b9SKevin Barnett 3438d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34391b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 34401b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34411b70150aSStephen M. Cameron { 34421b70150aSStephen M. Cameron int rc; 34431b70150aSStephen M. Cameron int i; 34441b70150aSStephen M. Cameron int pages; 34451b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34461b70150aSStephen M. Cameron 34471b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34481b70150aSStephen M. Cameron if (!buf) 34491b70150aSStephen M. Cameron return 0; 34501b70150aSStephen M. Cameron 34511b70150aSStephen M. Cameron /* Get the size of the page list first */ 34521b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34531b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34541b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34551b70150aSStephen M. Cameron if (rc != 0) 34561b70150aSStephen M. Cameron goto exit_unsupported; 34571b70150aSStephen M. Cameron pages = buf[3]; 34581b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34591b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34601b70150aSStephen M. Cameron else 34611b70150aSStephen M. Cameron bufsize = 255; 34621b70150aSStephen M. Cameron 34631b70150aSStephen M. Cameron /* Get the whole VPD page list */ 34641b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34651b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34661b70150aSStephen M. Cameron buf, bufsize); 34671b70150aSStephen M. Cameron if (rc != 0) 34681b70150aSStephen M. Cameron goto exit_unsupported; 34691b70150aSStephen M. Cameron 34701b70150aSStephen M. Cameron pages = buf[3]; 34711b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 34721b70150aSStephen M. Cameron if (buf[3 + i] == page) 34731b70150aSStephen M. Cameron goto exit_supported; 34741b70150aSStephen M. Cameron exit_unsupported: 34751b70150aSStephen M. Cameron kfree(buf); 34761b70150aSStephen M. Cameron return 0; 34771b70150aSStephen M. Cameron exit_supported: 34781b70150aSStephen M. Cameron kfree(buf); 34791b70150aSStephen M. Cameron return 1; 34801b70150aSStephen M. Cameron } 34811b70150aSStephen M. Cameron 3482283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3483283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3484283b4a9bSStephen M. Cameron { 3485283b4a9bSStephen M. Cameron int rc; 3486283b4a9bSStephen M. Cameron unsigned char *buf; 3487283b4a9bSStephen M. Cameron u8 ioaccel_status; 3488283b4a9bSStephen M. Cameron 3489283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3490283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 349141ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3492283b4a9bSStephen M. Cameron 3493283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3494283b4a9bSStephen M. Cameron if (!buf) 3495283b4a9bSStephen M. Cameron return; 34961b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 34971b70150aSStephen M. Cameron goto out; 3498283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3499b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3500283b4a9bSStephen M. Cameron if (rc != 0) 3501283b4a9bSStephen M. Cameron goto out; 3502283b4a9bSStephen M. Cameron 3503283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3504283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3505283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3506283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3507283b4a9bSStephen M. Cameron this_device->offload_config = 3508283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3509283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3510283b4a9bSStephen M. Cameron this_device->offload_enabled = 3511283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3512283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3513283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3514283b4a9bSStephen M. Cameron } 351541ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3516283b4a9bSStephen M. Cameron out: 3517283b4a9bSStephen M. Cameron kfree(buf); 3518283b4a9bSStephen M. Cameron return; 3519283b4a9bSStephen M. Cameron } 3520283b4a9bSStephen M. Cameron 3521edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3522edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 352375d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3524edd16368SStephen M. Cameron { 3525edd16368SStephen M. Cameron int rc; 3526edd16368SStephen M. Cameron unsigned char *buf; 3527edd16368SStephen M. Cameron 3528edd16368SStephen M. Cameron if (buflen > 16) 3529edd16368SStephen M. Cameron buflen = 16; 3530edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3531edd16368SStephen M. Cameron if (!buf) 3532a84d794dSStephen M. Cameron return -ENOMEM; 3533b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3534edd16368SStephen M. Cameron if (rc == 0) 353575d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 353675d23d89SDon Brace 3537edd16368SStephen M. Cameron kfree(buf); 353875d23d89SDon Brace 3539edd16368SStephen M. Cameron return rc != 0; 3540edd16368SStephen M. Cameron } 3541edd16368SStephen M. Cameron 3542edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 354303383736SDon Brace void *buf, int bufsize, 3544edd16368SStephen M. Cameron int extended_response) 3545edd16368SStephen M. Cameron { 3546edd16368SStephen M. Cameron int rc = IO_OK; 3547edd16368SStephen M. Cameron struct CommandList *c; 3548edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3549edd16368SStephen M. Cameron struct ErrorInfo *ei; 3550edd16368SStephen M. Cameron 355145fcb86eSStephen Cameron c = cmd_alloc(h); 3552bf43caf3SRobert Elliott 3553e89c0ae7SStephen M. Cameron /* address the controller */ 3554e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3555a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3556a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3557a2dac136SStephen M. Cameron rc = -1; 3558a2dac136SStephen M. Cameron goto out; 3559a2dac136SStephen M. Cameron } 3560edd16368SStephen M. Cameron if (extended_response) 3561edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 356225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3563c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 356425163bd5SWebb Scales if (rc) 356525163bd5SWebb Scales goto out; 3566edd16368SStephen M. Cameron ei = c->err_info; 3567edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3568edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3569d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3570edd16368SStephen M. Cameron rc = -1; 3571283b4a9bSStephen M. Cameron } else { 357203383736SDon Brace struct ReportLUNdata *rld = buf; 357303383736SDon Brace 357403383736SDon Brace if (rld->extended_response_flag != extended_response) { 3575283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3576283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3577283b4a9bSStephen M. Cameron extended_response, 357803383736SDon Brace rld->extended_response_flag); 3579283b4a9bSStephen M. Cameron rc = -1; 3580283b4a9bSStephen M. Cameron } 3581edd16368SStephen M. Cameron } 3582a2dac136SStephen M. Cameron out: 358345fcb86eSStephen Cameron cmd_free(h, c); 3584edd16368SStephen M. Cameron return rc; 3585edd16368SStephen M. Cameron } 3586edd16368SStephen M. Cameron 3587edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 358803383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3589edd16368SStephen M. Cameron { 359003383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 359103383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3592edd16368SStephen M. Cameron } 3593edd16368SStephen M. Cameron 3594edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3595edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3596edd16368SStephen M. Cameron { 3597edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3598edd16368SStephen M. Cameron } 3599edd16368SStephen M. Cameron 3600edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3601edd16368SStephen M. Cameron int bus, int target, int lun) 3602edd16368SStephen M. Cameron { 3603edd16368SStephen M. Cameron device->bus = bus; 3604edd16368SStephen M. Cameron device->target = target; 3605edd16368SStephen M. Cameron device->lun = lun; 3606edd16368SStephen M. Cameron } 3607edd16368SStephen M. Cameron 36089846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36099846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36109846590eSStephen M. Cameron unsigned char scsi3addr[]) 36119846590eSStephen M. Cameron { 36129846590eSStephen M. Cameron int rc; 36139846590eSStephen M. Cameron int status; 36149846590eSStephen M. Cameron int size; 36159846590eSStephen M. Cameron unsigned char *buf; 36169846590eSStephen M. Cameron 36179846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36189846590eSStephen M. Cameron if (!buf) 36199846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36209846590eSStephen M. Cameron 36219846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 362224a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36239846590eSStephen M. Cameron goto exit_failed; 36249846590eSStephen M. Cameron 36259846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36269846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36279846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 362824a4b078SStephen M. Cameron if (rc != 0) 36299846590eSStephen M. Cameron goto exit_failed; 36309846590eSStephen M. Cameron size = buf[3]; 36319846590eSStephen M. Cameron 36329846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36339846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36349846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 363524a4b078SStephen M. Cameron if (rc != 0) 36369846590eSStephen M. Cameron goto exit_failed; 36379846590eSStephen M. Cameron status = buf[4]; /* status byte */ 36389846590eSStephen M. Cameron 36399846590eSStephen M. Cameron kfree(buf); 36409846590eSStephen M. Cameron return status; 36419846590eSStephen M. Cameron exit_failed: 36429846590eSStephen M. Cameron kfree(buf); 36439846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36449846590eSStephen M. Cameron } 36459846590eSStephen M. Cameron 36469846590eSStephen M. Cameron /* Determine offline status of a volume. 36479846590eSStephen M. Cameron * Return either: 36489846590eSStephen M. Cameron * 0 (not offline) 364967955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 36509846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 36519846590eSStephen M. Cameron * describing why a volume is to be kept offline) 36529846590eSStephen M. Cameron */ 365367955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 36549846590eSStephen M. Cameron unsigned char scsi3addr[]) 36559846590eSStephen M. Cameron { 36569846590eSStephen M. Cameron struct CommandList *c; 36579437ac43SStephen Cameron unsigned char *sense; 36589437ac43SStephen Cameron u8 sense_key, asc, ascq; 36599437ac43SStephen Cameron int sense_len; 366025163bd5SWebb Scales int rc, ldstat = 0; 36619846590eSStephen M. Cameron u16 cmd_status; 36629846590eSStephen M. Cameron u8 scsi_status; 36639846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 36649846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 36659846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 36669846590eSStephen M. Cameron 36679846590eSStephen M. Cameron c = cmd_alloc(h); 3668bf43caf3SRobert Elliott 36699846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3670c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3671c448ecfaSDon Brace DEFAULT_TIMEOUT); 367225163bd5SWebb Scales if (rc) { 367325163bd5SWebb Scales cmd_free(h, c); 367425163bd5SWebb Scales return 0; 367525163bd5SWebb Scales } 36769846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 36779437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 36789437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 36799437ac43SStephen Cameron else 36809437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 36819437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 36829846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 36839846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 36849846590eSStephen M. Cameron cmd_free(h, c); 36859846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 36869846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 36879846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 36889846590eSStephen M. Cameron sense_key != NOT_READY || 36899846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 36909846590eSStephen M. Cameron return 0; 36919846590eSStephen M. Cameron } 36929846590eSStephen M. Cameron 36939846590eSStephen M. Cameron /* Determine the reason for not ready state */ 36949846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 36959846590eSStephen M. Cameron 36969846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 36979846590eSStephen M. Cameron switch (ldstat) { 36989846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 36995ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37009846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37019846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37029846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37039846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37049846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37059846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37069846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37079846590eSStephen M. Cameron return ldstat; 37089846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37099846590eSStephen M. Cameron /* If VPD status page isn't available, 37109846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37119846590eSStephen M. Cameron */ 37129846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37139846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37149846590eSStephen M. Cameron return ldstat; 37159846590eSStephen M. Cameron break; 37169846590eSStephen M. Cameron default: 37179846590eSStephen M. Cameron break; 37189846590eSStephen M. Cameron } 37199846590eSStephen M. Cameron return 0; 37209846590eSStephen M. Cameron } 37219846590eSStephen M. Cameron 37229b5c48c2SStephen Cameron /* 37239b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37249b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37259b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37269b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37279b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37289b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37299b5c48c2SStephen Cameron */ 37309b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37319b5c48c2SStephen Cameron unsigned char *scsi3addr) 37329b5c48c2SStephen Cameron { 37339b5c48c2SStephen Cameron struct CommandList *c; 37349b5c48c2SStephen Cameron struct ErrorInfo *ei; 37359b5c48c2SStephen Cameron int rc = 0; 37369b5c48c2SStephen Cameron 37379b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 37389b5c48c2SStephen Cameron 37399b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 37409b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 37419b5c48c2SStephen Cameron return 1; 37429b5c48c2SStephen Cameron 37439b5c48c2SStephen Cameron c = cmd_alloc(h); 3744bf43caf3SRobert Elliott 37459b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3746c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3747c448ecfaSDon Brace DEFAULT_TIMEOUT); 37489b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 37499b5c48c2SStephen Cameron ei = c->err_info; 37509b5c48c2SStephen Cameron switch (ei->CommandStatus) { 37519b5c48c2SStephen Cameron case CMD_INVALID: 37529b5c48c2SStephen Cameron rc = 0; 37539b5c48c2SStephen Cameron break; 37549b5c48c2SStephen Cameron case CMD_UNABORTABLE: 37559b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 37569b5c48c2SStephen Cameron rc = 1; 37579b5c48c2SStephen Cameron break; 37589437ac43SStephen Cameron case CMD_TMF_STATUS: 37599437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 37609437ac43SStephen Cameron break; 37619b5c48c2SStephen Cameron default: 37629b5c48c2SStephen Cameron rc = 0; 37639b5c48c2SStephen Cameron break; 37649b5c48c2SStephen Cameron } 37659b5c48c2SStephen Cameron cmd_free(h, c); 37669b5c48c2SStephen Cameron return rc; 37679b5c48c2SStephen Cameron } 37689b5c48c2SStephen Cameron 3769edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 37700b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 37710b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3772edd16368SStephen M. Cameron { 37730b0e1d6cSStephen M. Cameron 37740b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 37750b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 37760b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 37770b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 37780b0e1d6cSStephen M. Cameron 3779ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 37800b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3781683fc444SDon Brace int rc = 0; 3782edd16368SStephen M. Cameron 3783ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3784683fc444SDon Brace if (!inq_buff) { 3785683fc444SDon Brace rc = -ENOMEM; 3786edd16368SStephen M. Cameron goto bail_out; 3787683fc444SDon Brace } 3788edd16368SStephen M. Cameron 3789edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3790edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3791edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3792edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3793edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3794edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3795683fc444SDon Brace rc = -EIO; 3796edd16368SStephen M. Cameron goto bail_out; 3797edd16368SStephen M. Cameron } 3798edd16368SStephen M. Cameron 37994af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38004af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 380175d23d89SDon Brace 3802edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3803edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3804edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3805edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3806edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3807edd16368SStephen M. Cameron sizeof(this_device->model)); 3808edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3809edd16368SStephen M. Cameron sizeof(this_device->device_id)); 381075d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3811edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3812edd16368SStephen M. Cameron 3813af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3814af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3815283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 381667955ba3SStephen M. Cameron int volume_offline; 381767955ba3SStephen M. Cameron 3818edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3819283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3820283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 382167955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 382267955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 382367955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 382467955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3825283b4a9bSStephen M. Cameron } else { 3826edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3827283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3828283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 382941ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3830a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 38319846590eSStephen M. Cameron this_device->volume_offline = 0; 383203383736SDon Brace this_device->queue_depth = h->nr_cmds; 3833283b4a9bSStephen M. Cameron } 3834edd16368SStephen M. Cameron 38350b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 38360b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 38370b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 38380b0e1d6cSStephen M. Cameron */ 38390b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 38400b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 38410b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 38420b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 38430b0e1d6cSStephen M. Cameron } 3844edd16368SStephen M. Cameron kfree(inq_buff); 3845edd16368SStephen M. Cameron return 0; 3846edd16368SStephen M. Cameron 3847edd16368SStephen M. Cameron bail_out: 3848edd16368SStephen M. Cameron kfree(inq_buff); 3849683fc444SDon Brace return rc; 3850edd16368SStephen M. Cameron } 3851edd16368SStephen M. Cameron 38529b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 38539b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 38549b5c48c2SStephen Cameron { 38559b5c48c2SStephen Cameron unsigned long flags; 38569b5c48c2SStephen Cameron int rc, entry; 38579b5c48c2SStephen Cameron /* 38589b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 38599b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 38609b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 38619b5c48c2SStephen Cameron */ 38629b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 38639b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 38649b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 38659b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 38669b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 38679b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 38689b5c48c2SStephen Cameron } else { 38699b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 38709b5c48c2SStephen Cameron dev->supports_aborts = 38719b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 38729b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 38739b5c48c2SStephen Cameron dev->supports_aborts = 0; 38749b5c48c2SStephen Cameron } 38759b5c48c2SStephen Cameron } 38769b5c48c2SStephen Cameron 3877c795505aSKevin Barnett /* 3878c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3879edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3880edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3881edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3882edd16368SStephen M. Cameron */ 3883edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 38841f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3885edd16368SStephen M. Cameron { 3886c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3887edd16368SStephen M. Cameron 38881f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 38891f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 38901f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3891c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3892c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 38931f310bdeSStephen M. Cameron else 38941f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3895c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3896c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 38971f310bdeSStephen M. Cameron return; 38981f310bdeSStephen M. Cameron } 38991f310bdeSStephen M. Cameron /* It's a logical device */ 390066749d0dSScott Teel if (device->external) { 39011f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3902c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3903c795505aSKevin Barnett lunid & 0x00ff); 39041f310bdeSStephen M. Cameron return; 3905339b2b14SStephen M. Cameron } 3906c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3907c795505aSKevin Barnett 0, lunid & 0x3fff); 3908edd16368SStephen M. Cameron } 3909edd16368SStephen M. Cameron 3910edd16368SStephen M. Cameron 3911edd16368SStephen M. Cameron /* 391254b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 391354b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 391454b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 391554b6e9e9SScott Teel * 3. Return: 391654b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 391754b6e9e9SScott Teel * 0 if no matching physical disk was found. 391854b6e9e9SScott Teel */ 391954b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 392054b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 392154b6e9e9SScott Teel { 392241ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 392341ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 392441ce4c35SStephen Cameron unsigned long flags; 392554b6e9e9SScott Teel int i; 392654b6e9e9SScott Teel 392741ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 392841ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 392941ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 393041ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 393141ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 393241ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 393354b6e9e9SScott Teel return 1; 393454b6e9e9SScott Teel } 393541ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 393641ce4c35SStephen Cameron return 0; 393741ce4c35SStephen Cameron } 393841ce4c35SStephen Cameron 393966749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 394066749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 394166749d0dSScott Teel { 394266749d0dSScott Teel /* In report logicals, local logicals are listed first, 394366749d0dSScott Teel * then any externals. 394466749d0dSScott Teel */ 394566749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 394666749d0dSScott Teel 394766749d0dSScott Teel if (i == raid_ctlr_position) 394866749d0dSScott Teel return 0; 394966749d0dSScott Teel 395066749d0dSScott Teel if (i < logicals_start) 395166749d0dSScott Teel return 0; 395266749d0dSScott Teel 395366749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 395466749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 395566749d0dSScott Teel return 0; 395666749d0dSScott Teel 395766749d0dSScott Teel return 1; /* it's an external lun */ 395866749d0dSScott Teel } 395966749d0dSScott Teel 396054b6e9e9SScott Teel /* 3961edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3962edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3963edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3964edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3965edd16368SStephen M. Cameron */ 3966edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 396703383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 396801a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3969edd16368SStephen M. Cameron { 397003383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3971edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3972edd16368SStephen M. Cameron return -1; 3973edd16368SStephen M. Cameron } 397403383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3975edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 397603383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 397703383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3978edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3979edd16368SStephen M. Cameron } 398003383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3981edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3982edd16368SStephen M. Cameron return -1; 3983edd16368SStephen M. Cameron } 39846df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3985edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3986edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3987edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3988edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3989edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3990edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3991edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3992edd16368SStephen M. Cameron } 3993edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3994edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3995edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3996edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3997edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3998edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3999edd16368SStephen M. Cameron } 4000edd16368SStephen M. Cameron return 0; 4001edd16368SStephen M. Cameron } 4002edd16368SStephen M. Cameron 400342a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 400442a91641SDon Brace int i, int nphysicals, int nlogicals, 4005a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4006339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4007339b2b14SStephen M. Cameron { 4008339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4009339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4010339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4011339b2b14SStephen M. Cameron */ 4012339b2b14SStephen M. Cameron 4013339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4014339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4015339b2b14SStephen M. Cameron 4016339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4017339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4018339b2b14SStephen M. Cameron 4019339b2b14SStephen M. Cameron if (i < logicals_start) 4020d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4021d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4022339b2b14SStephen M. Cameron 4023339b2b14SStephen M. Cameron if (i < last_device) 4024339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4025339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4026339b2b14SStephen M. Cameron BUG(); 4027339b2b14SStephen M. Cameron return NULL; 4028339b2b14SStephen M. Cameron } 4029339b2b14SStephen M. Cameron 403003383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 403103383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 403203383736SDon Brace struct hpsa_scsi_dev_t *dev, 4033f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 403403383736SDon Brace struct bmic_identify_physical_device *id_phys) 403503383736SDon Brace { 403603383736SDon Brace int rc; 4037f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 403803383736SDon Brace 403903383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4040f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4041a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 404203383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4043f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4044f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 404503383736SDon Brace sizeof(*id_phys)); 404603383736SDon Brace if (!rc) 404703383736SDon Brace /* Reserve space for FW operations */ 404803383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 404903383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 405003383736SDon Brace dev->queue_depth = 405103383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 405203383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 405303383736SDon Brace else 405403383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 405503383736SDon Brace } 405603383736SDon Brace 40578270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4058f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 40598270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 40608270b862SJoe Handzik { 4061f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4062f2039b03SDon Brace 4063f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 40648270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 40658270b862SJoe Handzik 40668270b862SJoe Handzik memcpy(&this_device->active_path_index, 40678270b862SJoe Handzik &id_phys->active_path_number, 40688270b862SJoe Handzik sizeof(this_device->active_path_index)); 40698270b862SJoe Handzik memcpy(&this_device->path_map, 40708270b862SJoe Handzik &id_phys->redundant_path_present_map, 40718270b862SJoe Handzik sizeof(this_device->path_map)); 40728270b862SJoe Handzik memcpy(&this_device->box, 40738270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 40748270b862SJoe Handzik sizeof(this_device->box)); 40758270b862SJoe Handzik memcpy(&this_device->phys_connector, 40768270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 40778270b862SJoe Handzik sizeof(this_device->phys_connector)); 40788270b862SJoe Handzik memcpy(&this_device->bay, 40798270b862SJoe Handzik &id_phys->phys_bay_in_box, 40808270b862SJoe Handzik sizeof(this_device->bay)); 40818270b862SJoe Handzik } 40828270b862SJoe Handzik 408366749d0dSScott Teel /* get number of local logical disks. */ 408466749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 408566749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 408666749d0dSScott Teel u32 *nlocals) 408766749d0dSScott Teel { 408866749d0dSScott Teel int rc; 408966749d0dSScott Teel 409066749d0dSScott Teel if (!id_ctlr) { 409166749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 409266749d0dSScott Teel __func__); 409366749d0dSScott Teel return -ENOMEM; 409466749d0dSScott Teel } 409566749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 409666749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 409766749d0dSScott Teel if (!rc) 409866749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 409966749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 410066749d0dSScott Teel else 410166749d0dSScott Teel *nlocals = le16_to_cpu( 410266749d0dSScott Teel id_ctlr->extended_logical_unit_count); 410366749d0dSScott Teel else 410466749d0dSScott Teel *nlocals = -1; 410566749d0dSScott Teel return rc; 410666749d0dSScott Teel } 410766749d0dSScott Teel 410864ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 410964ce60caSDon Brace { 411064ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 411164ce60caSDon Brace bool is_spare = false; 411264ce60caSDon Brace int rc; 411364ce60caSDon Brace 411464ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 411564ce60caSDon Brace if (!id_phys) 411664ce60caSDon Brace return false; 411764ce60caSDon Brace 411864ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 411964ce60caSDon Brace lunaddrbytes, 412064ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 412164ce60caSDon Brace id_phys, sizeof(*id_phys)); 412264ce60caSDon Brace if (rc == 0) 412364ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 412464ce60caSDon Brace 412564ce60caSDon Brace kfree(id_phys); 412664ce60caSDon Brace return is_spare; 412764ce60caSDon Brace } 412864ce60caSDon Brace 412964ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 413064ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 413164ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 413264ce60caSDon Brace 413364ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 413464ce60caSDon Brace 413564ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 413664ce60caSDon Brace struct ext_report_lun_entry *rle) 413764ce60caSDon Brace { 413864ce60caSDon Brace u8 device_flags; 413964ce60caSDon Brace u8 device_type; 414064ce60caSDon Brace 414164ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 414264ce60caSDon Brace return false; 414364ce60caSDon Brace 414464ce60caSDon Brace device_flags = rle->device_flags; 414564ce60caSDon Brace device_type = rle->device_type; 414664ce60caSDon Brace 414764ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 414864ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 414964ce60caSDon Brace return false; 415064ce60caSDon Brace return true; 415164ce60caSDon Brace } 415264ce60caSDon Brace 415364ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 415464ce60caSDon Brace return false; 415564ce60caSDon Brace 415664ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 415764ce60caSDon Brace return false; 415864ce60caSDon Brace 415964ce60caSDon Brace /* 416064ce60caSDon Brace * Spares may be spun down, we do not want to 416164ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 416264ce60caSDon Brace * that would have them spun up, that is a 416364ce60caSDon Brace * performance hit because I/O to the RAID device 416464ce60caSDon Brace * stops while the spin up occurs which can take 416564ce60caSDon Brace * over 50 seconds. 416664ce60caSDon Brace */ 416764ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 416864ce60caSDon Brace return true; 416964ce60caSDon Brace 417064ce60caSDon Brace return false; 417164ce60caSDon Brace } 417266749d0dSScott Teel 41738aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4174edd16368SStephen M. Cameron { 4175edd16368SStephen M. Cameron /* the idea here is we could get notified 4176edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4177edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4178edd16368SStephen M. Cameron * our list of devices accordingly. 4179edd16368SStephen M. Cameron * 4180edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4181edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4182edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4183edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4184edd16368SStephen M. Cameron */ 4185a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4186edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 418703383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 418866749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 418901a02ffcSStephen M. Cameron u32 nphysicals = 0; 419001a02ffcSStephen M. Cameron u32 nlogicals = 0; 419166749d0dSScott Teel u32 nlocal_logicals = 0; 419201a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4193edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4194edd16368SStephen M. Cameron int ncurrent = 0; 41954f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4196339b2b14SStephen M. Cameron int raid_ctlr_position; 419704fa2f44SKevin Barnett bool physical_device; 4198aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4199edd16368SStephen M. Cameron 4200cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 420192084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 420292084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4203edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 420403383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 420566749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4206edd16368SStephen M. Cameron 420703383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 420866749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4209edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4210edd16368SStephen M. Cameron goto out; 4211edd16368SStephen M. Cameron } 4212edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4213edd16368SStephen M. Cameron 4214853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4215853633e8SDon Brace 421603383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4217853633e8SDon Brace logdev_list, &nlogicals)) { 4218853633e8SDon Brace h->drv_req_rescan = 1; 4219edd16368SStephen M. Cameron goto out; 4220853633e8SDon Brace } 4221edd16368SStephen M. Cameron 422266749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 422366749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 422466749d0dSScott Teel dev_warn(&h->pdev->dev, 422566749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 422666749d0dSScott Teel __func__); 422766749d0dSScott Teel } 4228edd16368SStephen M. Cameron 4229aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4230aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4231aca4a520SScott Teel * controller. 4232edd16368SStephen M. Cameron */ 4233aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4234edd16368SStephen M. Cameron 4235edd16368SStephen M. Cameron /* Allocate the per device structures */ 4236edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4237b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4238b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4239b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4240b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4241b7ec021fSScott Teel break; 4242b7ec021fSScott Teel } 4243b7ec021fSScott Teel 4244edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4245edd16368SStephen M. Cameron if (!currentsd[i]) { 4246edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4247edd16368SStephen M. Cameron __FILE__, __LINE__); 4248853633e8SDon Brace h->drv_req_rescan = 1; 4249edd16368SStephen M. Cameron goto out; 4250edd16368SStephen M. Cameron } 4251edd16368SStephen M. Cameron ndev_allocated++; 4252edd16368SStephen M. Cameron } 4253edd16368SStephen M. Cameron 42548645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4255339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4256339b2b14SStephen M. Cameron else 4257339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4258339b2b14SStephen M. Cameron 4259edd16368SStephen M. Cameron /* adjust our table of devices */ 42604f4eb9f1SScott Teel n_ext_target_devs = 0; 4261edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 42620b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4263683fc444SDon Brace int rc = 0; 4264f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 426564ce60caSDon Brace bool skip_device = false; 4266edd16368SStephen M. Cameron 426704fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4268edd16368SStephen M. Cameron 4269edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4270339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4271339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 427241ce4c35SStephen Cameron 427364ce60caSDon Brace /* 427464ce60caSDon Brace * Skip over some devices such as a spare. 427564ce60caSDon Brace */ 427664ce60caSDon Brace if (!tmpdevice->external && physical_device) { 427764ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 427864ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 427964ce60caSDon Brace if (skip_device) 4280edd16368SStephen M. Cameron continue; 428164ce60caSDon Brace } 4282edd16368SStephen M. Cameron 4283edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4284683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4285683fc444SDon Brace &is_OBDR); 4286683fc444SDon Brace if (rc == -ENOMEM) { 4287683fc444SDon Brace dev_warn(&h->pdev->dev, 4288683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4289853633e8SDon Brace h->drv_req_rescan = 1; 4290683fc444SDon Brace goto out; 4291853633e8SDon Brace } 4292683fc444SDon Brace if (rc) { 4293683fc444SDon Brace dev_warn(&h->pdev->dev, 4294683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4295683fc444SDon Brace continue; 4296683fc444SDon Brace } 4297683fc444SDon Brace 429866749d0dSScott Teel /* Determine if this is a lun from an external target array */ 429966749d0dSScott Teel tmpdevice->external = 430066749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 430166749d0dSScott Teel nphysicals, nlocal_logicals); 430266749d0dSScott Teel 43031f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43049b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4305edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4306edd16368SStephen M. Cameron 430734592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 430834592254SScott Teel * Event-based change notification is unreliable for those. 4309edd16368SStephen M. Cameron */ 431034592254SScott Teel if (!h->discovery_polling) { 431134592254SScott Teel if (tmpdevice->external) { 431234592254SScott Teel h->discovery_polling = 1; 431334592254SScott Teel dev_info(&h->pdev->dev, 431434592254SScott Teel "External target, activate discovery polling.\n"); 4315edd16368SStephen M. Cameron } 431634592254SScott Teel } 431734592254SScott Teel 4318edd16368SStephen M. Cameron 4319edd16368SStephen M. Cameron *this_device = *tmpdevice; 432004fa2f44SKevin Barnett this_device->physical_device = physical_device; 4321edd16368SStephen M. Cameron 432204fa2f44SKevin Barnett /* 432304fa2f44SKevin Barnett * Expose all devices except for physical devices that 432404fa2f44SKevin Barnett * are masked. 432504fa2f44SKevin Barnett */ 432604fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 43272a168208SKevin Barnett this_device->expose_device = 0; 43282a168208SKevin Barnett else 43292a168208SKevin Barnett this_device->expose_device = 1; 433041ce4c35SStephen Cameron 4331d04e62b9SKevin Barnett 4332d04e62b9SKevin Barnett /* 4333d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4334d04e62b9SKevin Barnett */ 4335d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4336d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4337edd16368SStephen M. Cameron 4338edd16368SStephen M. Cameron switch (this_device->devtype) { 43390b0e1d6cSStephen M. Cameron case TYPE_ROM: 4340edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4341edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4342edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4343edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4344edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4345edd16368SStephen M. Cameron * the inquiry data. 4346edd16368SStephen M. Cameron */ 43470b0e1d6cSStephen M. Cameron if (is_OBDR) 4348edd16368SStephen M. Cameron ncurrent++; 4349edd16368SStephen M. Cameron break; 4350edd16368SStephen M. Cameron case TYPE_DISK: 4351af15ed36SDon Brace case TYPE_ZBC: 435204fa2f44SKevin Barnett if (this_device->physical_device) { 4353b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4354b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4355ecf418d1SJoe Handzik this_device->offload_enabled = 0; 435603383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4357f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4358f2039b03SDon Brace hpsa_get_path_info(this_device, 4359f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4360b9092b79SKevin Barnett } 4361edd16368SStephen M. Cameron ncurrent++; 4362edd16368SStephen M. Cameron break; 4363edd16368SStephen M. Cameron case TYPE_TAPE: 4364edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4365cca8f13bSDon Brace ncurrent++; 4366cca8f13bSDon Brace break; 436741ce4c35SStephen Cameron case TYPE_ENCLOSURE: 436817a9e54aSDon Brace if (!this_device->external) 4369cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4370cca8f13bSDon Brace physdev_list, phys_dev_index, 4371cca8f13bSDon Brace this_device); 437241ce4c35SStephen Cameron ncurrent++; 437341ce4c35SStephen Cameron break; 4374edd16368SStephen M. Cameron case TYPE_RAID: 4375edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4376edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4377edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4378edd16368SStephen M. Cameron * don't present it. 4379edd16368SStephen M. Cameron */ 4380edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4381edd16368SStephen M. Cameron break; 4382edd16368SStephen M. Cameron ncurrent++; 4383edd16368SStephen M. Cameron break; 4384edd16368SStephen M. Cameron default: 4385edd16368SStephen M. Cameron break; 4386edd16368SStephen M. Cameron } 4387cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4388edd16368SStephen M. Cameron break; 4389edd16368SStephen M. Cameron } 4390d04e62b9SKevin Barnett 4391d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4392d04e62b9SKevin Barnett int rc = 0; 4393d04e62b9SKevin Barnett 4394d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4395d04e62b9SKevin Barnett if (rc) { 4396d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4397d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4398d04e62b9SKevin Barnett goto out; 4399d04e62b9SKevin Barnett } 4400d04e62b9SKevin Barnett } 4401d04e62b9SKevin Barnett 44028aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4403edd16368SStephen M. Cameron out: 4404edd16368SStephen M. Cameron kfree(tmpdevice); 4405edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4406edd16368SStephen M. Cameron kfree(currentsd[i]); 4407edd16368SStephen M. Cameron kfree(currentsd); 4408edd16368SStephen M. Cameron kfree(physdev_list); 4409edd16368SStephen M. Cameron kfree(logdev_list); 441066749d0dSScott Teel kfree(id_ctlr); 441103383736SDon Brace kfree(id_phys); 4412edd16368SStephen M. Cameron } 4413edd16368SStephen M. Cameron 4414ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4415ec5cbf04SWebb Scales struct scatterlist *sg) 4416ec5cbf04SWebb Scales { 4417ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4418ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4419ec5cbf04SWebb Scales 4420ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4421ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4422ec5cbf04SWebb Scales desc->Ext = 0; 4423ec5cbf04SWebb Scales } 4424ec5cbf04SWebb Scales 4425c7ee65b3SWebb Scales /* 4426c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4427edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4428edd16368SStephen M. Cameron * hpsa command, cp. 4429edd16368SStephen M. Cameron */ 443033a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4431edd16368SStephen M. Cameron struct CommandList *cp, 4432edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4433edd16368SStephen M. Cameron { 4434edd16368SStephen M. Cameron struct scatterlist *sg; 4435b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 443633a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4437edd16368SStephen M. Cameron 443833a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4439edd16368SStephen M. Cameron 4440edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4441edd16368SStephen M. Cameron if (use_sg < 0) 4442edd16368SStephen M. Cameron return use_sg; 4443edd16368SStephen M. Cameron 4444edd16368SStephen M. Cameron if (!use_sg) 4445edd16368SStephen M. Cameron goto sglist_finished; 4446edd16368SStephen M. Cameron 4447b3a7ba7cSWebb Scales /* 4448b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4449b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4450b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4451b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4452b3a7ba7cSWebb Scales * the entries in the one list. 4453b3a7ba7cSWebb Scales */ 445433a2ffceSStephen M. Cameron curr_sg = cp->SG; 4455b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4456b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4457b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4458b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4459ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 446033a2ffceSStephen M. Cameron curr_sg++; 446133a2ffceSStephen M. Cameron } 4462ec5cbf04SWebb Scales 4463b3a7ba7cSWebb Scales if (chained) { 4464b3a7ba7cSWebb Scales /* 4465b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4466b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4467b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4468b3a7ba7cSWebb Scales * where the previous loop left off. 4469b3a7ba7cSWebb Scales */ 4470b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4471b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4472b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4473b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4474b3a7ba7cSWebb Scales curr_sg++; 4475b3a7ba7cSWebb Scales } 4476b3a7ba7cSWebb Scales } 4477b3a7ba7cSWebb Scales 4478ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4479b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 448033a2ffceSStephen M. Cameron 448133a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 448233a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 448333a2ffceSStephen M. Cameron 448433a2ffceSStephen M. Cameron if (chained) { 448533a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 448650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4487e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4488e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4489e2bea6dfSStephen M. Cameron return -1; 4490e2bea6dfSStephen M. Cameron } 449133a2ffceSStephen M. Cameron return 0; 4492edd16368SStephen M. Cameron } 4493edd16368SStephen M. Cameron 4494edd16368SStephen M. Cameron sglist_finished: 4495edd16368SStephen M. Cameron 449601a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4497c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4498edd16368SStephen M. Cameron return 0; 4499edd16368SStephen M. Cameron } 4500edd16368SStephen M. Cameron 4501283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4502283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4503283b4a9bSStephen M. Cameron { 4504283b4a9bSStephen M. Cameron int is_write = 0; 4505283b4a9bSStephen M. Cameron u32 block; 4506283b4a9bSStephen M. Cameron u32 block_cnt; 4507283b4a9bSStephen M. Cameron 4508283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4509283b4a9bSStephen M. Cameron switch (cdb[0]) { 4510283b4a9bSStephen M. Cameron case WRITE_6: 4511283b4a9bSStephen M. Cameron case WRITE_12: 4512283b4a9bSStephen M. Cameron is_write = 1; 4513283b4a9bSStephen M. Cameron case READ_6: 4514283b4a9bSStephen M. Cameron case READ_12: 4515283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4516c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4517283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4518c8a6c9a6SDon Brace if (block_cnt == 0) 4519c8a6c9a6SDon Brace block_cnt = 256; 4520283b4a9bSStephen M. Cameron } else { 4521283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4522c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4523c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4524283b4a9bSStephen M. Cameron } 4525283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4526283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4527283b4a9bSStephen M. Cameron 4528283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4529283b4a9bSStephen M. Cameron cdb[1] = 0; 4530283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4531283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4532283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4533283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4534283b4a9bSStephen M. Cameron cdb[6] = 0; 4535283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4536283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4537283b4a9bSStephen M. Cameron cdb[9] = 0; 4538283b4a9bSStephen M. Cameron *cdb_len = 10; 4539283b4a9bSStephen M. Cameron break; 4540283b4a9bSStephen M. Cameron } 4541283b4a9bSStephen M. Cameron return 0; 4542283b4a9bSStephen M. Cameron } 4543283b4a9bSStephen M. Cameron 4544c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4545283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 454603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4547e1f7de0cSMatt Gates { 4548e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4549e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4550e1f7de0cSMatt Gates unsigned int len; 4551e1f7de0cSMatt Gates unsigned int total_len = 0; 4552e1f7de0cSMatt Gates struct scatterlist *sg; 4553e1f7de0cSMatt Gates u64 addr64; 4554e1f7de0cSMatt Gates int use_sg, i; 4555e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4556e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4557e1f7de0cSMatt Gates 4558283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 455903383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 456003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4561283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 456203383736SDon Brace } 4563283b4a9bSStephen M. Cameron 4564e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4565e1f7de0cSMatt Gates 456603383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 456703383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4568283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 456903383736SDon Brace } 4570283b4a9bSStephen M. Cameron 4571e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4572e1f7de0cSMatt Gates 4573e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4574e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4575e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4576e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4577e1f7de0cSMatt Gates 4578e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 457903383736SDon Brace if (use_sg < 0) { 458003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4581e1f7de0cSMatt Gates return use_sg; 458203383736SDon Brace } 4583e1f7de0cSMatt Gates 4584e1f7de0cSMatt Gates if (use_sg) { 4585e1f7de0cSMatt Gates curr_sg = cp->SG; 4586e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4587e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4588e1f7de0cSMatt Gates len = sg_dma_len(sg); 4589e1f7de0cSMatt Gates total_len += len; 459050a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 459150a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 459250a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4593e1f7de0cSMatt Gates curr_sg++; 4594e1f7de0cSMatt Gates } 459550a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4596e1f7de0cSMatt Gates 4597e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4598e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4599e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4600e1f7de0cSMatt Gates break; 4601e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4602e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4603e1f7de0cSMatt Gates break; 4604e1f7de0cSMatt Gates case DMA_NONE: 4605e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4606e1f7de0cSMatt Gates break; 4607e1f7de0cSMatt Gates default: 4608e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4609e1f7de0cSMatt Gates cmd->sc_data_direction); 4610e1f7de0cSMatt Gates BUG(); 4611e1f7de0cSMatt Gates break; 4612e1f7de0cSMatt Gates } 4613e1f7de0cSMatt Gates } else { 4614e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4615e1f7de0cSMatt Gates } 4616e1f7de0cSMatt Gates 4617c349775eSScott Teel c->Header.SGList = use_sg; 4618e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 46192b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 46202b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 46212b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 46222b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 46232b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4624283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4625283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4626c349775eSScott Teel /* Tag was already set at init time. */ 4627e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4628e1f7de0cSMatt Gates return 0; 4629e1f7de0cSMatt Gates } 4630edd16368SStephen M. Cameron 4631283b4a9bSStephen M. Cameron /* 4632283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4633283b4a9bSStephen M. Cameron * I/O accelerator path. 4634283b4a9bSStephen M. Cameron */ 4635283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4636283b4a9bSStephen M. Cameron struct CommandList *c) 4637283b4a9bSStephen M. Cameron { 4638283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4639283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4640283b4a9bSStephen M. Cameron 464103383736SDon Brace c->phys_disk = dev; 464203383736SDon Brace 4643283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 464403383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4645283b4a9bSStephen M. Cameron } 4646283b4a9bSStephen M. Cameron 4647dd0e19f3SScott Teel /* 4648dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4649dd0e19f3SScott Teel */ 4650dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4651dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4652dd0e19f3SScott Teel { 4653dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4654dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4655dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4656dd0e19f3SScott Teel u64 first_block; 4657dd0e19f3SScott Teel 4658dd0e19f3SScott Teel /* Are we doing encryption on this device */ 46592b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4660dd0e19f3SScott Teel return; 4661dd0e19f3SScott Teel /* Set the data encryption key index. */ 4662dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4663dd0e19f3SScott Teel 4664dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4665dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4666dd0e19f3SScott Teel 4667dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4668dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4669dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4670dd0e19f3SScott Teel */ 4671dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4672dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4673dd0e19f3SScott Teel case WRITE_6: 4674dd0e19f3SScott Teel case READ_6: 46752b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4676dd0e19f3SScott Teel break; 4677dd0e19f3SScott Teel case WRITE_10: 4678dd0e19f3SScott Teel case READ_10: 4679dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4680dd0e19f3SScott Teel case WRITE_12: 4681dd0e19f3SScott Teel case READ_12: 46822b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4683dd0e19f3SScott Teel break; 4684dd0e19f3SScott Teel case WRITE_16: 4685dd0e19f3SScott Teel case READ_16: 46862b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4687dd0e19f3SScott Teel break; 4688dd0e19f3SScott Teel default: 4689dd0e19f3SScott Teel dev_err(&h->pdev->dev, 46902b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 46912b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4692dd0e19f3SScott Teel BUG(); 4693dd0e19f3SScott Teel break; 4694dd0e19f3SScott Teel } 46952b08b3e9SDon Brace 46962b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 46972b08b3e9SDon Brace first_block = first_block * 46982b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 46992b08b3e9SDon Brace 47002b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47012b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4702dd0e19f3SScott Teel } 4703dd0e19f3SScott Teel 4704c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4705c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 470603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4707c349775eSScott Teel { 4708c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4709c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4710c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4711c349775eSScott Teel int use_sg, i; 4712c349775eSScott Teel struct scatterlist *sg; 4713c349775eSScott Teel u64 addr64; 4714c349775eSScott Teel u32 len; 4715c349775eSScott Teel u32 total_len = 0; 4716c349775eSScott Teel 4717d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4718c349775eSScott Teel 471903383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 472003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4721c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 472203383736SDon Brace } 472303383736SDon Brace 4724c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4725c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4726c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4727c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4728c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4729c349775eSScott Teel 4730c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4731c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4732c349775eSScott Teel 4733c349775eSScott Teel use_sg = scsi_dma_map(cmd); 473403383736SDon Brace if (use_sg < 0) { 473503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4736c349775eSScott Teel return use_sg; 473703383736SDon Brace } 4738c349775eSScott Teel 4739c349775eSScott Teel if (use_sg) { 4740c349775eSScott Teel curr_sg = cp->sg; 4741d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4742d9a729f3SWebb Scales addr64 = le64_to_cpu( 4743d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4744d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4745d9a729f3SWebb Scales curr_sg->length = 0; 4746d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4747d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4748d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4749d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4750d9a729f3SWebb Scales 4751d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4752d9a729f3SWebb Scales } 4753c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4754c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4755c349775eSScott Teel len = sg_dma_len(sg); 4756c349775eSScott Teel total_len += len; 4757c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4758c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4759c349775eSScott Teel curr_sg->reserved[0] = 0; 4760c349775eSScott Teel curr_sg->reserved[1] = 0; 4761c349775eSScott Teel curr_sg->reserved[2] = 0; 4762c349775eSScott Teel curr_sg->chain_indicator = 0; 4763c349775eSScott Teel curr_sg++; 4764c349775eSScott Teel } 4765c349775eSScott Teel 4766c349775eSScott Teel switch (cmd->sc_data_direction) { 4767c349775eSScott Teel case DMA_TO_DEVICE: 4768dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4769dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4770c349775eSScott Teel break; 4771c349775eSScott Teel case DMA_FROM_DEVICE: 4772dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4773dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4774c349775eSScott Teel break; 4775c349775eSScott Teel case DMA_NONE: 4776dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4777dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4778c349775eSScott Teel break; 4779c349775eSScott Teel default: 4780c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4781c349775eSScott Teel cmd->sc_data_direction); 4782c349775eSScott Teel BUG(); 4783c349775eSScott Teel break; 4784c349775eSScott Teel } 4785c349775eSScott Teel } else { 4786dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4787dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4788c349775eSScott Teel } 4789dd0e19f3SScott Teel 4790dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4791dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4792dd0e19f3SScott Teel 47932b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4794f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4795c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4796c349775eSScott Teel 4797c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4798c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4799c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 480050a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4801c349775eSScott Teel 4802d9a729f3SWebb Scales /* fill in sg elements */ 4803d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4804d9a729f3SWebb Scales cp->sg_count = 1; 4805a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4806d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4807d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4808d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4809d9a729f3SWebb Scales return -1; 4810d9a729f3SWebb Scales } 4811d9a729f3SWebb Scales } else 4812d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4813d9a729f3SWebb Scales 4814c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4815c349775eSScott Teel return 0; 4816c349775eSScott Teel } 4817c349775eSScott Teel 4818c349775eSScott Teel /* 4819c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4820c349775eSScott Teel */ 4821c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4822c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 482303383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4824c349775eSScott Teel { 482503383736SDon Brace /* Try to honor the device's queue depth */ 482603383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 482703383736SDon Brace phys_disk->queue_depth) { 482803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 482903383736SDon Brace return IO_ACCEL_INELIGIBLE; 483003383736SDon Brace } 4831c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4832c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 483303383736SDon Brace cdb, cdb_len, scsi3addr, 483403383736SDon Brace phys_disk); 4835c349775eSScott Teel else 4836c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 483703383736SDon Brace cdb, cdb_len, scsi3addr, 483803383736SDon Brace phys_disk); 4839c349775eSScott Teel } 4840c349775eSScott Teel 48416b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 48426b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 48436b80b18fSScott Teel { 48446b80b18fSScott Teel if (offload_to_mirror == 0) { 48456b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 48462b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 48476b80b18fSScott Teel return; 48486b80b18fSScott Teel } 48496b80b18fSScott Teel do { 48506b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 48512b08b3e9SDon Brace *current_group = *map_index / 48522b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 48536b80b18fSScott Teel if (offload_to_mirror == *current_group) 48546b80b18fSScott Teel continue; 48552b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 48566b80b18fSScott Teel /* select map index from next group */ 48572b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 48586b80b18fSScott Teel (*current_group)++; 48596b80b18fSScott Teel } else { 48606b80b18fSScott Teel /* select map index from first group */ 48612b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 48626b80b18fSScott Teel *current_group = 0; 48636b80b18fSScott Teel } 48646b80b18fSScott Teel } while (offload_to_mirror != *current_group); 48656b80b18fSScott Teel } 48666b80b18fSScott Teel 4867283b4a9bSStephen M. Cameron /* 4868283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4869283b4a9bSStephen M. Cameron */ 4870283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4871283b4a9bSStephen M. Cameron struct CommandList *c) 4872283b4a9bSStephen M. Cameron { 4873283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4874283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4875283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4876283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4877283b4a9bSStephen M. Cameron int is_write = 0; 4878283b4a9bSStephen M. Cameron u32 map_index; 4879283b4a9bSStephen M. Cameron u64 first_block, last_block; 4880283b4a9bSStephen M. Cameron u32 block_cnt; 4881283b4a9bSStephen M. Cameron u32 blocks_per_row; 4882283b4a9bSStephen M. Cameron u64 first_row, last_row; 4883283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4884283b4a9bSStephen M. Cameron u32 first_column, last_column; 48856b80b18fSScott Teel u64 r0_first_row, r0_last_row; 48866b80b18fSScott Teel u32 r5or6_blocks_per_row; 48876b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 48886b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 48896b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 48906b80b18fSScott Teel u32 total_disks_per_row; 48916b80b18fSScott Teel u32 stripesize; 48926b80b18fSScott Teel u32 first_group, last_group, current_group; 4893283b4a9bSStephen M. Cameron u32 map_row; 4894283b4a9bSStephen M. Cameron u32 disk_handle; 4895283b4a9bSStephen M. Cameron u64 disk_block; 4896283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4897283b4a9bSStephen M. Cameron u8 cdb[16]; 4898283b4a9bSStephen M. Cameron u8 cdb_len; 48992b08b3e9SDon Brace u16 strip_size; 4900283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4901283b4a9bSStephen M. Cameron u64 tmpdiv; 4902283b4a9bSStephen M. Cameron #endif 49036b80b18fSScott Teel int offload_to_mirror; 4904283b4a9bSStephen M. Cameron 4905283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4906283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4907283b4a9bSStephen M. Cameron case WRITE_6: 4908283b4a9bSStephen M. Cameron is_write = 1; 4909283b4a9bSStephen M. Cameron case READ_6: 4910c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4911283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 49123fa89a04SStephen M. Cameron if (block_cnt == 0) 49133fa89a04SStephen M. Cameron block_cnt = 256; 4914283b4a9bSStephen M. Cameron break; 4915283b4a9bSStephen M. Cameron case WRITE_10: 4916283b4a9bSStephen M. Cameron is_write = 1; 4917283b4a9bSStephen M. Cameron case READ_10: 4918283b4a9bSStephen M. Cameron first_block = 4919283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4920283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4921283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4922283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4923283b4a9bSStephen M. Cameron block_cnt = 4924283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4925283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4926283b4a9bSStephen M. Cameron break; 4927283b4a9bSStephen M. Cameron case WRITE_12: 4928283b4a9bSStephen M. Cameron is_write = 1; 4929283b4a9bSStephen M. Cameron case READ_12: 4930283b4a9bSStephen M. Cameron first_block = 4931283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4932283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4933283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4934283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4935283b4a9bSStephen M. Cameron block_cnt = 4936283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4937283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4938283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4939283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4940283b4a9bSStephen M. Cameron break; 4941283b4a9bSStephen M. Cameron case WRITE_16: 4942283b4a9bSStephen M. Cameron is_write = 1; 4943283b4a9bSStephen M. Cameron case READ_16: 4944283b4a9bSStephen M. Cameron first_block = 4945283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4946283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4947283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4948283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4949283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4950283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4951283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4952283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4953283b4a9bSStephen M. Cameron block_cnt = 4954283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4955283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4956283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4957283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4958283b4a9bSStephen M. Cameron break; 4959283b4a9bSStephen M. Cameron default: 4960283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4961283b4a9bSStephen M. Cameron } 4962283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4963283b4a9bSStephen M. Cameron 4964283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4965283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4966283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4967283b4a9bSStephen M. Cameron 4968283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 49692b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 49702b08b3e9SDon Brace last_block < first_block) 4971283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4972283b4a9bSStephen M. Cameron 4973283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 49742b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 49752b08b3e9SDon Brace le16_to_cpu(map->strip_size); 49762b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4977283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4978283b4a9bSStephen M. Cameron tmpdiv = first_block; 4979283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4980283b4a9bSStephen M. Cameron first_row = tmpdiv; 4981283b4a9bSStephen M. Cameron tmpdiv = last_block; 4982283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4983283b4a9bSStephen M. Cameron last_row = tmpdiv; 4984283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4985283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4986283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 49872b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4988283b4a9bSStephen M. Cameron first_column = tmpdiv; 4989283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 49902b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4991283b4a9bSStephen M. Cameron last_column = tmpdiv; 4992283b4a9bSStephen M. Cameron #else 4993283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4994283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4995283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4996283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 49972b08b3e9SDon Brace first_column = first_row_offset / strip_size; 49982b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4999283b4a9bSStephen M. Cameron #endif 5000283b4a9bSStephen M. Cameron 5001283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5002283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5003283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5004283b4a9bSStephen M. Cameron 5005283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 50062b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 50072b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5008283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 50092b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 50106b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 50116b80b18fSScott Teel 50126b80b18fSScott Teel switch (dev->raid_level) { 50136b80b18fSScott Teel case HPSA_RAID_0: 50146b80b18fSScott Teel break; /* nothing special to do */ 50156b80b18fSScott Teel case HPSA_RAID_1: 50166b80b18fSScott Teel /* Handles load balance across RAID 1 members. 50176b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 50186b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5019283b4a9bSStephen M. Cameron */ 50202b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5021283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 50222b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5023283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 50246b80b18fSScott Teel break; 50256b80b18fSScott Teel case HPSA_RAID_ADM: 50266b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 50276b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 50286b80b18fSScott Teel */ 50292b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 50306b80b18fSScott Teel 50316b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 50326b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 50336b80b18fSScott Teel &map_index, ¤t_group); 50346b80b18fSScott Teel /* set mirror group to use next time */ 50356b80b18fSScott Teel offload_to_mirror = 50362b08b3e9SDon Brace (offload_to_mirror >= 50372b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 50386b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 50396b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 50406b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 50416b80b18fSScott Teel * function since multiple threads might simultaneously 50426b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 50436b80b18fSScott Teel */ 50446b80b18fSScott Teel break; 50456b80b18fSScott Teel case HPSA_RAID_5: 50466b80b18fSScott Teel case HPSA_RAID_6: 50472b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 50486b80b18fSScott Teel break; 50496b80b18fSScott Teel 50506b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 50516b80b18fSScott Teel r5or6_blocks_per_row = 50522b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 50532b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 50546b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 50552b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 50562b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 50576b80b18fSScott Teel #if BITS_PER_LONG == 32 50586b80b18fSScott Teel tmpdiv = first_block; 50596b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 50606b80b18fSScott Teel tmpdiv = first_group; 50616b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 50626b80b18fSScott Teel first_group = tmpdiv; 50636b80b18fSScott Teel tmpdiv = last_block; 50646b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 50656b80b18fSScott Teel tmpdiv = last_group; 50666b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 50676b80b18fSScott Teel last_group = tmpdiv; 50686b80b18fSScott Teel #else 50696b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 50706b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 50716b80b18fSScott Teel #endif 5072000ff7c2SStephen M. Cameron if (first_group != last_group) 50736b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 50746b80b18fSScott Teel 50756b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 50766b80b18fSScott Teel #if BITS_PER_LONG == 32 50776b80b18fSScott Teel tmpdiv = first_block; 50786b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 50796b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 50806b80b18fSScott Teel tmpdiv = last_block; 50816b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 50826b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 50836b80b18fSScott Teel #else 50846b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 50856b80b18fSScott Teel first_block / stripesize; 50866b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 50876b80b18fSScott Teel #endif 50886b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 50896b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 50906b80b18fSScott Teel 50916b80b18fSScott Teel 50926b80b18fSScott Teel /* Verify request is in a single column */ 50936b80b18fSScott Teel #if BITS_PER_LONG == 32 50946b80b18fSScott Teel tmpdiv = first_block; 50956b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 50966b80b18fSScott Teel tmpdiv = first_row_offset; 50976b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 50986b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 50996b80b18fSScott Teel tmpdiv = last_block; 51006b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 51016b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51026b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 51036b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 51046b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51056b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 51066b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51076b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51086b80b18fSScott Teel r5or6_last_column = tmpdiv; 51096b80b18fSScott Teel #else 51106b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 51116b80b18fSScott Teel (u32)((first_block % stripesize) % 51126b80b18fSScott Teel r5or6_blocks_per_row); 51136b80b18fSScott Teel 51146b80b18fSScott Teel r5or6_last_row_offset = 51156b80b18fSScott Teel (u32)((last_block % stripesize) % 51166b80b18fSScott Teel r5or6_blocks_per_row); 51176b80b18fSScott Teel 51186b80b18fSScott Teel first_column = r5or6_first_column = 51192b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 51206b80b18fSScott Teel r5or6_last_column = 51212b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 51226b80b18fSScott Teel #endif 51236b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 51246b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51256b80b18fSScott Teel 51266b80b18fSScott Teel /* Request is eligible */ 51276b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51282b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51296b80b18fSScott Teel 51306b80b18fSScott Teel map_index = (first_group * 51312b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 51326b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 51336b80b18fSScott Teel break; 51346b80b18fSScott Teel default: 51356b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5136283b4a9bSStephen M. Cameron } 51376b80b18fSScott Teel 513807543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 513907543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 514007543e0cSStephen Cameron 514103383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5142c3390df4SDon Brace if (!c->phys_disk) 5143c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 514403383736SDon Brace 5145283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 51462b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 51472b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 51482b08b3e9SDon Brace (first_row_offset - first_column * 51492b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5150283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5151283b4a9bSStephen M. Cameron 5152283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5153283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5154283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5155283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5156283b4a9bSStephen M. Cameron } 5157283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5158283b4a9bSStephen M. Cameron 5159283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5160283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5161283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5162283b4a9bSStephen M. Cameron cdb[1] = 0; 5163283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5164283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5165283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5166283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5167283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5168283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5169283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5170283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5171283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5172283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5173283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5174283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5175283b4a9bSStephen M. Cameron cdb[14] = 0; 5176283b4a9bSStephen M. Cameron cdb[15] = 0; 5177283b4a9bSStephen M. Cameron cdb_len = 16; 5178283b4a9bSStephen M. Cameron } else { 5179283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5180283b4a9bSStephen M. Cameron cdb[1] = 0; 5181283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5182283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5183283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5184283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5185283b4a9bSStephen M. Cameron cdb[6] = 0; 5186283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5187283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5188283b4a9bSStephen M. Cameron cdb[9] = 0; 5189283b4a9bSStephen M. Cameron cdb_len = 10; 5190283b4a9bSStephen M. Cameron } 5191283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 519203383736SDon Brace dev->scsi3addr, 519303383736SDon Brace dev->phys_disk[map_index]); 5194283b4a9bSStephen M. Cameron } 5195283b4a9bSStephen M. Cameron 519625163bd5SWebb Scales /* 519725163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 519825163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 519925163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 520025163bd5SWebb Scales */ 5201574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5202574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5203574f05d3SStephen Cameron unsigned char scsi3addr[]) 5204edd16368SStephen M. Cameron { 5205edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5206edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5207edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5208edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5209edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5210f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5211edd16368SStephen M. Cameron 5212edd16368SStephen M. Cameron /* Fill in the request block... */ 5213edd16368SStephen M. Cameron 5214edd16368SStephen M. Cameron c->Request.Timeout = 0; 5215edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5216edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5217edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5218edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5219edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5220a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5221a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5222edd16368SStephen M. Cameron break; 5223edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5224a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5225a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5226edd16368SStephen M. Cameron break; 5227edd16368SStephen M. Cameron case DMA_NONE: 5228a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5229a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5230edd16368SStephen M. Cameron break; 5231edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5232edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5233edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5234edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5235edd16368SStephen M. Cameron */ 5236edd16368SStephen M. Cameron 5237a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5238a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5239edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5240edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5241edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5242edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5243edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5244edd16368SStephen M. Cameron * our purposes here. 5245edd16368SStephen M. Cameron */ 5246edd16368SStephen M. Cameron 5247edd16368SStephen M. Cameron break; 5248edd16368SStephen M. Cameron 5249edd16368SStephen M. Cameron default: 5250edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5251edd16368SStephen M. Cameron cmd->sc_data_direction); 5252edd16368SStephen M. Cameron BUG(); 5253edd16368SStephen M. Cameron break; 5254edd16368SStephen M. Cameron } 5255edd16368SStephen M. Cameron 525633a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 525773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5258edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5259edd16368SStephen M. Cameron } 5260edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5261edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5262edd16368SStephen M. Cameron return 0; 5263edd16368SStephen M. Cameron } 5264edd16368SStephen M. Cameron 5265360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5266360c73bdSStephen Cameron struct CommandList *c) 5267360c73bdSStephen Cameron { 5268360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5269360c73bdSStephen Cameron 5270360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5271360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5272360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5273360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5274360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5275360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5276360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5277360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5278360c73bdSStephen Cameron c->cmdindex = index; 5279360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5280360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5281360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5282360c73bdSStephen Cameron c->h = h; 5283a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5284360c73bdSStephen Cameron } 5285360c73bdSStephen Cameron 5286360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5287360c73bdSStephen Cameron { 5288360c73bdSStephen Cameron int i; 5289360c73bdSStephen Cameron 5290360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5291360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5292360c73bdSStephen Cameron 5293360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5294360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5295360c73bdSStephen Cameron } 5296360c73bdSStephen Cameron } 5297360c73bdSStephen Cameron 5298360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5299360c73bdSStephen Cameron struct CommandList *c) 5300360c73bdSStephen Cameron { 5301360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5302360c73bdSStephen Cameron 530373153fe5SWebb Scales BUG_ON(c->cmdindex != index); 530473153fe5SWebb Scales 5305360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5306360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5307360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5308360c73bdSStephen Cameron } 5309360c73bdSStephen Cameron 5310592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5311592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5312592a0ad5SWebb Scales unsigned char *scsi3addr) 5313592a0ad5SWebb Scales { 5314592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5315592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5316592a0ad5SWebb Scales 5317592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5318592a0ad5SWebb Scales 5319592a0ad5SWebb Scales if (dev->offload_enabled) { 5320592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5321592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5322592a0ad5SWebb Scales c->scsi_cmd = cmd; 5323592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5324592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5325592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5326a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5327592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5328592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5329592a0ad5SWebb Scales c->scsi_cmd = cmd; 5330592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5331592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5332592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5333592a0ad5SWebb Scales } 5334592a0ad5SWebb Scales return rc; 5335592a0ad5SWebb Scales } 5336592a0ad5SWebb Scales 5337080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5338080ef1ccSDon Brace { 5339080ef1ccSDon Brace struct scsi_cmnd *cmd; 5340080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 53418a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5342080ef1ccSDon Brace 5343080ef1ccSDon Brace cmd = c->scsi_cmd; 5344080ef1ccSDon Brace dev = cmd->device->hostdata; 5345080ef1ccSDon Brace if (!dev) { 5346080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 53478a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5348080ef1ccSDon Brace } 5349d604f533SWebb Scales if (c->reset_pending) 5350d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5351a58e7e53SWebb Scales if (c->abort_pending) 5352a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5353592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5354592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5355592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5356592a0ad5SWebb Scales int rc; 5357592a0ad5SWebb Scales 5358592a0ad5SWebb Scales if (c2->error_data.serv_response == 5359592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5360592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5361592a0ad5SWebb Scales if (rc == 0) 5362592a0ad5SWebb Scales return; 5363592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5364592a0ad5SWebb Scales /* 5365592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5366592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5367592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5368592a0ad5SWebb Scales */ 5369592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 53708a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5371592a0ad5SWebb Scales } 5372592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5373592a0ad5SWebb Scales } 5374592a0ad5SWebb Scales } 5375360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5376080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5377080ef1ccSDon Brace /* 5378080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5379080ef1ccSDon Brace * again via scsi mid layer, which will then get 5380080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5381592a0ad5SWebb Scales * 5382592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5383592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5384080ef1ccSDon Brace */ 5385080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5386080ef1ccSDon Brace cmd->scsi_done(cmd); 5387080ef1ccSDon Brace } 5388080ef1ccSDon Brace } 5389080ef1ccSDon Brace 5390574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5391574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5392574f05d3SStephen Cameron { 5393574f05d3SStephen Cameron struct ctlr_info *h; 5394574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5395574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5396574f05d3SStephen Cameron struct CommandList *c; 5397574f05d3SStephen Cameron int rc = 0; 5398574f05d3SStephen Cameron 5399574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5400574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 540173153fe5SWebb Scales 540273153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 540373153fe5SWebb Scales 5404574f05d3SStephen Cameron dev = cmd->device->hostdata; 5405574f05d3SStephen Cameron if (!dev) { 5406ba74fdc4SDon Brace cmd->result = NOT_READY << 16; /* host byte */ 5407ba74fdc4SDon Brace cmd->scsi_done(cmd); 5408ba74fdc4SDon Brace return 0; 5409ba74fdc4SDon Brace } 5410ba74fdc4SDon Brace 5411ba74fdc4SDon Brace if (dev->removed) { 5412574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5413574f05d3SStephen Cameron cmd->scsi_done(cmd); 5414574f05d3SStephen Cameron return 0; 5415574f05d3SStephen Cameron } 541673153fe5SWebb Scales 5417574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5418574f05d3SStephen Cameron 5419574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 542025163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5421574f05d3SStephen Cameron cmd->scsi_done(cmd); 5422574f05d3SStephen Cameron return 0; 5423574f05d3SStephen Cameron } 542473153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5425574f05d3SStephen Cameron 5426407863cbSStephen Cameron /* 5427407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5428574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5429574f05d3SStephen Cameron */ 5430574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5431574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5432574f05d3SStephen Cameron h->acciopath_status)) { 5433592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5434574f05d3SStephen Cameron if (rc == 0) 5435592a0ad5SWebb Scales return 0; 5436592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 543773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5438574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5439574f05d3SStephen Cameron } 5440574f05d3SStephen Cameron } 5441574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5442574f05d3SStephen Cameron } 5443574f05d3SStephen Cameron 54448ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 54455f389360SStephen M. Cameron { 54465f389360SStephen M. Cameron unsigned long flags; 54475f389360SStephen M. Cameron 54485f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 54495f389360SStephen M. Cameron h->scan_finished = 1; 54505f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 54515f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 54525f389360SStephen M. Cameron } 54535f389360SStephen M. Cameron 5454a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5455a08a8471SStephen M. Cameron { 5456a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5457a08a8471SStephen M. Cameron unsigned long flags; 5458a08a8471SStephen M. Cameron 54598ebc9248SWebb Scales /* 54608ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 54618ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 54628ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 54638ebc9248SWebb Scales * piling up on a locked up controller. 54648ebc9248SWebb Scales */ 54658ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 54668ebc9248SWebb Scales return hpsa_scan_complete(h); 54675f389360SStephen M. Cameron 5468a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5469a08a8471SStephen M. Cameron while (1) { 5470a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5471a08a8471SStephen M. Cameron if (h->scan_finished) 5472a08a8471SStephen M. Cameron break; 5473a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5474a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5475a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5476a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5477a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5478a08a8471SStephen M. Cameron * happen if we're in here. 5479a08a8471SStephen M. Cameron */ 5480a08a8471SStephen M. Cameron } 5481a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5482a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5483a08a8471SStephen M. Cameron 54848ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 54858ebc9248SWebb Scales return hpsa_scan_complete(h); 54865f389360SStephen M. Cameron 54878aa60681SDon Brace hpsa_update_scsi_devices(h); 5488a08a8471SStephen M. Cameron 54898ebc9248SWebb Scales hpsa_scan_complete(h); 5490a08a8471SStephen M. Cameron } 5491a08a8471SStephen M. Cameron 54927c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 54937c0a0229SDon Brace { 549403383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 549503383736SDon Brace 549603383736SDon Brace if (!logical_drive) 549703383736SDon Brace return -ENODEV; 54987c0a0229SDon Brace 54997c0a0229SDon Brace if (qdepth < 1) 55007c0a0229SDon Brace qdepth = 1; 550103383736SDon Brace else if (qdepth > logical_drive->queue_depth) 550203383736SDon Brace qdepth = logical_drive->queue_depth; 550303383736SDon Brace 550403383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 55057c0a0229SDon Brace } 55067c0a0229SDon Brace 5507a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5508a08a8471SStephen M. Cameron unsigned long elapsed_time) 5509a08a8471SStephen M. Cameron { 5510a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5511a08a8471SStephen M. Cameron unsigned long flags; 5512a08a8471SStephen M. Cameron int finished; 5513a08a8471SStephen M. Cameron 5514a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5515a08a8471SStephen M. Cameron finished = h->scan_finished; 5516a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5517a08a8471SStephen M. Cameron return finished; 5518a08a8471SStephen M. Cameron } 5519a08a8471SStephen M. Cameron 55202946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5521edd16368SStephen M. Cameron { 5522b705690dSStephen M. Cameron struct Scsi_Host *sh; 5523edd16368SStephen M. Cameron 5524b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 55252946e82bSRobert Elliott if (sh == NULL) { 55262946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 55272946e82bSRobert Elliott return -ENOMEM; 55282946e82bSRobert Elliott } 5529b705690dSStephen M. Cameron 5530b705690dSStephen M. Cameron sh->io_port = 0; 5531b705690dSStephen M. Cameron sh->n_io_port = 0; 5532b705690dSStephen M. Cameron sh->this_id = -1; 5533b705690dSStephen M. Cameron sh->max_channel = 3; 5534b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5535b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5536b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 553741ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5538d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5539b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5540d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5541b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5542b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5543b705690dSStephen M. Cameron sh->unique_id = sh->irq; 554464d513acSChristoph Hellwig 55452946e82bSRobert Elliott h->scsi_host = sh; 55462946e82bSRobert Elliott return 0; 55472946e82bSRobert Elliott } 55482946e82bSRobert Elliott 55492946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 55502946e82bSRobert Elliott { 55512946e82bSRobert Elliott int rv; 55522946e82bSRobert Elliott 55532946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 55542946e82bSRobert Elliott if (rv) { 55552946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 55562946e82bSRobert Elliott return rv; 55572946e82bSRobert Elliott } 55582946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 55592946e82bSRobert Elliott return 0; 5560edd16368SStephen M. Cameron } 5561edd16368SStephen M. Cameron 5562b69324ffSWebb Scales /* 556373153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 556473153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 556573153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 556673153fe5SWebb Scales * low-numbered entries for our own uses.) 556773153fe5SWebb Scales */ 556873153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 556973153fe5SWebb Scales { 557073153fe5SWebb Scales int idx = scmd->request->tag; 557173153fe5SWebb Scales 557273153fe5SWebb Scales if (idx < 0) 557373153fe5SWebb Scales return idx; 557473153fe5SWebb Scales 557573153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 557673153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 557773153fe5SWebb Scales } 557873153fe5SWebb Scales 557973153fe5SWebb Scales /* 5580b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5581b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5582b69324ffSWebb Scales */ 5583b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5584b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5585b69324ffSWebb Scales int reply_queue) 5586edd16368SStephen M. Cameron { 55878919358eSTomas Henzl int rc; 5588edd16368SStephen M. Cameron 5589a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5590a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5591a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5592c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 559325163bd5SWebb Scales if (rc) 5594b69324ffSWebb Scales return rc; 5595edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5596edd16368SStephen M. Cameron 5597b69324ffSWebb Scales /* Check if the unit is already ready. */ 5598edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5599b69324ffSWebb Scales return 0; 5600edd16368SStephen M. Cameron 5601b69324ffSWebb Scales /* 5602b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5603b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5604b69324ffSWebb Scales * looking for (but, success is good too). 5605b69324ffSWebb Scales */ 5606edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5607edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5608edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5609edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5610b69324ffSWebb Scales return 0; 5611b69324ffSWebb Scales 5612b69324ffSWebb Scales return 1; 5613b69324ffSWebb Scales } 5614b69324ffSWebb Scales 5615b69324ffSWebb Scales /* 5616b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5617b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5618b69324ffSWebb Scales */ 5619b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5620b69324ffSWebb Scales struct CommandList *c, 5621b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5622b69324ffSWebb Scales { 5623b69324ffSWebb Scales int rc; 5624b69324ffSWebb Scales int count = 0; 5625b69324ffSWebb Scales int waittime = 1; /* seconds */ 5626b69324ffSWebb Scales 5627b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5628b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5629b69324ffSWebb Scales 5630b69324ffSWebb Scales /* 5631b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5632b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5633b69324ffSWebb Scales */ 5634b69324ffSWebb Scales msleep(1000 * waittime); 5635b69324ffSWebb Scales 5636b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5637b69324ffSWebb Scales if (!rc) 5638edd16368SStephen M. Cameron break; 5639b69324ffSWebb Scales 5640b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5641b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5642b69324ffSWebb Scales waittime *= 2; 5643b69324ffSWebb Scales 5644b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5645b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5646b69324ffSWebb Scales waittime); 5647b69324ffSWebb Scales } 5648b69324ffSWebb Scales 5649b69324ffSWebb Scales return rc; 5650b69324ffSWebb Scales } 5651b69324ffSWebb Scales 5652b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5653b69324ffSWebb Scales unsigned char lunaddr[], 5654b69324ffSWebb Scales int reply_queue) 5655b69324ffSWebb Scales { 5656b69324ffSWebb Scales int first_queue; 5657b69324ffSWebb Scales int last_queue; 5658b69324ffSWebb Scales int rq; 5659b69324ffSWebb Scales int rc = 0; 5660b69324ffSWebb Scales struct CommandList *c; 5661b69324ffSWebb Scales 5662b69324ffSWebb Scales c = cmd_alloc(h); 5663b69324ffSWebb Scales 5664b69324ffSWebb Scales /* 5665b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5666b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5667b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5668b69324ffSWebb Scales */ 5669b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5670b69324ffSWebb Scales first_queue = 0; 5671b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5672b69324ffSWebb Scales } else { 5673b69324ffSWebb Scales first_queue = reply_queue; 5674b69324ffSWebb Scales last_queue = reply_queue; 5675b69324ffSWebb Scales } 5676b69324ffSWebb Scales 5677b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5678b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5679b69324ffSWebb Scales if (rc) 5680b69324ffSWebb Scales break; 5681edd16368SStephen M. Cameron } 5682edd16368SStephen M. Cameron 5683edd16368SStephen M. Cameron if (rc) 5684edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5685edd16368SStephen M. Cameron else 5686edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5687edd16368SStephen M. Cameron 568845fcb86eSStephen Cameron cmd_free(h, c); 5689edd16368SStephen M. Cameron return rc; 5690edd16368SStephen M. Cameron } 5691edd16368SStephen M. Cameron 5692edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5693edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5694edd16368SStephen M. Cameron */ 5695edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5696edd16368SStephen M. Cameron { 5697edd16368SStephen M. Cameron int rc; 5698edd16368SStephen M. Cameron struct ctlr_info *h; 5699edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 57000b9b7b6eSScott Teel u8 reset_type; 57012dc127bbSDan Carpenter char msg[48]; 5702edd16368SStephen M. Cameron 5703edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5704edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5705edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5706edd16368SStephen M. Cameron return FAILED; 5707e345893bSDon Brace 5708e345893bSDon Brace if (lockup_detected(h)) 5709e345893bSDon Brace return FAILED; 5710e345893bSDon Brace 5711edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5712edd16368SStephen M. Cameron if (!dev) { 5713d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5714edd16368SStephen M. Cameron return FAILED; 5715edd16368SStephen M. Cameron } 571625163bd5SWebb Scales 571725163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 571825163bd5SWebb Scales if (lockup_detected(h)) { 57192dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 57202dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 572173153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 572273153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 572325163bd5SWebb Scales return FAILED; 572425163bd5SWebb Scales } 572525163bd5SWebb Scales 572625163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 572725163bd5SWebb Scales if (detect_controller_lockup(h)) { 57282dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 57292dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 573073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 573173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 573225163bd5SWebb Scales return FAILED; 573325163bd5SWebb Scales } 573425163bd5SWebb Scales 5735d604f533SWebb Scales /* Do not attempt on controller */ 5736d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5737d604f533SWebb Scales return SUCCESS; 5738d604f533SWebb Scales 57390b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 57400b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 57410b9b7b6eSScott Teel else 57420b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 57430b9b7b6eSScott Teel 57440b9b7b6eSScott Teel sprintf(msg, "resetting %s", 57450b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 57460b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 574725163bd5SWebb Scales 5748da03ded0SDon Brace h->reset_in_progress = 1; 5749d416b0c7SStephen M. Cameron 5750edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 57510b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 575225163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 57530b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 57540b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 57552dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5756d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5757da03ded0SDon Brace h->reset_in_progress = 0; 5758d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5759edd16368SStephen M. Cameron } 5760edd16368SStephen M. Cameron 57616cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 57626cba3f19SStephen M. Cameron { 57636cba3f19SStephen M. Cameron u8 original_tag[8]; 57646cba3f19SStephen M. Cameron 57656cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 57666cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 57676cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 57686cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 57696cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 57706cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 57716cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 57726cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 57736cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 57746cba3f19SStephen M. Cameron } 57756cba3f19SStephen M. Cameron 577617eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 57772b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 577817eb87d2SScott Teel { 57792b08b3e9SDon Brace u64 tag; 578017eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 578117eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 578217eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 57832b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 57842b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 57852b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 578654b6e9e9SScott Teel return; 578754b6e9e9SScott Teel } 578854b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 578954b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 579054b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5791dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5792dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5793dd0e19f3SScott Teel *taglower = cm2->Tag; 579454b6e9e9SScott Teel return; 579554b6e9e9SScott Teel } 57962b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 57972b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 57982b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 579917eb87d2SScott Teel } 580054b6e9e9SScott Teel 580175167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 58029b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 580375167d2cSStephen M. Cameron { 580475167d2cSStephen M. Cameron int rc = IO_OK; 580575167d2cSStephen M. Cameron struct CommandList *c; 580675167d2cSStephen M. Cameron struct ErrorInfo *ei; 58072b08b3e9SDon Brace __le32 tagupper, taglower; 580875167d2cSStephen M. Cameron 580945fcb86eSStephen Cameron c = cmd_alloc(h); 581075167d2cSStephen M. Cameron 5811a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 58129b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5813a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 58149b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 58156cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5816c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 581717eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 581825163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 581917eb87d2SScott Teel __func__, tagupper, taglower); 582075167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 582175167d2cSStephen M. Cameron 582275167d2cSStephen M. Cameron ei = c->err_info; 582375167d2cSStephen M. Cameron switch (ei->CommandStatus) { 582475167d2cSStephen M. Cameron case CMD_SUCCESS: 582575167d2cSStephen M. Cameron break; 58269437ac43SStephen Cameron case CMD_TMF_STATUS: 58279437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 58289437ac43SStephen Cameron break; 582975167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 583075167d2cSStephen M. Cameron rc = -1; 583175167d2cSStephen M. Cameron break; 583275167d2cSStephen M. Cameron default: 583375167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 583417eb87d2SScott Teel __func__, tagupper, taglower); 5835d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 583675167d2cSStephen M. Cameron rc = -1; 583775167d2cSStephen M. Cameron break; 583875167d2cSStephen M. Cameron } 583945fcb86eSStephen Cameron cmd_free(h, c); 5840dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5841dd0e19f3SScott Teel __func__, tagupper, taglower); 584275167d2cSStephen M. Cameron return rc; 584375167d2cSStephen M. Cameron } 584475167d2cSStephen M. Cameron 58458be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 58468be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 58478be986ccSStephen Cameron { 58488be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 58498be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 58508be986ccSStephen Cameron struct io_accel2_cmd *c2a = 58518be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5852a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 58538be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 58548be986ccSStephen Cameron 58558be986ccSStephen Cameron /* 58568be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 58578be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 58588be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 58598be986ccSStephen Cameron */ 58608be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 58618be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 58628be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 58638be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 58648be986ccSStephen Cameron sizeof(ac->error_len)); 58658be986ccSStephen Cameron 58668be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5867a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5868a58e7e53SWebb Scales 58698be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 58708be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 58718be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 58728be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 58738be986ccSStephen Cameron 58748be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 58758be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 58768be986ccSStephen Cameron ac->reply_queue = reply_queue; 58778be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 58788be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 58798be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 58808be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 58818be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 58828be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 58838be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 58848be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 58858be986ccSStephen Cameron } 58868be986ccSStephen Cameron 588754b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 588854b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 588954b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 589054b6e9e9SScott Teel * Return 0 on success (IO_OK) 589154b6e9e9SScott Teel * -1 on failure 589254b6e9e9SScott Teel */ 589354b6e9e9SScott Teel 589454b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 589525163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 589654b6e9e9SScott Teel { 589754b6e9e9SScott Teel int rc = IO_OK; 589854b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 589954b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 590054b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 590154b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 590254b6e9e9SScott Teel 590354b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 59047fa3030cSStephen Cameron scmd = abort->scsi_cmd; 590554b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 590654b6e9e9SScott Teel if (dev == NULL) { 590754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 590854b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 590954b6e9e9SScott Teel return -1; /* not abortable */ 591054b6e9e9SScott Teel } 591154b6e9e9SScott Teel 59122ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 59132ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 59140d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 59152ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 59160d96ef5fSWebb Scales "Reset as abort", 59172ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 59182ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 59192ba8bfc8SStephen M. Cameron 592054b6e9e9SScott Teel if (!dev->offload_enabled) { 592154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 592254b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 592354b6e9e9SScott Teel return -1; /* not abortable */ 592454b6e9e9SScott Teel } 592554b6e9e9SScott Teel 592654b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 592754b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 592854b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 592954b6e9e9SScott Teel return -1; /* not abortable */ 593054b6e9e9SScott Teel } 593154b6e9e9SScott Teel 593254b6e9e9SScott Teel /* send the reset */ 59332ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 59342ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 59352ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 59362ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 59372ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5938d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 593954b6e9e9SScott Teel if (rc != 0) { 594054b6e9e9SScott Teel dev_warn(&h->pdev->dev, 594154b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 594254b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 594354b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 594454b6e9e9SScott Teel return rc; /* failed to reset */ 594554b6e9e9SScott Teel } 594654b6e9e9SScott Teel 594754b6e9e9SScott Teel /* wait for device to recover */ 5948b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 594954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 595054b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 595154b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 595254b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 595354b6e9e9SScott Teel return -1; /* failed to recover */ 595454b6e9e9SScott Teel } 595554b6e9e9SScott Teel 595654b6e9e9SScott Teel /* device recovered */ 595754b6e9e9SScott Teel dev_info(&h->pdev->dev, 595854b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 595954b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 596054b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 596154b6e9e9SScott Teel 596254b6e9e9SScott Teel return rc; /* success */ 596354b6e9e9SScott Teel } 596454b6e9e9SScott Teel 59658be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 59668be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 59678be986ccSStephen Cameron { 59688be986ccSStephen Cameron int rc = IO_OK; 59698be986ccSStephen Cameron struct CommandList *c; 59708be986ccSStephen Cameron __le32 taglower, tagupper; 59718be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 59728be986ccSStephen Cameron struct io_accel2_cmd *c2; 59738be986ccSStephen Cameron 59748be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 59758be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 59768be986ccSStephen Cameron return -1; 59778be986ccSStephen Cameron 59788be986ccSStephen Cameron c = cmd_alloc(h); 59798be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 59808be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5981c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 59828be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 59838be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 59848be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 59858be986ccSStephen Cameron __func__, tagupper, taglower); 59868be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 59878be986ccSStephen Cameron 59888be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 59898be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 59908be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 59918be986ccSStephen Cameron switch (c2->error_data.serv_response) { 59928be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 59938be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 59948be986ccSStephen Cameron rc = 0; 59958be986ccSStephen Cameron break; 59968be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 59978be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 59988be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 59998be986ccSStephen Cameron rc = -1; 60008be986ccSStephen Cameron break; 60018be986ccSStephen Cameron default: 60028be986ccSStephen Cameron dev_warn(&h->pdev->dev, 60038be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 60048be986ccSStephen Cameron __func__, tagupper, taglower, 60058be986ccSStephen Cameron c2->error_data.serv_response); 60068be986ccSStephen Cameron rc = -1; 60078be986ccSStephen Cameron } 60088be986ccSStephen Cameron cmd_free(h, c); 60098be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 60108be986ccSStephen Cameron tagupper, taglower); 60118be986ccSStephen Cameron return rc; 60128be986ccSStephen Cameron } 60138be986ccSStephen Cameron 60146cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 601539f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 60166cba3f19SStephen M. Cameron { 60178be986ccSStephen Cameron /* 60188be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 601954b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 60208be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 60218be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 602254b6e9e9SScott Teel */ 60238be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 602439f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 602539f3deb2SDon Brace dev->physical_device) 60268be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 60278be986ccSStephen Cameron reply_queue); 60288be986ccSStephen Cameron else 602939f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 603039f3deb2SDon Brace dev->scsi3addr, 603125163bd5SWebb Scales abort, reply_queue); 60328be986ccSStephen Cameron } 603339f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 603425163bd5SWebb Scales } 603525163bd5SWebb Scales 603625163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 603725163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 603825163bd5SWebb Scales struct CommandList *c) 603925163bd5SWebb Scales { 604025163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 604125163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 604225163bd5SWebb Scales return c->Header.ReplyQueue; 60436cba3f19SStephen M. Cameron } 60446cba3f19SStephen M. Cameron 60459b5c48c2SStephen Cameron /* 60469b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 60479b5c48c2SStephen Cameron * over-subscription of commands 60489b5c48c2SStephen Cameron */ 60499b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 60509b5c48c2SStephen Cameron { 60519b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 60529b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 60539b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 60549b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 60559b5c48c2SStephen Cameron } 60569b5c48c2SStephen Cameron 605775167d2cSStephen M. Cameron /* Send an abort for the specified command. 605875167d2cSStephen M. Cameron * If the device and controller support it, 605975167d2cSStephen M. Cameron * send a task abort request. 606075167d2cSStephen M. Cameron */ 606175167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 606275167d2cSStephen M. Cameron { 606375167d2cSStephen M. Cameron 6064a58e7e53SWebb Scales int rc; 606575167d2cSStephen M. Cameron struct ctlr_info *h; 606675167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 606775167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 606875167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 606975167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 607075167d2cSStephen M. Cameron int ml = 0; 60712b08b3e9SDon Brace __le32 tagupper, taglower; 607225163bd5SWebb Scales int refcount, reply_queue; 607325163bd5SWebb Scales 607425163bd5SWebb Scales if (sc == NULL) 607525163bd5SWebb Scales return FAILED; 607675167d2cSStephen M. Cameron 60779b5c48c2SStephen Cameron if (sc->device == NULL) 60789b5c48c2SStephen Cameron return FAILED; 60799b5c48c2SStephen Cameron 608075167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 608175167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 60829b5c48c2SStephen Cameron if (h == NULL) 608375167d2cSStephen M. Cameron return FAILED; 608475167d2cSStephen M. Cameron 608525163bd5SWebb Scales /* Find the device of the command to be aborted */ 608625163bd5SWebb Scales dev = sc->device->hostdata; 608725163bd5SWebb Scales if (!dev) { 608825163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 608925163bd5SWebb Scales msg); 6090e345893bSDon Brace return FAILED; 609125163bd5SWebb Scales } 609225163bd5SWebb Scales 609325163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 609425163bd5SWebb Scales if (lockup_detected(h)) { 609525163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 609625163bd5SWebb Scales "ABORT FAILED, lockup detected"); 609725163bd5SWebb Scales return FAILED; 609825163bd5SWebb Scales } 609925163bd5SWebb Scales 610025163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 610125163bd5SWebb Scales if (detect_controller_lockup(h)) { 610225163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 610325163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 610425163bd5SWebb Scales return FAILED; 610525163bd5SWebb Scales } 6106e345893bSDon Brace 610775167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 610875167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 610975167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 611075167d2cSStephen M. Cameron return FAILED; 611175167d2cSStephen M. Cameron 611275167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 61134b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 611475167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 61150d96ef5fSWebb Scales sc->device->id, sc->device->lun, 61164b761557SRobert Elliott "Aborting command", sc); 611775167d2cSStephen M. Cameron 611875167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 611975167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 612075167d2cSStephen M. Cameron if (abort == NULL) { 6121281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6122281a7fd0SWebb Scales return SUCCESS; 6123281a7fd0SWebb Scales } 6124281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6125281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6126281a7fd0SWebb Scales cmd_free(h, abort); 6127281a7fd0SWebb Scales return SUCCESS; 612875167d2cSStephen M. Cameron } 61299b5c48c2SStephen Cameron 61309b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 61319b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 61329b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 61339b5c48c2SStephen Cameron cmd_free(h, abort); 61349b5c48c2SStephen Cameron return FAILED; 61359b5c48c2SStephen Cameron } 61369b5c48c2SStephen Cameron 6137a58e7e53SWebb Scales /* 6138a58e7e53SWebb Scales * Check that we're aborting the right command. 6139a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6140a58e7e53SWebb Scales */ 6141a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6142a58e7e53SWebb Scales cmd_free(h, abort); 6143a58e7e53SWebb Scales return SUCCESS; 6144a58e7e53SWebb Scales } 6145a58e7e53SWebb Scales 6146a58e7e53SWebb Scales abort->abort_pending = true; 614717eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 614825163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 614917eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 61507fa3030cSStephen Cameron as = abort->scsi_cmd; 615175167d2cSStephen M. Cameron if (as != NULL) 61524b761557SRobert Elliott ml += sprintf(msg+ml, 61534b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 61544b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 61554b761557SRobert Elliott as->serial_number); 61564b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 61570d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 61584b761557SRobert Elliott 615975167d2cSStephen M. Cameron /* 616075167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 616175167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 616275167d2cSStephen M. Cameron * distinguish which. Send the abort down. 616375167d2cSStephen M. Cameron */ 61649b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 61659b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 61664b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 61674b761557SRobert Elliott msg); 61689b5c48c2SStephen Cameron cmd_free(h, abort); 61699b5c48c2SStephen Cameron return FAILED; 61709b5c48c2SStephen Cameron } 617139f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 61729b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 61739b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 617475167d2cSStephen M. Cameron if (rc != 0) { 61754b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 61760d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 61770d96ef5fSWebb Scales "FAILED to abort command"); 6178281a7fd0SWebb Scales cmd_free(h, abort); 617975167d2cSStephen M. Cameron return FAILED; 618075167d2cSStephen M. Cameron } 61814b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6182d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6183a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6184281a7fd0SWebb Scales cmd_free(h, abort); 6185a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 618675167d2cSStephen M. Cameron } 618775167d2cSStephen M. Cameron 6188edd16368SStephen M. Cameron /* 618973153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 619073153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 619173153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 619273153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 619373153fe5SWebb Scales */ 619473153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 619573153fe5SWebb Scales struct scsi_cmnd *scmd) 619673153fe5SWebb Scales { 619773153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 619873153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 619973153fe5SWebb Scales 620073153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 620173153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 620273153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 620373153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 620473153fe5SWebb Scales * bounds, it's probably not our bug. 620573153fe5SWebb Scales */ 620673153fe5SWebb Scales BUG(); 620773153fe5SWebb Scales } 620873153fe5SWebb Scales 620973153fe5SWebb Scales atomic_inc(&c->refcount); 621073153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 621173153fe5SWebb Scales /* 621273153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 621373153fe5SWebb Scales * value. Thus, there should never be a collision here between 621473153fe5SWebb Scales * two requests...because if the selected command isn't idle 621573153fe5SWebb Scales * then someone is going to be very disappointed. 621673153fe5SWebb Scales */ 621773153fe5SWebb Scales dev_err(&h->pdev->dev, 621873153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 621973153fe5SWebb Scales idx); 622073153fe5SWebb Scales if (c->scsi_cmd != NULL) 622173153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 622273153fe5SWebb Scales scsi_print_command(scmd); 622373153fe5SWebb Scales } 622473153fe5SWebb Scales 622573153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 622673153fe5SWebb Scales return c; 622773153fe5SWebb Scales } 622873153fe5SWebb Scales 622973153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 623073153fe5SWebb Scales { 623173153fe5SWebb Scales /* 623273153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 623373153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 623473153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 623573153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 623673153fe5SWebb Scales */ 623773153fe5SWebb Scales (void)atomic_dec(&c->refcount); 623873153fe5SWebb Scales } 623973153fe5SWebb Scales 624073153fe5SWebb Scales /* 6241edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6242edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6243edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6244edd16368SStephen M. Cameron * cmd_free() is the complement. 6245bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6246bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6247edd16368SStephen M. Cameron */ 6248281a7fd0SWebb Scales 6249edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6250edd16368SStephen M. Cameron { 6251edd16368SStephen M. Cameron struct CommandList *c; 6252360c73bdSStephen Cameron int refcount, i; 625373153fe5SWebb Scales int offset = 0; 6254edd16368SStephen M. Cameron 625533811026SRobert Elliott /* 625633811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 62574c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 62584c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 62594c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 62604c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 62614c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 62624c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 62634c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 62644c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 626573153fe5SWebb Scales * 626673153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 626773153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 626873153fe5SWebb Scales * all works, since we have at least one command structure available; 626973153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 627073153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 627173153fe5SWebb Scales * layer will use the higher indexes. 62724c413128SStephen M. Cameron */ 62734c413128SStephen M. Cameron 6274281a7fd0SWebb Scales for (;;) { 627573153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 627673153fe5SWebb Scales HPSA_NRESERVED_CMDS, 627773153fe5SWebb Scales offset); 627873153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6279281a7fd0SWebb Scales offset = 0; 6280281a7fd0SWebb Scales continue; 6281281a7fd0SWebb Scales } 6282edd16368SStephen M. Cameron c = h->cmd_pool + i; 6283281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6284281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6285281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 628673153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6287281a7fd0SWebb Scales continue; 6288281a7fd0SWebb Scales } 6289281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6290281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6291281a7fd0SWebb Scales break; /* it's ours now. */ 6292281a7fd0SWebb Scales } 6293360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6294edd16368SStephen M. Cameron return c; 6295edd16368SStephen M. Cameron } 6296edd16368SStephen M. Cameron 629773153fe5SWebb Scales /* 629873153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 629973153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 630073153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 630173153fe5SWebb Scales * the clear-bit is harmless. 630273153fe5SWebb Scales */ 6303edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6304edd16368SStephen M. Cameron { 6305281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6306edd16368SStephen M. Cameron int i; 6307edd16368SStephen M. Cameron 6308edd16368SStephen M. Cameron i = c - h->cmd_pool; 6309edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6310edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6311edd16368SStephen M. Cameron } 6312281a7fd0SWebb Scales } 6313edd16368SStephen M. Cameron 6314edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6315edd16368SStephen M. Cameron 631642a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 631742a91641SDon Brace void __user *arg) 6318edd16368SStephen M. Cameron { 6319edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6320edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6321edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6322edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6323edd16368SStephen M. Cameron int err; 6324edd16368SStephen M. Cameron u32 cp; 6325edd16368SStephen M. Cameron 6326938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6327edd16368SStephen M. Cameron err = 0; 6328edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6329edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6330edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6331edd16368SStephen M. Cameron sizeof(arg64.Request)); 6332edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6333edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6334edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6335edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6336edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6337edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6338edd16368SStephen M. Cameron 6339edd16368SStephen M. Cameron if (err) 6340edd16368SStephen M. Cameron return -EFAULT; 6341edd16368SStephen M. Cameron 634242a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6343edd16368SStephen M. Cameron if (err) 6344edd16368SStephen M. Cameron return err; 6345edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6346edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6347edd16368SStephen M. Cameron if (err) 6348edd16368SStephen M. Cameron return -EFAULT; 6349edd16368SStephen M. Cameron return err; 6350edd16368SStephen M. Cameron } 6351edd16368SStephen M. Cameron 6352edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 635342a91641SDon Brace int cmd, void __user *arg) 6354edd16368SStephen M. Cameron { 6355edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6356edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6357edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6358edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6359edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6360edd16368SStephen M. Cameron int err; 6361edd16368SStephen M. Cameron u32 cp; 6362edd16368SStephen M. Cameron 6363938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6364edd16368SStephen M. Cameron err = 0; 6365edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6366edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6367edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6368edd16368SStephen M. Cameron sizeof(arg64.Request)); 6369edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6370edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6371edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6372edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6373edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6374edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6375edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6376edd16368SStephen M. Cameron 6377edd16368SStephen M. Cameron if (err) 6378edd16368SStephen M. Cameron return -EFAULT; 6379edd16368SStephen M. Cameron 638042a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6381edd16368SStephen M. Cameron if (err) 6382edd16368SStephen M. Cameron return err; 6383edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6384edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6385edd16368SStephen M. Cameron if (err) 6386edd16368SStephen M. Cameron return -EFAULT; 6387edd16368SStephen M. Cameron return err; 6388edd16368SStephen M. Cameron } 638971fe75a7SStephen M. Cameron 639042a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 639171fe75a7SStephen M. Cameron { 639271fe75a7SStephen M. Cameron switch (cmd) { 639371fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 639471fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 639571fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 639671fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 639771fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 639871fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 639971fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 640071fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 640171fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 640271fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 640371fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 640471fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 640571fe75a7SStephen M. Cameron case CCISS_REGNEWD: 640671fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 640771fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 640871fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 640971fe75a7SStephen M. Cameron 641071fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 641171fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 641271fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 641371fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 641471fe75a7SStephen M. Cameron 641571fe75a7SStephen M. Cameron default: 641671fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 641771fe75a7SStephen M. Cameron } 641871fe75a7SStephen M. Cameron } 6419edd16368SStephen M. Cameron #endif 6420edd16368SStephen M. Cameron 6421edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6422edd16368SStephen M. Cameron { 6423edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6424edd16368SStephen M. Cameron 6425edd16368SStephen M. Cameron if (!argp) 6426edd16368SStephen M. Cameron return -EINVAL; 6427edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6428edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6429edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6430edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6431edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6432edd16368SStephen M. Cameron return -EFAULT; 6433edd16368SStephen M. Cameron return 0; 6434edd16368SStephen M. Cameron } 6435edd16368SStephen M. Cameron 6436edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6437edd16368SStephen M. Cameron { 6438edd16368SStephen M. Cameron DriverVer_type DriverVer; 6439edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6440edd16368SStephen M. Cameron int rc; 6441edd16368SStephen M. Cameron 6442edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6443edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6444edd16368SStephen M. Cameron if (rc != 3) { 6445edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6446edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6447edd16368SStephen M. Cameron vmaj = 0; 6448edd16368SStephen M. Cameron vmin = 0; 6449edd16368SStephen M. Cameron vsubmin = 0; 6450edd16368SStephen M. Cameron } 6451edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6452edd16368SStephen M. Cameron if (!argp) 6453edd16368SStephen M. Cameron return -EINVAL; 6454edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6455edd16368SStephen M. Cameron return -EFAULT; 6456edd16368SStephen M. Cameron return 0; 6457edd16368SStephen M. Cameron } 6458edd16368SStephen M. Cameron 6459edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6460edd16368SStephen M. Cameron { 6461edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6462edd16368SStephen M. Cameron struct CommandList *c; 6463edd16368SStephen M. Cameron char *buff = NULL; 646450a0decfSStephen M. Cameron u64 temp64; 6465c1f63c8fSStephen M. Cameron int rc = 0; 6466edd16368SStephen M. Cameron 6467edd16368SStephen M. Cameron if (!argp) 6468edd16368SStephen M. Cameron return -EINVAL; 6469edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6470edd16368SStephen M. Cameron return -EPERM; 6471edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6472edd16368SStephen M. Cameron return -EFAULT; 6473edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6474edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6475edd16368SStephen M. Cameron return -EINVAL; 6476edd16368SStephen M. Cameron } 6477edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6478edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6479edd16368SStephen M. Cameron if (buff == NULL) 64802dd02d74SRobert Elliott return -ENOMEM; 64819233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6482edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6483b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6484b03a7771SStephen M. Cameron iocommand.buf_size)) { 6485c1f63c8fSStephen M. Cameron rc = -EFAULT; 6486c1f63c8fSStephen M. Cameron goto out_kfree; 6487edd16368SStephen M. Cameron } 6488b03a7771SStephen M. Cameron } else { 6489edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6490b03a7771SStephen M. Cameron } 6491b03a7771SStephen M. Cameron } 649245fcb86eSStephen Cameron c = cmd_alloc(h); 6493bf43caf3SRobert Elliott 6494edd16368SStephen M. Cameron /* Fill in the command type */ 6495edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6496a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6497edd16368SStephen M. Cameron /* Fill in Command Header */ 6498edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6499edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6500edd16368SStephen M. Cameron c->Header.SGList = 1; 650150a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6502edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6503edd16368SStephen M. Cameron c->Header.SGList = 0; 650450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6505edd16368SStephen M. Cameron } 6506edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6507edd16368SStephen M. Cameron 6508edd16368SStephen M. Cameron /* Fill in Request block */ 6509edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6510edd16368SStephen M. Cameron sizeof(c->Request)); 6511edd16368SStephen M. Cameron 6512edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6513edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 651450a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6515edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 651650a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 651750a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 651850a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6519bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6520bcc48ffaSStephen M. Cameron goto out; 6521bcc48ffaSStephen M. Cameron } 652250a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 652350a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 652450a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6525edd16368SStephen M. Cameron } 6526c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6527*3fb134cbSDon Brace NO_TIMEOUT); 6528c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6529edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6530edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 653125163bd5SWebb Scales if (rc) { 653225163bd5SWebb Scales rc = -EIO; 653325163bd5SWebb Scales goto out; 653425163bd5SWebb Scales } 6535edd16368SStephen M. Cameron 6536edd16368SStephen M. Cameron /* Copy the error information out */ 6537edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6538edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6539edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6540c1f63c8fSStephen M. Cameron rc = -EFAULT; 6541c1f63c8fSStephen M. Cameron goto out; 6542edd16368SStephen M. Cameron } 65439233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6544b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6545edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6546edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6547c1f63c8fSStephen M. Cameron rc = -EFAULT; 6548c1f63c8fSStephen M. Cameron goto out; 6549edd16368SStephen M. Cameron } 6550edd16368SStephen M. Cameron } 6551c1f63c8fSStephen M. Cameron out: 655245fcb86eSStephen Cameron cmd_free(h, c); 6553c1f63c8fSStephen M. Cameron out_kfree: 6554c1f63c8fSStephen M. Cameron kfree(buff); 6555c1f63c8fSStephen M. Cameron return rc; 6556edd16368SStephen M. Cameron } 6557edd16368SStephen M. Cameron 6558edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6559edd16368SStephen M. Cameron { 6560edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6561edd16368SStephen M. Cameron struct CommandList *c; 6562edd16368SStephen M. Cameron unsigned char **buff = NULL; 6563edd16368SStephen M. Cameron int *buff_size = NULL; 656450a0decfSStephen M. Cameron u64 temp64; 6565edd16368SStephen M. Cameron BYTE sg_used = 0; 6566edd16368SStephen M. Cameron int status = 0; 656701a02ffcSStephen M. Cameron u32 left; 656801a02ffcSStephen M. Cameron u32 sz; 6569edd16368SStephen M. Cameron BYTE __user *data_ptr; 6570edd16368SStephen M. Cameron 6571edd16368SStephen M. Cameron if (!argp) 6572edd16368SStephen M. Cameron return -EINVAL; 6573edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6574edd16368SStephen M. Cameron return -EPERM; 6575edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6576edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6577edd16368SStephen M. Cameron if (!ioc) { 6578edd16368SStephen M. Cameron status = -ENOMEM; 6579edd16368SStephen M. Cameron goto cleanup1; 6580edd16368SStephen M. Cameron } 6581edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6582edd16368SStephen M. Cameron status = -EFAULT; 6583edd16368SStephen M. Cameron goto cleanup1; 6584edd16368SStephen M. Cameron } 6585edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6586edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6587edd16368SStephen M. Cameron status = -EINVAL; 6588edd16368SStephen M. Cameron goto cleanup1; 6589edd16368SStephen M. Cameron } 6590edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6591edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6592edd16368SStephen M. Cameron status = -EINVAL; 6593edd16368SStephen M. Cameron goto cleanup1; 6594edd16368SStephen M. Cameron } 6595d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6596edd16368SStephen M. Cameron status = -EINVAL; 6597edd16368SStephen M. Cameron goto cleanup1; 6598edd16368SStephen M. Cameron } 6599d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6600edd16368SStephen M. Cameron if (!buff) { 6601edd16368SStephen M. Cameron status = -ENOMEM; 6602edd16368SStephen M. Cameron goto cleanup1; 6603edd16368SStephen M. Cameron } 6604d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6605edd16368SStephen M. Cameron if (!buff_size) { 6606edd16368SStephen M. Cameron status = -ENOMEM; 6607edd16368SStephen M. Cameron goto cleanup1; 6608edd16368SStephen M. Cameron } 6609edd16368SStephen M. Cameron left = ioc->buf_size; 6610edd16368SStephen M. Cameron data_ptr = ioc->buf; 6611edd16368SStephen M. Cameron while (left) { 6612edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6613edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6614edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6615edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6616edd16368SStephen M. Cameron status = -ENOMEM; 6617edd16368SStephen M. Cameron goto cleanup1; 6618edd16368SStephen M. Cameron } 66199233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6620edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 66210758f4f7SStephen M. Cameron status = -EFAULT; 6622edd16368SStephen M. Cameron goto cleanup1; 6623edd16368SStephen M. Cameron } 6624edd16368SStephen M. Cameron } else 6625edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6626edd16368SStephen M. Cameron left -= sz; 6627edd16368SStephen M. Cameron data_ptr += sz; 6628edd16368SStephen M. Cameron sg_used++; 6629edd16368SStephen M. Cameron } 663045fcb86eSStephen Cameron c = cmd_alloc(h); 6631bf43caf3SRobert Elliott 6632edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6633a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6634edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 663550a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 663650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6637edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6638edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6639edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6640edd16368SStephen M. Cameron int i; 6641edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 664250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6643edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 664450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 664550a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 664650a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 664750a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6648bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6649bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6650bcc48ffaSStephen M. Cameron status = -ENOMEM; 6651e2d4a1f6SStephen M. Cameron goto cleanup0; 6652bcc48ffaSStephen M. Cameron } 665350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 665450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 665550a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6656edd16368SStephen M. Cameron } 665750a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6658edd16368SStephen M. Cameron } 6659c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6660*3fb134cbSDon Brace NO_TIMEOUT); 6661b03a7771SStephen M. Cameron if (sg_used) 6662edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6663edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 666425163bd5SWebb Scales if (status) { 666525163bd5SWebb Scales status = -EIO; 666625163bd5SWebb Scales goto cleanup0; 666725163bd5SWebb Scales } 666825163bd5SWebb Scales 6669edd16368SStephen M. Cameron /* Copy the error information out */ 6670edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6671edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6672edd16368SStephen M. Cameron status = -EFAULT; 6673e2d4a1f6SStephen M. Cameron goto cleanup0; 6674edd16368SStephen M. Cameron } 66759233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 66762b08b3e9SDon Brace int i; 66772b08b3e9SDon Brace 6678edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6679edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6680edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6681edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6682edd16368SStephen M. Cameron status = -EFAULT; 6683e2d4a1f6SStephen M. Cameron goto cleanup0; 6684edd16368SStephen M. Cameron } 6685edd16368SStephen M. Cameron ptr += buff_size[i]; 6686edd16368SStephen M. Cameron } 6687edd16368SStephen M. Cameron } 6688edd16368SStephen M. Cameron status = 0; 6689e2d4a1f6SStephen M. Cameron cleanup0: 669045fcb86eSStephen Cameron cmd_free(h, c); 6691edd16368SStephen M. Cameron cleanup1: 6692edd16368SStephen M. Cameron if (buff) { 66932b08b3e9SDon Brace int i; 66942b08b3e9SDon Brace 6695edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6696edd16368SStephen M. Cameron kfree(buff[i]); 6697edd16368SStephen M. Cameron kfree(buff); 6698edd16368SStephen M. Cameron } 6699edd16368SStephen M. Cameron kfree(buff_size); 6700edd16368SStephen M. Cameron kfree(ioc); 6701edd16368SStephen M. Cameron return status; 6702edd16368SStephen M. Cameron } 6703edd16368SStephen M. Cameron 6704edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6705edd16368SStephen M. Cameron struct CommandList *c) 6706edd16368SStephen M. Cameron { 6707edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6708edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6709edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6710edd16368SStephen M. Cameron } 67110390f0c0SStephen M. Cameron 6712edd16368SStephen M. Cameron /* 6713edd16368SStephen M. Cameron * ioctl 6714edd16368SStephen M. Cameron */ 671542a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6716edd16368SStephen M. Cameron { 6717edd16368SStephen M. Cameron struct ctlr_info *h; 6718edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 67190390f0c0SStephen M. Cameron int rc; 6720edd16368SStephen M. Cameron 6721edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6722edd16368SStephen M. Cameron 6723edd16368SStephen M. Cameron switch (cmd) { 6724edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6725edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6726edd16368SStephen M. Cameron case CCISS_REGNEWD: 6727a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6728edd16368SStephen M. Cameron return 0; 6729edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6730edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6731edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6732edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6733edd16368SStephen M. Cameron case CCISS_PASSTHRU: 673434f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 67350390f0c0SStephen M. Cameron return -EAGAIN; 67360390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 673734f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 67380390f0c0SStephen M. Cameron return rc; 6739edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 674034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 67410390f0c0SStephen M. Cameron return -EAGAIN; 67420390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 674334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 67440390f0c0SStephen M. Cameron return rc; 6745edd16368SStephen M. Cameron default: 6746edd16368SStephen M. Cameron return -ENOTTY; 6747edd16368SStephen M. Cameron } 6748edd16368SStephen M. Cameron } 6749edd16368SStephen M. Cameron 6750bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 67516f039790SGreg Kroah-Hartman u8 reset_type) 675264670ac8SStephen M. Cameron { 675364670ac8SStephen M. Cameron struct CommandList *c; 675464670ac8SStephen M. Cameron 675564670ac8SStephen M. Cameron c = cmd_alloc(h); 6756bf43caf3SRobert Elliott 6757a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6758a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 675964670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 676064670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 676164670ac8SStephen M. Cameron c->waiting = NULL; 676264670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 676364670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 676464670ac8SStephen M. Cameron * the command either. This is the last command we will send before 676564670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 676664670ac8SStephen M. Cameron */ 6767bf43caf3SRobert Elliott return; 676864670ac8SStephen M. Cameron } 676964670ac8SStephen M. Cameron 6770a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6771b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6772edd16368SStephen M. Cameron int cmd_type) 6773edd16368SStephen M. Cameron { 6774edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 67759b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6776edd16368SStephen M. Cameron 6777edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6778a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6779edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6780edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6781edd16368SStephen M. Cameron c->Header.SGList = 1; 678250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6783edd16368SStephen M. Cameron } else { 6784edd16368SStephen M. Cameron c->Header.SGList = 0; 678550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6786edd16368SStephen M. Cameron } 6787edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6788edd16368SStephen M. Cameron 6789edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6790edd16368SStephen M. Cameron switch (cmd) { 6791edd16368SStephen M. Cameron case HPSA_INQUIRY: 6792edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6793b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6794edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6795b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6796edd16368SStephen M. Cameron } 6797edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6798a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6799a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6800edd16368SStephen M. Cameron c->Request.Timeout = 0; 6801edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6802edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6803edd16368SStephen M. Cameron break; 6804edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6805edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6806edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6807edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6808edd16368SStephen M. Cameron */ 6809edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6810a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6811a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6812edd16368SStephen M. Cameron c->Request.Timeout = 0; 6813edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6814edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6815edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6816edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6817edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6818edd16368SStephen M. Cameron break; 6819c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6820c2adae44SScott Teel c->Request.CDBLen = 16; 6821c2adae44SScott Teel c->Request.type_attr_dir = 6822c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6823c2adae44SScott Teel c->Request.Timeout = 0; 6824c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6825c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6826c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6827c2adae44SScott Teel break; 6828c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6829c2adae44SScott Teel c->Request.CDBLen = 16; 6830c2adae44SScott Teel c->Request.type_attr_dir = 6831c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6832c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6833c2adae44SScott Teel c->Request.Timeout = 0; 6834c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6835c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6836c2adae44SScott Teel break; 6837edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6838edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6839a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6840a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6841a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6842edd16368SStephen M. Cameron c->Request.Timeout = 0; 6843edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6844edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6845bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6846bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6847edd16368SStephen M. Cameron break; 6848edd16368SStephen M. Cameron case TEST_UNIT_READY: 6849edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6850a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6851a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6852edd16368SStephen M. Cameron c->Request.Timeout = 0; 6853edd16368SStephen M. Cameron break; 6854283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6855283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6856a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6857a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6858283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6859283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6860283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6861283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6862283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6863283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6864283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6865283b4a9bSStephen M. Cameron break; 6866316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6867316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6868a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6869a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6870316b221aSStephen M. Cameron c->Request.Timeout = 0; 6871316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6872316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6873316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6874316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6875316b221aSStephen M. Cameron break; 687603383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 687703383736SDon Brace c->Request.CDBLen = 10; 687803383736SDon Brace c->Request.type_attr_dir = 687903383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 688003383736SDon Brace c->Request.Timeout = 0; 688103383736SDon Brace c->Request.CDB[0] = BMIC_READ; 688203383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 688303383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 688403383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 688503383736SDon Brace break; 6886d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6887d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6888d04e62b9SKevin Barnett c->Request.type_attr_dir = 6889d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6890d04e62b9SKevin Barnett c->Request.Timeout = 0; 6891d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6892d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6893d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6894d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6895d04e62b9SKevin Barnett break; 6896cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6897cca8f13bSDon Brace c->Request.CDBLen = 10; 6898cca8f13bSDon Brace c->Request.type_attr_dir = 6899cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6900cca8f13bSDon Brace c->Request.Timeout = 0; 6901cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6902cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6903cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6904cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6905cca8f13bSDon Brace break; 690666749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 690766749d0dSScott Teel c->Request.CDBLen = 10; 690866749d0dSScott Teel c->Request.type_attr_dir = 690966749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 691066749d0dSScott Teel c->Request.Timeout = 0; 691166749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 691266749d0dSScott Teel c->Request.CDB[1] = 0; 691366749d0dSScott Teel c->Request.CDB[2] = 0; 691466749d0dSScott Teel c->Request.CDB[3] = 0; 691566749d0dSScott Teel c->Request.CDB[4] = 0; 691666749d0dSScott Teel c->Request.CDB[5] = 0; 691766749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 691866749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 691966749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 692066749d0dSScott Teel c->Request.CDB[9] = 0; 692166749d0dSScott Teel break; 6922edd16368SStephen M. Cameron default: 6923edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6924edd16368SStephen M. Cameron BUG(); 6925a2dac136SStephen M. Cameron return -1; 6926edd16368SStephen M. Cameron } 6927edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6928edd16368SStephen M. Cameron switch (cmd) { 6929edd16368SStephen M. Cameron 69300b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 69310b9b7b6eSScott Teel c->Request.CDBLen = 16; 69320b9b7b6eSScott Teel c->Request.type_attr_dir = 69330b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 69340b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 69350b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 69360b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 69370b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 69380b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 69390b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 69400b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 69410b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 69420b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 69430b9b7b6eSScott Teel break; 6944edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6945edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6946a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6947a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6948edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 694964670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 695064670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 695121e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6952edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6953edd16368SStephen M. Cameron /* LunID device */ 6954edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6955edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6956edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6957edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6958edd16368SStephen M. Cameron break; 695975167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 69609b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 69612b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 69629b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 69639b5c48c2SStephen Cameron tag, c->Header.tag); 696475167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6965a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6966a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6967a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 696875167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 696975167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 697075167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 697175167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 697275167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 697375167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 69749b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 697575167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 697675167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 697775167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 697875167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 697975167d2cSStephen M. Cameron break; 6980edd16368SStephen M. Cameron default: 6981edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6982edd16368SStephen M. Cameron cmd); 6983edd16368SStephen M. Cameron BUG(); 6984edd16368SStephen M. Cameron } 6985edd16368SStephen M. Cameron } else { 6986edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6987edd16368SStephen M. Cameron BUG(); 6988edd16368SStephen M. Cameron } 6989edd16368SStephen M. Cameron 6990a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6991edd16368SStephen M. Cameron case XFER_READ: 6992edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6993edd16368SStephen M. Cameron break; 6994edd16368SStephen M. Cameron case XFER_WRITE: 6995edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6996edd16368SStephen M. Cameron break; 6997edd16368SStephen M. Cameron case XFER_NONE: 6998edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6999edd16368SStephen M. Cameron break; 7000edd16368SStephen M. Cameron default: 7001edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7002edd16368SStephen M. Cameron } 7003a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7004a2dac136SStephen M. Cameron return -1; 7005a2dac136SStephen M. Cameron return 0; 7006edd16368SStephen M. Cameron } 7007edd16368SStephen M. Cameron 7008edd16368SStephen M. Cameron /* 7009edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7010edd16368SStephen M. Cameron */ 7011edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7012edd16368SStephen M. Cameron { 7013edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7014edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7015088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7016088ba34cSStephen M. Cameron page_offs + size); 7017edd16368SStephen M. Cameron 7018edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7019edd16368SStephen M. Cameron } 7020edd16368SStephen M. Cameron 7021254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7022edd16368SStephen M. Cameron { 7023254f796bSMatt Gates return h->access.command_completed(h, q); 7024edd16368SStephen M. Cameron } 7025edd16368SStephen M. Cameron 7026900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7027edd16368SStephen M. Cameron { 7028edd16368SStephen M. Cameron return h->access.intr_pending(h); 7029edd16368SStephen M. Cameron } 7030edd16368SStephen M. Cameron 7031edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7032edd16368SStephen M. Cameron { 703310f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 703410f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7035edd16368SStephen M. Cameron } 7036edd16368SStephen M. Cameron 703701a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 703801a02ffcSStephen M. Cameron u32 raw_tag) 7039edd16368SStephen M. Cameron { 7040edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7041edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7042edd16368SStephen M. Cameron return 1; 7043edd16368SStephen M. Cameron } 7044edd16368SStephen M. Cameron return 0; 7045edd16368SStephen M. Cameron } 7046edd16368SStephen M. Cameron 70475a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7048edd16368SStephen M. Cameron { 7049e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7050c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7051c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 70521fb011fbSStephen M. Cameron complete_scsi_command(c); 70538be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7054edd16368SStephen M. Cameron complete(c->waiting); 7055a104c99fSStephen M. Cameron } 7056a104c99fSStephen M. Cameron 7057303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 70581d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7059303932fdSDon Brace u32 raw_tag) 7060303932fdSDon Brace { 7061303932fdSDon Brace u32 tag_index; 7062303932fdSDon Brace struct CommandList *c; 7063303932fdSDon Brace 7064f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 70651d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7066303932fdSDon Brace c = h->cmd_pool + tag_index; 70675a3d16f5SStephen M. Cameron finish_cmd(c); 70681d94f94dSStephen M. Cameron } 7069303932fdSDon Brace } 7070303932fdSDon Brace 707164670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 707264670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 707364670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 707464670ac8SStephen M. Cameron * functions. 707564670ac8SStephen M. Cameron */ 707664670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 707764670ac8SStephen M. Cameron { 707864670ac8SStephen M. Cameron if (likely(!reset_devices)) 707964670ac8SStephen M. Cameron return 0; 708064670ac8SStephen M. Cameron 708164670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 708264670ac8SStephen M. Cameron return 0; 708364670ac8SStephen M. Cameron 708464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 708564670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 708664670ac8SStephen M. Cameron 708764670ac8SStephen M. Cameron return 1; 708864670ac8SStephen M. Cameron } 708964670ac8SStephen M. Cameron 7090254f796bSMatt Gates /* 7091254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7092254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7093254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7094254f796bSMatt Gates */ 7095254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 709664670ac8SStephen M. Cameron { 7097254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7098254f796bSMatt Gates } 7099254f796bSMatt Gates 7100254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7101254f796bSMatt Gates { 7102254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7103254f796bSMatt Gates u8 q = *(u8 *) queue; 710464670ac8SStephen M. Cameron u32 raw_tag; 710564670ac8SStephen M. Cameron 710664670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 710764670ac8SStephen M. Cameron return IRQ_NONE; 710864670ac8SStephen M. Cameron 710964670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 711064670ac8SStephen M. Cameron return IRQ_NONE; 7111a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 711264670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7113254f796bSMatt Gates raw_tag = get_next_completion(h, q); 711464670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7115254f796bSMatt Gates raw_tag = next_command(h, q); 711664670ac8SStephen M. Cameron } 711764670ac8SStephen M. Cameron return IRQ_HANDLED; 711864670ac8SStephen M. Cameron } 711964670ac8SStephen M. Cameron 7120254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 712164670ac8SStephen M. Cameron { 7122254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 712364670ac8SStephen M. Cameron u32 raw_tag; 7124254f796bSMatt Gates u8 q = *(u8 *) queue; 712564670ac8SStephen M. Cameron 712664670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 712764670ac8SStephen M. Cameron return IRQ_NONE; 712864670ac8SStephen M. Cameron 7129a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7130254f796bSMatt Gates raw_tag = get_next_completion(h, q); 713164670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7132254f796bSMatt Gates raw_tag = next_command(h, q); 713364670ac8SStephen M. Cameron return IRQ_HANDLED; 713464670ac8SStephen M. Cameron } 713564670ac8SStephen M. Cameron 7136254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7137edd16368SStephen M. Cameron { 7138254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7139303932fdSDon Brace u32 raw_tag; 7140254f796bSMatt Gates u8 q = *(u8 *) queue; 7141edd16368SStephen M. Cameron 7142edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7143edd16368SStephen M. Cameron return IRQ_NONE; 7144a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 714510f66018SStephen M. Cameron while (interrupt_pending(h)) { 7146254f796bSMatt Gates raw_tag = get_next_completion(h, q); 714710f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 71481d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7149254f796bSMatt Gates raw_tag = next_command(h, q); 715010f66018SStephen M. Cameron } 715110f66018SStephen M. Cameron } 715210f66018SStephen M. Cameron return IRQ_HANDLED; 715310f66018SStephen M. Cameron } 715410f66018SStephen M. Cameron 7155254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 715610f66018SStephen M. Cameron { 7157254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 715810f66018SStephen M. Cameron u32 raw_tag; 7159254f796bSMatt Gates u8 q = *(u8 *) queue; 716010f66018SStephen M. Cameron 7161a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7162254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7163303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 71641d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7165254f796bSMatt Gates raw_tag = next_command(h, q); 7166edd16368SStephen M. Cameron } 7167edd16368SStephen M. Cameron return IRQ_HANDLED; 7168edd16368SStephen M. Cameron } 7169edd16368SStephen M. Cameron 7170a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7171a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7172a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7173a9a3a273SStephen M. Cameron */ 71746f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7175edd16368SStephen M. Cameron unsigned char type) 7176edd16368SStephen M. Cameron { 7177edd16368SStephen M. Cameron struct Command { 7178edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7179edd16368SStephen M. Cameron struct RequestBlock Request; 7180edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7181edd16368SStephen M. Cameron }; 7182edd16368SStephen M. Cameron struct Command *cmd; 7183edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7184edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7185edd16368SStephen M. Cameron dma_addr_t paddr64; 71862b08b3e9SDon Brace __le32 paddr32; 71872b08b3e9SDon Brace u32 tag; 7188edd16368SStephen M. Cameron void __iomem *vaddr; 7189edd16368SStephen M. Cameron int i, err; 7190edd16368SStephen M. Cameron 7191edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7192edd16368SStephen M. Cameron if (vaddr == NULL) 7193edd16368SStephen M. Cameron return -ENOMEM; 7194edd16368SStephen M. Cameron 7195edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7196edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7197edd16368SStephen M. Cameron * memory. 7198edd16368SStephen M. Cameron */ 7199edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7200edd16368SStephen M. Cameron if (err) { 7201edd16368SStephen M. Cameron iounmap(vaddr); 72021eaec8f3SRobert Elliott return err; 7203edd16368SStephen M. Cameron } 7204edd16368SStephen M. Cameron 7205edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7206edd16368SStephen M. Cameron if (cmd == NULL) { 7207edd16368SStephen M. Cameron iounmap(vaddr); 7208edd16368SStephen M. Cameron return -ENOMEM; 7209edd16368SStephen M. Cameron } 7210edd16368SStephen M. Cameron 7211edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7212edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7213edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7214edd16368SStephen M. Cameron */ 72152b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7216edd16368SStephen M. Cameron 7217edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7218edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 721950a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 72202b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7221edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7222edd16368SStephen M. Cameron 7223edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7224a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7225a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7226edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7227edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7228edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7229edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 723050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 72312b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 723250a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7233edd16368SStephen M. Cameron 72342b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7235edd16368SStephen M. Cameron 7236edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7237edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 72382b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7239edd16368SStephen M. Cameron break; 7240edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7241edd16368SStephen M. Cameron } 7242edd16368SStephen M. Cameron 7243edd16368SStephen M. Cameron iounmap(vaddr); 7244edd16368SStephen M. Cameron 7245edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7246edd16368SStephen M. Cameron * still complete the command. 7247edd16368SStephen M. Cameron */ 7248edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7249edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7250edd16368SStephen M. Cameron opcode, type); 7251edd16368SStephen M. Cameron return -ETIMEDOUT; 7252edd16368SStephen M. Cameron } 7253edd16368SStephen M. Cameron 7254edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7255edd16368SStephen M. Cameron 7256edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7257edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7258edd16368SStephen M. Cameron opcode, type); 7259edd16368SStephen M. Cameron return -EIO; 7260edd16368SStephen M. Cameron } 7261edd16368SStephen M. Cameron 7262edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7263edd16368SStephen M. Cameron opcode, type); 7264edd16368SStephen M. Cameron return 0; 7265edd16368SStephen M. Cameron } 7266edd16368SStephen M. Cameron 7267edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7268edd16368SStephen M. Cameron 72691df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 727042a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7271edd16368SStephen M. Cameron { 7272edd16368SStephen M. Cameron 72731df8552aSStephen M. Cameron if (use_doorbell) { 72741df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 72751df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 72761df8552aSStephen M. Cameron * other way using the doorbell register. 7277edd16368SStephen M. Cameron */ 72781df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7279cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 728085009239SStephen M. Cameron 728100701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 728285009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 728385009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 728485009239SStephen M. Cameron * over in some weird corner cases. 728585009239SStephen M. Cameron */ 728600701a96SJustin Lindley msleep(10000); 72871df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7288edd16368SStephen M. Cameron 7289edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7290edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7291edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7292edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 72931df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 72941df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 72951df8552aSStephen M. Cameron * controller." */ 7296edd16368SStephen M. Cameron 72972662cab8SDon Brace int rc = 0; 72982662cab8SDon Brace 72991df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 73002662cab8SDon Brace 7301edd16368SStephen M. Cameron /* enter the D3hot power management state */ 73022662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 73032662cab8SDon Brace if (rc) 73042662cab8SDon Brace return rc; 7305edd16368SStephen M. Cameron 7306edd16368SStephen M. Cameron msleep(500); 7307edd16368SStephen M. Cameron 7308edd16368SStephen M. Cameron /* enter the D0 power management state */ 73092662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 73102662cab8SDon Brace if (rc) 73112662cab8SDon Brace return rc; 7312c4853efeSMike Miller 7313c4853efeSMike Miller /* 7314c4853efeSMike Miller * The P600 requires a small delay when changing states. 7315c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7316c4853efeSMike Miller * This for kdump only and is particular to the P600. 7317c4853efeSMike Miller */ 7318c4853efeSMike Miller msleep(500); 73191df8552aSStephen M. Cameron } 73201df8552aSStephen M. Cameron return 0; 73211df8552aSStephen M. Cameron } 73221df8552aSStephen M. Cameron 73236f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7324580ada3cSStephen M. Cameron { 7325580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7326f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7327580ada3cSStephen M. Cameron } 7328580ada3cSStephen M. Cameron 73296f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7330580ada3cSStephen M. Cameron { 7331580ada3cSStephen M. Cameron char *driver_version; 7332580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7333580ada3cSStephen M. Cameron 7334580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7335580ada3cSStephen M. Cameron if (!driver_version) 7336580ada3cSStephen M. Cameron return -ENOMEM; 7337580ada3cSStephen M. Cameron 7338580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7339580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7340580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7341580ada3cSStephen M. Cameron kfree(driver_version); 7342580ada3cSStephen M. Cameron return 0; 7343580ada3cSStephen M. Cameron } 7344580ada3cSStephen M. Cameron 73456f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 73466f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7347580ada3cSStephen M. Cameron { 7348580ada3cSStephen M. Cameron int i; 7349580ada3cSStephen M. Cameron 7350580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7351580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7352580ada3cSStephen M. Cameron } 7353580ada3cSStephen M. Cameron 73546f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7355580ada3cSStephen M. Cameron { 7356580ada3cSStephen M. Cameron 7357580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7358580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7359580ada3cSStephen M. Cameron 7360580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7361580ada3cSStephen M. Cameron if (!old_driver_ver) 7362580ada3cSStephen M. Cameron return -ENOMEM; 7363580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7364580ada3cSStephen M. Cameron 7365580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7366580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7367580ada3cSStephen M. Cameron */ 7368580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7369580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7370580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7371580ada3cSStephen M. Cameron kfree(old_driver_ver); 7372580ada3cSStephen M. Cameron return rc; 7373580ada3cSStephen M. Cameron } 73741df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 73751df8552aSStephen M. Cameron * states or the using the doorbell register. 73761df8552aSStephen M. Cameron */ 73776b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 73781df8552aSStephen M. Cameron { 73791df8552aSStephen M. Cameron u64 cfg_offset; 73801df8552aSStephen M. Cameron u32 cfg_base_addr; 73811df8552aSStephen M. Cameron u64 cfg_base_addr_index; 73821df8552aSStephen M. Cameron void __iomem *vaddr; 73831df8552aSStephen M. Cameron unsigned long paddr; 7384580ada3cSStephen M. Cameron u32 misc_fw_support; 7385270d05deSStephen M. Cameron int rc; 73861df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7387cf0b08d0SStephen M. Cameron u32 use_doorbell; 7388270d05deSStephen M. Cameron u16 command_register; 73891df8552aSStephen M. Cameron 73901df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 73911df8552aSStephen M. Cameron * the same thing as 73921df8552aSStephen M. Cameron * 73931df8552aSStephen M. Cameron * pci_save_state(pci_dev); 73941df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 73951df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 73961df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 73971df8552aSStephen M. Cameron * 73981df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 73991df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 74001df8552aSStephen M. Cameron * using the doorbell register. 74011df8552aSStephen M. Cameron */ 740218867659SStephen M. Cameron 740360f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 740460f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 740525c1e56aSStephen M. Cameron return -ENODEV; 740625c1e56aSStephen M. Cameron } 740746380786SStephen M. Cameron 740846380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 740946380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 741046380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 741118867659SStephen M. Cameron 7412270d05deSStephen M. Cameron /* Save the PCI command register */ 7413270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7414270d05deSStephen M. Cameron pci_save_state(pdev); 74151df8552aSStephen M. Cameron 74161df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 74171df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 74181df8552aSStephen M. Cameron if (rc) 74191df8552aSStephen M. Cameron return rc; 74201df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 74211df8552aSStephen M. Cameron if (!vaddr) 74221df8552aSStephen M. Cameron return -ENOMEM; 74231df8552aSStephen M. Cameron 74241df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 74251df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 74261df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 74271df8552aSStephen M. Cameron if (rc) 74281df8552aSStephen M. Cameron goto unmap_vaddr; 74291df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 74301df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 74311df8552aSStephen M. Cameron if (!cfgtable) { 74321df8552aSStephen M. Cameron rc = -ENOMEM; 74331df8552aSStephen M. Cameron goto unmap_vaddr; 74341df8552aSStephen M. Cameron } 7435580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7436580ada3cSStephen M. Cameron if (rc) 743703741d95STomas Henzl goto unmap_cfgtable; 74381df8552aSStephen M. Cameron 7439cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7440cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7441cf0b08d0SStephen M. Cameron */ 74421df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7443cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7444cf0b08d0SStephen M. Cameron if (use_doorbell) { 7445cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7446cf0b08d0SStephen M. Cameron } else { 74471df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7448cf0b08d0SStephen M. Cameron if (use_doorbell) { 7449050f7147SStephen Cameron dev_warn(&pdev->dev, 7450050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 745164670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7452cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7453cf0b08d0SStephen M. Cameron } 7454cf0b08d0SStephen M. Cameron } 74551df8552aSStephen M. Cameron 74561df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 74571df8552aSStephen M. Cameron if (rc) 74581df8552aSStephen M. Cameron goto unmap_cfgtable; 7459edd16368SStephen M. Cameron 7460270d05deSStephen M. Cameron pci_restore_state(pdev); 7461270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7462edd16368SStephen M. Cameron 74631df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 74641df8552aSStephen M. Cameron need a little pause here */ 74651df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 74661df8552aSStephen M. Cameron 7467fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7468fe5389c8SStephen M. Cameron if (rc) { 7469fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7470050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7471fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7472fe5389c8SStephen M. Cameron } 7473fe5389c8SStephen M. Cameron 7474580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7475580ada3cSStephen M. Cameron if (rc < 0) 7476580ada3cSStephen M. Cameron goto unmap_cfgtable; 7477580ada3cSStephen M. Cameron if (rc) { 747864670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 747964670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 748064670ac8SStephen M. Cameron rc = -ENOTSUPP; 7481580ada3cSStephen M. Cameron } else { 748264670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 74831df8552aSStephen M. Cameron } 74841df8552aSStephen M. Cameron 74851df8552aSStephen M. Cameron unmap_cfgtable: 74861df8552aSStephen M. Cameron iounmap(cfgtable); 74871df8552aSStephen M. Cameron 74881df8552aSStephen M. Cameron unmap_vaddr: 74891df8552aSStephen M. Cameron iounmap(vaddr); 74901df8552aSStephen M. Cameron return rc; 7491edd16368SStephen M. Cameron } 7492edd16368SStephen M. Cameron 7493edd16368SStephen M. Cameron /* 7494edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7495edd16368SStephen M. Cameron * the io functions. 7496edd16368SStephen M. Cameron * This is for debug only. 7497edd16368SStephen M. Cameron */ 749842a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7499edd16368SStephen M. Cameron { 750058f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7501edd16368SStephen M. Cameron int i; 7502edd16368SStephen M. Cameron char temp_name[17]; 7503edd16368SStephen M. Cameron 7504edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7505edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7506edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7507edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7508edd16368SStephen M. Cameron temp_name[4] = '\0'; 7509edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7510edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7511edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7512edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7513edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7514edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7515edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7516edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7517edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7518edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7519edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7520edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 752169d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7522edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7523edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7524edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7525edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7526edd16368SStephen M. Cameron temp_name[16] = '\0'; 7527edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7528edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7529edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7530edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 753158f8665cSStephen M. Cameron } 7532edd16368SStephen M. Cameron 7533edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7534edd16368SStephen M. Cameron { 7535edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7536edd16368SStephen M. Cameron 7537edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7538edd16368SStephen M. Cameron return 0; 7539edd16368SStephen M. Cameron offset = 0; 7540edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7541edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7542edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7543edd16368SStephen M. Cameron offset += 4; 7544edd16368SStephen M. Cameron else { 7545edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7546edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7547edd16368SStephen M. Cameron switch (mem_type) { 7548edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7549edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7550edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7551edd16368SStephen M. Cameron break; 7552edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7553edd16368SStephen M. Cameron offset += 8; 7554edd16368SStephen M. Cameron break; 7555edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7556edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7557edd16368SStephen M. Cameron "base address is invalid\n"); 7558edd16368SStephen M. Cameron return -1; 7559edd16368SStephen M. Cameron break; 7560edd16368SStephen M. Cameron } 7561edd16368SStephen M. Cameron } 7562edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7563edd16368SStephen M. Cameron return i + 1; 7564edd16368SStephen M. Cameron } 7565edd16368SStephen M. Cameron return -1; 7566edd16368SStephen M. Cameron } 7567edd16368SStephen M. Cameron 7568cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7569cc64c817SRobert Elliott { 7570cc64c817SRobert Elliott if (h->msix_vector) { 7571cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7572cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7573105a3dbcSRobert Elliott h->msix_vector = 0; 7574cc64c817SRobert Elliott } else if (h->msi_vector) { 7575cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7576cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7577105a3dbcSRobert Elliott h->msi_vector = 0; 7578cc64c817SRobert Elliott } 7579cc64c817SRobert Elliott } 7580cc64c817SRobert Elliott 7581edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7582050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7583edd16368SStephen M. Cameron */ 75846f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7585edd16368SStephen M. Cameron { 7586edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7587254f796bSMatt Gates int err, i; 7588254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7589254f796bSMatt Gates 7590254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7591254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7592254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7593254f796bSMatt Gates } 7594edd16368SStephen M. Cameron 7595edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 75966b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 75976b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7598edd16368SStephen M. Cameron goto default_int_mode; 759955c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7600050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7601eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7602f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7603f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 760418fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 760518fce3c4SAlexander Gordeev 1, h->msix_vector); 760618fce3c4SAlexander Gordeev if (err < 0) { 760718fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 760818fce3c4SAlexander Gordeev h->msix_vector = 0; 760918fce3c4SAlexander Gordeev goto single_msi_mode; 761018fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 761155c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7612edd16368SStephen M. Cameron "available\n", err); 7613eee0f03aSHannes Reinecke } 761418fce3c4SAlexander Gordeev h->msix_vector = err; 7615eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7616eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7617eee0f03aSHannes Reinecke return; 7618edd16368SStephen M. Cameron } 761918fce3c4SAlexander Gordeev single_msi_mode: 762055c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7621050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 762255c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7623edd16368SStephen M. Cameron h->msi_vector = 1; 7624edd16368SStephen M. Cameron else 762555c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7626edd16368SStephen M. Cameron } 7627edd16368SStephen M. Cameron default_int_mode: 7628edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7629edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7630a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7631edd16368SStephen M. Cameron } 7632edd16368SStephen M. Cameron 76336f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7634e5c880d1SStephen M. Cameron { 7635e5c880d1SStephen M. Cameron int i; 7636e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7637e5c880d1SStephen M. Cameron 7638e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7639e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7640e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7641e5c880d1SStephen M. Cameron subsystem_vendor_id; 7642e5c880d1SStephen M. Cameron 7643e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7644e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7645e5c880d1SStephen M. Cameron return i; 7646e5c880d1SStephen M. Cameron 76476798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 76486798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 76496798cc0aSStephen M. Cameron !hpsa_allow_any) { 7650e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7651e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7652e5c880d1SStephen M. Cameron return -ENODEV; 7653e5c880d1SStephen M. Cameron } 7654e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7655e5c880d1SStephen M. Cameron } 7656e5c880d1SStephen M. Cameron 76576f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 76583a7774ceSStephen M. Cameron unsigned long *memory_bar) 76593a7774ceSStephen M. Cameron { 76603a7774ceSStephen M. Cameron int i; 76613a7774ceSStephen M. Cameron 76623a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 766312d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 76643a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 766512d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 766612d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 76673a7774ceSStephen M. Cameron *memory_bar); 76683a7774ceSStephen M. Cameron return 0; 76693a7774ceSStephen M. Cameron } 767012d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 76713a7774ceSStephen M. Cameron return -ENODEV; 76723a7774ceSStephen M. Cameron } 76733a7774ceSStephen M. Cameron 76746f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 76756f039790SGreg Kroah-Hartman int wait_for_ready) 76762c4c8c8bSStephen M. Cameron { 7677fe5389c8SStephen M. Cameron int i, iterations; 76782c4c8c8bSStephen M. Cameron u32 scratchpad; 7679fe5389c8SStephen M. Cameron if (wait_for_ready) 7680fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7681fe5389c8SStephen M. Cameron else 7682fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 76832c4c8c8bSStephen M. Cameron 7684fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7685fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7686fe5389c8SStephen M. Cameron if (wait_for_ready) { 76872c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 76882c4c8c8bSStephen M. Cameron return 0; 7689fe5389c8SStephen M. Cameron } else { 7690fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7691fe5389c8SStephen M. Cameron return 0; 7692fe5389c8SStephen M. Cameron } 76932c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 76942c4c8c8bSStephen M. Cameron } 7695fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 76962c4c8c8bSStephen M. Cameron return -ENODEV; 76972c4c8c8bSStephen M. Cameron } 76982c4c8c8bSStephen M. Cameron 76996f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 77006f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7701a51fd47fSStephen M. Cameron u64 *cfg_offset) 7702a51fd47fSStephen M. Cameron { 7703a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7704a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7705a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7706a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7707a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7708a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7709a51fd47fSStephen M. Cameron return -ENODEV; 7710a51fd47fSStephen M. Cameron } 7711a51fd47fSStephen M. Cameron return 0; 7712a51fd47fSStephen M. Cameron } 7713a51fd47fSStephen M. Cameron 7714195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7715195f2c65SRobert Elliott { 7716105a3dbcSRobert Elliott if (h->transtable) { 7717195f2c65SRobert Elliott iounmap(h->transtable); 7718105a3dbcSRobert Elliott h->transtable = NULL; 7719105a3dbcSRobert Elliott } 7720105a3dbcSRobert Elliott if (h->cfgtable) { 7721195f2c65SRobert Elliott iounmap(h->cfgtable); 7722105a3dbcSRobert Elliott h->cfgtable = NULL; 7723105a3dbcSRobert Elliott } 7724195f2c65SRobert Elliott } 7725195f2c65SRobert Elliott 7726195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7727195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7728195f2c65SRobert Elliott + * */ 77296f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7730edd16368SStephen M. Cameron { 773101a02ffcSStephen M. Cameron u64 cfg_offset; 773201a02ffcSStephen M. Cameron u32 cfg_base_addr; 773301a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7734303932fdSDon Brace u32 trans_offset; 7735a51fd47fSStephen M. Cameron int rc; 773677c4495cSStephen M. Cameron 7737a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7738a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7739a51fd47fSStephen M. Cameron if (rc) 7740a51fd47fSStephen M. Cameron return rc; 774177c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7742a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7743cd3c81c4SRobert Elliott if (!h->cfgtable) { 7744cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 774577c4495cSStephen M. Cameron return -ENOMEM; 7746cd3c81c4SRobert Elliott } 7747580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7748580ada3cSStephen M. Cameron if (rc) 7749580ada3cSStephen M. Cameron return rc; 775077c4495cSStephen M. Cameron /* Find performant mode table. */ 7751a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 775277c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 775377c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 775477c4495cSStephen M. Cameron sizeof(*h->transtable)); 7755195f2c65SRobert Elliott if (!h->transtable) { 7756195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7757195f2c65SRobert Elliott hpsa_free_cfgtables(h); 775877c4495cSStephen M. Cameron return -ENOMEM; 7759195f2c65SRobert Elliott } 776077c4495cSStephen M. Cameron return 0; 776177c4495cSStephen M. Cameron } 776277c4495cSStephen M. Cameron 77636f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7764cba3d38bSStephen M. Cameron { 776541ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 776641ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 776741ce4c35SStephen Cameron 776841ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 776972ceeaecSStephen M. Cameron 777072ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 777172ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 777272ceeaecSStephen M. Cameron h->max_commands = 32; 777372ceeaecSStephen M. Cameron 777441ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 777541ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 777641ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 777741ce4c35SStephen Cameron h->max_commands, 777841ce4c35SStephen Cameron MIN_MAX_COMMANDS); 777941ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7780cba3d38bSStephen M. Cameron } 7781cba3d38bSStephen M. Cameron } 7782cba3d38bSStephen M. Cameron 7783c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7784c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7785c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7786c7ee65b3SWebb Scales */ 7787c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7788c7ee65b3SWebb Scales { 7789c7ee65b3SWebb Scales return h->maxsgentries > 512; 7790c7ee65b3SWebb Scales } 7791c7ee65b3SWebb Scales 7792b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7793b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7794b93d7536SStephen M. Cameron * SG chain block size, etc. 7795b93d7536SStephen M. Cameron */ 77966f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7797b93d7536SStephen M. Cameron { 7798cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 779945fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7800b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7801283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7802c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7803c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7804b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 78051a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7806b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7807b93d7536SStephen M. Cameron } else { 7808c7ee65b3SWebb Scales /* 7809c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7810c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7811c7ee65b3SWebb Scales * would lock up the controller) 7812c7ee65b3SWebb Scales */ 7813c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 78141a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7815c7ee65b3SWebb Scales h->chainsize = 0; 7816b93d7536SStephen M. Cameron } 781775167d2cSStephen M. Cameron 781875167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 781975167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 78200e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 78210e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 78220e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 78230e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 78248be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 78258be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7826b93d7536SStephen M. Cameron } 7827b93d7536SStephen M. Cameron 782876c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 782976c46e49SStephen M. Cameron { 78300fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7831050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 783276c46e49SStephen M. Cameron return false; 783376c46e49SStephen M. Cameron } 783476c46e49SStephen M. Cameron return true; 783576c46e49SStephen M. Cameron } 783676c46e49SStephen M. Cameron 783797a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7838f7c39101SStephen M. Cameron { 783997a5e98cSStephen M. Cameron u32 driver_support; 7840f7c39101SStephen M. Cameron 784197a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 78420b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 78430b9e7b74SArnd Bergmann #ifdef CONFIG_X86 784497a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7845f7c39101SStephen M. Cameron #endif 784628e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 784728e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7848f7c39101SStephen M. Cameron } 7849f7c39101SStephen M. Cameron 78503d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 78513d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 78523d0eab67SStephen M. Cameron */ 78533d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 78543d0eab67SStephen M. Cameron { 78553d0eab67SStephen M. Cameron u32 dma_prefetch; 78563d0eab67SStephen M. Cameron 78573d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 78583d0eab67SStephen M. Cameron return; 78593d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 78603d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 78613d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 78623d0eab67SStephen M. Cameron } 78633d0eab67SStephen M. Cameron 7864c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 786576438d08SStephen M. Cameron { 786676438d08SStephen M. Cameron int i; 786776438d08SStephen M. Cameron u32 doorbell_value; 786876438d08SStephen M. Cameron unsigned long flags; 786976438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7870007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 787176438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 787276438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 787376438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 787476438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7875c706a795SRobert Elliott goto done; 787676438d08SStephen M. Cameron /* delay and try again */ 7877007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 787876438d08SStephen M. Cameron } 7879c706a795SRobert Elliott return -ENODEV; 7880c706a795SRobert Elliott done: 7881c706a795SRobert Elliott return 0; 788276438d08SStephen M. Cameron } 788376438d08SStephen M. Cameron 7884c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7885eb6b2ae9SStephen M. Cameron { 7886eb6b2ae9SStephen M. Cameron int i; 78876eaf46fdSStephen M. Cameron u32 doorbell_value; 78886eaf46fdSStephen M. Cameron unsigned long flags; 7889eb6b2ae9SStephen M. Cameron 7890eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7891eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7892eb6b2ae9SStephen M. Cameron * as we enter this code.) 7893eb6b2ae9SStephen M. Cameron */ 7894007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 789525163bd5SWebb Scales if (h->remove_in_progress) 789625163bd5SWebb Scales goto done; 78976eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 78986eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 78996eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7900382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7901c706a795SRobert Elliott goto done; 7902eb6b2ae9SStephen M. Cameron /* delay and try again */ 7903007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7904eb6b2ae9SStephen M. Cameron } 7905c706a795SRobert Elliott return -ENODEV; 7906c706a795SRobert Elliott done: 7907c706a795SRobert Elliott return 0; 79083f4336f3SStephen M. Cameron } 79093f4336f3SStephen M. Cameron 7910c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 79116f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 79123f4336f3SStephen M. Cameron { 79133f4336f3SStephen M. Cameron u32 trans_support; 79143f4336f3SStephen M. Cameron 79153f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 79163f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 79173f4336f3SStephen M. Cameron return -ENOTSUPP; 79183f4336f3SStephen M. Cameron 79193f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7920283b4a9bSStephen M. Cameron 79213f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 79223f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7923b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 79243f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7925c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7926c706a795SRobert Elliott goto error; 7927eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7928283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7929283b4a9bSStephen M. Cameron goto error; 7930960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7931eb6b2ae9SStephen M. Cameron return 0; 7932283b4a9bSStephen M. Cameron error: 7933050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7934283b4a9bSStephen M. Cameron return -ENODEV; 7935eb6b2ae9SStephen M. Cameron } 7936eb6b2ae9SStephen M. Cameron 7937195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7938195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7939195f2c65SRobert Elliott { 7940195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7941195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7942105a3dbcSRobert Elliott h->vaddr = NULL; 7943195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7944943a7021SRobert Elliott /* 7945943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7946943a7021SRobert Elliott * Documentation/PCI/pci.txt 7947943a7021SRobert Elliott */ 7948195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7949943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7950195f2c65SRobert Elliott } 7951195f2c65SRobert Elliott 7952195f2c65SRobert Elliott /* several items must be freed later */ 79536f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 795477c4495cSStephen M. Cameron { 7955eb6b2ae9SStephen M. Cameron int prod_index, err; 7956edd16368SStephen M. Cameron 7957e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7958e5c880d1SStephen M. Cameron if (prod_index < 0) 795960f923b9SRobert Elliott return prod_index; 7960e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7961e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7962e5c880d1SStephen M. Cameron 79639b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 79649b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 79659b5c48c2SStephen Cameron 7966e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7967e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7968e5a44df8SMatthew Garrett 796955c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7970edd16368SStephen M. Cameron if (err) { 7971195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7972943a7021SRobert Elliott pci_disable_device(h->pdev); 7973edd16368SStephen M. Cameron return err; 7974edd16368SStephen M. Cameron } 7975edd16368SStephen M. Cameron 7976f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7977edd16368SStephen M. Cameron if (err) { 797855c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7979195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7980943a7021SRobert Elliott pci_disable_device(h->pdev); 7981943a7021SRobert Elliott return err; 7982edd16368SStephen M. Cameron } 79834fa604e1SRobert Elliott 79844fa604e1SRobert Elliott pci_set_master(h->pdev); 79854fa604e1SRobert Elliott 79866b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 798712d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 79883a7774ceSStephen M. Cameron if (err) 7989195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7990edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7991204892e9SStephen M. Cameron if (!h->vaddr) { 7992195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7993204892e9SStephen M. Cameron err = -ENOMEM; 7994195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7995204892e9SStephen M. Cameron } 7996fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 79972c4c8c8bSStephen M. Cameron if (err) 7998195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 799977c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 800077c4495cSStephen M. Cameron if (err) 8001195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8002b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8003edd16368SStephen M. Cameron 800476c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8005edd16368SStephen M. Cameron err = -ENODEV; 8006195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8007edd16368SStephen M. Cameron } 800897a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 80093d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8010eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8011eb6b2ae9SStephen M. Cameron if (err) 8012195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8013edd16368SStephen M. Cameron return 0; 8014edd16368SStephen M. Cameron 8015195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8016195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8017195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8018204892e9SStephen M. Cameron iounmap(h->vaddr); 8019105a3dbcSRobert Elliott h->vaddr = NULL; 8020195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8021195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8022943a7021SRobert Elliott /* 8023943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8024943a7021SRobert Elliott * Documentation/PCI/pci.txt 8025943a7021SRobert Elliott */ 8026195f2c65SRobert Elliott pci_disable_device(h->pdev); 8027943a7021SRobert Elliott pci_release_regions(h->pdev); 8028edd16368SStephen M. Cameron return err; 8029edd16368SStephen M. Cameron } 8030edd16368SStephen M. Cameron 80316f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8032339b2b14SStephen M. Cameron { 8033339b2b14SStephen M. Cameron int rc; 8034339b2b14SStephen M. Cameron 8035339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8036339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8037339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8038339b2b14SStephen M. Cameron return; 8039339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8040339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8041339b2b14SStephen M. Cameron if (rc != 0) { 8042339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8043339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8044339b2b14SStephen M. Cameron } 8045339b2b14SStephen M. Cameron } 8046339b2b14SStephen M. Cameron 80476b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8048edd16368SStephen M. Cameron { 80491df8552aSStephen M. Cameron int rc, i; 80503b747298STomas Henzl void __iomem *vaddr; 8051edd16368SStephen M. Cameron 80524c2a8c40SStephen M. Cameron if (!reset_devices) 80534c2a8c40SStephen M. Cameron return 0; 80544c2a8c40SStephen M. Cameron 8055132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8056132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8057132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8058132aa220STomas Henzl */ 8059132aa220STomas Henzl rc = pci_enable_device(pdev); 8060132aa220STomas Henzl if (rc) { 8061132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8062132aa220STomas Henzl return -ENODEV; 8063132aa220STomas Henzl } 8064132aa220STomas Henzl pci_disable_device(pdev); 8065132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8066132aa220STomas Henzl rc = pci_enable_device(pdev); 8067132aa220STomas Henzl if (rc) { 8068132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8069132aa220STomas Henzl return -ENODEV; 8070132aa220STomas Henzl } 80714fa604e1SRobert Elliott 8072859c75abSTomas Henzl pci_set_master(pdev); 80734fa604e1SRobert Elliott 80743b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 80753b747298STomas Henzl if (vaddr == NULL) { 80763b747298STomas Henzl rc = -ENOMEM; 80773b747298STomas Henzl goto out_disable; 80783b747298STomas Henzl } 80793b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 80803b747298STomas Henzl iounmap(vaddr); 80813b747298STomas Henzl 80821df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 80836b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8084edd16368SStephen M. Cameron 80851df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 80861df8552aSStephen M. Cameron * but it's already (and still) up and running in 808718867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 808818867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 80891df8552aSStephen M. Cameron */ 8090adf1b3a3SRobert Elliott if (rc) 8091132aa220STomas Henzl goto out_disable; 8092edd16368SStephen M. Cameron 8093edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 80941ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8095edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8096edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8097edd16368SStephen M. Cameron break; 8098edd16368SStephen M. Cameron else 8099edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8100edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8101edd16368SStephen M. Cameron } 8102132aa220STomas Henzl 8103132aa220STomas Henzl out_disable: 8104132aa220STomas Henzl 8105132aa220STomas Henzl pci_disable_device(pdev); 8106132aa220STomas Henzl return rc; 8107edd16368SStephen M. Cameron } 8108edd16368SStephen M. Cameron 81091fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 81101fb7c98aSRobert Elliott { 81111fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8112105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8113105a3dbcSRobert Elliott if (h->cmd_pool) { 81141fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81151fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 81161fb7c98aSRobert Elliott h->cmd_pool, 81171fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8118105a3dbcSRobert Elliott h->cmd_pool = NULL; 8119105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8120105a3dbcSRobert Elliott } 8121105a3dbcSRobert Elliott if (h->errinfo_pool) { 81221fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81231fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 81241fb7c98aSRobert Elliott h->errinfo_pool, 81251fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8126105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8127105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8128105a3dbcSRobert Elliott } 81291fb7c98aSRobert Elliott } 81301fb7c98aSRobert Elliott 8131d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 81322e9d1b36SStephen M. Cameron { 81332e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 81342e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 81352e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 81362e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 81372e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 81382e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 81392e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 81402e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 81412e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 81422e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 81432e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 81442e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 81452e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 81462c143342SRobert Elliott goto clean_up; 81472e9d1b36SStephen M. Cameron } 8148360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 81492e9d1b36SStephen M. Cameron return 0; 81502c143342SRobert Elliott clean_up: 81512c143342SRobert Elliott hpsa_free_cmd_pool(h); 81522c143342SRobert Elliott return -ENOMEM; 81532e9d1b36SStephen M. Cameron } 81542e9d1b36SStephen M. Cameron 815541b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 815641b3cf08SStephen M. Cameron { 8157ec429952SFabian Frederick int i, cpu; 815841b3cf08SStephen M. Cameron 815941b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 816041b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 8161ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 816241b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 816341b3cf08SStephen M. Cameron } 816441b3cf08SStephen M. Cameron } 816541b3cf08SStephen M. Cameron 8166ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8167ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8168ec501a18SRobert Elliott { 8169ec501a18SRobert Elliott int i; 8170ec501a18SRobert Elliott 8171ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 8172ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 8173ec501a18SRobert Elliott i = h->intr_mode; 8174ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8175ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8176105a3dbcSRobert Elliott h->q[i] = 0; 8177ec501a18SRobert Elliott return; 8178ec501a18SRobert Elliott } 8179ec501a18SRobert Elliott 8180ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 8181ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8182ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8183105a3dbcSRobert Elliott h->q[i] = 0; 8184ec501a18SRobert Elliott } 8185a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8186a4e17fc1SRobert Elliott h->q[i] = 0; 8187ec501a18SRobert Elliott } 8188ec501a18SRobert Elliott 81899ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 81909ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 81910ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 81920ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 81930ae01a32SStephen M. Cameron { 8194254f796bSMatt Gates int rc, i; 81950ae01a32SStephen M. Cameron 8196254f796bSMatt Gates /* 8197254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8198254f796bSMatt Gates * queue to process. 8199254f796bSMatt Gates */ 8200254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8201254f796bSMatt Gates h->q[i] = (u8) i; 8202254f796bSMatt Gates 8203eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 8204254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8205a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 82068b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8207254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 82088b47004aSRobert Elliott 0, h->intrname[i], 8209254f796bSMatt Gates &h->q[i]); 8210a4e17fc1SRobert Elliott if (rc) { 8211a4e17fc1SRobert Elliott int j; 8212a4e17fc1SRobert Elliott 8213a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8214a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8215a4e17fc1SRobert Elliott h->intr[i], h->devname); 8216a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8217a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 8218a4e17fc1SRobert Elliott h->q[j] = 0; 8219a4e17fc1SRobert Elliott } 8220a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8221a4e17fc1SRobert Elliott h->q[j] = 0; 8222a4e17fc1SRobert Elliott return rc; 8223a4e17fc1SRobert Elliott } 8224a4e17fc1SRobert Elliott } 822541b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 8226254f796bSMatt Gates } else { 8227254f796bSMatt Gates /* Use single reply pool */ 8228eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 82298b47004aSRobert Elliott if (h->msix_vector) 82308b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82318b47004aSRobert Elliott "%s-msix", h->devname); 82328b47004aSRobert Elliott else 82338b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82348b47004aSRobert Elliott "%s-msi", h->devname); 8235254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 82368b47004aSRobert Elliott msixhandler, 0, 82378b47004aSRobert Elliott h->intrname[h->intr_mode], 8238254f796bSMatt Gates &h->q[h->intr_mode]); 8239254f796bSMatt Gates } else { 82408b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82418b47004aSRobert Elliott "%s-intx", h->devname); 8242254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 82438b47004aSRobert Elliott intxhandler, IRQF_SHARED, 82448b47004aSRobert Elliott h->intrname[h->intr_mode], 8245254f796bSMatt Gates &h->q[h->intr_mode]); 8246254f796bSMatt Gates } 8247105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 8248254f796bSMatt Gates } 82490ae01a32SStephen M. Cameron if (rc) { 8250195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 82510ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 8252195f2c65SRobert Elliott hpsa_free_irqs(h); 82530ae01a32SStephen M. Cameron return -ENODEV; 82540ae01a32SStephen M. Cameron } 82550ae01a32SStephen M. Cameron return 0; 82560ae01a32SStephen M. Cameron } 82570ae01a32SStephen M. Cameron 82586f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 825964670ac8SStephen M. Cameron { 826039c53f55SRobert Elliott int rc; 8261bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 826264670ac8SStephen M. Cameron 826364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 826439c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 826539c53f55SRobert Elliott if (rc) { 826664670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 826739c53f55SRobert Elliott return rc; 826864670ac8SStephen M. Cameron } 826964670ac8SStephen M. Cameron 827064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 827139c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 827239c53f55SRobert Elliott if (rc) { 827364670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 827464670ac8SStephen M. Cameron "after soft reset.\n"); 827539c53f55SRobert Elliott return rc; 827664670ac8SStephen M. Cameron } 827764670ac8SStephen M. Cameron 827864670ac8SStephen M. Cameron return 0; 827964670ac8SStephen M. Cameron } 828064670ac8SStephen M. Cameron 8281072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8282072b0518SStephen M. Cameron { 8283072b0518SStephen M. Cameron int i; 8284072b0518SStephen M. Cameron 8285072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8286072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8287072b0518SStephen M. Cameron continue; 82881fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82891fb7c98aSRobert Elliott h->reply_queue_size, 82901fb7c98aSRobert Elliott h->reply_queue[i].head, 82911fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8292072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8293072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8294072b0518SStephen M. Cameron } 8295105a3dbcSRobert Elliott h->reply_queue_size = 0; 8296072b0518SStephen M. Cameron } 8297072b0518SStephen M. Cameron 82980097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 82990097f0f4SStephen M. Cameron { 8300105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8301105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8302105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8303105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83042946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 83052946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 83062946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 83079ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 83089ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 83099ecd953aSRobert Elliott if (h->resubmit_wq) { 83109ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 83119ecd953aSRobert Elliott h->resubmit_wq = NULL; 83129ecd953aSRobert Elliott } 83139ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 83149ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 83159ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 83169ecd953aSRobert Elliott } 8317105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 831864670ac8SStephen M. Cameron } 831964670ac8SStephen M. Cameron 8320a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8321f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8322a0c12413SStephen M. Cameron { 8323281a7fd0SWebb Scales int i, refcount; 8324281a7fd0SWebb Scales struct CommandList *c; 832525163bd5SWebb Scales int failcount = 0; 8326a0c12413SStephen M. Cameron 8327080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8328f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8329f2405db8SDon Brace c = h->cmd_pool + i; 8330281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8331281a7fd0SWebb Scales if (refcount > 1) { 833225163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 83335a3d16f5SStephen M. Cameron finish_cmd(c); 8334433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 833525163bd5SWebb Scales failcount++; 8336a0c12413SStephen M. Cameron } 8337281a7fd0SWebb Scales cmd_free(h, c); 8338281a7fd0SWebb Scales } 833925163bd5SWebb Scales dev_warn(&h->pdev->dev, 834025163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8341a0c12413SStephen M. Cameron } 8342a0c12413SStephen M. Cameron 8343094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8344094963daSStephen M. Cameron { 8345c8ed0010SRusty Russell int cpu; 8346094963daSStephen M. Cameron 8347c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8348094963daSStephen M. Cameron u32 *lockup_detected; 8349094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8350094963daSStephen M. Cameron *lockup_detected = value; 8351094963daSStephen M. Cameron } 8352094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8353094963daSStephen M. Cameron } 8354094963daSStephen M. Cameron 8355a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8356a0c12413SStephen M. Cameron { 8357a0c12413SStephen M. Cameron unsigned long flags; 8358094963daSStephen M. Cameron u32 lockup_detected; 8359a0c12413SStephen M. Cameron 8360a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8361a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8362094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8363094963daSStephen M. Cameron if (!lockup_detected) { 8364094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8365094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 836625163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 836725163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8368094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8369094963daSStephen M. Cameron } 8370094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8371a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 837225163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 837325163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8374a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8375f2405db8SDon Brace fail_all_outstanding_cmds(h); 8376a0c12413SStephen M. Cameron } 8377a0c12413SStephen M. Cameron 837825163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8379a0c12413SStephen M. Cameron { 8380a0c12413SStephen M. Cameron u64 now; 8381a0c12413SStephen M. Cameron u32 heartbeat; 8382a0c12413SStephen M. Cameron unsigned long flags; 8383a0c12413SStephen M. Cameron 8384a0c12413SStephen M. Cameron now = get_jiffies_64(); 8385a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8386a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8387e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 838825163bd5SWebb Scales return false; 8389a0c12413SStephen M. Cameron 8390a0c12413SStephen M. Cameron /* 8391a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8392a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8393a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8394a0c12413SStephen M. Cameron */ 8395a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8396e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 839725163bd5SWebb Scales return false; 8398a0c12413SStephen M. Cameron 8399a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8400a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8401a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8402a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8403a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8404a0c12413SStephen M. Cameron controller_lockup_detected(h); 840525163bd5SWebb Scales return true; 8406a0c12413SStephen M. Cameron } 8407a0c12413SStephen M. Cameron 8408a0c12413SStephen M. Cameron /* We're ok. */ 8409a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8410a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 841125163bd5SWebb Scales return false; 8412a0c12413SStephen M. Cameron } 8413a0c12413SStephen M. Cameron 84149846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 841576438d08SStephen M. Cameron { 841676438d08SStephen M. Cameron int i; 841776438d08SStephen M. Cameron char *event_type; 841876438d08SStephen M. Cameron 8419e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8420e4aa3e6aSStephen Cameron return; 8421e4aa3e6aSStephen Cameron 842276438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 84231f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 84241f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 842576438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 842676438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 842776438d08SStephen M. Cameron 842876438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 842976438d08SStephen M. Cameron event_type = "state change"; 843076438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 843176438d08SStephen M. Cameron event_type = "configuration change"; 843276438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 843376438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 84345323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 843576438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 84365323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 84375323ed74SDon Brace } 843823100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 843976438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 844076438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 844176438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 844276438d08SStephen M. Cameron h->events, event_type); 844376438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 844476438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 844576438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 844676438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 844776438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 844876438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 844976438d08SStephen M. Cameron } else { 845076438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 845176438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 845276438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 845376438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 845476438d08SStephen M. Cameron #if 0 845576438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 845676438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 845776438d08SStephen M. Cameron #endif 845876438d08SStephen M. Cameron } 84599846590eSStephen M. Cameron return; 846076438d08SStephen M. Cameron } 846176438d08SStephen M. Cameron 846276438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 846376438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8464e863d68eSScott Teel * we should rescan the controller for devices. 8465e863d68eSScott Teel * Also check flag for driver-initiated rescan. 846676438d08SStephen M. Cameron */ 84679846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 846876438d08SStephen M. Cameron { 8469853633e8SDon Brace if (h->drv_req_rescan) { 8470853633e8SDon Brace h->drv_req_rescan = 0; 8471853633e8SDon Brace return 1; 8472853633e8SDon Brace } 8473853633e8SDon Brace 847476438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 84759846590eSStephen M. Cameron return 0; 847676438d08SStephen M. Cameron 847776438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 84789846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 84799846590eSStephen M. Cameron } 848076438d08SStephen M. Cameron 848176438d08SStephen M. Cameron /* 84829846590eSStephen M. Cameron * Check if any of the offline devices have become ready 848376438d08SStephen M. Cameron */ 84849846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 84859846590eSStephen M. Cameron { 84869846590eSStephen M. Cameron unsigned long flags; 84879846590eSStephen M. Cameron struct offline_device_entry *d; 84889846590eSStephen M. Cameron struct list_head *this, *tmp; 84899846590eSStephen M. Cameron 84909846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 84919846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 84929846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 84939846590eSStephen M. Cameron offline_list); 84949846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8495d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8496d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8497d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8498d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84999846590eSStephen M. Cameron return 1; 8500d1fea47cSStephen M. Cameron } 85019846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 850276438d08SStephen M. Cameron } 85039846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85049846590eSStephen M. Cameron return 0; 85059846590eSStephen M. Cameron } 85069846590eSStephen M. Cameron 850734592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 850834592254SScott Teel { 850934592254SScott Teel int rc = 1; /* assume there are changes */ 851034592254SScott Teel struct ReportLUNdata *logdev = NULL; 851134592254SScott Teel 851234592254SScott Teel /* if we can't find out if lun data has changed, 851334592254SScott Teel * assume that it has. 851434592254SScott Teel */ 851534592254SScott Teel 851634592254SScott Teel if (!h->lastlogicals) 851734592254SScott Teel goto out; 851834592254SScott Teel 851934592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 852034592254SScott Teel if (!logdev) { 852134592254SScott Teel dev_warn(&h->pdev->dev, 852234592254SScott Teel "Out of memory, can't track lun changes.\n"); 852334592254SScott Teel goto out; 852434592254SScott Teel } 852534592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 852634592254SScott Teel dev_warn(&h->pdev->dev, 852734592254SScott Teel "report luns failed, can't track lun changes.\n"); 852834592254SScott Teel goto out; 852934592254SScott Teel } 853034592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 853134592254SScott Teel dev_info(&h->pdev->dev, 853234592254SScott Teel "Lun changes detected.\n"); 853334592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 853434592254SScott Teel goto out; 853534592254SScott Teel } else 853634592254SScott Teel rc = 0; /* no changes detected. */ 853734592254SScott Teel out: 853834592254SScott Teel kfree(logdev); 853934592254SScott Teel return rc; 854034592254SScott Teel } 854134592254SScott Teel 85426636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8543a0c12413SStephen M. Cameron { 8544a0c12413SStephen M. Cameron unsigned long flags; 85458a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 85466636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 85476636e7f4SDon Brace 85486636e7f4SDon Brace 85496636e7f4SDon Brace if (h->remove_in_progress) 85508a98db73SStephen M. Cameron return; 85519846590eSStephen M. Cameron 85529846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 85539846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 85549846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 85559846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 85569846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 855734592254SScott Teel } else if (h->discovery_polling) { 8558c2adae44SScott Teel hpsa_disable_rld_caching(h); 855934592254SScott Teel if (hpsa_luns_changed(h)) { 856034592254SScott Teel struct Scsi_Host *sh = NULL; 856134592254SScott Teel 856234592254SScott Teel dev_info(&h->pdev->dev, 856334592254SScott Teel "driver discovery polling rescan.\n"); 856434592254SScott Teel sh = scsi_host_get(h->scsi_host); 856534592254SScott Teel if (sh != NULL) { 856634592254SScott Teel hpsa_scan_start(sh); 856734592254SScott Teel scsi_host_put(sh); 856834592254SScott Teel } 856934592254SScott Teel } 85709846590eSStephen M. Cameron } 85716636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 85726636e7f4SDon Brace if (!h->remove_in_progress) 85736636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 85746636e7f4SDon Brace h->heartbeat_sample_interval); 85756636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 85766636e7f4SDon Brace } 85776636e7f4SDon Brace 85786636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 85796636e7f4SDon Brace { 85806636e7f4SDon Brace unsigned long flags; 85816636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 85826636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 85836636e7f4SDon Brace 85846636e7f4SDon Brace detect_controller_lockup(h); 85856636e7f4SDon Brace if (lockup_detected(h)) 85866636e7f4SDon Brace return; 85879846590eSStephen M. Cameron 85888a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 85896636e7f4SDon Brace if (!h->remove_in_progress) 85908a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 85918a98db73SStephen M. Cameron h->heartbeat_sample_interval); 85928a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8593a0c12413SStephen M. Cameron } 8594a0c12413SStephen M. Cameron 85956636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 85966636e7f4SDon Brace char *name) 85976636e7f4SDon Brace { 85986636e7f4SDon Brace struct workqueue_struct *wq = NULL; 85996636e7f4SDon Brace 8600397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86016636e7f4SDon Brace if (!wq) 86026636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86036636e7f4SDon Brace 86046636e7f4SDon Brace return wq; 86056636e7f4SDon Brace } 86066636e7f4SDon Brace 86076f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86084c2a8c40SStephen M. Cameron { 86094c2a8c40SStephen M. Cameron int dac, rc; 86104c2a8c40SStephen M. Cameron struct ctlr_info *h; 861164670ac8SStephen M. Cameron int try_soft_reset = 0; 861264670ac8SStephen M. Cameron unsigned long flags; 86136b6c1cd7STomas Henzl u32 board_id; 86144c2a8c40SStephen M. Cameron 86154c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86164c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86174c2a8c40SStephen M. Cameron 86186b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 86196b6c1cd7STomas Henzl if (rc < 0) { 86206b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 86216b6c1cd7STomas Henzl return rc; 86226b6c1cd7STomas Henzl } 86236b6c1cd7STomas Henzl 86246b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 862564670ac8SStephen M. Cameron if (rc) { 862664670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 86274c2a8c40SStephen M. Cameron return rc; 862864670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 862964670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 863064670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 863164670ac8SStephen M. Cameron * point that it can accept a command. 863264670ac8SStephen M. Cameron */ 863364670ac8SStephen M. Cameron try_soft_reset = 1; 863464670ac8SStephen M. Cameron rc = 0; 863564670ac8SStephen M. Cameron } 863664670ac8SStephen M. Cameron 863764670ac8SStephen M. Cameron reinit_after_soft_reset: 86384c2a8c40SStephen M. Cameron 8639303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8640303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8641303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8642303932fdSDon Brace */ 8643303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8644edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8645105a3dbcSRobert Elliott if (!h) { 8646105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8647ecd9aad4SStephen M. Cameron return -ENOMEM; 8648105a3dbcSRobert Elliott } 8649edd16368SStephen M. Cameron 865055c06c71SStephen M. Cameron h->pdev = pdev; 8651105a3dbcSRobert Elliott 8652a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 86539846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 86546eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 86559846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 86566eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 865734f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 86589b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8659094963daSStephen M. Cameron 8660094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8661094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 86622a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8663105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 86642a5ac326SStephen M. Cameron rc = -ENOMEM; 86652efa5929SRobert Elliott goto clean1; /* aer/h */ 86662a5ac326SStephen M. Cameron } 8667094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8668094963daSStephen M. Cameron 866955c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8670105a3dbcSRobert Elliott if (rc) 86712946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8672edd16368SStephen M. Cameron 86732946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 86742946e82bSRobert Elliott * interrupt_mode h->intr */ 86752946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 86762946e82bSRobert Elliott if (rc) 86772946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 86782946e82bSRobert Elliott 86792946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8680edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8681edd16368SStephen M. Cameron number_of_controllers++; 8682edd16368SStephen M. Cameron 8683edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8684ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8685ecd9aad4SStephen M. Cameron if (rc == 0) { 8686edd16368SStephen M. Cameron dac = 1; 8687ecd9aad4SStephen M. Cameron } else { 8688ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8689ecd9aad4SStephen M. Cameron if (rc == 0) { 8690edd16368SStephen M. Cameron dac = 0; 8691ecd9aad4SStephen M. Cameron } else { 8692edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 86932946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8694edd16368SStephen M. Cameron } 8695ecd9aad4SStephen M. Cameron } 8696edd16368SStephen M. Cameron 8697edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8698edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 869910f66018SStephen M. Cameron 8700105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8701105a3dbcSRobert Elliott if (rc) 87022946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8703d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87048947fd10SRobert Elliott if (rc) 87052946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8706105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8707105a3dbcSRobert Elliott if (rc) 87082946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8709a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 87109b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8711d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8712d604f533SWebb Scales mutex_init(&h->reset_mutex); 8713a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8714edd16368SStephen M. Cameron 8715edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87169a41338eSStephen M. Cameron h->ndevices = 0; 87172946e82bSRobert Elliott 87189a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8719105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8720105a3dbcSRobert Elliott if (rc) 87212946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 87222946e82bSRobert Elliott 87232efa5929SRobert Elliott /* create the resubmit workqueue */ 87242efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 87252efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 87262efa5929SRobert Elliott rc = -ENOMEM; 87272efa5929SRobert Elliott goto clean7; 87282efa5929SRobert Elliott } 87292efa5929SRobert Elliott 87302efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 87312efa5929SRobert Elliott if (!h->resubmit_wq) { 87322efa5929SRobert Elliott rc = -ENOMEM; 87332efa5929SRobert Elliott goto clean7; /* aer/h */ 87342efa5929SRobert Elliott } 873564670ac8SStephen M. Cameron 8736105a3dbcSRobert Elliott /* 8737105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 873864670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 873964670ac8SStephen M. Cameron * the soft reset and see if that works. 874064670ac8SStephen M. Cameron */ 874164670ac8SStephen M. Cameron if (try_soft_reset) { 874264670ac8SStephen M. Cameron 874364670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 874464670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 874564670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 874664670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 874764670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 874864670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 874964670ac8SStephen M. Cameron */ 875064670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 875164670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 875264670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8753ec501a18SRobert Elliott hpsa_free_irqs(h); 87549ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 875564670ac8SStephen M. Cameron hpsa_intx_discard_completions); 875664670ac8SStephen M. Cameron if (rc) { 87579ee61794SRobert Elliott dev_warn(&h->pdev->dev, 87589ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8759d498757cSRobert Elliott /* 8760b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8761b2ef480cSRobert Elliott * again. Instead, do its work 8762b2ef480cSRobert Elliott */ 8763b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8764b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8765b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8766b2ef480cSRobert Elliott /* 8767b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8768b2ef480cSRobert Elliott * was just called before request_irqs failed 8769d498757cSRobert Elliott */ 8770d498757cSRobert Elliott goto clean3; 877164670ac8SStephen M. Cameron } 877264670ac8SStephen M. Cameron 877364670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 877464670ac8SStephen M. Cameron if (rc) 877564670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 87767ef7323fSDon Brace goto clean7; 877764670ac8SStephen M. Cameron 877864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 877964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 878064670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 878164670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 878264670ac8SStephen M. Cameron msleep(10000); 878364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 878464670ac8SStephen M. Cameron 878564670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 878664670ac8SStephen M. Cameron if (rc) 878764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 878864670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 878964670ac8SStephen M. Cameron 879064670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 879164670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 879264670ac8SStephen M. Cameron * all over again. 879364670ac8SStephen M. Cameron */ 879464670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 879564670ac8SStephen M. Cameron try_soft_reset = 0; 879664670ac8SStephen M. Cameron if (rc) 8797b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 879864670ac8SStephen M. Cameron return -ENODEV; 879964670ac8SStephen M. Cameron 880064670ac8SStephen M. Cameron goto reinit_after_soft_reset; 880164670ac8SStephen M. Cameron } 8802edd16368SStephen M. Cameron 8803da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8804da0697bdSScott Teel h->acciopath_status = 1; 880534592254SScott Teel /* Disable discovery polling.*/ 880634592254SScott Teel h->discovery_polling = 0; 8807da0697bdSScott Teel 8808e863d68eSScott Teel 8809edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8810edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8811edd16368SStephen M. Cameron 8812339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88138a98db73SStephen M. Cameron 881434592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 881534592254SScott Teel if (!h->lastlogicals) 881634592254SScott Teel dev_info(&h->pdev->dev, 881734592254SScott Teel "Can't track change to report lun data\n"); 881834592254SScott Teel 8819cf477237SDon Brace /* hook into SCSI subsystem */ 8820cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8821cf477237SDon Brace if (rc) 8822cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8823cf477237SDon Brace 88248a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 88258a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 88268a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 88278a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 88288a98db73SStephen M. Cameron h->heartbeat_sample_interval); 88296636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 88306636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 88316636e7f4SDon Brace h->heartbeat_sample_interval); 883288bf6d62SStephen M. Cameron return 0; 8833edd16368SStephen M. Cameron 88342946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8835105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8836105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8837105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 883833a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 88392946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 88402e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 88412946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8842ec501a18SRobert Elliott hpsa_free_irqs(h); 88432946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 88442946e82bSRobert Elliott scsi_host_put(h->scsi_host); 88452946e82bSRobert Elliott h->scsi_host = NULL; 88462946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8847195f2c65SRobert Elliott hpsa_free_pci_init(h); 88482946e82bSRobert Elliott clean2: /* lu, aer/h */ 8849105a3dbcSRobert Elliott if (h->lockup_detected) { 8850094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8851105a3dbcSRobert Elliott h->lockup_detected = NULL; 8852105a3dbcSRobert Elliott } 8853105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8854105a3dbcSRobert Elliott if (h->resubmit_wq) { 8855105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8856105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8857105a3dbcSRobert Elliott } 8858105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8859105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8860105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8861105a3dbcSRobert Elliott } 8862edd16368SStephen M. Cameron kfree(h); 8863ecd9aad4SStephen M. Cameron return rc; 8864edd16368SStephen M. Cameron } 8865edd16368SStephen M. Cameron 8866edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8867edd16368SStephen M. Cameron { 8868edd16368SStephen M. Cameron char *flush_buf; 8869edd16368SStephen M. Cameron struct CommandList *c; 887025163bd5SWebb Scales int rc; 8871702890e3SStephen M. Cameron 8872094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8873702890e3SStephen M. Cameron return; 8874edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8875edd16368SStephen M. Cameron if (!flush_buf) 8876edd16368SStephen M. Cameron return; 8877edd16368SStephen M. Cameron 887845fcb86eSStephen Cameron c = cmd_alloc(h); 8879bf43caf3SRobert Elliott 8880a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8881a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8882a2dac136SStephen M. Cameron goto out; 8883a2dac136SStephen M. Cameron } 888425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8885c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 888625163bd5SWebb Scales if (rc) 888725163bd5SWebb Scales goto out; 8888edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8889a2dac136SStephen M. Cameron out: 8890edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8891edd16368SStephen M. Cameron "error flushing cache on controller\n"); 889245fcb86eSStephen Cameron cmd_free(h, c); 8893edd16368SStephen M. Cameron kfree(flush_buf); 8894edd16368SStephen M. Cameron } 8895edd16368SStephen M. Cameron 8896c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8897c2adae44SScott Teel * send down a report luns request 8898c2adae44SScott Teel */ 8899c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8900c2adae44SScott Teel { 8901c2adae44SScott Teel u32 *options; 8902c2adae44SScott Teel struct CommandList *c; 8903c2adae44SScott Teel int rc; 8904c2adae44SScott Teel 8905c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8906c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8907c2adae44SScott Teel return; 8908c2adae44SScott Teel 8909c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8910c2adae44SScott Teel if (!options) { 8911c2adae44SScott Teel dev_err(&h->pdev->dev, 8912c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8913c2adae44SScott Teel return; 8914c2adae44SScott Teel } 8915c2adae44SScott Teel 8916c2adae44SScott Teel c = cmd_alloc(h); 8917c2adae44SScott Teel 8918c2adae44SScott Teel /* first, get the current diag options settings */ 8919c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8920c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8921c2adae44SScott Teel goto errout; 8922c2adae44SScott Teel 8923c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8924c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8925c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8926c2adae44SScott Teel goto errout; 8927c2adae44SScott Teel 8928c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8929c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8930c2adae44SScott Teel 8931c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8932c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8933c2adae44SScott Teel goto errout; 8934c2adae44SScott Teel 8935c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8936c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8937c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8938c2adae44SScott Teel goto errout; 8939c2adae44SScott Teel 8940c2adae44SScott Teel /* Now verify that it got set: */ 8941c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8942c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8943c2adae44SScott Teel goto errout; 8944c2adae44SScott Teel 8945c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8946c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8947c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8948c2adae44SScott Teel goto errout; 8949c2adae44SScott Teel 8950d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8951c2adae44SScott Teel goto out; 8952c2adae44SScott Teel 8953c2adae44SScott Teel errout: 8954c2adae44SScott Teel dev_err(&h->pdev->dev, 8955c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8956c2adae44SScott Teel out: 8957c2adae44SScott Teel cmd_free(h, c); 8958c2adae44SScott Teel kfree(options); 8959c2adae44SScott Teel } 8960c2adae44SScott Teel 8961edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8962edd16368SStephen M. Cameron { 8963edd16368SStephen M. Cameron struct ctlr_info *h; 8964edd16368SStephen M. Cameron 8965edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8966edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8967edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8968edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8969edd16368SStephen M. Cameron */ 8970edd16368SStephen M. Cameron hpsa_flush_cache(h); 8971edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8972105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8973cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8974edd16368SStephen M. Cameron } 8975edd16368SStephen M. Cameron 89766f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 897755e14e76SStephen M. Cameron { 897855e14e76SStephen M. Cameron int i; 897955e14e76SStephen M. Cameron 8980105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 898155e14e76SStephen M. Cameron kfree(h->dev[i]); 8982105a3dbcSRobert Elliott h->dev[i] = NULL; 8983105a3dbcSRobert Elliott } 898455e14e76SStephen M. Cameron } 898555e14e76SStephen M. Cameron 89866f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8987edd16368SStephen M. Cameron { 8988edd16368SStephen M. Cameron struct ctlr_info *h; 89898a98db73SStephen M. Cameron unsigned long flags; 8990edd16368SStephen M. Cameron 8991edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8992edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8993edd16368SStephen M. Cameron return; 8994edd16368SStephen M. Cameron } 8995edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 89968a98db73SStephen M. Cameron 89978a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 89988a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 89998a98db73SStephen M. Cameron h->remove_in_progress = 1; 90008a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90016636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90026636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90036636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90046636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9005cc64c817SRobert Elliott 90062d041306SDon Brace /* 90072d041306SDon Brace * Call before disabling interrupts. 90082d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90092d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90102d041306SDon Brace * operations which cannot complete and will hang the system. 90112d041306SDon Brace */ 90122d041306SDon Brace if (h->scsi_host) 90132d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9014105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9015195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9016edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9017cc64c817SRobert Elliott 9018105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9019105a3dbcSRobert Elliott 90202946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90212946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 90222946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9023105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9024105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 90251fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 902634592254SScott Teel kfree(h->lastlogicals); 9027105a3dbcSRobert Elliott 9028105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9029195f2c65SRobert Elliott 90302946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 90312946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 90322946e82bSRobert Elliott 9033195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 90342946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9035195f2c65SRobert Elliott 9036105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9037105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9038105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9039d04e62b9SKevin Barnett 9040d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9041d04e62b9SKevin Barnett 9042105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9043edd16368SStephen M. Cameron } 9044edd16368SStephen M. Cameron 9045edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9046edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9047edd16368SStephen M. Cameron { 9048edd16368SStephen M. Cameron return -ENOSYS; 9049edd16368SStephen M. Cameron } 9050edd16368SStephen M. Cameron 9051edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9052edd16368SStephen M. Cameron { 9053edd16368SStephen M. Cameron return -ENOSYS; 9054edd16368SStephen M. Cameron } 9055edd16368SStephen M. Cameron 9056edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9057f79cfec6SStephen M. Cameron .name = HPSA, 9058edd16368SStephen M. Cameron .probe = hpsa_init_one, 90596f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9060edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9061edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9062edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9063edd16368SStephen M. Cameron .resume = hpsa_resume, 9064edd16368SStephen M. Cameron }; 9065edd16368SStephen M. Cameron 9066303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9067303932fdSDon Brace * scatter gather elements supported) and bucket[], 9068303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9069303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9070303932fdSDon Brace * byte increments) which the controller uses to fetch 9071303932fdSDon Brace * commands. This function fills in bucket_map[], which 9072303932fdSDon Brace * maps a given number of scatter gather elements to one of 9073303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9074303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9075303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9076303932fdSDon Brace * bits of the command address. 9077303932fdSDon Brace */ 9078303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 90792b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9080303932fdSDon Brace { 9081303932fdSDon Brace int i, j, b, size; 9082303932fdSDon Brace 9083303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9084303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9085303932fdSDon Brace /* Compute size of a command with i SG entries */ 9086e1f7de0cSMatt Gates size = i + min_blocks; 9087303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9088303932fdSDon Brace /* Find the bucket that is just big enough */ 9089e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9090303932fdSDon Brace if (bucket[j] >= size) { 9091303932fdSDon Brace b = j; 9092303932fdSDon Brace break; 9093303932fdSDon Brace } 9094303932fdSDon Brace } 9095303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9096303932fdSDon Brace bucket_map[i] = b; 9097303932fdSDon Brace } 9098303932fdSDon Brace } 9099303932fdSDon Brace 9100105a3dbcSRobert Elliott /* 9101105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9102105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9103105a3dbcSRobert Elliott */ 9104c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9105303932fdSDon Brace { 91066c311b57SStephen M. Cameron int i; 91076c311b57SStephen M. Cameron unsigned long register_value; 9108e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9109e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9110e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9111b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9112b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9113e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9114def342bdSStephen M. Cameron 9115def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9116def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9117def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9118def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9119def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9120def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9121def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9122def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9123def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9124def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9125d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9126def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9127def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9128def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9129def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9130def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9131def342bdSStephen M. Cameron */ 9132d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9133b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9134b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9135b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9136b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9137b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9138b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9139b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9140b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9141b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9142b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9143d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9144303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9145303932fdSDon Brace * 6 = 2 s/g entry or 8k 9146303932fdSDon Brace * 8 = 4 s/g entry or 16k 9147303932fdSDon Brace * 10 = 6 s/g entry or 24k 9148303932fdSDon Brace */ 9149303932fdSDon Brace 9150b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9151b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9152b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9153b3a52e79SStephen M. Cameron */ 9154b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9155b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9156b3a52e79SStephen M. Cameron 9157303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9158072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9159072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9160303932fdSDon Brace 9161d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9162d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9163e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9164303932fdSDon Brace for (i = 0; i < 8; i++) 9165303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9166303932fdSDon Brace 9167303932fdSDon Brace /* size of controller ring buffer */ 9168303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9169254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9170303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9171303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9172254f796bSMatt Gates 9173254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9174254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9175072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9176254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9177254f796bSMatt Gates } 9178254f796bSMatt Gates 9179b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9180e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9181e1f7de0cSMatt Gates /* 9182e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9183e1f7de0cSMatt Gates */ 9184e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9185e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9186e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9187e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9188c349775eSScott Teel } else { 9189c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9190c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9191c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9192c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9193c349775eSScott Teel } 9194e1f7de0cSMatt Gates } 9195303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9196c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9197c706a795SRobert Elliott dev_err(&h->pdev->dev, 9198c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9199c706a795SRobert Elliott return -ENODEV; 9200c706a795SRobert Elliott } 9201303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9202303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9203050f7147SStephen Cameron dev_err(&h->pdev->dev, 9204050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9205c706a795SRobert Elliott return -ENODEV; 9206303932fdSDon Brace } 9207960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9208e1f7de0cSMatt Gates h->access = access; 9209e1f7de0cSMatt Gates h->transMethod = transMethod; 9210e1f7de0cSMatt Gates 9211b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9212b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9213c706a795SRobert Elliott return 0; 9214e1f7de0cSMatt Gates 9215b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9216e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9217e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9218e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9219e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9220e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9221e1f7de0cSMatt Gates } 9222283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9223283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9224e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9225e1f7de0cSMatt Gates 9226e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9227072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9228072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9229072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9230072b0518SStephen M. Cameron h->reply_queue_size); 9231e1f7de0cSMatt Gates 9232e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9233e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9234e1f7de0cSMatt Gates */ 9235e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9236e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9237e1f7de0cSMatt Gates 9238e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9239e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9240e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9241e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9242e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 92432b08b3e9SDon Brace cp->host_context_flags = 92442b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9245e1f7de0cSMatt Gates cp->timeout_sec = 0; 9246e1f7de0cSMatt Gates cp->ReplyQueue = 0; 924750a0decfSStephen M. Cameron cp->tag = 9248f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 924950a0decfSStephen M. Cameron cp->host_addr = 925050a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9251e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9252e1f7de0cSMatt Gates } 9253b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9254b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9255b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9256b9af4937SStephen M. Cameron int rc; 9257b9af4937SStephen M. Cameron 9258b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9259b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9260b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9261b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9262b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9263b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9264b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9265b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9266b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9267b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9268b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9269b9af4937SStephen M. Cameron cfg_base_addr_index) + 9270b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9271b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9272b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9273b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9274b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9275b9af4937SStephen M. Cameron } 9276b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9277c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9278c706a795SRobert Elliott dev_err(&h->pdev->dev, 9279c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9280c706a795SRobert Elliott return -ENODEV; 9281c706a795SRobert Elliott } 9282c706a795SRobert Elliott return 0; 9283e1f7de0cSMatt Gates } 9284e1f7de0cSMatt Gates 92851fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 92861fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 92871fb7c98aSRobert Elliott { 9288105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 92891fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 92901fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 92911fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 92921fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9293105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9294105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9295105a3dbcSRobert Elliott } 92961fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9297105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 92981fb7c98aSRobert Elliott } 92991fb7c98aSRobert Elliott 9300d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9301d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9302e1f7de0cSMatt Gates { 9303283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9304283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9305283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9306283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9307283b4a9bSStephen M. Cameron 9308e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9309e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9310e1f7de0cSMatt Gates * hardware. 9311e1f7de0cSMatt Gates */ 9312e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9313e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9314e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9315e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9316e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9317e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9318e1f7de0cSMatt Gates 9319e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9320283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9321e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9322e1f7de0cSMatt Gates 9323e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9324e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9325e1f7de0cSMatt Gates goto clean_up; 9326e1f7de0cSMatt Gates 9327e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9328e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9329e1f7de0cSMatt Gates return 0; 9330e1f7de0cSMatt Gates 9331e1f7de0cSMatt Gates clean_up: 93321fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 93332dd02d74SRobert Elliott return -ENOMEM; 93346c311b57SStephen M. Cameron } 93356c311b57SStephen M. Cameron 93361fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 93371fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 93381fb7c98aSRobert Elliott { 9339d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9340d9a729f3SWebb Scales 9341105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 93421fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93431fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 93441fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 93451fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9346105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9347105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9348105a3dbcSRobert Elliott } 93491fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9350105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 93511fb7c98aSRobert Elliott } 93521fb7c98aSRobert Elliott 9353d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9354d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9355aca9012aSStephen M. Cameron { 9356d9a729f3SWebb Scales int rc; 9357d9a729f3SWebb Scales 9358aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9359aca9012aSStephen M. Cameron 9360aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9361aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9362aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9363aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9364aca9012aSStephen M. Cameron 9365aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9366aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9367aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9368aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9369aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9370aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9371aca9012aSStephen M. Cameron 9372aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9373aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9374aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9375aca9012aSStephen M. Cameron 9376aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9377d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9378d9a729f3SWebb Scales rc = -ENOMEM; 9379d9a729f3SWebb Scales goto clean_up; 9380d9a729f3SWebb Scales } 9381d9a729f3SWebb Scales 9382d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9383d9a729f3SWebb Scales if (rc) 9384aca9012aSStephen M. Cameron goto clean_up; 9385aca9012aSStephen M. Cameron 9386aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9387aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9388aca9012aSStephen M. Cameron return 0; 9389aca9012aSStephen M. Cameron 9390aca9012aSStephen M. Cameron clean_up: 93911fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9392d9a729f3SWebb Scales return rc; 9393aca9012aSStephen M. Cameron } 9394aca9012aSStephen M. Cameron 9395105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9396105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9397105a3dbcSRobert Elliott { 9398105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9399105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9400105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9401105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9402105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9403105a3dbcSRobert Elliott } 9404105a3dbcSRobert Elliott 9405105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9406105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9407105a3dbcSRobert Elliott */ 9408105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94096c311b57SStephen M. Cameron { 94106c311b57SStephen M. Cameron u32 trans_support; 9411e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9412e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9413105a3dbcSRobert Elliott int i, rc; 94146c311b57SStephen M. Cameron 941502ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9416105a3dbcSRobert Elliott return 0; 941702ec19c8SStephen M. Cameron 941867c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 941967c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9420105a3dbcSRobert Elliott return 0; 942167c99a72Sscameron@beardog.cce.hp.com 9422e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9423e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9424e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9425e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9426105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9427105a3dbcSRobert Elliott if (rc) 9428105a3dbcSRobert Elliott return rc; 9429105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9430aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9431aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9432105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9433105a3dbcSRobert Elliott if (rc) 9434105a3dbcSRobert Elliott return rc; 9435e1f7de0cSMatt Gates } 9436e1f7de0cSMatt Gates 9437eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9438cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 94396c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9440072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 94416c311b57SStephen M. Cameron 9442254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9443072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9444072b0518SStephen M. Cameron h->reply_queue_size, 9445072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9446105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9447105a3dbcSRobert Elliott rc = -ENOMEM; 9448105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9449105a3dbcSRobert Elliott } 9450254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9451254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9452254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9453254f796bSMatt Gates } 9454254f796bSMatt Gates 94556c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9456d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 94576c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9458105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9459105a3dbcSRobert Elliott rc = -ENOMEM; 9460105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9461105a3dbcSRobert Elliott } 94626c311b57SStephen M. Cameron 9463105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9464105a3dbcSRobert Elliott if (rc) 9465105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9466105a3dbcSRobert Elliott return 0; 9467303932fdSDon Brace 9468105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9469303932fdSDon Brace kfree(h->blockFetchTable); 9470105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9471105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9472105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9473105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9474105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9475105a3dbcSRobert Elliott return rc; 9476303932fdSDon Brace } 9477303932fdSDon Brace 947823100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 947976438d08SStephen M. Cameron { 948023100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 948123100dd9SStephen M. Cameron } 948223100dd9SStephen M. Cameron 948323100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 948423100dd9SStephen M. Cameron { 948523100dd9SStephen M. Cameron struct CommandList *c = NULL; 9486f2405db8SDon Brace int i, accel_cmds_out; 9487281a7fd0SWebb Scales int refcount; 948876438d08SStephen M. Cameron 9489f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 949023100dd9SStephen M. Cameron accel_cmds_out = 0; 9491f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9492f2405db8SDon Brace c = h->cmd_pool + i; 9493281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9494281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 949523100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9496281a7fd0SWebb Scales cmd_free(h, c); 9497f2405db8SDon Brace } 949823100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 949976438d08SStephen M. Cameron break; 950076438d08SStephen M. Cameron msleep(100); 950176438d08SStephen M. Cameron } while (1); 950276438d08SStephen M. Cameron } 950376438d08SStephen M. Cameron 9504d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9505d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9506d04e62b9SKevin Barnett { 9507d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9508d04e62b9SKevin Barnett struct sas_phy *phy; 9509d04e62b9SKevin Barnett 9510d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9511d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9512d04e62b9SKevin Barnett return NULL; 9513d04e62b9SKevin Barnett 9514d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9515d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9516d04e62b9SKevin Barnett if (!phy) { 9517d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9518d04e62b9SKevin Barnett return NULL; 9519d04e62b9SKevin Barnett } 9520d04e62b9SKevin Barnett 9521d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9522d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9523d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9524d04e62b9SKevin Barnett 9525d04e62b9SKevin Barnett return hpsa_sas_phy; 9526d04e62b9SKevin Barnett } 9527d04e62b9SKevin Barnett 9528d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9529d04e62b9SKevin Barnett { 9530d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9531d04e62b9SKevin Barnett 9532d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9533d04e62b9SKevin Barnett sas_phy_free(phy); 9534d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9535d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9536d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9537d04e62b9SKevin Barnett } 9538d04e62b9SKevin Barnett 9539d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9540d04e62b9SKevin Barnett { 9541d04e62b9SKevin Barnett int rc; 9542d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9543d04e62b9SKevin Barnett struct sas_phy *phy; 9544d04e62b9SKevin Barnett struct sas_identify *identify; 9545d04e62b9SKevin Barnett 9546d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9547d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9548d04e62b9SKevin Barnett 9549d04e62b9SKevin Barnett identify = &phy->identify; 9550d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9551d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9552d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9553d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9554d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9555d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9556d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9557d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9558d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9559d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9560d04e62b9SKevin Barnett 9561d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9562d04e62b9SKevin Barnett if (rc) 9563d04e62b9SKevin Barnett return rc; 9564d04e62b9SKevin Barnett 9565d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9566d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9567d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9568d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9569d04e62b9SKevin Barnett 9570d04e62b9SKevin Barnett return 0; 9571d04e62b9SKevin Barnett } 9572d04e62b9SKevin Barnett 9573d04e62b9SKevin Barnett static int 9574d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9575d04e62b9SKevin Barnett struct sas_rphy *rphy) 9576d04e62b9SKevin Barnett { 9577d04e62b9SKevin Barnett struct sas_identify *identify; 9578d04e62b9SKevin Barnett 9579d04e62b9SKevin Barnett identify = &rphy->identify; 9580d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9581d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9582d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9583d04e62b9SKevin Barnett 9584d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9585d04e62b9SKevin Barnett } 9586d04e62b9SKevin Barnett 9587d04e62b9SKevin Barnett static struct hpsa_sas_port 9588d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9589d04e62b9SKevin Barnett u64 sas_address) 9590d04e62b9SKevin Barnett { 9591d04e62b9SKevin Barnett int rc; 9592d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9593d04e62b9SKevin Barnett struct sas_port *port; 9594d04e62b9SKevin Barnett 9595d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9596d04e62b9SKevin Barnett if (!hpsa_sas_port) 9597d04e62b9SKevin Barnett return NULL; 9598d04e62b9SKevin Barnett 9599d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9600d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9601d04e62b9SKevin Barnett 9602d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9603d04e62b9SKevin Barnett if (!port) 9604d04e62b9SKevin Barnett goto free_hpsa_port; 9605d04e62b9SKevin Barnett 9606d04e62b9SKevin Barnett rc = sas_port_add(port); 9607d04e62b9SKevin Barnett if (rc) 9608d04e62b9SKevin Barnett goto free_sas_port; 9609d04e62b9SKevin Barnett 9610d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9611d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9612d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9613d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9614d04e62b9SKevin Barnett 9615d04e62b9SKevin Barnett return hpsa_sas_port; 9616d04e62b9SKevin Barnett 9617d04e62b9SKevin Barnett free_sas_port: 9618d04e62b9SKevin Barnett sas_port_free(port); 9619d04e62b9SKevin Barnett free_hpsa_port: 9620d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9621d04e62b9SKevin Barnett 9622d04e62b9SKevin Barnett return NULL; 9623d04e62b9SKevin Barnett } 9624d04e62b9SKevin Barnett 9625d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9626d04e62b9SKevin Barnett { 9627d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9628d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9629d04e62b9SKevin Barnett 9630d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9631d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9632d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9633d04e62b9SKevin Barnett 9634d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9635d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9636d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9637d04e62b9SKevin Barnett } 9638d04e62b9SKevin Barnett 9639d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9640d04e62b9SKevin Barnett { 9641d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9642d04e62b9SKevin Barnett 9643d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9644d04e62b9SKevin Barnett if (hpsa_sas_node) { 9645d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9646d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9647d04e62b9SKevin Barnett } 9648d04e62b9SKevin Barnett 9649d04e62b9SKevin Barnett return hpsa_sas_node; 9650d04e62b9SKevin Barnett } 9651d04e62b9SKevin Barnett 9652d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9653d04e62b9SKevin Barnett { 9654d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9655d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9656d04e62b9SKevin Barnett 9657d04e62b9SKevin Barnett if (!hpsa_sas_node) 9658d04e62b9SKevin Barnett return; 9659d04e62b9SKevin Barnett 9660d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9661d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9662d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9663d04e62b9SKevin Barnett 9664d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9665d04e62b9SKevin Barnett } 9666d04e62b9SKevin Barnett 9667d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9668d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9669d04e62b9SKevin Barnett struct sas_rphy *rphy) 9670d04e62b9SKevin Barnett { 9671d04e62b9SKevin Barnett int i; 9672d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9673d04e62b9SKevin Barnett 9674d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9675d04e62b9SKevin Barnett device = h->dev[i]; 9676d04e62b9SKevin Barnett if (!device->sas_port) 9677d04e62b9SKevin Barnett continue; 9678d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9679d04e62b9SKevin Barnett return device; 9680d04e62b9SKevin Barnett } 9681d04e62b9SKevin Barnett 9682d04e62b9SKevin Barnett return NULL; 9683d04e62b9SKevin Barnett } 9684d04e62b9SKevin Barnett 9685d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9686d04e62b9SKevin Barnett { 9687d04e62b9SKevin Barnett int rc; 9688d04e62b9SKevin Barnett struct device *parent_dev; 9689d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9690d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9691d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9692d04e62b9SKevin Barnett 9693d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9694d04e62b9SKevin Barnett 9695d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9696d04e62b9SKevin Barnett if (!hpsa_sas_node) 9697d04e62b9SKevin Barnett return -ENOMEM; 9698d04e62b9SKevin Barnett 9699d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9700d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9701d04e62b9SKevin Barnett rc = -ENODEV; 9702d04e62b9SKevin Barnett goto free_sas_node; 9703d04e62b9SKevin Barnett } 9704d04e62b9SKevin Barnett 9705d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9706d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9707d04e62b9SKevin Barnett rc = -ENODEV; 9708d04e62b9SKevin Barnett goto free_sas_port; 9709d04e62b9SKevin Barnett } 9710d04e62b9SKevin Barnett 9711d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9712d04e62b9SKevin Barnett if (rc) 9713d04e62b9SKevin Barnett goto free_sas_phy; 9714d04e62b9SKevin Barnett 9715d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9716d04e62b9SKevin Barnett 9717d04e62b9SKevin Barnett return 0; 9718d04e62b9SKevin Barnett 9719d04e62b9SKevin Barnett free_sas_phy: 9720d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9721d04e62b9SKevin Barnett free_sas_port: 9722d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9723d04e62b9SKevin Barnett free_sas_node: 9724d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9725d04e62b9SKevin Barnett 9726d04e62b9SKevin Barnett return rc; 9727d04e62b9SKevin Barnett } 9728d04e62b9SKevin Barnett 9729d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9730d04e62b9SKevin Barnett { 9731d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9732d04e62b9SKevin Barnett } 9733d04e62b9SKevin Barnett 9734d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9735d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9736d04e62b9SKevin Barnett { 9737d04e62b9SKevin Barnett int rc; 9738d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9739d04e62b9SKevin Barnett struct sas_rphy *rphy; 9740d04e62b9SKevin Barnett 9741d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9742d04e62b9SKevin Barnett if (!hpsa_sas_port) 9743d04e62b9SKevin Barnett return -ENOMEM; 9744d04e62b9SKevin Barnett 9745d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9746d04e62b9SKevin Barnett if (!rphy) { 9747d04e62b9SKevin Barnett rc = -ENODEV; 9748d04e62b9SKevin Barnett goto free_sas_port; 9749d04e62b9SKevin Barnett } 9750d04e62b9SKevin Barnett 9751d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9752d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9753d04e62b9SKevin Barnett 9754d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9755d04e62b9SKevin Barnett if (rc) 9756d04e62b9SKevin Barnett goto free_sas_port; 9757d04e62b9SKevin Barnett 9758d04e62b9SKevin Barnett return 0; 9759d04e62b9SKevin Barnett 9760d04e62b9SKevin Barnett free_sas_port: 9761d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9762d04e62b9SKevin Barnett device->sas_port = NULL; 9763d04e62b9SKevin Barnett 9764d04e62b9SKevin Barnett return rc; 9765d04e62b9SKevin Barnett } 9766d04e62b9SKevin Barnett 9767d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9768d04e62b9SKevin Barnett { 9769d04e62b9SKevin Barnett if (device->sas_port) { 9770d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9771d04e62b9SKevin Barnett device->sas_port = NULL; 9772d04e62b9SKevin Barnett } 9773d04e62b9SKevin Barnett } 9774d04e62b9SKevin Barnett 9775d04e62b9SKevin Barnett static int 9776d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9777d04e62b9SKevin Barnett { 9778d04e62b9SKevin Barnett return 0; 9779d04e62b9SKevin Barnett } 9780d04e62b9SKevin Barnett 9781d04e62b9SKevin Barnett static int 9782d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9783d04e62b9SKevin Barnett { 9784aa105695SDan Carpenter *identifier = 0; 9785d04e62b9SKevin Barnett return 0; 9786d04e62b9SKevin Barnett } 9787d04e62b9SKevin Barnett 9788d04e62b9SKevin Barnett static int 9789d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9790d04e62b9SKevin Barnett { 9791d04e62b9SKevin Barnett return -ENXIO; 9792d04e62b9SKevin Barnett } 9793d04e62b9SKevin Barnett 9794d04e62b9SKevin Barnett static int 9795d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9796d04e62b9SKevin Barnett { 9797d04e62b9SKevin Barnett return 0; 9798d04e62b9SKevin Barnett } 9799d04e62b9SKevin Barnett 9800d04e62b9SKevin Barnett static int 9801d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9802d04e62b9SKevin Barnett { 9803d04e62b9SKevin Barnett return 0; 9804d04e62b9SKevin Barnett } 9805d04e62b9SKevin Barnett 9806d04e62b9SKevin Barnett static int 9807d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9808d04e62b9SKevin Barnett { 9809d04e62b9SKevin Barnett return 0; 9810d04e62b9SKevin Barnett } 9811d04e62b9SKevin Barnett 9812d04e62b9SKevin Barnett static void 9813d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9814d04e62b9SKevin Barnett { 9815d04e62b9SKevin Barnett } 9816d04e62b9SKevin Barnett 9817d04e62b9SKevin Barnett static int 9818d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9819d04e62b9SKevin Barnett { 9820d04e62b9SKevin Barnett return -EINVAL; 9821d04e62b9SKevin Barnett } 9822d04e62b9SKevin Barnett 9823d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9824d04e62b9SKevin Barnett static int 9825d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9826d04e62b9SKevin Barnett struct request *req) 9827d04e62b9SKevin Barnett { 9828d04e62b9SKevin Barnett return -EINVAL; 9829d04e62b9SKevin Barnett } 9830d04e62b9SKevin Barnett 9831d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9832d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9833d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9834d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9835d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9836d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9837d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9838d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9839d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9840d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9841d04e62b9SKevin Barnett }; 9842d04e62b9SKevin Barnett 9843edd16368SStephen M. Cameron /* 9844edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9845edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9846edd16368SStephen M. Cameron */ 9847edd16368SStephen M. Cameron static int __init hpsa_init(void) 9848edd16368SStephen M. Cameron { 9849d04e62b9SKevin Barnett int rc; 9850d04e62b9SKevin Barnett 9851d04e62b9SKevin Barnett hpsa_sas_transport_template = 9852d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9853d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9854d04e62b9SKevin Barnett return -ENODEV; 9855d04e62b9SKevin Barnett 9856d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9857d04e62b9SKevin Barnett 9858d04e62b9SKevin Barnett if (rc) 9859d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9860d04e62b9SKevin Barnett 9861d04e62b9SKevin Barnett return rc; 9862edd16368SStephen M. Cameron } 9863edd16368SStephen M. Cameron 9864edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9865edd16368SStephen M. Cameron { 9866edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9867d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9868edd16368SStephen M. Cameron } 9869edd16368SStephen M. Cameron 9870e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9871e1f7de0cSMatt Gates { 9872e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9873dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9874dd0e19f3SScott Teel 9875dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9876dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9877dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9878dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9879dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9880dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9881dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9882dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9883dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9884dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9885dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9886dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9887dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9888dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9889dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9890dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9891dd0e19f3SScott Teel 9892dd0e19f3SScott Teel #undef VERIFY_OFFSET 9893dd0e19f3SScott Teel 9894dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9895b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9896b66cc250SMike Miller 9897b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9898b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9899b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9900b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9901b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9902b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9903b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9904b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9905b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9906b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9907b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9908b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9909b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9910b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9911b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9912b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9913b66cc250SMike Miller 9914b66cc250SMike Miller #undef VERIFY_OFFSET 9915b66cc250SMike Miller 9916b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9917e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9918e1f7de0cSMatt Gates 9919e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9920e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9921e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9922e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9923e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9924e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9925e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9926e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9927e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9928e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9929e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9930e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9931e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9932e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9933e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9934e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9935e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9936e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9937e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9938e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9939e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9940e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 994150a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9942e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9943e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9944e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9945e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9946e1f7de0cSMatt Gates } 9947e1f7de0cSMatt Gates 9948edd16368SStephen M. Cameron module_init(hpsa_init); 9949edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9950