1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24edd16368SStephen M. Cameron #include <linux/kernel.h> 25edd16368SStephen M. Cameron #include <linux/slab.h> 26edd16368SStephen M. Cameron #include <linux/delay.h> 27edd16368SStephen M. Cameron #include <linux/fs.h> 28edd16368SStephen M. Cameron #include <linux/timer.h> 29edd16368SStephen M. Cameron #include <linux/init.h> 30edd16368SStephen M. Cameron #include <linux/spinlock.h> 31edd16368SStephen M. Cameron #include <linux/compat.h> 32edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 33edd16368SStephen M. Cameron #include <linux/uaccess.h> 34edd16368SStephen M. Cameron #include <linux/io.h> 35edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 36edd16368SStephen M. Cameron #include <linux/completion.h> 37edd16368SStephen M. Cameron #include <linux/moduleparam.h> 38edd16368SStephen M. Cameron #include <scsi/scsi.h> 39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 439437ac43SStephen Cameron #include <scsi/scsi_eh.h> 44d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4573153fe5SWebb Scales #include <scsi/scsi_dbg.h> 46edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 47edd16368SStephen M. Cameron #include <linux/string.h> 48edd16368SStephen M. Cameron #include <linux/bitmap.h> 4960063497SArun Sharma #include <linux/atomic.h> 50a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5142a91641SDon Brace #include <linux/percpu-defs.h> 52094963daSStephen M. Cameron #include <linux/percpu.h> 532b08b3e9SDon Brace #include <asm/unaligned.h> 54283b4a9bSStephen M. Cameron #include <asm/div64.h> 55edd16368SStephen M. Cameron #include "hpsa_cmd.h" 56edd16368SStephen M. Cameron #include "hpsa.h" 57edd16368SStephen M. Cameron 58ec2c3aa9SDon Brace /* 59ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 60ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 61ec2c3aa9SDon Brace */ 629a14f9b1SDon Brace #define HPSA_DRIVER_VERSION "3.4.20-170" 63edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 64f79cfec6SStephen M. Cameron #define HPSA "hpsa" 65edd16368SStephen M. Cameron 66007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 67007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 68007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 70007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 71edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 72edd16368SStephen M. Cameron 73edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 74edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 75b443d3eaSDon Brace /* How long to wait before giving up on a command */ 76b443d3eaSDon Brace #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ) 77edd16368SStephen M. Cameron 78edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 79edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 80edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 81edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 82edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 83edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 84edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 85253d2464SHannes Reinecke MODULE_ALIAS("cciss"); 86edd16368SStephen M. Cameron 8702ec19c8SStephen M. Cameron static int hpsa_simple_mode; 8802ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 8902ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9002ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 91edd16368SStephen M. Cameron 92edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 93edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 94edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 95edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 99163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 100163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 101f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1029143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1039143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 1097f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 110fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 1147f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149135ae6edSHannes Reinecke {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150135ae6edSHannes Reinecke PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151edd16368SStephen M. Cameron {0,} 152edd16368SStephen M. Cameron }; 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155edd16368SStephen M. Cameron 156edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 157edd16368SStephen M. Cameron * product = Marketing Name for the board 158edd16368SStephen M. Cameron * access = Address of the struct of function pointers 159edd16368SStephen M. Cameron */ 160edd16368SStephen M. Cameron static struct board_type products[] = { 161135ae6edSHannes Reinecke {0x40700E11, "Smart Array 5300", &SA5A_access}, 162135ae6edSHannes Reinecke {0x40800E11, "Smart Array 5i", &SA5B_access}, 163135ae6edSHannes Reinecke {0x40820E11, "Smart Array 532", &SA5B_access}, 164135ae6edSHannes Reinecke {0x40830E11, "Smart Array 5312", &SA5B_access}, 165135ae6edSHannes Reinecke {0x409A0E11, "Smart Array 641", &SA5A_access}, 166135ae6edSHannes Reinecke {0x409B0E11, "Smart Array 642", &SA5A_access}, 167135ae6edSHannes Reinecke {0x409C0E11, "Smart Array 6400", &SA5A_access}, 168135ae6edSHannes Reinecke {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 169135ae6edSHannes Reinecke {0x40910E11, "Smart Array 6i", &SA5A_access}, 170135ae6edSHannes Reinecke {0x3225103C, "Smart Array P600", &SA5A_access}, 171135ae6edSHannes Reinecke {0x3223103C, "Smart Array P800", &SA5A_access}, 172135ae6edSHannes Reinecke {0x3234103C, "Smart Array P400", &SA5A_access}, 173135ae6edSHannes Reinecke {0x3235103C, "Smart Array P400i", &SA5A_access}, 174135ae6edSHannes Reinecke {0x3211103C, "Smart Array E200i", &SA5A_access}, 175135ae6edSHannes Reinecke {0x3212103C, "Smart Array E200", &SA5A_access}, 176135ae6edSHannes Reinecke {0x3213103C, "Smart Array E200i", &SA5A_access}, 177135ae6edSHannes Reinecke {0x3214103C, "Smart Array E200i", &SA5A_access}, 178135ae6edSHannes Reinecke {0x3215103C, "Smart Array E200i", &SA5A_access}, 179135ae6edSHannes Reinecke {0x3237103C, "Smart Array E500", &SA5A_access}, 180135ae6edSHannes Reinecke {0x323D103C, "Smart Array P700m", &SA5A_access}, 181edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 182edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 183edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 184edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 185edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 186163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 187163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1887d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 189fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 190fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 191fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 192fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 193fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 194fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 195fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1967f1974a7SDon Brace {0x1920103C, "Smart Array P430i", &SA5_access}, 1971fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1981fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1991fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 2001fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 2017f1974a7SDon Brace {0x1925103C, "Smart Array P831", &SA5_access}, 2021fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 2031fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 2041fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 20527fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 20627fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 20727fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 20827fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 209c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 21027fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 21127fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 21297b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 21327fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 21427fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 21527fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 21627fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 21797b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 21827fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 21927fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 2203b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 2213b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 22227fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 223fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 224cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 225cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 226cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 227cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 228cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2298e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2308e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2318e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2328e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2338e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 234edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 235edd16368SStephen M. Cameron }; 236edd16368SStephen M. Cameron 237d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 238d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 239d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 240d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 241d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 242d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 243d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 244d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 245d04e62b9SKevin Barnett struct sas_rphy *rphy); 246d04e62b9SKevin Barnett 247a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 248a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 249a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 250a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 251edd16368SStephen M. Cameron static int number_of_controllers; 252edd16368SStephen M. Cameron 25310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 25410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 2556f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 2566f4e626fSNathan Chancellor void __user *arg); 257edd16368SStephen M. Cameron 258edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 2596f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 26042a91641SDon Brace void __user *arg); 261edd16368SStephen M. Cameron #endif 262edd16368SStephen M. Cameron 263edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 264edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 26573153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 26673153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 26773153fe5SWebb Scales struct scsi_cmnd *scmd); 268a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 269b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 270edd16368SStephen M. Cameron int cmd_type); 2712c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 272b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 273b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 274edd16368SStephen M. Cameron 275f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 276a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 277a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 278a08a8471SStephen M. Cameron unsigned long elapsed_time); 2797c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 280edd16368SStephen M. Cameron 281edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 282edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 28341ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 284edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 285edd16368SStephen M. Cameron 2868aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 287edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 288edd16368SStephen M. Cameron struct CommandList *c); 289edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 290edd16368SStephen M. Cameron struct CommandList *c); 291303932fdSDon Brace /* performant mode helper functions */ 292303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2932b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 294105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 295105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 296254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2976f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2986f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2991df8552aSStephen M. Cameron u64 *cfg_offset); 3006f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 3011df8552aSStephen M. Cameron unsigned long *memory_bar); 302135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 303135ae6edSHannes Reinecke bool *legacy_board); 304bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 305bfd7546cSDon Brace unsigned char lunaddr[], 306bfd7546cSDon Brace int reply_queue); 3076f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 3086f039790SGreg Kroah-Hartman int wait_for_ready); 30975167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 310c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 311fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 312fe5389c8SStephen M. Cameron #define BOARD_READY 1 31323100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 31476438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 315c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 316c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 31703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 318080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 31925163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 32025163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 321c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 322d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 323d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 3248383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3258383278dSScott Teel unsigned char scsi3addr[], u8 page); 32634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 327ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 328ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 329ba74fdc4SDon Brace unsigned char *scsi3addr); 330edd16368SStephen M. Cameron 331edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 332edd16368SStephen M. Cameron { 333edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 334edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 335edd16368SStephen M. Cameron } 336edd16368SStephen M. Cameron 337a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 338a23513e8SStephen M. Cameron { 339a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 340a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 341a23513e8SStephen M. Cameron } 342a23513e8SStephen M. Cameron 343a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 344a58e7e53SWebb Scales { 345a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 346a58e7e53SWebb Scales } 347a58e7e53SWebb Scales 3489437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3499437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3509437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3519437ac43SStephen Cameron { 3529437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3539437ac43SStephen Cameron bool rc; 3549437ac43SStephen Cameron 3559437ac43SStephen Cameron *sense_key = -1; 3569437ac43SStephen Cameron *asc = -1; 3579437ac43SStephen Cameron *ascq = -1; 3589437ac43SStephen Cameron 3599437ac43SStephen Cameron if (sense_data_len < 1) 3609437ac43SStephen Cameron return; 3619437ac43SStephen Cameron 3629437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3639437ac43SStephen Cameron if (rc) { 3649437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3659437ac43SStephen Cameron *asc = sshdr.asc; 3669437ac43SStephen Cameron *ascq = sshdr.ascq; 3679437ac43SStephen Cameron } 3689437ac43SStephen Cameron } 3699437ac43SStephen Cameron 370edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 371edd16368SStephen M. Cameron struct CommandList *c) 372edd16368SStephen M. Cameron { 3739437ac43SStephen Cameron u8 sense_key, asc, ascq; 3749437ac43SStephen Cameron int sense_len; 3759437ac43SStephen Cameron 3769437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3779437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3789437ac43SStephen Cameron else 3799437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3809437ac43SStephen Cameron 3819437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3829437ac43SStephen Cameron &sense_key, &asc, &ascq); 38381c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 384edd16368SStephen M. Cameron return 0; 385edd16368SStephen M. Cameron 3869437ac43SStephen Cameron switch (asc) { 387edd16368SStephen M. Cameron case STATE_CHANGED: 3889437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3892946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3902946e82bSRobert Elliott h->devname); 391edd16368SStephen M. Cameron break; 392edd16368SStephen M. Cameron case LUN_FAILED: 3937f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3942946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 395edd16368SStephen M. Cameron break; 396edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3977f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3982946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 399edd16368SStephen M. Cameron /* 4004f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 4014f4eb9f1SScott Teel * target (array) devices. 402edd16368SStephen M. Cameron */ 403edd16368SStephen M. Cameron break; 404edd16368SStephen M. Cameron case POWER_OR_RESET: 4052946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4062946e82bSRobert Elliott "%s: a power on or device reset detected\n", 4072946e82bSRobert Elliott h->devname); 408edd16368SStephen M. Cameron break; 409edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 4102946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4112946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 4122946e82bSRobert Elliott h->devname); 413edd16368SStephen M. Cameron break; 414edd16368SStephen M. Cameron default: 4152946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4162946e82bSRobert Elliott "%s: unknown unit attention detected\n", 4172946e82bSRobert Elliott h->devname); 418edd16368SStephen M. Cameron break; 419edd16368SStephen M. Cameron } 420edd16368SStephen M. Cameron return 1; 421edd16368SStephen M. Cameron } 422edd16368SStephen M. Cameron 423852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 424852af20aSMatt Bondurant { 425852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 426852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 427852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 428852af20aSMatt Bondurant return 0; 429852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 430852af20aSMatt Bondurant return 1; 431852af20aSMatt Bondurant } 432852af20aSMatt Bondurant 433e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 434e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 435e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 436e985c58fSStephen Cameron { 437e985c58fSStephen Cameron int ld; 438e985c58fSStephen Cameron struct ctlr_info *h; 439e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 440e985c58fSStephen Cameron 441e985c58fSStephen Cameron h = shost_to_hba(shost); 442e985c58fSStephen Cameron ld = lockup_detected(h); 443e985c58fSStephen Cameron 444e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 445e985c58fSStephen Cameron } 446e985c58fSStephen Cameron 447da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 448da0697bdSScott Teel struct device_attribute *attr, 449da0697bdSScott Teel const char *buf, size_t count) 450da0697bdSScott Teel { 451da0697bdSScott Teel int status, len; 452da0697bdSScott Teel struct ctlr_info *h; 453da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 454da0697bdSScott Teel char tmpbuf[10]; 455da0697bdSScott Teel 456da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 457da0697bdSScott Teel return -EACCES; 458da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 459da0697bdSScott Teel strncpy(tmpbuf, buf, len); 460da0697bdSScott Teel tmpbuf[len] = '\0'; 461da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 462da0697bdSScott Teel return -EINVAL; 463da0697bdSScott Teel h = shost_to_hba(shost); 464da0697bdSScott Teel h->acciopath_status = !!status; 465da0697bdSScott Teel dev_warn(&h->pdev->dev, 466da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 467da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 468da0697bdSScott Teel return count; 469da0697bdSScott Teel } 470da0697bdSScott Teel 4712ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4722ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4732ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4742ba8bfc8SStephen M. Cameron { 4752ba8bfc8SStephen M. Cameron int debug_level, len; 4762ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4772ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4782ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4792ba8bfc8SStephen M. Cameron 4802ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4812ba8bfc8SStephen M. Cameron return -EACCES; 4822ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4832ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4842ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4852ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4862ba8bfc8SStephen M. Cameron return -EINVAL; 4872ba8bfc8SStephen M. Cameron if (debug_level < 0) 4882ba8bfc8SStephen M. Cameron debug_level = 0; 4892ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4902ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4912ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4922ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4932ba8bfc8SStephen M. Cameron return count; 4942ba8bfc8SStephen M. Cameron } 4952ba8bfc8SStephen M. Cameron 496edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 497edd16368SStephen M. Cameron struct device_attribute *attr, 498edd16368SStephen M. Cameron const char *buf, size_t count) 499edd16368SStephen M. Cameron { 500edd16368SStephen M. Cameron struct ctlr_info *h; 501edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 502a23513e8SStephen M. Cameron h = shost_to_hba(shost); 50331468401SMike Miller hpsa_scan_start(h->scsi_host); 504edd16368SStephen M. Cameron return count; 505edd16368SStephen M. Cameron } 506edd16368SStephen M. Cameron 507*3e16e83aSDon Brace static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device) 508*3e16e83aSDon Brace { 509*3e16e83aSDon Brace device->offload_enabled = 0; 510*3e16e83aSDon Brace device->offload_to_be_enabled = 0; 511*3e16e83aSDon Brace } 512*3e16e83aSDon Brace 513d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 514d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 515d28ce020SStephen M. Cameron { 516d28ce020SStephen M. Cameron struct ctlr_info *h; 517d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 518d28ce020SStephen M. Cameron unsigned char *fwrev; 519d28ce020SStephen M. Cameron 520d28ce020SStephen M. Cameron h = shost_to_hba(shost); 521d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 522d28ce020SStephen M. Cameron return 0; 523d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 524d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 525d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 526d28ce020SStephen M. Cameron } 527d28ce020SStephen M. Cameron 52894a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 52994a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 53094a13649SStephen M. Cameron { 53194a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 53294a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 53394a13649SStephen M. Cameron 5340cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5350cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 53694a13649SStephen M. Cameron } 53794a13649SStephen M. Cameron 538745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 539745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 540745a7a25SStephen M. Cameron { 541745a7a25SStephen M. Cameron struct ctlr_info *h; 542745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 543745a7a25SStephen M. Cameron 544745a7a25SStephen M. Cameron h = shost_to_hba(shost); 545745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 546960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 547745a7a25SStephen M. Cameron "performant" : "simple"); 548745a7a25SStephen M. Cameron } 549745a7a25SStephen M. Cameron 550da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 551da0697bdSScott Teel struct device_attribute *attr, char *buf) 552da0697bdSScott Teel { 553da0697bdSScott Teel struct ctlr_info *h; 554da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 555da0697bdSScott Teel 556da0697bdSScott Teel h = shost_to_hba(shost); 557da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 558da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 559da0697bdSScott Teel } 560da0697bdSScott Teel 56146380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 562941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 563941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 564941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 565941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 566941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 567941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 568941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 569941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 570941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 571941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 572941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 573941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 574941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5757af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 576941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 577941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5785a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5795a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5805a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5815a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5825a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5835a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 584941b1cdaSStephen M. Cameron }; 585941b1cdaSStephen M. Cameron 58646380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 58746380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5887af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5895a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5905a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5915a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5925a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5935a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5945a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 59546380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 59646380786SStephen M. Cameron * which share a battery backed cache module. One controls the 59746380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 59846380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 59946380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 60046380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 60146380786SStephen M. Cameron */ 60246380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 60346380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 60446380786SStephen M. Cameron }; 60546380786SStephen M. Cameron 6069b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 607941b1cdaSStephen M. Cameron { 608941b1cdaSStephen M. Cameron int i; 609941b1cdaSStephen M. Cameron 6109b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 6119b5c48c2SStephen Cameron if (a[i] == board_id) 612941b1cdaSStephen M. Cameron return 1; 6139b5c48c2SStephen Cameron return 0; 6149b5c48c2SStephen Cameron } 6159b5c48c2SStephen Cameron 6169b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 6179b5c48c2SStephen Cameron { 6189b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 6199b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 620941b1cdaSStephen M. Cameron } 621941b1cdaSStephen M. Cameron 62246380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 62346380786SStephen M. Cameron { 6249b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6259b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 62646380786SStephen M. Cameron } 62746380786SStephen M. Cameron 62846380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 62946380786SStephen M. Cameron { 63046380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 63146380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 63246380786SStephen M. Cameron } 63346380786SStephen M. Cameron 634941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 635941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 636941b1cdaSStephen M. Cameron { 637941b1cdaSStephen M. Cameron struct ctlr_info *h; 638941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 639941b1cdaSStephen M. Cameron 640941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 64146380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 642941b1cdaSStephen M. Cameron } 643941b1cdaSStephen M. Cameron 644edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 645edd16368SStephen M. Cameron { 646edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 647edd16368SStephen M. Cameron } 648edd16368SStephen M. Cameron 649f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6507c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 651edd16368SStephen M. Cameron }; 6526b80b18fSScott Teel #define HPSA_RAID_0 0 6536b80b18fSScott Teel #define HPSA_RAID_4 1 6546b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6556b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6566b80b18fSScott Teel #define HPSA_RAID_51 4 6576b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6586b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6597c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6607c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 661edd16368SStephen M. Cameron 662f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 663f3f01730SKevin Barnett { 664f3f01730SKevin Barnett return !device->physical_device; 665f3f01730SKevin Barnett } 666edd16368SStephen M. Cameron 667edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 668edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 669edd16368SStephen M. Cameron { 670edd16368SStephen M. Cameron ssize_t l = 0; 67182a72c0aSStephen M. Cameron unsigned char rlevel; 672edd16368SStephen M. Cameron struct ctlr_info *h; 673edd16368SStephen M. Cameron struct scsi_device *sdev; 674edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 675edd16368SStephen M. Cameron unsigned long flags; 676edd16368SStephen M. Cameron 677edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 678edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 679edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 680edd16368SStephen M. Cameron hdev = sdev->hostdata; 681edd16368SStephen M. Cameron if (!hdev) { 682edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 683edd16368SStephen M. Cameron return -ENODEV; 684edd16368SStephen M. Cameron } 685edd16368SStephen M. Cameron 686edd16368SStephen M. Cameron /* Is this even a logical drive? */ 687f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 688edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 689edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 690edd16368SStephen M. Cameron return l; 691edd16368SStephen M. Cameron } 692edd16368SStephen M. Cameron 693edd16368SStephen M. Cameron rlevel = hdev->raid_level; 694edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 69582a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 696edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 697edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 698edd16368SStephen M. Cameron return l; 699edd16368SStephen M. Cameron } 700edd16368SStephen M. Cameron 701edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 702edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 703edd16368SStephen M. Cameron { 704edd16368SStephen M. Cameron struct ctlr_info *h; 705edd16368SStephen M. Cameron struct scsi_device *sdev; 706edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 707edd16368SStephen M. Cameron unsigned long flags; 708edd16368SStephen M. Cameron unsigned char lunid[8]; 709edd16368SStephen M. Cameron 710edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 711edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 712edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 713edd16368SStephen M. Cameron hdev = sdev->hostdata; 714edd16368SStephen M. Cameron if (!hdev) { 715edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 716edd16368SStephen M. Cameron return -ENODEV; 717edd16368SStephen M. Cameron } 718edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 719edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 720609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 721edd16368SStephen M. Cameron } 722edd16368SStephen M. Cameron 723edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 724edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 725edd16368SStephen M. Cameron { 726edd16368SStephen M. Cameron struct ctlr_info *h; 727edd16368SStephen M. Cameron struct scsi_device *sdev; 728edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 729edd16368SStephen M. Cameron unsigned long flags; 730edd16368SStephen M. Cameron unsigned char sn[16]; 731edd16368SStephen M. Cameron 732edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 733edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 734edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 735edd16368SStephen M. Cameron hdev = sdev->hostdata; 736edd16368SStephen M. Cameron if (!hdev) { 737edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 738edd16368SStephen M. Cameron return -ENODEV; 739edd16368SStephen M. Cameron } 740edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 741edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 742edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 743edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 744edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 745edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 746edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 747edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 748edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 749edd16368SStephen M. Cameron } 750edd16368SStephen M. Cameron 751ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 752ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 753ded1be4aSJoseph T Handzik { 754ded1be4aSJoseph T Handzik struct ctlr_info *h; 755ded1be4aSJoseph T Handzik struct scsi_device *sdev; 756ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 757ded1be4aSJoseph T Handzik unsigned long flags; 758ded1be4aSJoseph T Handzik u64 sas_address; 759ded1be4aSJoseph T Handzik 760ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 761ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 762ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 763ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 764ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 765ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 766ded1be4aSJoseph T Handzik return -ENODEV; 767ded1be4aSJoseph T Handzik } 768ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 769ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 770ded1be4aSJoseph T Handzik 771ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 772ded1be4aSJoseph T Handzik } 773ded1be4aSJoseph T Handzik 774c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 775c1988684SScott Teel struct device_attribute *attr, char *buf) 776c1988684SScott Teel { 777c1988684SScott Teel struct ctlr_info *h; 778c1988684SScott Teel struct scsi_device *sdev; 779c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 780c1988684SScott Teel unsigned long flags; 781c1988684SScott Teel int offload_enabled; 782c1988684SScott Teel 783c1988684SScott Teel sdev = to_scsi_device(dev); 784c1988684SScott Teel h = sdev_to_hba(sdev); 785c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 786c1988684SScott Teel hdev = sdev->hostdata; 787c1988684SScott Teel if (!hdev) { 788c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 789c1988684SScott Teel return -ENODEV; 790c1988684SScott Teel } 791c1988684SScott Teel offload_enabled = hdev->offload_enabled; 792c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 793b2582a65SDon Brace 794b2582a65SDon Brace if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 795c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 796b2582a65SDon Brace else 797b2582a65SDon Brace return snprintf(buf, 40, "%s\n", 798b2582a65SDon Brace "Not applicable for a controller"); 799c1988684SScott Teel } 800c1988684SScott Teel 8018270b862SJoe Handzik #define MAX_PATHS 8 8028270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 8038270b862SJoe Handzik struct device_attribute *attr, char *buf) 8048270b862SJoe Handzik { 8058270b862SJoe Handzik struct ctlr_info *h; 8068270b862SJoe Handzik struct scsi_device *sdev; 8078270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 8088270b862SJoe Handzik unsigned long flags; 8098270b862SJoe Handzik int i; 8108270b862SJoe Handzik int output_len = 0; 8118270b862SJoe Handzik u8 box; 8128270b862SJoe Handzik u8 bay; 8138270b862SJoe Handzik u8 path_map_index = 0; 8148270b862SJoe Handzik char *active; 8158270b862SJoe Handzik unsigned char phys_connector[2]; 8168270b862SJoe Handzik 8178270b862SJoe Handzik sdev = to_scsi_device(dev); 8188270b862SJoe Handzik h = sdev_to_hba(sdev); 8198270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8208270b862SJoe Handzik hdev = sdev->hostdata; 8218270b862SJoe Handzik if (!hdev) { 8228270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8238270b862SJoe Handzik return -ENODEV; 8248270b862SJoe Handzik } 8258270b862SJoe Handzik 8268270b862SJoe Handzik bay = hdev->bay; 8278270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8288270b862SJoe Handzik path_map_index = 1<<i; 8298270b862SJoe Handzik if (i == hdev->active_path_index) 8308270b862SJoe Handzik active = "Active"; 8318270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8328270b862SJoe Handzik active = "Inactive"; 8338270b862SJoe Handzik else 8348270b862SJoe Handzik continue; 8358270b862SJoe Handzik 8361faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8371faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8381faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8398270b862SJoe Handzik h->scsi_host->host_no, 8408270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8418270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8428270b862SJoe Handzik 843cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8442708f295SDon Brace output_len += scnprintf(buf + output_len, 8451faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8461faf072cSRasmus Villemoes "%s\n", active); 8478270b862SJoe Handzik continue; 8488270b862SJoe Handzik } 8498270b862SJoe Handzik 8508270b862SJoe Handzik box = hdev->box[i]; 8518270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8528270b862SJoe Handzik sizeof(phys_connector)); 8538270b862SJoe Handzik if (phys_connector[0] < '0') 8548270b862SJoe Handzik phys_connector[0] = '0'; 8558270b862SJoe Handzik if (phys_connector[1] < '0') 8568270b862SJoe Handzik phys_connector[1] = '0'; 8572708f295SDon Brace output_len += scnprintf(buf + output_len, 8581faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8598270b862SJoe Handzik "PORT: %.2s ", 8608270b862SJoe Handzik phys_connector); 861af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 862af15ed36SDon Brace hdev->expose_device) { 8638270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8642708f295SDon Brace output_len += scnprintf(buf + output_len, 8651faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8668270b862SJoe Handzik "BAY: %hhu %s\n", 8678270b862SJoe Handzik bay, active); 8688270b862SJoe Handzik } else { 8692708f295SDon Brace output_len += scnprintf(buf + output_len, 8701faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8718270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8728270b862SJoe Handzik box, bay, active); 8738270b862SJoe Handzik } 8748270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8752708f295SDon Brace output_len += scnprintf(buf + output_len, 8761faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8778270b862SJoe Handzik box, active); 8788270b862SJoe Handzik } else 8792708f295SDon Brace output_len += scnprintf(buf + output_len, 8801faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8818270b862SJoe Handzik } 8828270b862SJoe Handzik 8838270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8841faf072cSRasmus Villemoes return output_len; 8858270b862SJoe Handzik } 8868270b862SJoe Handzik 88716961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 88816961204SHannes Reinecke struct device_attribute *attr, char *buf) 88916961204SHannes Reinecke { 89016961204SHannes Reinecke struct ctlr_info *h; 89116961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 89216961204SHannes Reinecke 89316961204SHannes Reinecke h = shost_to_hba(shost); 89416961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 89516961204SHannes Reinecke } 89616961204SHannes Reinecke 897135ae6edSHannes Reinecke static ssize_t host_show_legacy_board(struct device *dev, 898135ae6edSHannes Reinecke struct device_attribute *attr, char *buf) 899135ae6edSHannes Reinecke { 900135ae6edSHannes Reinecke struct ctlr_info *h; 901135ae6edSHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 902135ae6edSHannes Reinecke 903135ae6edSHannes Reinecke h = shost_to_hba(shost); 904135ae6edSHannes Reinecke return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 905135ae6edSHannes Reinecke } 906135ae6edSHannes Reinecke 907c828a892SJoe Perches static DEVICE_ATTR_RO(raid_level); 908c828a892SJoe Perches static DEVICE_ATTR_RO(lunid); 909c828a892SJoe Perches static DEVICE_ATTR_RO(unique_id); 9103f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 911c828a892SJoe Perches static DEVICE_ATTR_RO(sas_address); 912c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 913c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 914c828a892SJoe Perches static DEVICE_ATTR_RO(path_info); 915da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 916da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 917da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 9182ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 9192ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 9203f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 9213f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 9223f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 9233f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 9243f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 9253f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 926941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 927941b1cdaSStephen M. Cameron host_show_resettable, NULL); 928e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 929e985c58fSStephen Cameron host_show_lockup_detected, NULL); 93016961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 93116961204SHannes Reinecke host_show_ctlr_num, NULL); 932135ae6edSHannes Reinecke static DEVICE_ATTR(legacy_board, S_IRUGO, 933135ae6edSHannes Reinecke host_show_legacy_board, NULL); 9343f5eac3aSStephen M. Cameron 9353f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 9363f5eac3aSStephen M. Cameron &dev_attr_raid_level, 9373f5eac3aSStephen M. Cameron &dev_attr_lunid, 9383f5eac3aSStephen M. Cameron &dev_attr_unique_id, 939c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9408270b862SJoe Handzik &dev_attr_path_info, 941ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9423f5eac3aSStephen M. Cameron NULL, 9433f5eac3aSStephen M. Cameron }; 9443f5eac3aSStephen M. Cameron 9453f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9463f5eac3aSStephen M. Cameron &dev_attr_rescan, 9473f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9483f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9493f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 950941b1cdaSStephen M. Cameron &dev_attr_resettable, 951da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9522ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 953fb53c439STomas Henzl &dev_attr_lockup_detected, 95416961204SHannes Reinecke &dev_attr_ctlr_num, 955135ae6edSHannes Reinecke &dev_attr_legacy_board, 9563f5eac3aSStephen M. Cameron NULL, 9573f5eac3aSStephen M. Cameron }; 9583f5eac3aSStephen M. Cameron 95908ec46f6SDon Brace #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 96008ec46f6SDon Brace HPSA_MAX_CONCURRENT_PASSTHRUS) 96141ce4c35SStephen Cameron 9623f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9633f5eac3aSStephen M. Cameron .module = THIS_MODULE, 964f79cfec6SStephen M. Cameron .name = HPSA, 965f79cfec6SStephen M. Cameron .proc_name = HPSA, 9663f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9673f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9683f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9697c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9703f5eac3aSStephen M. Cameron .this_id = -1, 9713f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9723f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9733f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 97441ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9753f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9763f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9773f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9783f5eac3aSStephen M. Cameron #endif 9793f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9803f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 981eb53a3eaSMartin Wilck .max_sectors = 2048, 98254b2b50cSMartin K. Petersen .no_write_same = 1, 9833f5eac3aSStephen M. Cameron }; 9843f5eac3aSStephen M. Cameron 985254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9863f5eac3aSStephen M. Cameron { 9873f5eac3aSStephen M. Cameron u32 a; 988072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9893f5eac3aSStephen M. Cameron 990e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 991e1f7de0cSMatt Gates return h->access.command_completed(h, q); 992e1f7de0cSMatt Gates 9933f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 994254f796bSMatt Gates return h->access.command_completed(h, q); 9953f5eac3aSStephen M. Cameron 996254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 997254f796bSMatt Gates a = rq->head[rq->current_entry]; 998254f796bSMatt Gates rq->current_entry++; 9990cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 10003f5eac3aSStephen M. Cameron } else { 10013f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 10023f5eac3aSStephen M. Cameron } 10033f5eac3aSStephen M. Cameron /* Check for wraparound */ 1004254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 1005254f796bSMatt Gates rq->current_entry = 0; 1006254f796bSMatt Gates rq->wraparound ^= 1; 10073f5eac3aSStephen M. Cameron } 10083f5eac3aSStephen M. Cameron return a; 10093f5eac3aSStephen M. Cameron } 10103f5eac3aSStephen M. Cameron 1011c349775eSScott Teel /* 1012c349775eSScott Teel * There are some special bits in the bus address of the 1013c349775eSScott Teel * command that we have to set for the controller to know 1014c349775eSScott Teel * how to process the command: 1015c349775eSScott Teel * 1016c349775eSScott Teel * Normal performant mode: 1017c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 1018c349775eSScott Teel * bits 1-3 = block fetch table entry 1019c349775eSScott Teel * bits 4-6 = command type (== 0) 1020c349775eSScott Teel * 1021c349775eSScott Teel * ioaccel1 mode: 1022c349775eSScott Teel * bit 0 = "performant mode" bit. 1023c349775eSScott Teel * bits 1-3 = block fetch table entry 1024c349775eSScott Teel * bits 4-6 = command type (== 110) 1025c349775eSScott Teel * (command type is needed because ioaccel1 mode 1026c349775eSScott Teel * commands are submitted through the same register as normal 1027c349775eSScott Teel * mode commands, so this is how the controller knows whether 1028c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 1029c349775eSScott Teel * 1030c349775eSScott Teel * ioaccel2 mode: 1031c349775eSScott Teel * bit 0 = "performant mode" bit. 1032c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1033c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1034c349775eSScott Teel * a separate special register for submitting commands. 1035c349775eSScott Teel */ 1036c349775eSScott Teel 103725163bd5SWebb Scales /* 103825163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10393f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10403f5eac3aSStephen M. Cameron * register number 10413f5eac3aSStephen M. Cameron */ 104225163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 104325163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 104425163bd5SWebb Scales int reply_queue) 10453f5eac3aSStephen M. Cameron { 1046254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10473f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1048bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 104925163bd5SWebb Scales return; 10508b834bffSMing Lei c->Header.ReplyQueue = reply_queue; 1051254f796bSMatt Gates } 10523f5eac3aSStephen M. Cameron } 10533f5eac3aSStephen M. Cameron 1054c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 105525163bd5SWebb Scales struct CommandList *c, 105625163bd5SWebb Scales int reply_queue) 1057c349775eSScott Teel { 1058c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1059c349775eSScott Teel 106025163bd5SWebb Scales /* 106125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1062c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1063c349775eSScott Teel */ 10648b834bffSMing Lei cp->ReplyQueue = reply_queue; 106525163bd5SWebb Scales /* 106625163bd5SWebb Scales * Set the bits in the address sent down to include: 1067c349775eSScott Teel * - performant mode bit (bit 0) 1068c349775eSScott Teel * - pull count (bits 1-3) 1069c349775eSScott Teel * - command type (bits 4-6) 1070c349775eSScott Teel */ 1071c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1072c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1073c349775eSScott Teel } 1074c349775eSScott Teel 10758be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10768be986ccSStephen Cameron struct CommandList *c, 10778be986ccSStephen Cameron int reply_queue) 10788be986ccSStephen Cameron { 10798be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10808be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10818be986ccSStephen Cameron 10828be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10838be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10848be986ccSStephen Cameron */ 10858b834bffSMing Lei cp->reply_queue = reply_queue; 10868be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10878be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10888be986ccSStephen Cameron * - pull count (bits 0-3) 10898be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10908be986ccSStephen Cameron */ 10918be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10928be986ccSStephen Cameron } 10938be986ccSStephen Cameron 1094c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 109525163bd5SWebb Scales struct CommandList *c, 109625163bd5SWebb Scales int reply_queue) 1097c349775eSScott Teel { 1098c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1099c349775eSScott Teel 110025163bd5SWebb Scales /* 110125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1102c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1103c349775eSScott Teel */ 11048b834bffSMing Lei cp->reply_queue = reply_queue; 110525163bd5SWebb Scales /* 110625163bd5SWebb Scales * Set the bits in the address sent down to include: 1107c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1108c349775eSScott Teel * - pull count (bits 0-3) 1109c349775eSScott Teel * - command type isn't needed for ioaccel2 1110c349775eSScott Teel */ 1111c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1112c349775eSScott Teel } 1113c349775eSScott Teel 1114e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1115e85c5974SStephen M. Cameron { 1116e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1117e85c5974SStephen M. Cameron } 1118e85c5974SStephen M. Cameron 1119e85c5974SStephen M. Cameron /* 1120e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1121e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1122e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1123e85c5974SStephen M. Cameron */ 1124e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1125e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 11263d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1127e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1128e85c5974SStephen M. Cameron struct CommandList *c) 1129e85c5974SStephen M. Cameron { 1130e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1131e85c5974SStephen M. Cameron return; 1132e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1133e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1134e85c5974SStephen M. Cameron } 1135e85c5974SStephen M. Cameron 1136e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1137e85c5974SStephen M. Cameron struct CommandList *c) 1138e85c5974SStephen M. Cameron { 1139e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1140e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1141e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1142e85c5974SStephen M. Cameron } 1143e85c5974SStephen M. Cameron 114425163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 114525163bd5SWebb Scales struct CommandList *c, int reply_queue) 11463f5eac3aSStephen M. Cameron { 1147c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1148c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1149c5dfd106SDon Brace if (c->device) 1150c5dfd106SDon Brace atomic_inc(&c->device->commands_outstanding); 11518b834bffSMing Lei 11528b834bffSMing Lei reply_queue = h->reply_map[raw_smp_processor_id()]; 1153c349775eSScott Teel switch (c->cmd_type) { 1154c349775eSScott Teel case CMD_IOACCEL1: 115525163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1156c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1157c349775eSScott Teel break; 1158c349775eSScott Teel case CMD_IOACCEL2: 115925163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1160c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1161c349775eSScott Teel break; 11628be986ccSStephen Cameron case IOACCEL2_TMF: 11638be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11648be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11658be986ccSStephen Cameron break; 1166c349775eSScott Teel default: 116725163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1168f2405db8SDon Brace h->access.submit_command(h, c); 11693f5eac3aSStephen M. Cameron } 1170c05e8866SStephen Cameron } 11713f5eac3aSStephen M. Cameron 1172a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 117325163bd5SWebb Scales { 117425163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 117525163bd5SWebb Scales } 117625163bd5SWebb Scales 11773f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11783f5eac3aSStephen M. Cameron { 11793f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11803f5eac3aSStephen M. Cameron } 11813f5eac3aSStephen M. Cameron 11823f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11833f5eac3aSStephen M. Cameron { 11843f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11853f5eac3aSStephen M. Cameron return 0; 11863f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11873f5eac3aSStephen M. Cameron return 1; 11883f5eac3aSStephen M. Cameron return 0; 11893f5eac3aSStephen M. Cameron } 11903f5eac3aSStephen M. Cameron 1191edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1192edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1193edd16368SStephen M. Cameron { 1194edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1195edd16368SStephen M. Cameron * assumes h->devlock is held 1196edd16368SStephen M. Cameron */ 1197edd16368SStephen M. Cameron int i, found = 0; 1198cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1199edd16368SStephen M. Cameron 1200263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1201edd16368SStephen M. Cameron 1202edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1203edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1204263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1205edd16368SStephen M. Cameron } 1206edd16368SStephen M. Cameron 1207263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1208263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1209edd16368SStephen M. Cameron /* *bus = 1; */ 1210edd16368SStephen M. Cameron *target = i; 1211edd16368SStephen M. Cameron *lun = 0; 1212edd16368SStephen M. Cameron found = 1; 1213edd16368SStephen M. Cameron } 1214edd16368SStephen M. Cameron return !found; 1215edd16368SStephen M. Cameron } 1216edd16368SStephen M. Cameron 12171d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 12180d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12190d96ef5fSWebb Scales { 12207c59a0d4SDon Brace #define LABEL_SIZE 25 12217c59a0d4SDon Brace char label[LABEL_SIZE]; 12227c59a0d4SDon Brace 12239975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12249975ec9dSDon Brace return; 12259975ec9dSDon Brace 12267c59a0d4SDon Brace switch (dev->devtype) { 12277c59a0d4SDon Brace case TYPE_RAID: 12287c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12297c59a0d4SDon Brace break; 12307c59a0d4SDon Brace case TYPE_ENCLOSURE: 12317c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12327c59a0d4SDon Brace break; 12337c59a0d4SDon Brace case TYPE_DISK: 1234af15ed36SDon Brace case TYPE_ZBC: 12357c59a0d4SDon Brace if (dev->external) 12367c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12377c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12387c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12397c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12407c59a0d4SDon Brace else 12417c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12427c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12437c59a0d4SDon Brace raid_label[dev->raid_level]); 12447c59a0d4SDon Brace break; 12457c59a0d4SDon Brace case TYPE_ROM: 12467c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12477c59a0d4SDon Brace break; 12487c59a0d4SDon Brace case TYPE_TAPE: 12497c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12507c59a0d4SDon Brace break; 12517c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12527c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12537c59a0d4SDon Brace break; 12547c59a0d4SDon Brace default: 12557c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12567c59a0d4SDon Brace break; 12577c59a0d4SDon Brace } 12587c59a0d4SDon Brace 12590d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12607c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12610d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12620d96ef5fSWebb Scales description, 12630d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12640d96ef5fSWebb Scales dev->vendor, 12650d96ef5fSWebb Scales dev->model, 12667c59a0d4SDon Brace label, 12670d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 1268b2582a65SDon Brace dev->offload_to_be_enabled ? '+' : '-', 12692a168208SKevin Barnett dev->expose_device); 12700d96ef5fSWebb Scales } 12710d96ef5fSWebb Scales 1272edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12738aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1274edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1275edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1276edd16368SStephen M. Cameron { 1277edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1278edd16368SStephen M. Cameron int n = h->ndevices; 1279edd16368SStephen M. Cameron int i; 1280edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1281edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1282edd16368SStephen M. Cameron 1283cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1284edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1285edd16368SStephen M. Cameron "inaccessible.\n"); 1286edd16368SStephen M. Cameron return -1; 1287edd16368SStephen M. Cameron } 1288edd16368SStephen M. Cameron 1289edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1290edd16368SStephen M. Cameron if (device->lun != -1) 1291edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1292edd16368SStephen M. Cameron goto lun_assigned; 1293edd16368SStephen M. Cameron 1294edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1295edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12962b08b3e9SDon Brace * unit no, zero otherwise. 1297edd16368SStephen M. Cameron */ 1298edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1299edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1300edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1301edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1302edd16368SStephen M. Cameron return -1; 1303edd16368SStephen M. Cameron goto lun_assigned; 1304edd16368SStephen M. Cameron } 1305edd16368SStephen M. Cameron 1306edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1307edd16368SStephen M. Cameron * Search through our list and find the device which 13089a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1309edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1310edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1311edd16368SStephen M. Cameron */ 1312edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1313edd16368SStephen M. Cameron addr1[4] = 0; 13149a4178b7Sshane.seymour addr1[5] = 0; 1315edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1316edd16368SStephen M. Cameron sd = h->dev[i]; 1317edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1318edd16368SStephen M. Cameron addr2[4] = 0; 13199a4178b7Sshane.seymour addr2[5] = 0; 13209a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1321edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1322edd16368SStephen M. Cameron device->bus = sd->bus; 1323edd16368SStephen M. Cameron device->target = sd->target; 1324edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1325edd16368SStephen M. Cameron break; 1326edd16368SStephen M. Cameron } 1327edd16368SStephen M. Cameron } 1328edd16368SStephen M. Cameron if (device->lun == -1) { 1329edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1330edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1331edd16368SStephen M. Cameron "configuration.\n"); 1332edd16368SStephen M. Cameron return -1; 1333edd16368SStephen M. Cameron } 1334edd16368SStephen M. Cameron 1335edd16368SStephen M. Cameron lun_assigned: 1336edd16368SStephen M. Cameron 1337edd16368SStephen M. Cameron h->dev[n] = device; 1338edd16368SStephen M. Cameron h->ndevices++; 1339edd16368SStephen M. Cameron added[*nadded] = device; 1340edd16368SStephen M. Cameron (*nadded)++; 13410d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13422a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1343edd16368SStephen M. Cameron return 0; 1344edd16368SStephen M. Cameron } 1345edd16368SStephen M. Cameron 1346b2582a65SDon Brace /* 1347b2582a65SDon Brace * Called during a scan operation. 1348b2582a65SDon Brace * 1349b2582a65SDon Brace * Update an entry in h->dev[] array. 1350b2582a65SDon Brace */ 13518aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1352bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1353bd9244f7SScott Teel { 1354bd9244f7SScott Teel /* assumes h->devlock is held */ 1355bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1356bd9244f7SScott Teel 1357bd9244f7SScott Teel /* Raid level changed. */ 1358bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1359250fb125SStephen M. Cameron 1360b2582a65SDon Brace /* 1361b2582a65SDon Brace * ioacccel_handle may have changed for a dual domain disk 1362b2582a65SDon Brace */ 1363b2582a65SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1364b2582a65SDon Brace 136503383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 1366b2582a65SDon Brace if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 136703383736SDon Brace /* 136803383736SDon Brace * if drive is newly offload_enabled, we want to copy the 136903383736SDon Brace * raid map data first. If previously offload_enabled and 137003383736SDon Brace * offload_config were set, raid map data had better be 1371b2582a65SDon Brace * the same as it was before. If raid map data has changed 137203383736SDon Brace * then it had better be the case that 137303383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 137403383736SDon Brace */ 13759fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 137603383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 137703383736SDon Brace } 1378b2582a65SDon Brace if (new_entry->offload_to_be_enabled) { 1379a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1380a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1381a3144e0bSJoe Handzik } 1382a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 138303383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 138403383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 138503383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1386250fb125SStephen M. Cameron 138741ce4c35SStephen Cameron /* 138841ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 1389b2582a65SDon Brace * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 139041ce4c35SStephen Cameron * can't do that until all the devices are updated. 139141ce4c35SStephen Cameron */ 1392b2582a65SDon Brace h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1393b2582a65SDon Brace 1394b2582a65SDon Brace /* 1395b2582a65SDon Brace * turn ioaccel off immediately if told to do so. 1396b2582a65SDon Brace */ 1397b2582a65SDon Brace if (!new_entry->offload_to_be_enabled) 139841ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 139941ce4c35SStephen Cameron 14000d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1401bd9244f7SScott Teel } 1402bd9244f7SScott Teel 14032a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 14048aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 14052a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 14062a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 14072a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 14082a8ccf31SStephen M. Cameron { 14092a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1410cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 14112a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 14122a8ccf31SStephen M. Cameron (*nremoved)++; 141301350d05SStephen M. Cameron 141401350d05SStephen M. Cameron /* 141501350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 141601350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 141701350d05SStephen M. Cameron */ 141801350d05SStephen M. Cameron if (new_entry->target == -1) { 141901350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 142001350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 142101350d05SStephen M. Cameron } 142201350d05SStephen M. Cameron 14232a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 14242a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 14252a8ccf31SStephen M. Cameron (*nadded)++; 1426b2582a65SDon Brace 14270d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 14282a8ccf31SStephen M. Cameron } 14292a8ccf31SStephen M. Cameron 1430edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14318aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1432edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1433edd16368SStephen M. Cameron { 1434edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1435edd16368SStephen M. Cameron int i; 1436edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1437edd16368SStephen M. Cameron 1438cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1439edd16368SStephen M. Cameron 1440edd16368SStephen M. Cameron sd = h->dev[entry]; 1441edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1442edd16368SStephen M. Cameron (*nremoved)++; 1443edd16368SStephen M. Cameron 1444edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1445edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1446edd16368SStephen M. Cameron h->ndevices--; 14470d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1448edd16368SStephen M. Cameron } 1449edd16368SStephen M. Cameron 1450edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1451edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1452edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1453edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1454edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1455edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1456edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1457edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1458edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1459edd16368SStephen M. Cameron 1460edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1461edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1462edd16368SStephen M. Cameron { 1463edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1464edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1465edd16368SStephen M. Cameron */ 1466edd16368SStephen M. Cameron unsigned long flags; 1467edd16368SStephen M. Cameron int i, j; 1468edd16368SStephen M. Cameron 1469edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1470edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1471edd16368SStephen M. Cameron if (h->dev[i] == added) { 1472edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1473edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1474edd16368SStephen M. Cameron h->ndevices--; 1475edd16368SStephen M. Cameron break; 1476edd16368SStephen M. Cameron } 1477edd16368SStephen M. Cameron } 1478edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1479edd16368SStephen M. Cameron kfree(added); 1480edd16368SStephen M. Cameron } 1481edd16368SStephen M. Cameron 1482edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1483edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1484edd16368SStephen M. Cameron { 1485edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1486edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1487edd16368SStephen M. Cameron * to differ first 1488edd16368SStephen M. Cameron */ 1489edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1490edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1491edd16368SStephen M. Cameron return 0; 1492edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1493edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1494edd16368SStephen M. Cameron return 0; 1495edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1496edd16368SStephen M. Cameron return 0; 1497edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1498edd16368SStephen M. Cameron return 0; 1499edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1500edd16368SStephen M. Cameron return 0; 1501edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1502edd16368SStephen M. Cameron return 0; 1503edd16368SStephen M. Cameron return 1; 1504edd16368SStephen M. Cameron } 1505edd16368SStephen M. Cameron 1506bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1507bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1508bd9244f7SScott Teel { 1509bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1510bd9244f7SScott Teel * that the device is a different device, nor that the OS 1511bd9244f7SScott Teel * needs to be told anything about the change. 1512bd9244f7SScott Teel */ 1513bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1514bd9244f7SScott Teel return 1; 1515250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1516250fb125SStephen M. Cameron return 1; 1517b2582a65SDon Brace if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1518250fb125SStephen M. Cameron return 1; 151993849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 152003383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 152103383736SDon Brace return 1; 1522b2582a65SDon Brace /* 1523b2582a65SDon Brace * This can happen for dual domain devices. An active 1524b2582a65SDon Brace * path change causes the ioaccel handle to change 1525b2582a65SDon Brace * 1526b2582a65SDon Brace * for example note the handle differences between p0 and p1 1527b2582a65SDon Brace * Device WWN ,WWN hash,Handle 1528b2582a65SDon Brace * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1529b2582a65SDon Brace * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1530b2582a65SDon Brace */ 1531b2582a65SDon Brace if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1532b2582a65SDon Brace return 1; 1533bd9244f7SScott Teel return 0; 1534bd9244f7SScott Teel } 1535bd9244f7SScott Teel 1536edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1537edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1538edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1539bd9244f7SScott Teel * location in *index. 1540bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1541bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1542bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1543edd16368SStephen M. Cameron */ 1544edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1545edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1546edd16368SStephen M. Cameron int *index) 1547edd16368SStephen M. Cameron { 1548edd16368SStephen M. Cameron int i; 1549edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1550edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1551edd16368SStephen M. Cameron #define DEVICE_SAME 2 1552bd9244f7SScott Teel #define DEVICE_UPDATED 3 15531d33d85dSDon Brace if (needle == NULL) 15541d33d85dSDon Brace return DEVICE_NOT_FOUND; 15551d33d85dSDon Brace 1556edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 155723231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 155823231048SStephen M. Cameron continue; 1559edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1560edd16368SStephen M. Cameron *index = i; 1561bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1562bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1563bd9244f7SScott Teel return DEVICE_UPDATED; 1564edd16368SStephen M. Cameron return DEVICE_SAME; 1565bd9244f7SScott Teel } else { 15669846590eSStephen M. Cameron /* Keep offline devices offline */ 15679846590eSStephen M. Cameron if (needle->volume_offline) 15689846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1569edd16368SStephen M. Cameron return DEVICE_CHANGED; 1570edd16368SStephen M. Cameron } 1571edd16368SStephen M. Cameron } 1572bd9244f7SScott Teel } 1573edd16368SStephen M. Cameron *index = -1; 1574edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1575edd16368SStephen M. Cameron } 1576edd16368SStephen M. Cameron 15779846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15789846590eSStephen M. Cameron unsigned char scsi3addr[]) 15799846590eSStephen M. Cameron { 15809846590eSStephen M. Cameron struct offline_device_entry *device; 15819846590eSStephen M. Cameron unsigned long flags; 15829846590eSStephen M. Cameron 15839846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15849846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15859846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15869846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15879846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15889846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15899846590eSStephen M. Cameron return; 15909846590eSStephen M. Cameron } 15919846590eSStephen M. Cameron } 15929846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15939846590eSStephen M. Cameron 15949846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15959846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15967e8a9486SAmit Kushwaha if (!device) 15979846590eSStephen M. Cameron return; 15987e8a9486SAmit Kushwaha 15999846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 16009846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 16019846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 16029846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 16039846590eSStephen M. Cameron } 16049846590eSStephen M. Cameron 16059846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 16069846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 16079846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 16089846590eSStephen M. Cameron { 16099846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 16109846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16119846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 16129846590eSStephen M. Cameron h->scsi_host->host_no, 16139846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16149846590eSStephen M. Cameron switch (sd->volume_offline) { 16159846590eSStephen M. Cameron case HPSA_LV_OK: 16169846590eSStephen M. Cameron break; 16179846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 16189846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16199846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 16209846590eSStephen M. Cameron h->scsi_host->host_no, 16219846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16229846590eSStephen M. Cameron break; 16235ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 16245ca01204SScott Benesh dev_info(&h->pdev->dev, 16255ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 16265ca01204SScott Benesh h->scsi_host->host_no, 16275ca01204SScott Benesh sd->bus, sd->target, sd->lun); 16285ca01204SScott Benesh break; 16299846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 16309846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16315ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 16329846590eSStephen M. Cameron h->scsi_host->host_no, 16339846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16349846590eSStephen M. Cameron break; 16359846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16369846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16379846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16389846590eSStephen M. Cameron h->scsi_host->host_no, 16399846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16409846590eSStephen M. Cameron break; 16419846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16429846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16439846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16449846590eSStephen M. Cameron h->scsi_host->host_no, 16459846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16469846590eSStephen M. Cameron break; 16479846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16489846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16499846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16509846590eSStephen M. Cameron h->scsi_host->host_no, 16519846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16529846590eSStephen M. Cameron break; 16539846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16549846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16559846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16569846590eSStephen M. Cameron h->scsi_host->host_no, 16579846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16589846590eSStephen M. Cameron break; 16599846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16609846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16619846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16629846590eSStephen M. Cameron h->scsi_host->host_no, 16639846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16649846590eSStephen M. Cameron break; 16659846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16669846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16679846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16689846590eSStephen M. Cameron h->scsi_host->host_no, 16699846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16709846590eSStephen M. Cameron break; 16719846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16729846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16739846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16749846590eSStephen M. Cameron h->scsi_host->host_no, 16759846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16769846590eSStephen M. Cameron break; 16779846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16789846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16799846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16809846590eSStephen M. Cameron h->scsi_host->host_no, 16819846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16829846590eSStephen M. Cameron break; 16839846590eSStephen M. Cameron } 16849846590eSStephen M. Cameron } 16859846590eSStephen M. Cameron 168603383736SDon Brace /* 168703383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 168803383736SDon Brace * raid offload configured. 168903383736SDon Brace */ 169003383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 169103383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 169203383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 169303383736SDon Brace { 169403383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 169503383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 169603383736SDon Brace int i, j; 169703383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 169803383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 169903383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 170003383736SDon Brace le16_to_cpu(map->layout_map_count) * 170103383736SDon Brace total_disks_per_row; 170203383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 170303383736SDon Brace total_disks_per_row; 170403383736SDon Brace int qdepth; 170503383736SDon Brace 170603383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 170703383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 170803383736SDon Brace 1709d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1710d604f533SWebb Scales 171103383736SDon Brace qdepth = 0; 171203383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 171303383736SDon Brace logical_drive->phys_disk[i] = NULL; 171403383736SDon Brace if (!logical_drive->offload_config) 171503383736SDon Brace continue; 171603383736SDon Brace for (j = 0; j < ndevices; j++) { 17171d33d85dSDon Brace if (dev[j] == NULL) 17181d33d85dSDon Brace continue; 1719ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1720ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1721af15ed36SDon Brace continue; 1722f3f01730SKevin Barnett if (is_logical_device(dev[j])) 172303383736SDon Brace continue; 172403383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 172503383736SDon Brace continue; 172603383736SDon Brace 172703383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 172803383736SDon Brace if (i < nphys_disk) 172903383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 173003383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 173103383736SDon Brace break; 173203383736SDon Brace } 173303383736SDon Brace 173403383736SDon Brace /* 173503383736SDon Brace * This can happen if a physical drive is removed and 173603383736SDon Brace * the logical drive is degraded. In that case, the RAID 173703383736SDon Brace * map data will refer to a physical disk which isn't actually 173803383736SDon Brace * present. And in that case offload_enabled should already 173903383736SDon Brace * be 0, but we'll turn it off here just in case 174003383736SDon Brace */ 174103383736SDon Brace if (!logical_drive->phys_disk[i]) { 1742b2582a65SDon Brace dev_warn(&h->pdev->dev, 1743b2582a65SDon Brace "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1744b2582a65SDon Brace __func__, 1745b2582a65SDon Brace h->scsi_host->host_no, logical_drive->bus, 1746b2582a65SDon Brace logical_drive->target, logical_drive->lun); 1747*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(logical_drive); 174841ce4c35SStephen Cameron logical_drive->queue_depth = 8; 174903383736SDon Brace } 175003383736SDon Brace } 175103383736SDon Brace if (nraid_map_entries) 175203383736SDon Brace /* 175303383736SDon Brace * This is correct for reads, too high for full stripe writes, 175403383736SDon Brace * way too high for partial stripe writes 175503383736SDon Brace */ 175603383736SDon Brace logical_drive->queue_depth = qdepth; 17572c5fc363SDon Brace else { 17582c5fc363SDon Brace if (logical_drive->external) 17592c5fc363SDon Brace logical_drive->queue_depth = EXTERNAL_QD; 176003383736SDon Brace else 176103383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 176203383736SDon Brace } 17632c5fc363SDon Brace } 176403383736SDon Brace 176503383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 176603383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 176703383736SDon Brace { 176803383736SDon Brace int i; 176903383736SDon Brace 177003383736SDon Brace for (i = 0; i < ndevices; i++) { 17711d33d85dSDon Brace if (dev[i] == NULL) 17721d33d85dSDon Brace continue; 1773ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1774ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1775af15ed36SDon Brace continue; 1776f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 177703383736SDon Brace continue; 177841ce4c35SStephen Cameron 177941ce4c35SStephen Cameron /* 178041ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 178141ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 1782b2582a65SDon Brace * because we would be changing ioaccel phsy_disk[] pointers 1783b2582a65SDon Brace * on a ioaccel volume processing I/O requests. 1784b2582a65SDon Brace * 1785b2582a65SDon Brace * If an ioaccel volume status changed, initially because it was 1786b2582a65SDon Brace * re-configured and thus underwent a transformation, or 1787b2582a65SDon Brace * a drive failed, we would have received a state change 1788b2582a65SDon Brace * request and ioaccel should have been turned off. When the 1789b2582a65SDon Brace * transformation completes, we get another state change 1790b2582a65SDon Brace * request to turn ioaccel back on. In this case, we need 1791b2582a65SDon Brace * to update the ioaccel information. 1792b2582a65SDon Brace * 1793b2582a65SDon Brace * Thus: If it is not currently enabled, but will be after 1794b2582a65SDon Brace * the scan completes, make sure the ioaccel pointers 1795b2582a65SDon Brace * are up to date. 179641ce4c35SStephen Cameron */ 179741ce4c35SStephen Cameron 1798b2582a65SDon Brace if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 179903383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 180003383736SDon Brace } 180103383736SDon Brace } 180203383736SDon Brace 1803096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1804096ccff4SKevin Barnett { 1805096ccff4SKevin Barnett int rc = 0; 1806096ccff4SKevin Barnett 1807096ccff4SKevin Barnett if (!h->scsi_host) 1808096ccff4SKevin Barnett return 1; 1809096ccff4SKevin Barnett 1810d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1811096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1812096ccff4SKevin Barnett device->target, device->lun); 1813d04e62b9SKevin Barnett else /* HBA */ 1814d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1815d04e62b9SKevin Barnett 1816096ccff4SKevin Barnett return rc; 1817096ccff4SKevin Barnett } 1818096ccff4SKevin Barnett 1819ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1820ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1821ba74fdc4SDon Brace { 1822ba74fdc4SDon Brace int i; 1823ba74fdc4SDon Brace int count = 0; 1824ba74fdc4SDon Brace 1825ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1826ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1827ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1828ba74fdc4SDon Brace 1829ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1830ba74fdc4SDon Brace dev->scsi3addr)) { 1831ba74fdc4SDon Brace unsigned long flags; 1832ba74fdc4SDon Brace 1833ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1834ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1835ba74fdc4SDon Brace ++count; 1836ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1837ba74fdc4SDon Brace } 1838ba74fdc4SDon Brace 1839ba74fdc4SDon Brace cmd_free(h, c); 1840ba74fdc4SDon Brace } 1841ba74fdc4SDon Brace 1842ba74fdc4SDon Brace return count; 1843ba74fdc4SDon Brace } 1844ba74fdc4SDon Brace 1845b443d3eaSDon Brace #define NUM_WAIT 20 1846ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1847ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1848ba74fdc4SDon Brace { 1849ba74fdc4SDon Brace int cmds = 0; 1850ba74fdc4SDon Brace int waits = 0; 1851b443d3eaSDon Brace int num_wait = NUM_WAIT; 1852b443d3eaSDon Brace 1853b443d3eaSDon Brace if (device->external) 1854b443d3eaSDon Brace num_wait = HPSA_EH_PTRAID_TIMEOUT; 1855ba74fdc4SDon Brace 1856ba74fdc4SDon Brace while (1) { 1857ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1858ba74fdc4SDon Brace if (cmds == 0) 1859ba74fdc4SDon Brace break; 1860b443d3eaSDon Brace if (++waits > num_wait) 1861ba74fdc4SDon Brace break; 18629211a07fSDon Brace msleep(1000); 18639211a07fSDon Brace } 18649211a07fSDon Brace 1865b443d3eaSDon Brace if (waits > num_wait) { 1866ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1867b443d3eaSDon Brace "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n", 1868b443d3eaSDon Brace __func__, 1869b443d3eaSDon Brace h->scsi_host->host_no, 1870b443d3eaSDon Brace device->bus, device->target, device->lun, cmds); 1871b443d3eaSDon Brace } 1872ba74fdc4SDon Brace } 1873ba74fdc4SDon Brace 1874096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1875096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1876096ccff4SKevin Barnett { 1877096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1878096ccff4SKevin Barnett 1879096ccff4SKevin Barnett if (!h->scsi_host) 1880096ccff4SKevin Barnett return; 1881096ccff4SKevin Barnett 18820ff365f5SDon Brace /* 18830ff365f5SDon Brace * Allow for commands to drain 18840ff365f5SDon Brace */ 18850ff365f5SDon Brace device->removed = 1; 18860ff365f5SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 18870ff365f5SDon Brace 1888d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1889096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1890096ccff4SKevin Barnett device->target, device->lun); 1891096ccff4SKevin Barnett if (sdev) { 1892096ccff4SKevin Barnett scsi_remove_device(sdev); 1893096ccff4SKevin Barnett scsi_device_put(sdev); 1894096ccff4SKevin Barnett } else { 1895096ccff4SKevin Barnett /* 1896096ccff4SKevin Barnett * We don't expect to get here. Future commands 1897096ccff4SKevin Barnett * to this device will get a selection timeout as 1898096ccff4SKevin Barnett * if the device were gone. 1899096ccff4SKevin Barnett */ 1900096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1901096ccff4SKevin Barnett "didn't find device for removal."); 1902096ccff4SKevin Barnett } 1903ba74fdc4SDon Brace } else { /* HBA */ 1904ba74fdc4SDon Brace 1905d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1906096ccff4SKevin Barnett } 1907ba74fdc4SDon Brace } 1908096ccff4SKevin Barnett 19098aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1910edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1911edd16368SStephen M. Cameron { 1912edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1913edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1914edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1915edd16368SStephen M. Cameron */ 1916edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1917edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1918edd16368SStephen M. Cameron unsigned long flags; 1919edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1920edd16368SStephen M. Cameron int nadded, nremoved; 1921edd16368SStephen M. Cameron 1922da03ded0SDon Brace /* 1923da03ded0SDon Brace * A reset can cause a device status to change 1924da03ded0SDon Brace * re-schedule the scan to see what happened. 1925da03ded0SDon Brace */ 1926c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 1927da03ded0SDon Brace if (h->reset_in_progress) { 1928da03ded0SDon Brace h->drv_req_rescan = 1; 1929c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1930da03ded0SDon Brace return; 1931da03ded0SDon Brace } 1932c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1933edd16368SStephen M. Cameron 19346396bb22SKees Cook added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 19356396bb22SKees Cook removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1936edd16368SStephen M. Cameron 1937edd16368SStephen M. Cameron if (!added || !removed) { 1938edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1939edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1940edd16368SStephen M. Cameron goto free_and_out; 1941edd16368SStephen M. Cameron } 1942edd16368SStephen M. Cameron 1943edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1944edd16368SStephen M. Cameron 1945edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1946edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1947edd16368SStephen M. Cameron * devices which have changed, remove the old device 1948edd16368SStephen M. Cameron * info and add the new device info. 1949bd9244f7SScott Teel * If minor device attributes change, just update 1950bd9244f7SScott Teel * the existing device structure. 1951edd16368SStephen M. Cameron */ 1952edd16368SStephen M. Cameron i = 0; 1953edd16368SStephen M. Cameron nremoved = 0; 1954edd16368SStephen M. Cameron nadded = 0; 1955edd16368SStephen M. Cameron while (i < h->ndevices) { 1956edd16368SStephen M. Cameron csd = h->dev[i]; 1957edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1958edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1959edd16368SStephen M. Cameron changes++; 19608aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1961edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1962edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1963edd16368SStephen M. Cameron changes++; 19648aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 19652a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1966c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1967c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1968c7f172dcSStephen M. Cameron */ 1969c7f172dcSStephen M. Cameron sd[entry] = NULL; 1970bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19718aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1972edd16368SStephen M. Cameron } 1973edd16368SStephen M. Cameron i++; 1974edd16368SStephen M. Cameron } 1975edd16368SStephen M. Cameron 1976edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1977edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1978edd16368SStephen M. Cameron */ 1979edd16368SStephen M. Cameron 1980edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1981edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1982edd16368SStephen M. Cameron continue; 19839846590eSStephen M. Cameron 19849846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19859846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19869846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19879846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19889846590eSStephen M. Cameron */ 19899846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19909846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19910d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19929846590eSStephen M. Cameron continue; 19939846590eSStephen M. Cameron } 19949846590eSStephen M. Cameron 1995edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1996edd16368SStephen M. Cameron h->ndevices, &entry); 1997edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1998edd16368SStephen M. Cameron changes++; 19998aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 2000edd16368SStephen M. Cameron break; 2001edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 2002edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 2003edd16368SStephen M. Cameron /* should never happen... */ 2004edd16368SStephen M. Cameron changes++; 2005edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 2006edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 2007edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 2008edd16368SStephen M. Cameron } 2009edd16368SStephen M. Cameron } 201041ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 201141ce4c35SStephen Cameron 2012b2582a65SDon Brace /* 2013b2582a65SDon Brace * Now that h->dev[]->phys_disk[] is coherent, we can enable 201441ce4c35SStephen Cameron * any logical drives that need it enabled. 2015b2582a65SDon Brace * 2016b2582a65SDon Brace * The raid map should be current by now. 2017b2582a65SDon Brace * 2018b2582a65SDon Brace * We are updating the device list used for I/O requests. 201941ce4c35SStephen Cameron */ 20201d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 20211d33d85dSDon Brace if (h->dev[i] == NULL) 20221d33d85dSDon Brace continue; 202341ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 20241d33d85dSDon Brace } 202541ce4c35SStephen Cameron 2026edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2027edd16368SStephen M. Cameron 20289846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 20299846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 20309846590eSStephen M. Cameron * so don't touch h->dev[] 20319846590eSStephen M. Cameron */ 20329846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 20339846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 20349846590eSStephen M. Cameron continue; 20359846590eSStephen M. Cameron if (sd[i]->volume_offline) 20369846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 20379846590eSStephen M. Cameron } 20389846590eSStephen M. Cameron 2039edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 2040edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 2041edd16368SStephen M. Cameron * first time through. 2042edd16368SStephen M. Cameron */ 20438aa60681SDon Brace if (!changes) 2044edd16368SStephen M. Cameron goto free_and_out; 2045edd16368SStephen M. Cameron 2046edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 2047edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 20481d33d85dSDon Brace if (removed[i] == NULL) 20491d33d85dSDon Brace continue; 2050096ccff4SKevin Barnett if (removed[i]->expose_device) 2051096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 2052edd16368SStephen M. Cameron kfree(removed[i]); 2053edd16368SStephen M. Cameron removed[i] = NULL; 2054edd16368SStephen M. Cameron } 2055edd16368SStephen M. Cameron 2056edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 2057edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 2058096ccff4SKevin Barnett int rc = 0; 2059096ccff4SKevin Barnett 20601d33d85dSDon Brace if (added[i] == NULL) 206141ce4c35SStephen Cameron continue; 20622a168208SKevin Barnett if (!(added[i]->expose_device)) 2063edd16368SStephen M. Cameron continue; 2064096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 2065096ccff4SKevin Barnett if (!rc) 2066edd16368SStephen M. Cameron continue; 2067096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 2068096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 2069edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 2070edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 2071edd16368SStephen M. Cameron */ 2072edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 2073853633e8SDon Brace h->drv_req_rescan = 1; 2074edd16368SStephen M. Cameron } 2075edd16368SStephen M. Cameron 2076edd16368SStephen M. Cameron free_and_out: 2077edd16368SStephen M. Cameron kfree(added); 2078edd16368SStephen M. Cameron kfree(removed); 2079edd16368SStephen M. Cameron } 2080edd16368SStephen M. Cameron 2081edd16368SStephen M. Cameron /* 20829e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2083edd16368SStephen M. Cameron * Assume's h->devlock is held. 2084edd16368SStephen M. Cameron */ 2085edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2086edd16368SStephen M. Cameron int bus, int target, int lun) 2087edd16368SStephen M. Cameron { 2088edd16368SStephen M. Cameron int i; 2089edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2090edd16368SStephen M. Cameron 2091edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2092edd16368SStephen M. Cameron sd = h->dev[i]; 2093edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2094edd16368SStephen M. Cameron return sd; 2095edd16368SStephen M. Cameron } 2096edd16368SStephen M. Cameron return NULL; 2097edd16368SStephen M. Cameron } 2098edd16368SStephen M. Cameron 2099edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2100edd16368SStephen M. Cameron { 21017630b3a5SHannes Reinecke struct hpsa_scsi_dev_t *sd = NULL; 2102edd16368SStephen M. Cameron unsigned long flags; 2103edd16368SStephen M. Cameron struct ctlr_info *h; 2104edd16368SStephen M. Cameron 2105edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2106edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2107d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2108d04e62b9SKevin Barnett struct scsi_target *starget; 2109d04e62b9SKevin Barnett struct sas_rphy *rphy; 2110d04e62b9SKevin Barnett 2111d04e62b9SKevin Barnett starget = scsi_target(sdev); 2112d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2113d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2114d04e62b9SKevin Barnett if (sd) { 2115d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2116d04e62b9SKevin Barnett sd->lun = sdev->lun; 2117d04e62b9SKevin Barnett } 21187630b3a5SHannes Reinecke } 21197630b3a5SHannes Reinecke if (!sd) 2120edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2121edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2122d04e62b9SKevin Barnett 2123d04e62b9SKevin Barnett if (sd && sd->expose_device) { 212403383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2125d04e62b9SKevin Barnett sdev->hostdata = sd; 212641ce4c35SStephen Cameron } else 212741ce4c35SStephen Cameron sdev->hostdata = NULL; 2128edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2129edd16368SStephen M. Cameron return 0; 2130edd16368SStephen M. Cameron } 2131edd16368SStephen M. Cameron 213241ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 213341ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 213441ce4c35SStephen Cameron { 213541ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 213641ce4c35SStephen Cameron int queue_depth; 213741ce4c35SStephen Cameron 213841ce4c35SStephen Cameron sd = sdev->hostdata; 21392a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 214041ce4c35SStephen Cameron 21415086435eSDon Brace if (sd) { 21429e33f0d5SDon Brace sd->was_removed = 0; 2143b443d3eaSDon Brace if (sd->external) { 21445086435eSDon Brace queue_depth = EXTERNAL_QD; 2145b443d3eaSDon Brace sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT; 2146b443d3eaSDon Brace blk_queue_rq_timeout(sdev->request_queue, 2147b443d3eaSDon Brace HPSA_EH_PTRAID_TIMEOUT); 2148b443d3eaSDon Brace } else { 214941ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 215041ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 2151b443d3eaSDon Brace } 21525086435eSDon Brace } else 215341ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 215441ce4c35SStephen Cameron 215541ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 215641ce4c35SStephen Cameron 215741ce4c35SStephen Cameron return 0; 215841ce4c35SStephen Cameron } 215941ce4c35SStephen Cameron 2160edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2161edd16368SStephen M. Cameron { 21629e33f0d5SDon Brace struct hpsa_scsi_dev_t *hdev = NULL; 21639e33f0d5SDon Brace 21649e33f0d5SDon Brace hdev = sdev->hostdata; 21659e33f0d5SDon Brace 21669e33f0d5SDon Brace if (hdev) 21679e33f0d5SDon Brace hdev->was_removed = 1; 2168edd16368SStephen M. Cameron } 2169edd16368SStephen M. Cameron 2170d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2171d9a729f3SWebb Scales { 2172d9a729f3SWebb Scales int i; 2173d9a729f3SWebb Scales 2174d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2175d9a729f3SWebb Scales return; 2176d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2177d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2178d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2179d9a729f3SWebb Scales } 2180d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2181d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2182d9a729f3SWebb Scales } 2183d9a729f3SWebb Scales 2184d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2185d9a729f3SWebb Scales { 2186d9a729f3SWebb Scales int i; 2187d9a729f3SWebb Scales 2188d9a729f3SWebb Scales if (h->chainsize <= 0) 2189d9a729f3SWebb Scales return 0; 2190d9a729f3SWebb Scales 2191d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 21926396bb22SKees Cook kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2193d9a729f3SWebb Scales GFP_KERNEL); 2194d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2195d9a729f3SWebb Scales return -ENOMEM; 2196d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2197d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 21986da2ec56SKees Cook kmalloc_array(h->maxsgentries, 21996da2ec56SKees Cook sizeof(*h->ioaccel2_cmd_sg_list[i]), 22006da2ec56SKees Cook GFP_KERNEL); 2201d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2202d9a729f3SWebb Scales goto clean; 2203d9a729f3SWebb Scales } 2204d9a729f3SWebb Scales return 0; 2205d9a729f3SWebb Scales 2206d9a729f3SWebb Scales clean: 2207d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2208d9a729f3SWebb Scales return -ENOMEM; 2209d9a729f3SWebb Scales } 2210d9a729f3SWebb Scales 221133a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 221233a2ffceSStephen M. Cameron { 221333a2ffceSStephen M. Cameron int i; 221433a2ffceSStephen M. Cameron 221533a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 221633a2ffceSStephen M. Cameron return; 221733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 221833a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 221933a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 222033a2ffceSStephen M. Cameron } 222133a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 222233a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 222333a2ffceSStephen M. Cameron } 222433a2ffceSStephen M. Cameron 2225105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 222633a2ffceSStephen M. Cameron { 222733a2ffceSStephen M. Cameron int i; 222833a2ffceSStephen M. Cameron 222933a2ffceSStephen M. Cameron if (h->chainsize <= 0) 223033a2ffceSStephen M. Cameron return 0; 223133a2ffceSStephen M. Cameron 22326396bb22SKees Cook h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 223333a2ffceSStephen M. Cameron GFP_KERNEL); 22347e8a9486SAmit Kushwaha if (!h->cmd_sg_list) 223533a2ffceSStephen M. Cameron return -ENOMEM; 22367e8a9486SAmit Kushwaha 223733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 22386da2ec56SKees Cook h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 22396da2ec56SKees Cook sizeof(*h->cmd_sg_list[i]), 22406da2ec56SKees Cook GFP_KERNEL); 22417e8a9486SAmit Kushwaha if (!h->cmd_sg_list[i]) 224233a2ffceSStephen M. Cameron goto clean; 22437e8a9486SAmit Kushwaha 22443d4e6af8SRobert Elliott } 224533a2ffceSStephen M. Cameron return 0; 224633a2ffceSStephen M. Cameron 224733a2ffceSStephen M. Cameron clean: 224833a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 224933a2ffceSStephen M. Cameron return -ENOMEM; 225033a2ffceSStephen M. Cameron } 225133a2ffceSStephen M. Cameron 2252d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2253d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2254d9a729f3SWebb Scales { 2255d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2256d9a729f3SWebb Scales u64 temp64; 2257d9a729f3SWebb Scales u32 chain_size; 2258d9a729f3SWebb Scales 2259d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2260a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 22618bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 22628bc8f47eSChristoph Hellwig DMA_TO_DEVICE); 2263d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2264d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2265d9a729f3SWebb Scales cp->sg->address = 0; 2266d9a729f3SWebb Scales return -1; 2267d9a729f3SWebb Scales } 2268d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2269d9a729f3SWebb Scales return 0; 2270d9a729f3SWebb Scales } 2271d9a729f3SWebb Scales 2272d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2273d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2274d9a729f3SWebb Scales { 2275d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2276d9a729f3SWebb Scales u64 temp64; 2277d9a729f3SWebb Scales u32 chain_size; 2278d9a729f3SWebb Scales 2279d9a729f3SWebb Scales chain_sg = cp->sg; 2280d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2281a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 22828bc8f47eSChristoph Hellwig dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2283d9a729f3SWebb Scales } 2284d9a729f3SWebb Scales 2285e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 228633a2ffceSStephen M. Cameron struct CommandList *c) 228733a2ffceSStephen M. Cameron { 228833a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 228933a2ffceSStephen M. Cameron u64 temp64; 229050a0decfSStephen M. Cameron u32 chain_len; 229133a2ffceSStephen M. Cameron 229233a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 229333a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 229450a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 229550a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22962b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 229750a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 22988bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 22998bc8f47eSChristoph Hellwig DMA_TO_DEVICE); 2300e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2301e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 230250a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2303e2bea6dfSStephen M. Cameron return -1; 2304e2bea6dfSStephen M. Cameron } 230550a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2306e2bea6dfSStephen M. Cameron return 0; 230733a2ffceSStephen M. Cameron } 230833a2ffceSStephen M. Cameron 230933a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 231033a2ffceSStephen M. Cameron struct CommandList *c) 231133a2ffceSStephen M. Cameron { 231233a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 231333a2ffceSStephen M. Cameron 231450a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 231533a2ffceSStephen M. Cameron return; 231633a2ffceSStephen M. Cameron 231733a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 23188bc8f47eSChristoph Hellwig dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 23198bc8f47eSChristoph Hellwig le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 232033a2ffceSStephen M. Cameron } 232133a2ffceSStephen M. Cameron 2322a09c1441SScott Teel 2323a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2324a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2325a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2326a09c1441SScott Teel */ 2327a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2328c349775eSScott Teel struct CommandList *c, 2329c349775eSScott Teel struct scsi_cmnd *cmd, 2330ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2331ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2332c349775eSScott Teel { 2333c349775eSScott Teel int data_len; 2334a09c1441SScott Teel int retry = 0; 2335c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2336c349775eSScott Teel 2337c349775eSScott Teel switch (c2->error_data.serv_response) { 2338c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2339c349775eSScott Teel switch (c2->error_data.status) { 2340c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2341eeebce18SDon Brace if (cmd) 2342eeebce18SDon Brace cmd->result = 0; 2343c349775eSScott Teel break; 2344c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2345ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2346c349775eSScott Teel if (c2->error_data.data_present != 2347ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2348ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2349ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2350c349775eSScott Teel break; 2351ee6b1889SStephen M. Cameron } 2352c349775eSScott Teel /* copy the sense data */ 2353c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2354c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2355c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2356c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2357c349775eSScott Teel data_len = 2358c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2359c349775eSScott Teel memcpy(cmd->sense_buffer, 2360c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2361a09c1441SScott Teel retry = 1; 2362c349775eSScott Teel break; 2363c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2364a09c1441SScott Teel retry = 1; 2365c349775eSScott Teel break; 2366c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2367a09c1441SScott Teel retry = 1; 2368c349775eSScott Teel break; 2369c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 23704a8da22bSStephen Cameron retry = 1; 2371c349775eSScott Teel break; 2372c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2373a09c1441SScott Teel retry = 1; 2374c349775eSScott Teel break; 2375c349775eSScott Teel default: 2376a09c1441SScott Teel retry = 1; 2377c349775eSScott Teel break; 2378c349775eSScott Teel } 2379c349775eSScott Teel break; 2380c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2381c40820d5SJoe Handzik switch (c2->error_data.status) { 2382c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2383c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2384c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2385c40820d5SJoe Handzik retry = 1; 2386c40820d5SJoe Handzik break; 2387c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2388c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2389c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2390c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2391c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2392c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2393c40820d5SJoe Handzik break; 2394c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2395c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2396c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2397ba74fdc4SDon Brace /* 2398ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2399ba74fdc4SDon Brace * get a state change event from the controller but 2400ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2401ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2402ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2403ba74fdc4SDon Brace * of the disk to get the same device node. 2404ba74fdc4SDon Brace */ 2405ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2406ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2407ba74fdc4SDon Brace dev->removed = 1; 2408ba74fdc4SDon Brace h->drv_req_rescan = 1; 2409ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2410ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2411ba74fdc4SDon Brace } else 2412ba74fdc4SDon Brace /* 2413ba74fdc4SDon Brace * Retry by sending down the RAID path. 2414ba74fdc4SDon Brace * We will get an event from ctlr to 2415ba74fdc4SDon Brace * trigger rescan regardless. 2416ba74fdc4SDon Brace */ 2417c40820d5SJoe Handzik retry = 1; 2418c40820d5SJoe Handzik break; 2419c40820d5SJoe Handzik default: 2420c40820d5SJoe Handzik retry = 1; 2421c40820d5SJoe Handzik } 2422c349775eSScott Teel break; 2423c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2424c349775eSScott Teel break; 2425c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2426c349775eSScott Teel break; 2427c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2428a09c1441SScott Teel retry = 1; 2429c349775eSScott Teel break; 2430c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2431c349775eSScott Teel break; 2432c349775eSScott Teel default: 2433a09c1441SScott Teel retry = 1; 2434c349775eSScott Teel break; 2435c349775eSScott Teel } 2436a09c1441SScott Teel 2437c5dfd106SDon Brace if (dev->in_reset) 2438c5dfd106SDon Brace retry = 0; 2439c5dfd106SDon Brace 2440a09c1441SScott Teel return retry; /* retry on raid path? */ 2441c349775eSScott Teel } 2442c349775eSScott Teel 2443a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2444a58e7e53SWebb Scales struct CommandList *c) 2445a58e7e53SWebb Scales { 2446c5dfd106SDon Brace struct hpsa_scsi_dev_t *dev = c->device; 2447d604f533SWebb Scales 2448a58e7e53SWebb Scales /* 244908ec46f6SDon Brace * Reset c->scsi_cmd here so that the reset handler will know 2450d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2451a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2452a58e7e53SWebb Scales */ 2453a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2454d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2455c5dfd106SDon Brace if (dev) { 2456c5dfd106SDon Brace atomic_dec(&dev->commands_outstanding); 2457c5dfd106SDon Brace if (dev->in_reset && 2458c5dfd106SDon Brace atomic_read(&dev->commands_outstanding) <= 0) 2459d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2460a58e7e53SWebb Scales } 2461c5dfd106SDon Brace } 2462a58e7e53SWebb Scales 246373153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 246473153fe5SWebb Scales struct CommandList *c) 246573153fe5SWebb Scales { 246673153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 246773153fe5SWebb Scales cmd_tagged_free(h, c); 246873153fe5SWebb Scales } 246973153fe5SWebb Scales 24708a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24718a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24728a0ff92cSWebb Scales { 247373153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2474d49c2077SDon Brace if (cmd && cmd->scsi_done) 24758a0ff92cSWebb Scales cmd->scsi_done(cmd); 24768a0ff92cSWebb Scales } 24778a0ff92cSWebb Scales 24788a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24798a0ff92cSWebb Scales { 24808a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24818a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24828a0ff92cSWebb Scales } 24838a0ff92cSWebb Scales 2484c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2485c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2486c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2487c349775eSScott Teel { 2488c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2489c349775eSScott Teel 2490c349775eSScott Teel /* check for good status */ 2491c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 2492eeebce18SDon Brace c2->error_data.status == 0)) { 2493eeebce18SDon Brace cmd->result = 0; 24948a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2495eeebce18SDon Brace } 2496c349775eSScott Teel 24978a0ff92cSWebb Scales /* 24988a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2499b2582a65SDon Brace * the normal I/O path so the controller can handle whatever is 2500c349775eSScott Teel * wrong. 2501c349775eSScott Teel */ 2502f3f01730SKevin Barnett if (is_logical_device(dev) && 2503c349775eSScott Teel c2->error_data.serv_response == 2504c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2505080ef1ccSDon Brace if (c2->error_data.status == 2506064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2507*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 2508064d1b1dSDon Brace } 25098a0ff92cSWebb Scales 2510c5dfd106SDon Brace if (dev->in_reset) { 2511c5dfd106SDon Brace cmd->result = DID_RESET << 16; 2512c5dfd106SDon Brace return hpsa_cmd_free_and_done(h, c, cmd); 2513c5dfd106SDon Brace } 2514c5dfd106SDon Brace 25158a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2516080ef1ccSDon Brace } 2517080ef1ccSDon Brace 2518ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 25198a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2520080ef1ccSDon Brace 25218a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2522c349775eSScott Teel } 2523c349775eSScott Teel 25249437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 25259437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 25269437ac43SStephen Cameron struct CommandList *cp) 25279437ac43SStephen Cameron { 25289437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 25299437ac43SStephen Cameron 25309437ac43SStephen Cameron switch (tmf_status) { 25319437ac43SStephen Cameron case CISS_TMF_COMPLETE: 25329437ac43SStephen Cameron /* 25339437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 25349437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 25359437ac43SStephen Cameron */ 25369437ac43SStephen Cameron case CISS_TMF_SUCCESS: 25379437ac43SStephen Cameron return 0; 25389437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 25399437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 25409437ac43SStephen Cameron case CISS_TMF_FAILED: 25419437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 25429437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 25439437ac43SStephen Cameron break; 25449437ac43SStephen Cameron default: 25459437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 25469437ac43SStephen Cameron tmf_status); 25479437ac43SStephen Cameron break; 25489437ac43SStephen Cameron } 25499437ac43SStephen Cameron return -tmf_status; 25509437ac43SStephen Cameron } 25519437ac43SStephen Cameron 25521fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2553edd16368SStephen M. Cameron { 2554edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2555edd16368SStephen M. Cameron struct ctlr_info *h; 2556edd16368SStephen M. Cameron struct ErrorInfo *ei; 2557283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2558d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2559edd16368SStephen M. Cameron 25609437ac43SStephen Cameron u8 sense_key; 25619437ac43SStephen Cameron u8 asc; /* additional sense code */ 25629437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2563db111e18SStephen M. Cameron unsigned long sense_data_size; 2564edd16368SStephen M. Cameron 2565edd16368SStephen M. Cameron ei = cp->err_info; 25667fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2567edd16368SStephen M. Cameron h = cp->h; 2568d49c2077SDon Brace 2569d49c2077SDon Brace if (!cmd->device) { 2570d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2571d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2572d49c2077SDon Brace } 2573d49c2077SDon Brace 2574283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 257545e596cdSDon Brace if (!dev) { 257645e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 257745e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 257845e596cdSDon Brace } 2579d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2580edd16368SStephen M. Cameron 2581edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2582e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25832b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 258433a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2585edd16368SStephen M. Cameron 2586d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2587d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2588d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2589d9a729f3SWebb Scales 2590edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2591edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2592c349775eSScott Teel 25939e33f0d5SDon Brace /* SCSI command has already been cleaned up in SML */ 25949e33f0d5SDon Brace if (dev->was_removed) { 25959e33f0d5SDon Brace hpsa_cmd_resolve_and_free(h, cp); 25969e33f0d5SDon Brace return; 25979e33f0d5SDon Brace } 25989e33f0d5SDon Brace 2599d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2600d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2601d49c2077SDon Brace dev->removed) { 2602d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2603d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2604d49c2077SDon Brace } 2605d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 260603383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2607d49c2077SDon Brace } 260803383736SDon Brace 260925163bd5SWebb Scales /* 261025163bd5SWebb Scales * We check for lockup status here as it may be set for 261125163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 261225163bd5SWebb Scales * fail_all_oustanding_cmds() 261325163bd5SWebb Scales */ 261425163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 261525163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 261625163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 26178a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 261825163bd5SWebb Scales } 261925163bd5SWebb Scales 2620c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2621c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2622c349775eSScott Teel 26236aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 26248a0ff92cSWebb Scales if (ei->CommandStatus == 0) 26258a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 26266aa4c361SRobert Elliott 2627e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2628e1f7de0cSMatt Gates * CISS header used below for error handling. 2629e1f7de0cSMatt Gates */ 2630e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2631e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 26322b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 26332b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 26342b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 26352b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 263650a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2637e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2638e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2639283b4a9bSStephen M. Cameron 2640283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2641283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2642283b4a9bSStephen M. Cameron * wrong. 2643283b4a9bSStephen M. Cameron */ 2644f3f01730SKevin Barnett if (is_logical_device(dev)) { 2645283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2646283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 26478a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2648283b4a9bSStephen M. Cameron } 2649e1f7de0cSMatt Gates } 2650e1f7de0cSMatt Gates 2651edd16368SStephen M. Cameron /* an error has occurred */ 2652edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2653edd16368SStephen M. Cameron 2654edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 26559437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 26569437ac43SStephen Cameron /* copy the sense data */ 26579437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 26589437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 26599437ac43SStephen Cameron else 26609437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26619437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26629437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26639437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26649437ac43SStephen Cameron if (ei->ScsiStatus) 26659437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26669437ac43SStephen Cameron &sense_key, &asc, &ascq); 2667edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 266849ea45cbSDon Brace switch (sense_key) { 266949ea45cbSDon Brace case ABORTED_COMMAND: 26702e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26711d3b3609SMatt Gates break; 267249ea45cbSDon Brace case UNIT_ATTENTION: 267349ea45cbSDon Brace if (asc == 0x3F && ascq == 0x0E) 267449ea45cbSDon Brace h->drv_req_rescan = 1; 267549ea45cbSDon Brace break; 267649ea45cbSDon Brace case ILLEGAL_REQUEST: 267749ea45cbSDon Brace if (asc == 0x25 && ascq == 0x00) { 267849ea45cbSDon Brace dev->removed = 1; 267949ea45cbSDon Brace cmd->result = DID_NO_CONNECT << 16; 268049ea45cbSDon Brace } 268149ea45cbSDon Brace break; 26821d3b3609SMatt Gates } 2683edd16368SStephen M. Cameron break; 2684edd16368SStephen M. Cameron } 2685edd16368SStephen M. Cameron /* Problem was not a check condition 2686edd16368SStephen M. Cameron * Pass it up to the upper layers... 2687edd16368SStephen M. Cameron */ 2688edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2689edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2690edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2691edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2692edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2693edd16368SStephen M. Cameron sense_key, asc, ascq, 2694edd16368SStephen M. Cameron cmd->result); 2695edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2696edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2697edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2698edd16368SStephen M. Cameron 2699edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2700edd16368SStephen M. Cameron * but there is a bug in some released firmware 2701edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2702edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2703edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2704edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2705edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2706edd16368SStephen M. Cameron * look like selection timeout since that is 2707edd16368SStephen M. Cameron * the most common reason for this to occur, 2708edd16368SStephen M. Cameron * and it's severe enough. 2709edd16368SStephen M. Cameron */ 2710edd16368SStephen M. Cameron 2711edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2712edd16368SStephen M. Cameron } 2713edd16368SStephen M. Cameron break; 2714edd16368SStephen M. Cameron 2715edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2716edd16368SStephen M. Cameron break; 2717edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2718f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2719f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2720edd16368SStephen M. Cameron break; 2721edd16368SStephen M. Cameron case CMD_INVALID: { 2722edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2723edd16368SStephen M. Cameron print_cmd(cp); */ 2724edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2725edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2726edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2727edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2728edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2729edd16368SStephen M. Cameron * missing target. */ 2730edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2731edd16368SStephen M. Cameron } 2732edd16368SStephen M. Cameron break; 2733edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2734256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2735f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2736f42e81e1SStephen Cameron cp->Request.CDB); 2737edd16368SStephen M. Cameron break; 2738edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2739edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2740f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2741f42e81e1SStephen Cameron cp->Request.CDB); 2742edd16368SStephen M. Cameron break; 2743edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2744edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2745f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2746f42e81e1SStephen Cameron cp->Request.CDB); 2747edd16368SStephen M. Cameron break; 2748edd16368SStephen M. Cameron case CMD_ABORTED: 274908ec46f6SDon Brace cmd->result = DID_ABORT << 16; 275008ec46f6SDon Brace break; 2751edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2752edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2753f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2754f42e81e1SStephen Cameron cp->Request.CDB); 2755edd16368SStephen M. Cameron break; 2756edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2757f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2758f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2759f42e81e1SStephen Cameron cp->Request.CDB); 2760edd16368SStephen M. Cameron break; 2761edd16368SStephen M. Cameron case CMD_TIMEOUT: 2762edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2763f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2764f42e81e1SStephen Cameron cp->Request.CDB); 2765edd16368SStephen M. Cameron break; 27661d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 27671d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 27681d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 27691d5e2ed0SStephen M. Cameron break; 27709437ac43SStephen Cameron case CMD_TMF_STATUS: 27719437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27729437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27739437ac43SStephen Cameron break; 2774283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2775283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2776283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2777283b4a9bSStephen M. Cameron */ 2778283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2779283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2780283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2781283b4a9bSStephen M. Cameron break; 2782edd16368SStephen M. Cameron default: 2783edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2784edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2785edd16368SStephen M. Cameron cp, ei->CommandStatus); 2786edd16368SStephen M. Cameron } 27878a0ff92cSWebb Scales 27888a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2789edd16368SStephen M. Cameron } 2790edd16368SStephen M. Cameron 27918bc8f47eSChristoph Hellwig static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 27928bc8f47eSChristoph Hellwig int sg_used, enum dma_data_direction data_direction) 2793edd16368SStephen M. Cameron { 2794edd16368SStephen M. Cameron int i; 2795edd16368SStephen M. Cameron 279650a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 27978bc8f47eSChristoph Hellwig dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 279850a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2799edd16368SStephen M. Cameron data_direction); 2800edd16368SStephen M. Cameron } 2801edd16368SStephen M. Cameron 2802a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2803edd16368SStephen M. Cameron struct CommandList *cp, 2804edd16368SStephen M. Cameron unsigned char *buf, 2805edd16368SStephen M. Cameron size_t buflen, 28068bc8f47eSChristoph Hellwig enum dma_data_direction data_direction) 2807edd16368SStephen M. Cameron { 280801a02ffcSStephen M. Cameron u64 addr64; 2809edd16368SStephen M. Cameron 28108bc8f47eSChristoph Hellwig if (buflen == 0 || data_direction == DMA_NONE) { 2811edd16368SStephen M. Cameron cp->Header.SGList = 0; 281250a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2813a2dac136SStephen M. Cameron return 0; 2814edd16368SStephen M. Cameron } 2815edd16368SStephen M. Cameron 28168bc8f47eSChristoph Hellwig addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2817eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2818a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2819eceaae18SShuah Khan cp->Header.SGList = 0; 282050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2821a2dac136SStephen M. Cameron return -1; 2822eceaae18SShuah Khan } 282350a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 282450a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 282550a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 282650a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 282750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2828a2dac136SStephen M. Cameron return 0; 2829edd16368SStephen M. Cameron } 2830edd16368SStephen M. Cameron 283125163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 283225163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 283325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 283425163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2835edd16368SStephen M. Cameron { 2836edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2837edd16368SStephen M. Cameron 2838edd16368SStephen M. Cameron c->waiting = &wait; 283925163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 284025163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 284125163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 284225163bd5SWebb Scales wait_for_completion_io(&wait); 284325163bd5SWebb Scales return IO_OK; 284425163bd5SWebb Scales } 284525163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 284625163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 284725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 284825163bd5SWebb Scales return -ETIMEDOUT; 284925163bd5SWebb Scales } 285025163bd5SWebb Scales return IO_OK; 285125163bd5SWebb Scales } 285225163bd5SWebb Scales 285325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 285425163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 285525163bd5SWebb Scales { 285625163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 285725163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 285825163bd5SWebb Scales return IO_OK; 285925163bd5SWebb Scales } 286025163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2861edd16368SStephen M. Cameron } 2862edd16368SStephen M. Cameron 2863094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2864094963daSStephen M. Cameron { 2865094963daSStephen M. Cameron int cpu; 2866094963daSStephen M. Cameron u32 rc, *lockup_detected; 2867094963daSStephen M. Cameron 2868094963daSStephen M. Cameron cpu = get_cpu(); 2869094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2870094963daSStephen M. Cameron rc = *lockup_detected; 2871094963daSStephen M. Cameron put_cpu(); 2872094963daSStephen M. Cameron return rc; 2873094963daSStephen M. Cameron } 2874094963daSStephen M. Cameron 28759c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 287625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 28778bc8f47eSChristoph Hellwig struct CommandList *c, enum dma_data_direction data_direction, 28788bc8f47eSChristoph Hellwig unsigned long timeout_msecs) 2879edd16368SStephen M. Cameron { 28809c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 288125163bd5SWebb Scales int rc; 2882edd16368SStephen M. Cameron 2883edd16368SStephen M. Cameron do { 28847630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 288525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 288625163bd5SWebb Scales timeout_msecs); 288725163bd5SWebb Scales if (rc) 288825163bd5SWebb Scales break; 2889edd16368SStephen M. Cameron retry_count++; 28909c2fc160SStephen M. Cameron if (retry_count > 3) { 28919c2fc160SStephen M. Cameron msleep(backoff_time); 28929c2fc160SStephen M. Cameron if (backoff_time < 1000) 28939c2fc160SStephen M. Cameron backoff_time *= 2; 28949c2fc160SStephen M. Cameron } 2895852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28969c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28979c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2898edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 289925163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 290025163bd5SWebb Scales rc = -EIO; 290125163bd5SWebb Scales return rc; 2902edd16368SStephen M. Cameron } 2903edd16368SStephen M. Cameron 2904d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2905d1e8beacSStephen M. Cameron struct CommandList *c) 2906edd16368SStephen M. Cameron { 2907d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2908d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2909edd16368SStephen M. Cameron 2910609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2911609a70dfSRasmus Villemoes txt, lun, cdb); 2912d1e8beacSStephen M. Cameron } 2913d1e8beacSStephen M. Cameron 2914d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2915d1e8beacSStephen M. Cameron struct CommandList *cp) 2916d1e8beacSStephen M. Cameron { 2917d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2918d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 29199437ac43SStephen Cameron u8 sense_key, asc, ascq; 29209437ac43SStephen Cameron int sense_len; 2921d1e8beacSStephen M. Cameron 2922edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2923edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 29249437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 29259437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 29269437ac43SStephen Cameron else 29279437ac43SStephen Cameron sense_len = ei->SenseLen; 29289437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 29299437ac43SStephen Cameron &sense_key, &asc, &ascq); 2930d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2931d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 29329437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 29339437ac43SStephen Cameron sense_key, asc, ascq); 2934d1e8beacSStephen M. Cameron else 29359437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2936edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2937edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2938edd16368SStephen M. Cameron "(probably indicates selection timeout " 2939edd16368SStephen M. Cameron "reported incorrectly due to a known " 2940edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2941edd16368SStephen M. Cameron break; 2942edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2943edd16368SStephen M. Cameron break; 2944edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2945d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2946edd16368SStephen M. Cameron break; 2947edd16368SStephen M. Cameron case CMD_INVALID: { 2948edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2949edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2950edd16368SStephen M. Cameron */ 2951d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2952d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2953edd16368SStephen M. Cameron } 2954edd16368SStephen M. Cameron break; 2955edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2956d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2957edd16368SStephen M. Cameron break; 2958edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2959d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2960edd16368SStephen M. Cameron break; 2961edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2962d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2963edd16368SStephen M. Cameron break; 2964edd16368SStephen M. Cameron case CMD_ABORTED: 2965d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2966edd16368SStephen M. Cameron break; 2967edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2968d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2969edd16368SStephen M. Cameron break; 2970edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2971d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2972edd16368SStephen M. Cameron break; 2973edd16368SStephen M. Cameron case CMD_TIMEOUT: 2974d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2975edd16368SStephen M. Cameron break; 29761d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2977d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29781d5e2ed0SStephen M. Cameron break; 297925163bd5SWebb Scales case CMD_CTLR_LOCKUP: 298025163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 298125163bd5SWebb Scales break; 2982edd16368SStephen M. Cameron default: 2983d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2984d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2985edd16368SStephen M. Cameron ei->CommandStatus); 2986edd16368SStephen M. Cameron } 2987edd16368SStephen M. Cameron } 2988edd16368SStephen M. Cameron 29890a7c3bb8SDon Brace static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 29900a7c3bb8SDon Brace u8 page, u8 *buf, size_t bufsize) 29910a7c3bb8SDon Brace { 29920a7c3bb8SDon Brace int rc = IO_OK; 29930a7c3bb8SDon Brace struct CommandList *c; 29940a7c3bb8SDon Brace struct ErrorInfo *ei; 29950a7c3bb8SDon Brace 29960a7c3bb8SDon Brace c = cmd_alloc(h); 29970a7c3bb8SDon Brace if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 29980a7c3bb8SDon Brace page, scsi3addr, TYPE_CMD)) { 29990a7c3bb8SDon Brace rc = -1; 30000a7c3bb8SDon Brace goto out; 30010a7c3bb8SDon Brace } 30028bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 30038bc8f47eSChristoph Hellwig NO_TIMEOUT); 30040a7c3bb8SDon Brace if (rc) 30050a7c3bb8SDon Brace goto out; 30060a7c3bb8SDon Brace ei = c->err_info; 30070a7c3bb8SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 30080a7c3bb8SDon Brace hpsa_scsi_interpret_error(h, c); 30090a7c3bb8SDon Brace rc = -1; 30100a7c3bb8SDon Brace } 30110a7c3bb8SDon Brace out: 30120a7c3bb8SDon Brace cmd_free(h, c); 30130a7c3bb8SDon Brace return rc; 30140a7c3bb8SDon Brace } 30150a7c3bb8SDon Brace 30160a7c3bb8SDon Brace static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 30170a7c3bb8SDon Brace u8 *scsi3addr) 30180a7c3bb8SDon Brace { 30190a7c3bb8SDon Brace u8 *buf; 30200a7c3bb8SDon Brace u64 sa = 0; 30210a7c3bb8SDon Brace int rc = 0; 30220a7c3bb8SDon Brace 30230a7c3bb8SDon Brace buf = kzalloc(1024, GFP_KERNEL); 30240a7c3bb8SDon Brace if (!buf) 30250a7c3bb8SDon Brace return 0; 30260a7c3bb8SDon Brace 30270a7c3bb8SDon Brace rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 30280a7c3bb8SDon Brace buf, 1024); 30290a7c3bb8SDon Brace 30300a7c3bb8SDon Brace if (rc) 30310a7c3bb8SDon Brace goto out; 30320a7c3bb8SDon Brace 30330a7c3bb8SDon Brace sa = get_unaligned_be64(buf+12); 30340a7c3bb8SDon Brace 30350a7c3bb8SDon Brace out: 30360a7c3bb8SDon Brace kfree(buf); 30370a7c3bb8SDon Brace return sa; 30380a7c3bb8SDon Brace } 30390a7c3bb8SDon Brace 3040edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3041b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 3042edd16368SStephen M. Cameron unsigned char bufsize) 3043edd16368SStephen M. Cameron { 3044edd16368SStephen M. Cameron int rc = IO_OK; 3045edd16368SStephen M. Cameron struct CommandList *c; 3046edd16368SStephen M. Cameron struct ErrorInfo *ei; 3047edd16368SStephen M. Cameron 304845fcb86eSStephen Cameron c = cmd_alloc(h); 3049edd16368SStephen M. Cameron 3050a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3051a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 3052a2dac136SStephen M. Cameron rc = -1; 3053a2dac136SStephen M. Cameron goto out; 3054a2dac136SStephen M. Cameron } 30558bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 30568bc8f47eSChristoph Hellwig NO_TIMEOUT); 305725163bd5SWebb Scales if (rc) 305825163bd5SWebb Scales goto out; 3059edd16368SStephen M. Cameron ei = c->err_info; 3060edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3061d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3062edd16368SStephen M. Cameron rc = -1; 3063edd16368SStephen M. Cameron } 3064a2dac136SStephen M. Cameron out: 306545fcb86eSStephen Cameron cmd_free(h, c); 3066edd16368SStephen M. Cameron return rc; 3067edd16368SStephen M. Cameron } 3068edd16368SStephen M. Cameron 3069c5dfd106SDon Brace static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 307025163bd5SWebb Scales u8 reset_type, int reply_queue) 3071edd16368SStephen M. Cameron { 3072edd16368SStephen M. Cameron int rc = IO_OK; 3073edd16368SStephen M. Cameron struct CommandList *c; 3074edd16368SStephen M. Cameron struct ErrorInfo *ei; 3075edd16368SStephen M. Cameron 307645fcb86eSStephen Cameron c = cmd_alloc(h); 3077c5dfd106SDon Brace c->device = dev; 3078edd16368SStephen M. Cameron 3079a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 3080c5dfd106SDon Brace (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG); 30812ef28849SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 308225163bd5SWebb Scales if (rc) { 308325163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 308425163bd5SWebb Scales goto out; 308525163bd5SWebb Scales } 3086edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 3087edd16368SStephen M. Cameron 3088edd16368SStephen M. Cameron ei = c->err_info; 3089edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 3090d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3091edd16368SStephen M. Cameron rc = -1; 3092edd16368SStephen M. Cameron } 309325163bd5SWebb Scales out: 309445fcb86eSStephen Cameron cmd_free(h, c); 3095edd16368SStephen M. Cameron return rc; 3096edd16368SStephen M. Cameron } 3097edd16368SStephen M. Cameron 3098d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3099d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 3100d604f533SWebb Scales unsigned char *scsi3addr) 3101d604f533SWebb Scales { 3102d604f533SWebb Scales int i; 3103d604f533SWebb Scales bool match = false; 3104d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3105d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3106d604f533SWebb Scales 3107d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 3108d604f533SWebb Scales return false; 3109d604f533SWebb Scales 3110d604f533SWebb Scales switch (c->cmd_type) { 3111d604f533SWebb Scales case CMD_SCSI: 3112d604f533SWebb Scales case CMD_IOCTL_PEND: 3113d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3114d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 3115d604f533SWebb Scales break; 3116d604f533SWebb Scales 3117d604f533SWebb Scales case CMD_IOACCEL1: 3118d604f533SWebb Scales case CMD_IOACCEL2: 3119d604f533SWebb Scales if (c->phys_disk == dev) { 3120d604f533SWebb Scales /* HBA mode match */ 3121d604f533SWebb Scales match = true; 3122d604f533SWebb Scales } else { 3123d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3124d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3125d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3126d604f533SWebb Scales * instead. */ 3127d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3128d604f533SWebb Scales /* FIXME: an alternate test might be 3129d604f533SWebb Scales * 3130d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3131d604f533SWebb Scales * == c2->scsi_nexus; */ 3132d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3133d604f533SWebb Scales } 3134d604f533SWebb Scales } 3135d604f533SWebb Scales break; 3136d604f533SWebb Scales 3137d604f533SWebb Scales case IOACCEL2_TMF: 3138d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3139d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3140d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3141d604f533SWebb Scales } 3142d604f533SWebb Scales break; 3143d604f533SWebb Scales 3144d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3145d604f533SWebb Scales match = false; 3146d604f533SWebb Scales break; 3147d604f533SWebb Scales 3148d604f533SWebb Scales default: 3149d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3150d604f533SWebb Scales c->cmd_type); 3151d604f533SWebb Scales BUG(); 3152d604f533SWebb Scales } 3153d604f533SWebb Scales 3154d604f533SWebb Scales return match; 3155d604f533SWebb Scales } 3156d604f533SWebb Scales 3157d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3158c5dfd106SDon Brace u8 reset_type, int reply_queue) 3159d604f533SWebb Scales { 3160d604f533SWebb Scales int rc = 0; 3161d604f533SWebb Scales 3162d604f533SWebb Scales /* We can really only handle one reset at a time */ 3163d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3164d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3165d604f533SWebb Scales return -EINTR; 3166d604f533SWebb Scales } 3167d604f533SWebb Scales 3168c5dfd106SDon Brace rc = hpsa_send_reset(h, dev, reset_type, reply_queue); 3169c5dfd106SDon Brace if (!rc) { 3170c5dfd106SDon Brace /* incremented by sending the reset request */ 3171c5dfd106SDon Brace atomic_dec(&dev->commands_outstanding); 3172d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3173c5dfd106SDon Brace atomic_read(&dev->commands_outstanding) <= 0 || 3174d604f533SWebb Scales lockup_detected(h)); 3175c5dfd106SDon Brace } 3176d604f533SWebb Scales 3177d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3178d604f533SWebb Scales dev_warn(&h->pdev->dev, 3179d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3180d604f533SWebb Scales rc = -ENODEV; 3181d604f533SWebb Scales } 3182d604f533SWebb Scales 3183c5dfd106SDon Brace if (!rc) 3184c5dfd106SDon Brace rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0); 3185d604f533SWebb Scales 3186d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3187d604f533SWebb Scales return rc; 3188d604f533SWebb Scales } 3189d604f533SWebb Scales 3190edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3191edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3192edd16368SStephen M. Cameron { 3193edd16368SStephen M. Cameron int rc; 3194edd16368SStephen M. Cameron unsigned char *buf; 3195edd16368SStephen M. Cameron 3196edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3197edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3198edd16368SStephen M. Cameron if (!buf) 3199edd16368SStephen M. Cameron return; 32008383278dSScott Teel 32018383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 32028383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 32038383278dSScott Teel goto exit; 32048383278dSScott Teel 32058383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 32068383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 32078383278dSScott Teel 3208edd16368SStephen M. Cameron if (rc == 0) 3209edd16368SStephen M. Cameron *raid_level = buf[8]; 3210edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3211edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 32128383278dSScott Teel exit: 3213edd16368SStephen M. Cameron kfree(buf); 3214edd16368SStephen M. Cameron return; 3215edd16368SStephen M. Cameron } 3216edd16368SStephen M. Cameron 3217283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3218283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3219283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3220283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3221283b4a9bSStephen M. Cameron { 3222283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3223283b4a9bSStephen M. Cameron int map, row, col; 3224283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3225283b4a9bSStephen M. Cameron 3226283b4a9bSStephen M. Cameron if (rc != 0) 3227283b4a9bSStephen M. Cameron return; 3228283b4a9bSStephen M. Cameron 32292ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 32302ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 32312ba8bfc8SStephen M. Cameron return; 32322ba8bfc8SStephen M. Cameron 3233283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3234283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3235283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3236283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3237283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3238283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3239283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3240283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3241283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3242283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3243283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3244283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3245283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3246283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3247283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3248283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3249283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3250283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3251283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3252283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3253283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3254283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3255283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3256283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 32572b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3258dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 3259ba82d91bSColin Ian King dev_info(&h->pdev->dev, "encryption = %s\n", 32602b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 32612b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3262dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3263dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3264283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3265283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3266283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3267283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3268283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3269283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3270283b4a9bSStephen M. Cameron disks_per_row = 3271283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3272283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3273283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3274283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3275283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3276283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3277283b4a9bSStephen M. Cameron disks_per_row = 3278283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3279283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3280283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3281283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3282283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3283283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3284283b4a9bSStephen M. Cameron } 3285283b4a9bSStephen M. Cameron } 3286283b4a9bSStephen M. Cameron } 3287283b4a9bSStephen M. Cameron #else 3288283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3289283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3290283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3291283b4a9bSStephen M. Cameron { 3292283b4a9bSStephen M. Cameron } 3293283b4a9bSStephen M. Cameron #endif 3294283b4a9bSStephen M. Cameron 3295283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3296283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3297283b4a9bSStephen M. Cameron { 3298283b4a9bSStephen M. Cameron int rc = 0; 3299283b4a9bSStephen M. Cameron struct CommandList *c; 3300283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3301283b4a9bSStephen M. Cameron 330245fcb86eSStephen Cameron c = cmd_alloc(h); 3303bf43caf3SRobert Elliott 3304283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3305283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3306283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 33072dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 33082dd02d74SRobert Elliott cmd_free(h, c); 33092dd02d74SRobert Elliott return -1; 3310283b4a9bSStephen M. Cameron } 33118bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 33128bc8f47eSChristoph Hellwig NO_TIMEOUT); 331325163bd5SWebb Scales if (rc) 331425163bd5SWebb Scales goto out; 3315283b4a9bSStephen M. Cameron ei = c->err_info; 3316283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3317d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 331825163bd5SWebb Scales rc = -1; 331925163bd5SWebb Scales goto out; 3320283b4a9bSStephen M. Cameron } 332145fcb86eSStephen Cameron cmd_free(h, c); 3322283b4a9bSStephen M. Cameron 3323283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3324283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3325283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3326283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3327283b4a9bSStephen M. Cameron rc = -1; 3328283b4a9bSStephen M. Cameron } 3329283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3330283b4a9bSStephen M. Cameron return rc; 333125163bd5SWebb Scales out: 333225163bd5SWebb Scales cmd_free(h, c); 333325163bd5SWebb Scales return rc; 3334283b4a9bSStephen M. Cameron } 3335283b4a9bSStephen M. Cameron 3336d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3337d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3338d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3339d04e62b9SKevin Barnett { 3340d04e62b9SKevin Barnett int rc = IO_OK; 3341d04e62b9SKevin Barnett struct CommandList *c; 3342d04e62b9SKevin Barnett struct ErrorInfo *ei; 3343d04e62b9SKevin Barnett 3344d04e62b9SKevin Barnett c = cmd_alloc(h); 3345d04e62b9SKevin Barnett 3346d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3347d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3348d04e62b9SKevin Barnett if (rc) 3349d04e62b9SKevin Barnett goto out; 3350d04e62b9SKevin Barnett 3351d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3352d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3353d04e62b9SKevin Barnett 33548bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 33558bc8f47eSChristoph Hellwig NO_TIMEOUT); 3356d04e62b9SKevin Barnett if (rc) 3357d04e62b9SKevin Barnett goto out; 3358d04e62b9SKevin Barnett ei = c->err_info; 3359d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3360d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3361d04e62b9SKevin Barnett rc = -1; 3362d04e62b9SKevin Barnett } 3363d04e62b9SKevin Barnett out: 3364d04e62b9SKevin Barnett cmd_free(h, c); 3365d04e62b9SKevin Barnett return rc; 3366d04e62b9SKevin Barnett } 3367d04e62b9SKevin Barnett 336866749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 336966749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 337066749d0dSScott Teel { 337166749d0dSScott Teel int rc = IO_OK; 337266749d0dSScott Teel struct CommandList *c; 337366749d0dSScott Teel struct ErrorInfo *ei; 337466749d0dSScott Teel 337566749d0dSScott Teel c = cmd_alloc(h); 337666749d0dSScott Teel 337766749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 337866749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 337966749d0dSScott Teel if (rc) 338066749d0dSScott Teel goto out; 338166749d0dSScott Teel 33828bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 33838bc8f47eSChristoph Hellwig NO_TIMEOUT); 338466749d0dSScott Teel if (rc) 338566749d0dSScott Teel goto out; 338666749d0dSScott Teel ei = c->err_info; 338766749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 338866749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 338966749d0dSScott Teel rc = -1; 339066749d0dSScott Teel } 339166749d0dSScott Teel out: 339266749d0dSScott Teel cmd_free(h, c); 339366749d0dSScott Teel return rc; 339466749d0dSScott Teel } 339566749d0dSScott Teel 339603383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 339703383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 339803383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 339903383736SDon Brace { 340003383736SDon Brace int rc = IO_OK; 340103383736SDon Brace struct CommandList *c; 340203383736SDon Brace struct ErrorInfo *ei; 340303383736SDon Brace 340403383736SDon Brace c = cmd_alloc(h); 340503383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 340603383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 340703383736SDon Brace if (rc) 340803383736SDon Brace goto out; 340903383736SDon Brace 341003383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 341103383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 341203383736SDon Brace 34138bc8f47eSChristoph Hellwig hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 34143026ff9bSDon Brace NO_TIMEOUT); 341503383736SDon Brace ei = c->err_info; 341603383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 341703383736SDon Brace hpsa_scsi_interpret_error(h, c); 341803383736SDon Brace rc = -1; 341903383736SDon Brace } 342003383736SDon Brace out: 342103383736SDon Brace cmd_free(h, c); 3422d04e62b9SKevin Barnett 342303383736SDon Brace return rc; 342403383736SDon Brace } 342503383736SDon Brace 3426cca8f13bSDon Brace /* 3427cca8f13bSDon Brace * get enclosure information 3428cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3429cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3430cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3431cca8f13bSDon Brace */ 3432cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3433cca8f13bSDon Brace unsigned char *scsi3addr, 3434cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3435cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3436cca8f13bSDon Brace { 3437cca8f13bSDon Brace int rc = -1; 3438cca8f13bSDon Brace struct CommandList *c = NULL; 3439cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3440cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3441cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3442cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3443cca8f13bSDon Brace u16 bmic_device_index = 0; 3444cca8f13bSDon Brace 344501d0e789SDon Brace encl_dev->eli = 34460a7c3bb8SDon Brace hpsa_get_enclosure_logical_identifier(h, scsi3addr); 34470a7c3bb8SDon Brace 344801d0e789SDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 344901d0e789SDon Brace 34505ac517b8SDon Brace if (encl_dev->target == -1 || encl_dev->lun == -1) { 34515ac517b8SDon Brace rc = IO_OK; 34525ac517b8SDon Brace goto out; 34535ac517b8SDon Brace } 34545ac517b8SDon Brace 345517a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 345617a9e54aSDon Brace rc = IO_OK; 3457cca8f13bSDon Brace goto out; 345817a9e54aSDon Brace } 3459cca8f13bSDon Brace 3460cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3461cca8f13bSDon Brace if (!bssbp) 3462cca8f13bSDon Brace goto out; 3463cca8f13bSDon Brace 3464cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3465cca8f13bSDon Brace if (!id_phys) 3466cca8f13bSDon Brace goto out; 3467cca8f13bSDon Brace 3468cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3469cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3470cca8f13bSDon Brace if (rc) { 3471cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3472cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3473cca8f13bSDon Brace goto out; 3474cca8f13bSDon Brace } 3475cca8f13bSDon Brace 3476cca8f13bSDon Brace c = cmd_alloc(h); 3477cca8f13bSDon Brace 3478cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3479cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3480cca8f13bSDon Brace 3481cca8f13bSDon Brace if (rc) 3482cca8f13bSDon Brace goto out; 3483cca8f13bSDon Brace 3484cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3485cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3486cca8f13bSDon Brace else 3487cca8f13bSDon Brace c->Request.CDB[5] = 0; 3488cca8f13bSDon Brace 34898bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 34903026ff9bSDon Brace NO_TIMEOUT); 3491cca8f13bSDon Brace if (rc) 3492cca8f13bSDon Brace goto out; 3493cca8f13bSDon Brace 3494cca8f13bSDon Brace ei = c->err_info; 3495cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3496cca8f13bSDon Brace rc = -1; 3497cca8f13bSDon Brace goto out; 3498cca8f13bSDon Brace } 3499cca8f13bSDon Brace 3500cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3501cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3502cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3503cca8f13bSDon Brace 3504cca8f13bSDon Brace rc = IO_OK; 3505cca8f13bSDon Brace out: 3506cca8f13bSDon Brace kfree(bssbp); 3507cca8f13bSDon Brace kfree(id_phys); 3508cca8f13bSDon Brace 3509cca8f13bSDon Brace if (c) 3510cca8f13bSDon Brace cmd_free(h, c); 3511cca8f13bSDon Brace 3512cca8f13bSDon Brace if (rc != IO_OK) 3513cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3514b4e9ce1cSJulia Lawall "Error, could not get enclosure information"); 3515cca8f13bSDon Brace } 3516cca8f13bSDon Brace 3517d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3518d04e62b9SKevin Barnett unsigned char *scsi3addr) 3519d04e62b9SKevin Barnett { 3520d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3521d04e62b9SKevin Barnett u32 nphysicals; 3522d04e62b9SKevin Barnett u64 sa = 0; 3523d04e62b9SKevin Barnett int i; 3524d04e62b9SKevin Barnett 3525d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3526d04e62b9SKevin Barnett if (!physdev) 3527d04e62b9SKevin Barnett return 0; 3528d04e62b9SKevin Barnett 3529d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3530d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3531d04e62b9SKevin Barnett kfree(physdev); 3532d04e62b9SKevin Barnett return 0; 3533d04e62b9SKevin Barnett } 3534d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3535d04e62b9SKevin Barnett 3536d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3537d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3538d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3539d04e62b9SKevin Barnett break; 3540d04e62b9SKevin Barnett } 3541d04e62b9SKevin Barnett 3542d04e62b9SKevin Barnett kfree(physdev); 3543d04e62b9SKevin Barnett 3544d04e62b9SKevin Barnett return sa; 3545d04e62b9SKevin Barnett } 3546d04e62b9SKevin Barnett 3547d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3548d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3549d04e62b9SKevin Barnett { 3550d04e62b9SKevin Barnett int rc; 3551d04e62b9SKevin Barnett u64 sa = 0; 3552d04e62b9SKevin Barnett 3553d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3554d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3555d04e62b9SKevin Barnett 3556d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 35577e8a9486SAmit Kushwaha if (!ssi) 3558d04e62b9SKevin Barnett return; 3559d04e62b9SKevin Barnett 3560d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3561d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3562d04e62b9SKevin Barnett if (rc == 0) { 3563d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3564d04e62b9SKevin Barnett h->sas_address = sa; 3565d04e62b9SKevin Barnett } 3566d04e62b9SKevin Barnett 3567d04e62b9SKevin Barnett kfree(ssi); 3568d04e62b9SKevin Barnett } else 3569d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3570d04e62b9SKevin Barnett 3571d04e62b9SKevin Barnett dev->sas_address = sa; 3572d04e62b9SKevin Barnett } 3573d04e62b9SKevin Barnett 35744e188184SBader Ali Saleh static void hpsa_ext_ctrl_present(struct ctlr_info *h, 35754e188184SBader Ali Saleh struct ReportExtendedLUNdata *physdev) 35764e188184SBader Ali Saleh { 35774e188184SBader Ali Saleh u32 nphysicals; 35784e188184SBader Ali Saleh int i; 35794e188184SBader Ali Saleh 35804e188184SBader Ali Saleh if (h->discovery_polling) 35814e188184SBader Ali Saleh return; 35824e188184SBader Ali Saleh 35834e188184SBader Ali Saleh nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 35844e188184SBader Ali Saleh 35854e188184SBader Ali Saleh for (i = 0; i < nphysicals; i++) { 35864e188184SBader Ali Saleh if (physdev->LUN[i].device_type == 35874e188184SBader Ali Saleh BMIC_DEVICE_TYPE_CONTROLLER 35884e188184SBader Ali Saleh && !is_hba_lunid(physdev->LUN[i].lunid)) { 35894e188184SBader Ali Saleh dev_info(&h->pdev->dev, 35904e188184SBader Ali Saleh "External controller present, activate discovery polling and disable rld caching\n"); 35914e188184SBader Ali Saleh hpsa_disable_rld_caching(h); 35924e188184SBader Ali Saleh h->discovery_polling = 1; 35934e188184SBader Ali Saleh break; 35944e188184SBader Ali Saleh } 35954e188184SBader Ali Saleh } 35964e188184SBader Ali Saleh } 35974e188184SBader Ali Saleh 3598d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 35998383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 36001b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 36011b70150aSStephen M. Cameron { 36021b70150aSStephen M. Cameron int rc; 36031b70150aSStephen M. Cameron int i; 36041b70150aSStephen M. Cameron int pages; 36051b70150aSStephen M. Cameron unsigned char *buf, bufsize; 36061b70150aSStephen M. Cameron 36071b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 36081b70150aSStephen M. Cameron if (!buf) 36098383278dSScott Teel return false; 36101b70150aSStephen M. Cameron 36111b70150aSStephen M. Cameron /* Get the size of the page list first */ 36121b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 36131b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 36141b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 36151b70150aSStephen M. Cameron if (rc != 0) 36161b70150aSStephen M. Cameron goto exit_unsupported; 36171b70150aSStephen M. Cameron pages = buf[3]; 36181b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 36191b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 36201b70150aSStephen M. Cameron else 36211b70150aSStephen M. Cameron bufsize = 255; 36221b70150aSStephen M. Cameron 36231b70150aSStephen M. Cameron /* Get the whole VPD page list */ 36241b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 36251b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 36261b70150aSStephen M. Cameron buf, bufsize); 36271b70150aSStephen M. Cameron if (rc != 0) 36281b70150aSStephen M. Cameron goto exit_unsupported; 36291b70150aSStephen M. Cameron 36301b70150aSStephen M. Cameron pages = buf[3]; 36311b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 36321b70150aSStephen M. Cameron if (buf[3 + i] == page) 36331b70150aSStephen M. Cameron goto exit_supported; 36341b70150aSStephen M. Cameron exit_unsupported: 36351b70150aSStephen M. Cameron kfree(buf); 36368383278dSScott Teel return false; 36371b70150aSStephen M. Cameron exit_supported: 36381b70150aSStephen M. Cameron kfree(buf); 36398383278dSScott Teel return true; 36401b70150aSStephen M. Cameron } 36411b70150aSStephen M. Cameron 3642b2582a65SDon Brace /* 3643b2582a65SDon Brace * Called during a scan operation. 3644b2582a65SDon Brace * Sets ioaccel status on the new device list, not the existing device list 3645b2582a65SDon Brace * 3646b2582a65SDon Brace * The device list used during I/O will be updated later in 3647b2582a65SDon Brace * adjust_hpsa_scsi_table. 3648b2582a65SDon Brace */ 3649283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3650283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3651283b4a9bSStephen M. Cameron { 3652283b4a9bSStephen M. Cameron int rc; 3653283b4a9bSStephen M. Cameron unsigned char *buf; 3654283b4a9bSStephen M. Cameron u8 ioaccel_status; 3655283b4a9bSStephen M. Cameron 3656283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3657283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 365841ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3659283b4a9bSStephen M. Cameron 3660283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3661283b4a9bSStephen M. Cameron if (!buf) 3662283b4a9bSStephen M. Cameron return; 36631b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 36641b70150aSStephen M. Cameron goto out; 3665283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3666b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3667283b4a9bSStephen M. Cameron if (rc != 0) 3668283b4a9bSStephen M. Cameron goto out; 3669283b4a9bSStephen M. Cameron 3670283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3671283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3672283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3673283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3674283b4a9bSStephen M. Cameron this_device->offload_config = 3675283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3676283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3677*3e16e83aSDon Brace bool offload_enabled = 3678283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3679*3e16e83aSDon Brace /* 3680*3e16e83aSDon Brace * Check to see if offload can be enabled. 3681*3e16e83aSDon Brace */ 3682*3e16e83aSDon Brace if (offload_enabled) { 3683*3e16e83aSDon Brace rc = hpsa_get_raid_map(h, scsi3addr, this_device); 3684*3e16e83aSDon Brace if (rc) /* could not load raid_map */ 3685*3e16e83aSDon Brace goto out; 3686*3e16e83aSDon Brace this_device->offload_to_be_enabled = 1; 3687*3e16e83aSDon Brace } 3688283b4a9bSStephen M. Cameron } 3689b2582a65SDon Brace 3690283b4a9bSStephen M. Cameron out: 3691283b4a9bSStephen M. Cameron kfree(buf); 3692283b4a9bSStephen M. Cameron return; 3693283b4a9bSStephen M. Cameron } 3694283b4a9bSStephen M. Cameron 3695edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3696edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 369775d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3698edd16368SStephen M. Cameron { 3699edd16368SStephen M. Cameron int rc; 3700edd16368SStephen M. Cameron unsigned char *buf; 3701edd16368SStephen M. Cameron 37028383278dSScott Teel /* Does controller have VPD for device id? */ 37038383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 37048383278dSScott Teel return 1; /* not supported */ 37058383278dSScott Teel 3706edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3707edd16368SStephen M. Cameron if (!buf) 3708a84d794dSStephen M. Cameron return -ENOMEM; 37098383278dSScott Teel 37108383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 37118383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 37128383278dSScott Teel if (rc == 0) { 37138383278dSScott Teel if (buflen > 16) 37148383278dSScott Teel buflen = 16; 37158383278dSScott Teel memcpy(device_id, &buf[8], buflen); 37168383278dSScott Teel } 371775d23d89SDon Brace 3718edd16368SStephen M. Cameron kfree(buf); 371975d23d89SDon Brace 37208383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3721edd16368SStephen M. Cameron } 3722edd16368SStephen M. Cameron 3723edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 372403383736SDon Brace void *buf, int bufsize, 3725edd16368SStephen M. Cameron int extended_response) 3726edd16368SStephen M. Cameron { 3727edd16368SStephen M. Cameron int rc = IO_OK; 3728edd16368SStephen M. Cameron struct CommandList *c; 3729edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3730edd16368SStephen M. Cameron struct ErrorInfo *ei; 3731edd16368SStephen M. Cameron 373245fcb86eSStephen Cameron c = cmd_alloc(h); 3733bf43caf3SRobert Elliott 3734e89c0ae7SStephen M. Cameron /* address the controller */ 3735e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3736a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3737a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 373845f769b2SHannes Reinecke rc = -EAGAIN; 3739a2dac136SStephen M. Cameron goto out; 3740a2dac136SStephen M. Cameron } 3741edd16368SStephen M. Cameron if (extended_response) 3742edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 37438bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 37448bc8f47eSChristoph Hellwig NO_TIMEOUT); 374525163bd5SWebb Scales if (rc) 374625163bd5SWebb Scales goto out; 3747edd16368SStephen M. Cameron ei = c->err_info; 3748edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3749edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3750d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 375145f769b2SHannes Reinecke rc = -EIO; 3752283b4a9bSStephen M. Cameron } else { 375303383736SDon Brace struct ReportLUNdata *rld = buf; 375403383736SDon Brace 375503383736SDon Brace if (rld->extended_response_flag != extended_response) { 375645f769b2SHannes Reinecke if (!h->legacy_board) { 3757283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3758283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3759283b4a9bSStephen M. Cameron extended_response, 376003383736SDon Brace rld->extended_response_flag); 376145f769b2SHannes Reinecke rc = -EINVAL; 376245f769b2SHannes Reinecke } else 376345f769b2SHannes Reinecke rc = -EOPNOTSUPP; 3764283b4a9bSStephen M. Cameron } 3765edd16368SStephen M. Cameron } 3766a2dac136SStephen M. Cameron out: 376745fcb86eSStephen Cameron cmd_free(h, c); 3768edd16368SStephen M. Cameron return rc; 3769edd16368SStephen M. Cameron } 3770edd16368SStephen M. Cameron 3771edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 377203383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3773edd16368SStephen M. Cameron { 37742a80d545SHannes Reinecke int rc; 37752a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 37762a80d545SHannes Reinecke 37772a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 377803383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 377945f769b2SHannes Reinecke if (!rc || rc != -EOPNOTSUPP) 37802a80d545SHannes Reinecke return rc; 37812a80d545SHannes Reinecke 37822a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 37832a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 37842a80d545SHannes Reinecke if (!lbuf) 37852a80d545SHannes Reinecke return -ENOMEM; 37862a80d545SHannes Reinecke 37872a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 37882a80d545SHannes Reinecke if (!rc) { 37892a80d545SHannes Reinecke int i; 37902a80d545SHannes Reinecke u32 nphys; 37912a80d545SHannes Reinecke 37922a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 37932a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 37942a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 37952a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 37962a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 37972a80d545SHannes Reinecke } 37982a80d545SHannes Reinecke kfree(lbuf); 37992a80d545SHannes Reinecke return rc; 3800edd16368SStephen M. Cameron } 3801edd16368SStephen M. Cameron 3802edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3803edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3804edd16368SStephen M. Cameron { 3805edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3806edd16368SStephen M. Cameron } 3807edd16368SStephen M. Cameron 3808edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3809edd16368SStephen M. Cameron int bus, int target, int lun) 3810edd16368SStephen M. Cameron { 3811edd16368SStephen M. Cameron device->bus = bus; 3812edd16368SStephen M. Cameron device->target = target; 3813edd16368SStephen M. Cameron device->lun = lun; 3814edd16368SStephen M. Cameron } 3815edd16368SStephen M. Cameron 38169846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 38179846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 38189846590eSStephen M. Cameron unsigned char scsi3addr[]) 38199846590eSStephen M. Cameron { 38209846590eSStephen M. Cameron int rc; 38219846590eSStephen M. Cameron int status; 38229846590eSStephen M. Cameron int size; 38239846590eSStephen M. Cameron unsigned char *buf; 38249846590eSStephen M. Cameron 38259846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 38269846590eSStephen M. Cameron if (!buf) 38279846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 38289846590eSStephen M. Cameron 38299846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 383024a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 38319846590eSStephen M. Cameron goto exit_failed; 38329846590eSStephen M. Cameron 38339846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 38349846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 38359846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 383624a4b078SStephen M. Cameron if (rc != 0) 38379846590eSStephen M. Cameron goto exit_failed; 38389846590eSStephen M. Cameron size = buf[3]; 38399846590eSStephen M. Cameron 38409846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 38419846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 38429846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 384324a4b078SStephen M. Cameron if (rc != 0) 38449846590eSStephen M. Cameron goto exit_failed; 38459846590eSStephen M. Cameron status = buf[4]; /* status byte */ 38469846590eSStephen M. Cameron 38479846590eSStephen M. Cameron kfree(buf); 38489846590eSStephen M. Cameron return status; 38499846590eSStephen M. Cameron exit_failed: 38509846590eSStephen M. Cameron kfree(buf); 38519846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 38529846590eSStephen M. Cameron } 38539846590eSStephen M. Cameron 38549846590eSStephen M. Cameron /* Determine offline status of a volume. 38559846590eSStephen M. Cameron * Return either: 38569846590eSStephen M. Cameron * 0 (not offline) 385767955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 38589846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 38599846590eSStephen M. Cameron * describing why a volume is to be kept offline) 38609846590eSStephen M. Cameron */ 386185b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h, 38629846590eSStephen M. Cameron unsigned char scsi3addr[]) 38639846590eSStephen M. Cameron { 38649846590eSStephen M. Cameron struct CommandList *c; 38659437ac43SStephen Cameron unsigned char *sense; 38669437ac43SStephen Cameron u8 sense_key, asc, ascq; 38679437ac43SStephen Cameron int sense_len; 386825163bd5SWebb Scales int rc, ldstat = 0; 38699846590eSStephen M. Cameron u16 cmd_status; 38709846590eSStephen M. Cameron u8 scsi_status; 38719846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 38729846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 38739846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 38749846590eSStephen M. Cameron 38759846590eSStephen M. Cameron c = cmd_alloc(h); 3876bf43caf3SRobert Elliott 38779846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3878c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 38793026ff9bSDon Brace NO_TIMEOUT); 388025163bd5SWebb Scales if (rc) { 388125163bd5SWebb Scales cmd_free(h, c); 388285b29008SDon Brace return HPSA_VPD_LV_STATUS_UNSUPPORTED; 388325163bd5SWebb Scales } 38849846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 38859437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 38869437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 38879437ac43SStephen Cameron else 38889437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 38899437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 38909846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 38919846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 38929846590eSStephen M. Cameron cmd_free(h, c); 38939846590eSStephen M. Cameron 38949846590eSStephen M. Cameron /* Determine the reason for not ready state */ 38959846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 38969846590eSStephen M. Cameron 38979846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 38989846590eSStephen M. Cameron switch (ldstat) { 389985b29008SDon Brace case HPSA_LV_FAILED: 39009846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 39015ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 39029846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 39039846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 39049846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 39059846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 39069846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 39079846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 39089846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 39099846590eSStephen M. Cameron return ldstat; 39109846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 39119846590eSStephen M. Cameron /* If VPD status page isn't available, 39129846590eSStephen M. Cameron * use ASC/ASCQ to determine state 39139846590eSStephen M. Cameron */ 39149846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 39159846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 39169846590eSStephen M. Cameron return ldstat; 39179846590eSStephen M. Cameron break; 39189846590eSStephen M. Cameron default: 39199846590eSStephen M. Cameron break; 39209846590eSStephen M. Cameron } 392185b29008SDon Brace return HPSA_LV_OK; 39229846590eSStephen M. Cameron } 39239846590eSStephen M. Cameron 3924edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 39250b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 39260b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3927edd16368SStephen M. Cameron { 39280b0e1d6cSStephen M. Cameron 39290b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 39300b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 39310b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 39320b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 39330b0e1d6cSStephen M. Cameron 3934ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 39350b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3936683fc444SDon Brace int rc = 0; 3937edd16368SStephen M. Cameron 3938ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3939683fc444SDon Brace if (!inq_buff) { 3940683fc444SDon Brace rc = -ENOMEM; 3941edd16368SStephen M. Cameron goto bail_out; 3942683fc444SDon Brace } 3943edd16368SStephen M. Cameron 3944edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3945edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3946edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3947edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 394885b29008SDon Brace "%s: inquiry failed, device will be skipped.\n", 394985b29008SDon Brace __func__); 395085b29008SDon Brace rc = HPSA_INQUIRY_FAILED; 3951edd16368SStephen M. Cameron goto bail_out; 3952edd16368SStephen M. Cameron } 3953edd16368SStephen M. Cameron 39544af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 39554af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 395675d23d89SDon Brace 3957edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3958edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3959edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3960edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3961edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3962edd16368SStephen M. Cameron sizeof(this_device->model)); 39637630b3a5SHannes Reinecke this_device->rev = inq_buff[2]; 3964edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3965edd16368SStephen M. Cameron sizeof(this_device->device_id)); 39668383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3967a45bcc4eSDon Brace sizeof(this_device->device_id)) < 0) { 39688383278dSScott Teel dev_err(&h->pdev->dev, 3969a45bcc4eSDon Brace "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n", 39708383278dSScott Teel h->ctlr, __func__, 39718383278dSScott Teel h->scsi_host->host_no, 3972a45bcc4eSDon Brace this_device->bus, this_device->target, 3973a45bcc4eSDon Brace this_device->lun, 39748383278dSScott Teel scsi_device_type(this_device->devtype), 39758383278dSScott Teel this_device->model); 3976a45bcc4eSDon Brace rc = HPSA_LV_FAILED; 3977a45bcc4eSDon Brace goto bail_out; 3978a45bcc4eSDon Brace } 3979edd16368SStephen M. Cameron 3980af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3981af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3982283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 398385b29008SDon Brace unsigned char volume_offline; 398467955ba3SStephen M. Cameron 3985edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3986283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3987283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 398867955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 39894d17944aSHannes Reinecke if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 39904d17944aSHannes Reinecke h->legacy_board) { 39914d17944aSHannes Reinecke /* 39924d17944aSHannes Reinecke * Legacy boards might not support volume status 39934d17944aSHannes Reinecke */ 39944d17944aSHannes Reinecke dev_info(&h->pdev->dev, 39954d17944aSHannes Reinecke "C0:T%d:L%d Volume status not available, assuming online.\n", 39964d17944aSHannes Reinecke this_device->target, this_device->lun); 39974d17944aSHannes Reinecke volume_offline = 0; 39984d17944aSHannes Reinecke } 3999eb94588dSTomas Henzl this_device->volume_offline = volume_offline; 400085b29008SDon Brace if (volume_offline == HPSA_LV_FAILED) { 400185b29008SDon Brace rc = HPSA_LV_FAILED; 400285b29008SDon Brace dev_err(&h->pdev->dev, 400385b29008SDon Brace "%s: LV failed, device will be skipped.\n", 400485b29008SDon Brace __func__); 400585b29008SDon Brace goto bail_out; 400685b29008SDon Brace } 4007283b4a9bSStephen M. Cameron } else { 4008edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 4009283b4a9bSStephen M. Cameron this_device->offload_config = 0; 4010*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(this_device); 4011a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 40129846590eSStephen M. Cameron this_device->volume_offline = 0; 401303383736SDon Brace this_device->queue_depth = h->nr_cmds; 4014283b4a9bSStephen M. Cameron } 4015edd16368SStephen M. Cameron 40165086435eSDon Brace if (this_device->external) 40175086435eSDon Brace this_device->queue_depth = EXTERNAL_QD; 40185086435eSDon Brace 40190b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 40200b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 40210b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 40220b0e1d6cSStephen M. Cameron */ 40230b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 40240b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 40250b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 40260b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 40270b0e1d6cSStephen M. Cameron } 4028edd16368SStephen M. Cameron kfree(inq_buff); 4029edd16368SStephen M. Cameron return 0; 4030edd16368SStephen M. Cameron 4031edd16368SStephen M. Cameron bail_out: 4032edd16368SStephen M. Cameron kfree(inq_buff); 4033683fc444SDon Brace return rc; 4034edd16368SStephen M. Cameron } 4035edd16368SStephen M. Cameron 4036c795505aSKevin Barnett /* 4037c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 4038edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 4039edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 4040edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4041edd16368SStephen M. Cameron */ 4042edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 40431f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4044edd16368SStephen M. Cameron { 4045c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 4046edd16368SStephen M. Cameron 40471f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 40481f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 40497630b3a5SHannes Reinecke if (is_hba_lunid(lunaddrbytes)) { 40507630b3a5SHannes Reinecke int bus = HPSA_HBA_BUS; 40517630b3a5SHannes Reinecke 40527630b3a5SHannes Reinecke if (!device->rev) 40537630b3a5SHannes Reinecke bus = HPSA_LEGACY_HBA_BUS; 4054c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 40557630b3a5SHannes Reinecke bus, 0, lunid & 0x3fff); 40567630b3a5SHannes Reinecke } else 40571f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 4058c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 4059c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 40601f310bdeSStephen M. Cameron return; 40611f310bdeSStephen M. Cameron } 40621f310bdeSStephen M. Cameron /* It's a logical device */ 406366749d0dSScott Teel if (device->external) { 40641f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 4065c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4066c795505aSKevin Barnett lunid & 0x00ff); 40671f310bdeSStephen M. Cameron return; 4068339b2b14SStephen M. Cameron } 4069c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4070c795505aSKevin Barnett 0, lunid & 0x3fff); 4071edd16368SStephen M. Cameron } 4072edd16368SStephen M. Cameron 407366749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 407466749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 407566749d0dSScott Teel { 407666749d0dSScott Teel /* In report logicals, local logicals are listed first, 407766749d0dSScott Teel * then any externals. 407866749d0dSScott Teel */ 407966749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 408066749d0dSScott Teel 408166749d0dSScott Teel if (i == raid_ctlr_position) 408266749d0dSScott Teel return 0; 408366749d0dSScott Teel 408466749d0dSScott Teel if (i < logicals_start) 408566749d0dSScott Teel return 0; 408666749d0dSScott Teel 408766749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 408866749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 408966749d0dSScott Teel return 0; 409066749d0dSScott Teel 409166749d0dSScott Teel return 1; /* it's an external lun */ 409266749d0dSScott Teel } 409366749d0dSScott Teel 409454b6e9e9SScott Teel /* 4095edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4096edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4097edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4098edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4099edd16368SStephen M. Cameron */ 4100edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 410103383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 410201a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4103edd16368SStephen M. Cameron { 410403383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4105edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4106edd16368SStephen M. Cameron return -1; 4107edd16368SStephen M. Cameron } 410803383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4109edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 411003383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 411103383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4112edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4113edd16368SStephen M. Cameron } 411403383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4115edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4116edd16368SStephen M. Cameron return -1; 4117edd16368SStephen M. Cameron } 41186df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4119edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4120edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4121edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4122edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4123edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4124edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4125edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4126edd16368SStephen M. Cameron } 4127edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4128edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4129edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4130edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4131edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4132edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4133edd16368SStephen M. Cameron } 4134edd16368SStephen M. Cameron return 0; 4135edd16368SStephen M. Cameron } 4136edd16368SStephen M. Cameron 413742a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 413842a91641SDon Brace int i, int nphysicals, int nlogicals, 4139a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4140339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4141339b2b14SStephen M. Cameron { 4142339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4143339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4144339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4145339b2b14SStephen M. Cameron */ 4146339b2b14SStephen M. Cameron 4147339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4148339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4149339b2b14SStephen M. Cameron 4150339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4151339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4152339b2b14SStephen M. Cameron 4153339b2b14SStephen M. Cameron if (i < logicals_start) 4154d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4155d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4156339b2b14SStephen M. Cameron 4157339b2b14SStephen M. Cameron if (i < last_device) 4158339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4159339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4160339b2b14SStephen M. Cameron BUG(); 4161339b2b14SStephen M. Cameron return NULL; 4162339b2b14SStephen M. Cameron } 4163339b2b14SStephen M. Cameron 416403383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 416503383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 416603383736SDon Brace struct hpsa_scsi_dev_t *dev, 4167f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 416803383736SDon Brace struct bmic_identify_physical_device *id_phys) 416903383736SDon Brace { 417003383736SDon Brace int rc; 41714b6e5597SScott Teel struct ext_report_lun_entry *rle; 41724b6e5597SScott Teel 41734b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 417403383736SDon Brace 417503383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4176f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4177a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 417803383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4179f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4180f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 418103383736SDon Brace sizeof(*id_phys)); 418203383736SDon Brace if (!rc) 418303383736SDon Brace /* Reserve space for FW operations */ 418403383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 418503383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 418603383736SDon Brace dev->queue_depth = 418703383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 418803383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 418903383736SDon Brace else 419003383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 419103383736SDon Brace } 419203383736SDon Brace 41938270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4194f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41958270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41968270b862SJoe Handzik { 4197f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4198f2039b03SDon Brace 4199f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 42008270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 42018270b862SJoe Handzik 42028270b862SJoe Handzik memcpy(&this_device->active_path_index, 42038270b862SJoe Handzik &id_phys->active_path_number, 42048270b862SJoe Handzik sizeof(this_device->active_path_index)); 42058270b862SJoe Handzik memcpy(&this_device->path_map, 42068270b862SJoe Handzik &id_phys->redundant_path_present_map, 42078270b862SJoe Handzik sizeof(this_device->path_map)); 42088270b862SJoe Handzik memcpy(&this_device->box, 42098270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 42108270b862SJoe Handzik sizeof(this_device->box)); 42118270b862SJoe Handzik memcpy(&this_device->phys_connector, 42128270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 42138270b862SJoe Handzik sizeof(this_device->phys_connector)); 42148270b862SJoe Handzik memcpy(&this_device->bay, 42158270b862SJoe Handzik &id_phys->phys_bay_in_box, 42168270b862SJoe Handzik sizeof(this_device->bay)); 42178270b862SJoe Handzik } 42188270b862SJoe Handzik 421966749d0dSScott Teel /* get number of local logical disks. */ 422066749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 422166749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 422266749d0dSScott Teel u32 *nlocals) 422366749d0dSScott Teel { 422466749d0dSScott Teel int rc; 422566749d0dSScott Teel 422666749d0dSScott Teel if (!id_ctlr) { 422766749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 422866749d0dSScott Teel __func__); 422966749d0dSScott Teel return -ENOMEM; 423066749d0dSScott Teel } 423166749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 423266749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 423366749d0dSScott Teel if (!rc) 4234c99dfd20SChristos Gkekas if (id_ctlr->configured_logical_drive_count < 255) 423566749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 423666749d0dSScott Teel else 423766749d0dSScott Teel *nlocals = le16_to_cpu( 423866749d0dSScott Teel id_ctlr->extended_logical_unit_count); 423966749d0dSScott Teel else 424066749d0dSScott Teel *nlocals = -1; 424166749d0dSScott Teel return rc; 424266749d0dSScott Teel } 424366749d0dSScott Teel 424464ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 424564ce60caSDon Brace { 424664ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 424764ce60caSDon Brace bool is_spare = false; 424864ce60caSDon Brace int rc; 424964ce60caSDon Brace 425064ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 425164ce60caSDon Brace if (!id_phys) 425264ce60caSDon Brace return false; 425364ce60caSDon Brace 425464ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 425564ce60caSDon Brace lunaddrbytes, 425664ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 425764ce60caSDon Brace id_phys, sizeof(*id_phys)); 425864ce60caSDon Brace if (rc == 0) 425964ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 426064ce60caSDon Brace 426164ce60caSDon Brace kfree(id_phys); 426264ce60caSDon Brace return is_spare; 426364ce60caSDon Brace } 426464ce60caSDon Brace 426564ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 426664ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 426764ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 426864ce60caSDon Brace 426964ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 427064ce60caSDon Brace 427164ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 427264ce60caSDon Brace struct ext_report_lun_entry *rle) 427364ce60caSDon Brace { 427464ce60caSDon Brace u8 device_flags; 427564ce60caSDon Brace u8 device_type; 427664ce60caSDon Brace 427764ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 427864ce60caSDon Brace return false; 427964ce60caSDon Brace 428064ce60caSDon Brace device_flags = rle->device_flags; 428164ce60caSDon Brace device_type = rle->device_type; 428264ce60caSDon Brace 428364ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 428464ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 428564ce60caSDon Brace return false; 428664ce60caSDon Brace return true; 428764ce60caSDon Brace } 428864ce60caSDon Brace 428964ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 429064ce60caSDon Brace return false; 429164ce60caSDon Brace 429264ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 429364ce60caSDon Brace return false; 429464ce60caSDon Brace 429564ce60caSDon Brace /* 429664ce60caSDon Brace * Spares may be spun down, we do not want to 429764ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 429864ce60caSDon Brace * that would have them spun up, that is a 429964ce60caSDon Brace * performance hit because I/O to the RAID device 430064ce60caSDon Brace * stops while the spin up occurs which can take 430164ce60caSDon Brace * over 50 seconds. 430264ce60caSDon Brace */ 430364ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 430464ce60caSDon Brace return true; 430564ce60caSDon Brace 430664ce60caSDon Brace return false; 430764ce60caSDon Brace } 430866749d0dSScott Teel 43098aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4310edd16368SStephen M. Cameron { 4311edd16368SStephen M. Cameron /* the idea here is we could get notified 4312edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4313edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4314edd16368SStephen M. Cameron * our list of devices accordingly. 4315edd16368SStephen M. Cameron * 4316edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4317edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4318edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4319edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4320edd16368SStephen M. Cameron */ 4321a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4322edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 432303383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 432466749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 432501a02ffcSStephen M. Cameron u32 nphysicals = 0; 432601a02ffcSStephen M. Cameron u32 nlogicals = 0; 432766749d0dSScott Teel u32 nlocal_logicals = 0; 432801a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4329edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4330edd16368SStephen M. Cameron int ncurrent = 0; 43314f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4332339b2b14SStephen M. Cameron int raid_ctlr_position; 433304fa2f44SKevin Barnett bool physical_device; 4334aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4335edd16368SStephen M. Cameron 43366396bb22SKees Cook currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 433792084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 433892084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4339edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 434003383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 434166749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4342edd16368SStephen M. Cameron 434303383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 434466749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4345edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4346edd16368SStephen M. Cameron goto out; 4347edd16368SStephen M. Cameron } 4348edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4349edd16368SStephen M. Cameron 4350853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4351853633e8SDon Brace 435203383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4353853633e8SDon Brace logdev_list, &nlogicals)) { 4354853633e8SDon Brace h->drv_req_rescan = 1; 4355edd16368SStephen M. Cameron goto out; 4356853633e8SDon Brace } 4357edd16368SStephen M. Cameron 435866749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 435966749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 436066749d0dSScott Teel dev_warn(&h->pdev->dev, 436166749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 436266749d0dSScott Teel __func__); 436366749d0dSScott Teel } 4364edd16368SStephen M. Cameron 4365aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4366aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4367aca4a520SScott Teel * controller. 4368edd16368SStephen M. Cameron */ 4369aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4370edd16368SStephen M. Cameron 43714e188184SBader Ali Saleh hpsa_ext_ctrl_present(h, physdev_list); 43724e188184SBader Ali Saleh 4373edd16368SStephen M. Cameron /* Allocate the per device structures */ 4374edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4375b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4376b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4377b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4378b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4379b7ec021fSScott Teel break; 4380b7ec021fSScott Teel } 4381b7ec021fSScott Teel 4382edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4383edd16368SStephen M. Cameron if (!currentsd[i]) { 4384853633e8SDon Brace h->drv_req_rescan = 1; 4385edd16368SStephen M. Cameron goto out; 4386edd16368SStephen M. Cameron } 4387edd16368SStephen M. Cameron ndev_allocated++; 4388edd16368SStephen M. Cameron } 4389edd16368SStephen M. Cameron 43908645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4391339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4392339b2b14SStephen M. Cameron else 4393339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4394339b2b14SStephen M. Cameron 4395edd16368SStephen M. Cameron /* adjust our table of devices */ 43964f4eb9f1SScott Teel n_ext_target_devs = 0; 4397edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43980b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4399683fc444SDon Brace int rc = 0; 4400f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 440164ce60caSDon Brace bool skip_device = false; 4402edd16368SStephen M. Cameron 4403421bf80cSScott Teel memset(tmpdevice, 0, sizeof(*tmpdevice)); 4404421bf80cSScott Teel 440504fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4406edd16368SStephen M. Cameron 4407edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4408339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4409339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 441041ce4c35SStephen Cameron 441186cf7130SDon Brace /* Determine if this is a lun from an external target array */ 441286cf7130SDon Brace tmpdevice->external = 441386cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 441486cf7130SDon Brace nphysicals, nlocal_logicals); 441586cf7130SDon Brace 441664ce60caSDon Brace /* 441764ce60caSDon Brace * Skip over some devices such as a spare. 441864ce60caSDon Brace */ 441964ce60caSDon Brace if (!tmpdevice->external && physical_device) { 442064ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 442164ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 442264ce60caSDon Brace if (skip_device) 4423edd16368SStephen M. Cameron continue; 442464ce60caSDon Brace } 4425edd16368SStephen M. Cameron 4426b2582a65SDon Brace /* Get device type, vendor, model, device id, raid_map */ 4427683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4428683fc444SDon Brace &is_OBDR); 4429683fc444SDon Brace if (rc == -ENOMEM) { 4430683fc444SDon Brace dev_warn(&h->pdev->dev, 4431683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4432853633e8SDon Brace h->drv_req_rescan = 1; 4433683fc444SDon Brace goto out; 4434853633e8SDon Brace } 4435683fc444SDon Brace if (rc) { 443685b29008SDon Brace h->drv_req_rescan = 1; 4437683fc444SDon Brace continue; 4438683fc444SDon Brace } 4439683fc444SDon Brace 44401f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4441edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4442edd16368SStephen M. Cameron 4443edd16368SStephen M. Cameron *this_device = *tmpdevice; 444404fa2f44SKevin Barnett this_device->physical_device = physical_device; 4445edd16368SStephen M. Cameron 444604fa2f44SKevin Barnett /* 444704fa2f44SKevin Barnett * Expose all devices except for physical devices that 444804fa2f44SKevin Barnett * are masked. 444904fa2f44SKevin Barnett */ 445004fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 44512a168208SKevin Barnett this_device->expose_device = 0; 44522a168208SKevin Barnett else 44532a168208SKevin Barnett this_device->expose_device = 1; 445441ce4c35SStephen Cameron 4455d04e62b9SKevin Barnett 4456d04e62b9SKevin Barnett /* 4457d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4458d04e62b9SKevin Barnett */ 4459d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4460d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4461edd16368SStephen M. Cameron 4462edd16368SStephen M. Cameron switch (this_device->devtype) { 44630b0e1d6cSStephen M. Cameron case TYPE_ROM: 4464edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4465edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4466edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4467edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4468edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4469edd16368SStephen M. Cameron * the inquiry data. 4470edd16368SStephen M. Cameron */ 44710b0e1d6cSStephen M. Cameron if (is_OBDR) 4472edd16368SStephen M. Cameron ncurrent++; 4473edd16368SStephen M. Cameron break; 4474edd16368SStephen M. Cameron case TYPE_DISK: 4475af15ed36SDon Brace case TYPE_ZBC: 447604fa2f44SKevin Barnett if (this_device->physical_device) { 4477b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4478b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4479ecf418d1SJoe Handzik this_device->offload_enabled = 0; 448003383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4481f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4482f2039b03SDon Brace hpsa_get_path_info(this_device, 4483f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4484b9092b79SKevin Barnett } 4485edd16368SStephen M. Cameron ncurrent++; 4486edd16368SStephen M. Cameron break; 4487edd16368SStephen M. Cameron case TYPE_TAPE: 4488edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4489cca8f13bSDon Brace ncurrent++; 4490cca8f13bSDon Brace break; 449141ce4c35SStephen Cameron case TYPE_ENCLOSURE: 449217a9e54aSDon Brace if (!this_device->external) 4493cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4494cca8f13bSDon Brace physdev_list, phys_dev_index, 4495cca8f13bSDon Brace this_device); 449641ce4c35SStephen Cameron ncurrent++; 449741ce4c35SStephen Cameron break; 4498edd16368SStephen M. Cameron case TYPE_RAID: 4499edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4500edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4501edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4502edd16368SStephen M. Cameron * don't present it. 4503edd16368SStephen M. Cameron */ 4504edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4505edd16368SStephen M. Cameron break; 4506edd16368SStephen M. Cameron ncurrent++; 4507edd16368SStephen M. Cameron break; 4508edd16368SStephen M. Cameron default: 4509edd16368SStephen M. Cameron break; 4510edd16368SStephen M. Cameron } 4511cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4512edd16368SStephen M. Cameron break; 4513edd16368SStephen M. Cameron } 4514d04e62b9SKevin Barnett 4515d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4516d04e62b9SKevin Barnett int rc = 0; 4517d04e62b9SKevin Barnett 4518d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4519d04e62b9SKevin Barnett if (rc) { 4520d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4521d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4522d04e62b9SKevin Barnett goto out; 4523d04e62b9SKevin Barnett } 4524d04e62b9SKevin Barnett } 4525d04e62b9SKevin Barnett 45268aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4527edd16368SStephen M. Cameron out: 4528edd16368SStephen M. Cameron kfree(tmpdevice); 4529edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4530edd16368SStephen M. Cameron kfree(currentsd[i]); 4531edd16368SStephen M. Cameron kfree(currentsd); 4532edd16368SStephen M. Cameron kfree(physdev_list); 4533edd16368SStephen M. Cameron kfree(logdev_list); 453466749d0dSScott Teel kfree(id_ctlr); 453503383736SDon Brace kfree(id_phys); 4536edd16368SStephen M. Cameron } 4537edd16368SStephen M. Cameron 4538ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4539ec5cbf04SWebb Scales struct scatterlist *sg) 4540ec5cbf04SWebb Scales { 4541ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4542ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4543ec5cbf04SWebb Scales 4544ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4545ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4546ec5cbf04SWebb Scales desc->Ext = 0; 4547ec5cbf04SWebb Scales } 4548ec5cbf04SWebb Scales 4549c7ee65b3SWebb Scales /* 4550c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4551edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4552edd16368SStephen M. Cameron * hpsa command, cp. 4553edd16368SStephen M. Cameron */ 455433a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4555edd16368SStephen M. Cameron struct CommandList *cp, 4556edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4557edd16368SStephen M. Cameron { 4558edd16368SStephen M. Cameron struct scatterlist *sg; 4559b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 456033a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4561edd16368SStephen M. Cameron 456233a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4563edd16368SStephen M. Cameron 4564edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4565edd16368SStephen M. Cameron if (use_sg < 0) 4566edd16368SStephen M. Cameron return use_sg; 4567edd16368SStephen M. Cameron 4568edd16368SStephen M. Cameron if (!use_sg) 4569edd16368SStephen M. Cameron goto sglist_finished; 4570edd16368SStephen M. Cameron 4571b3a7ba7cSWebb Scales /* 4572b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4573b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4574b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4575b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4576b3a7ba7cSWebb Scales * the entries in the one list. 4577b3a7ba7cSWebb Scales */ 457833a2ffceSStephen M. Cameron curr_sg = cp->SG; 4579b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4580b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4581b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4582b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4583ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 458433a2ffceSStephen M. Cameron curr_sg++; 458533a2ffceSStephen M. Cameron } 4586ec5cbf04SWebb Scales 4587b3a7ba7cSWebb Scales if (chained) { 4588b3a7ba7cSWebb Scales /* 4589b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4590b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4591b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4592b3a7ba7cSWebb Scales * where the previous loop left off. 4593b3a7ba7cSWebb Scales */ 4594b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4595b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4596b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4597b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4598b3a7ba7cSWebb Scales curr_sg++; 4599b3a7ba7cSWebb Scales } 4600b3a7ba7cSWebb Scales } 4601b3a7ba7cSWebb Scales 4602ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4603b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 460433a2ffceSStephen M. Cameron 460533a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 460633a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 460733a2ffceSStephen M. Cameron 460833a2ffceSStephen M. Cameron if (chained) { 460933a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 461050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4611e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4612e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4613e2bea6dfSStephen M. Cameron return -1; 4614e2bea6dfSStephen M. Cameron } 461533a2ffceSStephen M. Cameron return 0; 4616edd16368SStephen M. Cameron } 4617edd16368SStephen M. Cameron 4618edd16368SStephen M. Cameron sglist_finished: 4619edd16368SStephen M. Cameron 462001a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4621c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4622edd16368SStephen M. Cameron return 0; 4623edd16368SStephen M. Cameron } 4624edd16368SStephen M. Cameron 4625b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h, 4626b63c64acSDon Brace u8 *cdb, int cdb_len, 4627b63c64acSDon Brace const char *func) 4628b63c64acSDon Brace { 4629f4d0ad1fSAndy Shevchenko dev_warn(&h->pdev->dev, 4630f4d0ad1fSAndy Shevchenko "%s: Blocking zero-length request: CDB:%*phN\n", 4631f4d0ad1fSAndy Shevchenko func, cdb_len, cdb); 4632b63c64acSDon Brace } 4633b63c64acSDon Brace 4634b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1 4635b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */ 4636b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb) 4637b63c64acSDon Brace { 4638b63c64acSDon Brace u32 block_cnt; 4639b63c64acSDon Brace 4640b63c64acSDon Brace /* Block zero-length transfer sizes on certain commands. */ 4641b63c64acSDon Brace switch (cdb[0]) { 4642b63c64acSDon Brace case READ_10: 4643b63c64acSDon Brace case WRITE_10: 4644b63c64acSDon Brace case VERIFY: /* 0x2F */ 4645b63c64acSDon Brace case WRITE_VERIFY: /* 0x2E */ 4646b63c64acSDon Brace block_cnt = get_unaligned_be16(&cdb[7]); 4647b63c64acSDon Brace break; 4648b63c64acSDon Brace case READ_12: 4649b63c64acSDon Brace case WRITE_12: 4650b63c64acSDon Brace case VERIFY_12: /* 0xAF */ 4651b63c64acSDon Brace case WRITE_VERIFY_12: /* 0xAE */ 4652b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4653b63c64acSDon Brace break; 4654b63c64acSDon Brace case READ_16: 4655b63c64acSDon Brace case WRITE_16: 4656b63c64acSDon Brace case VERIFY_16: /* 0x8F */ 4657b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[10]); 4658b63c64acSDon Brace break; 4659b63c64acSDon Brace default: 4660b63c64acSDon Brace return false; 4661b63c64acSDon Brace } 4662b63c64acSDon Brace 4663b63c64acSDon Brace return block_cnt == 0; 4664b63c64acSDon Brace } 4665b63c64acSDon Brace 4666283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4667283b4a9bSStephen M. Cameron { 4668283b4a9bSStephen M. Cameron int is_write = 0; 4669283b4a9bSStephen M. Cameron u32 block; 4670283b4a9bSStephen M. Cameron u32 block_cnt; 4671283b4a9bSStephen M. Cameron 4672283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4673283b4a9bSStephen M. Cameron switch (cdb[0]) { 4674283b4a9bSStephen M. Cameron case WRITE_6: 4675283b4a9bSStephen M. Cameron case WRITE_12: 4676283b4a9bSStephen M. Cameron is_write = 1; 46775dfdb089SGustavo A. R. Silva /* fall through */ 4678283b4a9bSStephen M. Cameron case READ_6: 4679283b4a9bSStephen M. Cameron case READ_12: 4680283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4681abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4682abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4683abbada71SMahesh Rajashekhara cdb[3]); 4684283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4685c8a6c9a6SDon Brace if (block_cnt == 0) 4686c8a6c9a6SDon Brace block_cnt = 256; 4687283b4a9bSStephen M. Cameron } else { 4688283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4689c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4690c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4691283b4a9bSStephen M. Cameron } 4692283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4693283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4694283b4a9bSStephen M. Cameron 4695283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4696283b4a9bSStephen M. Cameron cdb[1] = 0; 4697283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4698283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4699283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4700283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4701283b4a9bSStephen M. Cameron cdb[6] = 0; 4702283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4703283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4704283b4a9bSStephen M. Cameron cdb[9] = 0; 4705283b4a9bSStephen M. Cameron *cdb_len = 10; 4706283b4a9bSStephen M. Cameron break; 4707283b4a9bSStephen M. Cameron } 4708283b4a9bSStephen M. Cameron return 0; 4709283b4a9bSStephen M. Cameron } 4710283b4a9bSStephen M. Cameron 4711c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4712283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 471303383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4714e1f7de0cSMatt Gates { 4715e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4716e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4717e1f7de0cSMatt Gates unsigned int len; 4718e1f7de0cSMatt Gates unsigned int total_len = 0; 4719e1f7de0cSMatt Gates struct scatterlist *sg; 4720e1f7de0cSMatt Gates u64 addr64; 4721e1f7de0cSMatt Gates int use_sg, i; 4722e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4723e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4724e1f7de0cSMatt Gates 4725283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 472603383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 472703383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4728283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 472903383736SDon Brace } 4730283b4a9bSStephen M. Cameron 4731e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4732e1f7de0cSMatt Gates 4733b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4734b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4735b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4736b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4737b63c64acSDon Brace } 4738b63c64acSDon Brace 473903383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 474003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4741283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 474203383736SDon Brace } 4743283b4a9bSStephen M. Cameron 4744e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4745e1f7de0cSMatt Gates 4746e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4747e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4748e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4749e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4750e1f7de0cSMatt Gates 4751e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 475203383736SDon Brace if (use_sg < 0) { 475303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4754e1f7de0cSMatt Gates return use_sg; 475503383736SDon Brace } 4756e1f7de0cSMatt Gates 4757e1f7de0cSMatt Gates if (use_sg) { 4758e1f7de0cSMatt Gates curr_sg = cp->SG; 4759e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4760e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4761e1f7de0cSMatt Gates len = sg_dma_len(sg); 4762e1f7de0cSMatt Gates total_len += len; 476350a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 476450a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 476550a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4766e1f7de0cSMatt Gates curr_sg++; 4767e1f7de0cSMatt Gates } 476850a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4769e1f7de0cSMatt Gates 4770e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4771e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4772e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4773e1f7de0cSMatt Gates break; 4774e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4775e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4776e1f7de0cSMatt Gates break; 4777e1f7de0cSMatt Gates case DMA_NONE: 4778e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4779e1f7de0cSMatt Gates break; 4780e1f7de0cSMatt Gates default: 4781e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4782e1f7de0cSMatt Gates cmd->sc_data_direction); 4783e1f7de0cSMatt Gates BUG(); 4784e1f7de0cSMatt Gates break; 4785e1f7de0cSMatt Gates } 4786e1f7de0cSMatt Gates } else { 4787e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4788e1f7de0cSMatt Gates } 4789e1f7de0cSMatt Gates 4790c349775eSScott Teel c->Header.SGList = use_sg; 4791e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 47922b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 47932b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 47942b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 47952b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 47962b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4797283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4798283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4799c349775eSScott Teel /* Tag was already set at init time. */ 4800e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4801e1f7de0cSMatt Gates return 0; 4802e1f7de0cSMatt Gates } 4803edd16368SStephen M. Cameron 4804283b4a9bSStephen M. Cameron /* 4805283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4806283b4a9bSStephen M. Cameron * I/O accelerator path. 4807283b4a9bSStephen M. Cameron */ 4808283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4809283b4a9bSStephen M. Cameron struct CommandList *c) 4810283b4a9bSStephen M. Cameron { 4811283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4812283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4813283b4a9bSStephen M. Cameron 481445e596cdSDon Brace if (!dev) 481545e596cdSDon Brace return -1; 481645e596cdSDon Brace 481703383736SDon Brace c->phys_disk = dev; 481803383736SDon Brace 4819c5dfd106SDon Brace if (dev->in_reset) 4820c5dfd106SDon Brace return -1; 4821c5dfd106SDon Brace 4822283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 482303383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4824283b4a9bSStephen M. Cameron } 4825283b4a9bSStephen M. Cameron 4826dd0e19f3SScott Teel /* 4827dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4828dd0e19f3SScott Teel */ 4829dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4830dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4831dd0e19f3SScott Teel { 4832dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4833dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4834dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4835dd0e19f3SScott Teel u64 first_block; 4836dd0e19f3SScott Teel 4837dd0e19f3SScott Teel /* Are we doing encryption on this device */ 48382b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4839dd0e19f3SScott Teel return; 4840dd0e19f3SScott Teel /* Set the data encryption key index. */ 4841dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4842dd0e19f3SScott Teel 4843dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4844dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4845dd0e19f3SScott Teel 4846dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4847dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4848dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4849dd0e19f3SScott Teel */ 4850dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4851dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4852dd0e19f3SScott Teel case READ_6: 4853abbada71SMahesh Rajashekhara case WRITE_6: 4854abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4855abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4856abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4857dd0e19f3SScott Teel break; 4858dd0e19f3SScott Teel case WRITE_10: 4859dd0e19f3SScott Teel case READ_10: 4860dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4861dd0e19f3SScott Teel case WRITE_12: 4862dd0e19f3SScott Teel case READ_12: 48632b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4864dd0e19f3SScott Teel break; 4865dd0e19f3SScott Teel case WRITE_16: 4866dd0e19f3SScott Teel case READ_16: 48672b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4868dd0e19f3SScott Teel break; 4869dd0e19f3SScott Teel default: 4870dd0e19f3SScott Teel dev_err(&h->pdev->dev, 48712b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 48722b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4873dd0e19f3SScott Teel BUG(); 4874dd0e19f3SScott Teel break; 4875dd0e19f3SScott Teel } 48762b08b3e9SDon Brace 48772b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 48782b08b3e9SDon Brace first_block = first_block * 48792b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 48802b08b3e9SDon Brace 48812b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 48822b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4883dd0e19f3SScott Teel } 4884dd0e19f3SScott Teel 4885c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4886c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 488703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4888c349775eSScott Teel { 4889c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4890c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4891c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4892c349775eSScott Teel int use_sg, i; 4893c349775eSScott Teel struct scatterlist *sg; 4894c349775eSScott Teel u64 addr64; 4895c349775eSScott Teel u32 len; 4896c349775eSScott Teel u32 total_len = 0; 4897c349775eSScott Teel 489845e596cdSDon Brace if (!cmd->device) 489945e596cdSDon Brace return -1; 490045e596cdSDon Brace 490145e596cdSDon Brace if (!cmd->device->hostdata) 490245e596cdSDon Brace return -1; 490345e596cdSDon Brace 4904d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4905c349775eSScott Teel 4906b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4907b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4908b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4909b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4910b63c64acSDon Brace } 4911b63c64acSDon Brace 491203383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 491303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4914c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 491503383736SDon Brace } 491603383736SDon Brace 4917c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4918c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4919c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4920c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4921c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4922c349775eSScott Teel 4923c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4924c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4925c349775eSScott Teel 4926c349775eSScott Teel use_sg = scsi_dma_map(cmd); 492703383736SDon Brace if (use_sg < 0) { 492803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4929c349775eSScott Teel return use_sg; 493003383736SDon Brace } 4931c349775eSScott Teel 4932c349775eSScott Teel if (use_sg) { 4933c349775eSScott Teel curr_sg = cp->sg; 4934d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4935d9a729f3SWebb Scales addr64 = le64_to_cpu( 4936d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4937d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4938d9a729f3SWebb Scales curr_sg->length = 0; 4939d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4940d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4941d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4942625d7d35SDon Brace curr_sg->chain_indicator = IOACCEL2_CHAIN; 4943d9a729f3SWebb Scales 4944d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4945d9a729f3SWebb Scales } 4946c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4947c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4948c349775eSScott Teel len = sg_dma_len(sg); 4949c349775eSScott Teel total_len += len; 4950c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4951c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4952c349775eSScott Teel curr_sg->reserved[0] = 0; 4953c349775eSScott Teel curr_sg->reserved[1] = 0; 4954c349775eSScott Teel curr_sg->reserved[2] = 0; 4955c349775eSScott Teel curr_sg->chain_indicator = 0; 4956c349775eSScott Teel curr_sg++; 4957c349775eSScott Teel } 4958c349775eSScott Teel 4959625d7d35SDon Brace /* 4960625d7d35SDon Brace * Set the last s/g element bit 4961625d7d35SDon Brace */ 4962625d7d35SDon Brace (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG; 4963625d7d35SDon Brace 4964c349775eSScott Teel switch (cmd->sc_data_direction) { 4965c349775eSScott Teel case DMA_TO_DEVICE: 4966dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4967dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4968c349775eSScott Teel break; 4969c349775eSScott Teel case DMA_FROM_DEVICE: 4970dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4971dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4972c349775eSScott Teel break; 4973c349775eSScott Teel case DMA_NONE: 4974dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4975dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4976c349775eSScott Teel break; 4977c349775eSScott Teel default: 4978c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4979c349775eSScott Teel cmd->sc_data_direction); 4980c349775eSScott Teel BUG(); 4981c349775eSScott Teel break; 4982c349775eSScott Teel } 4983c349775eSScott Teel } else { 4984dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4985dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4986c349775eSScott Teel } 4987dd0e19f3SScott Teel 4988dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4989dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4990dd0e19f3SScott Teel 49912b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4992f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4993c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4994c349775eSScott Teel 4995c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4996c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4997c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 499850a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4999c349775eSScott Teel 5000d9a729f3SWebb Scales /* fill in sg elements */ 5001d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 5002d9a729f3SWebb Scales cp->sg_count = 1; 5003a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 5004d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 5005d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 5006d9a729f3SWebb Scales scsi_dma_unmap(cmd); 5007d9a729f3SWebb Scales return -1; 5008d9a729f3SWebb Scales } 5009d9a729f3SWebb Scales } else 5010d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 5011d9a729f3SWebb Scales 5012c5dfd106SDon Brace if (phys_disk->in_reset) { 5013c5dfd106SDon Brace cmd->result = DID_RESET << 16; 5014c5dfd106SDon Brace return -1; 5015c5dfd106SDon Brace } 5016c5dfd106SDon Brace 5017c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 5018c349775eSScott Teel return 0; 5019c349775eSScott Teel } 5020c349775eSScott Teel 5021c349775eSScott Teel /* 5022c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 5023c349775eSScott Teel */ 5024c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5025c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 502603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5027c349775eSScott Teel { 502845e596cdSDon Brace if (!c->scsi_cmd->device) 502945e596cdSDon Brace return -1; 503045e596cdSDon Brace 503145e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 503245e596cdSDon Brace return -1; 503345e596cdSDon Brace 5034c5dfd106SDon Brace if (phys_disk->in_reset) 5035c5dfd106SDon Brace return -1; 5036c5dfd106SDon Brace 503703383736SDon Brace /* Try to honor the device's queue depth */ 503803383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 503903383736SDon Brace phys_disk->queue_depth) { 504003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 504103383736SDon Brace return IO_ACCEL_INELIGIBLE; 504203383736SDon Brace } 5043c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 5044c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 504503383736SDon Brace cdb, cdb_len, scsi3addr, 504603383736SDon Brace phys_disk); 5047c349775eSScott Teel else 5048c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 504903383736SDon Brace cdb, cdb_len, scsi3addr, 505003383736SDon Brace phys_disk); 5051c349775eSScott Teel } 5052c349775eSScott Teel 50536b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 50546b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 50556b80b18fSScott Teel { 50566b80b18fSScott Teel if (offload_to_mirror == 0) { 50576b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 50582b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 50596b80b18fSScott Teel return; 50606b80b18fSScott Teel } 50616b80b18fSScott Teel do { 50626b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 50632b08b3e9SDon Brace *current_group = *map_index / 50642b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 50656b80b18fSScott Teel if (offload_to_mirror == *current_group) 50666b80b18fSScott Teel continue; 50672b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 50686b80b18fSScott Teel /* select map index from next group */ 50692b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 50706b80b18fSScott Teel (*current_group)++; 50716b80b18fSScott Teel } else { 50726b80b18fSScott Teel /* select map index from first group */ 50732b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 50746b80b18fSScott Teel *current_group = 0; 50756b80b18fSScott Teel } 50766b80b18fSScott Teel } while (offload_to_mirror != *current_group); 50776b80b18fSScott Teel } 50786b80b18fSScott Teel 5079283b4a9bSStephen M. Cameron /* 5080283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 5081283b4a9bSStephen M. Cameron */ 5082283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5083283b4a9bSStephen M. Cameron struct CommandList *c) 5084283b4a9bSStephen M. Cameron { 5085283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 5086283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5087283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 5088283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 5089283b4a9bSStephen M. Cameron int is_write = 0; 5090283b4a9bSStephen M. Cameron u32 map_index; 5091283b4a9bSStephen M. Cameron u64 first_block, last_block; 5092283b4a9bSStephen M. Cameron u32 block_cnt; 5093283b4a9bSStephen M. Cameron u32 blocks_per_row; 5094283b4a9bSStephen M. Cameron u64 first_row, last_row; 5095283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 5096283b4a9bSStephen M. Cameron u32 first_column, last_column; 50976b80b18fSScott Teel u64 r0_first_row, r0_last_row; 50986b80b18fSScott Teel u32 r5or6_blocks_per_row; 50996b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 51006b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 51016b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 51026b80b18fSScott Teel u32 total_disks_per_row; 51036b80b18fSScott Teel u32 stripesize; 51046b80b18fSScott Teel u32 first_group, last_group, current_group; 5105283b4a9bSStephen M. Cameron u32 map_row; 5106283b4a9bSStephen M. Cameron u32 disk_handle; 5107283b4a9bSStephen M. Cameron u64 disk_block; 5108283b4a9bSStephen M. Cameron u32 disk_block_cnt; 5109283b4a9bSStephen M. Cameron u8 cdb[16]; 5110283b4a9bSStephen M. Cameron u8 cdb_len; 51112b08b3e9SDon Brace u16 strip_size; 5112283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5113283b4a9bSStephen M. Cameron u64 tmpdiv; 5114283b4a9bSStephen M. Cameron #endif 51156b80b18fSScott Teel int offload_to_mirror; 5116283b4a9bSStephen M. Cameron 511745e596cdSDon Brace if (!dev) 511845e596cdSDon Brace return -1; 511945e596cdSDon Brace 5120c5dfd106SDon Brace if (dev->in_reset) 5121c5dfd106SDon Brace return -1; 5122c5dfd106SDon Brace 5123283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 5124283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 5125283b4a9bSStephen M. Cameron case WRITE_6: 5126283b4a9bSStephen M. Cameron is_write = 1; 51275dfdb089SGustavo A. R. Silva /* fall through */ 5128283b4a9bSStephen M. Cameron case READ_6: 5129abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5130abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5131abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5132283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 51333fa89a04SStephen M. Cameron if (block_cnt == 0) 51343fa89a04SStephen M. Cameron block_cnt = 256; 5135283b4a9bSStephen M. Cameron break; 5136283b4a9bSStephen M. Cameron case WRITE_10: 5137283b4a9bSStephen M. Cameron is_write = 1; 51385dfdb089SGustavo A. R. Silva /* fall through */ 5139283b4a9bSStephen M. Cameron case READ_10: 5140283b4a9bSStephen M. Cameron first_block = 5141283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5142283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5143283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5144283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5145283b4a9bSStephen M. Cameron block_cnt = 5146283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5147283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5148283b4a9bSStephen M. Cameron break; 5149283b4a9bSStephen M. Cameron case WRITE_12: 5150283b4a9bSStephen M. Cameron is_write = 1; 51515dfdb089SGustavo A. R. Silva /* fall through */ 5152283b4a9bSStephen M. Cameron case READ_12: 5153283b4a9bSStephen M. Cameron first_block = 5154283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5155283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5156283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5157283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5158283b4a9bSStephen M. Cameron block_cnt = 5159283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5160283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5161283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5162283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5163283b4a9bSStephen M. Cameron break; 5164283b4a9bSStephen M. Cameron case WRITE_16: 5165283b4a9bSStephen M. Cameron is_write = 1; 51665dfdb089SGustavo A. R. Silva /* fall through */ 5167283b4a9bSStephen M. Cameron case READ_16: 5168283b4a9bSStephen M. Cameron first_block = 5169283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5170283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5171283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5172283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5173283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5174283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5175283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5176283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5177283b4a9bSStephen M. Cameron block_cnt = 5178283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5179283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5180283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5181283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5182283b4a9bSStephen M. Cameron break; 5183283b4a9bSStephen M. Cameron default: 5184283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5185283b4a9bSStephen M. Cameron } 5186283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5187283b4a9bSStephen M. Cameron 5188283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5189283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5190283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5191283b4a9bSStephen M. Cameron 5192283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 51932b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 51942b08b3e9SDon Brace last_block < first_block) 5195283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5196283b4a9bSStephen M. Cameron 5197283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 51982b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 51992b08b3e9SDon Brace le16_to_cpu(map->strip_size); 52002b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5201283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5202283b4a9bSStephen M. Cameron tmpdiv = first_block; 5203283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5204283b4a9bSStephen M. Cameron first_row = tmpdiv; 5205283b4a9bSStephen M. Cameron tmpdiv = last_block; 5206283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5207283b4a9bSStephen M. Cameron last_row = tmpdiv; 5208283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5209283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5210283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 52112b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5212283b4a9bSStephen M. Cameron first_column = tmpdiv; 5213283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 52142b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5215283b4a9bSStephen M. Cameron last_column = tmpdiv; 5216283b4a9bSStephen M. Cameron #else 5217283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5218283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5219283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5220283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 52212b08b3e9SDon Brace first_column = first_row_offset / strip_size; 52222b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5223283b4a9bSStephen M. Cameron #endif 5224283b4a9bSStephen M. Cameron 5225283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5226283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5227283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5228283b4a9bSStephen M. Cameron 5229283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 52302b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 52312b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5232283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52332b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52346b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 52356b80b18fSScott Teel 52366b80b18fSScott Teel switch (dev->raid_level) { 52376b80b18fSScott Teel case HPSA_RAID_0: 52386b80b18fSScott Teel break; /* nothing special to do */ 52396b80b18fSScott Teel case HPSA_RAID_1: 52406b80b18fSScott Teel /* Handles load balance across RAID 1 members. 52416b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 52426b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5243*3e16e83aSDon Brace * Ensure we have the correct raid_map. 5244283b4a9bSStephen M. Cameron */ 5245*3e16e83aSDon Brace if (le16_to_cpu(map->layout_map_count) != 2) { 5246*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 5247*3e16e83aSDon Brace return IO_ACCEL_INELIGIBLE; 5248*3e16e83aSDon Brace } 5249283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 52502b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5251283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 52526b80b18fSScott Teel break; 52536b80b18fSScott Teel case HPSA_RAID_ADM: 52546b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 52556b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 5256*3e16e83aSDon Brace * Ensure we have the correct raid_map. 52576b80b18fSScott Teel */ 5258*3e16e83aSDon Brace if (le16_to_cpu(map->layout_map_count) != 3) { 5259*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 5260*3e16e83aSDon Brace return IO_ACCEL_INELIGIBLE; 5261*3e16e83aSDon Brace } 52626b80b18fSScott Teel 52636b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 52646b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 52656b80b18fSScott Teel &map_index, ¤t_group); 52666b80b18fSScott Teel /* set mirror group to use next time */ 52676b80b18fSScott Teel offload_to_mirror = 52682b08b3e9SDon Brace (offload_to_mirror >= 52692b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 52706b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 52716b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 52726b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 52736b80b18fSScott Teel * function since multiple threads might simultaneously 52746b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 52756b80b18fSScott Teel */ 52766b80b18fSScott Teel break; 52776b80b18fSScott Teel case HPSA_RAID_5: 52786b80b18fSScott Teel case HPSA_RAID_6: 52792b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 52806b80b18fSScott Teel break; 52816b80b18fSScott Teel 52826b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 52836b80b18fSScott Teel r5or6_blocks_per_row = 52842b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 52852b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 5286*3e16e83aSDon Brace if (r5or6_blocks_per_row == 0) { 5287*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(dev); 5288*3e16e83aSDon Brace return IO_ACCEL_INELIGIBLE; 5289*3e16e83aSDon Brace } 52902b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 52912b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 52926b80b18fSScott Teel #if BITS_PER_LONG == 32 52936b80b18fSScott Teel tmpdiv = first_block; 52946b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 52956b80b18fSScott Teel tmpdiv = first_group; 52966b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 52976b80b18fSScott Teel first_group = tmpdiv; 52986b80b18fSScott Teel tmpdiv = last_block; 52996b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 53006b80b18fSScott Teel tmpdiv = last_group; 53016b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 53026b80b18fSScott Teel last_group = tmpdiv; 53036b80b18fSScott Teel #else 53046b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 53056b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 53066b80b18fSScott Teel #endif 5307000ff7c2SStephen M. Cameron if (first_group != last_group) 53086b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53096b80b18fSScott Teel 53106b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 53116b80b18fSScott Teel #if BITS_PER_LONG == 32 53126b80b18fSScott Teel tmpdiv = first_block; 53136b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 53146b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 53156b80b18fSScott Teel tmpdiv = last_block; 53166b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 53176b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 53186b80b18fSScott Teel #else 53196b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 53206b80b18fSScott Teel first_block / stripesize; 53216b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 53226b80b18fSScott Teel #endif 53236b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 53246b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53256b80b18fSScott Teel 53266b80b18fSScott Teel 53276b80b18fSScott Teel /* Verify request is in a single column */ 53286b80b18fSScott Teel #if BITS_PER_LONG == 32 53296b80b18fSScott Teel tmpdiv = first_block; 53306b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 53316b80b18fSScott Teel tmpdiv = first_row_offset; 53326b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 53336b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 53346b80b18fSScott Teel tmpdiv = last_block; 53356b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 53366b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 53376b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 53386b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 53396b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 53406b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 53416b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 53426b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 53436b80b18fSScott Teel r5or6_last_column = tmpdiv; 53446b80b18fSScott Teel #else 53456b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 53466b80b18fSScott Teel (u32)((first_block % stripesize) % 53476b80b18fSScott Teel r5or6_blocks_per_row); 53486b80b18fSScott Teel 53496b80b18fSScott Teel r5or6_last_row_offset = 53506b80b18fSScott Teel (u32)((last_block % stripesize) % 53516b80b18fSScott Teel r5or6_blocks_per_row); 53526b80b18fSScott Teel 53536b80b18fSScott Teel first_column = r5or6_first_column = 53542b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 53556b80b18fSScott Teel r5or6_last_column = 53562b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 53576b80b18fSScott Teel #endif 53586b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 53596b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53606b80b18fSScott Teel 53616b80b18fSScott Teel /* Request is eligible */ 53626b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 53632b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 53646b80b18fSScott Teel 53656b80b18fSScott Teel map_index = (first_group * 53662b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 53676b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 53686b80b18fSScott Teel break; 53696b80b18fSScott Teel default: 53706b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5371283b4a9bSStephen M. Cameron } 53726b80b18fSScott Teel 537307543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 537407543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 537507543e0cSStephen Cameron 537603383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5377c3390df4SDon Brace if (!c->phys_disk) 5378c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 537903383736SDon Brace 5380283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 53812b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 53822b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 53832b08b3e9SDon Brace (first_row_offset - first_column * 53842b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5385283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5386283b4a9bSStephen M. Cameron 5387283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5388283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5389283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5390283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5391283b4a9bSStephen M. Cameron } 5392283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5393283b4a9bSStephen M. Cameron 5394283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5395283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5396283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5397283b4a9bSStephen M. Cameron cdb[1] = 0; 5398283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5399283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5400283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5401283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5402283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5403283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5404283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5405283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5406283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5407283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5408283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5409283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5410283b4a9bSStephen M. Cameron cdb[14] = 0; 5411283b4a9bSStephen M. Cameron cdb[15] = 0; 5412283b4a9bSStephen M. Cameron cdb_len = 16; 5413283b4a9bSStephen M. Cameron } else { 5414283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5415283b4a9bSStephen M. Cameron cdb[1] = 0; 5416283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5417283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5418283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5419283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5420283b4a9bSStephen M. Cameron cdb[6] = 0; 5421283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5422283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5423283b4a9bSStephen M. Cameron cdb[9] = 0; 5424283b4a9bSStephen M. Cameron cdb_len = 10; 5425283b4a9bSStephen M. Cameron } 5426283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 542703383736SDon Brace dev->scsi3addr, 542803383736SDon Brace dev->phys_disk[map_index]); 5429283b4a9bSStephen M. Cameron } 5430283b4a9bSStephen M. Cameron 543125163bd5SWebb Scales /* 543225163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 543325163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 543425163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 543525163bd5SWebb Scales */ 5436574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5437574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5438c5dfd106SDon Brace struct hpsa_scsi_dev_t *dev) 5439edd16368SStephen M. Cameron { 5440edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5441edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5442edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5443edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5444c5dfd106SDon Brace memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8); 5445f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5446edd16368SStephen M. Cameron 5447edd16368SStephen M. Cameron /* Fill in the request block... */ 5448edd16368SStephen M. Cameron 5449edd16368SStephen M. Cameron c->Request.Timeout = 0; 5450edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5451edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5452edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5453edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5454edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5455a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5456a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5457edd16368SStephen M. Cameron break; 5458edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5459a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5460a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5461edd16368SStephen M. Cameron break; 5462edd16368SStephen M. Cameron case DMA_NONE: 5463a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5464a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5465edd16368SStephen M. Cameron break; 5466edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5467edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5468edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5469edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5470edd16368SStephen M. Cameron */ 5471edd16368SStephen M. Cameron 5472a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5473a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5474edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5475edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5476edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5477edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5478edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5479edd16368SStephen M. Cameron * our purposes here. 5480edd16368SStephen M. Cameron */ 5481edd16368SStephen M. Cameron 5482edd16368SStephen M. Cameron break; 5483edd16368SStephen M. Cameron 5484edd16368SStephen M. Cameron default: 5485edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5486edd16368SStephen M. Cameron cmd->sc_data_direction); 5487edd16368SStephen M. Cameron BUG(); 5488edd16368SStephen M. Cameron break; 5489edd16368SStephen M. Cameron } 5490edd16368SStephen M. Cameron 549133a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 549273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5493edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5494edd16368SStephen M. Cameron } 5495c5dfd106SDon Brace 5496c5dfd106SDon Brace if (dev->in_reset) { 5497c5dfd106SDon Brace hpsa_cmd_resolve_and_free(h, c); 5498c5dfd106SDon Brace return SCSI_MLQUEUE_HOST_BUSY; 5499c5dfd106SDon Brace } 5500c5dfd106SDon Brace 550113499345SDon Brace c->device = dev; 550213499345SDon Brace 5503edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5504edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5505edd16368SStephen M. Cameron return 0; 5506edd16368SStephen M. Cameron } 5507edd16368SStephen M. Cameron 5508360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5509360c73bdSStephen Cameron struct CommandList *c) 5510360c73bdSStephen Cameron { 5511360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5512360c73bdSStephen Cameron 5513360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5514360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5515360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5516360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5517360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5518360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5519360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5520360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5521360c73bdSStephen Cameron c->cmdindex = index; 5522360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5523360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5524360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5525360c73bdSStephen Cameron c->h = h; 5526a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5527360c73bdSStephen Cameron } 5528360c73bdSStephen Cameron 5529360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5530360c73bdSStephen Cameron { 5531360c73bdSStephen Cameron int i; 5532360c73bdSStephen Cameron 5533360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5534360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5535360c73bdSStephen Cameron 5536360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5537360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5538360c73bdSStephen Cameron } 5539360c73bdSStephen Cameron } 5540360c73bdSStephen Cameron 5541360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5542360c73bdSStephen Cameron struct CommandList *c) 5543360c73bdSStephen Cameron { 5544360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5545360c73bdSStephen Cameron 554673153fe5SWebb Scales BUG_ON(c->cmdindex != index); 554773153fe5SWebb Scales 5548360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5549360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5550360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5551360c73bdSStephen Cameron } 5552360c73bdSStephen Cameron 5553592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5554c5dfd106SDon Brace struct CommandList *c, struct scsi_cmnd *cmd) 5555592a0ad5SWebb Scales { 5556592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5557592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5558592a0ad5SWebb Scales 555945e596cdSDon Brace if (!dev) 556045e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 556145e596cdSDon Brace 5562c5dfd106SDon Brace if (dev->in_reset) 5563c5dfd106SDon Brace return SCSI_MLQUEUE_HOST_BUSY; 5564c5dfd106SDon Brace 5565a68fdb3aSDon Brace if (hpsa_simple_mode) 5566a68fdb3aSDon Brace return IO_ACCEL_INELIGIBLE; 5567a68fdb3aSDon Brace 5568592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5569592a0ad5SWebb Scales 5570592a0ad5SWebb Scales if (dev->offload_enabled) { 5571592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5572592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5573592a0ad5SWebb Scales c->scsi_cmd = cmd; 557413499345SDon Brace c->device = dev; 5575592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5576592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5577592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5578a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5579592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5580592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5581592a0ad5SWebb Scales c->scsi_cmd = cmd; 558213499345SDon Brace c->device = dev; 5583592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5584592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5585592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5586592a0ad5SWebb Scales } 5587592a0ad5SWebb Scales return rc; 5588592a0ad5SWebb Scales } 5589592a0ad5SWebb Scales 5590080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5591080ef1ccSDon Brace { 5592080ef1ccSDon Brace struct scsi_cmnd *cmd; 5593080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 55948a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5595080ef1ccSDon Brace 5596080ef1ccSDon Brace cmd = c->scsi_cmd; 5597080ef1ccSDon Brace dev = cmd->device->hostdata; 5598080ef1ccSDon Brace if (!dev) { 5599080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 56008a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5601080ef1ccSDon Brace } 5602c5dfd106SDon Brace 5603c5dfd106SDon Brace if (dev->in_reset) { 5604c5dfd106SDon Brace cmd->result = DID_RESET << 16; 5605d2315ce6SDon Brace return hpsa_cmd_free_and_done(c->h, c, cmd); 5606c5dfd106SDon Brace } 5607c5dfd106SDon Brace 5608592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5609592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5610592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5611592a0ad5SWebb Scales int rc; 5612592a0ad5SWebb Scales 5613592a0ad5SWebb Scales if (c2->error_data.serv_response == 5614592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5615c5dfd106SDon Brace rc = hpsa_ioaccel_submit(h, c, cmd); 5616592a0ad5SWebb Scales if (rc == 0) 5617592a0ad5SWebb Scales return; 5618592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5619592a0ad5SWebb Scales /* 5620592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5621592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5622592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5623592a0ad5SWebb Scales */ 5624592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 56258a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5626592a0ad5SWebb Scales } 5627592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5628592a0ad5SWebb Scales } 5629592a0ad5SWebb Scales } 5630360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5631c5dfd106SDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev)) { 5632080ef1ccSDon Brace /* 5633080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5634080ef1ccSDon Brace * again via scsi mid layer, which will then get 5635080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5636592a0ad5SWebb Scales * 5637592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5638592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5639080ef1ccSDon Brace */ 5640080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5641080ef1ccSDon Brace cmd->scsi_done(cmd); 5642080ef1ccSDon Brace } 5643080ef1ccSDon Brace } 5644080ef1ccSDon Brace 5645574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5646574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5647574f05d3SStephen Cameron { 5648574f05d3SStephen Cameron struct ctlr_info *h; 5649574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5650574f05d3SStephen Cameron struct CommandList *c; 5651574f05d3SStephen Cameron int rc = 0; 5652574f05d3SStephen Cameron 5653574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5654574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 565573153fe5SWebb Scales 565673153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 565773153fe5SWebb Scales 5658574f05d3SStephen Cameron dev = cmd->device->hostdata; 5659574f05d3SStephen Cameron if (!dev) { 56601ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5661ba74fdc4SDon Brace cmd->scsi_done(cmd); 5662ba74fdc4SDon Brace return 0; 5663ba74fdc4SDon Brace } 5664ba74fdc4SDon Brace 5665ba74fdc4SDon Brace if (dev->removed) { 5666574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5667574f05d3SStephen Cameron cmd->scsi_done(cmd); 5668574f05d3SStephen Cameron return 0; 5669574f05d3SStephen Cameron } 567073153fe5SWebb Scales 5671574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 567225163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5673574f05d3SStephen Cameron cmd->scsi_done(cmd); 5674574f05d3SStephen Cameron return 0; 5675574f05d3SStephen Cameron } 5676c5dfd106SDon Brace 5677c5dfd106SDon Brace if (dev->in_reset) 5678c5dfd106SDon Brace return SCSI_MLQUEUE_DEVICE_BUSY; 5679c5dfd106SDon Brace 568073153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 56814770e68dSDon Brace if (c == NULL) 56824770e68dSDon Brace return SCSI_MLQUEUE_DEVICE_BUSY; 5683574f05d3SStephen Cameron 5684407863cbSStephen Cameron /* 5685eeebce18SDon Brace * This is necessary because the SML doesn't zero out this field during 5686eeebce18SDon Brace * error recovery. 5687eeebce18SDon Brace */ 5688eeebce18SDon Brace cmd->result = 0; 5689eeebce18SDon Brace 5690eeebce18SDon Brace /* 5691407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5692574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5693574f05d3SStephen Cameron */ 5694574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 569557292b58SChristoph Hellwig !blk_rq_is_passthrough(cmd->request) && 5696574f05d3SStephen Cameron h->acciopath_status)) { 5697c5dfd106SDon Brace rc = hpsa_ioaccel_submit(h, c, cmd); 5698574f05d3SStephen Cameron if (rc == 0) 5699592a0ad5SWebb Scales return 0; 5700592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 570173153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5702574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5703574f05d3SStephen Cameron } 5704574f05d3SStephen Cameron } 5705c5dfd106SDon Brace return hpsa_ciss_submit(h, c, cmd, dev); 5706574f05d3SStephen Cameron } 5707574f05d3SStephen Cameron 57088ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 57095f389360SStephen M. Cameron { 57105f389360SStephen M. Cameron unsigned long flags; 57115f389360SStephen M. Cameron 57125f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 57135f389360SStephen M. Cameron h->scan_finished = 1; 571487b9e6aaSDon Brace wake_up(&h->scan_wait_queue); 57155f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 57165f389360SStephen M. Cameron } 57175f389360SStephen M. Cameron 5718a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5719a08a8471SStephen M. Cameron { 5720a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5721a08a8471SStephen M. Cameron unsigned long flags; 5722a08a8471SStephen M. Cameron 57238ebc9248SWebb Scales /* 57248ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 57258ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 57268ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 57278ebc9248SWebb Scales * piling up on a locked up controller. 57288ebc9248SWebb Scales */ 57298ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 57308ebc9248SWebb Scales return hpsa_scan_complete(h); 57315f389360SStephen M. Cameron 573287b9e6aaSDon Brace /* 573387b9e6aaSDon Brace * If a scan is already waiting to run, no need to add another 573487b9e6aaSDon Brace */ 573587b9e6aaSDon Brace spin_lock_irqsave(&h->scan_lock, flags); 573687b9e6aaSDon Brace if (h->scan_waiting) { 573787b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 573887b9e6aaSDon Brace return; 573987b9e6aaSDon Brace } 574087b9e6aaSDon Brace 574187b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 574287b9e6aaSDon Brace 5743a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5744a08a8471SStephen M. Cameron while (1) { 5745a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5746a08a8471SStephen M. Cameron if (h->scan_finished) 5747a08a8471SStephen M. Cameron break; 574887b9e6aaSDon Brace h->scan_waiting = 1; 5749a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5750a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5751a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5752a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5753a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5754a08a8471SStephen M. Cameron * happen if we're in here. 5755a08a8471SStephen M. Cameron */ 5756a08a8471SStephen M. Cameron } 5757a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 575887b9e6aaSDon Brace h->scan_waiting = 0; 5759a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5760a08a8471SStephen M. Cameron 57618ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 57628ebc9248SWebb Scales return hpsa_scan_complete(h); 57635f389360SStephen M. Cameron 5764bfd7546cSDon Brace /* 5765bfd7546cSDon Brace * Do the scan after a reset completion 5766bfd7546cSDon Brace */ 5767c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5768bfd7546cSDon Brace if (h->reset_in_progress) { 5769bfd7546cSDon Brace h->drv_req_rescan = 1; 5770c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 57713b476aa2SDon Brace hpsa_scan_complete(h); 5772bfd7546cSDon Brace return; 5773bfd7546cSDon Brace } 5774c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5775bfd7546cSDon Brace 57768aa60681SDon Brace hpsa_update_scsi_devices(h); 5777a08a8471SStephen M. Cameron 57788ebc9248SWebb Scales hpsa_scan_complete(h); 5779a08a8471SStephen M. Cameron } 5780a08a8471SStephen M. Cameron 57817c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 57827c0a0229SDon Brace { 578303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 578403383736SDon Brace 578503383736SDon Brace if (!logical_drive) 578603383736SDon Brace return -ENODEV; 57877c0a0229SDon Brace 57887c0a0229SDon Brace if (qdepth < 1) 57897c0a0229SDon Brace qdepth = 1; 579003383736SDon Brace else if (qdepth > logical_drive->queue_depth) 579103383736SDon Brace qdepth = logical_drive->queue_depth; 579203383736SDon Brace 579303383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 57947c0a0229SDon Brace } 57957c0a0229SDon Brace 5796a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5797a08a8471SStephen M. Cameron unsigned long elapsed_time) 5798a08a8471SStephen M. Cameron { 5799a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5800a08a8471SStephen M. Cameron unsigned long flags; 5801a08a8471SStephen M. Cameron int finished; 5802a08a8471SStephen M. Cameron 5803a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5804a08a8471SStephen M. Cameron finished = h->scan_finished; 5805a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5806a08a8471SStephen M. Cameron return finished; 5807a08a8471SStephen M. Cameron } 5808a08a8471SStephen M. Cameron 58092946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5810edd16368SStephen M. Cameron { 5811b705690dSStephen M. Cameron struct Scsi_Host *sh; 5812edd16368SStephen M. Cameron 5813b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 58142946e82bSRobert Elliott if (sh == NULL) { 58152946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 58162946e82bSRobert Elliott return -ENOMEM; 58172946e82bSRobert Elliott } 5818b705690dSStephen M. Cameron 5819b705690dSStephen M. Cameron sh->io_port = 0; 5820b705690dSStephen M. Cameron sh->n_io_port = 0; 5821b705690dSStephen M. Cameron sh->this_id = -1; 5822b705690dSStephen M. Cameron sh->max_channel = 3; 5823b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5824b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5825b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 582641ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5827d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5828b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5829d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5830b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5831bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5832b705690dSStephen M. Cameron sh->unique_id = sh->irq; 583364d513acSChristoph Hellwig 58342946e82bSRobert Elliott h->scsi_host = sh; 58352946e82bSRobert Elliott return 0; 58362946e82bSRobert Elliott } 58372946e82bSRobert Elliott 58382946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 58392946e82bSRobert Elliott { 58402946e82bSRobert Elliott int rv; 58412946e82bSRobert Elliott 58422946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 58432946e82bSRobert Elliott if (rv) { 58442946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 58452946e82bSRobert Elliott return rv; 58462946e82bSRobert Elliott } 58472946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 58482946e82bSRobert Elliott return 0; 5849edd16368SStephen M. Cameron } 5850edd16368SStephen M. Cameron 5851b69324ffSWebb Scales /* 585273153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 585373153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 585473153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 585573153fe5SWebb Scales * low-numbered entries for our own uses.) 585673153fe5SWebb Scales */ 585773153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 585873153fe5SWebb Scales { 585973153fe5SWebb Scales int idx = scmd->request->tag; 586073153fe5SWebb Scales 586173153fe5SWebb Scales if (idx < 0) 586273153fe5SWebb Scales return idx; 586373153fe5SWebb Scales 586473153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 586573153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 586673153fe5SWebb Scales } 586773153fe5SWebb Scales 586873153fe5SWebb Scales /* 5869b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5870b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5871b69324ffSWebb Scales */ 5872b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5873b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5874b69324ffSWebb Scales int reply_queue) 5875edd16368SStephen M. Cameron { 58768919358eSTomas Henzl int rc; 5877edd16368SStephen M. Cameron 5878a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5879a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5880a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 58811edb6934SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 588225163bd5SWebb Scales if (rc) 5883b69324ffSWebb Scales return rc; 5884edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5885edd16368SStephen M. Cameron 5886b69324ffSWebb Scales /* Check if the unit is already ready. */ 5887edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5888b69324ffSWebb Scales return 0; 5889edd16368SStephen M. Cameron 5890b69324ffSWebb Scales /* 5891b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5892b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5893b69324ffSWebb Scales * looking for (but, success is good too). 5894b69324ffSWebb Scales */ 5895edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5896edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5897edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5898edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5899b69324ffSWebb Scales return 0; 5900b69324ffSWebb Scales 5901b69324ffSWebb Scales return 1; 5902b69324ffSWebb Scales } 5903b69324ffSWebb Scales 5904b69324ffSWebb Scales /* 5905b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5906b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5907b69324ffSWebb Scales */ 5908b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5909b69324ffSWebb Scales struct CommandList *c, 5910b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5911b69324ffSWebb Scales { 5912b69324ffSWebb Scales int rc; 5913b69324ffSWebb Scales int count = 0; 5914b69324ffSWebb Scales int waittime = 1; /* seconds */ 5915b69324ffSWebb Scales 5916b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5917b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5918b69324ffSWebb Scales 5919b69324ffSWebb Scales /* 5920b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5921b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5922b69324ffSWebb Scales */ 5923b69324ffSWebb Scales msleep(1000 * waittime); 5924b69324ffSWebb Scales 5925b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5926b69324ffSWebb Scales if (!rc) 5927edd16368SStephen M. Cameron break; 5928b69324ffSWebb Scales 5929b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5930b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5931b69324ffSWebb Scales waittime *= 2; 5932b69324ffSWebb Scales 5933b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5934b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5935b69324ffSWebb Scales waittime); 5936b69324ffSWebb Scales } 5937b69324ffSWebb Scales 5938b69324ffSWebb Scales return rc; 5939b69324ffSWebb Scales } 5940b69324ffSWebb Scales 5941b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5942b69324ffSWebb Scales unsigned char lunaddr[], 5943b69324ffSWebb Scales int reply_queue) 5944b69324ffSWebb Scales { 5945b69324ffSWebb Scales int first_queue; 5946b69324ffSWebb Scales int last_queue; 5947b69324ffSWebb Scales int rq; 5948b69324ffSWebb Scales int rc = 0; 5949b69324ffSWebb Scales struct CommandList *c; 5950b69324ffSWebb Scales 5951b69324ffSWebb Scales c = cmd_alloc(h); 5952b69324ffSWebb Scales 5953b69324ffSWebb Scales /* 5954b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5955b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5956b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5957b69324ffSWebb Scales */ 5958b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5959b69324ffSWebb Scales first_queue = 0; 5960b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5961b69324ffSWebb Scales } else { 5962b69324ffSWebb Scales first_queue = reply_queue; 5963b69324ffSWebb Scales last_queue = reply_queue; 5964b69324ffSWebb Scales } 5965b69324ffSWebb Scales 5966b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5967b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5968b69324ffSWebb Scales if (rc) 5969b69324ffSWebb Scales break; 5970edd16368SStephen M. Cameron } 5971edd16368SStephen M. Cameron 5972edd16368SStephen M. Cameron if (rc) 5973edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5974edd16368SStephen M. Cameron else 5975edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5976edd16368SStephen M. Cameron 597745fcb86eSStephen Cameron cmd_free(h, c); 5978edd16368SStephen M. Cameron return rc; 5979edd16368SStephen M. Cameron } 5980edd16368SStephen M. Cameron 5981edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5982edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5983edd16368SStephen M. Cameron */ 5984edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5985edd16368SStephen M. Cameron { 5986c59d04f3SDon Brace int rc = SUCCESS; 5987c5dfd106SDon Brace int i; 5988edd16368SStephen M. Cameron struct ctlr_info *h; 598936631157SColin Ian King struct hpsa_scsi_dev_t *dev = NULL; 59900b9b7b6eSScott Teel u8 reset_type; 59912dc127bbSDan Carpenter char msg[48]; 5992c59d04f3SDon Brace unsigned long flags; 5993edd16368SStephen M. Cameron 5994edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5995edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5996edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5997edd16368SStephen M. Cameron return FAILED; 5998e345893bSDon Brace 5999c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 6000c59d04f3SDon Brace h->reset_in_progress = 1; 6001c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 6002c59d04f3SDon Brace 6003c59d04f3SDon Brace if (lockup_detected(h)) { 6004c59d04f3SDon Brace rc = FAILED; 6005c59d04f3SDon Brace goto return_reset_status; 6006c59d04f3SDon Brace } 6007e345893bSDon Brace 6008edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 6009edd16368SStephen M. Cameron if (!dev) { 6010d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 6011c59d04f3SDon Brace rc = FAILED; 6012c59d04f3SDon Brace goto return_reset_status; 6013edd16368SStephen M. Cameron } 601425163bd5SWebb Scales 6015c59d04f3SDon Brace if (dev->devtype == TYPE_ENCLOSURE) { 6016c59d04f3SDon Brace rc = SUCCESS; 6017c59d04f3SDon Brace goto return_reset_status; 6018c59d04f3SDon Brace } 6019ef8a5203SDon Brace 602025163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 602125163bd5SWebb Scales if (lockup_detected(h)) { 60222dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 60232dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 602473153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 602573153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6026c59d04f3SDon Brace rc = FAILED; 6027c59d04f3SDon Brace goto return_reset_status; 602825163bd5SWebb Scales } 602925163bd5SWebb Scales 603025163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 603125163bd5SWebb Scales if (detect_controller_lockup(h)) { 60322dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 60332dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 603473153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 603573153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6036c59d04f3SDon Brace rc = FAILED; 6037c59d04f3SDon Brace goto return_reset_status; 603825163bd5SWebb Scales } 603925163bd5SWebb Scales 6040d604f533SWebb Scales /* Do not attempt on controller */ 6041c59d04f3SDon Brace if (is_hba_lunid(dev->scsi3addr)) { 6042c59d04f3SDon Brace rc = SUCCESS; 6043c59d04f3SDon Brace goto return_reset_status; 6044c59d04f3SDon Brace } 6045d604f533SWebb Scales 60460b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 60470b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 60480b9b7b6eSScott Teel else 60490b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 60500b9b7b6eSScott Teel 60510b9b7b6eSScott Teel sprintf(msg, "resetting %s", 60520b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 60530b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 605425163bd5SWebb Scales 6055c5dfd106SDon Brace /* 6056c5dfd106SDon Brace * wait to see if any commands will complete before sending reset 6057c5dfd106SDon Brace */ 6058c5dfd106SDon Brace dev->in_reset = true; /* block any new cmds from OS for this device */ 6059c5dfd106SDon Brace for (i = 0; i < 10; i++) { 6060c5dfd106SDon Brace if (atomic_read(&dev->commands_outstanding) > 0) 6061c5dfd106SDon Brace msleep(1000); 6062c5dfd106SDon Brace else 6063c5dfd106SDon Brace break; 6064c5dfd106SDon Brace } 6065c5dfd106SDon Brace 6066edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 6067c5dfd106SDon Brace rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE); 6068c59d04f3SDon Brace if (rc == 0) 6069c59d04f3SDon Brace rc = SUCCESS; 6070c59d04f3SDon Brace else 6071c59d04f3SDon Brace rc = FAILED; 6072c59d04f3SDon Brace 60730b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 60740b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 6075c59d04f3SDon Brace rc == SUCCESS ? "completed successfully" : "failed"); 6076d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6077c59d04f3SDon Brace 6078c59d04f3SDon Brace return_reset_status: 6079c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 6080da03ded0SDon Brace h->reset_in_progress = 0; 6081c5dfd106SDon Brace if (dev) 6082c5dfd106SDon Brace dev->in_reset = false; 6083c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 6084c59d04f3SDon Brace return rc; 6085edd16368SStephen M. Cameron } 6086edd16368SStephen M. Cameron 6087edd16368SStephen M. Cameron /* 608873153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 608973153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 609073153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 609173153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 609273153fe5SWebb Scales */ 609373153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 609473153fe5SWebb Scales struct scsi_cmnd *scmd) 609573153fe5SWebb Scales { 609673153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 609773153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 609873153fe5SWebb Scales 609973153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 610073153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 610173153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 610273153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 610373153fe5SWebb Scales * bounds, it's probably not our bug. 610473153fe5SWebb Scales */ 610573153fe5SWebb Scales BUG(); 610673153fe5SWebb Scales } 610773153fe5SWebb Scales 610873153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 610973153fe5SWebb Scales /* 611073153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 611173153fe5SWebb Scales * value. Thus, there should never be a collision here between 611273153fe5SWebb Scales * two requests...because if the selected command isn't idle 611373153fe5SWebb Scales * then someone is going to be very disappointed. 611473153fe5SWebb Scales */ 61154770e68dSDon Brace if (idx != h->last_collision_tag) { /* Print once per tag */ 61164770e68dSDon Brace dev_warn(&h->pdev->dev, 61174770e68dSDon Brace "%s: tag collision (tag=%d)\n", __func__, idx); 61184770e68dSDon Brace if (scmd) 611973153fe5SWebb Scales scsi_print_command(scmd); 61204770e68dSDon Brace h->last_collision_tag = idx; 612173153fe5SWebb Scales } 61224770e68dSDon Brace return NULL; 61234770e68dSDon Brace } 61244770e68dSDon Brace 61254770e68dSDon Brace atomic_inc(&c->refcount); 612673153fe5SWebb Scales 612773153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 612873153fe5SWebb Scales return c; 612973153fe5SWebb Scales } 613073153fe5SWebb Scales 613173153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 613273153fe5SWebb Scales { 613373153fe5SWebb Scales /* 613473153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 613508ec46f6SDon Brace * else to free it, because it is accessed by index. 613673153fe5SWebb Scales */ 613773153fe5SWebb Scales (void)atomic_dec(&c->refcount); 613873153fe5SWebb Scales } 613973153fe5SWebb Scales 614073153fe5SWebb Scales /* 6141edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6142edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6143edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6144edd16368SStephen M. Cameron * cmd_free() is the complement. 6145bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6146bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6147edd16368SStephen M. Cameron */ 6148281a7fd0SWebb Scales 6149edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6150edd16368SStephen M. Cameron { 6151edd16368SStephen M. Cameron struct CommandList *c; 6152360c73bdSStephen Cameron int refcount, i; 615373153fe5SWebb Scales int offset = 0; 6154edd16368SStephen M. Cameron 615533811026SRobert Elliott /* 615633811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 61574c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 61584c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 61594c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 61604c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 61614c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 61624c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 61634c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 61644c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 616573153fe5SWebb Scales * 616673153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 616773153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 616873153fe5SWebb Scales * all works, since we have at least one command structure available; 616973153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 617073153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 617173153fe5SWebb Scales * layer will use the higher indexes. 61724c413128SStephen M. Cameron */ 61734c413128SStephen M. Cameron 6174281a7fd0SWebb Scales for (;;) { 617573153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 617673153fe5SWebb Scales HPSA_NRESERVED_CMDS, 617773153fe5SWebb Scales offset); 617873153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6179281a7fd0SWebb Scales offset = 0; 6180281a7fd0SWebb Scales continue; 6181281a7fd0SWebb Scales } 6182edd16368SStephen M. Cameron c = h->cmd_pool + i; 6183281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6184281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6185281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 618673153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6187281a7fd0SWebb Scales continue; 6188281a7fd0SWebb Scales } 6189281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6190281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6191281a7fd0SWebb Scales break; /* it's ours now. */ 6192281a7fd0SWebb Scales } 6193360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6194c5dfd106SDon Brace c->device = NULL; 6195edd16368SStephen M. Cameron return c; 6196edd16368SStephen M. Cameron } 6197edd16368SStephen M. Cameron 619873153fe5SWebb Scales /* 619973153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 620073153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 620173153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 620273153fe5SWebb Scales * the clear-bit is harmless. 620373153fe5SWebb Scales */ 6204edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6205edd16368SStephen M. Cameron { 6206281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6207edd16368SStephen M. Cameron int i; 6208edd16368SStephen M. Cameron 6209edd16368SStephen M. Cameron i = c - h->cmd_pool; 6210edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6211edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6212edd16368SStephen M. Cameron } 6213281a7fd0SWebb Scales } 6214edd16368SStephen M. Cameron 6215edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6216edd16368SStephen M. Cameron 62176f4e626fSNathan Chancellor static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd, 621842a91641SDon Brace void __user *arg) 6219edd16368SStephen M. Cameron { 6220edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6221edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6222edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6223edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6224edd16368SStephen M. Cameron int err; 6225edd16368SStephen M. Cameron u32 cp; 6226edd16368SStephen M. Cameron 6227938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6228edd16368SStephen M. Cameron err = 0; 6229edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6230edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6231edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6232edd16368SStephen M. Cameron sizeof(arg64.Request)); 6233edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6234edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6235edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6236edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6237edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6238edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6239edd16368SStephen M. Cameron 6240edd16368SStephen M. Cameron if (err) 6241edd16368SStephen M. Cameron return -EFAULT; 6242edd16368SStephen M. Cameron 624342a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6244edd16368SStephen M. Cameron if (err) 6245edd16368SStephen M. Cameron return err; 6246edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6247edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6248edd16368SStephen M. Cameron if (err) 6249edd16368SStephen M. Cameron return -EFAULT; 6250edd16368SStephen M. Cameron return err; 6251edd16368SStephen M. Cameron } 6252edd16368SStephen M. Cameron 6253edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 62546f4e626fSNathan Chancellor unsigned int cmd, void __user *arg) 6255edd16368SStephen M. Cameron { 6256edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6257edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6258edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6259edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6260edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6261edd16368SStephen M. Cameron int err; 6262edd16368SStephen M. Cameron u32 cp; 6263edd16368SStephen M. Cameron 6264938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6265edd16368SStephen M. Cameron err = 0; 6266edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6267edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6268edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6269edd16368SStephen M. Cameron sizeof(arg64.Request)); 6270edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6271edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6272edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6273edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6274edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6275edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6276edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6277edd16368SStephen M. Cameron 6278edd16368SStephen M. Cameron if (err) 6279edd16368SStephen M. Cameron return -EFAULT; 6280edd16368SStephen M. Cameron 628142a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6282edd16368SStephen M. Cameron if (err) 6283edd16368SStephen M. Cameron return err; 6284edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6285edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6286edd16368SStephen M. Cameron if (err) 6287edd16368SStephen M. Cameron return -EFAULT; 6288edd16368SStephen M. Cameron return err; 6289edd16368SStephen M. Cameron } 629071fe75a7SStephen M. Cameron 62916f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 62926f4e626fSNathan Chancellor void __user *arg) 629371fe75a7SStephen M. Cameron { 629471fe75a7SStephen M. Cameron switch (cmd) { 629571fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 629671fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 629771fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 629871fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 629971fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 630071fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 630171fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 630271fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 630371fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 630471fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 630571fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 630671fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 630771fe75a7SStephen M. Cameron case CCISS_REGNEWD: 630871fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 630971fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 631071fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 631171fe75a7SStephen M. Cameron 631271fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 631371fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 631471fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 631571fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 631671fe75a7SStephen M. Cameron 631771fe75a7SStephen M. Cameron default: 631871fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 631971fe75a7SStephen M. Cameron } 632071fe75a7SStephen M. Cameron } 6321edd16368SStephen M. Cameron #endif 6322edd16368SStephen M. Cameron 6323edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6324edd16368SStephen M. Cameron { 6325edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6326edd16368SStephen M. Cameron 6327edd16368SStephen M. Cameron if (!argp) 6328edd16368SStephen M. Cameron return -EINVAL; 6329edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6330edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6331edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6332edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6333edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6334edd16368SStephen M. Cameron return -EFAULT; 6335edd16368SStephen M. Cameron return 0; 6336edd16368SStephen M. Cameron } 6337edd16368SStephen M. Cameron 6338edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6339edd16368SStephen M. Cameron { 6340edd16368SStephen M. Cameron DriverVer_type DriverVer; 6341edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6342edd16368SStephen M. Cameron int rc; 6343edd16368SStephen M. Cameron 6344edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6345edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6346edd16368SStephen M. Cameron if (rc != 3) { 6347edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6348edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6349edd16368SStephen M. Cameron vmaj = 0; 6350edd16368SStephen M. Cameron vmin = 0; 6351edd16368SStephen M. Cameron vsubmin = 0; 6352edd16368SStephen M. Cameron } 6353edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6354edd16368SStephen M. Cameron if (!argp) 6355edd16368SStephen M. Cameron return -EINVAL; 6356edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6357edd16368SStephen M. Cameron return -EFAULT; 6358edd16368SStephen M. Cameron return 0; 6359edd16368SStephen M. Cameron } 6360edd16368SStephen M. Cameron 6361edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6362edd16368SStephen M. Cameron { 6363edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6364edd16368SStephen M. Cameron struct CommandList *c; 6365edd16368SStephen M. Cameron char *buff = NULL; 636650a0decfSStephen M. Cameron u64 temp64; 6367c1f63c8fSStephen M. Cameron int rc = 0; 6368edd16368SStephen M. Cameron 6369edd16368SStephen M. Cameron if (!argp) 6370edd16368SStephen M. Cameron return -EINVAL; 6371edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6372edd16368SStephen M. Cameron return -EPERM; 6373edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6374edd16368SStephen M. Cameron return -EFAULT; 6375edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6376edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6377edd16368SStephen M. Cameron return -EINVAL; 6378edd16368SStephen M. Cameron } 6379edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6380edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6381edd16368SStephen M. Cameron if (buff == NULL) 63822dd02d74SRobert Elliott return -ENOMEM; 63839233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6384edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6385b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6386b03a7771SStephen M. Cameron iocommand.buf_size)) { 6387c1f63c8fSStephen M. Cameron rc = -EFAULT; 6388c1f63c8fSStephen M. Cameron goto out_kfree; 6389edd16368SStephen M. Cameron } 6390b03a7771SStephen M. Cameron } else { 6391edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6392b03a7771SStephen M. Cameron } 6393b03a7771SStephen M. Cameron } 639445fcb86eSStephen Cameron c = cmd_alloc(h); 6395bf43caf3SRobert Elliott 6396edd16368SStephen M. Cameron /* Fill in the command type */ 6397edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6398a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6399edd16368SStephen M. Cameron /* Fill in Command Header */ 6400edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6401edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6402edd16368SStephen M. Cameron c->Header.SGList = 1; 640350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6404edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6405edd16368SStephen M. Cameron c->Header.SGList = 0; 640650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6407edd16368SStephen M. Cameron } 6408edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6409edd16368SStephen M. Cameron 6410edd16368SStephen M. Cameron /* Fill in Request block */ 6411edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6412edd16368SStephen M. Cameron sizeof(c->Request)); 6413edd16368SStephen M. Cameron 6414edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6415edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 64168bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, buff, 64178bc8f47eSChristoph Hellwig iocommand.buf_size, DMA_BIDIRECTIONAL); 641850a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 641950a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 642050a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6421bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6422bcc48ffaSStephen M. Cameron goto out; 6423bcc48ffaSStephen M. Cameron } 642450a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 642550a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 642650a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6427edd16368SStephen M. Cameron } 6428c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 64293fb134cbSDon Brace NO_TIMEOUT); 6430c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 64318bc8f47eSChristoph Hellwig hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6432edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 643325163bd5SWebb Scales if (rc) { 643425163bd5SWebb Scales rc = -EIO; 643525163bd5SWebb Scales goto out; 643625163bd5SWebb Scales } 6437edd16368SStephen M. Cameron 6438edd16368SStephen M. Cameron /* Copy the error information out */ 6439edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6440edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6441edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6442c1f63c8fSStephen M. Cameron rc = -EFAULT; 6443c1f63c8fSStephen M. Cameron goto out; 6444edd16368SStephen M. Cameron } 64459233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6446b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6447edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6448edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6449c1f63c8fSStephen M. Cameron rc = -EFAULT; 6450c1f63c8fSStephen M. Cameron goto out; 6451edd16368SStephen M. Cameron } 6452edd16368SStephen M. Cameron } 6453c1f63c8fSStephen M. Cameron out: 645445fcb86eSStephen Cameron cmd_free(h, c); 6455c1f63c8fSStephen M. Cameron out_kfree: 6456c1f63c8fSStephen M. Cameron kfree(buff); 6457c1f63c8fSStephen M. Cameron return rc; 6458edd16368SStephen M. Cameron } 6459edd16368SStephen M. Cameron 6460edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6461edd16368SStephen M. Cameron { 6462edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6463edd16368SStephen M. Cameron struct CommandList *c; 6464edd16368SStephen M. Cameron unsigned char **buff = NULL; 6465edd16368SStephen M. Cameron int *buff_size = NULL; 646650a0decfSStephen M. Cameron u64 temp64; 6467edd16368SStephen M. Cameron BYTE sg_used = 0; 6468edd16368SStephen M. Cameron int status = 0; 646901a02ffcSStephen M. Cameron u32 left; 647001a02ffcSStephen M. Cameron u32 sz; 6471edd16368SStephen M. Cameron BYTE __user *data_ptr; 6472edd16368SStephen M. Cameron 6473edd16368SStephen M. Cameron if (!argp) 6474edd16368SStephen M. Cameron return -EINVAL; 6475edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6476edd16368SStephen M. Cameron return -EPERM; 6477048a864eSzhong jiang ioc = vmemdup_user(argp, sizeof(*ioc)); 6478048a864eSzhong jiang if (IS_ERR(ioc)) { 6479048a864eSzhong jiang status = PTR_ERR(ioc); 6480edd16368SStephen M. Cameron goto cleanup1; 6481edd16368SStephen M. Cameron } 6482edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6483edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6484edd16368SStephen M. Cameron status = -EINVAL; 6485edd16368SStephen M. Cameron goto cleanup1; 6486edd16368SStephen M. Cameron } 6487edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6488edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6489edd16368SStephen M. Cameron status = -EINVAL; 6490edd16368SStephen M. Cameron goto cleanup1; 6491edd16368SStephen M. Cameron } 6492d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6493edd16368SStephen M. Cameron status = -EINVAL; 6494edd16368SStephen M. Cameron goto cleanup1; 6495edd16368SStephen M. Cameron } 64966396bb22SKees Cook buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6497edd16368SStephen M. Cameron if (!buff) { 6498edd16368SStephen M. Cameron status = -ENOMEM; 6499edd16368SStephen M. Cameron goto cleanup1; 6500edd16368SStephen M. Cameron } 65016da2ec56SKees Cook buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6502edd16368SStephen M. Cameron if (!buff_size) { 6503edd16368SStephen M. Cameron status = -ENOMEM; 6504edd16368SStephen M. Cameron goto cleanup1; 6505edd16368SStephen M. Cameron } 6506edd16368SStephen M. Cameron left = ioc->buf_size; 6507edd16368SStephen M. Cameron data_ptr = ioc->buf; 6508edd16368SStephen M. Cameron while (left) { 6509edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6510edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6511edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6512edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6513edd16368SStephen M. Cameron status = -ENOMEM; 6514edd16368SStephen M. Cameron goto cleanup1; 6515edd16368SStephen M. Cameron } 65169233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6517edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 65180758f4f7SStephen M. Cameron status = -EFAULT; 6519edd16368SStephen M. Cameron goto cleanup1; 6520edd16368SStephen M. Cameron } 6521edd16368SStephen M. Cameron } else 6522edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6523edd16368SStephen M. Cameron left -= sz; 6524edd16368SStephen M. Cameron data_ptr += sz; 6525edd16368SStephen M. Cameron sg_used++; 6526edd16368SStephen M. Cameron } 652745fcb86eSStephen Cameron c = cmd_alloc(h); 6528bf43caf3SRobert Elliott 6529edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6530a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6531edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 653250a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 653350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6534edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6535edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6536edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6537edd16368SStephen M. Cameron int i; 6538edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 65398bc8f47eSChristoph Hellwig temp64 = dma_map_single(&h->pdev->dev, buff[i], 65408bc8f47eSChristoph Hellwig buff_size[i], DMA_BIDIRECTIONAL); 654150a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 654250a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 654350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 654450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6545bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 65468bc8f47eSChristoph Hellwig DMA_BIDIRECTIONAL); 6547bcc48ffaSStephen M. Cameron status = -ENOMEM; 6548e2d4a1f6SStephen M. Cameron goto cleanup0; 6549bcc48ffaSStephen M. Cameron } 655050a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 655150a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 655250a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6553edd16368SStephen M. Cameron } 655450a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6555edd16368SStephen M. Cameron } 6556c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 65573fb134cbSDon Brace NO_TIMEOUT); 6558b03a7771SStephen M. Cameron if (sg_used) 65598bc8f47eSChristoph Hellwig hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6560edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 656125163bd5SWebb Scales if (status) { 656225163bd5SWebb Scales status = -EIO; 656325163bd5SWebb Scales goto cleanup0; 656425163bd5SWebb Scales } 656525163bd5SWebb Scales 6566edd16368SStephen M. Cameron /* Copy the error information out */ 6567edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6568edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6569edd16368SStephen M. Cameron status = -EFAULT; 6570e2d4a1f6SStephen M. Cameron goto cleanup0; 6571edd16368SStephen M. Cameron } 65729233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 65732b08b3e9SDon Brace int i; 65742b08b3e9SDon Brace 6575edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6576edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6577edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6578edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6579edd16368SStephen M. Cameron status = -EFAULT; 6580e2d4a1f6SStephen M. Cameron goto cleanup0; 6581edd16368SStephen M. Cameron } 6582edd16368SStephen M. Cameron ptr += buff_size[i]; 6583edd16368SStephen M. Cameron } 6584edd16368SStephen M. Cameron } 6585edd16368SStephen M. Cameron status = 0; 6586e2d4a1f6SStephen M. Cameron cleanup0: 658745fcb86eSStephen Cameron cmd_free(h, c); 6588edd16368SStephen M. Cameron cleanup1: 6589edd16368SStephen M. Cameron if (buff) { 65902b08b3e9SDon Brace int i; 65912b08b3e9SDon Brace 6592edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6593edd16368SStephen M. Cameron kfree(buff[i]); 6594edd16368SStephen M. Cameron kfree(buff); 6595edd16368SStephen M. Cameron } 6596edd16368SStephen M. Cameron kfree(buff_size); 6597048a864eSzhong jiang kvfree(ioc); 6598edd16368SStephen M. Cameron return status; 6599edd16368SStephen M. Cameron } 6600edd16368SStephen M. Cameron 6601edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6602edd16368SStephen M. Cameron struct CommandList *c) 6603edd16368SStephen M. Cameron { 6604edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6605edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6606edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6607edd16368SStephen M. Cameron } 66080390f0c0SStephen M. Cameron 6609edd16368SStephen M. Cameron /* 6610edd16368SStephen M. Cameron * ioctl 6611edd16368SStephen M. Cameron */ 66126f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 66136f4e626fSNathan Chancellor void __user *arg) 6614edd16368SStephen M. Cameron { 6615edd16368SStephen M. Cameron struct ctlr_info *h; 6616edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 66170390f0c0SStephen M. Cameron int rc; 6618edd16368SStephen M. Cameron 6619edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6620edd16368SStephen M. Cameron 6621edd16368SStephen M. Cameron switch (cmd) { 6622edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6623edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6624edd16368SStephen M. Cameron case CCISS_REGNEWD: 6625a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6626edd16368SStephen M. Cameron return 0; 6627edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6628edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6629edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6630edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6631edd16368SStephen M. Cameron case CCISS_PASSTHRU: 663234f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 66330390f0c0SStephen M. Cameron return -EAGAIN; 66340390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 663534f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 66360390f0c0SStephen M. Cameron return rc; 6637edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 663834f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 66390390f0c0SStephen M. Cameron return -EAGAIN; 66400390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 664134f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 66420390f0c0SStephen M. Cameron return rc; 6643edd16368SStephen M. Cameron default: 6644edd16368SStephen M. Cameron return -ENOTTY; 6645edd16368SStephen M. Cameron } 6646edd16368SStephen M. Cameron } 6647edd16368SStephen M. Cameron 6648c5dfd106SDon Brace static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type) 664964670ac8SStephen M. Cameron { 665064670ac8SStephen M. Cameron struct CommandList *c; 665164670ac8SStephen M. Cameron 665264670ac8SStephen M. Cameron c = cmd_alloc(h); 6653bf43caf3SRobert Elliott 6654a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6655a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 665664670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 665764670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 665864670ac8SStephen M. Cameron c->waiting = NULL; 665964670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 666064670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 666164670ac8SStephen M. Cameron * the command either. This is the last command we will send before 666264670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 666364670ac8SStephen M. Cameron */ 6664bf43caf3SRobert Elliott return; 666564670ac8SStephen M. Cameron } 666664670ac8SStephen M. Cameron 6667a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6668b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6669edd16368SStephen M. Cameron int cmd_type) 6670edd16368SStephen M. Cameron { 66718bc8f47eSChristoph Hellwig enum dma_data_direction dir = DMA_NONE; 6672edd16368SStephen M. Cameron 6673edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6674a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6675edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6676edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6677edd16368SStephen M. Cameron c->Header.SGList = 1; 667850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6679edd16368SStephen M. Cameron } else { 6680edd16368SStephen M. Cameron c->Header.SGList = 0; 668150a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6682edd16368SStephen M. Cameron } 6683edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6684edd16368SStephen M. Cameron 6685edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6686edd16368SStephen M. Cameron switch (cmd) { 6687edd16368SStephen M. Cameron case HPSA_INQUIRY: 6688edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6689b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6690edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6691b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6692edd16368SStephen M. Cameron } 6693edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6694a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6695a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6696edd16368SStephen M. Cameron c->Request.Timeout = 0; 6697edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6698edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6699edd16368SStephen M. Cameron break; 67000a7c3bb8SDon Brace case RECEIVE_DIAGNOSTIC: 67010a7c3bb8SDon Brace c->Request.CDBLen = 6; 67020a7c3bb8SDon Brace c->Request.type_attr_dir = 67030a7c3bb8SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 67040a7c3bb8SDon Brace c->Request.Timeout = 0; 67050a7c3bb8SDon Brace c->Request.CDB[0] = cmd; 67060a7c3bb8SDon Brace c->Request.CDB[1] = 1; 67070a7c3bb8SDon Brace c->Request.CDB[2] = 1; 67080a7c3bb8SDon Brace c->Request.CDB[3] = (size >> 8) & 0xFF; 67090a7c3bb8SDon Brace c->Request.CDB[4] = size & 0xFF; 67100a7c3bb8SDon Brace break; 6711edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6712edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6713edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6714edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6715edd16368SStephen M. Cameron */ 6716edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6717a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6718a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6719edd16368SStephen M. Cameron c->Request.Timeout = 0; 6720edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6721edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6722edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6723edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6724edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6725edd16368SStephen M. Cameron break; 6726c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6727c2adae44SScott Teel c->Request.CDBLen = 16; 6728c2adae44SScott Teel c->Request.type_attr_dir = 6729c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6730c2adae44SScott Teel c->Request.Timeout = 0; 6731c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6732c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6733c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6734c2adae44SScott Teel break; 6735c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6736c2adae44SScott Teel c->Request.CDBLen = 16; 6737c2adae44SScott Teel c->Request.type_attr_dir = 6738c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6739c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6740c2adae44SScott Teel c->Request.Timeout = 0; 6741c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6742c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6743c2adae44SScott Teel break; 6744edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6745edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6746a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6747a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6748a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6749edd16368SStephen M. Cameron c->Request.Timeout = 0; 6750edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6751edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6752bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6753bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6754edd16368SStephen M. Cameron break; 6755edd16368SStephen M. Cameron case TEST_UNIT_READY: 6756edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6757a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6758a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6759edd16368SStephen M. Cameron c->Request.Timeout = 0; 6760edd16368SStephen M. Cameron break; 6761283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6762283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6763a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6764a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6765283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6766283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6767283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6768283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6769283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6770283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6771283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6772283b4a9bSStephen M. Cameron break; 6773316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6774316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6775a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6776a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6777316b221aSStephen M. Cameron c->Request.Timeout = 0; 6778316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6779316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6780316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6781316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6782316b221aSStephen M. Cameron break; 678303383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 678403383736SDon Brace c->Request.CDBLen = 10; 678503383736SDon Brace c->Request.type_attr_dir = 678603383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 678703383736SDon Brace c->Request.Timeout = 0; 678803383736SDon Brace c->Request.CDB[0] = BMIC_READ; 678903383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 679003383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 679103383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 679203383736SDon Brace break; 6793d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6794d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6795d04e62b9SKevin Barnett c->Request.type_attr_dir = 6796d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6797d04e62b9SKevin Barnett c->Request.Timeout = 0; 6798d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6799d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6800d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6801d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6802d04e62b9SKevin Barnett break; 6803cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6804cca8f13bSDon Brace c->Request.CDBLen = 10; 6805cca8f13bSDon Brace c->Request.type_attr_dir = 6806cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6807cca8f13bSDon Brace c->Request.Timeout = 0; 6808cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6809cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6810cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6811cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6812cca8f13bSDon Brace break; 681366749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 681466749d0dSScott Teel c->Request.CDBLen = 10; 681566749d0dSScott Teel c->Request.type_attr_dir = 681666749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 681766749d0dSScott Teel c->Request.Timeout = 0; 681866749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 681966749d0dSScott Teel c->Request.CDB[1] = 0; 682066749d0dSScott Teel c->Request.CDB[2] = 0; 682166749d0dSScott Teel c->Request.CDB[3] = 0; 682266749d0dSScott Teel c->Request.CDB[4] = 0; 682366749d0dSScott Teel c->Request.CDB[5] = 0; 682466749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 682566749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 682666749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 682766749d0dSScott Teel c->Request.CDB[9] = 0; 682866749d0dSScott Teel break; 6829edd16368SStephen M. Cameron default: 6830edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6831edd16368SStephen M. Cameron BUG(); 6832edd16368SStephen M. Cameron } 6833edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6834edd16368SStephen M. Cameron switch (cmd) { 6835edd16368SStephen M. Cameron 68360b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 68370b9b7b6eSScott Teel c->Request.CDBLen = 16; 68380b9b7b6eSScott Teel c->Request.type_attr_dir = 68390b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 68400b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 68410b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 68420b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 68430b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 68440b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 68450b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 68460b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 68470b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 68480b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 68490b9b7b6eSScott Teel break; 6850edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6851edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6852a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6853a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6854edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 685564670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 685664670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 685721e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6858edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6859edd16368SStephen M. Cameron /* LunID device */ 6860edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6861edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6862edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6863edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6864edd16368SStephen M. Cameron break; 6865edd16368SStephen M. Cameron default: 6866edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6867edd16368SStephen M. Cameron cmd); 6868edd16368SStephen M. Cameron BUG(); 6869edd16368SStephen M. Cameron } 6870edd16368SStephen M. Cameron } else { 6871edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6872edd16368SStephen M. Cameron BUG(); 6873edd16368SStephen M. Cameron } 6874edd16368SStephen M. Cameron 6875a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6876edd16368SStephen M. Cameron case XFER_READ: 68778bc8f47eSChristoph Hellwig dir = DMA_FROM_DEVICE; 6878edd16368SStephen M. Cameron break; 6879edd16368SStephen M. Cameron case XFER_WRITE: 68808bc8f47eSChristoph Hellwig dir = DMA_TO_DEVICE; 6881edd16368SStephen M. Cameron break; 6882edd16368SStephen M. Cameron case XFER_NONE: 68838bc8f47eSChristoph Hellwig dir = DMA_NONE; 6884edd16368SStephen M. Cameron break; 6885edd16368SStephen M. Cameron default: 68868bc8f47eSChristoph Hellwig dir = DMA_BIDIRECTIONAL; 6887edd16368SStephen M. Cameron } 68888bc8f47eSChristoph Hellwig if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6889a2dac136SStephen M. Cameron return -1; 6890a2dac136SStephen M. Cameron return 0; 6891edd16368SStephen M. Cameron } 6892edd16368SStephen M. Cameron 6893edd16368SStephen M. Cameron /* 6894edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6895edd16368SStephen M. Cameron */ 6896edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6897edd16368SStephen M. Cameron { 6898edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6899edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 69004bdc0d67SChristoph Hellwig void __iomem *page_remapped = ioremap(page_base, 6901088ba34cSStephen M. Cameron page_offs + size); 6902edd16368SStephen M. Cameron 6903edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6904edd16368SStephen M. Cameron } 6905edd16368SStephen M. Cameron 6906254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6907edd16368SStephen M. Cameron { 6908254f796bSMatt Gates return h->access.command_completed(h, q); 6909edd16368SStephen M. Cameron } 6910edd16368SStephen M. Cameron 6911900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6912edd16368SStephen M. Cameron { 6913edd16368SStephen M. Cameron return h->access.intr_pending(h); 6914edd16368SStephen M. Cameron } 6915edd16368SStephen M. Cameron 6916edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6917edd16368SStephen M. Cameron { 691810f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 691910f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6920edd16368SStephen M. Cameron } 6921edd16368SStephen M. Cameron 692201a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 692301a02ffcSStephen M. Cameron u32 raw_tag) 6924edd16368SStephen M. Cameron { 6925edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6926edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6927edd16368SStephen M. Cameron return 1; 6928edd16368SStephen M. Cameron } 6929edd16368SStephen M. Cameron return 0; 6930edd16368SStephen M. Cameron } 6931edd16368SStephen M. Cameron 69325a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6933edd16368SStephen M. Cameron { 6934e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6935c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6936c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 69371fb011fbSStephen M. Cameron complete_scsi_command(c); 69388be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6939edd16368SStephen M. Cameron complete(c->waiting); 6940a104c99fSStephen M. Cameron } 6941a104c99fSStephen M. Cameron 6942303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 69431d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6944303932fdSDon Brace u32 raw_tag) 6945303932fdSDon Brace { 6946303932fdSDon Brace u32 tag_index; 6947303932fdSDon Brace struct CommandList *c; 6948303932fdSDon Brace 6949f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 69501d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6951303932fdSDon Brace c = h->cmd_pool + tag_index; 69525a3d16f5SStephen M. Cameron finish_cmd(c); 69531d94f94dSStephen M. Cameron } 6954303932fdSDon Brace } 6955303932fdSDon Brace 695664670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 695764670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 695864670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 695964670ac8SStephen M. Cameron * functions. 696064670ac8SStephen M. Cameron */ 696164670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 696264670ac8SStephen M. Cameron { 696364670ac8SStephen M. Cameron if (likely(!reset_devices)) 696464670ac8SStephen M. Cameron return 0; 696564670ac8SStephen M. Cameron 696664670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 696764670ac8SStephen M. Cameron return 0; 696864670ac8SStephen M. Cameron 696964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 697064670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 697164670ac8SStephen M. Cameron 697264670ac8SStephen M. Cameron return 1; 697364670ac8SStephen M. Cameron } 697464670ac8SStephen M. Cameron 6975254f796bSMatt Gates /* 6976254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6977254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6978254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6979254f796bSMatt Gates */ 6980254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 698164670ac8SStephen M. Cameron { 6982254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6983254f796bSMatt Gates } 6984254f796bSMatt Gates 6985254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6986254f796bSMatt Gates { 6987254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6988254f796bSMatt Gates u8 q = *(u8 *) queue; 698964670ac8SStephen M. Cameron u32 raw_tag; 699064670ac8SStephen M. Cameron 699164670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 699264670ac8SStephen M. Cameron return IRQ_NONE; 699364670ac8SStephen M. Cameron 699464670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 699564670ac8SStephen M. Cameron return IRQ_NONE; 6996a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 699764670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6998254f796bSMatt Gates raw_tag = get_next_completion(h, q); 699964670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7000254f796bSMatt Gates raw_tag = next_command(h, q); 700164670ac8SStephen M. Cameron } 700264670ac8SStephen M. Cameron return IRQ_HANDLED; 700364670ac8SStephen M. Cameron } 700464670ac8SStephen M. Cameron 7005254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 700664670ac8SStephen M. Cameron { 7007254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 700864670ac8SStephen M. Cameron u32 raw_tag; 7009254f796bSMatt Gates u8 q = *(u8 *) queue; 701064670ac8SStephen M. Cameron 701164670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 701264670ac8SStephen M. Cameron return IRQ_NONE; 701364670ac8SStephen M. Cameron 7014a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7015254f796bSMatt Gates raw_tag = get_next_completion(h, q); 701664670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7017254f796bSMatt Gates raw_tag = next_command(h, q); 701864670ac8SStephen M. Cameron return IRQ_HANDLED; 701964670ac8SStephen M. Cameron } 702064670ac8SStephen M. Cameron 7021254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7022edd16368SStephen M. Cameron { 7023254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7024303932fdSDon Brace u32 raw_tag; 7025254f796bSMatt Gates u8 q = *(u8 *) queue; 7026edd16368SStephen M. Cameron 7027edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7028edd16368SStephen M. Cameron return IRQ_NONE; 7029a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 703010f66018SStephen M. Cameron while (interrupt_pending(h)) { 7031254f796bSMatt Gates raw_tag = get_next_completion(h, q); 703210f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 70331d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7034254f796bSMatt Gates raw_tag = next_command(h, q); 703510f66018SStephen M. Cameron } 703610f66018SStephen M. Cameron } 703710f66018SStephen M. Cameron return IRQ_HANDLED; 703810f66018SStephen M. Cameron } 703910f66018SStephen M. Cameron 7040254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 704110f66018SStephen M. Cameron { 7042254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 704310f66018SStephen M. Cameron u32 raw_tag; 7044254f796bSMatt Gates u8 q = *(u8 *) queue; 704510f66018SStephen M. Cameron 7046a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7047254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7048303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 70491d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7050254f796bSMatt Gates raw_tag = next_command(h, q); 7051edd16368SStephen M. Cameron } 7052edd16368SStephen M. Cameron return IRQ_HANDLED; 7053edd16368SStephen M. Cameron } 7054edd16368SStephen M. Cameron 7055a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7056a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7057a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7058a9a3a273SStephen M. Cameron */ 70596f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7060edd16368SStephen M. Cameron unsigned char type) 7061edd16368SStephen M. Cameron { 7062edd16368SStephen M. Cameron struct Command { 7063edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7064edd16368SStephen M. Cameron struct RequestBlock Request; 7065edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7066edd16368SStephen M. Cameron }; 7067edd16368SStephen M. Cameron struct Command *cmd; 7068edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7069edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7070edd16368SStephen M. Cameron dma_addr_t paddr64; 70712b08b3e9SDon Brace __le32 paddr32; 70722b08b3e9SDon Brace u32 tag; 7073edd16368SStephen M. Cameron void __iomem *vaddr; 7074edd16368SStephen M. Cameron int i, err; 7075edd16368SStephen M. Cameron 7076edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7077edd16368SStephen M. Cameron if (vaddr == NULL) 7078edd16368SStephen M. Cameron return -ENOMEM; 7079edd16368SStephen M. Cameron 7080edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7081edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7082edd16368SStephen M. Cameron * memory. 7083edd16368SStephen M. Cameron */ 70848bc8f47eSChristoph Hellwig err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 7085edd16368SStephen M. Cameron if (err) { 7086edd16368SStephen M. Cameron iounmap(vaddr); 70871eaec8f3SRobert Elliott return err; 7088edd16368SStephen M. Cameron } 7089edd16368SStephen M. Cameron 70908bc8f47eSChristoph Hellwig cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 7091edd16368SStephen M. Cameron if (cmd == NULL) { 7092edd16368SStephen M. Cameron iounmap(vaddr); 7093edd16368SStephen M. Cameron return -ENOMEM; 7094edd16368SStephen M. Cameron } 7095edd16368SStephen M. Cameron 7096edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7097edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7098edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7099edd16368SStephen M. Cameron */ 71002b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7101edd16368SStephen M. Cameron 7102edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7103edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 710450a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 71052b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7106edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7107edd16368SStephen M. Cameron 7108edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7109a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7110a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7111edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7112edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7113edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7114edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 711550a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 71162b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 711750a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7118edd16368SStephen M. Cameron 71192b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7120edd16368SStephen M. Cameron 7121edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7122edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 71232b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7124edd16368SStephen M. Cameron break; 7125edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7126edd16368SStephen M. Cameron } 7127edd16368SStephen M. Cameron 7128edd16368SStephen M. Cameron iounmap(vaddr); 7129edd16368SStephen M. Cameron 7130edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7131edd16368SStephen M. Cameron * still complete the command. 7132edd16368SStephen M. Cameron */ 7133edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7134edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7135edd16368SStephen M. Cameron opcode, type); 7136edd16368SStephen M. Cameron return -ETIMEDOUT; 7137edd16368SStephen M. Cameron } 7138edd16368SStephen M. Cameron 71398bc8f47eSChristoph Hellwig dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7140edd16368SStephen M. Cameron 7141edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7142edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7143edd16368SStephen M. Cameron opcode, type); 7144edd16368SStephen M. Cameron return -EIO; 7145edd16368SStephen M. Cameron } 7146edd16368SStephen M. Cameron 7147edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7148edd16368SStephen M. Cameron opcode, type); 7149edd16368SStephen M. Cameron return 0; 7150edd16368SStephen M. Cameron } 7151edd16368SStephen M. Cameron 7152edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7153edd16368SStephen M. Cameron 71541df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 715542a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7156edd16368SStephen M. Cameron { 7157edd16368SStephen M. Cameron 71581df8552aSStephen M. Cameron if (use_doorbell) { 71591df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 71601df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 71611df8552aSStephen M. Cameron * other way using the doorbell register. 7162edd16368SStephen M. Cameron */ 71631df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7164cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 716585009239SStephen M. Cameron 716600701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 716785009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 716885009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 716985009239SStephen M. Cameron * over in some weird corner cases. 717085009239SStephen M. Cameron */ 717100701a96SJustin Lindley msleep(10000); 71721df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7173edd16368SStephen M. Cameron 7174edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7175edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7176edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7177edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 71781df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 71791df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 71801df8552aSStephen M. Cameron * controller." */ 7181edd16368SStephen M. Cameron 71822662cab8SDon Brace int rc = 0; 71832662cab8SDon Brace 71841df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 71852662cab8SDon Brace 7186edd16368SStephen M. Cameron /* enter the D3hot power management state */ 71872662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 71882662cab8SDon Brace if (rc) 71892662cab8SDon Brace return rc; 7190edd16368SStephen M. Cameron 7191edd16368SStephen M. Cameron msleep(500); 7192edd16368SStephen M. Cameron 7193edd16368SStephen M. Cameron /* enter the D0 power management state */ 71942662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 71952662cab8SDon Brace if (rc) 71962662cab8SDon Brace return rc; 7197c4853efeSMike Miller 7198c4853efeSMike Miller /* 7199c4853efeSMike Miller * The P600 requires a small delay when changing states. 7200c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7201c4853efeSMike Miller * This for kdump only and is particular to the P600. 7202c4853efeSMike Miller */ 7203c4853efeSMike Miller msleep(500); 72041df8552aSStephen M. Cameron } 72051df8552aSStephen M. Cameron return 0; 72061df8552aSStephen M. Cameron } 72071df8552aSStephen M. Cameron 72086f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7209580ada3cSStephen M. Cameron { 7210580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7211f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7212580ada3cSStephen M. Cameron } 7213580ada3cSStephen M. Cameron 72146f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7215580ada3cSStephen M. Cameron { 7216580ada3cSStephen M. Cameron char *driver_version; 7217580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7218580ada3cSStephen M. Cameron 7219580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7220580ada3cSStephen M. Cameron if (!driver_version) 7221580ada3cSStephen M. Cameron return -ENOMEM; 7222580ada3cSStephen M. Cameron 7223580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7224580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7225580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7226580ada3cSStephen M. Cameron kfree(driver_version); 7227580ada3cSStephen M. Cameron return 0; 7228580ada3cSStephen M. Cameron } 7229580ada3cSStephen M. Cameron 72306f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 72316f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7232580ada3cSStephen M. Cameron { 7233580ada3cSStephen M. Cameron int i; 7234580ada3cSStephen M. Cameron 7235580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7236580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7237580ada3cSStephen M. Cameron } 7238580ada3cSStephen M. Cameron 72396f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7240580ada3cSStephen M. Cameron { 7241580ada3cSStephen M. Cameron 7242580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7243580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7244580ada3cSStephen M. Cameron 72456da2ec56SKees Cook old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7246580ada3cSStephen M. Cameron if (!old_driver_ver) 7247580ada3cSStephen M. Cameron return -ENOMEM; 7248580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7249580ada3cSStephen M. Cameron 7250580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7251580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7252580ada3cSStephen M. Cameron */ 7253580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7254580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7255580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7256580ada3cSStephen M. Cameron kfree(old_driver_ver); 7257580ada3cSStephen M. Cameron return rc; 7258580ada3cSStephen M. Cameron } 72591df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 72601df8552aSStephen M. Cameron * states or the using the doorbell register. 72611df8552aSStephen M. Cameron */ 72626b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 72631df8552aSStephen M. Cameron { 72641df8552aSStephen M. Cameron u64 cfg_offset; 72651df8552aSStephen M. Cameron u32 cfg_base_addr; 72661df8552aSStephen M. Cameron u64 cfg_base_addr_index; 72671df8552aSStephen M. Cameron void __iomem *vaddr; 72681df8552aSStephen M. Cameron unsigned long paddr; 7269580ada3cSStephen M. Cameron u32 misc_fw_support; 7270270d05deSStephen M. Cameron int rc; 72711df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7272cf0b08d0SStephen M. Cameron u32 use_doorbell; 7273270d05deSStephen M. Cameron u16 command_register; 72741df8552aSStephen M. Cameron 72751df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 72761df8552aSStephen M. Cameron * the same thing as 72771df8552aSStephen M. Cameron * 72781df8552aSStephen M. Cameron * pci_save_state(pci_dev); 72791df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 72801df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 72811df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 72821df8552aSStephen M. Cameron * 72831df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 72841df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 72851df8552aSStephen M. Cameron * using the doorbell register. 72861df8552aSStephen M. Cameron */ 728718867659SStephen M. Cameron 728860f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 728960f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 729025c1e56aSStephen M. Cameron return -ENODEV; 729125c1e56aSStephen M. Cameron } 729246380786SStephen M. Cameron 729346380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 729446380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 729546380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 729618867659SStephen M. Cameron 7297270d05deSStephen M. Cameron /* Save the PCI command register */ 7298270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7299270d05deSStephen M. Cameron pci_save_state(pdev); 73001df8552aSStephen M. Cameron 73011df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 73021df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 73031df8552aSStephen M. Cameron if (rc) 73041df8552aSStephen M. Cameron return rc; 73051df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 73061df8552aSStephen M. Cameron if (!vaddr) 73071df8552aSStephen M. Cameron return -ENOMEM; 73081df8552aSStephen M. Cameron 73091df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 73101df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 73111df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 73121df8552aSStephen M. Cameron if (rc) 73131df8552aSStephen M. Cameron goto unmap_vaddr; 73141df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 73151df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 73161df8552aSStephen M. Cameron if (!cfgtable) { 73171df8552aSStephen M. Cameron rc = -ENOMEM; 73181df8552aSStephen M. Cameron goto unmap_vaddr; 73191df8552aSStephen M. Cameron } 7320580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7321580ada3cSStephen M. Cameron if (rc) 732203741d95STomas Henzl goto unmap_cfgtable; 73231df8552aSStephen M. Cameron 7324cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7325cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7326cf0b08d0SStephen M. Cameron */ 73271df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7328cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7329cf0b08d0SStephen M. Cameron if (use_doorbell) { 7330cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7331cf0b08d0SStephen M. Cameron } else { 73321df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7333cf0b08d0SStephen M. Cameron if (use_doorbell) { 7334050f7147SStephen Cameron dev_warn(&pdev->dev, 7335050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 733664670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7337cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7338cf0b08d0SStephen M. Cameron } 7339cf0b08d0SStephen M. Cameron } 73401df8552aSStephen M. Cameron 73411df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 73421df8552aSStephen M. Cameron if (rc) 73431df8552aSStephen M. Cameron goto unmap_cfgtable; 7344edd16368SStephen M. Cameron 7345270d05deSStephen M. Cameron pci_restore_state(pdev); 7346270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7347edd16368SStephen M. Cameron 73481df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 73491df8552aSStephen M. Cameron need a little pause here */ 73501df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 73511df8552aSStephen M. Cameron 7352fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7353fe5389c8SStephen M. Cameron if (rc) { 7354fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7355050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7356fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7357fe5389c8SStephen M. Cameron } 7358fe5389c8SStephen M. Cameron 7359580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7360580ada3cSStephen M. Cameron if (rc < 0) 7361580ada3cSStephen M. Cameron goto unmap_cfgtable; 7362580ada3cSStephen M. Cameron if (rc) { 736364670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 736464670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 736564670ac8SStephen M. Cameron rc = -ENOTSUPP; 7366580ada3cSStephen M. Cameron } else { 736764670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 73681df8552aSStephen M. Cameron } 73691df8552aSStephen M. Cameron 73701df8552aSStephen M. Cameron unmap_cfgtable: 73711df8552aSStephen M. Cameron iounmap(cfgtable); 73721df8552aSStephen M. Cameron 73731df8552aSStephen M. Cameron unmap_vaddr: 73741df8552aSStephen M. Cameron iounmap(vaddr); 73751df8552aSStephen M. Cameron return rc; 7376edd16368SStephen M. Cameron } 7377edd16368SStephen M. Cameron 7378edd16368SStephen M. Cameron /* 7379edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7380edd16368SStephen M. Cameron * the io functions. 7381edd16368SStephen M. Cameron * This is for debug only. 7382edd16368SStephen M. Cameron */ 738342a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7384edd16368SStephen M. Cameron { 738558f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7386edd16368SStephen M. Cameron int i; 7387edd16368SStephen M. Cameron char temp_name[17]; 7388edd16368SStephen M. Cameron 7389edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7390edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7391edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7392edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7393edd16368SStephen M. Cameron temp_name[4] = '\0'; 7394edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7395edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7396edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7397edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7398edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7399edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7400edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7401edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7402edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7403edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7404edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7405edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 740669d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7407edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7408edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7409edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7410edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7411edd16368SStephen M. Cameron temp_name[16] = '\0'; 7412edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7413edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7414edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7415edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 741658f8665cSStephen M. Cameron } 7417edd16368SStephen M. Cameron 7418edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7419edd16368SStephen M. Cameron { 7420edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7421edd16368SStephen M. Cameron 7422edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7423edd16368SStephen M. Cameron return 0; 7424edd16368SStephen M. Cameron offset = 0; 7425edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7426edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7427edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7428edd16368SStephen M. Cameron offset += 4; 7429edd16368SStephen M. Cameron else { 7430edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7431edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7432edd16368SStephen M. Cameron switch (mem_type) { 7433edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7434edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7435edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7436edd16368SStephen M. Cameron break; 7437edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7438edd16368SStephen M. Cameron offset += 8; 7439edd16368SStephen M. Cameron break; 7440edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7441edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7442edd16368SStephen M. Cameron "base address is invalid\n"); 7443edd16368SStephen M. Cameron return -1; 7444edd16368SStephen M. Cameron break; 7445edd16368SStephen M. Cameron } 7446edd16368SStephen M. Cameron } 7447edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7448edd16368SStephen M. Cameron return i + 1; 7449edd16368SStephen M. Cameron } 7450edd16368SStephen M. Cameron return -1; 7451edd16368SStephen M. Cameron } 7452edd16368SStephen M. Cameron 7453cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7454cc64c817SRobert Elliott { 7455bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7456bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7457cc64c817SRobert Elliott } 7458cc64c817SRobert Elliott 74598b834bffSMing Lei static void hpsa_setup_reply_map(struct ctlr_info *h) 74608b834bffSMing Lei { 74618b834bffSMing Lei const struct cpumask *mask; 74628b834bffSMing Lei unsigned int queue, cpu; 74638b834bffSMing Lei 74648b834bffSMing Lei for (queue = 0; queue < h->msix_vectors; queue++) { 74658b834bffSMing Lei mask = pci_irq_get_affinity(h->pdev, queue); 74668b834bffSMing Lei if (!mask) 74678b834bffSMing Lei goto fallback; 74688b834bffSMing Lei 74698b834bffSMing Lei for_each_cpu(cpu, mask) 74708b834bffSMing Lei h->reply_map[cpu] = queue; 74718b834bffSMing Lei } 74728b834bffSMing Lei return; 74738b834bffSMing Lei 74748b834bffSMing Lei fallback: 74758b834bffSMing Lei for_each_possible_cpu(cpu) 74768b834bffSMing Lei h->reply_map[cpu] = 0; 74778b834bffSMing Lei } 74788b834bffSMing Lei 7479edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7480050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7481edd16368SStephen M. Cameron */ 7482bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7483edd16368SStephen M. Cameron { 7484bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7485bc2bb154SChristoph Hellwig int ret; 7486edd16368SStephen M. Cameron 7487edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7488bc2bb154SChristoph Hellwig switch (h->board_id) { 7489bc2bb154SChristoph Hellwig case 0x40700E11: 7490bc2bb154SChristoph Hellwig case 0x40800E11: 7491bc2bb154SChristoph Hellwig case 0x40820E11: 7492bc2bb154SChristoph Hellwig case 0x40830E11: 7493bc2bb154SChristoph Hellwig break; 7494bc2bb154SChristoph Hellwig default: 7495bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7496bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7497bc2bb154SChristoph Hellwig if (ret > 0) { 7498bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7499bc2bb154SChristoph Hellwig return 0; 7500eee0f03aSHannes Reinecke } 7501bc2bb154SChristoph Hellwig 7502bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7503bc2bb154SChristoph Hellwig break; 7504edd16368SStephen M. Cameron } 7505bc2bb154SChristoph Hellwig 7506bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7507bc2bb154SChristoph Hellwig if (ret < 0) 7508bc2bb154SChristoph Hellwig return ret; 7509bc2bb154SChristoph Hellwig return 0; 7510edd16368SStephen M. Cameron } 7511edd16368SStephen M. Cameron 7512135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7513135ae6edSHannes Reinecke bool *legacy_board) 7514e5c880d1SStephen M. Cameron { 7515e5c880d1SStephen M. Cameron int i; 7516e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7517e5c880d1SStephen M. Cameron 7518e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7519e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7520e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7521e5c880d1SStephen M. Cameron subsystem_vendor_id; 7522e5c880d1SStephen M. Cameron 7523135ae6edSHannes Reinecke if (legacy_board) 7524135ae6edSHannes Reinecke *legacy_board = false; 7525e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7526135ae6edSHannes Reinecke if (*board_id == products[i].board_id) { 7527135ae6edSHannes Reinecke if (products[i].access != &SA5A_access && 7528135ae6edSHannes Reinecke products[i].access != &SA5B_access) 7529e5c880d1SStephen M. Cameron return i; 7530135ae6edSHannes Reinecke dev_warn(&pdev->dev, 7531135ae6edSHannes Reinecke "legacy board ID: 0x%08x\n", 7532135ae6edSHannes Reinecke *board_id); 7533135ae6edSHannes Reinecke if (legacy_board) 7534135ae6edSHannes Reinecke *legacy_board = true; 7535135ae6edSHannes Reinecke return i; 7536135ae6edSHannes Reinecke } 7537e5c880d1SStephen M. Cameron 7538c8cd71f1SHannes Reinecke dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7539135ae6edSHannes Reinecke if (legacy_board) 7540135ae6edSHannes Reinecke *legacy_board = true; 7541e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7542e5c880d1SStephen M. Cameron } 7543e5c880d1SStephen M. Cameron 75446f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 75453a7774ceSStephen M. Cameron unsigned long *memory_bar) 75463a7774ceSStephen M. Cameron { 75473a7774ceSStephen M. Cameron int i; 75483a7774ceSStephen M. Cameron 75493a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 755012d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 75513a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 755212d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 755312d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 75543a7774ceSStephen M. Cameron *memory_bar); 75553a7774ceSStephen M. Cameron return 0; 75563a7774ceSStephen M. Cameron } 755712d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 75583a7774ceSStephen M. Cameron return -ENODEV; 75593a7774ceSStephen M. Cameron } 75603a7774ceSStephen M. Cameron 75616f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 75626f039790SGreg Kroah-Hartman int wait_for_ready) 75632c4c8c8bSStephen M. Cameron { 7564fe5389c8SStephen M. Cameron int i, iterations; 75652c4c8c8bSStephen M. Cameron u32 scratchpad; 7566fe5389c8SStephen M. Cameron if (wait_for_ready) 7567fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7568fe5389c8SStephen M. Cameron else 7569fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 75702c4c8c8bSStephen M. Cameron 7571fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7572fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7573fe5389c8SStephen M. Cameron if (wait_for_ready) { 75742c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 75752c4c8c8bSStephen M. Cameron return 0; 7576fe5389c8SStephen M. Cameron } else { 7577fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7578fe5389c8SStephen M. Cameron return 0; 7579fe5389c8SStephen M. Cameron } 75802c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 75812c4c8c8bSStephen M. Cameron } 7582fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 75832c4c8c8bSStephen M. Cameron return -ENODEV; 75842c4c8c8bSStephen M. Cameron } 75852c4c8c8bSStephen M. Cameron 75866f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 75876f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7588a51fd47fSStephen M. Cameron u64 *cfg_offset) 7589a51fd47fSStephen M. Cameron { 7590a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7591a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7592a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7593a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7594a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7595a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7596a51fd47fSStephen M. Cameron return -ENODEV; 7597a51fd47fSStephen M. Cameron } 7598a51fd47fSStephen M. Cameron return 0; 7599a51fd47fSStephen M. Cameron } 7600a51fd47fSStephen M. Cameron 7601195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7602195f2c65SRobert Elliott { 7603105a3dbcSRobert Elliott if (h->transtable) { 7604195f2c65SRobert Elliott iounmap(h->transtable); 7605105a3dbcSRobert Elliott h->transtable = NULL; 7606105a3dbcSRobert Elliott } 7607105a3dbcSRobert Elliott if (h->cfgtable) { 7608195f2c65SRobert Elliott iounmap(h->cfgtable); 7609105a3dbcSRobert Elliott h->cfgtable = NULL; 7610105a3dbcSRobert Elliott } 7611195f2c65SRobert Elliott } 7612195f2c65SRobert Elliott 7613195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7614195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7615195f2c65SRobert Elliott + * */ 76166f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7617edd16368SStephen M. Cameron { 761801a02ffcSStephen M. Cameron u64 cfg_offset; 761901a02ffcSStephen M. Cameron u32 cfg_base_addr; 762001a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7621303932fdSDon Brace u32 trans_offset; 7622a51fd47fSStephen M. Cameron int rc; 762377c4495cSStephen M. Cameron 7624a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7625a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7626a51fd47fSStephen M. Cameron if (rc) 7627a51fd47fSStephen M. Cameron return rc; 762877c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7629a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7630cd3c81c4SRobert Elliott if (!h->cfgtable) { 7631cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 763277c4495cSStephen M. Cameron return -ENOMEM; 7633cd3c81c4SRobert Elliott } 7634580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7635580ada3cSStephen M. Cameron if (rc) 7636580ada3cSStephen M. Cameron return rc; 763777c4495cSStephen M. Cameron /* Find performant mode table. */ 7638a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 763977c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 764077c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 764177c4495cSStephen M. Cameron sizeof(*h->transtable)); 7642195f2c65SRobert Elliott if (!h->transtable) { 7643195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7644195f2c65SRobert Elliott hpsa_free_cfgtables(h); 764577c4495cSStephen M. Cameron return -ENOMEM; 7646195f2c65SRobert Elliott } 764777c4495cSStephen M. Cameron return 0; 764877c4495cSStephen M. Cameron } 764977c4495cSStephen M. Cameron 76506f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7651cba3d38bSStephen M. Cameron { 765241ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 765341ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 765441ce4c35SStephen Cameron 765541ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 765672ceeaecSStephen M. Cameron 765772ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 765872ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 765972ceeaecSStephen M. Cameron h->max_commands = 32; 766072ceeaecSStephen M. Cameron 766141ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 766241ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 766341ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 766441ce4c35SStephen Cameron h->max_commands, 766541ce4c35SStephen Cameron MIN_MAX_COMMANDS); 766641ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7667cba3d38bSStephen M. Cameron } 7668cba3d38bSStephen M. Cameron } 7669cba3d38bSStephen M. Cameron 7670c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7671c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7672c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7673c7ee65b3SWebb Scales */ 7674c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7675c7ee65b3SWebb Scales { 7676c7ee65b3SWebb Scales return h->maxsgentries > 512; 7677c7ee65b3SWebb Scales } 7678c7ee65b3SWebb Scales 7679b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7680b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7681b93d7536SStephen M. Cameron * SG chain block size, etc. 7682b93d7536SStephen M. Cameron */ 76836f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7684b93d7536SStephen M. Cameron { 7685cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 768645fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7687b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7688283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7689c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7690c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7691b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 76921a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7693b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7694b93d7536SStephen M. Cameron } else { 7695c7ee65b3SWebb Scales /* 7696c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7697c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7698c7ee65b3SWebb Scales * would lock up the controller) 7699c7ee65b3SWebb Scales */ 7700c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 77011a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7702c7ee65b3SWebb Scales h->chainsize = 0; 7703b93d7536SStephen M. Cameron } 770475167d2cSStephen M. Cameron 770575167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 770675167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 77070e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 77080e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 77090e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 77100e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 77118be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 77128be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7713b93d7536SStephen M. Cameron } 7714b93d7536SStephen M. Cameron 771576c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 771676c46e49SStephen M. Cameron { 77170fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7718050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 771976c46e49SStephen M. Cameron return false; 772076c46e49SStephen M. Cameron } 772176c46e49SStephen M. Cameron return true; 772276c46e49SStephen M. Cameron } 772376c46e49SStephen M. Cameron 772497a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7725f7c39101SStephen M. Cameron { 772697a5e98cSStephen M. Cameron u32 driver_support; 7727f7c39101SStephen M. Cameron 772897a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 77290b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 77300b9e7b74SArnd Bergmann #ifdef CONFIG_X86 773197a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7732f7c39101SStephen M. Cameron #endif 773328e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 773428e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7735f7c39101SStephen M. Cameron } 7736f7c39101SStephen M. Cameron 77373d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 77383d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 77393d0eab67SStephen M. Cameron */ 77403d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 77413d0eab67SStephen M. Cameron { 77423d0eab67SStephen M. Cameron u32 dma_prefetch; 77433d0eab67SStephen M. Cameron 77443d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 77453d0eab67SStephen M. Cameron return; 77463d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 77473d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 77483d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 77493d0eab67SStephen M. Cameron } 77503d0eab67SStephen M. Cameron 7751c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 775276438d08SStephen M. Cameron { 775376438d08SStephen M. Cameron int i; 775476438d08SStephen M. Cameron u32 doorbell_value; 775576438d08SStephen M. Cameron unsigned long flags; 775676438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7757007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 775876438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 775976438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 776076438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 776176438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7762c706a795SRobert Elliott goto done; 776376438d08SStephen M. Cameron /* delay and try again */ 7764007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 776576438d08SStephen M. Cameron } 7766c706a795SRobert Elliott return -ENODEV; 7767c706a795SRobert Elliott done: 7768c706a795SRobert Elliott return 0; 776976438d08SStephen M. Cameron } 777076438d08SStephen M. Cameron 7771c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7772eb6b2ae9SStephen M. Cameron { 7773eb6b2ae9SStephen M. Cameron int i; 77746eaf46fdSStephen M. Cameron u32 doorbell_value; 77756eaf46fdSStephen M. Cameron unsigned long flags; 7776eb6b2ae9SStephen M. Cameron 7777eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7778eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7779eb6b2ae9SStephen M. Cameron * as we enter this code.) 7780eb6b2ae9SStephen M. Cameron */ 7781007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 778225163bd5SWebb Scales if (h->remove_in_progress) 778325163bd5SWebb Scales goto done; 77846eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 77856eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 77866eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7787382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7788c706a795SRobert Elliott goto done; 7789eb6b2ae9SStephen M. Cameron /* delay and try again */ 7790007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7791eb6b2ae9SStephen M. Cameron } 7792c706a795SRobert Elliott return -ENODEV; 7793c706a795SRobert Elliott done: 7794c706a795SRobert Elliott return 0; 77953f4336f3SStephen M. Cameron } 77963f4336f3SStephen M. Cameron 7797c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 77986f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 77993f4336f3SStephen M. Cameron { 78003f4336f3SStephen M. Cameron u32 trans_support; 78013f4336f3SStephen M. Cameron 78023f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 78033f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 78043f4336f3SStephen M. Cameron return -ENOTSUPP; 78053f4336f3SStephen M. Cameron 78063f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7807283b4a9bSStephen M. Cameron 78083f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 78093f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7810b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 78113f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7812c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7813c706a795SRobert Elliott goto error; 7814eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7815283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7816283b4a9bSStephen M. Cameron goto error; 7817960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7818eb6b2ae9SStephen M. Cameron return 0; 7819283b4a9bSStephen M. Cameron error: 7820050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7821283b4a9bSStephen M. Cameron return -ENODEV; 7822eb6b2ae9SStephen M. Cameron } 7823eb6b2ae9SStephen M. Cameron 7824195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7825195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7826195f2c65SRobert Elliott { 7827195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7828195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7829105a3dbcSRobert Elliott h->vaddr = NULL; 7830195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7831943a7021SRobert Elliott /* 7832943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7833bff9e34cSMauro Carvalho Chehab * Documentation/driver-api/pci/pci.rst 7834943a7021SRobert Elliott */ 7835195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7836943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7837195f2c65SRobert Elliott } 7838195f2c65SRobert Elliott 7839195f2c65SRobert Elliott /* several items must be freed later */ 78406f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 784177c4495cSStephen M. Cameron { 7842eb6b2ae9SStephen M. Cameron int prod_index, err; 7843135ae6edSHannes Reinecke bool legacy_board; 7844edd16368SStephen M. Cameron 7845135ae6edSHannes Reinecke prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7846e5c880d1SStephen M. Cameron if (prod_index < 0) 784760f923b9SRobert Elliott return prod_index; 7848e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7849e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7850135ae6edSHannes Reinecke h->legacy_board = legacy_board; 7851e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7852e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7853e5a44df8SMatthew Garrett 785455c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7855edd16368SStephen M. Cameron if (err) { 7856195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7857943a7021SRobert Elliott pci_disable_device(h->pdev); 7858edd16368SStephen M. Cameron return err; 7859edd16368SStephen M. Cameron } 7860edd16368SStephen M. Cameron 7861f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7862edd16368SStephen M. Cameron if (err) { 786355c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7864195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7865943a7021SRobert Elliott pci_disable_device(h->pdev); 7866943a7021SRobert Elliott return err; 7867edd16368SStephen M. Cameron } 78684fa604e1SRobert Elliott 78694fa604e1SRobert Elliott pci_set_master(h->pdev); 78704fa604e1SRobert Elliott 7871bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 7872bc2bb154SChristoph Hellwig if (err) 7873bc2bb154SChristoph Hellwig goto clean1; 78748b834bffSMing Lei 78758b834bffSMing Lei /* setup mapping between CPU and reply queue */ 78768b834bffSMing Lei hpsa_setup_reply_map(h); 78778b834bffSMing Lei 787812d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 78793a7774ceSStephen M. Cameron if (err) 7880195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7881edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7882204892e9SStephen M. Cameron if (!h->vaddr) { 7883195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7884204892e9SStephen M. Cameron err = -ENOMEM; 7885195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7886204892e9SStephen M. Cameron } 7887fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 78882c4c8c8bSStephen M. Cameron if (err) 7889195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 789077c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 789177c4495cSStephen M. Cameron if (err) 7892195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7893b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7894edd16368SStephen M. Cameron 789576c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7896edd16368SStephen M. Cameron err = -ENODEV; 7897195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7898edd16368SStephen M. Cameron } 789997a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 79003d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7901eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7902eb6b2ae9SStephen M. Cameron if (err) 7903195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7904edd16368SStephen M. Cameron return 0; 7905edd16368SStephen M. Cameron 7906195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7907195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7908195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7909204892e9SStephen M. Cameron iounmap(h->vaddr); 7910105a3dbcSRobert Elliott h->vaddr = NULL; 7911195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7912195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7913bc2bb154SChristoph Hellwig clean1: 7914943a7021SRobert Elliott /* 7915943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7916bff9e34cSMauro Carvalho Chehab * Documentation/driver-api/pci/pci.rst 7917943a7021SRobert Elliott */ 7918195f2c65SRobert Elliott pci_disable_device(h->pdev); 7919943a7021SRobert Elliott pci_release_regions(h->pdev); 7920edd16368SStephen M. Cameron return err; 7921edd16368SStephen M. Cameron } 7922edd16368SStephen M. Cameron 79236f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7924339b2b14SStephen M. Cameron { 7925339b2b14SStephen M. Cameron int rc; 7926339b2b14SStephen M. Cameron 7927339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7928339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7929339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7930339b2b14SStephen M. Cameron return; 7931339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7932339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7933339b2b14SStephen M. Cameron if (rc != 0) { 7934339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7935339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7936339b2b14SStephen M. Cameron } 7937339b2b14SStephen M. Cameron } 7938339b2b14SStephen M. Cameron 79396b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7940edd16368SStephen M. Cameron { 79411df8552aSStephen M. Cameron int rc, i; 79423b747298STomas Henzl void __iomem *vaddr; 7943edd16368SStephen M. Cameron 79444c2a8c40SStephen M. Cameron if (!reset_devices) 79454c2a8c40SStephen M. Cameron return 0; 79464c2a8c40SStephen M. Cameron 7947132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7948132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7949132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7950132aa220STomas Henzl */ 7951132aa220STomas Henzl rc = pci_enable_device(pdev); 7952132aa220STomas Henzl if (rc) { 7953132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7954132aa220STomas Henzl return -ENODEV; 7955132aa220STomas Henzl } 7956132aa220STomas Henzl pci_disable_device(pdev); 7957132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7958132aa220STomas Henzl rc = pci_enable_device(pdev); 7959132aa220STomas Henzl if (rc) { 7960132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7961132aa220STomas Henzl return -ENODEV; 7962132aa220STomas Henzl } 79634fa604e1SRobert Elliott 7964859c75abSTomas Henzl pci_set_master(pdev); 79654fa604e1SRobert Elliott 79663b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 79673b747298STomas Henzl if (vaddr == NULL) { 79683b747298STomas Henzl rc = -ENOMEM; 79693b747298STomas Henzl goto out_disable; 79703b747298STomas Henzl } 79713b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 79723b747298STomas Henzl iounmap(vaddr); 79733b747298STomas Henzl 79741df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 79756b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7976edd16368SStephen M. Cameron 79771df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 79781df8552aSStephen M. Cameron * but it's already (and still) up and running in 797918867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 798018867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 79811df8552aSStephen M. Cameron */ 7982adf1b3a3SRobert Elliott if (rc) 7983132aa220STomas Henzl goto out_disable; 7984edd16368SStephen M. Cameron 7985edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 79861ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7987edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7988edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7989edd16368SStephen M. Cameron break; 7990edd16368SStephen M. Cameron else 7991edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7992edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7993edd16368SStephen M. Cameron } 7994132aa220STomas Henzl 7995132aa220STomas Henzl out_disable: 7996132aa220STomas Henzl 7997132aa220STomas Henzl pci_disable_device(pdev); 7998132aa220STomas Henzl return rc; 7999edd16368SStephen M. Cameron } 8000edd16368SStephen M. Cameron 80011fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 80021fb7c98aSRobert Elliott { 80031fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8004105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8005105a3dbcSRobert Elliott if (h->cmd_pool) { 80068bc8f47eSChristoph Hellwig dma_free_coherent(&h->pdev->dev, 80071fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 80081fb7c98aSRobert Elliott h->cmd_pool, 80091fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8010105a3dbcSRobert Elliott h->cmd_pool = NULL; 8011105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8012105a3dbcSRobert Elliott } 8013105a3dbcSRobert Elliott if (h->errinfo_pool) { 80148bc8f47eSChristoph Hellwig dma_free_coherent(&h->pdev->dev, 80151fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 80161fb7c98aSRobert Elliott h->errinfo_pool, 80171fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8018105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8019105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8020105a3dbcSRobert Elliott } 80211fb7c98aSRobert Elliott } 80221fb7c98aSRobert Elliott 8023d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 80242e9d1b36SStephen M. Cameron { 80256396bb22SKees Cook h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG), 80266396bb22SKees Cook sizeof(unsigned long), 80276396bb22SKees Cook GFP_KERNEL); 80288bc8f47eSChristoph Hellwig h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 80292e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 80308bc8f47eSChristoph Hellwig &h->cmd_pool_dhandle, GFP_KERNEL); 80318bc8f47eSChristoph Hellwig h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 80322e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 80338bc8f47eSChristoph Hellwig &h->errinfo_pool_dhandle, GFP_KERNEL); 80342e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 80352e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 80362e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 80372e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 80382c143342SRobert Elliott goto clean_up; 80392e9d1b36SStephen M. Cameron } 8040360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 80412e9d1b36SStephen M. Cameron return 0; 80422c143342SRobert Elliott clean_up: 80432c143342SRobert Elliott hpsa_free_cmd_pool(h); 80442c143342SRobert Elliott return -ENOMEM; 80452e9d1b36SStephen M. Cameron } 80462e9d1b36SStephen M. Cameron 8047ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8048ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8049ec501a18SRobert Elliott { 8050ec501a18SRobert Elliott int i; 8051a68fdb3aSDon Brace int irq_vector = 0; 8052a68fdb3aSDon Brace 8053a68fdb3aSDon Brace if (hpsa_simple_mode) 8054a68fdb3aSDon Brace irq_vector = h->intr_mode; 8055ec501a18SRobert Elliott 8056bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8057ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 8058a68fdb3aSDon Brace free_irq(pci_irq_vector(h->pdev, irq_vector), 8059a68fdb3aSDon Brace &h->q[h->intr_mode]); 8060bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8061ec501a18SRobert Elliott return; 8062ec501a18SRobert Elliott } 8063ec501a18SRobert Elliott 8064bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8065bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8066105a3dbcSRobert Elliott h->q[i] = 0; 8067ec501a18SRobert Elliott } 8068a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8069a4e17fc1SRobert Elliott h->q[i] = 0; 8070ec501a18SRobert Elliott } 8071ec501a18SRobert Elliott 80729ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 80739ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 80740ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 80750ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 80760ae01a32SStephen M. Cameron { 8077254f796bSMatt Gates int rc, i; 8078a68fdb3aSDon Brace int irq_vector = 0; 8079a68fdb3aSDon Brace 8080a68fdb3aSDon Brace if (hpsa_simple_mode) 8081a68fdb3aSDon Brace irq_vector = h->intr_mode; 80820ae01a32SStephen M. Cameron 8083254f796bSMatt Gates /* 8084254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8085254f796bSMatt Gates * queue to process. 8086254f796bSMatt Gates */ 8087254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8088254f796bSMatt Gates h->q[i] = (u8) i; 8089254f796bSMatt Gates 8090bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8091254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8092bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 80938b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8094bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 80958b47004aSRobert Elliott 0, h->intrname[i], 8096254f796bSMatt Gates &h->q[i]); 8097a4e17fc1SRobert Elliott if (rc) { 8098a4e17fc1SRobert Elliott int j; 8099a4e17fc1SRobert Elliott 8100a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8101a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8102bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8103a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8104bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8105a4e17fc1SRobert Elliott h->q[j] = 0; 8106a4e17fc1SRobert Elliott } 8107a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8108a4e17fc1SRobert Elliott h->q[j] = 0; 8109a4e17fc1SRobert Elliott return rc; 8110a4e17fc1SRobert Elliott } 8111a4e17fc1SRobert Elliott } 8112254f796bSMatt Gates } else { 8113254f796bSMatt Gates /* Use single reply pool */ 8114bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8115bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8116bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8117a68fdb3aSDon Brace rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 81188b47004aSRobert Elliott msixhandler, 0, 8119bc2bb154SChristoph Hellwig h->intrname[0], 8120254f796bSMatt Gates &h->q[h->intr_mode]); 8121254f796bSMatt Gates } else { 81228b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 81238b47004aSRobert Elliott "%s-intx", h->devname); 8124a68fdb3aSDon Brace rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 81258b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8126bc2bb154SChristoph Hellwig h->intrname[0], 8127254f796bSMatt Gates &h->q[h->intr_mode]); 8128254f796bSMatt Gates } 8129254f796bSMatt Gates } 81300ae01a32SStephen M. Cameron if (rc) { 8131195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8132a68fdb3aSDon Brace pci_irq_vector(h->pdev, irq_vector), h->devname); 8133195f2c65SRobert Elliott hpsa_free_irqs(h); 81340ae01a32SStephen M. Cameron return -ENODEV; 81350ae01a32SStephen M. Cameron } 81360ae01a32SStephen M. Cameron return 0; 81370ae01a32SStephen M. Cameron } 81380ae01a32SStephen M. Cameron 81396f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 814064670ac8SStephen M. Cameron { 814139c53f55SRobert Elliott int rc; 8142c5dfd106SDon Brace hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER); 814364670ac8SStephen M. Cameron 814464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 814539c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 814639c53f55SRobert Elliott if (rc) { 814764670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 814839c53f55SRobert Elliott return rc; 814964670ac8SStephen M. Cameron } 815064670ac8SStephen M. Cameron 815164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 815239c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 815339c53f55SRobert Elliott if (rc) { 815464670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 815564670ac8SStephen M. Cameron "after soft reset.\n"); 815639c53f55SRobert Elliott return rc; 815764670ac8SStephen M. Cameron } 815864670ac8SStephen M. Cameron 815964670ac8SStephen M. Cameron return 0; 816064670ac8SStephen M. Cameron } 816164670ac8SStephen M. Cameron 8162072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8163072b0518SStephen M. Cameron { 8164072b0518SStephen M. Cameron int i; 8165072b0518SStephen M. Cameron 8166072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8167072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8168072b0518SStephen M. Cameron continue; 81698bc8f47eSChristoph Hellwig dma_free_coherent(&h->pdev->dev, 81701fb7c98aSRobert Elliott h->reply_queue_size, 81711fb7c98aSRobert Elliott h->reply_queue[i].head, 81721fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8173072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8174072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8175072b0518SStephen M. Cameron } 8176105a3dbcSRobert Elliott h->reply_queue_size = 0; 8177072b0518SStephen M. Cameron } 8178072b0518SStephen M. Cameron 81790097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 81800097f0f4SStephen M. Cameron { 8181105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8182105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8183105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8184105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 81852946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 81862946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 81872946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 81889ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 81899ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 81909ecd953aSRobert Elliott if (h->resubmit_wq) { 81919ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 81929ecd953aSRobert Elliott h->resubmit_wq = NULL; 81939ecd953aSRobert Elliott } 81949ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 81959ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 81969ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 81979ecd953aSRobert Elliott } 819801192088SDon Brace if (h->monitor_ctlr_wq) { 819901192088SDon Brace destroy_workqueue(h->monitor_ctlr_wq); 820001192088SDon Brace h->monitor_ctlr_wq = NULL; 820101192088SDon Brace } 820201192088SDon Brace 8203105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 820464670ac8SStephen M. Cameron } 820564670ac8SStephen M. Cameron 8206a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8207f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8208a0c12413SStephen M. Cameron { 8209281a7fd0SWebb Scales int i, refcount; 8210281a7fd0SWebb Scales struct CommandList *c; 821125163bd5SWebb Scales int failcount = 0; 8212a0c12413SStephen M. Cameron 8213080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8214f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8215f2405db8SDon Brace c = h->cmd_pool + i; 8216281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8217281a7fd0SWebb Scales if (refcount > 1) { 821825163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 82195a3d16f5SStephen M. Cameron finish_cmd(c); 8220433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 822125163bd5SWebb Scales failcount++; 8222a0c12413SStephen M. Cameron } 8223281a7fd0SWebb Scales cmd_free(h, c); 8224281a7fd0SWebb Scales } 822525163bd5SWebb Scales dev_warn(&h->pdev->dev, 822625163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8227a0c12413SStephen M. Cameron } 8228a0c12413SStephen M. Cameron 8229094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8230094963daSStephen M. Cameron { 8231c8ed0010SRusty Russell int cpu; 8232094963daSStephen M. Cameron 8233c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8234094963daSStephen M. Cameron u32 *lockup_detected; 8235094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8236094963daSStephen M. Cameron *lockup_detected = value; 8237094963daSStephen M. Cameron } 8238094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8239094963daSStephen M. Cameron } 8240094963daSStephen M. Cameron 8241a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8242a0c12413SStephen M. Cameron { 8243a0c12413SStephen M. Cameron unsigned long flags; 8244094963daSStephen M. Cameron u32 lockup_detected; 8245a0c12413SStephen M. Cameron 8246a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8247a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8248094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8249094963daSStephen M. Cameron if (!lockup_detected) { 8250094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8251094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 825225163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 825325163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8254094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8255094963daSStephen M. Cameron } 8256094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8257a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 825825163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 825925163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8260b9b08cadSDon Brace if (lockup_detected == 0xffff0000) { 8261b9b08cadSDon Brace dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8262b9b08cadSDon Brace writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8263b9b08cadSDon Brace } 8264a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8265f2405db8SDon Brace fail_all_outstanding_cmds(h); 8266a0c12413SStephen M. Cameron } 8267a0c12413SStephen M. Cameron 826825163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8269a0c12413SStephen M. Cameron { 8270a0c12413SStephen M. Cameron u64 now; 8271a0c12413SStephen M. Cameron u32 heartbeat; 8272a0c12413SStephen M. Cameron unsigned long flags; 8273a0c12413SStephen M. Cameron 8274a0c12413SStephen M. Cameron now = get_jiffies_64(); 8275a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8276a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8277e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 827825163bd5SWebb Scales return false; 8279a0c12413SStephen M. Cameron 8280a0c12413SStephen M. Cameron /* 8281a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8282a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8283a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8284a0c12413SStephen M. Cameron */ 8285a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8286e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 828725163bd5SWebb Scales return false; 8288a0c12413SStephen M. Cameron 8289a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8290a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8291a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8292a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8293a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8294a0c12413SStephen M. Cameron controller_lockup_detected(h); 829525163bd5SWebb Scales return true; 8296a0c12413SStephen M. Cameron } 8297a0c12413SStephen M. Cameron 8298a0c12413SStephen M. Cameron /* We're ok. */ 8299a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8300a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 830125163bd5SWebb Scales return false; 8302a0c12413SStephen M. Cameron } 8303a0c12413SStephen M. Cameron 8304b2582a65SDon Brace /* 8305b2582a65SDon Brace * Set ioaccel status for all ioaccel volumes. 8306b2582a65SDon Brace * 8307b2582a65SDon Brace * Called from monitor controller worker (hpsa_event_monitor_worker) 8308b2582a65SDon Brace * 8309*3e16e83aSDon Brace * A Volume (or Volumes that comprise an Array set) may be undergoing a 8310b2582a65SDon Brace * transformation, so we will be turning off ioaccel for all volumes that 8311b2582a65SDon Brace * make up the Array. 8312b2582a65SDon Brace */ 8313b2582a65SDon Brace static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8314b2582a65SDon Brace { 8315b2582a65SDon Brace int rc; 8316b2582a65SDon Brace int i; 8317b2582a65SDon Brace u8 ioaccel_status; 8318b2582a65SDon Brace unsigned char *buf; 8319b2582a65SDon Brace struct hpsa_scsi_dev_t *device; 8320b2582a65SDon Brace 8321b2582a65SDon Brace if (!h) 8322b2582a65SDon Brace return; 8323b2582a65SDon Brace 8324b2582a65SDon Brace buf = kmalloc(64, GFP_KERNEL); 8325b2582a65SDon Brace if (!buf) 8326b2582a65SDon Brace return; 8327b2582a65SDon Brace 8328b2582a65SDon Brace /* 8329b2582a65SDon Brace * Run through current device list used during I/O requests. 8330b2582a65SDon Brace */ 8331b2582a65SDon Brace for (i = 0; i < h->ndevices; i++) { 8332*3e16e83aSDon Brace int offload_to_be_enabled = 0; 8333*3e16e83aSDon Brace int offload_config = 0; 8334*3e16e83aSDon Brace 8335b2582a65SDon Brace device = h->dev[i]; 8336b2582a65SDon Brace 8337b2582a65SDon Brace if (!device) 8338b2582a65SDon Brace continue; 8339b2582a65SDon Brace if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8340b2582a65SDon Brace HPSA_VPD_LV_IOACCEL_STATUS)) 8341b2582a65SDon Brace continue; 8342b2582a65SDon Brace 8343b2582a65SDon Brace memset(buf, 0, 64); 8344b2582a65SDon Brace 8345b2582a65SDon Brace rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8346b2582a65SDon Brace VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8347b2582a65SDon Brace buf, 64); 8348b2582a65SDon Brace if (rc != 0) 8349b2582a65SDon Brace continue; 8350b2582a65SDon Brace 8351b2582a65SDon Brace ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8352*3e16e83aSDon Brace 8353*3e16e83aSDon Brace /* 8354*3e16e83aSDon Brace * Check if offload is still configured on 8355*3e16e83aSDon Brace */ 8356*3e16e83aSDon Brace offload_config = 8357b2582a65SDon Brace !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8358*3e16e83aSDon Brace /* 8359*3e16e83aSDon Brace * If offload is configured on, check to see if ioaccel 8360*3e16e83aSDon Brace * needs to be enabled. 8361*3e16e83aSDon Brace */ 8362*3e16e83aSDon Brace if (offload_config) 8363*3e16e83aSDon Brace offload_to_be_enabled = 8364b2582a65SDon Brace !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8365b2582a65SDon Brace 8366b2582a65SDon Brace /* 8367*3e16e83aSDon Brace * If ioaccel is to be re-enabled, re-enable later during the 8368*3e16e83aSDon Brace * scan operation so the driver can get a fresh raidmap 8369*3e16e83aSDon Brace * before turning ioaccel back on. 8370*3e16e83aSDon Brace */ 8371*3e16e83aSDon Brace if (offload_to_be_enabled) 8372*3e16e83aSDon Brace continue; 8373*3e16e83aSDon Brace 8374*3e16e83aSDon Brace /* 8375b2582a65SDon Brace * Immediately turn off ioaccel for any volume the 8376b2582a65SDon Brace * controller tells us to. Some of the reasons could be: 8377b2582a65SDon Brace * transformation - change to the LVs of an Array. 8378b2582a65SDon Brace * degraded volume - component failure 8379b2582a65SDon Brace */ 8380*3e16e83aSDon Brace hpsa_turn_off_ioaccel_for_device(device); 8381b2582a65SDon Brace } 8382b2582a65SDon Brace 8383b2582a65SDon Brace kfree(buf); 8384b2582a65SDon Brace } 8385b2582a65SDon Brace 83869846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 838776438d08SStephen M. Cameron { 838876438d08SStephen M. Cameron char *event_type; 838976438d08SStephen M. Cameron 8390e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8391e4aa3e6aSStephen Cameron return; 8392e4aa3e6aSStephen Cameron 839376438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 83941f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 83951f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 839676438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 839776438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 839876438d08SStephen M. Cameron 839976438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 840076438d08SStephen M. Cameron event_type = "state change"; 840176438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 840276438d08SStephen M. Cameron event_type = "configuration change"; 840376438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 840476438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 8405b2582a65SDon Brace hpsa_set_ioaccel_status(h); 840623100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 840776438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 840876438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 840976438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 841076438d08SStephen M. Cameron h->events, event_type); 841176438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 841276438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 841376438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 841476438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 841576438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 841676438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 841776438d08SStephen M. Cameron } else { 841876438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 841976438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 842076438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 842176438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 842276438d08SStephen M. Cameron } 84239846590eSStephen M. Cameron return; 842476438d08SStephen M. Cameron } 842576438d08SStephen M. Cameron 842676438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 842776438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8428e863d68eSScott Teel * we should rescan the controller for devices. 8429e863d68eSScott Teel * Also check flag for driver-initiated rescan. 843076438d08SStephen M. Cameron */ 84319846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 843276438d08SStephen M. Cameron { 8433853633e8SDon Brace if (h->drv_req_rescan) { 8434853633e8SDon Brace h->drv_req_rescan = 0; 8435853633e8SDon Brace return 1; 8436853633e8SDon Brace } 8437853633e8SDon Brace 843876438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 84399846590eSStephen M. Cameron return 0; 844076438d08SStephen M. Cameron 844176438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 84429846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 84439846590eSStephen M. Cameron } 844476438d08SStephen M. Cameron 844576438d08SStephen M. Cameron /* 84469846590eSStephen M. Cameron * Check if any of the offline devices have become ready 844776438d08SStephen M. Cameron */ 84489846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 84499846590eSStephen M. Cameron { 84509846590eSStephen M. Cameron unsigned long flags; 84519846590eSStephen M. Cameron struct offline_device_entry *d; 84529846590eSStephen M. Cameron struct list_head *this, *tmp; 84539846590eSStephen M. Cameron 84549846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 84559846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 84569846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 84579846590eSStephen M. Cameron offline_list); 84589846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8459d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8460d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8461d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8462d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84639846590eSStephen M. Cameron return 1; 8464d1fea47cSStephen M. Cameron } 84659846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 846676438d08SStephen M. Cameron } 84679846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84689846590eSStephen M. Cameron return 0; 84699846590eSStephen M. Cameron } 84709846590eSStephen M. Cameron 847134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 847234592254SScott Teel { 847334592254SScott Teel int rc = 1; /* assume there are changes */ 847434592254SScott Teel struct ReportLUNdata *logdev = NULL; 847534592254SScott Teel 847634592254SScott Teel /* if we can't find out if lun data has changed, 847734592254SScott Teel * assume that it has. 847834592254SScott Teel */ 847934592254SScott Teel 848034592254SScott Teel if (!h->lastlogicals) 84817e8a9486SAmit Kushwaha return rc; 848234592254SScott Teel 848334592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 84847e8a9486SAmit Kushwaha if (!logdev) 84857e8a9486SAmit Kushwaha return rc; 84867e8a9486SAmit Kushwaha 848734592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 848834592254SScott Teel dev_warn(&h->pdev->dev, 848934592254SScott Teel "report luns failed, can't track lun changes.\n"); 849034592254SScott Teel goto out; 849134592254SScott Teel } 849234592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 849334592254SScott Teel dev_info(&h->pdev->dev, 849434592254SScott Teel "Lun changes detected.\n"); 849534592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 849634592254SScott Teel goto out; 849734592254SScott Teel } else 849834592254SScott Teel rc = 0; /* no changes detected. */ 849934592254SScott Teel out: 850034592254SScott Teel kfree(logdev); 850134592254SScott Teel return rc; 850234592254SScott Teel } 850334592254SScott Teel 85043d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h) 8505a0c12413SStephen M. Cameron { 85063d38f00cSScott Teel struct Scsi_Host *sh = NULL; 8507a0c12413SStephen M. Cameron unsigned long flags; 85089846590eSStephen M. Cameron 8509bfd7546cSDon Brace /* 8510bfd7546cSDon Brace * Do the scan after the reset 8511bfd7546cSDon Brace */ 8512c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 8513bfd7546cSDon Brace if (h->reset_in_progress) { 8514bfd7546cSDon Brace h->drv_req_rescan = 1; 8515c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8516bfd7546cSDon Brace return; 8517bfd7546cSDon Brace } 8518c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8519bfd7546cSDon Brace 852034592254SScott Teel sh = scsi_host_get(h->scsi_host); 852134592254SScott Teel if (sh != NULL) { 852234592254SScott Teel hpsa_scan_start(sh); 852334592254SScott Teel scsi_host_put(sh); 85243d38f00cSScott Teel h->drv_req_rescan = 0; 852534592254SScott Teel } 852634592254SScott Teel } 85273d38f00cSScott Teel 85283d38f00cSScott Teel /* 85293d38f00cSScott Teel * watch for controller events 85303d38f00cSScott Teel */ 85313d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work) 85323d38f00cSScott Teel { 85333d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 85343d38f00cSScott Teel struct ctlr_info, event_monitor_work); 85353d38f00cSScott Teel unsigned long flags; 85363d38f00cSScott Teel 85373d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 85383d38f00cSScott Teel if (h->remove_in_progress) { 85393d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85403d38f00cSScott Teel return; 85413d38f00cSScott Teel } 85423d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85433d38f00cSScott Teel 85443d38f00cSScott Teel if (hpsa_ctlr_needs_rescan(h)) { 85453d38f00cSScott Teel hpsa_ack_ctlr_events(h); 85463d38f00cSScott Teel hpsa_perform_rescan(h); 85473d38f00cSScott Teel } 85483d38f00cSScott Teel 85493d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 85503d38f00cSScott Teel if (!h->remove_in_progress) 855101192088SDon Brace queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work, 85523d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 85533d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85543d38f00cSScott Teel } 85553d38f00cSScott Teel 85563d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work) 85573d38f00cSScott Teel { 85583d38f00cSScott Teel unsigned long flags; 85593d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 85603d38f00cSScott Teel struct ctlr_info, rescan_ctlr_work); 85613d38f00cSScott Teel 85623d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 85633d38f00cSScott Teel if (h->remove_in_progress) { 85643d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85653d38f00cSScott Teel return; 85663d38f00cSScott Teel } 85673d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 85683d38f00cSScott Teel 85693d38f00cSScott Teel if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 85703d38f00cSScott Teel hpsa_perform_rescan(h); 85713d38f00cSScott Teel } else if (h->discovery_polling) { 85723d38f00cSScott Teel if (hpsa_luns_changed(h)) { 85733d38f00cSScott Teel dev_info(&h->pdev->dev, 85743d38f00cSScott Teel "driver discovery polling rescan.\n"); 85753d38f00cSScott Teel hpsa_perform_rescan(h); 85763d38f00cSScott Teel } 85779846590eSStephen M. Cameron } 85786636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 85796636e7f4SDon Brace if (!h->remove_in_progress) 85806636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 85816636e7f4SDon Brace h->heartbeat_sample_interval); 85826636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 85836636e7f4SDon Brace } 85846636e7f4SDon Brace 85856636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 85866636e7f4SDon Brace { 85876636e7f4SDon Brace unsigned long flags; 85886636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 85896636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 85906636e7f4SDon Brace 85916636e7f4SDon Brace detect_controller_lockup(h); 85926636e7f4SDon Brace if (lockup_detected(h)) 85936636e7f4SDon Brace return; 85949846590eSStephen M. Cameron 85958a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 85966636e7f4SDon Brace if (!h->remove_in_progress) 859701192088SDon Brace queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work, 85988a98db73SStephen M. Cameron h->heartbeat_sample_interval); 85998a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8600a0c12413SStephen M. Cameron } 8601a0c12413SStephen M. Cameron 86026636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86036636e7f4SDon Brace char *name) 86046636e7f4SDon Brace { 86056636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86066636e7f4SDon Brace 8607397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86086636e7f4SDon Brace if (!wq) 86096636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86106636e7f4SDon Brace 86116636e7f4SDon Brace return wq; 86126636e7f4SDon Brace } 86136636e7f4SDon Brace 86148b834bffSMing Lei static void hpda_free_ctlr_info(struct ctlr_info *h) 86158b834bffSMing Lei { 86168b834bffSMing Lei kfree(h->reply_map); 86178b834bffSMing Lei kfree(h); 86188b834bffSMing Lei } 86198b834bffSMing Lei 86208b834bffSMing Lei static struct ctlr_info *hpda_alloc_ctlr_info(void) 86218b834bffSMing Lei { 86228b834bffSMing Lei struct ctlr_info *h; 86238b834bffSMing Lei 86248b834bffSMing Lei h = kzalloc(sizeof(*h), GFP_KERNEL); 86258b834bffSMing Lei if (!h) 86268b834bffSMing Lei return NULL; 86278b834bffSMing Lei 86286396bb22SKees Cook h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 86298b834bffSMing Lei if (!h->reply_map) { 86308b834bffSMing Lei kfree(h); 86318b834bffSMing Lei return NULL; 86328b834bffSMing Lei } 86338b834bffSMing Lei return h; 86348b834bffSMing Lei } 86358b834bffSMing Lei 86366f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86374c2a8c40SStephen M. Cameron { 86384c2a8c40SStephen M. Cameron int dac, rc; 86394c2a8c40SStephen M. Cameron struct ctlr_info *h; 864064670ac8SStephen M. Cameron int try_soft_reset = 0; 864164670ac8SStephen M. Cameron unsigned long flags; 86426b6c1cd7STomas Henzl u32 board_id; 86434c2a8c40SStephen M. Cameron 86444c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86454c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86464c2a8c40SStephen M. Cameron 8647135ae6edSHannes Reinecke rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 86486b6c1cd7STomas Henzl if (rc < 0) { 86496b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 86506b6c1cd7STomas Henzl return rc; 86516b6c1cd7STomas Henzl } 86526b6c1cd7STomas Henzl 86536b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 865464670ac8SStephen M. Cameron if (rc) { 865564670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 86564c2a8c40SStephen M. Cameron return rc; 865764670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 865864670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 865964670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 866064670ac8SStephen M. Cameron * point that it can accept a command. 866164670ac8SStephen M. Cameron */ 866264670ac8SStephen M. Cameron try_soft_reset = 1; 866364670ac8SStephen M. Cameron rc = 0; 866464670ac8SStephen M. Cameron } 866564670ac8SStephen M. Cameron 866664670ac8SStephen M. Cameron reinit_after_soft_reset: 86674c2a8c40SStephen M. Cameron 8668303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8669303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8670303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8671303932fdSDon Brace */ 8672303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 86738b834bffSMing Lei h = hpda_alloc_ctlr_info(); 8674105a3dbcSRobert Elliott if (!h) { 8675105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8676ecd9aad4SStephen M. Cameron return -ENOMEM; 8677105a3dbcSRobert Elliott } 8678edd16368SStephen M. Cameron 867955c06c71SStephen M. Cameron h->pdev = pdev; 8680105a3dbcSRobert Elliott 8681a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 86829846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 86836eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 86849846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 86856eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 8686c59d04f3SDon Brace spin_lock_init(&h->reset_lock); 868734f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8688094963daSStephen M. Cameron 8689094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8690094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 86912a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8692105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 86932a5ac326SStephen M. Cameron rc = -ENOMEM; 86942efa5929SRobert Elliott goto clean1; /* aer/h */ 86952a5ac326SStephen M. Cameron } 8696094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8697094963daSStephen M. Cameron 869855c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8699105a3dbcSRobert Elliott if (rc) 87002946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8701edd16368SStephen M. Cameron 87022946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87032946e82bSRobert Elliott * interrupt_mode h->intr */ 87042946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87052946e82bSRobert Elliott if (rc) 87062946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87072946e82bSRobert Elliott 87082946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8709edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8710edd16368SStephen M. Cameron number_of_controllers++; 8711edd16368SStephen M. Cameron 8712edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 87138bc8f47eSChristoph Hellwig rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 8714ecd9aad4SStephen M. Cameron if (rc == 0) { 8715edd16368SStephen M. Cameron dac = 1; 8716ecd9aad4SStephen M. Cameron } else { 87178bc8f47eSChristoph Hellwig rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 8718ecd9aad4SStephen M. Cameron if (rc == 0) { 8719edd16368SStephen M. Cameron dac = 0; 8720ecd9aad4SStephen M. Cameron } else { 8721edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87222946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8723edd16368SStephen M. Cameron } 8724ecd9aad4SStephen M. Cameron } 8725edd16368SStephen M. Cameron 8726edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8727edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 872810f66018SStephen M. Cameron 8729105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8730105a3dbcSRobert Elliott if (rc) 87312946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8732d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87338947fd10SRobert Elliott if (rc) 87342946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8735105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8736105a3dbcSRobert Elliott if (rc) 87372946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8738a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 8739d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8740d604f533SWebb Scales mutex_init(&h->reset_mutex); 8741a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 874287b9e6aaSDon Brace h->scan_waiting = 0; 8743edd16368SStephen M. Cameron 8744edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87459a41338eSStephen M. Cameron h->ndevices = 0; 87462946e82bSRobert Elliott 87479a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8748105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8749105a3dbcSRobert Elliott if (rc) 87502946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 87512946e82bSRobert Elliott 87522efa5929SRobert Elliott /* create the resubmit workqueue */ 87532efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 87542efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 87552efa5929SRobert Elliott rc = -ENOMEM; 87562efa5929SRobert Elliott goto clean7; 87572efa5929SRobert Elliott } 87582efa5929SRobert Elliott 87592efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 87602efa5929SRobert Elliott if (!h->resubmit_wq) { 87612efa5929SRobert Elliott rc = -ENOMEM; 87622efa5929SRobert Elliott goto clean7; /* aer/h */ 87632efa5929SRobert Elliott } 876464670ac8SStephen M. Cameron 876501192088SDon Brace h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor"); 876601192088SDon Brace if (!h->monitor_ctlr_wq) { 876701192088SDon Brace rc = -ENOMEM; 876801192088SDon Brace goto clean7; 876901192088SDon Brace } 877001192088SDon Brace 8771105a3dbcSRobert Elliott /* 8772105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 877364670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 877464670ac8SStephen M. Cameron * the soft reset and see if that works. 877564670ac8SStephen M. Cameron */ 877664670ac8SStephen M. Cameron if (try_soft_reset) { 877764670ac8SStephen M. Cameron 877864670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 877964670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 878064670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 878164670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 878264670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 878364670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 878464670ac8SStephen M. Cameron */ 878564670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 878664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 878764670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8788ec501a18SRobert Elliott hpsa_free_irqs(h); 87899ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 879064670ac8SStephen M. Cameron hpsa_intx_discard_completions); 879164670ac8SStephen M. Cameron if (rc) { 87929ee61794SRobert Elliott dev_warn(&h->pdev->dev, 87939ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8794d498757cSRobert Elliott /* 8795b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8796b2ef480cSRobert Elliott * again. Instead, do its work 8797b2ef480cSRobert Elliott */ 8798b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8799b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8800b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8801b2ef480cSRobert Elliott /* 8802b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8803b2ef480cSRobert Elliott * was just called before request_irqs failed 8804d498757cSRobert Elliott */ 8805d498757cSRobert Elliott goto clean3; 880664670ac8SStephen M. Cameron } 880764670ac8SStephen M. Cameron 880864670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 880964670ac8SStephen M. Cameron if (rc) 881064670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88117ef7323fSDon Brace goto clean7; 881264670ac8SStephen M. Cameron 881364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 881464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 881564670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 881664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 881764670ac8SStephen M. Cameron msleep(10000); 881864670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 881964670ac8SStephen M. Cameron 882064670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 882164670ac8SStephen M. Cameron if (rc) 882264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 882364670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 882464670ac8SStephen M. Cameron 882564670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 882664670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 882764670ac8SStephen M. Cameron * all over again. 882864670ac8SStephen M. Cameron */ 882964670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 883064670ac8SStephen M. Cameron try_soft_reset = 0; 883164670ac8SStephen M. Cameron if (rc) 8832b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 883364670ac8SStephen M. Cameron return -ENODEV; 883464670ac8SStephen M. Cameron 883564670ac8SStephen M. Cameron goto reinit_after_soft_reset; 883664670ac8SStephen M. Cameron } 8837edd16368SStephen M. Cameron 8838da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8839da0697bdSScott Teel h->acciopath_status = 1; 884034592254SScott Teel /* Disable discovery polling.*/ 884134592254SScott Teel h->discovery_polling = 0; 8842da0697bdSScott Teel 8843e863d68eSScott Teel 8844edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8845edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8846edd16368SStephen M. Cameron 8847339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88488a98db73SStephen M. Cameron 884934592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 885034592254SScott Teel if (!h->lastlogicals) 885134592254SScott Teel dev_info(&h->pdev->dev, 885234592254SScott Teel "Can't track change to report lun data\n"); 885334592254SScott Teel 8854cf477237SDon Brace /* hook into SCSI subsystem */ 8855cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8856cf477237SDon Brace if (rc) 8857cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8858cf477237SDon Brace 88598a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 88608a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 88618a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 88628a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 88638a98db73SStephen M. Cameron h->heartbeat_sample_interval); 88646636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 88656636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 88666636e7f4SDon Brace h->heartbeat_sample_interval); 88673d38f00cSScott Teel INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 88683d38f00cSScott Teel schedule_delayed_work(&h->event_monitor_work, 88693d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 887088bf6d62SStephen M. Cameron return 0; 8871edd16368SStephen M. Cameron 88722946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8873105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8874105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8875105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 887633a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 88772946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 88782e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 88792946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8880ec501a18SRobert Elliott hpsa_free_irqs(h); 88812946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 88822946e82bSRobert Elliott scsi_host_put(h->scsi_host); 88832946e82bSRobert Elliott h->scsi_host = NULL; 88842946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8885195f2c65SRobert Elliott hpsa_free_pci_init(h); 88862946e82bSRobert Elliott clean2: /* lu, aer/h */ 8887105a3dbcSRobert Elliott if (h->lockup_detected) { 8888094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8889105a3dbcSRobert Elliott h->lockup_detected = NULL; 8890105a3dbcSRobert Elliott } 8891105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8892105a3dbcSRobert Elliott if (h->resubmit_wq) { 8893105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8894105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8895105a3dbcSRobert Elliott } 8896105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8897105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8898105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8899105a3dbcSRobert Elliott } 890001192088SDon Brace if (h->monitor_ctlr_wq) { 890101192088SDon Brace destroy_workqueue(h->monitor_ctlr_wq); 890201192088SDon Brace h->monitor_ctlr_wq = NULL; 890301192088SDon Brace } 8904edd16368SStephen M. Cameron kfree(h); 8905ecd9aad4SStephen M. Cameron return rc; 8906edd16368SStephen M. Cameron } 8907edd16368SStephen M. Cameron 8908edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8909edd16368SStephen M. Cameron { 8910edd16368SStephen M. Cameron char *flush_buf; 8911edd16368SStephen M. Cameron struct CommandList *c; 891225163bd5SWebb Scales int rc; 8913702890e3SStephen M. Cameron 8914094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8915702890e3SStephen M. Cameron return; 8916edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8917edd16368SStephen M. Cameron if (!flush_buf) 8918edd16368SStephen M. Cameron return; 8919edd16368SStephen M. Cameron 892045fcb86eSStephen Cameron c = cmd_alloc(h); 8921bf43caf3SRobert Elliott 8922a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8923a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8924a2dac136SStephen M. Cameron goto out; 8925a2dac136SStephen M. Cameron } 89268bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 89278bc8f47eSChristoph Hellwig DEFAULT_TIMEOUT); 892825163bd5SWebb Scales if (rc) 892925163bd5SWebb Scales goto out; 8930edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8931a2dac136SStephen M. Cameron out: 8932edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8933edd16368SStephen M. Cameron "error flushing cache on controller\n"); 893445fcb86eSStephen Cameron cmd_free(h, c); 8935edd16368SStephen M. Cameron kfree(flush_buf); 8936edd16368SStephen M. Cameron } 8937edd16368SStephen M. Cameron 8938c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8939c2adae44SScott Teel * send down a report luns request 8940c2adae44SScott Teel */ 8941c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8942c2adae44SScott Teel { 8943c2adae44SScott Teel u32 *options; 8944c2adae44SScott Teel struct CommandList *c; 8945c2adae44SScott Teel int rc; 8946c2adae44SScott Teel 8947c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8948c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8949c2adae44SScott Teel return; 8950c2adae44SScott Teel 8951c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 89527e8a9486SAmit Kushwaha if (!options) 8953c2adae44SScott Teel return; 8954c2adae44SScott Teel 8955c2adae44SScott Teel c = cmd_alloc(h); 8956c2adae44SScott Teel 8957c2adae44SScott Teel /* first, get the current diag options settings */ 8958c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8959c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8960c2adae44SScott Teel goto errout; 8961c2adae44SScott Teel 89628bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 89638bc8f47eSChristoph Hellwig NO_TIMEOUT); 8964c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8965c2adae44SScott Teel goto errout; 8966c2adae44SScott Teel 8967c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8968c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8969c2adae44SScott Teel 8970c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8971c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8972c2adae44SScott Teel goto errout; 8973c2adae44SScott Teel 89748bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 89758bc8f47eSChristoph Hellwig NO_TIMEOUT); 8976c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8977c2adae44SScott Teel goto errout; 8978c2adae44SScott Teel 8979c2adae44SScott Teel /* Now verify that it got set: */ 8980c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8981c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8982c2adae44SScott Teel goto errout; 8983c2adae44SScott Teel 89848bc8f47eSChristoph Hellwig rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 89858bc8f47eSChristoph Hellwig NO_TIMEOUT); 8986c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8987c2adae44SScott Teel goto errout; 8988c2adae44SScott Teel 8989d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8990c2adae44SScott Teel goto out; 8991c2adae44SScott Teel 8992c2adae44SScott Teel errout: 8993c2adae44SScott Teel dev_err(&h->pdev->dev, 8994c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8995c2adae44SScott Teel out: 8996c2adae44SScott Teel cmd_free(h, c); 8997c2adae44SScott Teel kfree(options); 8998c2adae44SScott Teel } 8999c2adae44SScott Teel 90000d98ba8dSSinan Kaya static void __hpsa_shutdown(struct pci_dev *pdev) 9001edd16368SStephen M. Cameron { 9002edd16368SStephen M. Cameron struct ctlr_info *h; 9003edd16368SStephen M. Cameron 9004edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9005edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9006edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9007edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9008edd16368SStephen M. Cameron */ 9009edd16368SStephen M. Cameron hpsa_flush_cache(h); 9010edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9011105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9012cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9013edd16368SStephen M. Cameron } 9014edd16368SStephen M. Cameron 90150d98ba8dSSinan Kaya static void hpsa_shutdown(struct pci_dev *pdev) 90160d98ba8dSSinan Kaya { 90170d98ba8dSSinan Kaya __hpsa_shutdown(pdev); 90180d98ba8dSSinan Kaya pci_disable_device(pdev); 90190d98ba8dSSinan Kaya } 90200d98ba8dSSinan Kaya 90216f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 902255e14e76SStephen M. Cameron { 902355e14e76SStephen M. Cameron int i; 902455e14e76SStephen M. Cameron 9025105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 902655e14e76SStephen M. Cameron kfree(h->dev[i]); 9027105a3dbcSRobert Elliott h->dev[i] = NULL; 9028105a3dbcSRobert Elliott } 902955e14e76SStephen M. Cameron } 903055e14e76SStephen M. Cameron 90316f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9032edd16368SStephen M. Cameron { 9033edd16368SStephen M. Cameron struct ctlr_info *h; 90348a98db73SStephen M. Cameron unsigned long flags; 9035edd16368SStephen M. Cameron 9036edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9037edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9038edd16368SStephen M. Cameron return; 9039edd16368SStephen M. Cameron } 9040edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90418a98db73SStephen M. Cameron 90428a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90438a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90448a98db73SStephen M. Cameron h->remove_in_progress = 1; 90458a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90466636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90476636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90483d38f00cSScott Teel cancel_delayed_work_sync(&h->event_monitor_work); 90496636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90506636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 905101192088SDon Brace destroy_workqueue(h->monitor_ctlr_wq); 9052cc64c817SRobert Elliott 9053dfb2e6f4SMartin Wilck hpsa_delete_sas_host(h); 9054dfb2e6f4SMartin Wilck 90552d041306SDon Brace /* 90562d041306SDon Brace * Call before disabling interrupts. 90572d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90582d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90592d041306SDon Brace * operations which cannot complete and will hang the system. 90602d041306SDon Brace */ 90612d041306SDon Brace if (h->scsi_host) 90622d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9063105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9064195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 90650d98ba8dSSinan Kaya __hpsa_shutdown(pdev); 9066cc64c817SRobert Elliott 9067105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9068105a3dbcSRobert Elliott 90692946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90702946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 90712946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9072105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9073105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 90741fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 907534592254SScott Teel kfree(h->lastlogicals); 9076105a3dbcSRobert Elliott 9077105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9078195f2c65SRobert Elliott 90792946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 90802946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 90812946e82bSRobert Elliott 9082195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 90832946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9084195f2c65SRobert Elliott 9085105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9086105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9087105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9088d04e62b9SKevin Barnett 90898b834bffSMing Lei hpda_free_ctlr_info(h); /* init_one 1 */ 9090edd16368SStephen M. Cameron } 9091edd16368SStephen M. Cameron 9092edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9093edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9094edd16368SStephen M. Cameron { 9095edd16368SStephen M. Cameron return -ENOSYS; 9096edd16368SStephen M. Cameron } 9097edd16368SStephen M. Cameron 9098edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9099edd16368SStephen M. Cameron { 9100edd16368SStephen M. Cameron return -ENOSYS; 9101edd16368SStephen M. Cameron } 9102edd16368SStephen M. Cameron 9103edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9104f79cfec6SStephen M. Cameron .name = HPSA, 9105edd16368SStephen M. Cameron .probe = hpsa_init_one, 91066f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9107edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9108edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9109edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9110edd16368SStephen M. Cameron .resume = hpsa_resume, 9111edd16368SStephen M. Cameron }; 9112edd16368SStephen M. Cameron 9113303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9114303932fdSDon Brace * scatter gather elements supported) and bucket[], 9115303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9116303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9117303932fdSDon Brace * byte increments) which the controller uses to fetch 9118303932fdSDon Brace * commands. This function fills in bucket_map[], which 9119303932fdSDon Brace * maps a given number of scatter gather elements to one of 9120303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9121303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9122303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9123303932fdSDon Brace * bits of the command address. 9124303932fdSDon Brace */ 9125303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91262b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9127303932fdSDon Brace { 9128303932fdSDon Brace int i, j, b, size; 9129303932fdSDon Brace 9130303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9131303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9132303932fdSDon Brace /* Compute size of a command with i SG entries */ 9133e1f7de0cSMatt Gates size = i + min_blocks; 9134303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9135303932fdSDon Brace /* Find the bucket that is just big enough */ 9136e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9137303932fdSDon Brace if (bucket[j] >= size) { 9138303932fdSDon Brace b = j; 9139303932fdSDon Brace break; 9140303932fdSDon Brace } 9141303932fdSDon Brace } 9142303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9143303932fdSDon Brace bucket_map[i] = b; 9144303932fdSDon Brace } 9145303932fdSDon Brace } 9146303932fdSDon Brace 9147105a3dbcSRobert Elliott /* 9148105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9149105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9150105a3dbcSRobert Elliott */ 9151c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9152303932fdSDon Brace { 91536c311b57SStephen M. Cameron int i; 91546c311b57SStephen M. Cameron unsigned long register_value; 9155e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9156e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9157e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9158b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9159b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9160e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9161def342bdSStephen M. Cameron 9162def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9163def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9164def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9165def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9166def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9167def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9168def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9169def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9170def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9171def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9172d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9173def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9174def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9175def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9176def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9177def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9178def342bdSStephen M. Cameron */ 9179d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9180b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9181b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9182b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9183b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9184b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9185b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9186b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9187b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9188b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9189b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9190d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9191303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9192303932fdSDon Brace * 6 = 2 s/g entry or 8k 9193303932fdSDon Brace * 8 = 4 s/g entry or 16k 9194303932fdSDon Brace * 10 = 6 s/g entry or 24k 9195303932fdSDon Brace */ 9196303932fdSDon Brace 9197b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9198b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9199b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9200b3a52e79SStephen M. Cameron */ 9201b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9202b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9203b3a52e79SStephen M. Cameron 9204303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9205072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9206072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9207303932fdSDon Brace 9208d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9209d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9210e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9211303932fdSDon Brace for (i = 0; i < 8; i++) 9212303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9213303932fdSDon Brace 9214303932fdSDon Brace /* size of controller ring buffer */ 9215303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9216254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9217303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9218303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9219254f796bSMatt Gates 9220254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9221254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9222072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9223254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9224254f796bSMatt Gates } 9225254f796bSMatt Gates 9226b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9227e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9228e1f7de0cSMatt Gates /* 9229e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9230e1f7de0cSMatt Gates */ 9231e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9232e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9233e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9234e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 923596b6ce4eSDon Brace } else 923696b6ce4eSDon Brace if (trans_support & CFGTBL_Trans_io_accel2) 9237c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9238303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9239c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9240c706a795SRobert Elliott dev_err(&h->pdev->dev, 9241c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9242c706a795SRobert Elliott return -ENODEV; 9243c706a795SRobert Elliott } 9244303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9245303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9246050f7147SStephen Cameron dev_err(&h->pdev->dev, 9247050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9248c706a795SRobert Elliott return -ENODEV; 9249303932fdSDon Brace } 9250960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9251e1f7de0cSMatt Gates h->access = access; 9252e1f7de0cSMatt Gates h->transMethod = transMethod; 9253e1f7de0cSMatt Gates 9254b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9255b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9256c706a795SRobert Elliott return 0; 9257e1f7de0cSMatt Gates 9258b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9259e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9260e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9261e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9262e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9263e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9264e1f7de0cSMatt Gates } 9265283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9266283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9267e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9268e1f7de0cSMatt Gates 9269e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9270072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9271072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9272072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9273072b0518SStephen M. Cameron h->reply_queue_size); 9274e1f7de0cSMatt Gates 9275e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9276e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9277e1f7de0cSMatt Gates */ 9278e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9279e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9280e1f7de0cSMatt Gates 9281e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9282e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9283e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9284e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9285e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 92862b08b3e9SDon Brace cp->host_context_flags = 92872b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9288e1f7de0cSMatt Gates cp->timeout_sec = 0; 9289e1f7de0cSMatt Gates cp->ReplyQueue = 0; 929050a0decfSStephen M. Cameron cp->tag = 9291f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 929250a0decfSStephen M. Cameron cp->host_addr = 929350a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9294e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9295e1f7de0cSMatt Gates } 9296b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9297b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9298b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9299b9af4937SStephen M. Cameron int rc; 9300b9af4937SStephen M. Cameron 9301b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9302b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9303b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9304b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9305b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9306b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9307b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9308b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9309b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9310b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9311b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9312b9af4937SStephen M. Cameron cfg_base_addr_index) + 9313b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9314b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9315b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9316b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9317b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9318b9af4937SStephen M. Cameron } 9319b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9320c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9321c706a795SRobert Elliott dev_err(&h->pdev->dev, 9322c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9323c706a795SRobert Elliott return -ENODEV; 9324c706a795SRobert Elliott } 9325c706a795SRobert Elliott return 0; 9326e1f7de0cSMatt Gates } 9327e1f7de0cSMatt Gates 93281fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93291fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93301fb7c98aSRobert Elliott { 9331105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93321fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93331fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93341fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93351fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9336105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9337105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9338105a3dbcSRobert Elliott } 93391fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9340105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93411fb7c98aSRobert Elliott } 93421fb7c98aSRobert Elliott 9343d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9344d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9345e1f7de0cSMatt Gates { 9346283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9347283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9348283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9349283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9350283b4a9bSStephen M. Cameron 9351e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9352e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9353e1f7de0cSMatt Gates * hardware. 9354e1f7de0cSMatt Gates */ 9355e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9356e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9357e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 93588bc8f47eSChristoph Hellwig dma_alloc_coherent(&h->pdev->dev, 9359e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93608bc8f47eSChristoph Hellwig &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9361e1f7de0cSMatt Gates 9362e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9363283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9364e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9365e1f7de0cSMatt Gates 9366e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9367e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9368e1f7de0cSMatt Gates goto clean_up; 9369e1f7de0cSMatt Gates 9370e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9371e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9372e1f7de0cSMatt Gates return 0; 9373e1f7de0cSMatt Gates 9374e1f7de0cSMatt Gates clean_up: 93751fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 93762dd02d74SRobert Elliott return -ENOMEM; 93776c311b57SStephen M. Cameron } 93786c311b57SStephen M. Cameron 93791fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 93801fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 93811fb7c98aSRobert Elliott { 9382d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9383d9a729f3SWebb Scales 9384105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 93851fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93861fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 93871fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 93881fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9389105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9390105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9391105a3dbcSRobert Elliott } 93921fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9393105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 93941fb7c98aSRobert Elliott } 93951fb7c98aSRobert Elliott 9396d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9397d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9398aca9012aSStephen M. Cameron { 9399d9a729f3SWebb Scales int rc; 9400d9a729f3SWebb Scales 9401aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9402aca9012aSStephen M. Cameron 9403aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9404aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9405aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9406aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9407aca9012aSStephen M. Cameron 9408aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9409aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9410aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 94118bc8f47eSChristoph Hellwig dma_alloc_coherent(&h->pdev->dev, 9412aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94138bc8f47eSChristoph Hellwig &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9414aca9012aSStephen M. Cameron 9415aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9416aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9417aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9418aca9012aSStephen M. Cameron 9419aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9420d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9421d9a729f3SWebb Scales rc = -ENOMEM; 9422d9a729f3SWebb Scales goto clean_up; 9423d9a729f3SWebb Scales } 9424d9a729f3SWebb Scales 9425d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9426d9a729f3SWebb Scales if (rc) 9427aca9012aSStephen M. Cameron goto clean_up; 9428aca9012aSStephen M. Cameron 9429aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9430aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9431aca9012aSStephen M. Cameron return 0; 9432aca9012aSStephen M. Cameron 9433aca9012aSStephen M. Cameron clean_up: 94341fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9435d9a729f3SWebb Scales return rc; 9436aca9012aSStephen M. Cameron } 9437aca9012aSStephen M. Cameron 9438105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9439105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9440105a3dbcSRobert Elliott { 9441105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9442105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9443105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9444105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9445105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9446105a3dbcSRobert Elliott } 9447105a3dbcSRobert Elliott 9448105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9449105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9450105a3dbcSRobert Elliott */ 9451105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94526c311b57SStephen M. Cameron { 94536c311b57SStephen M. Cameron u32 trans_support; 9454e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9455e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9456105a3dbcSRobert Elliott int i, rc; 94576c311b57SStephen M. Cameron 945802ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9459105a3dbcSRobert Elliott return 0; 946002ec19c8SStephen M. Cameron 946167c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 946267c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9463105a3dbcSRobert Elliott return 0; 946467c99a72Sscameron@beardog.cce.hp.com 9465e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9466e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9467e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9468e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9469105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9470105a3dbcSRobert Elliott if (rc) 9471105a3dbcSRobert Elliott return rc; 9472105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9473aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9474aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9475105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9476105a3dbcSRobert Elliott if (rc) 9477105a3dbcSRobert Elliott return rc; 9478e1f7de0cSMatt Gates } 9479e1f7de0cSMatt Gates 9480bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9481cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 94826c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9483072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 94846c311b57SStephen M. Cameron 9485254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 94868bc8f47eSChristoph Hellwig h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9487072b0518SStephen M. Cameron h->reply_queue_size, 94888bc8f47eSChristoph Hellwig &h->reply_queue[i].busaddr, 94898bc8f47eSChristoph Hellwig GFP_KERNEL); 9490105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9491105a3dbcSRobert Elliott rc = -ENOMEM; 9492105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9493105a3dbcSRobert Elliott } 9494254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9495254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9496254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9497254f796bSMatt Gates } 9498254f796bSMatt Gates 94996c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9500d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95016c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9502105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9503105a3dbcSRobert Elliott rc = -ENOMEM; 9504105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9505105a3dbcSRobert Elliott } 95066c311b57SStephen M. Cameron 9507105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9508105a3dbcSRobert Elliott if (rc) 9509105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9510105a3dbcSRobert Elliott return 0; 9511303932fdSDon Brace 9512105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9513303932fdSDon Brace kfree(h->blockFetchTable); 9514105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9515105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9516105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9517105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9518105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9519105a3dbcSRobert Elliott return rc; 9520303932fdSDon Brace } 9521303932fdSDon Brace 952223100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 952376438d08SStephen M. Cameron { 952423100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 952523100dd9SStephen M. Cameron } 952623100dd9SStephen M. Cameron 952723100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 952823100dd9SStephen M. Cameron { 952923100dd9SStephen M. Cameron struct CommandList *c = NULL; 9530f2405db8SDon Brace int i, accel_cmds_out; 9531281a7fd0SWebb Scales int refcount; 953276438d08SStephen M. Cameron 9533f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 953423100dd9SStephen M. Cameron accel_cmds_out = 0; 9535f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9536f2405db8SDon Brace c = h->cmd_pool + i; 9537281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9538281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 953923100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9540281a7fd0SWebb Scales cmd_free(h, c); 9541f2405db8SDon Brace } 954223100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 954376438d08SStephen M. Cameron break; 954476438d08SStephen M. Cameron msleep(100); 954576438d08SStephen M. Cameron } while (1); 954676438d08SStephen M. Cameron } 954776438d08SStephen M. Cameron 9548d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9549d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9550d04e62b9SKevin Barnett { 9551d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9552d04e62b9SKevin Barnett struct sas_phy *phy; 9553d04e62b9SKevin Barnett 9554d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9555d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9556d04e62b9SKevin Barnett return NULL; 9557d04e62b9SKevin Barnett 9558d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9559d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9560d04e62b9SKevin Barnett if (!phy) { 9561d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9562d04e62b9SKevin Barnett return NULL; 9563d04e62b9SKevin Barnett } 9564d04e62b9SKevin Barnett 9565d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9566d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9567d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9568d04e62b9SKevin Barnett 9569d04e62b9SKevin Barnett return hpsa_sas_phy; 9570d04e62b9SKevin Barnett } 9571d04e62b9SKevin Barnett 9572d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9573d04e62b9SKevin Barnett { 9574d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9575d04e62b9SKevin Barnett 9576d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9577d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9578d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 957955ca38b4SMartin Wilck sas_phy_delete(phy); 9580d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9581d04e62b9SKevin Barnett } 9582d04e62b9SKevin Barnett 9583d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9584d04e62b9SKevin Barnett { 9585d04e62b9SKevin Barnett int rc; 9586d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9587d04e62b9SKevin Barnett struct sas_phy *phy; 9588d04e62b9SKevin Barnett struct sas_identify *identify; 9589d04e62b9SKevin Barnett 9590d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9591d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9592d04e62b9SKevin Barnett 9593d04e62b9SKevin Barnett identify = &phy->identify; 9594d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9595d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9596d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9597d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9598d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9599d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9600d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9601d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9602d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9603d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9604d04e62b9SKevin Barnett 9605d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9606d04e62b9SKevin Barnett if (rc) 9607d04e62b9SKevin Barnett return rc; 9608d04e62b9SKevin Barnett 9609d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9610d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9611d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9612d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9613d04e62b9SKevin Barnett 9614d04e62b9SKevin Barnett return 0; 9615d04e62b9SKevin Barnett } 9616d04e62b9SKevin Barnett 9617d04e62b9SKevin Barnett static int 9618d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9619d04e62b9SKevin Barnett struct sas_rphy *rphy) 9620d04e62b9SKevin Barnett { 9621d04e62b9SKevin Barnett struct sas_identify *identify; 9622d04e62b9SKevin Barnett 9623d04e62b9SKevin Barnett identify = &rphy->identify; 9624d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9625d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9626d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9627d04e62b9SKevin Barnett 9628d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9629d04e62b9SKevin Barnett } 9630d04e62b9SKevin Barnett 9631d04e62b9SKevin Barnett static struct hpsa_sas_port 9632d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9633d04e62b9SKevin Barnett u64 sas_address) 9634d04e62b9SKevin Barnett { 9635d04e62b9SKevin Barnett int rc; 9636d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9637d04e62b9SKevin Barnett struct sas_port *port; 9638d04e62b9SKevin Barnett 9639d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9640d04e62b9SKevin Barnett if (!hpsa_sas_port) 9641d04e62b9SKevin Barnett return NULL; 9642d04e62b9SKevin Barnett 9643d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9644d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9645d04e62b9SKevin Barnett 9646d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9647d04e62b9SKevin Barnett if (!port) 9648d04e62b9SKevin Barnett goto free_hpsa_port; 9649d04e62b9SKevin Barnett 9650d04e62b9SKevin Barnett rc = sas_port_add(port); 9651d04e62b9SKevin Barnett if (rc) 9652d04e62b9SKevin Barnett goto free_sas_port; 9653d04e62b9SKevin Barnett 9654d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9655d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9656d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9657d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9658d04e62b9SKevin Barnett 9659d04e62b9SKevin Barnett return hpsa_sas_port; 9660d04e62b9SKevin Barnett 9661d04e62b9SKevin Barnett free_sas_port: 9662d04e62b9SKevin Barnett sas_port_free(port); 9663d04e62b9SKevin Barnett free_hpsa_port: 9664d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9665d04e62b9SKevin Barnett 9666d04e62b9SKevin Barnett return NULL; 9667d04e62b9SKevin Barnett } 9668d04e62b9SKevin Barnett 9669d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9670d04e62b9SKevin Barnett { 9671d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9672d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9673d04e62b9SKevin Barnett 9674d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9675d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9676d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9677d04e62b9SKevin Barnett 9678d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9679d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9680d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9681d04e62b9SKevin Barnett } 9682d04e62b9SKevin Barnett 9683d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9684d04e62b9SKevin Barnett { 9685d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9686d04e62b9SKevin Barnett 9687d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9688d04e62b9SKevin Barnett if (hpsa_sas_node) { 9689d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9690d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9691d04e62b9SKevin Barnett } 9692d04e62b9SKevin Barnett 9693d04e62b9SKevin Barnett return hpsa_sas_node; 9694d04e62b9SKevin Barnett } 9695d04e62b9SKevin Barnett 9696d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9697d04e62b9SKevin Barnett { 9698d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9699d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9700d04e62b9SKevin Barnett 9701d04e62b9SKevin Barnett if (!hpsa_sas_node) 9702d04e62b9SKevin Barnett return; 9703d04e62b9SKevin Barnett 9704d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9705d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9706d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9707d04e62b9SKevin Barnett 9708d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9709d04e62b9SKevin Barnett } 9710d04e62b9SKevin Barnett 9711d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9712d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9713d04e62b9SKevin Barnett struct sas_rphy *rphy) 9714d04e62b9SKevin Barnett { 9715d04e62b9SKevin Barnett int i; 9716d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9717d04e62b9SKevin Barnett 9718d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9719d04e62b9SKevin Barnett device = h->dev[i]; 9720d04e62b9SKevin Barnett if (!device->sas_port) 9721d04e62b9SKevin Barnett continue; 9722d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9723d04e62b9SKevin Barnett return device; 9724d04e62b9SKevin Barnett } 9725d04e62b9SKevin Barnett 9726d04e62b9SKevin Barnett return NULL; 9727d04e62b9SKevin Barnett } 9728d04e62b9SKevin Barnett 9729d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9730d04e62b9SKevin Barnett { 9731d04e62b9SKevin Barnett int rc; 9732d04e62b9SKevin Barnett struct device *parent_dev; 9733d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9734d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9735d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9736d04e62b9SKevin Barnett 97370a7c3bb8SDon Brace parent_dev = &h->scsi_host->shost_dev; 9738d04e62b9SKevin Barnett 9739d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9740d04e62b9SKevin Barnett if (!hpsa_sas_node) 9741d04e62b9SKevin Barnett return -ENOMEM; 9742d04e62b9SKevin Barnett 9743d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9744d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9745d04e62b9SKevin Barnett rc = -ENODEV; 9746d04e62b9SKevin Barnett goto free_sas_node; 9747d04e62b9SKevin Barnett } 9748d04e62b9SKevin Barnett 9749d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9750d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9751d04e62b9SKevin Barnett rc = -ENODEV; 9752d04e62b9SKevin Barnett goto free_sas_port; 9753d04e62b9SKevin Barnett } 9754d04e62b9SKevin Barnett 9755d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9756d04e62b9SKevin Barnett if (rc) 9757d04e62b9SKevin Barnett goto free_sas_phy; 9758d04e62b9SKevin Barnett 9759d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9760d04e62b9SKevin Barnett 9761d04e62b9SKevin Barnett return 0; 9762d04e62b9SKevin Barnett 9763d04e62b9SKevin Barnett free_sas_phy: 9764d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9765d04e62b9SKevin Barnett free_sas_port: 9766d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9767d04e62b9SKevin Barnett free_sas_node: 9768d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9769d04e62b9SKevin Barnett 9770d04e62b9SKevin Barnett return rc; 9771d04e62b9SKevin Barnett } 9772d04e62b9SKevin Barnett 9773d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9774d04e62b9SKevin Barnett { 9775d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9776d04e62b9SKevin Barnett } 9777d04e62b9SKevin Barnett 9778d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9779d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9780d04e62b9SKevin Barnett { 9781d04e62b9SKevin Barnett int rc; 9782d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9783d04e62b9SKevin Barnett struct sas_rphy *rphy; 9784d04e62b9SKevin Barnett 9785d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9786d04e62b9SKevin Barnett if (!hpsa_sas_port) 9787d04e62b9SKevin Barnett return -ENOMEM; 9788d04e62b9SKevin Barnett 9789d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9790d04e62b9SKevin Barnett if (!rphy) { 9791d04e62b9SKevin Barnett rc = -ENODEV; 9792d04e62b9SKevin Barnett goto free_sas_port; 9793d04e62b9SKevin Barnett } 9794d04e62b9SKevin Barnett 9795d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9796d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9797d04e62b9SKevin Barnett 9798d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9799d04e62b9SKevin Barnett if (rc) 9800d04e62b9SKevin Barnett goto free_sas_port; 9801d04e62b9SKevin Barnett 9802d04e62b9SKevin Barnett return 0; 9803d04e62b9SKevin Barnett 9804d04e62b9SKevin Barnett free_sas_port: 9805d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9806d04e62b9SKevin Barnett device->sas_port = NULL; 9807d04e62b9SKevin Barnett 9808d04e62b9SKevin Barnett return rc; 9809d04e62b9SKevin Barnett } 9810d04e62b9SKevin Barnett 9811d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9812d04e62b9SKevin Barnett { 9813d04e62b9SKevin Barnett if (device->sas_port) { 9814d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9815d04e62b9SKevin Barnett device->sas_port = NULL; 9816d04e62b9SKevin Barnett } 9817d04e62b9SKevin Barnett } 9818d04e62b9SKevin Barnett 9819d04e62b9SKevin Barnett static int 9820d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9821d04e62b9SKevin Barnett { 9822d04e62b9SKevin Barnett return 0; 9823d04e62b9SKevin Barnett } 9824d04e62b9SKevin Barnett 9825d04e62b9SKevin Barnett static int 9826d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9827d04e62b9SKevin Barnett { 982801d0e789SDon Brace struct Scsi_Host *shost = phy_to_shost(rphy); 982901d0e789SDon Brace struct ctlr_info *h; 983001d0e789SDon Brace struct hpsa_scsi_dev_t *sd; 983101d0e789SDon Brace 983201d0e789SDon Brace if (!shost) 983301d0e789SDon Brace return -ENXIO; 983401d0e789SDon Brace 983501d0e789SDon Brace h = shost_to_hba(shost); 983601d0e789SDon Brace 983701d0e789SDon Brace if (!h) 983801d0e789SDon Brace return -ENXIO; 983901d0e789SDon Brace 984001d0e789SDon Brace sd = hpsa_find_device_by_sas_rphy(h, rphy); 984101d0e789SDon Brace if (!sd) 984201d0e789SDon Brace return -ENXIO; 984301d0e789SDon Brace 984401d0e789SDon Brace *identifier = sd->eli; 984501d0e789SDon Brace 9846d04e62b9SKevin Barnett return 0; 9847d04e62b9SKevin Barnett } 9848d04e62b9SKevin Barnett 9849d04e62b9SKevin Barnett static int 9850d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9851d04e62b9SKevin Barnett { 9852d04e62b9SKevin Barnett return -ENXIO; 9853d04e62b9SKevin Barnett } 9854d04e62b9SKevin Barnett 9855d04e62b9SKevin Barnett static int 9856d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9857d04e62b9SKevin Barnett { 9858d04e62b9SKevin Barnett return 0; 9859d04e62b9SKevin Barnett } 9860d04e62b9SKevin Barnett 9861d04e62b9SKevin Barnett static int 9862d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9863d04e62b9SKevin Barnett { 9864d04e62b9SKevin Barnett return 0; 9865d04e62b9SKevin Barnett } 9866d04e62b9SKevin Barnett 9867d04e62b9SKevin Barnett static int 9868d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9869d04e62b9SKevin Barnett { 9870d04e62b9SKevin Barnett return 0; 9871d04e62b9SKevin Barnett } 9872d04e62b9SKevin Barnett 9873d04e62b9SKevin Barnett static void 9874d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9875d04e62b9SKevin Barnett { 9876d04e62b9SKevin Barnett } 9877d04e62b9SKevin Barnett 9878d04e62b9SKevin Barnett static int 9879d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9880d04e62b9SKevin Barnett { 9881d04e62b9SKevin Barnett return -EINVAL; 9882d04e62b9SKevin Barnett } 9883d04e62b9SKevin Barnett 9884d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9885d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9886d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9887d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9888d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9889d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9890d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9891d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9892d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9893d04e62b9SKevin Barnett }; 9894d04e62b9SKevin Barnett 9895edd16368SStephen M. Cameron /* 9896edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9897edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9898edd16368SStephen M. Cameron */ 9899edd16368SStephen M. Cameron static int __init hpsa_init(void) 9900edd16368SStephen M. Cameron { 9901d04e62b9SKevin Barnett int rc; 9902d04e62b9SKevin Barnett 9903d04e62b9SKevin Barnett hpsa_sas_transport_template = 9904d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9905d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9906d04e62b9SKevin Barnett return -ENODEV; 9907d04e62b9SKevin Barnett 9908d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9909d04e62b9SKevin Barnett 9910d04e62b9SKevin Barnett if (rc) 9911d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9912d04e62b9SKevin Barnett 9913d04e62b9SKevin Barnett return rc; 9914edd16368SStephen M. Cameron } 9915edd16368SStephen M. Cameron 9916edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9917edd16368SStephen M. Cameron { 9918edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9919d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9920edd16368SStephen M. Cameron } 9921edd16368SStephen M. Cameron 9922e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9923e1f7de0cSMatt Gates { 9924e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9925dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9926dd0e19f3SScott Teel 9927dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9928dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9929dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9930dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9931dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9932dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9933dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9934dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9935dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9936dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9937dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9938dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9939dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9940dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9941dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9942dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9943dd0e19f3SScott Teel 9944dd0e19f3SScott Teel #undef VERIFY_OFFSET 9945dd0e19f3SScott Teel 9946dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9947b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9948b66cc250SMike Miller 9949b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9950b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9951b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9952b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9953b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9954b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9955b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9956b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9957b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9958b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9959b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9960b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9961b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9962b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9963b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9964b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9965b66cc250SMike Miller 9966b66cc250SMike Miller #undef VERIFY_OFFSET 9967b66cc250SMike Miller 9968b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9969e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9970e1f7de0cSMatt Gates 9971e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9972e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9973e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9974e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9975e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9976e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9977e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9978e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9979e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9980e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9981e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9982e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9983e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9984e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9985e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9986e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9987e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9988e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9989e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9990e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9991e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9992e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 999350a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9994e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9995e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9996e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9997e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9998e1f7de0cSMatt Gates } 9999e1f7de0cSMatt Gates 10000edd16368SStephen M. Cameron module_init(hpsa_init); 10001edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10002