1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 280bfd7546cSDon Brace unsigned char lunaddr[], 281bfd7546cSDon Brace int reply_queue); 2826f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2836f039790SGreg Kroah-Hartman int wait_for_ready); 28475167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 285c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 287fe5389c8SStephen M. Cameron #define BOARD_READY 1 28823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28976438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 290c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 29203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29425163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 296c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 297d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 2998383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3008383278dSScott Teel unsigned char scsi3addr[], u8 page); 30134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 302ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 304ba74fdc4SDon Brace unsigned char *scsi3addr); 305edd16368SStephen M. Cameron 306edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307edd16368SStephen M. Cameron { 308edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 309edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 310edd16368SStephen M. Cameron } 311edd16368SStephen M. Cameron 312a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313a23513e8SStephen M. Cameron { 314a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 315a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 316a23513e8SStephen M. Cameron } 317a23513e8SStephen M. Cameron 318a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319a58e7e53SWebb Scales { 320a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 321a58e7e53SWebb Scales } 322a58e7e53SWebb Scales 323d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 324d604f533SWebb Scales { 325d604f533SWebb Scales return c->abort_pending || c->reset_pending; 326d604f533SWebb Scales } 327d604f533SWebb Scales 3289437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3299437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3309437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3319437ac43SStephen Cameron { 3329437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3339437ac43SStephen Cameron bool rc; 3349437ac43SStephen Cameron 3359437ac43SStephen Cameron *sense_key = -1; 3369437ac43SStephen Cameron *asc = -1; 3379437ac43SStephen Cameron *ascq = -1; 3389437ac43SStephen Cameron 3399437ac43SStephen Cameron if (sense_data_len < 1) 3409437ac43SStephen Cameron return; 3419437ac43SStephen Cameron 3429437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3439437ac43SStephen Cameron if (rc) { 3449437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3459437ac43SStephen Cameron *asc = sshdr.asc; 3469437ac43SStephen Cameron *ascq = sshdr.ascq; 3479437ac43SStephen Cameron } 3489437ac43SStephen Cameron } 3499437ac43SStephen Cameron 350edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 351edd16368SStephen M. Cameron struct CommandList *c) 352edd16368SStephen M. Cameron { 3539437ac43SStephen Cameron u8 sense_key, asc, ascq; 3549437ac43SStephen Cameron int sense_len; 3559437ac43SStephen Cameron 3569437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3579437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3589437ac43SStephen Cameron else 3599437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3609437ac43SStephen Cameron 3619437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3629437ac43SStephen Cameron &sense_key, &asc, &ascq); 36381c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 364edd16368SStephen M. Cameron return 0; 365edd16368SStephen M. Cameron 3669437ac43SStephen Cameron switch (asc) { 367edd16368SStephen M. Cameron case STATE_CHANGED: 3689437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3702946e82bSRobert Elliott h->devname); 371edd16368SStephen M. Cameron break; 372edd16368SStephen M. Cameron case LUN_FAILED: 3737f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3742946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3777f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 379edd16368SStephen M. Cameron /* 3804f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3814f4eb9f1SScott Teel * target (array) devices. 382edd16368SStephen M. Cameron */ 383edd16368SStephen M. Cameron break; 384edd16368SStephen M. Cameron case POWER_OR_RESET: 3852946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3862946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3872946e82bSRobert Elliott h->devname); 388edd16368SStephen M. Cameron break; 389edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3902946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3912946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3922946e82bSRobert Elliott h->devname); 393edd16368SStephen M. Cameron break; 394edd16368SStephen M. Cameron default: 3952946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3962946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3972946e82bSRobert Elliott h->devname); 398edd16368SStephen M. Cameron break; 399edd16368SStephen M. Cameron } 400edd16368SStephen M. Cameron return 1; 401edd16368SStephen M. Cameron } 402edd16368SStephen M. Cameron 403852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404852af20aSMatt Bondurant { 405852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408852af20aSMatt Bondurant return 0; 409852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 410852af20aSMatt Bondurant return 1; 411852af20aSMatt Bondurant } 412852af20aSMatt Bondurant 413e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 414e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 415e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 416e985c58fSStephen Cameron { 417e985c58fSStephen Cameron int ld; 418e985c58fSStephen Cameron struct ctlr_info *h; 419e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 420e985c58fSStephen Cameron 421e985c58fSStephen Cameron h = shost_to_hba(shost); 422e985c58fSStephen Cameron ld = lockup_detected(h); 423e985c58fSStephen Cameron 424e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 425e985c58fSStephen Cameron } 426e985c58fSStephen Cameron 427da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428da0697bdSScott Teel struct device_attribute *attr, 429da0697bdSScott Teel const char *buf, size_t count) 430da0697bdSScott Teel { 431da0697bdSScott Teel int status, len; 432da0697bdSScott Teel struct ctlr_info *h; 433da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 434da0697bdSScott Teel char tmpbuf[10]; 435da0697bdSScott Teel 436da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437da0697bdSScott Teel return -EACCES; 438da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439da0697bdSScott Teel strncpy(tmpbuf, buf, len); 440da0697bdSScott Teel tmpbuf[len] = '\0'; 441da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 442da0697bdSScott Teel return -EINVAL; 443da0697bdSScott Teel h = shost_to_hba(shost); 444da0697bdSScott Teel h->acciopath_status = !!status; 445da0697bdSScott Teel dev_warn(&h->pdev->dev, 446da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 448da0697bdSScott Teel return count; 449da0697bdSScott Teel } 450da0697bdSScott Teel 4512ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4522ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4532ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4542ba8bfc8SStephen M. Cameron { 4552ba8bfc8SStephen M. Cameron int debug_level, len; 4562ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4572ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4582ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4592ba8bfc8SStephen M. Cameron 4602ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4612ba8bfc8SStephen M. Cameron return -EACCES; 4622ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4632ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4642ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4652ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4662ba8bfc8SStephen M. Cameron return -EINVAL; 4672ba8bfc8SStephen M. Cameron if (debug_level < 0) 4682ba8bfc8SStephen M. Cameron debug_level = 0; 4692ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4702ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4712ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4722ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4732ba8bfc8SStephen M. Cameron return count; 4742ba8bfc8SStephen M. Cameron } 4752ba8bfc8SStephen M. Cameron 476edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 477edd16368SStephen M. Cameron struct device_attribute *attr, 478edd16368SStephen M. Cameron const char *buf, size_t count) 479edd16368SStephen M. Cameron { 480edd16368SStephen M. Cameron struct ctlr_info *h; 481edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 482a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48331468401SMike Miller hpsa_scan_start(h->scsi_host); 484edd16368SStephen M. Cameron return count; 485edd16368SStephen M. Cameron } 486edd16368SStephen M. Cameron 487d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 488d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 489d28ce020SStephen M. Cameron { 490d28ce020SStephen M. Cameron struct ctlr_info *h; 491d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 492d28ce020SStephen M. Cameron unsigned char *fwrev; 493d28ce020SStephen M. Cameron 494d28ce020SStephen M. Cameron h = shost_to_hba(shost); 495d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 496d28ce020SStephen M. Cameron return 0; 497d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 498d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 499d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500d28ce020SStephen M. Cameron } 501d28ce020SStephen M. Cameron 50294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50394a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50494a13649SStephen M. Cameron { 50594a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50694a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50794a13649SStephen M. Cameron 5080cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5090cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 51094a13649SStephen M. Cameron } 51194a13649SStephen M. Cameron 512745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 513745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 514745a7a25SStephen M. Cameron { 515745a7a25SStephen M. Cameron struct ctlr_info *h; 516745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 517745a7a25SStephen M. Cameron 518745a7a25SStephen M. Cameron h = shost_to_hba(shost); 519745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 520960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 521745a7a25SStephen M. Cameron "performant" : "simple"); 522745a7a25SStephen M. Cameron } 523745a7a25SStephen M. Cameron 524da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525da0697bdSScott Teel struct device_attribute *attr, char *buf) 526da0697bdSScott Teel { 527da0697bdSScott Teel struct ctlr_info *h; 528da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 529da0697bdSScott Teel 530da0697bdSScott Teel h = shost_to_hba(shost); 531da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 533da0697bdSScott Teel } 534da0697bdSScott Teel 53546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 537941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 538941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 539941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 540941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 541941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 542941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 543941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 544941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 545941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 546941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 547941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 548941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5497af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 550941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 551941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5525a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5535a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5545a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5555a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5565a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5575a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 558941b1cdaSStephen M. Cameron }; 559941b1cdaSStephen M. Cameron 56046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 56146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5627af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5635a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5645a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5655a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5665a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5675a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5685a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56946380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 57046380786SStephen M. Cameron * which share a battery backed cache module. One controls the 57146380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 57246380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57346380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57446380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57546380786SStephen M. Cameron */ 57646380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57746380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57846380786SStephen M. Cameron }; 57946380786SStephen M. Cameron 5809b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5819b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5829b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5839b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5849b5c48c2SStephen Cameron }; 5859b5c48c2SStephen Cameron 5869b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587941b1cdaSStephen M. Cameron { 588941b1cdaSStephen M. Cameron int i; 589941b1cdaSStephen M. Cameron 5909b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5919b5c48c2SStephen Cameron if (a[i] == board_id) 592941b1cdaSStephen M. Cameron return 1; 5939b5c48c2SStephen Cameron return 0; 5949b5c48c2SStephen Cameron } 5959b5c48c2SStephen Cameron 5969b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5979b5c48c2SStephen Cameron { 5989b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5999b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 600941b1cdaSStephen M. Cameron } 601941b1cdaSStephen M. Cameron 60246380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60346380786SStephen M. Cameron { 6049b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6059b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60646380786SStephen M. Cameron } 60746380786SStephen M. Cameron 60846380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60946380786SStephen M. Cameron { 61046380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 61146380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 61246380786SStephen M. Cameron } 61346380786SStephen M. Cameron 6149b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6159b5c48c2SStephen Cameron { 6169b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6179b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6189b5c48c2SStephen Cameron } 6199b5c48c2SStephen Cameron 620941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 621941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 622941b1cdaSStephen M. Cameron { 623941b1cdaSStephen M. Cameron struct ctlr_info *h; 624941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 625941b1cdaSStephen M. Cameron 626941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62746380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628941b1cdaSStephen M. Cameron } 629941b1cdaSStephen M. Cameron 630edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631edd16368SStephen M. Cameron { 632edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 633edd16368SStephen M. Cameron } 634edd16368SStephen M. Cameron 635f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6367c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637edd16368SStephen M. Cameron }; 6386b80b18fSScott Teel #define HPSA_RAID_0 0 6396b80b18fSScott Teel #define HPSA_RAID_4 1 6406b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6416b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6426b80b18fSScott Teel #define HPSA_RAID_51 4 6436b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6446b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6457c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6467c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647edd16368SStephen M. Cameron 648f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649f3f01730SKevin Barnett { 650f3f01730SKevin Barnett return !device->physical_device; 651f3f01730SKevin Barnett } 652edd16368SStephen M. Cameron 653edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 654edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 655edd16368SStephen M. Cameron { 656edd16368SStephen M. Cameron ssize_t l = 0; 65782a72c0aSStephen M. Cameron unsigned char rlevel; 658edd16368SStephen M. Cameron struct ctlr_info *h; 659edd16368SStephen M. Cameron struct scsi_device *sdev; 660edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 661edd16368SStephen M. Cameron unsigned long flags; 662edd16368SStephen M. Cameron 663edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 664edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 665edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 666edd16368SStephen M. Cameron hdev = sdev->hostdata; 667edd16368SStephen M. Cameron if (!hdev) { 668edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 669edd16368SStephen M. Cameron return -ENODEV; 670edd16368SStephen M. Cameron } 671edd16368SStephen M. Cameron 672edd16368SStephen M. Cameron /* Is this even a logical drive? */ 673f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 674edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 675edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676edd16368SStephen M. Cameron return l; 677edd16368SStephen M. Cameron } 678edd16368SStephen M. Cameron 679edd16368SStephen M. Cameron rlevel = hdev->raid_level; 680edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 68182a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 682edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 683edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684edd16368SStephen M. Cameron return l; 685edd16368SStephen M. Cameron } 686edd16368SStephen M. Cameron 687edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 688edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 689edd16368SStephen M. Cameron { 690edd16368SStephen M. Cameron struct ctlr_info *h; 691edd16368SStephen M. Cameron struct scsi_device *sdev; 692edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 693edd16368SStephen M. Cameron unsigned long flags; 694edd16368SStephen M. Cameron unsigned char lunid[8]; 695edd16368SStephen M. Cameron 696edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 697edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 698edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 699edd16368SStephen M. Cameron hdev = sdev->hostdata; 700edd16368SStephen M. Cameron if (!hdev) { 701edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 702edd16368SStephen M. Cameron return -ENODEV; 703edd16368SStephen M. Cameron } 704edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 706609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 707edd16368SStephen M. Cameron } 708edd16368SStephen M. Cameron 709edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 710edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 711edd16368SStephen M. Cameron { 712edd16368SStephen M. Cameron struct ctlr_info *h; 713edd16368SStephen M. Cameron struct scsi_device *sdev; 714edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 715edd16368SStephen M. Cameron unsigned long flags; 716edd16368SStephen M. Cameron unsigned char sn[16]; 717edd16368SStephen M. Cameron 718edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 719edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 720edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 721edd16368SStephen M. Cameron hdev = sdev->hostdata; 722edd16368SStephen M. Cameron if (!hdev) { 723edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 724edd16368SStephen M. Cameron return -ENODEV; 725edd16368SStephen M. Cameron } 726edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 727edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 728edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 729edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 730edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 731edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 732edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 733edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 734edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 735edd16368SStephen M. Cameron } 736edd16368SStephen M. Cameron 737ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 738ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 739ded1be4aSJoseph T Handzik { 740ded1be4aSJoseph T Handzik struct ctlr_info *h; 741ded1be4aSJoseph T Handzik struct scsi_device *sdev; 742ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 743ded1be4aSJoseph T Handzik unsigned long flags; 744ded1be4aSJoseph T Handzik u64 sas_address; 745ded1be4aSJoseph T Handzik 746ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 747ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 748ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 749ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 750ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 751ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 752ded1be4aSJoseph T Handzik return -ENODEV; 753ded1be4aSJoseph T Handzik } 754ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 755ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 756ded1be4aSJoseph T Handzik 757ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 758ded1be4aSJoseph T Handzik } 759ded1be4aSJoseph T Handzik 760c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 761c1988684SScott Teel struct device_attribute *attr, char *buf) 762c1988684SScott Teel { 763c1988684SScott Teel struct ctlr_info *h; 764c1988684SScott Teel struct scsi_device *sdev; 765c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 766c1988684SScott Teel unsigned long flags; 767c1988684SScott Teel int offload_enabled; 768c1988684SScott Teel 769c1988684SScott Teel sdev = to_scsi_device(dev); 770c1988684SScott Teel h = sdev_to_hba(sdev); 771c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 772c1988684SScott Teel hdev = sdev->hostdata; 773c1988684SScott Teel if (!hdev) { 774c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 775c1988684SScott Teel return -ENODEV; 776c1988684SScott Teel } 777c1988684SScott Teel offload_enabled = hdev->offload_enabled; 778c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 779c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 780c1988684SScott Teel } 781c1988684SScott Teel 7828270b862SJoe Handzik #define MAX_PATHS 8 7838270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7848270b862SJoe Handzik struct device_attribute *attr, char *buf) 7858270b862SJoe Handzik { 7868270b862SJoe Handzik struct ctlr_info *h; 7878270b862SJoe Handzik struct scsi_device *sdev; 7888270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7898270b862SJoe Handzik unsigned long flags; 7908270b862SJoe Handzik int i; 7918270b862SJoe Handzik int output_len = 0; 7928270b862SJoe Handzik u8 box; 7938270b862SJoe Handzik u8 bay; 7948270b862SJoe Handzik u8 path_map_index = 0; 7958270b862SJoe Handzik char *active; 7968270b862SJoe Handzik unsigned char phys_connector[2]; 7978270b862SJoe Handzik 7988270b862SJoe Handzik sdev = to_scsi_device(dev); 7998270b862SJoe Handzik h = sdev_to_hba(sdev); 8008270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8018270b862SJoe Handzik hdev = sdev->hostdata; 8028270b862SJoe Handzik if (!hdev) { 8038270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8048270b862SJoe Handzik return -ENODEV; 8058270b862SJoe Handzik } 8068270b862SJoe Handzik 8078270b862SJoe Handzik bay = hdev->bay; 8088270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8098270b862SJoe Handzik path_map_index = 1<<i; 8108270b862SJoe Handzik if (i == hdev->active_path_index) 8118270b862SJoe Handzik active = "Active"; 8128270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8138270b862SJoe Handzik active = "Inactive"; 8148270b862SJoe Handzik else 8158270b862SJoe Handzik continue; 8168270b862SJoe Handzik 8171faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8181faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8191faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8208270b862SJoe Handzik h->scsi_host->host_no, 8218270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8228270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8238270b862SJoe Handzik 824cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8252708f295SDon Brace output_len += scnprintf(buf + output_len, 8261faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8271faf072cSRasmus Villemoes "%s\n", active); 8288270b862SJoe Handzik continue; 8298270b862SJoe Handzik } 8308270b862SJoe Handzik 8318270b862SJoe Handzik box = hdev->box[i]; 8328270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8338270b862SJoe Handzik sizeof(phys_connector)); 8348270b862SJoe Handzik if (phys_connector[0] < '0') 8358270b862SJoe Handzik phys_connector[0] = '0'; 8368270b862SJoe Handzik if (phys_connector[1] < '0') 8378270b862SJoe Handzik phys_connector[1] = '0'; 8382708f295SDon Brace output_len += scnprintf(buf + output_len, 8391faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8408270b862SJoe Handzik "PORT: %.2s ", 8418270b862SJoe Handzik phys_connector); 842af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 843af15ed36SDon Brace hdev->expose_device) { 8448270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8452708f295SDon Brace output_len += scnprintf(buf + output_len, 8461faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8478270b862SJoe Handzik "BAY: %hhu %s\n", 8488270b862SJoe Handzik bay, active); 8498270b862SJoe Handzik } else { 8502708f295SDon Brace output_len += scnprintf(buf + output_len, 8511faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8528270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8538270b862SJoe Handzik box, bay, active); 8548270b862SJoe Handzik } 8558270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8562708f295SDon Brace output_len += scnprintf(buf + output_len, 8571faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8588270b862SJoe Handzik box, active); 8598270b862SJoe Handzik } else 8602708f295SDon Brace output_len += scnprintf(buf + output_len, 8611faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8628270b862SJoe Handzik } 8638270b862SJoe Handzik 8648270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8651faf072cSRasmus Villemoes return output_len; 8668270b862SJoe Handzik } 8678270b862SJoe Handzik 86816961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 86916961204SHannes Reinecke struct device_attribute *attr, char *buf) 87016961204SHannes Reinecke { 87116961204SHannes Reinecke struct ctlr_info *h; 87216961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 87316961204SHannes Reinecke 87416961204SHannes Reinecke h = shost_to_hba(shost); 87516961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 87616961204SHannes Reinecke } 87716961204SHannes Reinecke 8783f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8793f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8813f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 882ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 883c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 884c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8858270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 886da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 887da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 888da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8892ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8902ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8913f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8923f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8933f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8943f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8953f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8963f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 897941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 898941b1cdaSStephen M. Cameron host_show_resettable, NULL); 899e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 900e985c58fSStephen Cameron host_show_lockup_detected, NULL); 90116961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 90216961204SHannes Reinecke host_show_ctlr_num, NULL); 9033f5eac3aSStephen M. Cameron 9043f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 9053f5eac3aSStephen M. Cameron &dev_attr_raid_level, 9063f5eac3aSStephen M. Cameron &dev_attr_lunid, 9073f5eac3aSStephen M. Cameron &dev_attr_unique_id, 908c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9098270b862SJoe Handzik &dev_attr_path_info, 910ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9113f5eac3aSStephen M. Cameron NULL, 9123f5eac3aSStephen M. Cameron }; 9133f5eac3aSStephen M. Cameron 9143f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9153f5eac3aSStephen M. Cameron &dev_attr_rescan, 9163f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9173f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9183f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 919941b1cdaSStephen M. Cameron &dev_attr_resettable, 920da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9212ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 922fb53c439STomas Henzl &dev_attr_lockup_detected, 92316961204SHannes Reinecke &dev_attr_ctlr_num, 9243f5eac3aSStephen M. Cameron NULL, 9253f5eac3aSStephen M. Cameron }; 9263f5eac3aSStephen M. Cameron 92741ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 92841ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 92941ce4c35SStephen Cameron 9303f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9313f5eac3aSStephen M. Cameron .module = THIS_MODULE, 932f79cfec6SStephen M. Cameron .name = HPSA, 933f79cfec6SStephen M. Cameron .proc_name = HPSA, 9343f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9353f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9363f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9377c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9383f5eac3aSStephen M. Cameron .this_id = -1, 9393f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 94075167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9413f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9423f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9433f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 94441ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9453f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9463f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9473f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9483f5eac3aSStephen M. Cameron #endif 9493f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9503f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 951c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 95254b2b50cSMartin K. Petersen .no_write_same = 1, 9533f5eac3aSStephen M. Cameron }; 9543f5eac3aSStephen M. Cameron 955254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9563f5eac3aSStephen M. Cameron { 9573f5eac3aSStephen M. Cameron u32 a; 958072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9593f5eac3aSStephen M. Cameron 960e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 961e1f7de0cSMatt Gates return h->access.command_completed(h, q); 962e1f7de0cSMatt Gates 9633f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 964254f796bSMatt Gates return h->access.command_completed(h, q); 9653f5eac3aSStephen M. Cameron 966254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 967254f796bSMatt Gates a = rq->head[rq->current_entry]; 968254f796bSMatt Gates rq->current_entry++; 9690cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9703f5eac3aSStephen M. Cameron } else { 9713f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9723f5eac3aSStephen M. Cameron } 9733f5eac3aSStephen M. Cameron /* Check for wraparound */ 974254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 975254f796bSMatt Gates rq->current_entry = 0; 976254f796bSMatt Gates rq->wraparound ^= 1; 9773f5eac3aSStephen M. Cameron } 9783f5eac3aSStephen M. Cameron return a; 9793f5eac3aSStephen M. Cameron } 9803f5eac3aSStephen M. Cameron 981c349775eSScott Teel /* 982c349775eSScott Teel * There are some special bits in the bus address of the 983c349775eSScott Teel * command that we have to set for the controller to know 984c349775eSScott Teel * how to process the command: 985c349775eSScott Teel * 986c349775eSScott Teel * Normal performant mode: 987c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 988c349775eSScott Teel * bits 1-3 = block fetch table entry 989c349775eSScott Teel * bits 4-6 = command type (== 0) 990c349775eSScott Teel * 991c349775eSScott Teel * ioaccel1 mode: 992c349775eSScott Teel * bit 0 = "performant mode" bit. 993c349775eSScott Teel * bits 1-3 = block fetch table entry 994c349775eSScott Teel * bits 4-6 = command type (== 110) 995c349775eSScott Teel * (command type is needed because ioaccel1 mode 996c349775eSScott Teel * commands are submitted through the same register as normal 997c349775eSScott Teel * mode commands, so this is how the controller knows whether 998c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 999c349775eSScott Teel * 1000c349775eSScott Teel * ioaccel2 mode: 1001c349775eSScott Teel * bit 0 = "performant mode" bit. 1002c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1003c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1004c349775eSScott Teel * a separate special register for submitting commands. 1005c349775eSScott Teel */ 1006c349775eSScott Teel 100725163bd5SWebb Scales /* 100825163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10093f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10103f5eac3aSStephen M. Cameron * register number 10113f5eac3aSStephen M. Cameron */ 101225163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 101325163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 101425163bd5SWebb Scales int reply_queue) 10153f5eac3aSStephen M. Cameron { 1016254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10173f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1018bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 101925163bd5SWebb Scales return; 102025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1021254f796bSMatt Gates c->Header.ReplyQueue = 1022804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 102325163bd5SWebb Scales else 102425163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1025254f796bSMatt Gates } 10263f5eac3aSStephen M. Cameron } 10273f5eac3aSStephen M. Cameron 1028c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 102925163bd5SWebb Scales struct CommandList *c, 103025163bd5SWebb Scales int reply_queue) 1031c349775eSScott Teel { 1032c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1033c349775eSScott Teel 103425163bd5SWebb Scales /* 103525163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1036c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1037c349775eSScott Teel */ 103825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1039c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 104025163bd5SWebb Scales else 104125163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 104225163bd5SWebb Scales /* 104325163bd5SWebb Scales * Set the bits in the address sent down to include: 1044c349775eSScott Teel * - performant mode bit (bit 0) 1045c349775eSScott Teel * - pull count (bits 1-3) 1046c349775eSScott Teel * - command type (bits 4-6) 1047c349775eSScott Teel */ 1048c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1049c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1050c349775eSScott Teel } 1051c349775eSScott Teel 10528be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10538be986ccSStephen Cameron struct CommandList *c, 10548be986ccSStephen Cameron int reply_queue) 10558be986ccSStephen Cameron { 10568be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10578be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10588be986ccSStephen Cameron 10598be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10608be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10618be986ccSStephen Cameron */ 10628be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10638be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10648be986ccSStephen Cameron else 10658be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10668be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10678be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10688be986ccSStephen Cameron * - pull count (bits 0-3) 10698be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10708be986ccSStephen Cameron */ 10718be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10728be986ccSStephen Cameron } 10738be986ccSStephen Cameron 1074c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 107525163bd5SWebb Scales struct CommandList *c, 107625163bd5SWebb Scales int reply_queue) 1077c349775eSScott Teel { 1078c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1079c349775eSScott Teel 108025163bd5SWebb Scales /* 108125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1082c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1083c349775eSScott Teel */ 108425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1085c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 108625163bd5SWebb Scales else 108725163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 108825163bd5SWebb Scales /* 108925163bd5SWebb Scales * Set the bits in the address sent down to include: 1090c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1091c349775eSScott Teel * - pull count (bits 0-3) 1092c349775eSScott Teel * - command type isn't needed for ioaccel2 1093c349775eSScott Teel */ 1094c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1095c349775eSScott Teel } 1096c349775eSScott Teel 1097e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1098e85c5974SStephen M. Cameron { 1099e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1100e85c5974SStephen M. Cameron } 1101e85c5974SStephen M. Cameron 1102e85c5974SStephen M. Cameron /* 1103e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1104e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1105e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1106e85c5974SStephen M. Cameron */ 1107e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1108e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1109e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1110e85c5974SStephen M. Cameron struct CommandList *c) 1111e85c5974SStephen M. Cameron { 1112e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1113e85c5974SStephen M. Cameron return; 1114e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1115e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1116e85c5974SStephen M. Cameron } 1117e85c5974SStephen M. Cameron 1118e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1119e85c5974SStephen M. Cameron struct CommandList *c) 1120e85c5974SStephen M. Cameron { 1121e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1122e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1123e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1124e85c5974SStephen M. Cameron } 1125e85c5974SStephen M. Cameron 112625163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 112725163bd5SWebb Scales struct CommandList *c, int reply_queue) 11283f5eac3aSStephen M. Cameron { 1129c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1130c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1131c349775eSScott Teel switch (c->cmd_type) { 1132c349775eSScott Teel case CMD_IOACCEL1: 113325163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1134c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1135c349775eSScott Teel break; 1136c349775eSScott Teel case CMD_IOACCEL2: 113725163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1138c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1139c349775eSScott Teel break; 11408be986ccSStephen Cameron case IOACCEL2_TMF: 11418be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11428be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11438be986ccSStephen Cameron break; 1144c349775eSScott Teel default: 114525163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1146f2405db8SDon Brace h->access.submit_command(h, c); 11473f5eac3aSStephen M. Cameron } 1148c05e8866SStephen Cameron } 11493f5eac3aSStephen M. Cameron 1150a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 115125163bd5SWebb Scales { 1152d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1153a58e7e53SWebb Scales return finish_cmd(c); 1154a58e7e53SWebb Scales 115525163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 115625163bd5SWebb Scales } 115725163bd5SWebb Scales 11583f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11593f5eac3aSStephen M. Cameron { 11603f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11613f5eac3aSStephen M. Cameron } 11623f5eac3aSStephen M. Cameron 11633f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11643f5eac3aSStephen M. Cameron { 11653f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11663f5eac3aSStephen M. Cameron return 0; 11673f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11683f5eac3aSStephen M. Cameron return 1; 11693f5eac3aSStephen M. Cameron return 0; 11703f5eac3aSStephen M. Cameron } 11713f5eac3aSStephen M. Cameron 1172edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1173edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1174edd16368SStephen M. Cameron { 1175edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1176edd16368SStephen M. Cameron * assumes h->devlock is held 1177edd16368SStephen M. Cameron */ 1178edd16368SStephen M. Cameron int i, found = 0; 1179cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1180edd16368SStephen M. Cameron 1181263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1182edd16368SStephen M. Cameron 1183edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1184edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1185263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1186edd16368SStephen M. Cameron } 1187edd16368SStephen M. Cameron 1188263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1189263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1190edd16368SStephen M. Cameron /* *bus = 1; */ 1191edd16368SStephen M. Cameron *target = i; 1192edd16368SStephen M. Cameron *lun = 0; 1193edd16368SStephen M. Cameron found = 1; 1194edd16368SStephen M. Cameron } 1195edd16368SStephen M. Cameron return !found; 1196edd16368SStephen M. Cameron } 1197edd16368SStephen M. Cameron 11981d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11990d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12000d96ef5fSWebb Scales { 12017c59a0d4SDon Brace #define LABEL_SIZE 25 12027c59a0d4SDon Brace char label[LABEL_SIZE]; 12037c59a0d4SDon Brace 12049975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12059975ec9dSDon Brace return; 12069975ec9dSDon Brace 12077c59a0d4SDon Brace switch (dev->devtype) { 12087c59a0d4SDon Brace case TYPE_RAID: 12097c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12107c59a0d4SDon Brace break; 12117c59a0d4SDon Brace case TYPE_ENCLOSURE: 12127c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12137c59a0d4SDon Brace break; 12147c59a0d4SDon Brace case TYPE_DISK: 1215af15ed36SDon Brace case TYPE_ZBC: 12167c59a0d4SDon Brace if (dev->external) 12177c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12187c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12197c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12207c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12217c59a0d4SDon Brace else 12227c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12237c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12247c59a0d4SDon Brace raid_label[dev->raid_level]); 12257c59a0d4SDon Brace break; 12267c59a0d4SDon Brace case TYPE_ROM: 12277c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12287c59a0d4SDon Brace break; 12297c59a0d4SDon Brace case TYPE_TAPE: 12307c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12317c59a0d4SDon Brace break; 12327c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12337c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12347c59a0d4SDon Brace break; 12357c59a0d4SDon Brace default: 12367c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12377c59a0d4SDon Brace break; 12387c59a0d4SDon Brace } 12397c59a0d4SDon Brace 12400d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12417c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12420d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12430d96ef5fSWebb Scales description, 12440d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12450d96ef5fSWebb Scales dev->vendor, 12460d96ef5fSWebb Scales dev->model, 12477c59a0d4SDon Brace label, 12480d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12490d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12502a168208SKevin Barnett dev->expose_device); 12510d96ef5fSWebb Scales } 12520d96ef5fSWebb Scales 1253edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12548aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1255edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1256edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1257edd16368SStephen M. Cameron { 1258edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1259edd16368SStephen M. Cameron int n = h->ndevices; 1260edd16368SStephen M. Cameron int i; 1261edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1262edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1263edd16368SStephen M. Cameron 1264cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1265edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1266edd16368SStephen M. Cameron "inaccessible.\n"); 1267edd16368SStephen M. Cameron return -1; 1268edd16368SStephen M. Cameron } 1269edd16368SStephen M. Cameron 1270edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1271edd16368SStephen M. Cameron if (device->lun != -1) 1272edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1273edd16368SStephen M. Cameron goto lun_assigned; 1274edd16368SStephen M. Cameron 1275edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1276edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12772b08b3e9SDon Brace * unit no, zero otherwise. 1278edd16368SStephen M. Cameron */ 1279edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1280edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1281edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1282edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1283edd16368SStephen M. Cameron return -1; 1284edd16368SStephen M. Cameron goto lun_assigned; 1285edd16368SStephen M. Cameron } 1286edd16368SStephen M. Cameron 1287edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1288edd16368SStephen M. Cameron * Search through our list and find the device which 12899a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1290edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1291edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1292edd16368SStephen M. Cameron */ 1293edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1294edd16368SStephen M. Cameron addr1[4] = 0; 12959a4178b7Sshane.seymour addr1[5] = 0; 1296edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1297edd16368SStephen M. Cameron sd = h->dev[i]; 1298edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1299edd16368SStephen M. Cameron addr2[4] = 0; 13009a4178b7Sshane.seymour addr2[5] = 0; 13019a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1302edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1303edd16368SStephen M. Cameron device->bus = sd->bus; 1304edd16368SStephen M. Cameron device->target = sd->target; 1305edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1306edd16368SStephen M. Cameron break; 1307edd16368SStephen M. Cameron } 1308edd16368SStephen M. Cameron } 1309edd16368SStephen M. Cameron if (device->lun == -1) { 1310edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1311edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1312edd16368SStephen M. Cameron "configuration.\n"); 1313edd16368SStephen M. Cameron return -1; 1314edd16368SStephen M. Cameron } 1315edd16368SStephen M. Cameron 1316edd16368SStephen M. Cameron lun_assigned: 1317edd16368SStephen M. Cameron 1318edd16368SStephen M. Cameron h->dev[n] = device; 1319edd16368SStephen M. Cameron h->ndevices++; 1320edd16368SStephen M. Cameron added[*nadded] = device; 1321edd16368SStephen M. Cameron (*nadded)++; 13220d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13232a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1324a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1325a473d86cSRobert Elliott device->offload_enabled = 0; 1326edd16368SStephen M. Cameron return 0; 1327edd16368SStephen M. Cameron } 1328edd16368SStephen M. Cameron 1329bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13308aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1331bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1332bd9244f7SScott Teel { 1333a473d86cSRobert Elliott int offload_enabled; 1334bd9244f7SScott Teel /* assumes h->devlock is held */ 1335bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1336bd9244f7SScott Teel 1337bd9244f7SScott Teel /* Raid level changed. */ 1338bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1339250fb125SStephen M. Cameron 134003383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 134103383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 134203383736SDon Brace /* 134303383736SDon Brace * if drive is newly offload_enabled, we want to copy the 134403383736SDon Brace * raid map data first. If previously offload_enabled and 134503383736SDon Brace * offload_config were set, raid map data had better be 134603383736SDon Brace * the same as it was before. if raid map data is changed 134703383736SDon Brace * then it had better be the case that 134803383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 134903383736SDon Brace */ 13509fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 135103383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 135203383736SDon Brace } 1353a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1354a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1355a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1356a3144e0bSJoe Handzik } 1357a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 135803383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 135903383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 136003383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1361250fb125SStephen M. Cameron 136241ce4c35SStephen Cameron /* 136341ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 136441ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 136541ce4c35SStephen Cameron * can't do that until all the devices are updated. 136641ce4c35SStephen Cameron */ 136741ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 136841ce4c35SStephen Cameron if (!new_entry->offload_enabled) 136941ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 137041ce4c35SStephen Cameron 1371a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1372a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13730d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1374a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1375bd9244f7SScott Teel } 1376bd9244f7SScott Teel 13772a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13788aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13792a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13802a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13812a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13822a8ccf31SStephen M. Cameron { 13832a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1384cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13852a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13862a8ccf31SStephen M. Cameron (*nremoved)++; 138701350d05SStephen M. Cameron 138801350d05SStephen M. Cameron /* 138901350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 139001350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 139101350d05SStephen M. Cameron */ 139201350d05SStephen M. Cameron if (new_entry->target == -1) { 139301350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 139401350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 139501350d05SStephen M. Cameron } 139601350d05SStephen M. Cameron 13972a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13982a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13992a8ccf31SStephen M. Cameron (*nadded)++; 14000d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1401a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1402a473d86cSRobert Elliott new_entry->offload_enabled = 0; 14032a8ccf31SStephen M. Cameron } 14042a8ccf31SStephen M. Cameron 1405edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14068aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1407edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1408edd16368SStephen M. Cameron { 1409edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1410edd16368SStephen M. Cameron int i; 1411edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1412edd16368SStephen M. Cameron 1413cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1414edd16368SStephen M. Cameron 1415edd16368SStephen M. Cameron sd = h->dev[entry]; 1416edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1417edd16368SStephen M. Cameron (*nremoved)++; 1418edd16368SStephen M. Cameron 1419edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1420edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1421edd16368SStephen M. Cameron h->ndevices--; 14220d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1423edd16368SStephen M. Cameron } 1424edd16368SStephen M. Cameron 1425edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1426edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1427edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1428edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1429edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1430edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1431edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1432edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1433edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1434edd16368SStephen M. Cameron 1435edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1436edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1437edd16368SStephen M. Cameron { 1438edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1439edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1440edd16368SStephen M. Cameron */ 1441edd16368SStephen M. Cameron unsigned long flags; 1442edd16368SStephen M. Cameron int i, j; 1443edd16368SStephen M. Cameron 1444edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1445edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1446edd16368SStephen M. Cameron if (h->dev[i] == added) { 1447edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1448edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1449edd16368SStephen M. Cameron h->ndevices--; 1450edd16368SStephen M. Cameron break; 1451edd16368SStephen M. Cameron } 1452edd16368SStephen M. Cameron } 1453edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1454edd16368SStephen M. Cameron kfree(added); 1455edd16368SStephen M. Cameron } 1456edd16368SStephen M. Cameron 1457edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1458edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1459edd16368SStephen M. Cameron { 1460edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1461edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1462edd16368SStephen M. Cameron * to differ first 1463edd16368SStephen M. Cameron */ 1464edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1465edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1466edd16368SStephen M. Cameron return 0; 1467edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1468edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1469edd16368SStephen M. Cameron return 0; 1470edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1471edd16368SStephen M. Cameron return 0; 1472edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1473edd16368SStephen M. Cameron return 0; 1474edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1475edd16368SStephen M. Cameron return 0; 1476edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1477edd16368SStephen M. Cameron return 0; 1478edd16368SStephen M. Cameron return 1; 1479edd16368SStephen M. Cameron } 1480edd16368SStephen M. Cameron 1481bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1482bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1483bd9244f7SScott Teel { 1484bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1485bd9244f7SScott Teel * that the device is a different device, nor that the OS 1486bd9244f7SScott Teel * needs to be told anything about the change. 1487bd9244f7SScott Teel */ 1488bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1489bd9244f7SScott Teel return 1; 1490250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1491250fb125SStephen M. Cameron return 1; 1492250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1493250fb125SStephen M. Cameron return 1; 149493849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 149503383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 149603383736SDon Brace return 1; 1497bd9244f7SScott Teel return 0; 1498bd9244f7SScott Teel } 1499bd9244f7SScott Teel 1500edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1501edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1502edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1503bd9244f7SScott Teel * location in *index. 1504bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1505bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1506bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1507edd16368SStephen M. Cameron */ 1508edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1509edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1510edd16368SStephen M. Cameron int *index) 1511edd16368SStephen M. Cameron { 1512edd16368SStephen M. Cameron int i; 1513edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1514edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1515edd16368SStephen M. Cameron #define DEVICE_SAME 2 1516bd9244f7SScott Teel #define DEVICE_UPDATED 3 15171d33d85dSDon Brace if (needle == NULL) 15181d33d85dSDon Brace return DEVICE_NOT_FOUND; 15191d33d85dSDon Brace 1520edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 152123231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 152223231048SStephen M. Cameron continue; 1523edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1524edd16368SStephen M. Cameron *index = i; 1525bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1526bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1527bd9244f7SScott Teel return DEVICE_UPDATED; 1528edd16368SStephen M. Cameron return DEVICE_SAME; 1529bd9244f7SScott Teel } else { 15309846590eSStephen M. Cameron /* Keep offline devices offline */ 15319846590eSStephen M. Cameron if (needle->volume_offline) 15329846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1533edd16368SStephen M. Cameron return DEVICE_CHANGED; 1534edd16368SStephen M. Cameron } 1535edd16368SStephen M. Cameron } 1536bd9244f7SScott Teel } 1537edd16368SStephen M. Cameron *index = -1; 1538edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1539edd16368SStephen M. Cameron } 1540edd16368SStephen M. Cameron 15419846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15429846590eSStephen M. Cameron unsigned char scsi3addr[]) 15439846590eSStephen M. Cameron { 15449846590eSStephen M. Cameron struct offline_device_entry *device; 15459846590eSStephen M. Cameron unsigned long flags; 15469846590eSStephen M. Cameron 15479846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15489846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15499846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15509846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15519846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15529846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15539846590eSStephen M. Cameron return; 15549846590eSStephen M. Cameron } 15559846590eSStephen M. Cameron } 15569846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15579846590eSStephen M. Cameron 15589846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15599846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15609846590eSStephen M. Cameron if (!device) { 15619846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15629846590eSStephen M. Cameron return; 15639846590eSStephen M. Cameron } 15649846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15659846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15669846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15679846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15689846590eSStephen M. Cameron } 15699846590eSStephen M. Cameron 15709846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15719846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15729846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15739846590eSStephen M. Cameron { 15749846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15759846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15769846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15779846590eSStephen M. Cameron h->scsi_host->host_no, 15789846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15799846590eSStephen M. Cameron switch (sd->volume_offline) { 15809846590eSStephen M. Cameron case HPSA_LV_OK: 15819846590eSStephen M. Cameron break; 15829846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15839846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15849846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15859846590eSStephen M. Cameron h->scsi_host->host_no, 15869846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15879846590eSStephen M. Cameron break; 15885ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15895ca01204SScott Benesh dev_info(&h->pdev->dev, 15905ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15915ca01204SScott Benesh h->scsi_host->host_no, 15925ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15935ca01204SScott Benesh break; 15949846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15959846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15965ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15979846590eSStephen M. Cameron h->scsi_host->host_no, 15989846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15999846590eSStephen M. Cameron break; 16009846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16019846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16029846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16039846590eSStephen M. Cameron h->scsi_host->host_no, 16049846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16059846590eSStephen M. Cameron break; 16069846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16079846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16089846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16099846590eSStephen M. Cameron h->scsi_host->host_no, 16109846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16119846590eSStephen M. Cameron break; 16129846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16139846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16149846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16159846590eSStephen M. Cameron h->scsi_host->host_no, 16169846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16179846590eSStephen M. Cameron break; 16189846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16199846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16209846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16219846590eSStephen M. Cameron h->scsi_host->host_no, 16229846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16239846590eSStephen M. Cameron break; 16249846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16259846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16269846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16279846590eSStephen M. Cameron h->scsi_host->host_no, 16289846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16299846590eSStephen M. Cameron break; 16309846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16319846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16329846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16339846590eSStephen M. Cameron h->scsi_host->host_no, 16349846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16359846590eSStephen M. Cameron break; 16369846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16379846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16389846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16399846590eSStephen M. Cameron h->scsi_host->host_no, 16409846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16419846590eSStephen M. Cameron break; 16429846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16439846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16449846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16459846590eSStephen M. Cameron h->scsi_host->host_no, 16469846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16479846590eSStephen M. Cameron break; 16489846590eSStephen M. Cameron } 16499846590eSStephen M. Cameron } 16509846590eSStephen M. Cameron 165103383736SDon Brace /* 165203383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 165303383736SDon Brace * raid offload configured. 165403383736SDon Brace */ 165503383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 165603383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 165703383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 165803383736SDon Brace { 165903383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 166003383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 166103383736SDon Brace int i, j; 166203383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 166303383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 166403383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 166503383736SDon Brace le16_to_cpu(map->layout_map_count) * 166603383736SDon Brace total_disks_per_row; 166703383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 166803383736SDon Brace total_disks_per_row; 166903383736SDon Brace int qdepth; 167003383736SDon Brace 167103383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 167203383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 167303383736SDon Brace 1674d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1675d604f533SWebb Scales 167603383736SDon Brace qdepth = 0; 167703383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 167803383736SDon Brace logical_drive->phys_disk[i] = NULL; 167903383736SDon Brace if (!logical_drive->offload_config) 168003383736SDon Brace continue; 168103383736SDon Brace for (j = 0; j < ndevices; j++) { 16821d33d85dSDon Brace if (dev[j] == NULL) 16831d33d85dSDon Brace continue; 1684ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1685ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1686af15ed36SDon Brace continue; 1687f3f01730SKevin Barnett if (is_logical_device(dev[j])) 168803383736SDon Brace continue; 168903383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 169003383736SDon Brace continue; 169103383736SDon Brace 169203383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 169303383736SDon Brace if (i < nphys_disk) 169403383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 169503383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 169603383736SDon Brace break; 169703383736SDon Brace } 169803383736SDon Brace 169903383736SDon Brace /* 170003383736SDon Brace * This can happen if a physical drive is removed and 170103383736SDon Brace * the logical drive is degraded. In that case, the RAID 170203383736SDon Brace * map data will refer to a physical disk which isn't actually 170303383736SDon Brace * present. And in that case offload_enabled should already 170403383736SDon Brace * be 0, but we'll turn it off here just in case 170503383736SDon Brace */ 170603383736SDon Brace if (!logical_drive->phys_disk[i]) { 170703383736SDon Brace logical_drive->offload_enabled = 0; 170841ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 170941ce4c35SStephen Cameron logical_drive->queue_depth = 8; 171003383736SDon Brace } 171103383736SDon Brace } 171203383736SDon Brace if (nraid_map_entries) 171303383736SDon Brace /* 171403383736SDon Brace * This is correct for reads, too high for full stripe writes, 171503383736SDon Brace * way too high for partial stripe writes 171603383736SDon Brace */ 171703383736SDon Brace logical_drive->queue_depth = qdepth; 171803383736SDon Brace else 171903383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 172003383736SDon Brace } 172103383736SDon Brace 172203383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 172303383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 172403383736SDon Brace { 172503383736SDon Brace int i; 172603383736SDon Brace 172703383736SDon Brace for (i = 0; i < ndevices; i++) { 17281d33d85dSDon Brace if (dev[i] == NULL) 17291d33d85dSDon Brace continue; 1730ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1731ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1732af15ed36SDon Brace continue; 1733f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 173403383736SDon Brace continue; 173541ce4c35SStephen Cameron 173641ce4c35SStephen Cameron /* 173741ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 173841ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 173941ce4c35SStephen Cameron * and since it isn't changing, we do not need to 174041ce4c35SStephen Cameron * update it. 174141ce4c35SStephen Cameron */ 174241ce4c35SStephen Cameron if (dev[i]->offload_enabled) 174341ce4c35SStephen Cameron continue; 174441ce4c35SStephen Cameron 174503383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 174603383736SDon Brace } 174703383736SDon Brace } 174803383736SDon Brace 1749096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1750096ccff4SKevin Barnett { 1751096ccff4SKevin Barnett int rc = 0; 1752096ccff4SKevin Barnett 1753096ccff4SKevin Barnett if (!h->scsi_host) 1754096ccff4SKevin Barnett return 1; 1755096ccff4SKevin Barnett 1756d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1757096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1758096ccff4SKevin Barnett device->target, device->lun); 1759d04e62b9SKevin Barnett else /* HBA */ 1760d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1761d04e62b9SKevin Barnett 1762096ccff4SKevin Barnett return rc; 1763096ccff4SKevin Barnett } 1764096ccff4SKevin Barnett 1765ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1766ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1767ba74fdc4SDon Brace { 1768ba74fdc4SDon Brace int i; 1769ba74fdc4SDon Brace int count = 0; 1770ba74fdc4SDon Brace 1771ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1772ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1773ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1774ba74fdc4SDon Brace 1775ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1776ba74fdc4SDon Brace dev->scsi3addr)) { 1777ba74fdc4SDon Brace unsigned long flags; 1778ba74fdc4SDon Brace 1779ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1780ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1781ba74fdc4SDon Brace ++count; 1782ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1783ba74fdc4SDon Brace } 1784ba74fdc4SDon Brace 1785ba74fdc4SDon Brace cmd_free(h, c); 1786ba74fdc4SDon Brace } 1787ba74fdc4SDon Brace 1788ba74fdc4SDon Brace return count; 1789ba74fdc4SDon Brace } 1790ba74fdc4SDon Brace 1791ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1792ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1793ba74fdc4SDon Brace { 1794ba74fdc4SDon Brace int cmds = 0; 1795ba74fdc4SDon Brace int waits = 0; 1796ba74fdc4SDon Brace 1797ba74fdc4SDon Brace while (1) { 1798ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1799ba74fdc4SDon Brace if (cmds == 0) 1800ba74fdc4SDon Brace break; 1801ba74fdc4SDon Brace if (++waits > 20) 1802ba74fdc4SDon Brace break; 1803ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1804ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1805ba74fdc4SDon Brace __func__, cmds); 1806ba74fdc4SDon Brace msleep(1000); 1807ba74fdc4SDon Brace } 1808ba74fdc4SDon Brace } 1809ba74fdc4SDon Brace 1810096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1811096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1812096ccff4SKevin Barnett { 1813096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1814096ccff4SKevin Barnett 1815096ccff4SKevin Barnett if (!h->scsi_host) 1816096ccff4SKevin Barnett return; 1817096ccff4SKevin Barnett 1818d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1819096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1820096ccff4SKevin Barnett device->target, device->lun); 1821096ccff4SKevin Barnett if (sdev) { 1822096ccff4SKevin Barnett scsi_remove_device(sdev); 1823096ccff4SKevin Barnett scsi_device_put(sdev); 1824096ccff4SKevin Barnett } else { 1825096ccff4SKevin Barnett /* 1826096ccff4SKevin Barnett * We don't expect to get here. Future commands 1827096ccff4SKevin Barnett * to this device will get a selection timeout as 1828096ccff4SKevin Barnett * if the device were gone. 1829096ccff4SKevin Barnett */ 1830096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1831096ccff4SKevin Barnett "didn't find device for removal."); 1832096ccff4SKevin Barnett } 1833ba74fdc4SDon Brace } else { /* HBA */ 1834ba74fdc4SDon Brace 1835ba74fdc4SDon Brace device->removed = 1; 1836ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1837ba74fdc4SDon Brace 1838d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1839096ccff4SKevin Barnett } 1840ba74fdc4SDon Brace } 1841096ccff4SKevin Barnett 18428aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1843edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1844edd16368SStephen M. Cameron { 1845edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1846edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1847edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1848edd16368SStephen M. Cameron */ 1849edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1850edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1851edd16368SStephen M. Cameron unsigned long flags; 1852edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1853edd16368SStephen M. Cameron int nadded, nremoved; 1854edd16368SStephen M. Cameron 1855da03ded0SDon Brace /* 1856da03ded0SDon Brace * A reset can cause a device status to change 1857da03ded0SDon Brace * re-schedule the scan to see what happened. 1858da03ded0SDon Brace */ 1859da03ded0SDon Brace if (h->reset_in_progress) { 1860da03ded0SDon Brace h->drv_req_rescan = 1; 1861da03ded0SDon Brace return; 1862da03ded0SDon Brace } 1863edd16368SStephen M. Cameron 1864cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1865cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1866edd16368SStephen M. Cameron 1867edd16368SStephen M. Cameron if (!added || !removed) { 1868edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1869edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1870edd16368SStephen M. Cameron goto free_and_out; 1871edd16368SStephen M. Cameron } 1872edd16368SStephen M. Cameron 1873edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1874edd16368SStephen M. Cameron 1875edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1876edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1877edd16368SStephen M. Cameron * devices which have changed, remove the old device 1878edd16368SStephen M. Cameron * info and add the new device info. 1879bd9244f7SScott Teel * If minor device attributes change, just update 1880bd9244f7SScott Teel * the existing device structure. 1881edd16368SStephen M. Cameron */ 1882edd16368SStephen M. Cameron i = 0; 1883edd16368SStephen M. Cameron nremoved = 0; 1884edd16368SStephen M. Cameron nadded = 0; 1885edd16368SStephen M. Cameron while (i < h->ndevices) { 1886edd16368SStephen M. Cameron csd = h->dev[i]; 1887edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1888edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1889edd16368SStephen M. Cameron changes++; 18908aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1891edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1892edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1893edd16368SStephen M. Cameron changes++; 18948aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18952a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1896c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1897c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1898c7f172dcSStephen M. Cameron */ 1899c7f172dcSStephen M. Cameron sd[entry] = NULL; 1900bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19018aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1902edd16368SStephen M. Cameron } 1903edd16368SStephen M. Cameron i++; 1904edd16368SStephen M. Cameron } 1905edd16368SStephen M. Cameron 1906edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1907edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1908edd16368SStephen M. Cameron */ 1909edd16368SStephen M. Cameron 1910edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1911edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1912edd16368SStephen M. Cameron continue; 19139846590eSStephen M. Cameron 19149846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19159846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19169846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19179846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19189846590eSStephen M. Cameron */ 19199846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19209846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19210d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19229846590eSStephen M. Cameron continue; 19239846590eSStephen M. Cameron } 19249846590eSStephen M. Cameron 1925edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1926edd16368SStephen M. Cameron h->ndevices, &entry); 1927edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1928edd16368SStephen M. Cameron changes++; 19298aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1930edd16368SStephen M. Cameron break; 1931edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1932edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1933edd16368SStephen M. Cameron /* should never happen... */ 1934edd16368SStephen M. Cameron changes++; 1935edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1936edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1937edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1938edd16368SStephen M. Cameron } 1939edd16368SStephen M. Cameron } 194041ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 194141ce4c35SStephen Cameron 194241ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 194341ce4c35SStephen Cameron * any logical drives that need it enabled. 194441ce4c35SStephen Cameron */ 19451d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19461d33d85dSDon Brace if (h->dev[i] == NULL) 19471d33d85dSDon Brace continue; 194841ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19491d33d85dSDon Brace } 195041ce4c35SStephen Cameron 1951edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1952edd16368SStephen M. Cameron 19539846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19549846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19559846590eSStephen M. Cameron * so don't touch h->dev[] 19569846590eSStephen M. Cameron */ 19579846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19589846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19599846590eSStephen M. Cameron continue; 19609846590eSStephen M. Cameron if (sd[i]->volume_offline) 19619846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19629846590eSStephen M. Cameron } 19639846590eSStephen M. Cameron 1964edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1965edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1966edd16368SStephen M. Cameron * first time through. 1967edd16368SStephen M. Cameron */ 19688aa60681SDon Brace if (!changes) 1969edd16368SStephen M. Cameron goto free_and_out; 1970edd16368SStephen M. Cameron 1971edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1972edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19731d33d85dSDon Brace if (removed[i] == NULL) 19741d33d85dSDon Brace continue; 1975096ccff4SKevin Barnett if (removed[i]->expose_device) 1976096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1977edd16368SStephen M. Cameron kfree(removed[i]); 1978edd16368SStephen M. Cameron removed[i] = NULL; 1979edd16368SStephen M. Cameron } 1980edd16368SStephen M. Cameron 1981edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1982edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1983096ccff4SKevin Barnett int rc = 0; 1984096ccff4SKevin Barnett 19851d33d85dSDon Brace if (added[i] == NULL) 198641ce4c35SStephen Cameron continue; 19872a168208SKevin Barnett if (!(added[i]->expose_device)) 1988edd16368SStephen M. Cameron continue; 1989096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1990096ccff4SKevin Barnett if (!rc) 1991edd16368SStephen M. Cameron continue; 1992096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1993096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1994edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1995edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1996edd16368SStephen M. Cameron */ 1997edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1998853633e8SDon Brace h->drv_req_rescan = 1; 1999edd16368SStephen M. Cameron } 2000edd16368SStephen M. Cameron 2001edd16368SStephen M. Cameron free_and_out: 2002edd16368SStephen M. Cameron kfree(added); 2003edd16368SStephen M. Cameron kfree(removed); 2004edd16368SStephen M. Cameron } 2005edd16368SStephen M. Cameron 2006edd16368SStephen M. Cameron /* 20079e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2008edd16368SStephen M. Cameron * Assume's h->devlock is held. 2009edd16368SStephen M. Cameron */ 2010edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2011edd16368SStephen M. Cameron int bus, int target, int lun) 2012edd16368SStephen M. Cameron { 2013edd16368SStephen M. Cameron int i; 2014edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2015edd16368SStephen M. Cameron 2016edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2017edd16368SStephen M. Cameron sd = h->dev[i]; 2018edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2019edd16368SStephen M. Cameron return sd; 2020edd16368SStephen M. Cameron } 2021edd16368SStephen M. Cameron return NULL; 2022edd16368SStephen M. Cameron } 2023edd16368SStephen M. Cameron 2024edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2025edd16368SStephen M. Cameron { 2026edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2027edd16368SStephen M. Cameron unsigned long flags; 2028edd16368SStephen M. Cameron struct ctlr_info *h; 2029edd16368SStephen M. Cameron 2030edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2031edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2032d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2033d04e62b9SKevin Barnett struct scsi_target *starget; 2034d04e62b9SKevin Barnett struct sas_rphy *rphy; 2035d04e62b9SKevin Barnett 2036d04e62b9SKevin Barnett starget = scsi_target(sdev); 2037d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2038d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2039d04e62b9SKevin Barnett if (sd) { 2040d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2041d04e62b9SKevin Barnett sd->lun = sdev->lun; 2042d04e62b9SKevin Barnett } 2043d04e62b9SKevin Barnett } else 2044edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2045edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2046d04e62b9SKevin Barnett 2047d04e62b9SKevin Barnett if (sd && sd->expose_device) { 204803383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2049d04e62b9SKevin Barnett sdev->hostdata = sd; 205041ce4c35SStephen Cameron } else 205141ce4c35SStephen Cameron sdev->hostdata = NULL; 2052edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2053edd16368SStephen M. Cameron return 0; 2054edd16368SStephen M. Cameron } 2055edd16368SStephen M. Cameron 205641ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 205741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 205841ce4c35SStephen Cameron { 205941ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 206041ce4c35SStephen Cameron int queue_depth; 206141ce4c35SStephen Cameron 206241ce4c35SStephen Cameron sd = sdev->hostdata; 20632a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 206441ce4c35SStephen Cameron 206541ce4c35SStephen Cameron if (sd) 206641ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 206741ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 206841ce4c35SStephen Cameron else 206941ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 207041ce4c35SStephen Cameron 207141ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 207241ce4c35SStephen Cameron 207341ce4c35SStephen Cameron return 0; 207441ce4c35SStephen Cameron } 207541ce4c35SStephen Cameron 2076edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2077edd16368SStephen M. Cameron { 2078bcc44255SStephen M. Cameron /* nothing to do. */ 2079edd16368SStephen M. Cameron } 2080edd16368SStephen M. Cameron 2081d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082d9a729f3SWebb Scales { 2083d9a729f3SWebb Scales int i; 2084d9a729f3SWebb Scales 2085d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2086d9a729f3SWebb Scales return; 2087d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2088d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2089d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2090d9a729f3SWebb Scales } 2091d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2092d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2093d9a729f3SWebb Scales } 2094d9a729f3SWebb Scales 2095d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2096d9a729f3SWebb Scales { 2097d9a729f3SWebb Scales int i; 2098d9a729f3SWebb Scales 2099d9a729f3SWebb Scales if (h->chainsize <= 0) 2100d9a729f3SWebb Scales return 0; 2101d9a729f3SWebb Scales 2102d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2103d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2104d9a729f3SWebb Scales GFP_KERNEL); 2105d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2106d9a729f3SWebb Scales return -ENOMEM; 2107d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2108d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2109d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2110d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2111d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2112d9a729f3SWebb Scales goto clean; 2113d9a729f3SWebb Scales } 2114d9a729f3SWebb Scales return 0; 2115d9a729f3SWebb Scales 2116d9a729f3SWebb Scales clean: 2117d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2118d9a729f3SWebb Scales return -ENOMEM; 2119d9a729f3SWebb Scales } 2120d9a729f3SWebb Scales 212133a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 212233a2ffceSStephen M. Cameron { 212333a2ffceSStephen M. Cameron int i; 212433a2ffceSStephen M. Cameron 212533a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 212633a2ffceSStephen M. Cameron return; 212733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 212833a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 212933a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 213033a2ffceSStephen M. Cameron } 213133a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 213233a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 213333a2ffceSStephen M. Cameron } 213433a2ffceSStephen M. Cameron 2135105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 213633a2ffceSStephen M. Cameron { 213733a2ffceSStephen M. Cameron int i; 213833a2ffceSStephen M. Cameron 213933a2ffceSStephen M. Cameron if (h->chainsize <= 0) 214033a2ffceSStephen M. Cameron return 0; 214133a2ffceSStephen M. Cameron 214233a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 214333a2ffceSStephen M. Cameron GFP_KERNEL); 21443d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 21453d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 214633a2ffceSStephen M. Cameron return -ENOMEM; 21473d4e6af8SRobert Elliott } 214833a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 214933a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 215033a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21513d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 21523d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 215333a2ffceSStephen M. Cameron goto clean; 215433a2ffceSStephen M. Cameron } 21553d4e6af8SRobert Elliott } 215633a2ffceSStephen M. Cameron return 0; 215733a2ffceSStephen M. Cameron 215833a2ffceSStephen M. Cameron clean: 215933a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 216033a2ffceSStephen M. Cameron return -ENOMEM; 216133a2ffceSStephen M. Cameron } 216233a2ffceSStephen M. Cameron 2163d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2164d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2165d9a729f3SWebb Scales { 2166d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2167d9a729f3SWebb Scales u64 temp64; 2168d9a729f3SWebb Scales u32 chain_size; 2169d9a729f3SWebb Scales 2170d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2171a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2172d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2173d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2174d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2175d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2176d9a729f3SWebb Scales cp->sg->address = 0; 2177d9a729f3SWebb Scales return -1; 2178d9a729f3SWebb Scales } 2179d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2180d9a729f3SWebb Scales return 0; 2181d9a729f3SWebb Scales } 2182d9a729f3SWebb Scales 2183d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2184d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2185d9a729f3SWebb Scales { 2186d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2187d9a729f3SWebb Scales u64 temp64; 2188d9a729f3SWebb Scales u32 chain_size; 2189d9a729f3SWebb Scales 2190d9a729f3SWebb Scales chain_sg = cp->sg; 2191d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2192a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2193d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2194d9a729f3SWebb Scales } 2195d9a729f3SWebb Scales 2196e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 219733a2ffceSStephen M. Cameron struct CommandList *c) 219833a2ffceSStephen M. Cameron { 219933a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 220033a2ffceSStephen M. Cameron u64 temp64; 220150a0decfSStephen M. Cameron u32 chain_len; 220233a2ffceSStephen M. Cameron 220333a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 220433a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 220550a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 220650a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22072b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 220850a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 220950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 221033a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2211e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2212e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 221350a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2214e2bea6dfSStephen M. Cameron return -1; 2215e2bea6dfSStephen M. Cameron } 221650a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2217e2bea6dfSStephen M. Cameron return 0; 221833a2ffceSStephen M. Cameron } 221933a2ffceSStephen M. Cameron 222033a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 222133a2ffceSStephen M. Cameron struct CommandList *c) 222233a2ffceSStephen M. Cameron { 222333a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 222433a2ffceSStephen M. Cameron 222550a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 222633a2ffceSStephen M. Cameron return; 222733a2ffceSStephen M. Cameron 222833a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 222950a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 223050a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 223133a2ffceSStephen M. Cameron } 223233a2ffceSStephen M. Cameron 2233a09c1441SScott Teel 2234a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2235a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2236a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2237a09c1441SScott Teel */ 2238a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2239c349775eSScott Teel struct CommandList *c, 2240c349775eSScott Teel struct scsi_cmnd *cmd, 2241ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2242ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2243c349775eSScott Teel { 2244c349775eSScott Teel int data_len; 2245a09c1441SScott Teel int retry = 0; 2246c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2247c349775eSScott Teel 2248c349775eSScott Teel switch (c2->error_data.serv_response) { 2249c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2250c349775eSScott Teel switch (c2->error_data.status) { 2251c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2252c349775eSScott Teel break; 2253c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2254ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2255c349775eSScott Teel if (c2->error_data.data_present != 2256ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2257ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2258ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2259c349775eSScott Teel break; 2260ee6b1889SStephen M. Cameron } 2261c349775eSScott Teel /* copy the sense data */ 2262c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2263c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2264c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2265c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2266c349775eSScott Teel data_len = 2267c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2268c349775eSScott Teel memcpy(cmd->sense_buffer, 2269c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2270a09c1441SScott Teel retry = 1; 2271c349775eSScott Teel break; 2272c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2273a09c1441SScott Teel retry = 1; 2274c349775eSScott Teel break; 2275c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2276a09c1441SScott Teel retry = 1; 2277c349775eSScott Teel break; 2278c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22794a8da22bSStephen Cameron retry = 1; 2280c349775eSScott Teel break; 2281c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2282a09c1441SScott Teel retry = 1; 2283c349775eSScott Teel break; 2284c349775eSScott Teel default: 2285a09c1441SScott Teel retry = 1; 2286c349775eSScott Teel break; 2287c349775eSScott Teel } 2288c349775eSScott Teel break; 2289c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2290c40820d5SJoe Handzik switch (c2->error_data.status) { 2291c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2292c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2293c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2294c40820d5SJoe Handzik retry = 1; 2295c40820d5SJoe Handzik break; 2296c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2297c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2298c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2299c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2300c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2301c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2302c40820d5SJoe Handzik break; 2303c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2304c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2305c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2306ba74fdc4SDon Brace /* 2307ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2308ba74fdc4SDon Brace * get a state change event from the controller but 2309ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2310ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2311ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2312ba74fdc4SDon Brace * of the disk to get the same device node. 2313ba74fdc4SDon Brace */ 2314ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2315ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2316ba74fdc4SDon Brace dev->removed = 1; 2317ba74fdc4SDon Brace h->drv_req_rescan = 1; 2318ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2319ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2320ba74fdc4SDon Brace } else 2321ba74fdc4SDon Brace /* 2322ba74fdc4SDon Brace * Retry by sending down the RAID path. 2323ba74fdc4SDon Brace * We will get an event from ctlr to 2324ba74fdc4SDon Brace * trigger rescan regardless. 2325ba74fdc4SDon Brace */ 2326c40820d5SJoe Handzik retry = 1; 2327c40820d5SJoe Handzik break; 2328c40820d5SJoe Handzik default: 2329c40820d5SJoe Handzik retry = 1; 2330c40820d5SJoe Handzik } 2331c349775eSScott Teel break; 2332c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2333c349775eSScott Teel break; 2334c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2335c349775eSScott Teel break; 2336c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2337a09c1441SScott Teel retry = 1; 2338c349775eSScott Teel break; 2339c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2340c349775eSScott Teel break; 2341c349775eSScott Teel default: 2342a09c1441SScott Teel retry = 1; 2343c349775eSScott Teel break; 2344c349775eSScott Teel } 2345a09c1441SScott Teel 2346a09c1441SScott Teel return retry; /* retry on raid path? */ 2347c349775eSScott Teel } 2348c349775eSScott Teel 2349a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2350a58e7e53SWebb Scales struct CommandList *c) 2351a58e7e53SWebb Scales { 2352d604f533SWebb Scales bool do_wake = false; 2353d604f533SWebb Scales 2354a58e7e53SWebb Scales /* 2355a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2356a58e7e53SWebb Scales * 2357a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2358a58e7e53SWebb Scales * 2. The SCSI command completes 2359a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2360a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2361a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2362a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2363a58e7e53SWebb Scales * Now we have aborted the wrong command. 2364a58e7e53SWebb Scales * 2365d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2366d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2367a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2368a58e7e53SWebb Scales */ 2369a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2370d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2371a58e7e53SWebb Scales if (c->abort_pending) { 2372d604f533SWebb Scales do_wake = true; 2373a58e7e53SWebb Scales c->abort_pending = false; 2374a58e7e53SWebb Scales } 2375d604f533SWebb Scales if (c->reset_pending) { 2376d604f533SWebb Scales unsigned long flags; 2377d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2378d604f533SWebb Scales 2379d604f533SWebb Scales /* 2380d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2381d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2382d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2383d604f533SWebb Scales */ 2384d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2385d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2386d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2387d604f533SWebb Scales do_wake = true; 2388d604f533SWebb Scales c->reset_pending = NULL; 2389d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2390d604f533SWebb Scales } 2391d604f533SWebb Scales 2392d604f533SWebb Scales if (do_wake) 2393d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2394a58e7e53SWebb Scales } 2395a58e7e53SWebb Scales 239673153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 239773153fe5SWebb Scales struct CommandList *c) 239873153fe5SWebb Scales { 239973153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 240073153fe5SWebb Scales cmd_tagged_free(h, c); 240173153fe5SWebb Scales } 240273153fe5SWebb Scales 24038a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24048a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24058a0ff92cSWebb Scales { 240673153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2407d49c2077SDon Brace if (cmd && cmd->scsi_done) 24088a0ff92cSWebb Scales cmd->scsi_done(cmd); 24098a0ff92cSWebb Scales } 24108a0ff92cSWebb Scales 24118a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24128a0ff92cSWebb Scales { 24138a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24148a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24158a0ff92cSWebb Scales } 24168a0ff92cSWebb Scales 2417a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2418a58e7e53SWebb Scales { 2419a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2420a58e7e53SWebb Scales } 2421a58e7e53SWebb Scales 2422a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2423a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2424a58e7e53SWebb Scales { 2425a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2426a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2427a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 242873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2429a58e7e53SWebb Scales } 2430a58e7e53SWebb Scales 2431c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2432c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2433c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2434c349775eSScott Teel { 2435c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2436c349775eSScott Teel 2437c349775eSScott Teel /* check for good status */ 2438c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24398a0ff92cSWebb Scales c2->error_data.status == 0)) 24408a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2441c349775eSScott Teel 24428a0ff92cSWebb Scales /* 24438a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2444c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2445c349775eSScott Teel * wrong. 2446c349775eSScott Teel */ 2447f3f01730SKevin Barnett if (is_logical_device(dev) && 2448c349775eSScott Teel c2->error_data.serv_response == 2449c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2450080ef1ccSDon Brace if (c2->error_data.status == 2451064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2452c349775eSScott Teel dev->offload_enabled = 0; 2453064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2454064d1b1dSDon Brace } 24558a0ff92cSWebb Scales 24568a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2457080ef1ccSDon Brace } 2458080ef1ccSDon Brace 2459ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24608a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2461080ef1ccSDon Brace 24628a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2463c349775eSScott Teel } 2464c349775eSScott Teel 24659437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24669437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24679437ac43SStephen Cameron struct CommandList *cp) 24689437ac43SStephen Cameron { 24699437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24709437ac43SStephen Cameron 24719437ac43SStephen Cameron switch (tmf_status) { 24729437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24739437ac43SStephen Cameron /* 24749437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24759437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24769437ac43SStephen Cameron */ 24779437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24789437ac43SStephen Cameron return 0; 24799437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24809437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24819437ac43SStephen Cameron case CISS_TMF_FAILED: 24829437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24839437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24849437ac43SStephen Cameron break; 24859437ac43SStephen Cameron default: 24869437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24879437ac43SStephen Cameron tmf_status); 24889437ac43SStephen Cameron break; 24899437ac43SStephen Cameron } 24909437ac43SStephen Cameron return -tmf_status; 24919437ac43SStephen Cameron } 24929437ac43SStephen Cameron 24931fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2494edd16368SStephen M. Cameron { 2495edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2496edd16368SStephen M. Cameron struct ctlr_info *h; 2497edd16368SStephen M. Cameron struct ErrorInfo *ei; 2498283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2499d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2500edd16368SStephen M. Cameron 25019437ac43SStephen Cameron u8 sense_key; 25029437ac43SStephen Cameron u8 asc; /* additional sense code */ 25039437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2504db111e18SStephen M. Cameron unsigned long sense_data_size; 2505edd16368SStephen M. Cameron 2506edd16368SStephen M. Cameron ei = cp->err_info; 25077fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2508edd16368SStephen M. Cameron h = cp->h; 2509d49c2077SDon Brace 2510d49c2077SDon Brace if (!cmd->device) { 2511d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2512d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2513d49c2077SDon Brace } 2514d49c2077SDon Brace 2515283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 251645e596cdSDon Brace if (!dev) { 251745e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 251845e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 251945e596cdSDon Brace } 2520d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2521edd16368SStephen M. Cameron 2522edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2523e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25242b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 252533a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2526edd16368SStephen M. Cameron 2527d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2528d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2529d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2530d9a729f3SWebb Scales 2531edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2532edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2533c349775eSScott Teel 2534d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2535d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2536d49c2077SDon Brace dev->removed) { 2537d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2538d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2539d49c2077SDon Brace } 2540d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 254103383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2542d49c2077SDon Brace } 254303383736SDon Brace 254425163bd5SWebb Scales /* 254525163bd5SWebb Scales * We check for lockup status here as it may be set for 254625163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 254725163bd5SWebb Scales * fail_all_oustanding_cmds() 254825163bd5SWebb Scales */ 254925163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 255025163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 255125163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25528a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 255325163bd5SWebb Scales } 255425163bd5SWebb Scales 2555d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2556d604f533SWebb Scales if (cp->reset_pending) 2557bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2558d604f533SWebb Scales if (cp->abort_pending) 2559d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2560d604f533SWebb Scales } 2561d604f533SWebb Scales 2562c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2563c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2564c349775eSScott Teel 25656aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25668a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25678a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25686aa4c361SRobert Elliott 2569e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2570e1f7de0cSMatt Gates * CISS header used below for error handling. 2571e1f7de0cSMatt Gates */ 2572e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2573e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25742b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25752b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25762b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25772b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 257850a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2579e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2580e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2581283b4a9bSStephen M. Cameron 2582283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2583283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2584283b4a9bSStephen M. Cameron * wrong. 2585283b4a9bSStephen M. Cameron */ 2586f3f01730SKevin Barnett if (is_logical_device(dev)) { 2587283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2588283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25898a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2590283b4a9bSStephen M. Cameron } 2591e1f7de0cSMatt Gates } 2592e1f7de0cSMatt Gates 2593edd16368SStephen M. Cameron /* an error has occurred */ 2594edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2595edd16368SStephen M. Cameron 2596edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25979437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25989437ac43SStephen Cameron /* copy the sense data */ 25999437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 26009437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 26019437ac43SStephen Cameron else 26029437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26039437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26049437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26059437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26069437ac43SStephen Cameron if (ei->ScsiStatus) 26079437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26089437ac43SStephen Cameron &sense_key, &asc, &ascq); 2609edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 26101d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 26112e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26121d3b3609SMatt Gates break; 26131d3b3609SMatt Gates } 2614edd16368SStephen M. Cameron break; 2615edd16368SStephen M. Cameron } 2616edd16368SStephen M. Cameron /* Problem was not a check condition 2617edd16368SStephen M. Cameron * Pass it up to the upper layers... 2618edd16368SStephen M. Cameron */ 2619edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2620edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2621edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2622edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2623edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2624edd16368SStephen M. Cameron sense_key, asc, ascq, 2625edd16368SStephen M. Cameron cmd->result); 2626edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2627edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2628edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2629edd16368SStephen M. Cameron 2630edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2631edd16368SStephen M. Cameron * but there is a bug in some released firmware 2632edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2633edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2634edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2635edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2636edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2637edd16368SStephen M. Cameron * look like selection timeout since that is 2638edd16368SStephen M. Cameron * the most common reason for this to occur, 2639edd16368SStephen M. Cameron * and it's severe enough. 2640edd16368SStephen M. Cameron */ 2641edd16368SStephen M. Cameron 2642edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2643edd16368SStephen M. Cameron } 2644edd16368SStephen M. Cameron break; 2645edd16368SStephen M. Cameron 2646edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2647edd16368SStephen M. Cameron break; 2648edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2649f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2650f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2651edd16368SStephen M. Cameron break; 2652edd16368SStephen M. Cameron case CMD_INVALID: { 2653edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2654edd16368SStephen M. Cameron print_cmd(cp); */ 2655edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2656edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2657edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2658edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2659edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2660edd16368SStephen M. Cameron * missing target. */ 2661edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2662edd16368SStephen M. Cameron } 2663edd16368SStephen M. Cameron break; 2664edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2665256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2666f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2667f42e81e1SStephen Cameron cp->Request.CDB); 2668edd16368SStephen M. Cameron break; 2669edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2670edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2671f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2672f42e81e1SStephen Cameron cp->Request.CDB); 2673edd16368SStephen M. Cameron break; 2674edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2675edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2676f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2677f42e81e1SStephen Cameron cp->Request.CDB); 2678edd16368SStephen M. Cameron break; 2679edd16368SStephen M. Cameron case CMD_ABORTED: 2680a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2681a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2682edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2683edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2684f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2685f42e81e1SStephen Cameron cp->Request.CDB); 2686edd16368SStephen M. Cameron break; 2687edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2688f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2689f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2690f42e81e1SStephen Cameron cp->Request.CDB); 2691edd16368SStephen M. Cameron break; 2692edd16368SStephen M. Cameron case CMD_TIMEOUT: 2693edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2694f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2695f42e81e1SStephen Cameron cp->Request.CDB); 2696edd16368SStephen M. Cameron break; 26971d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26981d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26991d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 27001d5e2ed0SStephen M. Cameron break; 27019437ac43SStephen Cameron case CMD_TMF_STATUS: 27029437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27039437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27049437ac43SStephen Cameron break; 2705283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2706283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2707283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2708283b4a9bSStephen M. Cameron */ 2709283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2710283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2711283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2712283b4a9bSStephen M. Cameron break; 2713edd16368SStephen M. Cameron default: 2714edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2715edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2716edd16368SStephen M. Cameron cp, ei->CommandStatus); 2717edd16368SStephen M. Cameron } 27188a0ff92cSWebb Scales 27198a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2720edd16368SStephen M. Cameron } 2721edd16368SStephen M. Cameron 2722edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2723edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2724edd16368SStephen M. Cameron { 2725edd16368SStephen M. Cameron int i; 2726edd16368SStephen M. Cameron 272750a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 272850a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 272950a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2730edd16368SStephen M. Cameron data_direction); 2731edd16368SStephen M. Cameron } 2732edd16368SStephen M. Cameron 2733a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2734edd16368SStephen M. Cameron struct CommandList *cp, 2735edd16368SStephen M. Cameron unsigned char *buf, 2736edd16368SStephen M. Cameron size_t buflen, 2737edd16368SStephen M. Cameron int data_direction) 2738edd16368SStephen M. Cameron { 273901a02ffcSStephen M. Cameron u64 addr64; 2740edd16368SStephen M. Cameron 2741edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2742edd16368SStephen M. Cameron cp->Header.SGList = 0; 274350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2744a2dac136SStephen M. Cameron return 0; 2745edd16368SStephen M. Cameron } 2746edd16368SStephen M. Cameron 274750a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2748eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2749a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2750eceaae18SShuah Khan cp->Header.SGList = 0; 275150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2752a2dac136SStephen M. Cameron return -1; 2753eceaae18SShuah Khan } 275450a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 275550a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 275650a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 275750a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 275850a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2759a2dac136SStephen M. Cameron return 0; 2760edd16368SStephen M. Cameron } 2761edd16368SStephen M. Cameron 276225163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 276325163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 276425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 276525163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2766edd16368SStephen M. Cameron { 2767edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2768edd16368SStephen M. Cameron 2769edd16368SStephen M. Cameron c->waiting = &wait; 277025163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 277125163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 277225163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 277325163bd5SWebb Scales wait_for_completion_io(&wait); 277425163bd5SWebb Scales return IO_OK; 277525163bd5SWebb Scales } 277625163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 277725163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 277825163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 277925163bd5SWebb Scales return -ETIMEDOUT; 278025163bd5SWebb Scales } 278125163bd5SWebb Scales return IO_OK; 278225163bd5SWebb Scales } 278325163bd5SWebb Scales 278425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 278525163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 278625163bd5SWebb Scales { 278725163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 278825163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 278925163bd5SWebb Scales return IO_OK; 279025163bd5SWebb Scales } 279125163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2792edd16368SStephen M. Cameron } 2793edd16368SStephen M. Cameron 2794094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2795094963daSStephen M. Cameron { 2796094963daSStephen M. Cameron int cpu; 2797094963daSStephen M. Cameron u32 rc, *lockup_detected; 2798094963daSStephen M. Cameron 2799094963daSStephen M. Cameron cpu = get_cpu(); 2800094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2801094963daSStephen M. Cameron rc = *lockup_detected; 2802094963daSStephen M. Cameron put_cpu(); 2803094963daSStephen M. Cameron return rc; 2804094963daSStephen M. Cameron } 2805094963daSStephen M. Cameron 28069c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 280725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 280825163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2809edd16368SStephen M. Cameron { 28109c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 281125163bd5SWebb Scales int rc; 2812edd16368SStephen M. Cameron 2813edd16368SStephen M. Cameron do { 28147630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 281525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 281625163bd5SWebb Scales timeout_msecs); 281725163bd5SWebb Scales if (rc) 281825163bd5SWebb Scales break; 2819edd16368SStephen M. Cameron retry_count++; 28209c2fc160SStephen M. Cameron if (retry_count > 3) { 28219c2fc160SStephen M. Cameron msleep(backoff_time); 28229c2fc160SStephen M. Cameron if (backoff_time < 1000) 28239c2fc160SStephen M. Cameron backoff_time *= 2; 28249c2fc160SStephen M. Cameron } 2825852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28269c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28279c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2828edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 282925163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 283025163bd5SWebb Scales rc = -EIO; 283125163bd5SWebb Scales return rc; 2832edd16368SStephen M. Cameron } 2833edd16368SStephen M. Cameron 2834d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2835d1e8beacSStephen M. Cameron struct CommandList *c) 2836edd16368SStephen M. Cameron { 2837d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2838d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2839edd16368SStephen M. Cameron 2840609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2841609a70dfSRasmus Villemoes txt, lun, cdb); 2842d1e8beacSStephen M. Cameron } 2843d1e8beacSStephen M. Cameron 2844d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2845d1e8beacSStephen M. Cameron struct CommandList *cp) 2846d1e8beacSStephen M. Cameron { 2847d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2848d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28499437ac43SStephen Cameron u8 sense_key, asc, ascq; 28509437ac43SStephen Cameron int sense_len; 2851d1e8beacSStephen M. Cameron 2852edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2853edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28549437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28559437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28569437ac43SStephen Cameron else 28579437ac43SStephen Cameron sense_len = ei->SenseLen; 28589437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28599437ac43SStephen Cameron &sense_key, &asc, &ascq); 2860d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2861d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28629437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28639437ac43SStephen Cameron sense_key, asc, ascq); 2864d1e8beacSStephen M. Cameron else 28659437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2866edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2867edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2868edd16368SStephen M. Cameron "(probably indicates selection timeout " 2869edd16368SStephen M. Cameron "reported incorrectly due to a known " 2870edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2871edd16368SStephen M. Cameron break; 2872edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2873edd16368SStephen M. Cameron break; 2874edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2875d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2876edd16368SStephen M. Cameron break; 2877edd16368SStephen M. Cameron case CMD_INVALID: { 2878edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2879edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2880edd16368SStephen M. Cameron */ 2881d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2882d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2883edd16368SStephen M. Cameron } 2884edd16368SStephen M. Cameron break; 2885edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2886d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2887edd16368SStephen M. Cameron break; 2888edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2889d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2890edd16368SStephen M. Cameron break; 2891edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2892d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2893edd16368SStephen M. Cameron break; 2894edd16368SStephen M. Cameron case CMD_ABORTED: 2895d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2896edd16368SStephen M. Cameron break; 2897edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2898d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2899edd16368SStephen M. Cameron break; 2900edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2901d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2902edd16368SStephen M. Cameron break; 2903edd16368SStephen M. Cameron case CMD_TIMEOUT: 2904d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2905edd16368SStephen M. Cameron break; 29061d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2907d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29081d5e2ed0SStephen M. Cameron break; 290925163bd5SWebb Scales case CMD_CTLR_LOCKUP: 291025163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 291125163bd5SWebb Scales break; 2912edd16368SStephen M. Cameron default: 2913d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2914d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2915edd16368SStephen M. Cameron ei->CommandStatus); 2916edd16368SStephen M. Cameron } 2917edd16368SStephen M. Cameron } 2918edd16368SStephen M. Cameron 2919edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2920b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2921edd16368SStephen M. Cameron unsigned char bufsize) 2922edd16368SStephen M. Cameron { 2923edd16368SStephen M. Cameron int rc = IO_OK; 2924edd16368SStephen M. Cameron struct CommandList *c; 2925edd16368SStephen M. Cameron struct ErrorInfo *ei; 2926edd16368SStephen M. Cameron 292745fcb86eSStephen Cameron c = cmd_alloc(h); 2928edd16368SStephen M. Cameron 2929a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2930a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2931a2dac136SStephen M. Cameron rc = -1; 2932a2dac136SStephen M. Cameron goto out; 2933a2dac136SStephen M. Cameron } 293425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2935c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 293625163bd5SWebb Scales if (rc) 293725163bd5SWebb Scales goto out; 2938edd16368SStephen M. Cameron ei = c->err_info; 2939edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2940d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2941edd16368SStephen M. Cameron rc = -1; 2942edd16368SStephen M. Cameron } 2943a2dac136SStephen M. Cameron out: 294445fcb86eSStephen Cameron cmd_free(h, c); 2945edd16368SStephen M. Cameron return rc; 2946edd16368SStephen M. Cameron } 2947edd16368SStephen M. Cameron 2948bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 294925163bd5SWebb Scales u8 reset_type, int reply_queue) 2950edd16368SStephen M. Cameron { 2951edd16368SStephen M. Cameron int rc = IO_OK; 2952edd16368SStephen M. Cameron struct CommandList *c; 2953edd16368SStephen M. Cameron struct ErrorInfo *ei; 2954edd16368SStephen M. Cameron 295545fcb86eSStephen Cameron c = cmd_alloc(h); 2956edd16368SStephen M. Cameron 2957edd16368SStephen M. Cameron 2958a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29590b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2960bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2961c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 296225163bd5SWebb Scales if (rc) { 296325163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 296425163bd5SWebb Scales goto out; 296525163bd5SWebb Scales } 2966edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2967edd16368SStephen M. Cameron 2968edd16368SStephen M. Cameron ei = c->err_info; 2969edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2970d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2971edd16368SStephen M. Cameron rc = -1; 2972edd16368SStephen M. Cameron } 297325163bd5SWebb Scales out: 297445fcb86eSStephen Cameron cmd_free(h, c); 2975edd16368SStephen M. Cameron return rc; 2976edd16368SStephen M. Cameron } 2977edd16368SStephen M. Cameron 2978d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2979d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2980d604f533SWebb Scales unsigned char *scsi3addr) 2981d604f533SWebb Scales { 2982d604f533SWebb Scales int i; 2983d604f533SWebb Scales bool match = false; 2984d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2985d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2986d604f533SWebb Scales 2987d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2988d604f533SWebb Scales return false; 2989d604f533SWebb Scales 2990d604f533SWebb Scales switch (c->cmd_type) { 2991d604f533SWebb Scales case CMD_SCSI: 2992d604f533SWebb Scales case CMD_IOCTL_PEND: 2993d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2994d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2995d604f533SWebb Scales break; 2996d604f533SWebb Scales 2997d604f533SWebb Scales case CMD_IOACCEL1: 2998d604f533SWebb Scales case CMD_IOACCEL2: 2999d604f533SWebb Scales if (c->phys_disk == dev) { 3000d604f533SWebb Scales /* HBA mode match */ 3001d604f533SWebb Scales match = true; 3002d604f533SWebb Scales } else { 3003d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3004d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3005d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3006d604f533SWebb Scales * instead. */ 3007d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3008d604f533SWebb Scales /* FIXME: an alternate test might be 3009d604f533SWebb Scales * 3010d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3011d604f533SWebb Scales * == c2->scsi_nexus; */ 3012d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3013d604f533SWebb Scales } 3014d604f533SWebb Scales } 3015d604f533SWebb Scales break; 3016d604f533SWebb Scales 3017d604f533SWebb Scales case IOACCEL2_TMF: 3018d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3019d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3020d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3021d604f533SWebb Scales } 3022d604f533SWebb Scales break; 3023d604f533SWebb Scales 3024d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3025d604f533SWebb Scales match = false; 3026d604f533SWebb Scales break; 3027d604f533SWebb Scales 3028d604f533SWebb Scales default: 3029d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3030d604f533SWebb Scales c->cmd_type); 3031d604f533SWebb Scales BUG(); 3032d604f533SWebb Scales } 3033d604f533SWebb Scales 3034d604f533SWebb Scales return match; 3035d604f533SWebb Scales } 3036d604f533SWebb Scales 3037d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3038d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3039d604f533SWebb Scales { 3040d604f533SWebb Scales int i; 3041d604f533SWebb Scales int rc = 0; 3042d604f533SWebb Scales 3043d604f533SWebb Scales /* We can really only handle one reset at a time */ 3044d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3045d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3046d604f533SWebb Scales return -EINTR; 3047d604f533SWebb Scales } 3048d604f533SWebb Scales 3049d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3050d604f533SWebb Scales 3051d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3052d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3053d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3054d604f533SWebb Scales 3055d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3056d604f533SWebb Scales unsigned long flags; 3057d604f533SWebb Scales 3058d604f533SWebb Scales /* 3059d604f533SWebb Scales * Mark the target command as having a reset pending, 3060d604f533SWebb Scales * then lock a lock so that the command cannot complete 3061d604f533SWebb Scales * while we're considering it. If the command is not 3062d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3063d604f533SWebb Scales */ 3064d604f533SWebb Scales c->reset_pending = dev; 3065d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3066d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3067d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3068d604f533SWebb Scales else 3069d604f533SWebb Scales c->reset_pending = NULL; 3070d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3071d604f533SWebb Scales } 3072d604f533SWebb Scales 3073d604f533SWebb Scales cmd_free(h, c); 3074d604f533SWebb Scales } 3075d604f533SWebb Scales 3076d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3077d604f533SWebb Scales if (!rc) 3078d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3079d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3080d604f533SWebb Scales lockup_detected(h)); 3081d604f533SWebb Scales 3082d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3083d604f533SWebb Scales dev_warn(&h->pdev->dev, 3084d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3085d604f533SWebb Scales rc = -ENODEV; 3086d604f533SWebb Scales } 3087d604f533SWebb Scales 3088d604f533SWebb Scales if (unlikely(rc)) 3089d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3090bfd7546cSDon Brace else 3091bfd7546cSDon Brace wait_for_device_to_become_ready(h, scsi3addr, 0); 3092d604f533SWebb Scales 3093d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3094d604f533SWebb Scales return rc; 3095d604f533SWebb Scales } 3096d604f533SWebb Scales 3097edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3098edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3099edd16368SStephen M. Cameron { 3100edd16368SStephen M. Cameron int rc; 3101edd16368SStephen M. Cameron unsigned char *buf; 3102edd16368SStephen M. Cameron 3103edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3104edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3105edd16368SStephen M. Cameron if (!buf) 3106edd16368SStephen M. Cameron return; 31078383278dSScott Teel 31088383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 31098383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 31108383278dSScott Teel goto exit; 31118383278dSScott Teel 31128383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 31138383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 31148383278dSScott Teel 3115edd16368SStephen M. Cameron if (rc == 0) 3116edd16368SStephen M. Cameron *raid_level = buf[8]; 3117edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3118edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 31198383278dSScott Teel exit: 3120edd16368SStephen M. Cameron kfree(buf); 3121edd16368SStephen M. Cameron return; 3122edd16368SStephen M. Cameron } 3123edd16368SStephen M. Cameron 3124283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3125283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3126283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3127283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3128283b4a9bSStephen M. Cameron { 3129283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3130283b4a9bSStephen M. Cameron int map, row, col; 3131283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3132283b4a9bSStephen M. Cameron 3133283b4a9bSStephen M. Cameron if (rc != 0) 3134283b4a9bSStephen M. Cameron return; 3135283b4a9bSStephen M. Cameron 31362ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31372ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31382ba8bfc8SStephen M. Cameron return; 31392ba8bfc8SStephen M. Cameron 3140283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3141283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3142283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3143283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3144283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3145283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3146283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3147283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3148283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3149283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3150283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3151283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3152283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3153283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3154283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3155283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3156283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3157283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3158283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3159283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3160283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3161283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3162283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3163283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31642b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3165dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31662b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31672b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31682b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3169dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3170dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3171283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3172283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3173283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3174283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3175283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3176283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3177283b4a9bSStephen M. Cameron disks_per_row = 3178283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3179283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3180283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3181283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3182283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3183283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3184283b4a9bSStephen M. Cameron disks_per_row = 3185283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3186283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3187283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3188283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3189283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3190283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3191283b4a9bSStephen M. Cameron } 3192283b4a9bSStephen M. Cameron } 3193283b4a9bSStephen M. Cameron } 3194283b4a9bSStephen M. Cameron #else 3195283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3196283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3197283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3198283b4a9bSStephen M. Cameron { 3199283b4a9bSStephen M. Cameron } 3200283b4a9bSStephen M. Cameron #endif 3201283b4a9bSStephen M. Cameron 3202283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3203283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3204283b4a9bSStephen M. Cameron { 3205283b4a9bSStephen M. Cameron int rc = 0; 3206283b4a9bSStephen M. Cameron struct CommandList *c; 3207283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3208283b4a9bSStephen M. Cameron 320945fcb86eSStephen Cameron c = cmd_alloc(h); 3210bf43caf3SRobert Elliott 3211283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3212283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3213283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 32142dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 32152dd02d74SRobert Elliott cmd_free(h, c); 32162dd02d74SRobert Elliott return -1; 3217283b4a9bSStephen M. Cameron } 321825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3219c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 322025163bd5SWebb Scales if (rc) 322125163bd5SWebb Scales goto out; 3222283b4a9bSStephen M. Cameron ei = c->err_info; 3223283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3224d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 322525163bd5SWebb Scales rc = -1; 322625163bd5SWebb Scales goto out; 3227283b4a9bSStephen M. Cameron } 322845fcb86eSStephen Cameron cmd_free(h, c); 3229283b4a9bSStephen M. Cameron 3230283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3231283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3232283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3233283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3234283b4a9bSStephen M. Cameron rc = -1; 3235283b4a9bSStephen M. Cameron } 3236283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3237283b4a9bSStephen M. Cameron return rc; 323825163bd5SWebb Scales out: 323925163bd5SWebb Scales cmd_free(h, c); 324025163bd5SWebb Scales return rc; 3241283b4a9bSStephen M. Cameron } 3242283b4a9bSStephen M. Cameron 3243d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3244d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3245d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3246d04e62b9SKevin Barnett { 3247d04e62b9SKevin Barnett int rc = IO_OK; 3248d04e62b9SKevin Barnett struct CommandList *c; 3249d04e62b9SKevin Barnett struct ErrorInfo *ei; 3250d04e62b9SKevin Barnett 3251d04e62b9SKevin Barnett c = cmd_alloc(h); 3252d04e62b9SKevin Barnett 3253d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3254d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3255d04e62b9SKevin Barnett if (rc) 3256d04e62b9SKevin Barnett goto out; 3257d04e62b9SKevin Barnett 3258d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3259d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3260d04e62b9SKevin Barnett 3261d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3262c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3263d04e62b9SKevin Barnett if (rc) 3264d04e62b9SKevin Barnett goto out; 3265d04e62b9SKevin Barnett ei = c->err_info; 3266d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3267d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3268d04e62b9SKevin Barnett rc = -1; 3269d04e62b9SKevin Barnett } 3270d04e62b9SKevin Barnett out: 3271d04e62b9SKevin Barnett cmd_free(h, c); 3272d04e62b9SKevin Barnett return rc; 3273d04e62b9SKevin Barnett } 3274d04e62b9SKevin Barnett 327566749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 327666749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 327766749d0dSScott Teel { 327866749d0dSScott Teel int rc = IO_OK; 327966749d0dSScott Teel struct CommandList *c; 328066749d0dSScott Teel struct ErrorInfo *ei; 328166749d0dSScott Teel 328266749d0dSScott Teel c = cmd_alloc(h); 328366749d0dSScott Teel 328466749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 328566749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 328666749d0dSScott Teel if (rc) 328766749d0dSScott Teel goto out; 328866749d0dSScott Teel 328966749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3290c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 329166749d0dSScott Teel if (rc) 329266749d0dSScott Teel goto out; 329366749d0dSScott Teel ei = c->err_info; 329466749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 329566749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 329666749d0dSScott Teel rc = -1; 329766749d0dSScott Teel } 329866749d0dSScott Teel out: 329966749d0dSScott Teel cmd_free(h, c); 330066749d0dSScott Teel return rc; 330166749d0dSScott Teel } 330266749d0dSScott Teel 330303383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 330403383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 330503383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 330603383736SDon Brace { 330703383736SDon Brace int rc = IO_OK; 330803383736SDon Brace struct CommandList *c; 330903383736SDon Brace struct ErrorInfo *ei; 331003383736SDon Brace 331103383736SDon Brace c = cmd_alloc(h); 331203383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 331303383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 331403383736SDon Brace if (rc) 331503383736SDon Brace goto out; 331603383736SDon Brace 331703383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 331803383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 331903383736SDon Brace 332025163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3321c448ecfaSDon Brace DEFAULT_TIMEOUT); 332203383736SDon Brace ei = c->err_info; 332303383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 332403383736SDon Brace hpsa_scsi_interpret_error(h, c); 332503383736SDon Brace rc = -1; 332603383736SDon Brace } 332703383736SDon Brace out: 332803383736SDon Brace cmd_free(h, c); 3329d04e62b9SKevin Barnett 333003383736SDon Brace return rc; 333103383736SDon Brace } 333203383736SDon Brace 3333cca8f13bSDon Brace /* 3334cca8f13bSDon Brace * get enclosure information 3335cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3336cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3337cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3338cca8f13bSDon Brace */ 3339cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3340cca8f13bSDon Brace unsigned char *scsi3addr, 3341cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3342cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3343cca8f13bSDon Brace { 3344cca8f13bSDon Brace int rc = -1; 3345cca8f13bSDon Brace struct CommandList *c = NULL; 3346cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3347cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3348cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3349cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3350cca8f13bSDon Brace u16 bmic_device_index = 0; 3351cca8f13bSDon Brace 3352cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3353cca8f13bSDon Brace 335417a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 335517a9e54aSDon Brace rc = IO_OK; 3356cca8f13bSDon Brace goto out; 335717a9e54aSDon Brace } 3358cca8f13bSDon Brace 3359cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3360cca8f13bSDon Brace if (!bssbp) 3361cca8f13bSDon Brace goto out; 3362cca8f13bSDon Brace 3363cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3364cca8f13bSDon Brace if (!id_phys) 3365cca8f13bSDon Brace goto out; 3366cca8f13bSDon Brace 3367cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3368cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3369cca8f13bSDon Brace if (rc) { 3370cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3371cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3372cca8f13bSDon Brace goto out; 3373cca8f13bSDon Brace } 3374cca8f13bSDon Brace 3375cca8f13bSDon Brace c = cmd_alloc(h); 3376cca8f13bSDon Brace 3377cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3378cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3379cca8f13bSDon Brace 3380cca8f13bSDon Brace if (rc) 3381cca8f13bSDon Brace goto out; 3382cca8f13bSDon Brace 3383cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3384cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3385cca8f13bSDon Brace else 3386cca8f13bSDon Brace c->Request.CDB[5] = 0; 3387cca8f13bSDon Brace 3388cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3389c448ecfaSDon Brace DEFAULT_TIMEOUT); 3390cca8f13bSDon Brace if (rc) 3391cca8f13bSDon Brace goto out; 3392cca8f13bSDon Brace 3393cca8f13bSDon Brace ei = c->err_info; 3394cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3395cca8f13bSDon Brace rc = -1; 3396cca8f13bSDon Brace goto out; 3397cca8f13bSDon Brace } 3398cca8f13bSDon Brace 3399cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3400cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3401cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3402cca8f13bSDon Brace 3403cca8f13bSDon Brace rc = IO_OK; 3404cca8f13bSDon Brace out: 3405cca8f13bSDon Brace kfree(bssbp); 3406cca8f13bSDon Brace kfree(id_phys); 3407cca8f13bSDon Brace 3408cca8f13bSDon Brace if (c) 3409cca8f13bSDon Brace cmd_free(h, c); 3410cca8f13bSDon Brace 3411cca8f13bSDon Brace if (rc != IO_OK) 3412cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3413cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3414cca8f13bSDon Brace } 3415cca8f13bSDon Brace 3416d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3417d04e62b9SKevin Barnett unsigned char *scsi3addr) 3418d04e62b9SKevin Barnett { 3419d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3420d04e62b9SKevin Barnett u32 nphysicals; 3421d04e62b9SKevin Barnett u64 sa = 0; 3422d04e62b9SKevin Barnett int i; 3423d04e62b9SKevin Barnett 3424d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3425d04e62b9SKevin Barnett if (!physdev) 3426d04e62b9SKevin Barnett return 0; 3427d04e62b9SKevin Barnett 3428d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3429d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3430d04e62b9SKevin Barnett kfree(physdev); 3431d04e62b9SKevin Barnett return 0; 3432d04e62b9SKevin Barnett } 3433d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3434d04e62b9SKevin Barnett 3435d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3436d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3437d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3438d04e62b9SKevin Barnett break; 3439d04e62b9SKevin Barnett } 3440d04e62b9SKevin Barnett 3441d04e62b9SKevin Barnett kfree(physdev); 3442d04e62b9SKevin Barnett 3443d04e62b9SKevin Barnett return sa; 3444d04e62b9SKevin Barnett } 3445d04e62b9SKevin Barnett 3446d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3447d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3448d04e62b9SKevin Barnett { 3449d04e62b9SKevin Barnett int rc; 3450d04e62b9SKevin Barnett u64 sa = 0; 3451d04e62b9SKevin Barnett 3452d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3453d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3454d04e62b9SKevin Barnett 3455d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3456d04e62b9SKevin Barnett if (ssi == NULL) { 3457d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3458d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3459d04e62b9SKevin Barnett return; 3460d04e62b9SKevin Barnett } 3461d04e62b9SKevin Barnett 3462d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3463d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3464d04e62b9SKevin Barnett if (rc == 0) { 3465d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3466d04e62b9SKevin Barnett h->sas_address = sa; 3467d04e62b9SKevin Barnett } 3468d04e62b9SKevin Barnett 3469d04e62b9SKevin Barnett kfree(ssi); 3470d04e62b9SKevin Barnett } else 3471d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3472d04e62b9SKevin Barnett 3473d04e62b9SKevin Barnett dev->sas_address = sa; 3474d04e62b9SKevin Barnett } 3475d04e62b9SKevin Barnett 3476d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34778383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34781b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34791b70150aSStephen M. Cameron { 34801b70150aSStephen M. Cameron int rc; 34811b70150aSStephen M. Cameron int i; 34821b70150aSStephen M. Cameron int pages; 34831b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34841b70150aSStephen M. Cameron 34851b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34861b70150aSStephen M. Cameron if (!buf) 34878383278dSScott Teel return false; 34881b70150aSStephen M. Cameron 34891b70150aSStephen M. Cameron /* Get the size of the page list first */ 34901b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34911b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34921b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34931b70150aSStephen M. Cameron if (rc != 0) 34941b70150aSStephen M. Cameron goto exit_unsupported; 34951b70150aSStephen M. Cameron pages = buf[3]; 34961b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34971b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34981b70150aSStephen M. Cameron else 34991b70150aSStephen M. Cameron bufsize = 255; 35001b70150aSStephen M. Cameron 35011b70150aSStephen M. Cameron /* Get the whole VPD page list */ 35021b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 35031b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 35041b70150aSStephen M. Cameron buf, bufsize); 35051b70150aSStephen M. Cameron if (rc != 0) 35061b70150aSStephen M. Cameron goto exit_unsupported; 35071b70150aSStephen M. Cameron 35081b70150aSStephen M. Cameron pages = buf[3]; 35091b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 35101b70150aSStephen M. Cameron if (buf[3 + i] == page) 35111b70150aSStephen M. Cameron goto exit_supported; 35121b70150aSStephen M. Cameron exit_unsupported: 35131b70150aSStephen M. Cameron kfree(buf); 35148383278dSScott Teel return false; 35151b70150aSStephen M. Cameron exit_supported: 35161b70150aSStephen M. Cameron kfree(buf); 35178383278dSScott Teel return true; 35181b70150aSStephen M. Cameron } 35191b70150aSStephen M. Cameron 3520283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3521283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3522283b4a9bSStephen M. Cameron { 3523283b4a9bSStephen M. Cameron int rc; 3524283b4a9bSStephen M. Cameron unsigned char *buf; 3525283b4a9bSStephen M. Cameron u8 ioaccel_status; 3526283b4a9bSStephen M. Cameron 3527283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3528283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 352941ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3530283b4a9bSStephen M. Cameron 3531283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3532283b4a9bSStephen M. Cameron if (!buf) 3533283b4a9bSStephen M. Cameron return; 35341b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35351b70150aSStephen M. Cameron goto out; 3536283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3537b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3538283b4a9bSStephen M. Cameron if (rc != 0) 3539283b4a9bSStephen M. Cameron goto out; 3540283b4a9bSStephen M. Cameron 3541283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3542283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3543283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3544283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3545283b4a9bSStephen M. Cameron this_device->offload_config = 3546283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3547283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3548283b4a9bSStephen M. Cameron this_device->offload_enabled = 3549283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3550283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3551283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3552283b4a9bSStephen M. Cameron } 355341ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3554283b4a9bSStephen M. Cameron out: 3555283b4a9bSStephen M. Cameron kfree(buf); 3556283b4a9bSStephen M. Cameron return; 3557283b4a9bSStephen M. Cameron } 3558283b4a9bSStephen M. Cameron 3559edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3560edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 356175d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3562edd16368SStephen M. Cameron { 3563edd16368SStephen M. Cameron int rc; 3564edd16368SStephen M. Cameron unsigned char *buf; 3565edd16368SStephen M. Cameron 35668383278dSScott Teel /* Does controller have VPD for device id? */ 35678383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 35688383278dSScott Teel return 1; /* not supported */ 35698383278dSScott Teel 3570edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3571edd16368SStephen M. Cameron if (!buf) 3572a84d794dSStephen M. Cameron return -ENOMEM; 35738383278dSScott Teel 35748383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 35758383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 35768383278dSScott Teel if (rc == 0) { 35778383278dSScott Teel if (buflen > 16) 35788383278dSScott Teel buflen = 16; 35798383278dSScott Teel memcpy(device_id, &buf[8], buflen); 35808383278dSScott Teel } 358175d23d89SDon Brace 3582edd16368SStephen M. Cameron kfree(buf); 358375d23d89SDon Brace 35848383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3585edd16368SStephen M. Cameron } 3586edd16368SStephen M. Cameron 3587edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 358803383736SDon Brace void *buf, int bufsize, 3589edd16368SStephen M. Cameron int extended_response) 3590edd16368SStephen M. Cameron { 3591edd16368SStephen M. Cameron int rc = IO_OK; 3592edd16368SStephen M. Cameron struct CommandList *c; 3593edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3594edd16368SStephen M. Cameron struct ErrorInfo *ei; 3595edd16368SStephen M. Cameron 359645fcb86eSStephen Cameron c = cmd_alloc(h); 3597bf43caf3SRobert Elliott 3598e89c0ae7SStephen M. Cameron /* address the controller */ 3599e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3600a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3601a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3602a2dac136SStephen M. Cameron rc = -1; 3603a2dac136SStephen M. Cameron goto out; 3604a2dac136SStephen M. Cameron } 3605edd16368SStephen M. Cameron if (extended_response) 3606edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 360725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3608c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 360925163bd5SWebb Scales if (rc) 361025163bd5SWebb Scales goto out; 3611edd16368SStephen M. Cameron ei = c->err_info; 3612edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3613edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3614d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3615edd16368SStephen M. Cameron rc = -1; 3616283b4a9bSStephen M. Cameron } else { 361703383736SDon Brace struct ReportLUNdata *rld = buf; 361803383736SDon Brace 361903383736SDon Brace if (rld->extended_response_flag != extended_response) { 3620283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3621283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3622283b4a9bSStephen M. Cameron extended_response, 362303383736SDon Brace rld->extended_response_flag); 3624283b4a9bSStephen M. Cameron rc = -1; 3625283b4a9bSStephen M. Cameron } 3626edd16368SStephen M. Cameron } 3627a2dac136SStephen M. Cameron out: 362845fcb86eSStephen Cameron cmd_free(h, c); 3629edd16368SStephen M. Cameron return rc; 3630edd16368SStephen M. Cameron } 3631edd16368SStephen M. Cameron 3632edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 363303383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3634edd16368SStephen M. Cameron { 3635*2a80d545SHannes Reinecke int rc; 3636*2a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 3637*2a80d545SHannes Reinecke 3638*2a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 363903383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3640*2a80d545SHannes Reinecke if (!rc || !hpsa_allow_any) 3641*2a80d545SHannes Reinecke return rc; 3642*2a80d545SHannes Reinecke 3643*2a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 3644*2a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3645*2a80d545SHannes Reinecke if (!lbuf) 3646*2a80d545SHannes Reinecke return -ENOMEM; 3647*2a80d545SHannes Reinecke 3648*2a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3649*2a80d545SHannes Reinecke if (!rc) { 3650*2a80d545SHannes Reinecke int i; 3651*2a80d545SHannes Reinecke u32 nphys; 3652*2a80d545SHannes Reinecke 3653*2a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 3654*2a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 3655*2a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3656*2a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 3657*2a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3658*2a80d545SHannes Reinecke } 3659*2a80d545SHannes Reinecke kfree(lbuf); 3660*2a80d545SHannes Reinecke return rc; 3661edd16368SStephen M. Cameron } 3662edd16368SStephen M. Cameron 3663edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3664edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3665edd16368SStephen M. Cameron { 3666edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3667edd16368SStephen M. Cameron } 3668edd16368SStephen M. Cameron 3669edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3670edd16368SStephen M. Cameron int bus, int target, int lun) 3671edd16368SStephen M. Cameron { 3672edd16368SStephen M. Cameron device->bus = bus; 3673edd16368SStephen M. Cameron device->target = target; 3674edd16368SStephen M. Cameron device->lun = lun; 3675edd16368SStephen M. Cameron } 3676edd16368SStephen M. Cameron 36779846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36789846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36799846590eSStephen M. Cameron unsigned char scsi3addr[]) 36809846590eSStephen M. Cameron { 36819846590eSStephen M. Cameron int rc; 36829846590eSStephen M. Cameron int status; 36839846590eSStephen M. Cameron int size; 36849846590eSStephen M. Cameron unsigned char *buf; 36859846590eSStephen M. Cameron 36869846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36879846590eSStephen M. Cameron if (!buf) 36889846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36899846590eSStephen M. Cameron 36909846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 369124a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36929846590eSStephen M. Cameron goto exit_failed; 36939846590eSStephen M. Cameron 36949846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36959846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36969846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 369724a4b078SStephen M. Cameron if (rc != 0) 36989846590eSStephen M. Cameron goto exit_failed; 36999846590eSStephen M. Cameron size = buf[3]; 37009846590eSStephen M. Cameron 37019846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 37029846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 37039846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 370424a4b078SStephen M. Cameron if (rc != 0) 37059846590eSStephen M. Cameron goto exit_failed; 37069846590eSStephen M. Cameron status = buf[4]; /* status byte */ 37079846590eSStephen M. Cameron 37089846590eSStephen M. Cameron kfree(buf); 37099846590eSStephen M. Cameron return status; 37109846590eSStephen M. Cameron exit_failed: 37119846590eSStephen M. Cameron kfree(buf); 37129846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 37139846590eSStephen M. Cameron } 37149846590eSStephen M. Cameron 37159846590eSStephen M. Cameron /* Determine offline status of a volume. 37169846590eSStephen M. Cameron * Return either: 37179846590eSStephen M. Cameron * 0 (not offline) 371867955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 37199846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 37209846590eSStephen M. Cameron * describing why a volume is to be kept offline) 37219846590eSStephen M. Cameron */ 372267955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 37239846590eSStephen M. Cameron unsigned char scsi3addr[]) 37249846590eSStephen M. Cameron { 37259846590eSStephen M. Cameron struct CommandList *c; 37269437ac43SStephen Cameron unsigned char *sense; 37279437ac43SStephen Cameron u8 sense_key, asc, ascq; 37289437ac43SStephen Cameron int sense_len; 372925163bd5SWebb Scales int rc, ldstat = 0; 37309846590eSStephen M. Cameron u16 cmd_status; 37319846590eSStephen M. Cameron u8 scsi_status; 37329846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 37339846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 37349846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 37359846590eSStephen M. Cameron 37369846590eSStephen M. Cameron c = cmd_alloc(h); 3737bf43caf3SRobert Elliott 37389846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3739c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3740c448ecfaSDon Brace DEFAULT_TIMEOUT); 374125163bd5SWebb Scales if (rc) { 374225163bd5SWebb Scales cmd_free(h, c); 374325163bd5SWebb Scales return 0; 374425163bd5SWebb Scales } 37459846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37469437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37479437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37489437ac43SStephen Cameron else 37499437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37509437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37519846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37529846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37539846590eSStephen M. Cameron cmd_free(h, c); 37549846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 37559846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 37569846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 37579846590eSStephen M. Cameron sense_key != NOT_READY || 37589846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 37599846590eSStephen M. Cameron return 0; 37609846590eSStephen M. Cameron } 37619846590eSStephen M. Cameron 37629846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37639846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37649846590eSStephen M. Cameron 37659846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37669846590eSStephen M. Cameron switch (ldstat) { 37679846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37685ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37699846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37709846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37719846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37729846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37739846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37749846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37759846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37769846590eSStephen M. Cameron return ldstat; 37779846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37789846590eSStephen M. Cameron /* If VPD status page isn't available, 37799846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37809846590eSStephen M. Cameron */ 37819846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37829846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37839846590eSStephen M. Cameron return ldstat; 37849846590eSStephen M. Cameron break; 37859846590eSStephen M. Cameron default: 37869846590eSStephen M. Cameron break; 37879846590eSStephen M. Cameron } 37889846590eSStephen M. Cameron return 0; 37899846590eSStephen M. Cameron } 37909846590eSStephen M. Cameron 37919b5c48c2SStephen Cameron /* 37929b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37939b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37949b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37959b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37969b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37979b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37989b5c48c2SStephen Cameron */ 37999b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 38009b5c48c2SStephen Cameron unsigned char *scsi3addr) 38019b5c48c2SStephen Cameron { 38029b5c48c2SStephen Cameron struct CommandList *c; 38039b5c48c2SStephen Cameron struct ErrorInfo *ei; 38049b5c48c2SStephen Cameron int rc = 0; 38059b5c48c2SStephen Cameron 38069b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 38079b5c48c2SStephen Cameron 38089b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 38099b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 38109b5c48c2SStephen Cameron return 1; 38119b5c48c2SStephen Cameron 38129b5c48c2SStephen Cameron c = cmd_alloc(h); 3813bf43caf3SRobert Elliott 38149b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3815c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3816c448ecfaSDon Brace DEFAULT_TIMEOUT); 38179b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 38189b5c48c2SStephen Cameron ei = c->err_info; 38199b5c48c2SStephen Cameron switch (ei->CommandStatus) { 38209b5c48c2SStephen Cameron case CMD_INVALID: 38219b5c48c2SStephen Cameron rc = 0; 38229b5c48c2SStephen Cameron break; 38239b5c48c2SStephen Cameron case CMD_UNABORTABLE: 38249b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 38259b5c48c2SStephen Cameron rc = 1; 38269b5c48c2SStephen Cameron break; 38279437ac43SStephen Cameron case CMD_TMF_STATUS: 38289437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 38299437ac43SStephen Cameron break; 38309b5c48c2SStephen Cameron default: 38319b5c48c2SStephen Cameron rc = 0; 38329b5c48c2SStephen Cameron break; 38339b5c48c2SStephen Cameron } 38349b5c48c2SStephen Cameron cmd_free(h, c); 38359b5c48c2SStephen Cameron return rc; 38369b5c48c2SStephen Cameron } 38379b5c48c2SStephen Cameron 3838edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 38390b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 38400b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3841edd16368SStephen M. Cameron { 38420b0e1d6cSStephen M. Cameron 38430b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 38440b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 38450b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 38460b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 38470b0e1d6cSStephen M. Cameron 3848ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 38490b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3850683fc444SDon Brace int rc = 0; 3851edd16368SStephen M. Cameron 3852ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3853683fc444SDon Brace if (!inq_buff) { 3854683fc444SDon Brace rc = -ENOMEM; 3855edd16368SStephen M. Cameron goto bail_out; 3856683fc444SDon Brace } 3857edd16368SStephen M. Cameron 3858edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3859edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3860edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3861edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3862edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3863edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3864683fc444SDon Brace rc = -EIO; 3865edd16368SStephen M. Cameron goto bail_out; 3866edd16368SStephen M. Cameron } 3867edd16368SStephen M. Cameron 38684af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38694af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 387075d23d89SDon Brace 3871edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3872edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3873edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3874edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3875edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3876edd16368SStephen M. Cameron sizeof(this_device->model)); 3877edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3878edd16368SStephen M. Cameron sizeof(this_device->device_id)); 38798383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 38808383278dSScott Teel sizeof(this_device->device_id))) 38818383278dSScott Teel dev_err(&h->pdev->dev, 38828383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 38838383278dSScott Teel h->ctlr, __func__, 38848383278dSScott Teel h->scsi_host->host_no, 38858383278dSScott Teel this_device->target, this_device->lun, 38868383278dSScott Teel scsi_device_type(this_device->devtype), 38878383278dSScott Teel this_device->model); 3888edd16368SStephen M. Cameron 3889af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3890af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3891283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 389267955ba3SStephen M. Cameron int volume_offline; 389367955ba3SStephen M. Cameron 3894edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3895283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3896283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 389767955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 389867955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 389967955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 390067955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3901283b4a9bSStephen M. Cameron } else { 3902edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3903283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3904283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 390541ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3906a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 39079846590eSStephen M. Cameron this_device->volume_offline = 0; 390803383736SDon Brace this_device->queue_depth = h->nr_cmds; 3909283b4a9bSStephen M. Cameron } 3910edd16368SStephen M. Cameron 39110b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 39120b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 39130b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 39140b0e1d6cSStephen M. Cameron */ 39150b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 39160b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 39170b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 39180b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 39190b0e1d6cSStephen M. Cameron } 3920edd16368SStephen M. Cameron kfree(inq_buff); 3921edd16368SStephen M. Cameron return 0; 3922edd16368SStephen M. Cameron 3923edd16368SStephen M. Cameron bail_out: 3924edd16368SStephen M. Cameron kfree(inq_buff); 3925683fc444SDon Brace return rc; 3926edd16368SStephen M. Cameron } 3927edd16368SStephen M. Cameron 39289b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 39299b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 39309b5c48c2SStephen Cameron { 39319b5c48c2SStephen Cameron unsigned long flags; 39329b5c48c2SStephen Cameron int rc, entry; 39339b5c48c2SStephen Cameron /* 39349b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 39359b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 39369b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 39379b5c48c2SStephen Cameron */ 39389b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 39399b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 39409b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 39419b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 39429b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 39439b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39449b5c48c2SStephen Cameron } else { 39459b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39469b5c48c2SStephen Cameron dev->supports_aborts = 39479b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 39489b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 39499b5c48c2SStephen Cameron dev->supports_aborts = 0; 39509b5c48c2SStephen Cameron } 39519b5c48c2SStephen Cameron } 39529b5c48c2SStephen Cameron 3953c795505aSKevin Barnett /* 3954c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3955edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3956edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3957edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3958edd16368SStephen M. Cameron */ 3959edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 39601f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3961edd16368SStephen M. Cameron { 3962c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3963edd16368SStephen M. Cameron 39641f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 39651f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 39661f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3967c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3968c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 39691f310bdeSStephen M. Cameron else 39701f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3971c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3972c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 39731f310bdeSStephen M. Cameron return; 39741f310bdeSStephen M. Cameron } 39751f310bdeSStephen M. Cameron /* It's a logical device */ 397666749d0dSScott Teel if (device->external) { 39771f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3978c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3979c795505aSKevin Barnett lunid & 0x00ff); 39801f310bdeSStephen M. Cameron return; 3981339b2b14SStephen M. Cameron } 3982c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3983c795505aSKevin Barnett 0, lunid & 0x3fff); 3984edd16368SStephen M. Cameron } 3985edd16368SStephen M. Cameron 3986edd16368SStephen M. Cameron 3987edd16368SStephen M. Cameron /* 398854b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 398954b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 399054b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 399154b6e9e9SScott Teel * 3. Return: 399254b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 399354b6e9e9SScott Teel * 0 if no matching physical disk was found. 399454b6e9e9SScott Teel */ 399554b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 399654b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 399754b6e9e9SScott Teel { 399841ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 399941ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 400041ce4c35SStephen Cameron unsigned long flags; 400154b6e9e9SScott Teel int i; 400254b6e9e9SScott Teel 400341ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 400441ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 400541ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 400641ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 400741ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 400841ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 400954b6e9e9SScott Teel return 1; 401054b6e9e9SScott Teel } 401141ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 401241ce4c35SStephen Cameron return 0; 401341ce4c35SStephen Cameron } 401441ce4c35SStephen Cameron 401566749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 401666749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 401766749d0dSScott Teel { 401866749d0dSScott Teel /* In report logicals, local logicals are listed first, 401966749d0dSScott Teel * then any externals. 402066749d0dSScott Teel */ 402166749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 402266749d0dSScott Teel 402366749d0dSScott Teel if (i == raid_ctlr_position) 402466749d0dSScott Teel return 0; 402566749d0dSScott Teel 402666749d0dSScott Teel if (i < logicals_start) 402766749d0dSScott Teel return 0; 402866749d0dSScott Teel 402966749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 403066749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 403166749d0dSScott Teel return 0; 403266749d0dSScott Teel 403366749d0dSScott Teel return 1; /* it's an external lun */ 403466749d0dSScott Teel } 403566749d0dSScott Teel 403654b6e9e9SScott Teel /* 4037edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4038edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4039edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4040edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4041edd16368SStephen M. Cameron */ 4042edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 404303383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 404401a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4045edd16368SStephen M. Cameron { 404603383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4047edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4048edd16368SStephen M. Cameron return -1; 4049edd16368SStephen M. Cameron } 405003383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4051edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 405203383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 405303383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4054edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4055edd16368SStephen M. Cameron } 405603383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4057edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4058edd16368SStephen M. Cameron return -1; 4059edd16368SStephen M. Cameron } 40606df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4061edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4062edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4063edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4064edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4065edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4066edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4067edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4068edd16368SStephen M. Cameron } 4069edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4070edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4071edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4072edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4073edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4074edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4075edd16368SStephen M. Cameron } 4076edd16368SStephen M. Cameron return 0; 4077edd16368SStephen M. Cameron } 4078edd16368SStephen M. Cameron 407942a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 408042a91641SDon Brace int i, int nphysicals, int nlogicals, 4081a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4082339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4083339b2b14SStephen M. Cameron { 4084339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4085339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4086339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4087339b2b14SStephen M. Cameron */ 4088339b2b14SStephen M. Cameron 4089339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4090339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4091339b2b14SStephen M. Cameron 4092339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4093339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4094339b2b14SStephen M. Cameron 4095339b2b14SStephen M. Cameron if (i < logicals_start) 4096d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4097d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4098339b2b14SStephen M. Cameron 4099339b2b14SStephen M. Cameron if (i < last_device) 4100339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4101339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4102339b2b14SStephen M. Cameron BUG(); 4103339b2b14SStephen M. Cameron return NULL; 4104339b2b14SStephen M. Cameron } 4105339b2b14SStephen M. Cameron 410603383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 410703383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 410803383736SDon Brace struct hpsa_scsi_dev_t *dev, 4109f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 411003383736SDon Brace struct bmic_identify_physical_device *id_phys) 411103383736SDon Brace { 411203383736SDon Brace int rc; 41134b6e5597SScott Teel struct ext_report_lun_entry *rle; 41144b6e5597SScott Teel 41154b6e5597SScott Teel /* 41164b6e5597SScott Teel * external targets don't support BMIC 41174b6e5597SScott Teel */ 41184b6e5597SScott Teel if (dev->external) { 41194b6e5597SScott Teel dev->queue_depth = 7; 41204b6e5597SScott Teel return; 41214b6e5597SScott Teel } 41224b6e5597SScott Teel 41234b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 412403383736SDon Brace 412503383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4126f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4127a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 412803383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4129f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4130f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 413103383736SDon Brace sizeof(*id_phys)); 413203383736SDon Brace if (!rc) 413303383736SDon Brace /* Reserve space for FW operations */ 413403383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 413503383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 413603383736SDon Brace dev->queue_depth = 413703383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 413803383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 413903383736SDon Brace else 414003383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 414103383736SDon Brace } 414203383736SDon Brace 41438270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4144f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41458270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41468270b862SJoe Handzik { 4147f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4148f2039b03SDon Brace 4149f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41508270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41518270b862SJoe Handzik 41528270b862SJoe Handzik memcpy(&this_device->active_path_index, 41538270b862SJoe Handzik &id_phys->active_path_number, 41548270b862SJoe Handzik sizeof(this_device->active_path_index)); 41558270b862SJoe Handzik memcpy(&this_device->path_map, 41568270b862SJoe Handzik &id_phys->redundant_path_present_map, 41578270b862SJoe Handzik sizeof(this_device->path_map)); 41588270b862SJoe Handzik memcpy(&this_device->box, 41598270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 41608270b862SJoe Handzik sizeof(this_device->box)); 41618270b862SJoe Handzik memcpy(&this_device->phys_connector, 41628270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 41638270b862SJoe Handzik sizeof(this_device->phys_connector)); 41648270b862SJoe Handzik memcpy(&this_device->bay, 41658270b862SJoe Handzik &id_phys->phys_bay_in_box, 41668270b862SJoe Handzik sizeof(this_device->bay)); 41678270b862SJoe Handzik } 41688270b862SJoe Handzik 416966749d0dSScott Teel /* get number of local logical disks. */ 417066749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 417166749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 417266749d0dSScott Teel u32 *nlocals) 417366749d0dSScott Teel { 417466749d0dSScott Teel int rc; 417566749d0dSScott Teel 417666749d0dSScott Teel if (!id_ctlr) { 417766749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 417866749d0dSScott Teel __func__); 417966749d0dSScott Teel return -ENOMEM; 418066749d0dSScott Teel } 418166749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 418266749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 418366749d0dSScott Teel if (!rc) 418466749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 418566749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 418666749d0dSScott Teel else 418766749d0dSScott Teel *nlocals = le16_to_cpu( 418866749d0dSScott Teel id_ctlr->extended_logical_unit_count); 418966749d0dSScott Teel else 419066749d0dSScott Teel *nlocals = -1; 419166749d0dSScott Teel return rc; 419266749d0dSScott Teel } 419366749d0dSScott Teel 419464ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 419564ce60caSDon Brace { 419664ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 419764ce60caSDon Brace bool is_spare = false; 419864ce60caSDon Brace int rc; 419964ce60caSDon Brace 420064ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 420164ce60caSDon Brace if (!id_phys) 420264ce60caSDon Brace return false; 420364ce60caSDon Brace 420464ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 420564ce60caSDon Brace lunaddrbytes, 420664ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 420764ce60caSDon Brace id_phys, sizeof(*id_phys)); 420864ce60caSDon Brace if (rc == 0) 420964ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 421064ce60caSDon Brace 421164ce60caSDon Brace kfree(id_phys); 421264ce60caSDon Brace return is_spare; 421364ce60caSDon Brace } 421464ce60caSDon Brace 421564ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 421664ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 421764ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 421864ce60caSDon Brace 421964ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 422064ce60caSDon Brace 422164ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 422264ce60caSDon Brace struct ext_report_lun_entry *rle) 422364ce60caSDon Brace { 422464ce60caSDon Brace u8 device_flags; 422564ce60caSDon Brace u8 device_type; 422664ce60caSDon Brace 422764ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 422864ce60caSDon Brace return false; 422964ce60caSDon Brace 423064ce60caSDon Brace device_flags = rle->device_flags; 423164ce60caSDon Brace device_type = rle->device_type; 423264ce60caSDon Brace 423364ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 423464ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 423564ce60caSDon Brace return false; 423664ce60caSDon Brace return true; 423764ce60caSDon Brace } 423864ce60caSDon Brace 423964ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 424064ce60caSDon Brace return false; 424164ce60caSDon Brace 424264ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 424364ce60caSDon Brace return false; 424464ce60caSDon Brace 424564ce60caSDon Brace /* 424664ce60caSDon Brace * Spares may be spun down, we do not want to 424764ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 424864ce60caSDon Brace * that would have them spun up, that is a 424964ce60caSDon Brace * performance hit because I/O to the RAID device 425064ce60caSDon Brace * stops while the spin up occurs which can take 425164ce60caSDon Brace * over 50 seconds. 425264ce60caSDon Brace */ 425364ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 425464ce60caSDon Brace return true; 425564ce60caSDon Brace 425664ce60caSDon Brace return false; 425764ce60caSDon Brace } 425866749d0dSScott Teel 42598aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4260edd16368SStephen M. Cameron { 4261edd16368SStephen M. Cameron /* the idea here is we could get notified 4262edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4263edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4264edd16368SStephen M. Cameron * our list of devices accordingly. 4265edd16368SStephen M. Cameron * 4266edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4267edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4268edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4269edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4270edd16368SStephen M. Cameron */ 4271a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4272edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 427303383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 427466749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 427501a02ffcSStephen M. Cameron u32 nphysicals = 0; 427601a02ffcSStephen M. Cameron u32 nlogicals = 0; 427766749d0dSScott Teel u32 nlocal_logicals = 0; 427801a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4279edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4280edd16368SStephen M. Cameron int ncurrent = 0; 42814f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4282339b2b14SStephen M. Cameron int raid_ctlr_position; 428304fa2f44SKevin Barnett bool physical_device; 4284aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4285edd16368SStephen M. Cameron 4286cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 428792084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 428892084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4289edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 429003383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 429166749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4292edd16368SStephen M. Cameron 429303383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 429466749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4295edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4296edd16368SStephen M. Cameron goto out; 4297edd16368SStephen M. Cameron } 4298edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4299edd16368SStephen M. Cameron 4300853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4301853633e8SDon Brace 430203383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4303853633e8SDon Brace logdev_list, &nlogicals)) { 4304853633e8SDon Brace h->drv_req_rescan = 1; 4305edd16368SStephen M. Cameron goto out; 4306853633e8SDon Brace } 4307edd16368SStephen M. Cameron 430866749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 430966749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 431066749d0dSScott Teel dev_warn(&h->pdev->dev, 431166749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 431266749d0dSScott Teel __func__); 431366749d0dSScott Teel } 4314edd16368SStephen M. Cameron 4315aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4316aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4317aca4a520SScott Teel * controller. 4318edd16368SStephen M. Cameron */ 4319aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4320edd16368SStephen M. Cameron 4321edd16368SStephen M. Cameron /* Allocate the per device structures */ 4322edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4323b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4324b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4325b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4326b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4327b7ec021fSScott Teel break; 4328b7ec021fSScott Teel } 4329b7ec021fSScott Teel 4330edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4331edd16368SStephen M. Cameron if (!currentsd[i]) { 4332edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4333edd16368SStephen M. Cameron __FILE__, __LINE__); 4334853633e8SDon Brace h->drv_req_rescan = 1; 4335edd16368SStephen M. Cameron goto out; 4336edd16368SStephen M. Cameron } 4337edd16368SStephen M. Cameron ndev_allocated++; 4338edd16368SStephen M. Cameron } 4339edd16368SStephen M. Cameron 43408645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4341339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4342339b2b14SStephen M. Cameron else 4343339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4344339b2b14SStephen M. Cameron 4345edd16368SStephen M. Cameron /* adjust our table of devices */ 43464f4eb9f1SScott Teel n_ext_target_devs = 0; 4347edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43480b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4349683fc444SDon Brace int rc = 0; 4350f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 435164ce60caSDon Brace bool skip_device = false; 4352edd16368SStephen M. Cameron 435304fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4354edd16368SStephen M. Cameron 4355edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4356339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4357339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 435841ce4c35SStephen Cameron 435986cf7130SDon Brace /* Determine if this is a lun from an external target array */ 436086cf7130SDon Brace tmpdevice->external = 436186cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 436286cf7130SDon Brace nphysicals, nlocal_logicals); 436386cf7130SDon Brace 436464ce60caSDon Brace /* 436564ce60caSDon Brace * Skip over some devices such as a spare. 436664ce60caSDon Brace */ 436764ce60caSDon Brace if (!tmpdevice->external && physical_device) { 436864ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 436964ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 437064ce60caSDon Brace if (skip_device) 4371edd16368SStephen M. Cameron continue; 437264ce60caSDon Brace } 4373edd16368SStephen M. Cameron 4374edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4375683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4376683fc444SDon Brace &is_OBDR); 4377683fc444SDon Brace if (rc == -ENOMEM) { 4378683fc444SDon Brace dev_warn(&h->pdev->dev, 4379683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4380853633e8SDon Brace h->drv_req_rescan = 1; 4381683fc444SDon Brace goto out; 4382853633e8SDon Brace } 4383683fc444SDon Brace if (rc) { 4384683fc444SDon Brace dev_warn(&h->pdev->dev, 4385683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4386683fc444SDon Brace continue; 4387683fc444SDon Brace } 4388683fc444SDon Brace 43891f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43909b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4391edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4392edd16368SStephen M. Cameron 439334592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 439434592254SScott Teel * Event-based change notification is unreliable for those. 4395edd16368SStephen M. Cameron */ 439634592254SScott Teel if (!h->discovery_polling) { 439734592254SScott Teel if (tmpdevice->external) { 439834592254SScott Teel h->discovery_polling = 1; 439934592254SScott Teel dev_info(&h->pdev->dev, 440034592254SScott Teel "External target, activate discovery polling.\n"); 4401edd16368SStephen M. Cameron } 440234592254SScott Teel } 440334592254SScott Teel 4404edd16368SStephen M. Cameron 4405edd16368SStephen M. Cameron *this_device = *tmpdevice; 440604fa2f44SKevin Barnett this_device->physical_device = physical_device; 4407edd16368SStephen M. Cameron 440804fa2f44SKevin Barnett /* 440904fa2f44SKevin Barnett * Expose all devices except for physical devices that 441004fa2f44SKevin Barnett * are masked. 441104fa2f44SKevin Barnett */ 441204fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 44132a168208SKevin Barnett this_device->expose_device = 0; 44142a168208SKevin Barnett else 44152a168208SKevin Barnett this_device->expose_device = 1; 441641ce4c35SStephen Cameron 4417d04e62b9SKevin Barnett 4418d04e62b9SKevin Barnett /* 4419d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4420d04e62b9SKevin Barnett */ 4421d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4422d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4423edd16368SStephen M. Cameron 4424edd16368SStephen M. Cameron switch (this_device->devtype) { 44250b0e1d6cSStephen M. Cameron case TYPE_ROM: 4426edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4427edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4428edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4429edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4430edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4431edd16368SStephen M. Cameron * the inquiry data. 4432edd16368SStephen M. Cameron */ 44330b0e1d6cSStephen M. Cameron if (is_OBDR) 4434edd16368SStephen M. Cameron ncurrent++; 4435edd16368SStephen M. Cameron break; 4436edd16368SStephen M. Cameron case TYPE_DISK: 4437af15ed36SDon Brace case TYPE_ZBC: 443804fa2f44SKevin Barnett if (this_device->physical_device) { 4439b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4440b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4441ecf418d1SJoe Handzik this_device->offload_enabled = 0; 444203383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4443f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4444f2039b03SDon Brace hpsa_get_path_info(this_device, 4445f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4446b9092b79SKevin Barnett } 4447edd16368SStephen M. Cameron ncurrent++; 4448edd16368SStephen M. Cameron break; 4449edd16368SStephen M. Cameron case TYPE_TAPE: 4450edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4451cca8f13bSDon Brace ncurrent++; 4452cca8f13bSDon Brace break; 445341ce4c35SStephen Cameron case TYPE_ENCLOSURE: 445417a9e54aSDon Brace if (!this_device->external) 4455cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4456cca8f13bSDon Brace physdev_list, phys_dev_index, 4457cca8f13bSDon Brace this_device); 445841ce4c35SStephen Cameron ncurrent++; 445941ce4c35SStephen Cameron break; 4460edd16368SStephen M. Cameron case TYPE_RAID: 4461edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4462edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4463edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4464edd16368SStephen M. Cameron * don't present it. 4465edd16368SStephen M. Cameron */ 4466edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4467edd16368SStephen M. Cameron break; 4468edd16368SStephen M. Cameron ncurrent++; 4469edd16368SStephen M. Cameron break; 4470edd16368SStephen M. Cameron default: 4471edd16368SStephen M. Cameron break; 4472edd16368SStephen M. Cameron } 4473cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4474edd16368SStephen M. Cameron break; 4475edd16368SStephen M. Cameron } 4476d04e62b9SKevin Barnett 4477d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4478d04e62b9SKevin Barnett int rc = 0; 4479d04e62b9SKevin Barnett 4480d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4481d04e62b9SKevin Barnett if (rc) { 4482d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4483d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4484d04e62b9SKevin Barnett goto out; 4485d04e62b9SKevin Barnett } 4486d04e62b9SKevin Barnett } 4487d04e62b9SKevin Barnett 44888aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4489edd16368SStephen M. Cameron out: 4490edd16368SStephen M. Cameron kfree(tmpdevice); 4491edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4492edd16368SStephen M. Cameron kfree(currentsd[i]); 4493edd16368SStephen M. Cameron kfree(currentsd); 4494edd16368SStephen M. Cameron kfree(physdev_list); 4495edd16368SStephen M. Cameron kfree(logdev_list); 449666749d0dSScott Teel kfree(id_ctlr); 449703383736SDon Brace kfree(id_phys); 4498edd16368SStephen M. Cameron } 4499edd16368SStephen M. Cameron 4500ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4501ec5cbf04SWebb Scales struct scatterlist *sg) 4502ec5cbf04SWebb Scales { 4503ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4504ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4505ec5cbf04SWebb Scales 4506ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4507ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4508ec5cbf04SWebb Scales desc->Ext = 0; 4509ec5cbf04SWebb Scales } 4510ec5cbf04SWebb Scales 4511c7ee65b3SWebb Scales /* 4512c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4513edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4514edd16368SStephen M. Cameron * hpsa command, cp. 4515edd16368SStephen M. Cameron */ 451633a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4517edd16368SStephen M. Cameron struct CommandList *cp, 4518edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4519edd16368SStephen M. Cameron { 4520edd16368SStephen M. Cameron struct scatterlist *sg; 4521b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 452233a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4523edd16368SStephen M. Cameron 452433a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4525edd16368SStephen M. Cameron 4526edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4527edd16368SStephen M. Cameron if (use_sg < 0) 4528edd16368SStephen M. Cameron return use_sg; 4529edd16368SStephen M. Cameron 4530edd16368SStephen M. Cameron if (!use_sg) 4531edd16368SStephen M. Cameron goto sglist_finished; 4532edd16368SStephen M. Cameron 4533b3a7ba7cSWebb Scales /* 4534b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4535b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4536b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4537b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4538b3a7ba7cSWebb Scales * the entries in the one list. 4539b3a7ba7cSWebb Scales */ 454033a2ffceSStephen M. Cameron curr_sg = cp->SG; 4541b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4542b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4543b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4544b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4545ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 454633a2ffceSStephen M. Cameron curr_sg++; 454733a2ffceSStephen M. Cameron } 4548ec5cbf04SWebb Scales 4549b3a7ba7cSWebb Scales if (chained) { 4550b3a7ba7cSWebb Scales /* 4551b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4552b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4553b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4554b3a7ba7cSWebb Scales * where the previous loop left off. 4555b3a7ba7cSWebb Scales */ 4556b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4557b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4558b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4559b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4560b3a7ba7cSWebb Scales curr_sg++; 4561b3a7ba7cSWebb Scales } 4562b3a7ba7cSWebb Scales } 4563b3a7ba7cSWebb Scales 4564ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4565b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 456633a2ffceSStephen M. Cameron 456733a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 456833a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 456933a2ffceSStephen M. Cameron 457033a2ffceSStephen M. Cameron if (chained) { 457133a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 457250a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4573e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4574e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4575e2bea6dfSStephen M. Cameron return -1; 4576e2bea6dfSStephen M. Cameron } 457733a2ffceSStephen M. Cameron return 0; 4578edd16368SStephen M. Cameron } 4579edd16368SStephen M. Cameron 4580edd16368SStephen M. Cameron sglist_finished: 4581edd16368SStephen M. Cameron 458201a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4583c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4584edd16368SStephen M. Cameron return 0; 4585edd16368SStephen M. Cameron } 4586edd16368SStephen M. Cameron 4587283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4588283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4589283b4a9bSStephen M. Cameron { 4590283b4a9bSStephen M. Cameron int is_write = 0; 4591283b4a9bSStephen M. Cameron u32 block; 4592283b4a9bSStephen M. Cameron u32 block_cnt; 4593283b4a9bSStephen M. Cameron 4594283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4595283b4a9bSStephen M. Cameron switch (cdb[0]) { 4596283b4a9bSStephen M. Cameron case WRITE_6: 4597283b4a9bSStephen M. Cameron case WRITE_12: 4598283b4a9bSStephen M. Cameron is_write = 1; 4599283b4a9bSStephen M. Cameron case READ_6: 4600283b4a9bSStephen M. Cameron case READ_12: 4601283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4602abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4603abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4604abbada71SMahesh Rajashekhara cdb[3]); 4605283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4606c8a6c9a6SDon Brace if (block_cnt == 0) 4607c8a6c9a6SDon Brace block_cnt = 256; 4608283b4a9bSStephen M. Cameron } else { 4609283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4610c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4611c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4612283b4a9bSStephen M. Cameron } 4613283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4614283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4615283b4a9bSStephen M. Cameron 4616283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4617283b4a9bSStephen M. Cameron cdb[1] = 0; 4618283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4619283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4620283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4621283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4622283b4a9bSStephen M. Cameron cdb[6] = 0; 4623283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4624283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4625283b4a9bSStephen M. Cameron cdb[9] = 0; 4626283b4a9bSStephen M. Cameron *cdb_len = 10; 4627283b4a9bSStephen M. Cameron break; 4628283b4a9bSStephen M. Cameron } 4629283b4a9bSStephen M. Cameron return 0; 4630283b4a9bSStephen M. Cameron } 4631283b4a9bSStephen M. Cameron 4632c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4633283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 463403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4635e1f7de0cSMatt Gates { 4636e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4637e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4638e1f7de0cSMatt Gates unsigned int len; 4639e1f7de0cSMatt Gates unsigned int total_len = 0; 4640e1f7de0cSMatt Gates struct scatterlist *sg; 4641e1f7de0cSMatt Gates u64 addr64; 4642e1f7de0cSMatt Gates int use_sg, i; 4643e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4644e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4645e1f7de0cSMatt Gates 4646283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 464703383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 464803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4649283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 465003383736SDon Brace } 4651283b4a9bSStephen M. Cameron 4652e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4653e1f7de0cSMatt Gates 465403383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 465503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4656283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 465703383736SDon Brace } 4658283b4a9bSStephen M. Cameron 4659e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4660e1f7de0cSMatt Gates 4661e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4662e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4663e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4664e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4665e1f7de0cSMatt Gates 4666e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 466703383736SDon Brace if (use_sg < 0) { 466803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4669e1f7de0cSMatt Gates return use_sg; 467003383736SDon Brace } 4671e1f7de0cSMatt Gates 4672e1f7de0cSMatt Gates if (use_sg) { 4673e1f7de0cSMatt Gates curr_sg = cp->SG; 4674e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4675e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4676e1f7de0cSMatt Gates len = sg_dma_len(sg); 4677e1f7de0cSMatt Gates total_len += len; 467850a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 467950a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 468050a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4681e1f7de0cSMatt Gates curr_sg++; 4682e1f7de0cSMatt Gates } 468350a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4684e1f7de0cSMatt Gates 4685e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4686e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4687e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4688e1f7de0cSMatt Gates break; 4689e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4690e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4691e1f7de0cSMatt Gates break; 4692e1f7de0cSMatt Gates case DMA_NONE: 4693e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4694e1f7de0cSMatt Gates break; 4695e1f7de0cSMatt Gates default: 4696e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4697e1f7de0cSMatt Gates cmd->sc_data_direction); 4698e1f7de0cSMatt Gates BUG(); 4699e1f7de0cSMatt Gates break; 4700e1f7de0cSMatt Gates } 4701e1f7de0cSMatt Gates } else { 4702e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4703e1f7de0cSMatt Gates } 4704e1f7de0cSMatt Gates 4705c349775eSScott Teel c->Header.SGList = use_sg; 4706e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 47072b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 47082b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 47092b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 47102b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 47112b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4712283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4713283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4714c349775eSScott Teel /* Tag was already set at init time. */ 4715e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4716e1f7de0cSMatt Gates return 0; 4717e1f7de0cSMatt Gates } 4718edd16368SStephen M. Cameron 4719283b4a9bSStephen M. Cameron /* 4720283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4721283b4a9bSStephen M. Cameron * I/O accelerator path. 4722283b4a9bSStephen M. Cameron */ 4723283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4724283b4a9bSStephen M. Cameron struct CommandList *c) 4725283b4a9bSStephen M. Cameron { 4726283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4727283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4728283b4a9bSStephen M. Cameron 472945e596cdSDon Brace if (!dev) 473045e596cdSDon Brace return -1; 473145e596cdSDon Brace 473203383736SDon Brace c->phys_disk = dev; 473303383736SDon Brace 4734283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 473503383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4736283b4a9bSStephen M. Cameron } 4737283b4a9bSStephen M. Cameron 4738dd0e19f3SScott Teel /* 4739dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4740dd0e19f3SScott Teel */ 4741dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4742dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4743dd0e19f3SScott Teel { 4744dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4745dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4746dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4747dd0e19f3SScott Teel u64 first_block; 4748dd0e19f3SScott Teel 4749dd0e19f3SScott Teel /* Are we doing encryption on this device */ 47502b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4751dd0e19f3SScott Teel return; 4752dd0e19f3SScott Teel /* Set the data encryption key index. */ 4753dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4754dd0e19f3SScott Teel 4755dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4756dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4757dd0e19f3SScott Teel 4758dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4759dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4760dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4761dd0e19f3SScott Teel */ 4762dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4763dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4764dd0e19f3SScott Teel case READ_6: 4765abbada71SMahesh Rajashekhara case WRITE_6: 4766abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4767abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4768abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4769dd0e19f3SScott Teel break; 4770dd0e19f3SScott Teel case WRITE_10: 4771dd0e19f3SScott Teel case READ_10: 4772dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4773dd0e19f3SScott Teel case WRITE_12: 4774dd0e19f3SScott Teel case READ_12: 47752b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4776dd0e19f3SScott Teel break; 4777dd0e19f3SScott Teel case WRITE_16: 4778dd0e19f3SScott Teel case READ_16: 47792b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4780dd0e19f3SScott Teel break; 4781dd0e19f3SScott Teel default: 4782dd0e19f3SScott Teel dev_err(&h->pdev->dev, 47832b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 47842b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4785dd0e19f3SScott Teel BUG(); 4786dd0e19f3SScott Teel break; 4787dd0e19f3SScott Teel } 47882b08b3e9SDon Brace 47892b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47902b08b3e9SDon Brace first_block = first_block * 47912b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47922b08b3e9SDon Brace 47932b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47942b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4795dd0e19f3SScott Teel } 4796dd0e19f3SScott Teel 4797c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4798c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 479903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4800c349775eSScott Teel { 4801c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4802c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4803c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4804c349775eSScott Teel int use_sg, i; 4805c349775eSScott Teel struct scatterlist *sg; 4806c349775eSScott Teel u64 addr64; 4807c349775eSScott Teel u32 len; 4808c349775eSScott Teel u32 total_len = 0; 4809c349775eSScott Teel 481045e596cdSDon Brace if (!cmd->device) 481145e596cdSDon Brace return -1; 481245e596cdSDon Brace 481345e596cdSDon Brace if (!cmd->device->hostdata) 481445e596cdSDon Brace return -1; 481545e596cdSDon Brace 4816d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4817c349775eSScott Teel 481803383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 481903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4820c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 482103383736SDon Brace } 482203383736SDon Brace 4823c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4824c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4825c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4826c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4827c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4828c349775eSScott Teel 4829c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4830c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4831c349775eSScott Teel 4832c349775eSScott Teel use_sg = scsi_dma_map(cmd); 483303383736SDon Brace if (use_sg < 0) { 483403383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4835c349775eSScott Teel return use_sg; 483603383736SDon Brace } 4837c349775eSScott Teel 4838c349775eSScott Teel if (use_sg) { 4839c349775eSScott Teel curr_sg = cp->sg; 4840d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4841d9a729f3SWebb Scales addr64 = le64_to_cpu( 4842d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4843d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4844d9a729f3SWebb Scales curr_sg->length = 0; 4845d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4846d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4847d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4848d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4849d9a729f3SWebb Scales 4850d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4851d9a729f3SWebb Scales } 4852c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4853c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4854c349775eSScott Teel len = sg_dma_len(sg); 4855c349775eSScott Teel total_len += len; 4856c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4857c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4858c349775eSScott Teel curr_sg->reserved[0] = 0; 4859c349775eSScott Teel curr_sg->reserved[1] = 0; 4860c349775eSScott Teel curr_sg->reserved[2] = 0; 4861c349775eSScott Teel curr_sg->chain_indicator = 0; 4862c349775eSScott Teel curr_sg++; 4863c349775eSScott Teel } 4864c349775eSScott Teel 4865c349775eSScott Teel switch (cmd->sc_data_direction) { 4866c349775eSScott Teel case DMA_TO_DEVICE: 4867dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4868dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4869c349775eSScott Teel break; 4870c349775eSScott Teel case DMA_FROM_DEVICE: 4871dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4872dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4873c349775eSScott Teel break; 4874c349775eSScott Teel case DMA_NONE: 4875dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4876dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4877c349775eSScott Teel break; 4878c349775eSScott Teel default: 4879c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4880c349775eSScott Teel cmd->sc_data_direction); 4881c349775eSScott Teel BUG(); 4882c349775eSScott Teel break; 4883c349775eSScott Teel } 4884c349775eSScott Teel } else { 4885dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4886dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4887c349775eSScott Teel } 4888dd0e19f3SScott Teel 4889dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4890dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4891dd0e19f3SScott Teel 48922b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4893f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4894c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4895c349775eSScott Teel 4896c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4897c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4898c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 489950a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4900c349775eSScott Teel 4901d9a729f3SWebb Scales /* fill in sg elements */ 4902d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4903d9a729f3SWebb Scales cp->sg_count = 1; 4904a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4905d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4906d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4907d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4908d9a729f3SWebb Scales return -1; 4909d9a729f3SWebb Scales } 4910d9a729f3SWebb Scales } else 4911d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4912d9a729f3SWebb Scales 4913c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4914c349775eSScott Teel return 0; 4915c349775eSScott Teel } 4916c349775eSScott Teel 4917c349775eSScott Teel /* 4918c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4919c349775eSScott Teel */ 4920c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4921c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 492203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4923c349775eSScott Teel { 492445e596cdSDon Brace if (!c->scsi_cmd->device) 492545e596cdSDon Brace return -1; 492645e596cdSDon Brace 492745e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 492845e596cdSDon Brace return -1; 492945e596cdSDon Brace 493003383736SDon Brace /* Try to honor the device's queue depth */ 493103383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 493203383736SDon Brace phys_disk->queue_depth) { 493303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 493403383736SDon Brace return IO_ACCEL_INELIGIBLE; 493503383736SDon Brace } 4936c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4937c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 493803383736SDon Brace cdb, cdb_len, scsi3addr, 493903383736SDon Brace phys_disk); 4940c349775eSScott Teel else 4941c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 494203383736SDon Brace cdb, cdb_len, scsi3addr, 494303383736SDon Brace phys_disk); 4944c349775eSScott Teel } 4945c349775eSScott Teel 49466b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 49476b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 49486b80b18fSScott Teel { 49496b80b18fSScott Teel if (offload_to_mirror == 0) { 49506b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 49512b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49526b80b18fSScott Teel return; 49536b80b18fSScott Teel } 49546b80b18fSScott Teel do { 49556b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 49562b08b3e9SDon Brace *current_group = *map_index / 49572b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49586b80b18fSScott Teel if (offload_to_mirror == *current_group) 49596b80b18fSScott Teel continue; 49602b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 49616b80b18fSScott Teel /* select map index from next group */ 49622b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 49636b80b18fSScott Teel (*current_group)++; 49646b80b18fSScott Teel } else { 49656b80b18fSScott Teel /* select map index from first group */ 49662b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49676b80b18fSScott Teel *current_group = 0; 49686b80b18fSScott Teel } 49696b80b18fSScott Teel } while (offload_to_mirror != *current_group); 49706b80b18fSScott Teel } 49716b80b18fSScott Teel 4972283b4a9bSStephen M. Cameron /* 4973283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4974283b4a9bSStephen M. Cameron */ 4975283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4976283b4a9bSStephen M. Cameron struct CommandList *c) 4977283b4a9bSStephen M. Cameron { 4978283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4979283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4980283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4981283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4982283b4a9bSStephen M. Cameron int is_write = 0; 4983283b4a9bSStephen M. Cameron u32 map_index; 4984283b4a9bSStephen M. Cameron u64 first_block, last_block; 4985283b4a9bSStephen M. Cameron u32 block_cnt; 4986283b4a9bSStephen M. Cameron u32 blocks_per_row; 4987283b4a9bSStephen M. Cameron u64 first_row, last_row; 4988283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4989283b4a9bSStephen M. Cameron u32 first_column, last_column; 49906b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49916b80b18fSScott Teel u32 r5or6_blocks_per_row; 49926b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49936b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49946b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 49956b80b18fSScott Teel u32 total_disks_per_row; 49966b80b18fSScott Teel u32 stripesize; 49976b80b18fSScott Teel u32 first_group, last_group, current_group; 4998283b4a9bSStephen M. Cameron u32 map_row; 4999283b4a9bSStephen M. Cameron u32 disk_handle; 5000283b4a9bSStephen M. Cameron u64 disk_block; 5001283b4a9bSStephen M. Cameron u32 disk_block_cnt; 5002283b4a9bSStephen M. Cameron u8 cdb[16]; 5003283b4a9bSStephen M. Cameron u8 cdb_len; 50042b08b3e9SDon Brace u16 strip_size; 5005283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5006283b4a9bSStephen M. Cameron u64 tmpdiv; 5007283b4a9bSStephen M. Cameron #endif 50086b80b18fSScott Teel int offload_to_mirror; 5009283b4a9bSStephen M. Cameron 501045e596cdSDon Brace if (!dev) 501145e596cdSDon Brace return -1; 501245e596cdSDon Brace 5013283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 5014283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 5015283b4a9bSStephen M. Cameron case WRITE_6: 5016283b4a9bSStephen M. Cameron is_write = 1; 5017283b4a9bSStephen M. Cameron case READ_6: 5018abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5019abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5020abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5021283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 50223fa89a04SStephen M. Cameron if (block_cnt == 0) 50233fa89a04SStephen M. Cameron block_cnt = 256; 5024283b4a9bSStephen M. Cameron break; 5025283b4a9bSStephen M. Cameron case WRITE_10: 5026283b4a9bSStephen M. Cameron is_write = 1; 5027283b4a9bSStephen M. Cameron case READ_10: 5028283b4a9bSStephen M. Cameron first_block = 5029283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5030283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5031283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5032283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5033283b4a9bSStephen M. Cameron block_cnt = 5034283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5035283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5036283b4a9bSStephen M. Cameron break; 5037283b4a9bSStephen M. Cameron case WRITE_12: 5038283b4a9bSStephen M. Cameron is_write = 1; 5039283b4a9bSStephen M. Cameron case READ_12: 5040283b4a9bSStephen M. Cameron first_block = 5041283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5042283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5043283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5044283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5045283b4a9bSStephen M. Cameron block_cnt = 5046283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5047283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5048283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5049283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5050283b4a9bSStephen M. Cameron break; 5051283b4a9bSStephen M. Cameron case WRITE_16: 5052283b4a9bSStephen M. Cameron is_write = 1; 5053283b4a9bSStephen M. Cameron case READ_16: 5054283b4a9bSStephen M. Cameron first_block = 5055283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5056283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5057283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5058283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5059283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5060283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5061283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5062283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5063283b4a9bSStephen M. Cameron block_cnt = 5064283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5065283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5066283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5067283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5068283b4a9bSStephen M. Cameron break; 5069283b4a9bSStephen M. Cameron default: 5070283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5071283b4a9bSStephen M. Cameron } 5072283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5073283b4a9bSStephen M. Cameron 5074283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5075283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5076283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5077283b4a9bSStephen M. Cameron 5078283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 50792b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50802b08b3e9SDon Brace last_block < first_block) 5081283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5082283b4a9bSStephen M. Cameron 5083283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50842b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50852b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50862b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5087283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5088283b4a9bSStephen M. Cameron tmpdiv = first_block; 5089283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5090283b4a9bSStephen M. Cameron first_row = tmpdiv; 5091283b4a9bSStephen M. Cameron tmpdiv = last_block; 5092283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5093283b4a9bSStephen M. Cameron last_row = tmpdiv; 5094283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5095283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5096283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 50972b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5098283b4a9bSStephen M. Cameron first_column = tmpdiv; 5099283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 51002b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5101283b4a9bSStephen M. Cameron last_column = tmpdiv; 5102283b4a9bSStephen M. Cameron #else 5103283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5104283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5105283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5106283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 51072b08b3e9SDon Brace first_column = first_row_offset / strip_size; 51082b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5109283b4a9bSStephen M. Cameron #endif 5110283b4a9bSStephen M. Cameron 5111283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5112283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5113283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5114283b4a9bSStephen M. Cameron 5115283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 51162b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 51172b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5118283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51192b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51206b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 51216b80b18fSScott Teel 51226b80b18fSScott Teel switch (dev->raid_level) { 51236b80b18fSScott Teel case HPSA_RAID_0: 51246b80b18fSScott Teel break; /* nothing special to do */ 51256b80b18fSScott Teel case HPSA_RAID_1: 51266b80b18fSScott Teel /* Handles load balance across RAID 1 members. 51276b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 51286b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5129283b4a9bSStephen M. Cameron */ 51302b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5131283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 51322b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5133283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 51346b80b18fSScott Teel break; 51356b80b18fSScott Teel case HPSA_RAID_ADM: 51366b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 51376b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 51386b80b18fSScott Teel */ 51392b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 51406b80b18fSScott Teel 51416b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 51426b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 51436b80b18fSScott Teel &map_index, ¤t_group); 51446b80b18fSScott Teel /* set mirror group to use next time */ 51456b80b18fSScott Teel offload_to_mirror = 51462b08b3e9SDon Brace (offload_to_mirror >= 51472b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 51486b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 51496b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 51506b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 51516b80b18fSScott Teel * function since multiple threads might simultaneously 51526b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 51536b80b18fSScott Teel */ 51546b80b18fSScott Teel break; 51556b80b18fSScott Teel case HPSA_RAID_5: 51566b80b18fSScott Teel case HPSA_RAID_6: 51572b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 51586b80b18fSScott Teel break; 51596b80b18fSScott Teel 51606b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 51616b80b18fSScott Teel r5or6_blocks_per_row = 51622b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 51632b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 51646b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 51652b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 51662b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 51676b80b18fSScott Teel #if BITS_PER_LONG == 32 51686b80b18fSScott Teel tmpdiv = first_block; 51696b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 51706b80b18fSScott Teel tmpdiv = first_group; 51716b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51726b80b18fSScott Teel first_group = tmpdiv; 51736b80b18fSScott Teel tmpdiv = last_block; 51746b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 51756b80b18fSScott Teel tmpdiv = last_group; 51766b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51776b80b18fSScott Teel last_group = tmpdiv; 51786b80b18fSScott Teel #else 51796b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51806b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51816b80b18fSScott Teel #endif 5182000ff7c2SStephen M. Cameron if (first_group != last_group) 51836b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51846b80b18fSScott Teel 51856b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51866b80b18fSScott Teel #if BITS_PER_LONG == 32 51876b80b18fSScott Teel tmpdiv = first_block; 51886b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51896b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51906b80b18fSScott Teel tmpdiv = last_block; 51916b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51926b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51936b80b18fSScott Teel #else 51946b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 51956b80b18fSScott Teel first_block / stripesize; 51966b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 51976b80b18fSScott Teel #endif 51986b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 51996b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52006b80b18fSScott Teel 52016b80b18fSScott Teel 52026b80b18fSScott Teel /* Verify request is in a single column */ 52036b80b18fSScott Teel #if BITS_PER_LONG == 32 52046b80b18fSScott Teel tmpdiv = first_block; 52056b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 52066b80b18fSScott Teel tmpdiv = first_row_offset; 52076b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 52086b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 52096b80b18fSScott Teel tmpdiv = last_block; 52106b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 52116b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52126b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 52136b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 52146b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52156b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 52166b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52176b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52186b80b18fSScott Teel r5or6_last_column = tmpdiv; 52196b80b18fSScott Teel #else 52206b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 52216b80b18fSScott Teel (u32)((first_block % stripesize) % 52226b80b18fSScott Teel r5or6_blocks_per_row); 52236b80b18fSScott Teel 52246b80b18fSScott Teel r5or6_last_row_offset = 52256b80b18fSScott Teel (u32)((last_block % stripesize) % 52266b80b18fSScott Teel r5or6_blocks_per_row); 52276b80b18fSScott Teel 52286b80b18fSScott Teel first_column = r5or6_first_column = 52292b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 52306b80b18fSScott Teel r5or6_last_column = 52312b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 52326b80b18fSScott Teel #endif 52336b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 52346b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52356b80b18fSScott Teel 52366b80b18fSScott Teel /* Request is eligible */ 52376b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52382b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52396b80b18fSScott Teel 52406b80b18fSScott Teel map_index = (first_group * 52412b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 52426b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 52436b80b18fSScott Teel break; 52446b80b18fSScott Teel default: 52456b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5246283b4a9bSStephen M. Cameron } 52476b80b18fSScott Teel 524807543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 524907543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 525007543e0cSStephen Cameron 525103383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5252c3390df4SDon Brace if (!c->phys_disk) 5253c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 525403383736SDon Brace 5255283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 52562b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 52572b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 52582b08b3e9SDon Brace (first_row_offset - first_column * 52592b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5260283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5261283b4a9bSStephen M. Cameron 5262283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5263283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5264283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5265283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5266283b4a9bSStephen M. Cameron } 5267283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5268283b4a9bSStephen M. Cameron 5269283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5270283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5271283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5272283b4a9bSStephen M. Cameron cdb[1] = 0; 5273283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5274283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5275283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5276283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5277283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5278283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5279283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5280283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5281283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5282283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5283283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5284283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5285283b4a9bSStephen M. Cameron cdb[14] = 0; 5286283b4a9bSStephen M. Cameron cdb[15] = 0; 5287283b4a9bSStephen M. Cameron cdb_len = 16; 5288283b4a9bSStephen M. Cameron } else { 5289283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5290283b4a9bSStephen M. Cameron cdb[1] = 0; 5291283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5292283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5293283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5294283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5295283b4a9bSStephen M. Cameron cdb[6] = 0; 5296283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5297283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5298283b4a9bSStephen M. Cameron cdb[9] = 0; 5299283b4a9bSStephen M. Cameron cdb_len = 10; 5300283b4a9bSStephen M. Cameron } 5301283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 530203383736SDon Brace dev->scsi3addr, 530303383736SDon Brace dev->phys_disk[map_index]); 5304283b4a9bSStephen M. Cameron } 5305283b4a9bSStephen M. Cameron 530625163bd5SWebb Scales /* 530725163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 530825163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 530925163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 531025163bd5SWebb Scales */ 5311574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5312574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5313574f05d3SStephen Cameron unsigned char scsi3addr[]) 5314edd16368SStephen M. Cameron { 5315edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5316edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5317edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5318edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5319edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5320f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5321edd16368SStephen M. Cameron 5322edd16368SStephen M. Cameron /* Fill in the request block... */ 5323edd16368SStephen M. Cameron 5324edd16368SStephen M. Cameron c->Request.Timeout = 0; 5325edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5326edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5327edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5328edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5329edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5330a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5331a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5332edd16368SStephen M. Cameron break; 5333edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5334a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5335a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5336edd16368SStephen M. Cameron break; 5337edd16368SStephen M. Cameron case DMA_NONE: 5338a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5339a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5340edd16368SStephen M. Cameron break; 5341edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5342edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5343edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5344edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5345edd16368SStephen M. Cameron */ 5346edd16368SStephen M. Cameron 5347a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5348a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5349edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5350edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5351edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5352edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5353edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5354edd16368SStephen M. Cameron * our purposes here. 5355edd16368SStephen M. Cameron */ 5356edd16368SStephen M. Cameron 5357edd16368SStephen M. Cameron break; 5358edd16368SStephen M. Cameron 5359edd16368SStephen M. Cameron default: 5360edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5361edd16368SStephen M. Cameron cmd->sc_data_direction); 5362edd16368SStephen M. Cameron BUG(); 5363edd16368SStephen M. Cameron break; 5364edd16368SStephen M. Cameron } 5365edd16368SStephen M. Cameron 536633a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 536773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5368edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5369edd16368SStephen M. Cameron } 5370edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5371edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5372edd16368SStephen M. Cameron return 0; 5373edd16368SStephen M. Cameron } 5374edd16368SStephen M. Cameron 5375360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5376360c73bdSStephen Cameron struct CommandList *c) 5377360c73bdSStephen Cameron { 5378360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5379360c73bdSStephen Cameron 5380360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5381360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5382360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5383360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5384360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5385360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5386360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5387360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5388360c73bdSStephen Cameron c->cmdindex = index; 5389360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5390360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5391360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5392360c73bdSStephen Cameron c->h = h; 5393a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5394360c73bdSStephen Cameron } 5395360c73bdSStephen Cameron 5396360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5397360c73bdSStephen Cameron { 5398360c73bdSStephen Cameron int i; 5399360c73bdSStephen Cameron 5400360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5401360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5402360c73bdSStephen Cameron 5403360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5404360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5405360c73bdSStephen Cameron } 5406360c73bdSStephen Cameron } 5407360c73bdSStephen Cameron 5408360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5409360c73bdSStephen Cameron struct CommandList *c) 5410360c73bdSStephen Cameron { 5411360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5412360c73bdSStephen Cameron 541373153fe5SWebb Scales BUG_ON(c->cmdindex != index); 541473153fe5SWebb Scales 5415360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5416360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5417360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5418360c73bdSStephen Cameron } 5419360c73bdSStephen Cameron 5420592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5421592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5422592a0ad5SWebb Scales unsigned char *scsi3addr) 5423592a0ad5SWebb Scales { 5424592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5425592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5426592a0ad5SWebb Scales 542745e596cdSDon Brace if (!dev) 542845e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 542945e596cdSDon Brace 5430592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5431592a0ad5SWebb Scales 5432592a0ad5SWebb Scales if (dev->offload_enabled) { 5433592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5434592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5435592a0ad5SWebb Scales c->scsi_cmd = cmd; 5436592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5437592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5438592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5439a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5440592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5441592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5442592a0ad5SWebb Scales c->scsi_cmd = cmd; 5443592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5444592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5445592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5446592a0ad5SWebb Scales } 5447592a0ad5SWebb Scales return rc; 5448592a0ad5SWebb Scales } 5449592a0ad5SWebb Scales 5450080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5451080ef1ccSDon Brace { 5452080ef1ccSDon Brace struct scsi_cmnd *cmd; 5453080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 54548a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5455080ef1ccSDon Brace 5456080ef1ccSDon Brace cmd = c->scsi_cmd; 5457080ef1ccSDon Brace dev = cmd->device->hostdata; 5458080ef1ccSDon Brace if (!dev) { 5459080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 54608a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5461080ef1ccSDon Brace } 5462d604f533SWebb Scales if (c->reset_pending) 5463d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5464a58e7e53SWebb Scales if (c->abort_pending) 5465a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5466592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5467592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5468592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5469592a0ad5SWebb Scales int rc; 5470592a0ad5SWebb Scales 5471592a0ad5SWebb Scales if (c2->error_data.serv_response == 5472592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5473592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5474592a0ad5SWebb Scales if (rc == 0) 5475592a0ad5SWebb Scales return; 5476592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5477592a0ad5SWebb Scales /* 5478592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5479592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5480592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5481592a0ad5SWebb Scales */ 5482592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54838a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5484592a0ad5SWebb Scales } 5485592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5486592a0ad5SWebb Scales } 5487592a0ad5SWebb Scales } 5488360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5489080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5490080ef1ccSDon Brace /* 5491080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5492080ef1ccSDon Brace * again via scsi mid layer, which will then get 5493080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5494592a0ad5SWebb Scales * 5495592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5496592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5497080ef1ccSDon Brace */ 5498080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5499080ef1ccSDon Brace cmd->scsi_done(cmd); 5500080ef1ccSDon Brace } 5501080ef1ccSDon Brace } 5502080ef1ccSDon Brace 5503574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5504574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5505574f05d3SStephen Cameron { 5506574f05d3SStephen Cameron struct ctlr_info *h; 5507574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5508574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5509574f05d3SStephen Cameron struct CommandList *c; 5510574f05d3SStephen Cameron int rc = 0; 5511574f05d3SStephen Cameron 5512574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5513574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 551473153fe5SWebb Scales 551573153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 551673153fe5SWebb Scales 5517574f05d3SStephen Cameron dev = cmd->device->hostdata; 5518574f05d3SStephen Cameron if (!dev) { 55191ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5520ba74fdc4SDon Brace cmd->scsi_done(cmd); 5521ba74fdc4SDon Brace return 0; 5522ba74fdc4SDon Brace } 5523ba74fdc4SDon Brace 5524ba74fdc4SDon Brace if (dev->removed) { 5525574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5526574f05d3SStephen Cameron cmd->scsi_done(cmd); 5527574f05d3SStephen Cameron return 0; 5528574f05d3SStephen Cameron } 552973153fe5SWebb Scales 5530574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5531574f05d3SStephen Cameron 5532574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 553325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5534574f05d3SStephen Cameron cmd->scsi_done(cmd); 5535574f05d3SStephen Cameron return 0; 5536574f05d3SStephen Cameron } 553773153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5538574f05d3SStephen Cameron 5539407863cbSStephen Cameron /* 5540407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5541574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5542574f05d3SStephen Cameron */ 5543574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5544574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5545574f05d3SStephen Cameron h->acciopath_status)) { 5546592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5547574f05d3SStephen Cameron if (rc == 0) 5548592a0ad5SWebb Scales return 0; 5549592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 555073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5551574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5552574f05d3SStephen Cameron } 5553574f05d3SStephen Cameron } 5554574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5555574f05d3SStephen Cameron } 5556574f05d3SStephen Cameron 55578ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 55585f389360SStephen M. Cameron { 55595f389360SStephen M. Cameron unsigned long flags; 55605f389360SStephen M. Cameron 55615f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 55625f389360SStephen M. Cameron h->scan_finished = 1; 55635f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 55645f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 55655f389360SStephen M. Cameron } 55665f389360SStephen M. Cameron 5567a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5568a08a8471SStephen M. Cameron { 5569a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5570a08a8471SStephen M. Cameron unsigned long flags; 5571a08a8471SStephen M. Cameron 55728ebc9248SWebb Scales /* 55738ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 55748ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 55758ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 55768ebc9248SWebb Scales * piling up on a locked up controller. 55778ebc9248SWebb Scales */ 55788ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55798ebc9248SWebb Scales return hpsa_scan_complete(h); 55805f389360SStephen M. Cameron 5581a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5582a08a8471SStephen M. Cameron while (1) { 5583a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5584a08a8471SStephen M. Cameron if (h->scan_finished) 5585a08a8471SStephen M. Cameron break; 5586a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5587a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5588a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5589a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5590a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5591a08a8471SStephen M. Cameron * happen if we're in here. 5592a08a8471SStephen M. Cameron */ 5593a08a8471SStephen M. Cameron } 5594a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5595a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5596a08a8471SStephen M. Cameron 55978ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55988ebc9248SWebb Scales return hpsa_scan_complete(h); 55995f389360SStephen M. Cameron 5600bfd7546cSDon Brace /* 5601bfd7546cSDon Brace * Do the scan after a reset completion 5602bfd7546cSDon Brace */ 5603bfd7546cSDon Brace if (h->reset_in_progress) { 5604bfd7546cSDon Brace h->drv_req_rescan = 1; 5605bfd7546cSDon Brace return; 5606bfd7546cSDon Brace } 5607bfd7546cSDon Brace 56088aa60681SDon Brace hpsa_update_scsi_devices(h); 5609a08a8471SStephen M. Cameron 56108ebc9248SWebb Scales hpsa_scan_complete(h); 5611a08a8471SStephen M. Cameron } 5612a08a8471SStephen M. Cameron 56137c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 56147c0a0229SDon Brace { 561503383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 561603383736SDon Brace 561703383736SDon Brace if (!logical_drive) 561803383736SDon Brace return -ENODEV; 56197c0a0229SDon Brace 56207c0a0229SDon Brace if (qdepth < 1) 56217c0a0229SDon Brace qdepth = 1; 562203383736SDon Brace else if (qdepth > logical_drive->queue_depth) 562303383736SDon Brace qdepth = logical_drive->queue_depth; 562403383736SDon Brace 562503383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 56267c0a0229SDon Brace } 56277c0a0229SDon Brace 5628a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5629a08a8471SStephen M. Cameron unsigned long elapsed_time) 5630a08a8471SStephen M. Cameron { 5631a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5632a08a8471SStephen M. Cameron unsigned long flags; 5633a08a8471SStephen M. Cameron int finished; 5634a08a8471SStephen M. Cameron 5635a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5636a08a8471SStephen M. Cameron finished = h->scan_finished; 5637a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5638a08a8471SStephen M. Cameron return finished; 5639a08a8471SStephen M. Cameron } 5640a08a8471SStephen M. Cameron 56412946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5642edd16368SStephen M. Cameron { 5643b705690dSStephen M. Cameron struct Scsi_Host *sh; 5644edd16368SStephen M. Cameron 5645b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 56462946e82bSRobert Elliott if (sh == NULL) { 56472946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 56482946e82bSRobert Elliott return -ENOMEM; 56492946e82bSRobert Elliott } 5650b705690dSStephen M. Cameron 5651b705690dSStephen M. Cameron sh->io_port = 0; 5652b705690dSStephen M. Cameron sh->n_io_port = 0; 5653b705690dSStephen M. Cameron sh->this_id = -1; 5654b705690dSStephen M. Cameron sh->max_channel = 3; 5655b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5656b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5657b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 565841ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5659d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5660b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5661d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5662b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5663bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5664b705690dSStephen M. Cameron sh->unique_id = sh->irq; 566564d513acSChristoph Hellwig 56662946e82bSRobert Elliott h->scsi_host = sh; 56672946e82bSRobert Elliott return 0; 56682946e82bSRobert Elliott } 56692946e82bSRobert Elliott 56702946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 56712946e82bSRobert Elliott { 56722946e82bSRobert Elliott int rv; 56732946e82bSRobert Elliott 56742946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 56752946e82bSRobert Elliott if (rv) { 56762946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 56772946e82bSRobert Elliott return rv; 56782946e82bSRobert Elliott } 56792946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 56802946e82bSRobert Elliott return 0; 5681edd16368SStephen M. Cameron } 5682edd16368SStephen M. Cameron 5683b69324ffSWebb Scales /* 568473153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 568573153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 568673153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 568773153fe5SWebb Scales * low-numbered entries for our own uses.) 568873153fe5SWebb Scales */ 568973153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 569073153fe5SWebb Scales { 569173153fe5SWebb Scales int idx = scmd->request->tag; 569273153fe5SWebb Scales 569373153fe5SWebb Scales if (idx < 0) 569473153fe5SWebb Scales return idx; 569573153fe5SWebb Scales 569673153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 569773153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 569873153fe5SWebb Scales } 569973153fe5SWebb Scales 570073153fe5SWebb Scales /* 5701b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5702b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5703b69324ffSWebb Scales */ 5704b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5705b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5706b69324ffSWebb Scales int reply_queue) 5707edd16368SStephen M. Cameron { 57088919358eSTomas Henzl int rc; 5709edd16368SStephen M. Cameron 5710a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5711a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5712a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5713c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 571425163bd5SWebb Scales if (rc) 5715b69324ffSWebb Scales return rc; 5716edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5717edd16368SStephen M. Cameron 5718b69324ffSWebb Scales /* Check if the unit is already ready. */ 5719edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5720b69324ffSWebb Scales return 0; 5721edd16368SStephen M. Cameron 5722b69324ffSWebb Scales /* 5723b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5724b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5725b69324ffSWebb Scales * looking for (but, success is good too). 5726b69324ffSWebb Scales */ 5727edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5728edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5729edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5730edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5731b69324ffSWebb Scales return 0; 5732b69324ffSWebb Scales 5733b69324ffSWebb Scales return 1; 5734b69324ffSWebb Scales } 5735b69324ffSWebb Scales 5736b69324ffSWebb Scales /* 5737b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5738b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5739b69324ffSWebb Scales */ 5740b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5741b69324ffSWebb Scales struct CommandList *c, 5742b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5743b69324ffSWebb Scales { 5744b69324ffSWebb Scales int rc; 5745b69324ffSWebb Scales int count = 0; 5746b69324ffSWebb Scales int waittime = 1; /* seconds */ 5747b69324ffSWebb Scales 5748b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5749b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5750b69324ffSWebb Scales 5751b69324ffSWebb Scales /* 5752b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5753b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5754b69324ffSWebb Scales */ 5755b69324ffSWebb Scales msleep(1000 * waittime); 5756b69324ffSWebb Scales 5757b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5758b69324ffSWebb Scales if (!rc) 5759edd16368SStephen M. Cameron break; 5760b69324ffSWebb Scales 5761b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5762b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5763b69324ffSWebb Scales waittime *= 2; 5764b69324ffSWebb Scales 5765b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5766b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5767b69324ffSWebb Scales waittime); 5768b69324ffSWebb Scales } 5769b69324ffSWebb Scales 5770b69324ffSWebb Scales return rc; 5771b69324ffSWebb Scales } 5772b69324ffSWebb Scales 5773b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5774b69324ffSWebb Scales unsigned char lunaddr[], 5775b69324ffSWebb Scales int reply_queue) 5776b69324ffSWebb Scales { 5777b69324ffSWebb Scales int first_queue; 5778b69324ffSWebb Scales int last_queue; 5779b69324ffSWebb Scales int rq; 5780b69324ffSWebb Scales int rc = 0; 5781b69324ffSWebb Scales struct CommandList *c; 5782b69324ffSWebb Scales 5783b69324ffSWebb Scales c = cmd_alloc(h); 5784b69324ffSWebb Scales 5785b69324ffSWebb Scales /* 5786b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5787b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5788b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5789b69324ffSWebb Scales */ 5790b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5791b69324ffSWebb Scales first_queue = 0; 5792b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5793b69324ffSWebb Scales } else { 5794b69324ffSWebb Scales first_queue = reply_queue; 5795b69324ffSWebb Scales last_queue = reply_queue; 5796b69324ffSWebb Scales } 5797b69324ffSWebb Scales 5798b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5799b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5800b69324ffSWebb Scales if (rc) 5801b69324ffSWebb Scales break; 5802edd16368SStephen M. Cameron } 5803edd16368SStephen M. Cameron 5804edd16368SStephen M. Cameron if (rc) 5805edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5806edd16368SStephen M. Cameron else 5807edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5808edd16368SStephen M. Cameron 580945fcb86eSStephen Cameron cmd_free(h, c); 5810edd16368SStephen M. Cameron return rc; 5811edd16368SStephen M. Cameron } 5812edd16368SStephen M. Cameron 5813edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5814edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5815edd16368SStephen M. Cameron */ 5816edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5817edd16368SStephen M. Cameron { 5818edd16368SStephen M. Cameron int rc; 5819edd16368SStephen M. Cameron struct ctlr_info *h; 5820edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 58210b9b7b6eSScott Teel u8 reset_type; 58222dc127bbSDan Carpenter char msg[48]; 5823edd16368SStephen M. Cameron 5824edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5825edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5826edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5827edd16368SStephen M. Cameron return FAILED; 5828e345893bSDon Brace 5829e345893bSDon Brace if (lockup_detected(h)) 5830e345893bSDon Brace return FAILED; 5831e345893bSDon Brace 5832edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5833edd16368SStephen M. Cameron if (!dev) { 5834d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5835edd16368SStephen M. Cameron return FAILED; 5836edd16368SStephen M. Cameron } 583725163bd5SWebb Scales 583825163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 583925163bd5SWebb Scales if (lockup_detected(h)) { 58402dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58412dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 584273153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 584373153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 584425163bd5SWebb Scales return FAILED; 584525163bd5SWebb Scales } 584625163bd5SWebb Scales 584725163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 584825163bd5SWebb Scales if (detect_controller_lockup(h)) { 58492dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58502dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 585173153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 585273153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 585325163bd5SWebb Scales return FAILED; 585425163bd5SWebb Scales } 585525163bd5SWebb Scales 5856d604f533SWebb Scales /* Do not attempt on controller */ 5857d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5858d604f533SWebb Scales return SUCCESS; 5859d604f533SWebb Scales 58600b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 58610b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 58620b9b7b6eSScott Teel else 58630b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 58640b9b7b6eSScott Teel 58650b9b7b6eSScott Teel sprintf(msg, "resetting %s", 58660b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 58670b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 586825163bd5SWebb Scales 5869da03ded0SDon Brace h->reset_in_progress = 1; 5870d416b0c7SStephen M. Cameron 5871edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 58720b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 587325163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 58740b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 58750b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 58762dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5877d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5878da03ded0SDon Brace h->reset_in_progress = 0; 5879d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5880edd16368SStephen M. Cameron } 5881edd16368SStephen M. Cameron 58826cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 58836cba3f19SStephen M. Cameron { 58846cba3f19SStephen M. Cameron u8 original_tag[8]; 58856cba3f19SStephen M. Cameron 58866cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 58876cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 58886cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 58896cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 58906cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 58916cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 58926cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 58936cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 58946cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 58956cba3f19SStephen M. Cameron } 58966cba3f19SStephen M. Cameron 589717eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 58982b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 589917eb87d2SScott Teel { 59002b08b3e9SDon Brace u64 tag; 590117eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 590217eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 590317eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 59042b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 59052b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59062b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 590754b6e9e9SScott Teel return; 590854b6e9e9SScott Teel } 590954b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 591054b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 591154b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5912dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5913dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5914dd0e19f3SScott Teel *taglower = cm2->Tag; 591554b6e9e9SScott Teel return; 591654b6e9e9SScott Teel } 59172b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 59182b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59192b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 592017eb87d2SScott Teel } 592154b6e9e9SScott Teel 592275167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 59239b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 592475167d2cSStephen M. Cameron { 592575167d2cSStephen M. Cameron int rc = IO_OK; 592675167d2cSStephen M. Cameron struct CommandList *c; 592775167d2cSStephen M. Cameron struct ErrorInfo *ei; 59282b08b3e9SDon Brace __le32 tagupper, taglower; 592975167d2cSStephen M. Cameron 593045fcb86eSStephen Cameron c = cmd_alloc(h); 593175167d2cSStephen M. Cameron 5932a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 59339b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5934a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 59359b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 59366cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5937c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 593817eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 593925163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 594017eb87d2SScott Teel __func__, tagupper, taglower); 594175167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 594275167d2cSStephen M. Cameron 594375167d2cSStephen M. Cameron ei = c->err_info; 594475167d2cSStephen M. Cameron switch (ei->CommandStatus) { 594575167d2cSStephen M. Cameron case CMD_SUCCESS: 594675167d2cSStephen M. Cameron break; 59479437ac43SStephen Cameron case CMD_TMF_STATUS: 59489437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 59499437ac43SStephen Cameron break; 595075167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 595175167d2cSStephen M. Cameron rc = -1; 595275167d2cSStephen M. Cameron break; 595375167d2cSStephen M. Cameron default: 595475167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 595517eb87d2SScott Teel __func__, tagupper, taglower); 5956d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 595775167d2cSStephen M. Cameron rc = -1; 595875167d2cSStephen M. Cameron break; 595975167d2cSStephen M. Cameron } 596045fcb86eSStephen Cameron cmd_free(h, c); 5961dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5962dd0e19f3SScott Teel __func__, tagupper, taglower); 596375167d2cSStephen M. Cameron return rc; 596475167d2cSStephen M. Cameron } 596575167d2cSStephen M. Cameron 59668be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 59678be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 59688be986ccSStephen Cameron { 59698be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 59708be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 59718be986ccSStephen Cameron struct io_accel2_cmd *c2a = 59728be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5973a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 59748be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 59758be986ccSStephen Cameron 597645e596cdSDon Brace if (!dev) 597745e596cdSDon Brace return; 597845e596cdSDon Brace 59798be986ccSStephen Cameron /* 59808be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 59818be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 59828be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 59838be986ccSStephen Cameron */ 59848be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 59858be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 59868be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 59878be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 59888be986ccSStephen Cameron sizeof(ac->error_len)); 59898be986ccSStephen Cameron 59908be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5991a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5992a58e7e53SWebb Scales 59938be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 59948be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 59958be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 59968be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 59978be986ccSStephen Cameron 59988be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 59998be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 60008be986ccSStephen Cameron ac->reply_queue = reply_queue; 60018be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 60028be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 60038be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 60048be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 60058be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 60068be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 60078be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 60088be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 60098be986ccSStephen Cameron } 60108be986ccSStephen Cameron 601154b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 601254b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 601354b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 601454b6e9e9SScott Teel * Return 0 on success (IO_OK) 601554b6e9e9SScott Teel * -1 on failure 601654b6e9e9SScott Teel */ 601754b6e9e9SScott Teel 601854b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 601925163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 602054b6e9e9SScott Teel { 602154b6e9e9SScott Teel int rc = IO_OK; 602254b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 602354b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 602454b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 602554b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 602654b6e9e9SScott Teel 602754b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 60287fa3030cSStephen Cameron scmd = abort->scsi_cmd; 602954b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 603054b6e9e9SScott Teel if (dev == NULL) { 603154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 603254b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 603354b6e9e9SScott Teel return -1; /* not abortable */ 603454b6e9e9SScott Teel } 603554b6e9e9SScott Teel 60362ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60372ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 6038609a70dfSRasmus Villemoes "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 60392ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6040609a70dfSRasmus Villemoes "Reset as abort", scsi3addr); 60412ba8bfc8SStephen M. Cameron 604254b6e9e9SScott Teel if (!dev->offload_enabled) { 604354b6e9e9SScott Teel dev_warn(&h->pdev->dev, 604454b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 604554b6e9e9SScott Teel return -1; /* not abortable */ 604654b6e9e9SScott Teel } 604754b6e9e9SScott Teel 604854b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 604954b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 605054b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 605154b6e9e9SScott Teel return -1; /* not abortable */ 605254b6e9e9SScott Teel } 605354b6e9e9SScott Teel 605454b6e9e9SScott Teel /* send the reset */ 60552ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60562ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 6057609a70dfSRasmus Villemoes "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6058609a70dfSRasmus Villemoes psa); 6059b32ece0fSDon Brace rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 606054b6e9e9SScott Teel if (rc != 0) { 606154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 6062609a70dfSRasmus Villemoes "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6063609a70dfSRasmus Villemoes psa); 606454b6e9e9SScott Teel return rc; /* failed to reset */ 606554b6e9e9SScott Teel } 606654b6e9e9SScott Teel 606754b6e9e9SScott Teel /* wait for device to recover */ 6068b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 606954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 6070609a70dfSRasmus Villemoes "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6071609a70dfSRasmus Villemoes psa); 607254b6e9e9SScott Teel return -1; /* failed to recover */ 607354b6e9e9SScott Teel } 607454b6e9e9SScott Teel 607554b6e9e9SScott Teel /* device recovered */ 607654b6e9e9SScott Teel dev_info(&h->pdev->dev, 6077609a70dfSRasmus Villemoes "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6078609a70dfSRasmus Villemoes psa); 607954b6e9e9SScott Teel 608054b6e9e9SScott Teel return rc; /* success */ 608154b6e9e9SScott Teel } 608254b6e9e9SScott Teel 60838be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 60848be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 60858be986ccSStephen Cameron { 60868be986ccSStephen Cameron int rc = IO_OK; 60878be986ccSStephen Cameron struct CommandList *c; 60888be986ccSStephen Cameron __le32 taglower, tagupper; 60898be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 60908be986ccSStephen Cameron struct io_accel2_cmd *c2; 60918be986ccSStephen Cameron 60928be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 609345e596cdSDon Brace if (!dev) 609445e596cdSDon Brace return -1; 609545e596cdSDon Brace 60968be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 60978be986ccSStephen Cameron return -1; 60988be986ccSStephen Cameron 60998be986ccSStephen Cameron c = cmd_alloc(h); 61008be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 61018be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6102c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 61038be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 61048be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61058be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 61068be986ccSStephen Cameron __func__, tagupper, taglower); 61078be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 61088be986ccSStephen Cameron 61098be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61108be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 61118be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 61128be986ccSStephen Cameron switch (c2->error_data.serv_response) { 61138be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 61148be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 61158be986ccSStephen Cameron rc = 0; 61168be986ccSStephen Cameron break; 61178be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 61188be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 61198be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 61208be986ccSStephen Cameron rc = -1; 61218be986ccSStephen Cameron break; 61228be986ccSStephen Cameron default: 61238be986ccSStephen Cameron dev_warn(&h->pdev->dev, 61248be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 61258be986ccSStephen Cameron __func__, tagupper, taglower, 61268be986ccSStephen Cameron c2->error_data.serv_response); 61278be986ccSStephen Cameron rc = -1; 61288be986ccSStephen Cameron } 61298be986ccSStephen Cameron cmd_free(h, c); 61308be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 61318be986ccSStephen Cameron tagupper, taglower); 61328be986ccSStephen Cameron return rc; 61338be986ccSStephen Cameron } 61348be986ccSStephen Cameron 61356cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 613639f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 61376cba3f19SStephen M. Cameron { 61388be986ccSStephen Cameron /* 61398be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 614054b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 61418be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 61428be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 614354b6e9e9SScott Teel */ 61448be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 614539f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 614639f3deb2SDon Brace dev->physical_device) 61478be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 61488be986ccSStephen Cameron reply_queue); 61498be986ccSStephen Cameron else 615039f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 615139f3deb2SDon Brace dev->scsi3addr, 615225163bd5SWebb Scales abort, reply_queue); 61538be986ccSStephen Cameron } 615439f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 615525163bd5SWebb Scales } 615625163bd5SWebb Scales 615725163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 615825163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 615925163bd5SWebb Scales struct CommandList *c) 616025163bd5SWebb Scales { 616125163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 616225163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 616325163bd5SWebb Scales return c->Header.ReplyQueue; 61646cba3f19SStephen M. Cameron } 61656cba3f19SStephen M. Cameron 61669b5c48c2SStephen Cameron /* 61679b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 61689b5c48c2SStephen Cameron * over-subscription of commands 61699b5c48c2SStephen Cameron */ 61709b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 61719b5c48c2SStephen Cameron { 61729b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 61739b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 61749b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 61759b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 61769b5c48c2SStephen Cameron } 61779b5c48c2SStephen Cameron 617875167d2cSStephen M. Cameron /* Send an abort for the specified command. 617975167d2cSStephen M. Cameron * If the device and controller support it, 618075167d2cSStephen M. Cameron * send a task abort request. 618175167d2cSStephen M. Cameron */ 618275167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 618375167d2cSStephen M. Cameron { 618475167d2cSStephen M. Cameron 6185a58e7e53SWebb Scales int rc; 618675167d2cSStephen M. Cameron struct ctlr_info *h; 618775167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 618875167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 618975167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 619075167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 619175167d2cSStephen M. Cameron int ml = 0; 61922b08b3e9SDon Brace __le32 tagupper, taglower; 619325163bd5SWebb Scales int refcount, reply_queue; 619425163bd5SWebb Scales 619525163bd5SWebb Scales if (sc == NULL) 619625163bd5SWebb Scales return FAILED; 619775167d2cSStephen M. Cameron 61989b5c48c2SStephen Cameron if (sc->device == NULL) 61999b5c48c2SStephen Cameron return FAILED; 62009b5c48c2SStephen Cameron 620175167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 620275167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 62039b5c48c2SStephen Cameron if (h == NULL) 620475167d2cSStephen M. Cameron return FAILED; 620575167d2cSStephen M. Cameron 620625163bd5SWebb Scales /* Find the device of the command to be aborted */ 620725163bd5SWebb Scales dev = sc->device->hostdata; 620825163bd5SWebb Scales if (!dev) { 620925163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 621025163bd5SWebb Scales msg); 6211e345893bSDon Brace return FAILED; 621225163bd5SWebb Scales } 621325163bd5SWebb Scales 621425163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 621525163bd5SWebb Scales if (lockup_detected(h)) { 621625163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 621725163bd5SWebb Scales "ABORT FAILED, lockup detected"); 621825163bd5SWebb Scales return FAILED; 621925163bd5SWebb Scales } 622025163bd5SWebb Scales 622125163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 622225163bd5SWebb Scales if (detect_controller_lockup(h)) { 622325163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 622425163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 622525163bd5SWebb Scales return FAILED; 622625163bd5SWebb Scales } 6227e345893bSDon Brace 622875167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 622975167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 623075167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 623175167d2cSStephen M. Cameron return FAILED; 623275167d2cSStephen M. Cameron 623375167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 62344b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 623575167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 62360d96ef5fSWebb Scales sc->device->id, sc->device->lun, 62374b761557SRobert Elliott "Aborting command", sc); 623875167d2cSStephen M. Cameron 623975167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 624075167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 624175167d2cSStephen M. Cameron if (abort == NULL) { 6242281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6243281a7fd0SWebb Scales return SUCCESS; 6244281a7fd0SWebb Scales } 6245281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6246281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6247281a7fd0SWebb Scales cmd_free(h, abort); 6248281a7fd0SWebb Scales return SUCCESS; 624975167d2cSStephen M. Cameron } 62509b5c48c2SStephen Cameron 62519b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 62529b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 62539b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 62549b5c48c2SStephen Cameron cmd_free(h, abort); 62559b5c48c2SStephen Cameron return FAILED; 62569b5c48c2SStephen Cameron } 62579b5c48c2SStephen Cameron 6258a58e7e53SWebb Scales /* 6259a58e7e53SWebb Scales * Check that we're aborting the right command. 6260a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6261a58e7e53SWebb Scales */ 6262a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6263a58e7e53SWebb Scales cmd_free(h, abort); 6264a58e7e53SWebb Scales return SUCCESS; 6265a58e7e53SWebb Scales } 6266a58e7e53SWebb Scales 6267a58e7e53SWebb Scales abort->abort_pending = true; 626817eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 626925163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 627017eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 62717fa3030cSStephen Cameron as = abort->scsi_cmd; 627275167d2cSStephen M. Cameron if (as != NULL) 62734b761557SRobert Elliott ml += sprintf(msg+ml, 62744b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 62754b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 62764b761557SRobert Elliott as->serial_number); 62774b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 62780d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 62794b761557SRobert Elliott 628075167d2cSStephen M. Cameron /* 628175167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 628275167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 628375167d2cSStephen M. Cameron * distinguish which. Send the abort down. 628475167d2cSStephen M. Cameron */ 62859b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 62869b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 62874b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 62884b761557SRobert Elliott msg); 62899b5c48c2SStephen Cameron cmd_free(h, abort); 62909b5c48c2SStephen Cameron return FAILED; 62919b5c48c2SStephen Cameron } 629239f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 62939b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 62949b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 629575167d2cSStephen M. Cameron if (rc != 0) { 62964b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 62970d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 62980d96ef5fSWebb Scales "FAILED to abort command"); 6299281a7fd0SWebb Scales cmd_free(h, abort); 630075167d2cSStephen M. Cameron return FAILED; 630175167d2cSStephen M. Cameron } 63024b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6303d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6304a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6305281a7fd0SWebb Scales cmd_free(h, abort); 6306a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 630775167d2cSStephen M. Cameron } 630875167d2cSStephen M. Cameron 6309edd16368SStephen M. Cameron /* 631073153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 631173153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 631273153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 631373153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 631473153fe5SWebb Scales */ 631573153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 631673153fe5SWebb Scales struct scsi_cmnd *scmd) 631773153fe5SWebb Scales { 631873153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 631973153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 632073153fe5SWebb Scales 632173153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 632273153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 632373153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 632473153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 632573153fe5SWebb Scales * bounds, it's probably not our bug. 632673153fe5SWebb Scales */ 632773153fe5SWebb Scales BUG(); 632873153fe5SWebb Scales } 632973153fe5SWebb Scales 633073153fe5SWebb Scales atomic_inc(&c->refcount); 633173153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 633273153fe5SWebb Scales /* 633373153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 633473153fe5SWebb Scales * value. Thus, there should never be a collision here between 633573153fe5SWebb Scales * two requests...because if the selected command isn't idle 633673153fe5SWebb Scales * then someone is going to be very disappointed. 633773153fe5SWebb Scales */ 633873153fe5SWebb Scales dev_err(&h->pdev->dev, 633973153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 634073153fe5SWebb Scales idx); 634173153fe5SWebb Scales if (c->scsi_cmd != NULL) 634273153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 634373153fe5SWebb Scales scsi_print_command(scmd); 634473153fe5SWebb Scales } 634573153fe5SWebb Scales 634673153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 634773153fe5SWebb Scales return c; 634873153fe5SWebb Scales } 634973153fe5SWebb Scales 635073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 635173153fe5SWebb Scales { 635273153fe5SWebb Scales /* 635373153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 635473153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 635573153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 635673153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 635773153fe5SWebb Scales */ 635873153fe5SWebb Scales (void)atomic_dec(&c->refcount); 635973153fe5SWebb Scales } 636073153fe5SWebb Scales 636173153fe5SWebb Scales /* 6362edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6363edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6364edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6365edd16368SStephen M. Cameron * cmd_free() is the complement. 6366bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6367bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6368edd16368SStephen M. Cameron */ 6369281a7fd0SWebb Scales 6370edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6371edd16368SStephen M. Cameron { 6372edd16368SStephen M. Cameron struct CommandList *c; 6373360c73bdSStephen Cameron int refcount, i; 637473153fe5SWebb Scales int offset = 0; 6375edd16368SStephen M. Cameron 637633811026SRobert Elliott /* 637733811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 63784c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 63794c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 63804c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 63814c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 63824c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 63834c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 63844c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 63854c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 638673153fe5SWebb Scales * 638773153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 638873153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 638973153fe5SWebb Scales * all works, since we have at least one command structure available; 639073153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 639173153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 639273153fe5SWebb Scales * layer will use the higher indexes. 63934c413128SStephen M. Cameron */ 63944c413128SStephen M. Cameron 6395281a7fd0SWebb Scales for (;;) { 639673153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 639773153fe5SWebb Scales HPSA_NRESERVED_CMDS, 639873153fe5SWebb Scales offset); 639973153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6400281a7fd0SWebb Scales offset = 0; 6401281a7fd0SWebb Scales continue; 6402281a7fd0SWebb Scales } 6403edd16368SStephen M. Cameron c = h->cmd_pool + i; 6404281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6405281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6406281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 640773153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6408281a7fd0SWebb Scales continue; 6409281a7fd0SWebb Scales } 6410281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6411281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6412281a7fd0SWebb Scales break; /* it's ours now. */ 6413281a7fd0SWebb Scales } 6414360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6415edd16368SStephen M. Cameron return c; 6416edd16368SStephen M. Cameron } 6417edd16368SStephen M. Cameron 641873153fe5SWebb Scales /* 641973153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 642073153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 642173153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 642273153fe5SWebb Scales * the clear-bit is harmless. 642373153fe5SWebb Scales */ 6424edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6425edd16368SStephen M. Cameron { 6426281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6427edd16368SStephen M. Cameron int i; 6428edd16368SStephen M. Cameron 6429edd16368SStephen M. Cameron i = c - h->cmd_pool; 6430edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6431edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6432edd16368SStephen M. Cameron } 6433281a7fd0SWebb Scales } 6434edd16368SStephen M. Cameron 6435edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6436edd16368SStephen M. Cameron 643742a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 643842a91641SDon Brace void __user *arg) 6439edd16368SStephen M. Cameron { 6440edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6441edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6442edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6443edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6444edd16368SStephen M. Cameron int err; 6445edd16368SStephen M. Cameron u32 cp; 6446edd16368SStephen M. Cameron 6447938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6448edd16368SStephen M. Cameron err = 0; 6449edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6450edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6451edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6452edd16368SStephen M. Cameron sizeof(arg64.Request)); 6453edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6454edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6455edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6456edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6457edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6458edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6459edd16368SStephen M. Cameron 6460edd16368SStephen M. Cameron if (err) 6461edd16368SStephen M. Cameron return -EFAULT; 6462edd16368SStephen M. Cameron 646342a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6464edd16368SStephen M. Cameron if (err) 6465edd16368SStephen M. Cameron return err; 6466edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6467edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6468edd16368SStephen M. Cameron if (err) 6469edd16368SStephen M. Cameron return -EFAULT; 6470edd16368SStephen M. Cameron return err; 6471edd16368SStephen M. Cameron } 6472edd16368SStephen M. Cameron 6473edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 647442a91641SDon Brace int cmd, void __user *arg) 6475edd16368SStephen M. Cameron { 6476edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6477edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6478edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6479edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6480edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6481edd16368SStephen M. Cameron int err; 6482edd16368SStephen M. Cameron u32 cp; 6483edd16368SStephen M. Cameron 6484938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6485edd16368SStephen M. Cameron err = 0; 6486edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6487edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6488edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6489edd16368SStephen M. Cameron sizeof(arg64.Request)); 6490edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6491edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6492edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6493edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6494edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6495edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6496edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6497edd16368SStephen M. Cameron 6498edd16368SStephen M. Cameron if (err) 6499edd16368SStephen M. Cameron return -EFAULT; 6500edd16368SStephen M. Cameron 650142a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6502edd16368SStephen M. Cameron if (err) 6503edd16368SStephen M. Cameron return err; 6504edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6505edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6506edd16368SStephen M. Cameron if (err) 6507edd16368SStephen M. Cameron return -EFAULT; 6508edd16368SStephen M. Cameron return err; 6509edd16368SStephen M. Cameron } 651071fe75a7SStephen M. Cameron 651142a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 651271fe75a7SStephen M. Cameron { 651371fe75a7SStephen M. Cameron switch (cmd) { 651471fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 651571fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 651671fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 651771fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 651871fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 651971fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 652071fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 652171fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 652271fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 652371fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 652471fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 652571fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 652671fe75a7SStephen M. Cameron case CCISS_REGNEWD: 652771fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 652871fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 652971fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 653071fe75a7SStephen M. Cameron 653171fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 653271fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 653371fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 653471fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 653571fe75a7SStephen M. Cameron 653671fe75a7SStephen M. Cameron default: 653771fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 653871fe75a7SStephen M. Cameron } 653971fe75a7SStephen M. Cameron } 6540edd16368SStephen M. Cameron #endif 6541edd16368SStephen M. Cameron 6542edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6543edd16368SStephen M. Cameron { 6544edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6545edd16368SStephen M. Cameron 6546edd16368SStephen M. Cameron if (!argp) 6547edd16368SStephen M. Cameron return -EINVAL; 6548edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6549edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6550edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6551edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6552edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6553edd16368SStephen M. Cameron return -EFAULT; 6554edd16368SStephen M. Cameron return 0; 6555edd16368SStephen M. Cameron } 6556edd16368SStephen M. Cameron 6557edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6558edd16368SStephen M. Cameron { 6559edd16368SStephen M. Cameron DriverVer_type DriverVer; 6560edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6561edd16368SStephen M. Cameron int rc; 6562edd16368SStephen M. Cameron 6563edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6564edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6565edd16368SStephen M. Cameron if (rc != 3) { 6566edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6567edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6568edd16368SStephen M. Cameron vmaj = 0; 6569edd16368SStephen M. Cameron vmin = 0; 6570edd16368SStephen M. Cameron vsubmin = 0; 6571edd16368SStephen M. Cameron } 6572edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6573edd16368SStephen M. Cameron if (!argp) 6574edd16368SStephen M. Cameron return -EINVAL; 6575edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6576edd16368SStephen M. Cameron return -EFAULT; 6577edd16368SStephen M. Cameron return 0; 6578edd16368SStephen M. Cameron } 6579edd16368SStephen M. Cameron 6580edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6581edd16368SStephen M. Cameron { 6582edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6583edd16368SStephen M. Cameron struct CommandList *c; 6584edd16368SStephen M. Cameron char *buff = NULL; 658550a0decfSStephen M. Cameron u64 temp64; 6586c1f63c8fSStephen M. Cameron int rc = 0; 6587edd16368SStephen M. Cameron 6588edd16368SStephen M. Cameron if (!argp) 6589edd16368SStephen M. Cameron return -EINVAL; 6590edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6591edd16368SStephen M. Cameron return -EPERM; 6592edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6593edd16368SStephen M. Cameron return -EFAULT; 6594edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6595edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6596edd16368SStephen M. Cameron return -EINVAL; 6597edd16368SStephen M. Cameron } 6598edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6599edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6600edd16368SStephen M. Cameron if (buff == NULL) 66012dd02d74SRobert Elliott return -ENOMEM; 66029233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6603edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6604b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6605b03a7771SStephen M. Cameron iocommand.buf_size)) { 6606c1f63c8fSStephen M. Cameron rc = -EFAULT; 6607c1f63c8fSStephen M. Cameron goto out_kfree; 6608edd16368SStephen M. Cameron } 6609b03a7771SStephen M. Cameron } else { 6610edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6611b03a7771SStephen M. Cameron } 6612b03a7771SStephen M. Cameron } 661345fcb86eSStephen Cameron c = cmd_alloc(h); 6614bf43caf3SRobert Elliott 6615edd16368SStephen M. Cameron /* Fill in the command type */ 6616edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6617a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6618edd16368SStephen M. Cameron /* Fill in Command Header */ 6619edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6620edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6621edd16368SStephen M. Cameron c->Header.SGList = 1; 662250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6623edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6624edd16368SStephen M. Cameron c->Header.SGList = 0; 662550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6626edd16368SStephen M. Cameron } 6627edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6628edd16368SStephen M. Cameron 6629edd16368SStephen M. Cameron /* Fill in Request block */ 6630edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6631edd16368SStephen M. Cameron sizeof(c->Request)); 6632edd16368SStephen M. Cameron 6633edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6634edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 663550a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6636edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 663750a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 663850a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 663950a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6640bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6641bcc48ffaSStephen M. Cameron goto out; 6642bcc48ffaSStephen M. Cameron } 664350a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 664450a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 664550a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6646edd16368SStephen M. Cameron } 6647c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 66483fb134cbSDon Brace NO_TIMEOUT); 6649c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6650edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6651edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 665225163bd5SWebb Scales if (rc) { 665325163bd5SWebb Scales rc = -EIO; 665425163bd5SWebb Scales goto out; 665525163bd5SWebb Scales } 6656edd16368SStephen M. Cameron 6657edd16368SStephen M. Cameron /* Copy the error information out */ 6658edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6659edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6660edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6661c1f63c8fSStephen M. Cameron rc = -EFAULT; 6662c1f63c8fSStephen M. Cameron goto out; 6663edd16368SStephen M. Cameron } 66649233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6665b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6666edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6667edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6668c1f63c8fSStephen M. Cameron rc = -EFAULT; 6669c1f63c8fSStephen M. Cameron goto out; 6670edd16368SStephen M. Cameron } 6671edd16368SStephen M. Cameron } 6672c1f63c8fSStephen M. Cameron out: 667345fcb86eSStephen Cameron cmd_free(h, c); 6674c1f63c8fSStephen M. Cameron out_kfree: 6675c1f63c8fSStephen M. Cameron kfree(buff); 6676c1f63c8fSStephen M. Cameron return rc; 6677edd16368SStephen M. Cameron } 6678edd16368SStephen M. Cameron 6679edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6680edd16368SStephen M. Cameron { 6681edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6682edd16368SStephen M. Cameron struct CommandList *c; 6683edd16368SStephen M. Cameron unsigned char **buff = NULL; 6684edd16368SStephen M. Cameron int *buff_size = NULL; 668550a0decfSStephen M. Cameron u64 temp64; 6686edd16368SStephen M. Cameron BYTE sg_used = 0; 6687edd16368SStephen M. Cameron int status = 0; 668801a02ffcSStephen M. Cameron u32 left; 668901a02ffcSStephen M. Cameron u32 sz; 6690edd16368SStephen M. Cameron BYTE __user *data_ptr; 6691edd16368SStephen M. Cameron 6692edd16368SStephen M. Cameron if (!argp) 6693edd16368SStephen M. Cameron return -EINVAL; 6694edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6695edd16368SStephen M. Cameron return -EPERM; 669619be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6697edd16368SStephen M. Cameron if (!ioc) { 6698edd16368SStephen M. Cameron status = -ENOMEM; 6699edd16368SStephen M. Cameron goto cleanup1; 6700edd16368SStephen M. Cameron } 6701edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6702edd16368SStephen M. Cameron status = -EFAULT; 6703edd16368SStephen M. Cameron goto cleanup1; 6704edd16368SStephen M. Cameron } 6705edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6706edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6707edd16368SStephen M. Cameron status = -EINVAL; 6708edd16368SStephen M. Cameron goto cleanup1; 6709edd16368SStephen M. Cameron } 6710edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6711edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6712edd16368SStephen M. Cameron status = -EINVAL; 6713edd16368SStephen M. Cameron goto cleanup1; 6714edd16368SStephen M. Cameron } 6715d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6716edd16368SStephen M. Cameron status = -EINVAL; 6717edd16368SStephen M. Cameron goto cleanup1; 6718edd16368SStephen M. Cameron } 6719d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6720edd16368SStephen M. Cameron if (!buff) { 6721edd16368SStephen M. Cameron status = -ENOMEM; 6722edd16368SStephen M. Cameron goto cleanup1; 6723edd16368SStephen M. Cameron } 6724d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6725edd16368SStephen M. Cameron if (!buff_size) { 6726edd16368SStephen M. Cameron status = -ENOMEM; 6727edd16368SStephen M. Cameron goto cleanup1; 6728edd16368SStephen M. Cameron } 6729edd16368SStephen M. Cameron left = ioc->buf_size; 6730edd16368SStephen M. Cameron data_ptr = ioc->buf; 6731edd16368SStephen M. Cameron while (left) { 6732edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6733edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6734edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6735edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6736edd16368SStephen M. Cameron status = -ENOMEM; 6737edd16368SStephen M. Cameron goto cleanup1; 6738edd16368SStephen M. Cameron } 67399233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6740edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 67410758f4f7SStephen M. Cameron status = -EFAULT; 6742edd16368SStephen M. Cameron goto cleanup1; 6743edd16368SStephen M. Cameron } 6744edd16368SStephen M. Cameron } else 6745edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6746edd16368SStephen M. Cameron left -= sz; 6747edd16368SStephen M. Cameron data_ptr += sz; 6748edd16368SStephen M. Cameron sg_used++; 6749edd16368SStephen M. Cameron } 675045fcb86eSStephen Cameron c = cmd_alloc(h); 6751bf43caf3SRobert Elliott 6752edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6753a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6754edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 675550a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 675650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6757edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6758edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6759edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6760edd16368SStephen M. Cameron int i; 6761edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 676250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6763edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 676450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 676550a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 676650a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 676750a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6768bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6769bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6770bcc48ffaSStephen M. Cameron status = -ENOMEM; 6771e2d4a1f6SStephen M. Cameron goto cleanup0; 6772bcc48ffaSStephen M. Cameron } 677350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 677450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 677550a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6776edd16368SStephen M. Cameron } 677750a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6778edd16368SStephen M. Cameron } 6779c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 67803fb134cbSDon Brace NO_TIMEOUT); 6781b03a7771SStephen M. Cameron if (sg_used) 6782edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6783edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 678425163bd5SWebb Scales if (status) { 678525163bd5SWebb Scales status = -EIO; 678625163bd5SWebb Scales goto cleanup0; 678725163bd5SWebb Scales } 678825163bd5SWebb Scales 6789edd16368SStephen M. Cameron /* Copy the error information out */ 6790edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6791edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6792edd16368SStephen M. Cameron status = -EFAULT; 6793e2d4a1f6SStephen M. Cameron goto cleanup0; 6794edd16368SStephen M. Cameron } 67959233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 67962b08b3e9SDon Brace int i; 67972b08b3e9SDon Brace 6798edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6799edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6800edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6801edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6802edd16368SStephen M. Cameron status = -EFAULT; 6803e2d4a1f6SStephen M. Cameron goto cleanup0; 6804edd16368SStephen M. Cameron } 6805edd16368SStephen M. Cameron ptr += buff_size[i]; 6806edd16368SStephen M. Cameron } 6807edd16368SStephen M. Cameron } 6808edd16368SStephen M. Cameron status = 0; 6809e2d4a1f6SStephen M. Cameron cleanup0: 681045fcb86eSStephen Cameron cmd_free(h, c); 6811edd16368SStephen M. Cameron cleanup1: 6812edd16368SStephen M. Cameron if (buff) { 68132b08b3e9SDon Brace int i; 68142b08b3e9SDon Brace 6815edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6816edd16368SStephen M. Cameron kfree(buff[i]); 6817edd16368SStephen M. Cameron kfree(buff); 6818edd16368SStephen M. Cameron } 6819edd16368SStephen M. Cameron kfree(buff_size); 6820edd16368SStephen M. Cameron kfree(ioc); 6821edd16368SStephen M. Cameron return status; 6822edd16368SStephen M. Cameron } 6823edd16368SStephen M. Cameron 6824edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6825edd16368SStephen M. Cameron struct CommandList *c) 6826edd16368SStephen M. Cameron { 6827edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6828edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6829edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6830edd16368SStephen M. Cameron } 68310390f0c0SStephen M. Cameron 6832edd16368SStephen M. Cameron /* 6833edd16368SStephen M. Cameron * ioctl 6834edd16368SStephen M. Cameron */ 683542a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6836edd16368SStephen M. Cameron { 6837edd16368SStephen M. Cameron struct ctlr_info *h; 6838edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 68390390f0c0SStephen M. Cameron int rc; 6840edd16368SStephen M. Cameron 6841edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6842edd16368SStephen M. Cameron 6843edd16368SStephen M. Cameron switch (cmd) { 6844edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6845edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6846edd16368SStephen M. Cameron case CCISS_REGNEWD: 6847a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6848edd16368SStephen M. Cameron return 0; 6849edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6850edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6851edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6852edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6853edd16368SStephen M. Cameron case CCISS_PASSTHRU: 685434f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68550390f0c0SStephen M. Cameron return -EAGAIN; 68560390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 685734f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68580390f0c0SStephen M. Cameron return rc; 6859edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 686034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68610390f0c0SStephen M. Cameron return -EAGAIN; 68620390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 686334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68640390f0c0SStephen M. Cameron return rc; 6865edd16368SStephen M. Cameron default: 6866edd16368SStephen M. Cameron return -ENOTTY; 6867edd16368SStephen M. Cameron } 6868edd16368SStephen M. Cameron } 6869edd16368SStephen M. Cameron 6870bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 68716f039790SGreg Kroah-Hartman u8 reset_type) 687264670ac8SStephen M. Cameron { 687364670ac8SStephen M. Cameron struct CommandList *c; 687464670ac8SStephen M. Cameron 687564670ac8SStephen M. Cameron c = cmd_alloc(h); 6876bf43caf3SRobert Elliott 6877a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6878a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 687964670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 688064670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 688164670ac8SStephen M. Cameron c->waiting = NULL; 688264670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 688364670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 688464670ac8SStephen M. Cameron * the command either. This is the last command we will send before 688564670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 688664670ac8SStephen M. Cameron */ 6887bf43caf3SRobert Elliott return; 688864670ac8SStephen M. Cameron } 688964670ac8SStephen M. Cameron 6890a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6891b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6892edd16368SStephen M. Cameron int cmd_type) 6893edd16368SStephen M. Cameron { 6894edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 68959b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6896edd16368SStephen M. Cameron 6897edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6898a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6899edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6900edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6901edd16368SStephen M. Cameron c->Header.SGList = 1; 690250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6903edd16368SStephen M. Cameron } else { 6904edd16368SStephen M. Cameron c->Header.SGList = 0; 690550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6906edd16368SStephen M. Cameron } 6907edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6908edd16368SStephen M. Cameron 6909edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6910edd16368SStephen M. Cameron switch (cmd) { 6911edd16368SStephen M. Cameron case HPSA_INQUIRY: 6912edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6913b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6914edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6915b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6916edd16368SStephen M. Cameron } 6917edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6918a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6919a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6920edd16368SStephen M. Cameron c->Request.Timeout = 0; 6921edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6922edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6923edd16368SStephen M. Cameron break; 6924edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6925edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6926edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6927edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6928edd16368SStephen M. Cameron */ 6929edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6930a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6931a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6932edd16368SStephen M. Cameron c->Request.Timeout = 0; 6933edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6934edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6935edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6936edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6937edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6938edd16368SStephen M. Cameron break; 6939c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6940c2adae44SScott Teel c->Request.CDBLen = 16; 6941c2adae44SScott Teel c->Request.type_attr_dir = 6942c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6943c2adae44SScott Teel c->Request.Timeout = 0; 6944c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6945c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6946c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6947c2adae44SScott Teel break; 6948c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6949c2adae44SScott Teel c->Request.CDBLen = 16; 6950c2adae44SScott Teel c->Request.type_attr_dir = 6951c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6952c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6953c2adae44SScott Teel c->Request.Timeout = 0; 6954c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6955c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6956c2adae44SScott Teel break; 6957edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6958edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6959a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6960a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6961a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6962edd16368SStephen M. Cameron c->Request.Timeout = 0; 6963edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6964edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6965bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6966bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6967edd16368SStephen M. Cameron break; 6968edd16368SStephen M. Cameron case TEST_UNIT_READY: 6969edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6970a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6971a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6972edd16368SStephen M. Cameron c->Request.Timeout = 0; 6973edd16368SStephen M. Cameron break; 6974283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6975283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6976a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6977a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6978283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6979283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6980283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6981283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6982283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6983283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6984283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6985283b4a9bSStephen M. Cameron break; 6986316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6987316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6988a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6989a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6990316b221aSStephen M. Cameron c->Request.Timeout = 0; 6991316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6992316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6993316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6994316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6995316b221aSStephen M. Cameron break; 699603383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 699703383736SDon Brace c->Request.CDBLen = 10; 699803383736SDon Brace c->Request.type_attr_dir = 699903383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 700003383736SDon Brace c->Request.Timeout = 0; 700103383736SDon Brace c->Request.CDB[0] = BMIC_READ; 700203383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 700303383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 700403383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 700503383736SDon Brace break; 7006d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7007d04e62b9SKevin Barnett c->Request.CDBLen = 10; 7008d04e62b9SKevin Barnett c->Request.type_attr_dir = 7009d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7010d04e62b9SKevin Barnett c->Request.Timeout = 0; 7011d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 7012d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7013d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 7014d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 7015d04e62b9SKevin Barnett break; 7016cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 7017cca8f13bSDon Brace c->Request.CDBLen = 10; 7018cca8f13bSDon Brace c->Request.type_attr_dir = 7019cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7020cca8f13bSDon Brace c->Request.Timeout = 0; 7021cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 7022cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7023cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 7024cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 7025cca8f13bSDon Brace break; 702666749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 702766749d0dSScott Teel c->Request.CDBLen = 10; 702866749d0dSScott Teel c->Request.type_attr_dir = 702966749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 703066749d0dSScott Teel c->Request.Timeout = 0; 703166749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 703266749d0dSScott Teel c->Request.CDB[1] = 0; 703366749d0dSScott Teel c->Request.CDB[2] = 0; 703466749d0dSScott Teel c->Request.CDB[3] = 0; 703566749d0dSScott Teel c->Request.CDB[4] = 0; 703666749d0dSScott Teel c->Request.CDB[5] = 0; 703766749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 703866749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 703966749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 704066749d0dSScott Teel c->Request.CDB[9] = 0; 704166749d0dSScott Teel break; 7042edd16368SStephen M. Cameron default: 7043edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7044edd16368SStephen M. Cameron BUG(); 7045a2dac136SStephen M. Cameron return -1; 7046edd16368SStephen M. Cameron } 7047edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 7048edd16368SStephen M. Cameron switch (cmd) { 7049edd16368SStephen M. Cameron 70500b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 70510b9b7b6eSScott Teel c->Request.CDBLen = 16; 70520b9b7b6eSScott Teel c->Request.type_attr_dir = 70530b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 70540b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 70550b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 70560b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 70570b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 70580b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 70590b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 70600b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 70610b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 70620b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 70630b9b7b6eSScott Teel break; 7064edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 7065edd16368SStephen M. Cameron c->Request.CDBLen = 16; 7066a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7067a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7068edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 706964670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 707064670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 707121e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7072edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 7073edd16368SStephen M. Cameron /* LunID device */ 7074edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 7075edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 7076edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 7077edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 7078edd16368SStephen M. Cameron break; 707975167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 70809b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 70812b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 70829b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 70839b5c48c2SStephen Cameron tag, c->Header.tag); 708475167d2cSStephen M. Cameron c->Request.CDBLen = 16; 7085a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7086a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 7087a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 708875167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 708975167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 709075167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 709175167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 709275167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 709375167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 70949b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 709575167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 709675167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 709775167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 709875167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 709975167d2cSStephen M. Cameron break; 7100edd16368SStephen M. Cameron default: 7101edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 7102edd16368SStephen M. Cameron cmd); 7103edd16368SStephen M. Cameron BUG(); 7104edd16368SStephen M. Cameron } 7105edd16368SStephen M. Cameron } else { 7106edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7107edd16368SStephen M. Cameron BUG(); 7108edd16368SStephen M. Cameron } 7109edd16368SStephen M. Cameron 7110a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 7111edd16368SStephen M. Cameron case XFER_READ: 7112edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 7113edd16368SStephen M. Cameron break; 7114edd16368SStephen M. Cameron case XFER_WRITE: 7115edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 7116edd16368SStephen M. Cameron break; 7117edd16368SStephen M. Cameron case XFER_NONE: 7118edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 7119edd16368SStephen M. Cameron break; 7120edd16368SStephen M. Cameron default: 7121edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7122edd16368SStephen M. Cameron } 7123a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7124a2dac136SStephen M. Cameron return -1; 7125a2dac136SStephen M. Cameron return 0; 7126edd16368SStephen M. Cameron } 7127edd16368SStephen M. Cameron 7128edd16368SStephen M. Cameron /* 7129edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7130edd16368SStephen M. Cameron */ 7131edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7132edd16368SStephen M. Cameron { 7133edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7134edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7135088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7136088ba34cSStephen M. Cameron page_offs + size); 7137edd16368SStephen M. Cameron 7138edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7139edd16368SStephen M. Cameron } 7140edd16368SStephen M. Cameron 7141254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7142edd16368SStephen M. Cameron { 7143254f796bSMatt Gates return h->access.command_completed(h, q); 7144edd16368SStephen M. Cameron } 7145edd16368SStephen M. Cameron 7146900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7147edd16368SStephen M. Cameron { 7148edd16368SStephen M. Cameron return h->access.intr_pending(h); 7149edd16368SStephen M. Cameron } 7150edd16368SStephen M. Cameron 7151edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7152edd16368SStephen M. Cameron { 715310f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 715410f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7155edd16368SStephen M. Cameron } 7156edd16368SStephen M. Cameron 715701a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 715801a02ffcSStephen M. Cameron u32 raw_tag) 7159edd16368SStephen M. Cameron { 7160edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7161edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7162edd16368SStephen M. Cameron return 1; 7163edd16368SStephen M. Cameron } 7164edd16368SStephen M. Cameron return 0; 7165edd16368SStephen M. Cameron } 7166edd16368SStephen M. Cameron 71675a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7168edd16368SStephen M. Cameron { 7169e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7170c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7171c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 71721fb011fbSStephen M. Cameron complete_scsi_command(c); 71738be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7174edd16368SStephen M. Cameron complete(c->waiting); 7175a104c99fSStephen M. Cameron } 7176a104c99fSStephen M. Cameron 7177303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 71781d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7179303932fdSDon Brace u32 raw_tag) 7180303932fdSDon Brace { 7181303932fdSDon Brace u32 tag_index; 7182303932fdSDon Brace struct CommandList *c; 7183303932fdSDon Brace 7184f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 71851d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7186303932fdSDon Brace c = h->cmd_pool + tag_index; 71875a3d16f5SStephen M. Cameron finish_cmd(c); 71881d94f94dSStephen M. Cameron } 7189303932fdSDon Brace } 7190303932fdSDon Brace 719164670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 719264670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 719364670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 719464670ac8SStephen M. Cameron * functions. 719564670ac8SStephen M. Cameron */ 719664670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 719764670ac8SStephen M. Cameron { 719864670ac8SStephen M. Cameron if (likely(!reset_devices)) 719964670ac8SStephen M. Cameron return 0; 720064670ac8SStephen M. Cameron 720164670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 720264670ac8SStephen M. Cameron return 0; 720364670ac8SStephen M. Cameron 720464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 720564670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 720664670ac8SStephen M. Cameron 720764670ac8SStephen M. Cameron return 1; 720864670ac8SStephen M. Cameron } 720964670ac8SStephen M. Cameron 7210254f796bSMatt Gates /* 7211254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7212254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7213254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7214254f796bSMatt Gates */ 7215254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 721664670ac8SStephen M. Cameron { 7217254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7218254f796bSMatt Gates } 7219254f796bSMatt Gates 7220254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7221254f796bSMatt Gates { 7222254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7223254f796bSMatt Gates u8 q = *(u8 *) queue; 722464670ac8SStephen M. Cameron u32 raw_tag; 722564670ac8SStephen M. Cameron 722664670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 722764670ac8SStephen M. Cameron return IRQ_NONE; 722864670ac8SStephen M. Cameron 722964670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 723064670ac8SStephen M. Cameron return IRQ_NONE; 7231a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 723264670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7233254f796bSMatt Gates raw_tag = get_next_completion(h, q); 723464670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7235254f796bSMatt Gates raw_tag = next_command(h, q); 723664670ac8SStephen M. Cameron } 723764670ac8SStephen M. Cameron return IRQ_HANDLED; 723864670ac8SStephen M. Cameron } 723964670ac8SStephen M. Cameron 7240254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 724164670ac8SStephen M. Cameron { 7242254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 724364670ac8SStephen M. Cameron u32 raw_tag; 7244254f796bSMatt Gates u8 q = *(u8 *) queue; 724564670ac8SStephen M. Cameron 724664670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 724764670ac8SStephen M. Cameron return IRQ_NONE; 724864670ac8SStephen M. Cameron 7249a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7250254f796bSMatt Gates raw_tag = get_next_completion(h, q); 725164670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7252254f796bSMatt Gates raw_tag = next_command(h, q); 725364670ac8SStephen M. Cameron return IRQ_HANDLED; 725464670ac8SStephen M. Cameron } 725564670ac8SStephen M. Cameron 7256254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7257edd16368SStephen M. Cameron { 7258254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7259303932fdSDon Brace u32 raw_tag; 7260254f796bSMatt Gates u8 q = *(u8 *) queue; 7261edd16368SStephen M. Cameron 7262edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7263edd16368SStephen M. Cameron return IRQ_NONE; 7264a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 726510f66018SStephen M. Cameron while (interrupt_pending(h)) { 7266254f796bSMatt Gates raw_tag = get_next_completion(h, q); 726710f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 72681d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7269254f796bSMatt Gates raw_tag = next_command(h, q); 727010f66018SStephen M. Cameron } 727110f66018SStephen M. Cameron } 727210f66018SStephen M. Cameron return IRQ_HANDLED; 727310f66018SStephen M. Cameron } 727410f66018SStephen M. Cameron 7275254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 727610f66018SStephen M. Cameron { 7277254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 727810f66018SStephen M. Cameron u32 raw_tag; 7279254f796bSMatt Gates u8 q = *(u8 *) queue; 728010f66018SStephen M. Cameron 7281a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7282254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7283303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 72841d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7285254f796bSMatt Gates raw_tag = next_command(h, q); 7286edd16368SStephen M. Cameron } 7287edd16368SStephen M. Cameron return IRQ_HANDLED; 7288edd16368SStephen M. Cameron } 7289edd16368SStephen M. Cameron 7290a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7291a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7292a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7293a9a3a273SStephen M. Cameron */ 72946f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7295edd16368SStephen M. Cameron unsigned char type) 7296edd16368SStephen M. Cameron { 7297edd16368SStephen M. Cameron struct Command { 7298edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7299edd16368SStephen M. Cameron struct RequestBlock Request; 7300edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7301edd16368SStephen M. Cameron }; 7302edd16368SStephen M. Cameron struct Command *cmd; 7303edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7304edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7305edd16368SStephen M. Cameron dma_addr_t paddr64; 73062b08b3e9SDon Brace __le32 paddr32; 73072b08b3e9SDon Brace u32 tag; 7308edd16368SStephen M. Cameron void __iomem *vaddr; 7309edd16368SStephen M. Cameron int i, err; 7310edd16368SStephen M. Cameron 7311edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7312edd16368SStephen M. Cameron if (vaddr == NULL) 7313edd16368SStephen M. Cameron return -ENOMEM; 7314edd16368SStephen M. Cameron 7315edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7316edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7317edd16368SStephen M. Cameron * memory. 7318edd16368SStephen M. Cameron */ 7319edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7320edd16368SStephen M. Cameron if (err) { 7321edd16368SStephen M. Cameron iounmap(vaddr); 73221eaec8f3SRobert Elliott return err; 7323edd16368SStephen M. Cameron } 7324edd16368SStephen M. Cameron 7325edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7326edd16368SStephen M. Cameron if (cmd == NULL) { 7327edd16368SStephen M. Cameron iounmap(vaddr); 7328edd16368SStephen M. Cameron return -ENOMEM; 7329edd16368SStephen M. Cameron } 7330edd16368SStephen M. Cameron 7331edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7332edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7333edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7334edd16368SStephen M. Cameron */ 73352b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7336edd16368SStephen M. Cameron 7337edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7338edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 733950a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 73402b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7341edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7342edd16368SStephen M. Cameron 7343edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7344a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7345a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7346edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7347edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7348edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7349edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 735050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 73512b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 735250a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7353edd16368SStephen M. Cameron 73542b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7355edd16368SStephen M. Cameron 7356edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7357edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 73582b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7359edd16368SStephen M. Cameron break; 7360edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7361edd16368SStephen M. Cameron } 7362edd16368SStephen M. Cameron 7363edd16368SStephen M. Cameron iounmap(vaddr); 7364edd16368SStephen M. Cameron 7365edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7366edd16368SStephen M. Cameron * still complete the command. 7367edd16368SStephen M. Cameron */ 7368edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7369edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7370edd16368SStephen M. Cameron opcode, type); 7371edd16368SStephen M. Cameron return -ETIMEDOUT; 7372edd16368SStephen M. Cameron } 7373edd16368SStephen M. Cameron 7374edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7375edd16368SStephen M. Cameron 7376edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7377edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7378edd16368SStephen M. Cameron opcode, type); 7379edd16368SStephen M. Cameron return -EIO; 7380edd16368SStephen M. Cameron } 7381edd16368SStephen M. Cameron 7382edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7383edd16368SStephen M. Cameron opcode, type); 7384edd16368SStephen M. Cameron return 0; 7385edd16368SStephen M. Cameron } 7386edd16368SStephen M. Cameron 7387edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7388edd16368SStephen M. Cameron 73891df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 739042a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7391edd16368SStephen M. Cameron { 7392edd16368SStephen M. Cameron 73931df8552aSStephen M. Cameron if (use_doorbell) { 73941df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 73951df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 73961df8552aSStephen M. Cameron * other way using the doorbell register. 7397edd16368SStephen M. Cameron */ 73981df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7399cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 740085009239SStephen M. Cameron 740100701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 740285009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 740385009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 740485009239SStephen M. Cameron * over in some weird corner cases. 740585009239SStephen M. Cameron */ 740600701a96SJustin Lindley msleep(10000); 74071df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7408edd16368SStephen M. Cameron 7409edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7410edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7411edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7412edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 74131df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 74141df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 74151df8552aSStephen M. Cameron * controller." */ 7416edd16368SStephen M. Cameron 74172662cab8SDon Brace int rc = 0; 74182662cab8SDon Brace 74191df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 74202662cab8SDon Brace 7421edd16368SStephen M. Cameron /* enter the D3hot power management state */ 74222662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 74232662cab8SDon Brace if (rc) 74242662cab8SDon Brace return rc; 7425edd16368SStephen M. Cameron 7426edd16368SStephen M. Cameron msleep(500); 7427edd16368SStephen M. Cameron 7428edd16368SStephen M. Cameron /* enter the D0 power management state */ 74292662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 74302662cab8SDon Brace if (rc) 74312662cab8SDon Brace return rc; 7432c4853efeSMike Miller 7433c4853efeSMike Miller /* 7434c4853efeSMike Miller * The P600 requires a small delay when changing states. 7435c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7436c4853efeSMike Miller * This for kdump only and is particular to the P600. 7437c4853efeSMike Miller */ 7438c4853efeSMike Miller msleep(500); 74391df8552aSStephen M. Cameron } 74401df8552aSStephen M. Cameron return 0; 74411df8552aSStephen M. Cameron } 74421df8552aSStephen M. Cameron 74436f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7444580ada3cSStephen M. Cameron { 7445580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7446f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7447580ada3cSStephen M. Cameron } 7448580ada3cSStephen M. Cameron 74496f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7450580ada3cSStephen M. Cameron { 7451580ada3cSStephen M. Cameron char *driver_version; 7452580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7453580ada3cSStephen M. Cameron 7454580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7455580ada3cSStephen M. Cameron if (!driver_version) 7456580ada3cSStephen M. Cameron return -ENOMEM; 7457580ada3cSStephen M. Cameron 7458580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7459580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7460580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7461580ada3cSStephen M. Cameron kfree(driver_version); 7462580ada3cSStephen M. Cameron return 0; 7463580ada3cSStephen M. Cameron } 7464580ada3cSStephen M. Cameron 74656f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 74666f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7467580ada3cSStephen M. Cameron { 7468580ada3cSStephen M. Cameron int i; 7469580ada3cSStephen M. Cameron 7470580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7471580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7472580ada3cSStephen M. Cameron } 7473580ada3cSStephen M. Cameron 74746f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7475580ada3cSStephen M. Cameron { 7476580ada3cSStephen M. Cameron 7477580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7478580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7479580ada3cSStephen M. Cameron 7480580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7481580ada3cSStephen M. Cameron if (!old_driver_ver) 7482580ada3cSStephen M. Cameron return -ENOMEM; 7483580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7484580ada3cSStephen M. Cameron 7485580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7486580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7487580ada3cSStephen M. Cameron */ 7488580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7489580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7490580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7491580ada3cSStephen M. Cameron kfree(old_driver_ver); 7492580ada3cSStephen M. Cameron return rc; 7493580ada3cSStephen M. Cameron } 74941df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 74951df8552aSStephen M. Cameron * states or the using the doorbell register. 74961df8552aSStephen M. Cameron */ 74976b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 74981df8552aSStephen M. Cameron { 74991df8552aSStephen M. Cameron u64 cfg_offset; 75001df8552aSStephen M. Cameron u32 cfg_base_addr; 75011df8552aSStephen M. Cameron u64 cfg_base_addr_index; 75021df8552aSStephen M. Cameron void __iomem *vaddr; 75031df8552aSStephen M. Cameron unsigned long paddr; 7504580ada3cSStephen M. Cameron u32 misc_fw_support; 7505270d05deSStephen M. Cameron int rc; 75061df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7507cf0b08d0SStephen M. Cameron u32 use_doorbell; 7508270d05deSStephen M. Cameron u16 command_register; 75091df8552aSStephen M. Cameron 75101df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 75111df8552aSStephen M. Cameron * the same thing as 75121df8552aSStephen M. Cameron * 75131df8552aSStephen M. Cameron * pci_save_state(pci_dev); 75141df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 75151df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 75161df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 75171df8552aSStephen M. Cameron * 75181df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 75191df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 75201df8552aSStephen M. Cameron * using the doorbell register. 75211df8552aSStephen M. Cameron */ 752218867659SStephen M. Cameron 752360f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 752460f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 752525c1e56aSStephen M. Cameron return -ENODEV; 752625c1e56aSStephen M. Cameron } 752746380786SStephen M. Cameron 752846380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 752946380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 753046380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 753118867659SStephen M. Cameron 7532270d05deSStephen M. Cameron /* Save the PCI command register */ 7533270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7534270d05deSStephen M. Cameron pci_save_state(pdev); 75351df8552aSStephen M. Cameron 75361df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 75371df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 75381df8552aSStephen M. Cameron if (rc) 75391df8552aSStephen M. Cameron return rc; 75401df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 75411df8552aSStephen M. Cameron if (!vaddr) 75421df8552aSStephen M. Cameron return -ENOMEM; 75431df8552aSStephen M. Cameron 75441df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 75451df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 75461df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 75471df8552aSStephen M. Cameron if (rc) 75481df8552aSStephen M. Cameron goto unmap_vaddr; 75491df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 75501df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 75511df8552aSStephen M. Cameron if (!cfgtable) { 75521df8552aSStephen M. Cameron rc = -ENOMEM; 75531df8552aSStephen M. Cameron goto unmap_vaddr; 75541df8552aSStephen M. Cameron } 7555580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7556580ada3cSStephen M. Cameron if (rc) 755703741d95STomas Henzl goto unmap_cfgtable; 75581df8552aSStephen M. Cameron 7559cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7560cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7561cf0b08d0SStephen M. Cameron */ 75621df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7563cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7564cf0b08d0SStephen M. Cameron if (use_doorbell) { 7565cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7566cf0b08d0SStephen M. Cameron } else { 75671df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7568cf0b08d0SStephen M. Cameron if (use_doorbell) { 7569050f7147SStephen Cameron dev_warn(&pdev->dev, 7570050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 757164670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7572cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7573cf0b08d0SStephen M. Cameron } 7574cf0b08d0SStephen M. Cameron } 75751df8552aSStephen M. Cameron 75761df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 75771df8552aSStephen M. Cameron if (rc) 75781df8552aSStephen M. Cameron goto unmap_cfgtable; 7579edd16368SStephen M. Cameron 7580270d05deSStephen M. Cameron pci_restore_state(pdev); 7581270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7582edd16368SStephen M. Cameron 75831df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 75841df8552aSStephen M. Cameron need a little pause here */ 75851df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 75861df8552aSStephen M. Cameron 7587fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7588fe5389c8SStephen M. Cameron if (rc) { 7589fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7590050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7591fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7592fe5389c8SStephen M. Cameron } 7593fe5389c8SStephen M. Cameron 7594580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7595580ada3cSStephen M. Cameron if (rc < 0) 7596580ada3cSStephen M. Cameron goto unmap_cfgtable; 7597580ada3cSStephen M. Cameron if (rc) { 759864670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 759964670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 760064670ac8SStephen M. Cameron rc = -ENOTSUPP; 7601580ada3cSStephen M. Cameron } else { 760264670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 76031df8552aSStephen M. Cameron } 76041df8552aSStephen M. Cameron 76051df8552aSStephen M. Cameron unmap_cfgtable: 76061df8552aSStephen M. Cameron iounmap(cfgtable); 76071df8552aSStephen M. Cameron 76081df8552aSStephen M. Cameron unmap_vaddr: 76091df8552aSStephen M. Cameron iounmap(vaddr); 76101df8552aSStephen M. Cameron return rc; 7611edd16368SStephen M. Cameron } 7612edd16368SStephen M. Cameron 7613edd16368SStephen M. Cameron /* 7614edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7615edd16368SStephen M. Cameron * the io functions. 7616edd16368SStephen M. Cameron * This is for debug only. 7617edd16368SStephen M. Cameron */ 761842a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7619edd16368SStephen M. Cameron { 762058f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7621edd16368SStephen M. Cameron int i; 7622edd16368SStephen M. Cameron char temp_name[17]; 7623edd16368SStephen M. Cameron 7624edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7625edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7626edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7627edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7628edd16368SStephen M. Cameron temp_name[4] = '\0'; 7629edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7630edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7631edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7632edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7633edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7634edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7635edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7636edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7637edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7638edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7639edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7640edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 764169d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7642edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7643edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7644edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7645edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7646edd16368SStephen M. Cameron temp_name[16] = '\0'; 7647edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7648edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7649edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7650edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 765158f8665cSStephen M. Cameron } 7652edd16368SStephen M. Cameron 7653edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7654edd16368SStephen M. Cameron { 7655edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7656edd16368SStephen M. Cameron 7657edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7658edd16368SStephen M. Cameron return 0; 7659edd16368SStephen M. Cameron offset = 0; 7660edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7661edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7662edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7663edd16368SStephen M. Cameron offset += 4; 7664edd16368SStephen M. Cameron else { 7665edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7666edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7667edd16368SStephen M. Cameron switch (mem_type) { 7668edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7669edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7670edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7671edd16368SStephen M. Cameron break; 7672edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7673edd16368SStephen M. Cameron offset += 8; 7674edd16368SStephen M. Cameron break; 7675edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7676edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7677edd16368SStephen M. Cameron "base address is invalid\n"); 7678edd16368SStephen M. Cameron return -1; 7679edd16368SStephen M. Cameron break; 7680edd16368SStephen M. Cameron } 7681edd16368SStephen M. Cameron } 7682edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7683edd16368SStephen M. Cameron return i + 1; 7684edd16368SStephen M. Cameron } 7685edd16368SStephen M. Cameron return -1; 7686edd16368SStephen M. Cameron } 7687edd16368SStephen M. Cameron 7688cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7689cc64c817SRobert Elliott { 7690bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7691bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7692cc64c817SRobert Elliott } 7693cc64c817SRobert Elliott 7694edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7695050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7696edd16368SStephen M. Cameron */ 7697bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7698edd16368SStephen M. Cameron { 7699bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7700bc2bb154SChristoph Hellwig int ret; 7701edd16368SStephen M. Cameron 7702edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7703bc2bb154SChristoph Hellwig switch (h->board_id) { 7704bc2bb154SChristoph Hellwig case 0x40700E11: 7705bc2bb154SChristoph Hellwig case 0x40800E11: 7706bc2bb154SChristoph Hellwig case 0x40820E11: 7707bc2bb154SChristoph Hellwig case 0x40830E11: 7708bc2bb154SChristoph Hellwig break; 7709bc2bb154SChristoph Hellwig default: 7710bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7711bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7712bc2bb154SChristoph Hellwig if (ret > 0) { 7713bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7714bc2bb154SChristoph Hellwig return 0; 7715eee0f03aSHannes Reinecke } 7716bc2bb154SChristoph Hellwig 7717bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7718bc2bb154SChristoph Hellwig break; 7719edd16368SStephen M. Cameron } 7720bc2bb154SChristoph Hellwig 7721bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7722bc2bb154SChristoph Hellwig if (ret < 0) 7723bc2bb154SChristoph Hellwig return ret; 7724bc2bb154SChristoph Hellwig return 0; 7725edd16368SStephen M. Cameron } 7726edd16368SStephen M. Cameron 77276f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7728e5c880d1SStephen M. Cameron { 7729e5c880d1SStephen M. Cameron int i; 7730e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7731e5c880d1SStephen M. Cameron 7732e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7733e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7734e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7735e5c880d1SStephen M. Cameron subsystem_vendor_id; 7736e5c880d1SStephen M. Cameron 7737e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7738e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7739e5c880d1SStephen M. Cameron return i; 7740e5c880d1SStephen M. Cameron 77416798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 77426798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 77436798cc0aSStephen M. Cameron !hpsa_allow_any) { 7744e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7745e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7746e5c880d1SStephen M. Cameron return -ENODEV; 7747e5c880d1SStephen M. Cameron } 7748e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7749e5c880d1SStephen M. Cameron } 7750e5c880d1SStephen M. Cameron 77516f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 77523a7774ceSStephen M. Cameron unsigned long *memory_bar) 77533a7774ceSStephen M. Cameron { 77543a7774ceSStephen M. Cameron int i; 77553a7774ceSStephen M. Cameron 77563a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 775712d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 77583a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 775912d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 776012d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 77613a7774ceSStephen M. Cameron *memory_bar); 77623a7774ceSStephen M. Cameron return 0; 77633a7774ceSStephen M. Cameron } 776412d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 77653a7774ceSStephen M. Cameron return -ENODEV; 77663a7774ceSStephen M. Cameron } 77673a7774ceSStephen M. Cameron 77686f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 77696f039790SGreg Kroah-Hartman int wait_for_ready) 77702c4c8c8bSStephen M. Cameron { 7771fe5389c8SStephen M. Cameron int i, iterations; 77722c4c8c8bSStephen M. Cameron u32 scratchpad; 7773fe5389c8SStephen M. Cameron if (wait_for_ready) 7774fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7775fe5389c8SStephen M. Cameron else 7776fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 77772c4c8c8bSStephen M. Cameron 7778fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7779fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7780fe5389c8SStephen M. Cameron if (wait_for_ready) { 77812c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 77822c4c8c8bSStephen M. Cameron return 0; 7783fe5389c8SStephen M. Cameron } else { 7784fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7785fe5389c8SStephen M. Cameron return 0; 7786fe5389c8SStephen M. Cameron } 77872c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 77882c4c8c8bSStephen M. Cameron } 7789fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 77902c4c8c8bSStephen M. Cameron return -ENODEV; 77912c4c8c8bSStephen M. Cameron } 77922c4c8c8bSStephen M. Cameron 77936f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 77946f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7795a51fd47fSStephen M. Cameron u64 *cfg_offset) 7796a51fd47fSStephen M. Cameron { 7797a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7798a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7799a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7800a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7801a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7802a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7803a51fd47fSStephen M. Cameron return -ENODEV; 7804a51fd47fSStephen M. Cameron } 7805a51fd47fSStephen M. Cameron return 0; 7806a51fd47fSStephen M. Cameron } 7807a51fd47fSStephen M. Cameron 7808195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7809195f2c65SRobert Elliott { 7810105a3dbcSRobert Elliott if (h->transtable) { 7811195f2c65SRobert Elliott iounmap(h->transtable); 7812105a3dbcSRobert Elliott h->transtable = NULL; 7813105a3dbcSRobert Elliott } 7814105a3dbcSRobert Elliott if (h->cfgtable) { 7815195f2c65SRobert Elliott iounmap(h->cfgtable); 7816105a3dbcSRobert Elliott h->cfgtable = NULL; 7817105a3dbcSRobert Elliott } 7818195f2c65SRobert Elliott } 7819195f2c65SRobert Elliott 7820195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7821195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7822195f2c65SRobert Elliott + * */ 78236f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7824edd16368SStephen M. Cameron { 782501a02ffcSStephen M. Cameron u64 cfg_offset; 782601a02ffcSStephen M. Cameron u32 cfg_base_addr; 782701a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7828303932fdSDon Brace u32 trans_offset; 7829a51fd47fSStephen M. Cameron int rc; 783077c4495cSStephen M. Cameron 7831a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7832a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7833a51fd47fSStephen M. Cameron if (rc) 7834a51fd47fSStephen M. Cameron return rc; 783577c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7836a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7837cd3c81c4SRobert Elliott if (!h->cfgtable) { 7838cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 783977c4495cSStephen M. Cameron return -ENOMEM; 7840cd3c81c4SRobert Elliott } 7841580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7842580ada3cSStephen M. Cameron if (rc) 7843580ada3cSStephen M. Cameron return rc; 784477c4495cSStephen M. Cameron /* Find performant mode table. */ 7845a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 784677c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 784777c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 784877c4495cSStephen M. Cameron sizeof(*h->transtable)); 7849195f2c65SRobert Elliott if (!h->transtable) { 7850195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7851195f2c65SRobert Elliott hpsa_free_cfgtables(h); 785277c4495cSStephen M. Cameron return -ENOMEM; 7853195f2c65SRobert Elliott } 785477c4495cSStephen M. Cameron return 0; 785577c4495cSStephen M. Cameron } 785677c4495cSStephen M. Cameron 78576f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7858cba3d38bSStephen M. Cameron { 785941ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 786041ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 786141ce4c35SStephen Cameron 786241ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 786372ceeaecSStephen M. Cameron 786472ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 786572ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 786672ceeaecSStephen M. Cameron h->max_commands = 32; 786772ceeaecSStephen M. Cameron 786841ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 786941ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 787041ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 787141ce4c35SStephen Cameron h->max_commands, 787241ce4c35SStephen Cameron MIN_MAX_COMMANDS); 787341ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7874cba3d38bSStephen M. Cameron } 7875cba3d38bSStephen M. Cameron } 7876cba3d38bSStephen M. Cameron 7877c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7878c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7879c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7880c7ee65b3SWebb Scales */ 7881c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7882c7ee65b3SWebb Scales { 7883c7ee65b3SWebb Scales return h->maxsgentries > 512; 7884c7ee65b3SWebb Scales } 7885c7ee65b3SWebb Scales 7886b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7887b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7888b93d7536SStephen M. Cameron * SG chain block size, etc. 7889b93d7536SStephen M. Cameron */ 78906f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7891b93d7536SStephen M. Cameron { 7892cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 789345fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7894b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7895283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7896c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7897c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7898b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 78991a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7900b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7901b93d7536SStephen M. Cameron } else { 7902c7ee65b3SWebb Scales /* 7903c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7904c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7905c7ee65b3SWebb Scales * would lock up the controller) 7906c7ee65b3SWebb Scales */ 7907c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 79081a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7909c7ee65b3SWebb Scales h->chainsize = 0; 7910b93d7536SStephen M. Cameron } 791175167d2cSStephen M. Cameron 791275167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 791375167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 79140e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 79150e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 79160e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 79170e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 79188be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 79198be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7920b93d7536SStephen M. Cameron } 7921b93d7536SStephen M. Cameron 792276c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 792376c46e49SStephen M. Cameron { 79240fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7925050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 792676c46e49SStephen M. Cameron return false; 792776c46e49SStephen M. Cameron } 792876c46e49SStephen M. Cameron return true; 792976c46e49SStephen M. Cameron } 793076c46e49SStephen M. Cameron 793197a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7932f7c39101SStephen M. Cameron { 793397a5e98cSStephen M. Cameron u32 driver_support; 7934f7c39101SStephen M. Cameron 793597a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 79360b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 79370b9e7b74SArnd Bergmann #ifdef CONFIG_X86 793897a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7939f7c39101SStephen M. Cameron #endif 794028e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 794128e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7942f7c39101SStephen M. Cameron } 7943f7c39101SStephen M. Cameron 79443d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 79453d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 79463d0eab67SStephen M. Cameron */ 79473d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 79483d0eab67SStephen M. Cameron { 79493d0eab67SStephen M. Cameron u32 dma_prefetch; 79503d0eab67SStephen M. Cameron 79513d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 79523d0eab67SStephen M. Cameron return; 79533d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 79543d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 79553d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 79563d0eab67SStephen M. Cameron } 79573d0eab67SStephen M. Cameron 7958c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 795976438d08SStephen M. Cameron { 796076438d08SStephen M. Cameron int i; 796176438d08SStephen M. Cameron u32 doorbell_value; 796276438d08SStephen M. Cameron unsigned long flags; 796376438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7964007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 796576438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 796676438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 796776438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 796876438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7969c706a795SRobert Elliott goto done; 797076438d08SStephen M. Cameron /* delay and try again */ 7971007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 797276438d08SStephen M. Cameron } 7973c706a795SRobert Elliott return -ENODEV; 7974c706a795SRobert Elliott done: 7975c706a795SRobert Elliott return 0; 797676438d08SStephen M. Cameron } 797776438d08SStephen M. Cameron 7978c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7979eb6b2ae9SStephen M. Cameron { 7980eb6b2ae9SStephen M. Cameron int i; 79816eaf46fdSStephen M. Cameron u32 doorbell_value; 79826eaf46fdSStephen M. Cameron unsigned long flags; 7983eb6b2ae9SStephen M. Cameron 7984eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7985eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7986eb6b2ae9SStephen M. Cameron * as we enter this code.) 7987eb6b2ae9SStephen M. Cameron */ 7988007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 798925163bd5SWebb Scales if (h->remove_in_progress) 799025163bd5SWebb Scales goto done; 79916eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 79926eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 79936eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7994382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7995c706a795SRobert Elliott goto done; 7996eb6b2ae9SStephen M. Cameron /* delay and try again */ 7997007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7998eb6b2ae9SStephen M. Cameron } 7999c706a795SRobert Elliott return -ENODEV; 8000c706a795SRobert Elliott done: 8001c706a795SRobert Elliott return 0; 80023f4336f3SStephen M. Cameron } 80033f4336f3SStephen M. Cameron 8004c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 80056f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 80063f4336f3SStephen M. Cameron { 80073f4336f3SStephen M. Cameron u32 trans_support; 80083f4336f3SStephen M. Cameron 80093f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 80103f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 80113f4336f3SStephen M. Cameron return -ENOTSUPP; 80123f4336f3SStephen M. Cameron 80133f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8014283b4a9bSStephen M. Cameron 80153f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 80163f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8017b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 80183f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8019c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 8020c706a795SRobert Elliott goto error; 8021eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 8022283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8023283b4a9bSStephen M. Cameron goto error; 8024960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 8025eb6b2ae9SStephen M. Cameron return 0; 8026283b4a9bSStephen M. Cameron error: 8027050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8028283b4a9bSStephen M. Cameron return -ENODEV; 8029eb6b2ae9SStephen M. Cameron } 8030eb6b2ae9SStephen M. Cameron 8031195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 8032195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 8033195f2c65SRobert Elliott { 8034195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 8035195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 8036105a3dbcSRobert Elliott h->vaddr = NULL; 8037195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8038943a7021SRobert Elliott /* 8039943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8040943a7021SRobert Elliott * Documentation/PCI/pci.txt 8041943a7021SRobert Elliott */ 8042195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 8043943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 8044195f2c65SRobert Elliott } 8045195f2c65SRobert Elliott 8046195f2c65SRobert Elliott /* several items must be freed later */ 80476f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 804877c4495cSStephen M. Cameron { 8049eb6b2ae9SStephen M. Cameron int prod_index, err; 8050edd16368SStephen M. Cameron 8051e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8052e5c880d1SStephen M. Cameron if (prod_index < 0) 805360f923b9SRobert Elliott return prod_index; 8054e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 8055e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 8056e5c880d1SStephen M. Cameron 80579b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 80589b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 80599b5c48c2SStephen Cameron 8060e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8061e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8062e5a44df8SMatthew Garrett 806355c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 8064edd16368SStephen M. Cameron if (err) { 8065195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8066943a7021SRobert Elliott pci_disable_device(h->pdev); 8067edd16368SStephen M. Cameron return err; 8068edd16368SStephen M. Cameron } 8069edd16368SStephen M. Cameron 8070f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 8071edd16368SStephen M. Cameron if (err) { 807255c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 8073195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 8074943a7021SRobert Elliott pci_disable_device(h->pdev); 8075943a7021SRobert Elliott return err; 8076edd16368SStephen M. Cameron } 80774fa604e1SRobert Elliott 80784fa604e1SRobert Elliott pci_set_master(h->pdev); 80794fa604e1SRobert Elliott 8080bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 8081bc2bb154SChristoph Hellwig if (err) 8082bc2bb154SChristoph Hellwig goto clean1; 808312d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 80843a7774ceSStephen M. Cameron if (err) 8085195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8086edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 8087204892e9SStephen M. Cameron if (!h->vaddr) { 8088195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8089204892e9SStephen M. Cameron err = -ENOMEM; 8090195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8091204892e9SStephen M. Cameron } 8092fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 80932c4c8c8bSStephen M. Cameron if (err) 8094195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 809577c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 809677c4495cSStephen M. Cameron if (err) 8097195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8098b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8099edd16368SStephen M. Cameron 810076c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8101edd16368SStephen M. Cameron err = -ENODEV; 8102195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8103edd16368SStephen M. Cameron } 810497a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 81053d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8106eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8107eb6b2ae9SStephen M. Cameron if (err) 8108195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8109edd16368SStephen M. Cameron return 0; 8110edd16368SStephen M. Cameron 8111195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8112195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8113195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8114204892e9SStephen M. Cameron iounmap(h->vaddr); 8115105a3dbcSRobert Elliott h->vaddr = NULL; 8116195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8117195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8118bc2bb154SChristoph Hellwig clean1: 8119943a7021SRobert Elliott /* 8120943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8121943a7021SRobert Elliott * Documentation/PCI/pci.txt 8122943a7021SRobert Elliott */ 8123195f2c65SRobert Elliott pci_disable_device(h->pdev); 8124943a7021SRobert Elliott pci_release_regions(h->pdev); 8125edd16368SStephen M. Cameron return err; 8126edd16368SStephen M. Cameron } 8127edd16368SStephen M. Cameron 81286f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8129339b2b14SStephen M. Cameron { 8130339b2b14SStephen M. Cameron int rc; 8131339b2b14SStephen M. Cameron 8132339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8133339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8134339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8135339b2b14SStephen M. Cameron return; 8136339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8137339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8138339b2b14SStephen M. Cameron if (rc != 0) { 8139339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8140339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8141339b2b14SStephen M. Cameron } 8142339b2b14SStephen M. Cameron } 8143339b2b14SStephen M. Cameron 81446b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8145edd16368SStephen M. Cameron { 81461df8552aSStephen M. Cameron int rc, i; 81473b747298STomas Henzl void __iomem *vaddr; 8148edd16368SStephen M. Cameron 81494c2a8c40SStephen M. Cameron if (!reset_devices) 81504c2a8c40SStephen M. Cameron return 0; 81514c2a8c40SStephen M. Cameron 8152132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8153132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8154132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8155132aa220STomas Henzl */ 8156132aa220STomas Henzl rc = pci_enable_device(pdev); 8157132aa220STomas Henzl if (rc) { 8158132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8159132aa220STomas Henzl return -ENODEV; 8160132aa220STomas Henzl } 8161132aa220STomas Henzl pci_disable_device(pdev); 8162132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8163132aa220STomas Henzl rc = pci_enable_device(pdev); 8164132aa220STomas Henzl if (rc) { 8165132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8166132aa220STomas Henzl return -ENODEV; 8167132aa220STomas Henzl } 81684fa604e1SRobert Elliott 8169859c75abSTomas Henzl pci_set_master(pdev); 81704fa604e1SRobert Elliott 81713b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 81723b747298STomas Henzl if (vaddr == NULL) { 81733b747298STomas Henzl rc = -ENOMEM; 81743b747298STomas Henzl goto out_disable; 81753b747298STomas Henzl } 81763b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 81773b747298STomas Henzl iounmap(vaddr); 81783b747298STomas Henzl 81791df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 81806b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8181edd16368SStephen M. Cameron 81821df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 81831df8552aSStephen M. Cameron * but it's already (and still) up and running in 818418867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 818518867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 81861df8552aSStephen M. Cameron */ 8187adf1b3a3SRobert Elliott if (rc) 8188132aa220STomas Henzl goto out_disable; 8189edd16368SStephen M. Cameron 8190edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 81911ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8192edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8193edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8194edd16368SStephen M. Cameron break; 8195edd16368SStephen M. Cameron else 8196edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8197edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8198edd16368SStephen M. Cameron } 8199132aa220STomas Henzl 8200132aa220STomas Henzl out_disable: 8201132aa220STomas Henzl 8202132aa220STomas Henzl pci_disable_device(pdev); 8203132aa220STomas Henzl return rc; 8204edd16368SStephen M. Cameron } 8205edd16368SStephen M. Cameron 82061fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 82071fb7c98aSRobert Elliott { 82081fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8209105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8210105a3dbcSRobert Elliott if (h->cmd_pool) { 82111fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82121fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 82131fb7c98aSRobert Elliott h->cmd_pool, 82141fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8215105a3dbcSRobert Elliott h->cmd_pool = NULL; 8216105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8217105a3dbcSRobert Elliott } 8218105a3dbcSRobert Elliott if (h->errinfo_pool) { 82191fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82201fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 82211fb7c98aSRobert Elliott h->errinfo_pool, 82221fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8223105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8224105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8225105a3dbcSRobert Elliott } 82261fb7c98aSRobert Elliott } 82271fb7c98aSRobert Elliott 8228d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 82292e9d1b36SStephen M. Cameron { 82302e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 82312e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 82322e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 82332e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 82342e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 82352e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 82362e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 82372e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 82382e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 82392e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 82402e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 82412e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 82422e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 82432c143342SRobert Elliott goto clean_up; 82442e9d1b36SStephen M. Cameron } 8245360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 82462e9d1b36SStephen M. Cameron return 0; 82472c143342SRobert Elliott clean_up: 82482c143342SRobert Elliott hpsa_free_cmd_pool(h); 82492c143342SRobert Elliott return -ENOMEM; 82502e9d1b36SStephen M. Cameron } 82512e9d1b36SStephen M. Cameron 8252ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8253ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8254ec501a18SRobert Elliott { 8255ec501a18SRobert Elliott int i; 8256ec501a18SRobert Elliott 8257bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8258ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 82597dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8260bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8261ec501a18SRobert Elliott return; 8262ec501a18SRobert Elliott } 8263ec501a18SRobert Elliott 8264bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8265bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8266105a3dbcSRobert Elliott h->q[i] = 0; 8267ec501a18SRobert Elliott } 8268a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8269a4e17fc1SRobert Elliott h->q[i] = 0; 8270ec501a18SRobert Elliott } 8271ec501a18SRobert Elliott 82729ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 82739ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 82740ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 82750ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 82760ae01a32SStephen M. Cameron { 8277254f796bSMatt Gates int rc, i; 82780ae01a32SStephen M. Cameron 8279254f796bSMatt Gates /* 8280254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8281254f796bSMatt Gates * queue to process. 8282254f796bSMatt Gates */ 8283254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8284254f796bSMatt Gates h->q[i] = (u8) i; 8285254f796bSMatt Gates 8286bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8287254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8288bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 82898b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8290bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 82918b47004aSRobert Elliott 0, h->intrname[i], 8292254f796bSMatt Gates &h->q[i]); 8293a4e17fc1SRobert Elliott if (rc) { 8294a4e17fc1SRobert Elliott int j; 8295a4e17fc1SRobert Elliott 8296a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8297a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8298bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8299a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8300bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8301a4e17fc1SRobert Elliott h->q[j] = 0; 8302a4e17fc1SRobert Elliott } 8303a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8304a4e17fc1SRobert Elliott h->q[j] = 0; 8305a4e17fc1SRobert Elliott return rc; 8306a4e17fc1SRobert Elliott } 8307a4e17fc1SRobert Elliott } 8308254f796bSMatt Gates } else { 8309254f796bSMatt Gates /* Use single reply pool */ 8310bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8311bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8312bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8313bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83148b47004aSRobert Elliott msixhandler, 0, 8315bc2bb154SChristoph Hellwig h->intrname[0], 8316254f796bSMatt Gates &h->q[h->intr_mode]); 8317254f796bSMatt Gates } else { 83188b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 83198b47004aSRobert Elliott "%s-intx", h->devname); 8320bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83218b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8322bc2bb154SChristoph Hellwig h->intrname[0], 8323254f796bSMatt Gates &h->q[h->intr_mode]); 8324254f796bSMatt Gates } 8325254f796bSMatt Gates } 83260ae01a32SStephen M. Cameron if (rc) { 8327195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8328bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 8329195f2c65SRobert Elliott hpsa_free_irqs(h); 83300ae01a32SStephen M. Cameron return -ENODEV; 83310ae01a32SStephen M. Cameron } 83320ae01a32SStephen M. Cameron return 0; 83330ae01a32SStephen M. Cameron } 83340ae01a32SStephen M. Cameron 83356f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 833664670ac8SStephen M. Cameron { 833739c53f55SRobert Elliott int rc; 8338bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 833964670ac8SStephen M. Cameron 834064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 834139c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 834239c53f55SRobert Elliott if (rc) { 834364670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 834439c53f55SRobert Elliott return rc; 834564670ac8SStephen M. Cameron } 834664670ac8SStephen M. Cameron 834764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 834839c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 834939c53f55SRobert Elliott if (rc) { 835064670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 835164670ac8SStephen M. Cameron "after soft reset.\n"); 835239c53f55SRobert Elliott return rc; 835364670ac8SStephen M. Cameron } 835464670ac8SStephen M. Cameron 835564670ac8SStephen M. Cameron return 0; 835664670ac8SStephen M. Cameron } 835764670ac8SStephen M. Cameron 8358072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8359072b0518SStephen M. Cameron { 8360072b0518SStephen M. Cameron int i; 8361072b0518SStephen M. Cameron 8362072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8363072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8364072b0518SStephen M. Cameron continue; 83651fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 83661fb7c98aSRobert Elliott h->reply_queue_size, 83671fb7c98aSRobert Elliott h->reply_queue[i].head, 83681fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8369072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8370072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8371072b0518SStephen M. Cameron } 8372105a3dbcSRobert Elliott h->reply_queue_size = 0; 8373072b0518SStephen M. Cameron } 8374072b0518SStephen M. Cameron 83750097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 83760097f0f4SStephen M. Cameron { 8377105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8378105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8379105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8380105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83812946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 83822946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 83832946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 83849ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 83859ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 83869ecd953aSRobert Elliott if (h->resubmit_wq) { 83879ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 83889ecd953aSRobert Elliott h->resubmit_wq = NULL; 83899ecd953aSRobert Elliott } 83909ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 83919ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 83929ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 83939ecd953aSRobert Elliott } 8394105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 839564670ac8SStephen M. Cameron } 839664670ac8SStephen M. Cameron 8397a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8398f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8399a0c12413SStephen M. Cameron { 8400281a7fd0SWebb Scales int i, refcount; 8401281a7fd0SWebb Scales struct CommandList *c; 840225163bd5SWebb Scales int failcount = 0; 8403a0c12413SStephen M. Cameron 8404080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8405f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8406f2405db8SDon Brace c = h->cmd_pool + i; 8407281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8408281a7fd0SWebb Scales if (refcount > 1) { 840925163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 84105a3d16f5SStephen M. Cameron finish_cmd(c); 8411433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 841225163bd5SWebb Scales failcount++; 8413a0c12413SStephen M. Cameron } 8414281a7fd0SWebb Scales cmd_free(h, c); 8415281a7fd0SWebb Scales } 841625163bd5SWebb Scales dev_warn(&h->pdev->dev, 841725163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8418a0c12413SStephen M. Cameron } 8419a0c12413SStephen M. Cameron 8420094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8421094963daSStephen M. Cameron { 8422c8ed0010SRusty Russell int cpu; 8423094963daSStephen M. Cameron 8424c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8425094963daSStephen M. Cameron u32 *lockup_detected; 8426094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8427094963daSStephen M. Cameron *lockup_detected = value; 8428094963daSStephen M. Cameron } 8429094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8430094963daSStephen M. Cameron } 8431094963daSStephen M. Cameron 8432a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8433a0c12413SStephen M. Cameron { 8434a0c12413SStephen M. Cameron unsigned long flags; 8435094963daSStephen M. Cameron u32 lockup_detected; 8436a0c12413SStephen M. Cameron 8437a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8438a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8439094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8440094963daSStephen M. Cameron if (!lockup_detected) { 8441094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8442094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 844325163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 844425163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8445094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8446094963daSStephen M. Cameron } 8447094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8448a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 844925163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 845025163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8451a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8452f2405db8SDon Brace fail_all_outstanding_cmds(h); 8453a0c12413SStephen M. Cameron } 8454a0c12413SStephen M. Cameron 845525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8456a0c12413SStephen M. Cameron { 8457a0c12413SStephen M. Cameron u64 now; 8458a0c12413SStephen M. Cameron u32 heartbeat; 8459a0c12413SStephen M. Cameron unsigned long flags; 8460a0c12413SStephen M. Cameron 8461a0c12413SStephen M. Cameron now = get_jiffies_64(); 8462a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8463a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8464e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 846525163bd5SWebb Scales return false; 8466a0c12413SStephen M. Cameron 8467a0c12413SStephen M. Cameron /* 8468a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8469a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8470a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8471a0c12413SStephen M. Cameron */ 8472a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8473e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 847425163bd5SWebb Scales return false; 8475a0c12413SStephen M. Cameron 8476a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8477a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8478a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8479a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8480a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8481a0c12413SStephen M. Cameron controller_lockup_detected(h); 848225163bd5SWebb Scales return true; 8483a0c12413SStephen M. Cameron } 8484a0c12413SStephen M. Cameron 8485a0c12413SStephen M. Cameron /* We're ok. */ 8486a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8487a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 848825163bd5SWebb Scales return false; 8489a0c12413SStephen M. Cameron } 8490a0c12413SStephen M. Cameron 84919846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 849276438d08SStephen M. Cameron { 849376438d08SStephen M. Cameron int i; 849476438d08SStephen M. Cameron char *event_type; 849576438d08SStephen M. Cameron 8496e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8497e4aa3e6aSStephen Cameron return; 8498e4aa3e6aSStephen Cameron 849976438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 85001f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 85011f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 850276438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 850376438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 850476438d08SStephen M. Cameron 850576438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 850676438d08SStephen M. Cameron event_type = "state change"; 850776438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 850876438d08SStephen M. Cameron event_type = "configuration change"; 850976438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 851076438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 85115323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 851276438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 85135323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 85145323ed74SDon Brace } 851523100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 851676438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 851776438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 851876438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 851976438d08SStephen M. Cameron h->events, event_type); 852076438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 852176438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 852276438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 852376438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 852476438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 852576438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 852676438d08SStephen M. Cameron } else { 852776438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 852876438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 852976438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 853076438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 853176438d08SStephen M. Cameron #if 0 853276438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 853376438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 853476438d08SStephen M. Cameron #endif 853576438d08SStephen M. Cameron } 85369846590eSStephen M. Cameron return; 853776438d08SStephen M. Cameron } 853876438d08SStephen M. Cameron 853976438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 854076438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8541e863d68eSScott Teel * we should rescan the controller for devices. 8542e863d68eSScott Teel * Also check flag for driver-initiated rescan. 854376438d08SStephen M. Cameron */ 85449846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 854576438d08SStephen M. Cameron { 8546853633e8SDon Brace if (h->drv_req_rescan) { 8547853633e8SDon Brace h->drv_req_rescan = 0; 8548853633e8SDon Brace return 1; 8549853633e8SDon Brace } 8550853633e8SDon Brace 855176438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 85529846590eSStephen M. Cameron return 0; 855376438d08SStephen M. Cameron 855476438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 85559846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 85569846590eSStephen M. Cameron } 855776438d08SStephen M. Cameron 855876438d08SStephen M. Cameron /* 85599846590eSStephen M. Cameron * Check if any of the offline devices have become ready 856076438d08SStephen M. Cameron */ 85619846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 85629846590eSStephen M. Cameron { 85639846590eSStephen M. Cameron unsigned long flags; 85649846590eSStephen M. Cameron struct offline_device_entry *d; 85659846590eSStephen M. Cameron struct list_head *this, *tmp; 85669846590eSStephen M. Cameron 85679846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 85689846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 85699846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 85709846590eSStephen M. Cameron offline_list); 85719846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8572d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8573d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8574d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8575d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85769846590eSStephen M. Cameron return 1; 8577d1fea47cSStephen M. Cameron } 85789846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 857976438d08SStephen M. Cameron } 85809846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85819846590eSStephen M. Cameron return 0; 85829846590eSStephen M. Cameron } 85839846590eSStephen M. Cameron 858434592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 858534592254SScott Teel { 858634592254SScott Teel int rc = 1; /* assume there are changes */ 858734592254SScott Teel struct ReportLUNdata *logdev = NULL; 858834592254SScott Teel 858934592254SScott Teel /* if we can't find out if lun data has changed, 859034592254SScott Teel * assume that it has. 859134592254SScott Teel */ 859234592254SScott Teel 859334592254SScott Teel if (!h->lastlogicals) 859434592254SScott Teel goto out; 859534592254SScott Teel 859634592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 859734592254SScott Teel if (!logdev) { 859834592254SScott Teel dev_warn(&h->pdev->dev, 859934592254SScott Teel "Out of memory, can't track lun changes.\n"); 860034592254SScott Teel goto out; 860134592254SScott Teel } 860234592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 860334592254SScott Teel dev_warn(&h->pdev->dev, 860434592254SScott Teel "report luns failed, can't track lun changes.\n"); 860534592254SScott Teel goto out; 860634592254SScott Teel } 860734592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 860834592254SScott Teel dev_info(&h->pdev->dev, 860934592254SScott Teel "Lun changes detected.\n"); 861034592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 861134592254SScott Teel goto out; 861234592254SScott Teel } else 861334592254SScott Teel rc = 0; /* no changes detected. */ 861434592254SScott Teel out: 861534592254SScott Teel kfree(logdev); 861634592254SScott Teel return rc; 861734592254SScott Teel } 861834592254SScott Teel 86196636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8620a0c12413SStephen M. Cameron { 8621a0c12413SStephen M. Cameron unsigned long flags; 86228a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 86236636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 86246636e7f4SDon Brace 86256636e7f4SDon Brace 86266636e7f4SDon Brace if (h->remove_in_progress) 86278a98db73SStephen M. Cameron return; 86289846590eSStephen M. Cameron 8629bfd7546cSDon Brace /* 8630bfd7546cSDon Brace * Do the scan after the reset 8631bfd7546cSDon Brace */ 8632bfd7546cSDon Brace if (h->reset_in_progress) { 8633bfd7546cSDon Brace h->drv_req_rescan = 1; 8634bfd7546cSDon Brace return; 8635bfd7546cSDon Brace } 8636bfd7546cSDon Brace 86379846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 86389846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 86399846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 86409846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 86419846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 864234592254SScott Teel } else if (h->discovery_polling) { 8643c2adae44SScott Teel hpsa_disable_rld_caching(h); 864434592254SScott Teel if (hpsa_luns_changed(h)) { 864534592254SScott Teel struct Scsi_Host *sh = NULL; 864634592254SScott Teel 864734592254SScott Teel dev_info(&h->pdev->dev, 864834592254SScott Teel "driver discovery polling rescan.\n"); 864934592254SScott Teel sh = scsi_host_get(h->scsi_host); 865034592254SScott Teel if (sh != NULL) { 865134592254SScott Teel hpsa_scan_start(sh); 865234592254SScott Teel scsi_host_put(sh); 865334592254SScott Teel } 865434592254SScott Teel } 86559846590eSStephen M. Cameron } 86566636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86576636e7f4SDon Brace if (!h->remove_in_progress) 86586636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86596636e7f4SDon Brace h->heartbeat_sample_interval); 86606636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86616636e7f4SDon Brace } 86626636e7f4SDon Brace 86636636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86646636e7f4SDon Brace { 86656636e7f4SDon Brace unsigned long flags; 86666636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86676636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86686636e7f4SDon Brace 86696636e7f4SDon Brace detect_controller_lockup(h); 86706636e7f4SDon Brace if (lockup_detected(h)) 86716636e7f4SDon Brace return; 86729846590eSStephen M. Cameron 86738a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86746636e7f4SDon Brace if (!h->remove_in_progress) 86758a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86768a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86778a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8678a0c12413SStephen M. Cameron } 8679a0c12413SStephen M. Cameron 86806636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86816636e7f4SDon Brace char *name) 86826636e7f4SDon Brace { 86836636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86846636e7f4SDon Brace 8685397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86866636e7f4SDon Brace if (!wq) 86876636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86886636e7f4SDon Brace 86896636e7f4SDon Brace return wq; 86906636e7f4SDon Brace } 86916636e7f4SDon Brace 86926f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86934c2a8c40SStephen M. Cameron { 86944c2a8c40SStephen M. Cameron int dac, rc; 86954c2a8c40SStephen M. Cameron struct ctlr_info *h; 869664670ac8SStephen M. Cameron int try_soft_reset = 0; 869764670ac8SStephen M. Cameron unsigned long flags; 86986b6c1cd7STomas Henzl u32 board_id; 86994c2a8c40SStephen M. Cameron 87004c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 87014c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 87024c2a8c40SStephen M. Cameron 87036b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 87046b6c1cd7STomas Henzl if (rc < 0) { 87056b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 87066b6c1cd7STomas Henzl return rc; 87076b6c1cd7STomas Henzl } 87086b6c1cd7STomas Henzl 87096b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 871064670ac8SStephen M. Cameron if (rc) { 871164670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 87124c2a8c40SStephen M. Cameron return rc; 871364670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 871464670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 871564670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 871664670ac8SStephen M. Cameron * point that it can accept a command. 871764670ac8SStephen M. Cameron */ 871864670ac8SStephen M. Cameron try_soft_reset = 1; 871964670ac8SStephen M. Cameron rc = 0; 872064670ac8SStephen M. Cameron } 872164670ac8SStephen M. Cameron 872264670ac8SStephen M. Cameron reinit_after_soft_reset: 87234c2a8c40SStephen M. Cameron 8724303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8725303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8726303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8727303932fdSDon Brace */ 8728303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8729edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8730105a3dbcSRobert Elliott if (!h) { 8731105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8732ecd9aad4SStephen M. Cameron return -ENOMEM; 8733105a3dbcSRobert Elliott } 8734edd16368SStephen M. Cameron 873555c06c71SStephen M. Cameron h->pdev = pdev; 8736105a3dbcSRobert Elliott 8737a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 87389846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 87396eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 87409846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 87416eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 874234f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 87439b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8744094963daSStephen M. Cameron 8745094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8746094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87472a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8748105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87492a5ac326SStephen M. Cameron rc = -ENOMEM; 87502efa5929SRobert Elliott goto clean1; /* aer/h */ 87512a5ac326SStephen M. Cameron } 8752094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8753094963daSStephen M. Cameron 875455c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8755105a3dbcSRobert Elliott if (rc) 87562946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8757edd16368SStephen M. Cameron 87582946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87592946e82bSRobert Elliott * interrupt_mode h->intr */ 87602946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87612946e82bSRobert Elliott if (rc) 87622946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87632946e82bSRobert Elliott 87642946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8765edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8766edd16368SStephen M. Cameron number_of_controllers++; 8767edd16368SStephen M. Cameron 8768edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8769ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8770ecd9aad4SStephen M. Cameron if (rc == 0) { 8771edd16368SStephen M. Cameron dac = 1; 8772ecd9aad4SStephen M. Cameron } else { 8773ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8774ecd9aad4SStephen M. Cameron if (rc == 0) { 8775edd16368SStephen M. Cameron dac = 0; 8776ecd9aad4SStephen M. Cameron } else { 8777edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87782946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8779edd16368SStephen M. Cameron } 8780ecd9aad4SStephen M. Cameron } 8781edd16368SStephen M. Cameron 8782edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8783edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 878410f66018SStephen M. Cameron 8785105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8786105a3dbcSRobert Elliott if (rc) 87872946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8788d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87898947fd10SRobert Elliott if (rc) 87902946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8791105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8792105a3dbcSRobert Elliott if (rc) 87932946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8794a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 87959b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8796d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8797d604f533SWebb Scales mutex_init(&h->reset_mutex); 8798a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8799edd16368SStephen M. Cameron 8800edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 88019a41338eSStephen M. Cameron h->ndevices = 0; 88022946e82bSRobert Elliott 88039a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8804105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8805105a3dbcSRobert Elliott if (rc) 88062946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 88072946e82bSRobert Elliott 88082efa5929SRobert Elliott /* create the resubmit workqueue */ 88092efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 88102efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 88112efa5929SRobert Elliott rc = -ENOMEM; 88122efa5929SRobert Elliott goto clean7; 88132efa5929SRobert Elliott } 88142efa5929SRobert Elliott 88152efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 88162efa5929SRobert Elliott if (!h->resubmit_wq) { 88172efa5929SRobert Elliott rc = -ENOMEM; 88182efa5929SRobert Elliott goto clean7; /* aer/h */ 88192efa5929SRobert Elliott } 882064670ac8SStephen M. Cameron 8821105a3dbcSRobert Elliott /* 8822105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 882364670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 882464670ac8SStephen M. Cameron * the soft reset and see if that works. 882564670ac8SStephen M. Cameron */ 882664670ac8SStephen M. Cameron if (try_soft_reset) { 882764670ac8SStephen M. Cameron 882864670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 882964670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 883064670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 883164670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 883264670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 883364670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 883464670ac8SStephen M. Cameron */ 883564670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 883664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 883764670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8838ec501a18SRobert Elliott hpsa_free_irqs(h); 88399ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 884064670ac8SStephen M. Cameron hpsa_intx_discard_completions); 884164670ac8SStephen M. Cameron if (rc) { 88429ee61794SRobert Elliott dev_warn(&h->pdev->dev, 88439ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8844d498757cSRobert Elliott /* 8845b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8846b2ef480cSRobert Elliott * again. Instead, do its work 8847b2ef480cSRobert Elliott */ 8848b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8849b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8850b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8851b2ef480cSRobert Elliott /* 8852b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8853b2ef480cSRobert Elliott * was just called before request_irqs failed 8854d498757cSRobert Elliott */ 8855d498757cSRobert Elliott goto clean3; 885664670ac8SStephen M. Cameron } 885764670ac8SStephen M. Cameron 885864670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 885964670ac8SStephen M. Cameron if (rc) 886064670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88617ef7323fSDon Brace goto clean7; 886264670ac8SStephen M. Cameron 886364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 886464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 886564670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 886664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 886764670ac8SStephen M. Cameron msleep(10000); 886864670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 886964670ac8SStephen M. Cameron 887064670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 887164670ac8SStephen M. Cameron if (rc) 887264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 887364670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 887464670ac8SStephen M. Cameron 887564670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 887664670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 887764670ac8SStephen M. Cameron * all over again. 887864670ac8SStephen M. Cameron */ 887964670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 888064670ac8SStephen M. Cameron try_soft_reset = 0; 888164670ac8SStephen M. Cameron if (rc) 8882b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 888364670ac8SStephen M. Cameron return -ENODEV; 888464670ac8SStephen M. Cameron 888564670ac8SStephen M. Cameron goto reinit_after_soft_reset; 888664670ac8SStephen M. Cameron } 8887edd16368SStephen M. Cameron 8888da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8889da0697bdSScott Teel h->acciopath_status = 1; 889034592254SScott Teel /* Disable discovery polling.*/ 889134592254SScott Teel h->discovery_polling = 0; 8892da0697bdSScott Teel 8893e863d68eSScott Teel 8894edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8895edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8896edd16368SStephen M. Cameron 8897339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88988a98db73SStephen M. Cameron 889934592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 890034592254SScott Teel if (!h->lastlogicals) 890134592254SScott Teel dev_info(&h->pdev->dev, 890234592254SScott Teel "Can't track change to report lun data\n"); 890334592254SScott Teel 8904cf477237SDon Brace /* hook into SCSI subsystem */ 8905cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8906cf477237SDon Brace if (rc) 8907cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8908cf477237SDon Brace 89098a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 89108a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 89118a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 89128a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 89138a98db73SStephen M. Cameron h->heartbeat_sample_interval); 89146636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 89156636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 89166636e7f4SDon Brace h->heartbeat_sample_interval); 891788bf6d62SStephen M. Cameron return 0; 8918edd16368SStephen M. Cameron 89192946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8920105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8921105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8922105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 892333a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 89242946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 89252e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 89262946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8927ec501a18SRobert Elliott hpsa_free_irqs(h); 89282946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 89292946e82bSRobert Elliott scsi_host_put(h->scsi_host); 89302946e82bSRobert Elliott h->scsi_host = NULL; 89312946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8932195f2c65SRobert Elliott hpsa_free_pci_init(h); 89332946e82bSRobert Elliott clean2: /* lu, aer/h */ 8934105a3dbcSRobert Elliott if (h->lockup_detected) { 8935094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8936105a3dbcSRobert Elliott h->lockup_detected = NULL; 8937105a3dbcSRobert Elliott } 8938105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8939105a3dbcSRobert Elliott if (h->resubmit_wq) { 8940105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8941105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8942105a3dbcSRobert Elliott } 8943105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8944105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8945105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8946105a3dbcSRobert Elliott } 8947edd16368SStephen M. Cameron kfree(h); 8948ecd9aad4SStephen M. Cameron return rc; 8949edd16368SStephen M. Cameron } 8950edd16368SStephen M. Cameron 8951edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8952edd16368SStephen M. Cameron { 8953edd16368SStephen M. Cameron char *flush_buf; 8954edd16368SStephen M. Cameron struct CommandList *c; 895525163bd5SWebb Scales int rc; 8956702890e3SStephen M. Cameron 8957094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8958702890e3SStephen M. Cameron return; 8959edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8960edd16368SStephen M. Cameron if (!flush_buf) 8961edd16368SStephen M. Cameron return; 8962edd16368SStephen M. Cameron 896345fcb86eSStephen Cameron c = cmd_alloc(h); 8964bf43caf3SRobert Elliott 8965a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8966a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8967a2dac136SStephen M. Cameron goto out; 8968a2dac136SStephen M. Cameron } 896925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8970c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 897125163bd5SWebb Scales if (rc) 897225163bd5SWebb Scales goto out; 8973edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8974a2dac136SStephen M. Cameron out: 8975edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8976edd16368SStephen M. Cameron "error flushing cache on controller\n"); 897745fcb86eSStephen Cameron cmd_free(h, c); 8978edd16368SStephen M. Cameron kfree(flush_buf); 8979edd16368SStephen M. Cameron } 8980edd16368SStephen M. Cameron 8981c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8982c2adae44SScott Teel * send down a report luns request 8983c2adae44SScott Teel */ 8984c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8985c2adae44SScott Teel { 8986c2adae44SScott Teel u32 *options; 8987c2adae44SScott Teel struct CommandList *c; 8988c2adae44SScott Teel int rc; 8989c2adae44SScott Teel 8990c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8991c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8992c2adae44SScott Teel return; 8993c2adae44SScott Teel 8994c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8995c2adae44SScott Teel if (!options) { 8996c2adae44SScott Teel dev_err(&h->pdev->dev, 8997c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8998c2adae44SScott Teel return; 8999c2adae44SScott Teel } 9000c2adae44SScott Teel 9001c2adae44SScott Teel c = cmd_alloc(h); 9002c2adae44SScott Teel 9003c2adae44SScott Teel /* first, get the current diag options settings */ 9004c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9005c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9006c2adae44SScott Teel goto errout; 9007c2adae44SScott Teel 9008c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9009c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9010c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9011c2adae44SScott Teel goto errout; 9012c2adae44SScott Teel 9013c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 9014c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9015c2adae44SScott Teel 9016c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9017c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9018c2adae44SScott Teel goto errout; 9019c2adae44SScott Teel 9020c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9021c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9022c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9023c2adae44SScott Teel goto errout; 9024c2adae44SScott Teel 9025c2adae44SScott Teel /* Now verify that it got set: */ 9026c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9027c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9028c2adae44SScott Teel goto errout; 9029c2adae44SScott Teel 9030c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9031c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9032c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9033c2adae44SScott Teel goto errout; 9034c2adae44SScott Teel 9035d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9036c2adae44SScott Teel goto out; 9037c2adae44SScott Teel 9038c2adae44SScott Teel errout: 9039c2adae44SScott Teel dev_err(&h->pdev->dev, 9040c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 9041c2adae44SScott Teel out: 9042c2adae44SScott Teel cmd_free(h, c); 9043c2adae44SScott Teel kfree(options); 9044c2adae44SScott Teel } 9045c2adae44SScott Teel 9046edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 9047edd16368SStephen M. Cameron { 9048edd16368SStephen M. Cameron struct ctlr_info *h; 9049edd16368SStephen M. Cameron 9050edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9051edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9052edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9053edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9054edd16368SStephen M. Cameron */ 9055edd16368SStephen M. Cameron hpsa_flush_cache(h); 9056edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9057105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9058cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9059edd16368SStephen M. Cameron } 9060edd16368SStephen M. Cameron 90616f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 906255e14e76SStephen M. Cameron { 906355e14e76SStephen M. Cameron int i; 906455e14e76SStephen M. Cameron 9065105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 906655e14e76SStephen M. Cameron kfree(h->dev[i]); 9067105a3dbcSRobert Elliott h->dev[i] = NULL; 9068105a3dbcSRobert Elliott } 906955e14e76SStephen M. Cameron } 907055e14e76SStephen M. Cameron 90716f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9072edd16368SStephen M. Cameron { 9073edd16368SStephen M. Cameron struct ctlr_info *h; 90748a98db73SStephen M. Cameron unsigned long flags; 9075edd16368SStephen M. Cameron 9076edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9077edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9078edd16368SStephen M. Cameron return; 9079edd16368SStephen M. Cameron } 9080edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90818a98db73SStephen M. Cameron 90828a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90838a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90848a98db73SStephen M. Cameron h->remove_in_progress = 1; 90858a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90866636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90876636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90886636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90896636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9090cc64c817SRobert Elliott 90912d041306SDon Brace /* 90922d041306SDon Brace * Call before disabling interrupts. 90932d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90942d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90952d041306SDon Brace * operations which cannot complete and will hang the system. 90962d041306SDon Brace */ 90972d041306SDon Brace if (h->scsi_host) 90982d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9099105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9100195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9101edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9102cc64c817SRobert Elliott 9103105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9104105a3dbcSRobert Elliott 91052946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 91062946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 91072946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9108105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9109105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 91101fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 911134592254SScott Teel kfree(h->lastlogicals); 9112105a3dbcSRobert Elliott 9113105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9114195f2c65SRobert Elliott 91152946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 91162946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 91172946e82bSRobert Elliott 9118195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 91192946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9120195f2c65SRobert Elliott 9121105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9122105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9123105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9124d04e62b9SKevin Barnett 9125d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9126d04e62b9SKevin Barnett 9127105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9128edd16368SStephen M. Cameron } 9129edd16368SStephen M. Cameron 9130edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9131edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9132edd16368SStephen M. Cameron { 9133edd16368SStephen M. Cameron return -ENOSYS; 9134edd16368SStephen M. Cameron } 9135edd16368SStephen M. Cameron 9136edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9137edd16368SStephen M. Cameron { 9138edd16368SStephen M. Cameron return -ENOSYS; 9139edd16368SStephen M. Cameron } 9140edd16368SStephen M. Cameron 9141edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9142f79cfec6SStephen M. Cameron .name = HPSA, 9143edd16368SStephen M. Cameron .probe = hpsa_init_one, 91446f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9145edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9146edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9147edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9148edd16368SStephen M. Cameron .resume = hpsa_resume, 9149edd16368SStephen M. Cameron }; 9150edd16368SStephen M. Cameron 9151303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9152303932fdSDon Brace * scatter gather elements supported) and bucket[], 9153303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9154303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9155303932fdSDon Brace * byte increments) which the controller uses to fetch 9156303932fdSDon Brace * commands. This function fills in bucket_map[], which 9157303932fdSDon Brace * maps a given number of scatter gather elements to one of 9158303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9159303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9160303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9161303932fdSDon Brace * bits of the command address. 9162303932fdSDon Brace */ 9163303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91642b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9165303932fdSDon Brace { 9166303932fdSDon Brace int i, j, b, size; 9167303932fdSDon Brace 9168303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9169303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9170303932fdSDon Brace /* Compute size of a command with i SG entries */ 9171e1f7de0cSMatt Gates size = i + min_blocks; 9172303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9173303932fdSDon Brace /* Find the bucket that is just big enough */ 9174e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9175303932fdSDon Brace if (bucket[j] >= size) { 9176303932fdSDon Brace b = j; 9177303932fdSDon Brace break; 9178303932fdSDon Brace } 9179303932fdSDon Brace } 9180303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9181303932fdSDon Brace bucket_map[i] = b; 9182303932fdSDon Brace } 9183303932fdSDon Brace } 9184303932fdSDon Brace 9185105a3dbcSRobert Elliott /* 9186105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9187105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9188105a3dbcSRobert Elliott */ 9189c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9190303932fdSDon Brace { 91916c311b57SStephen M. Cameron int i; 91926c311b57SStephen M. Cameron unsigned long register_value; 9193e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9194e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9195e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9196b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9197b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9198e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9199def342bdSStephen M. Cameron 9200def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9201def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9202def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9203def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9204def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9205def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9206def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9207def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9208def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9209def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9210d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9211def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9212def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9213def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9214def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9215def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9216def342bdSStephen M. Cameron */ 9217d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9218b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9219b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9220b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9221b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9222b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9223b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9224b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9225b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9226b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9227b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9228d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9229303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9230303932fdSDon Brace * 6 = 2 s/g entry or 8k 9231303932fdSDon Brace * 8 = 4 s/g entry or 16k 9232303932fdSDon Brace * 10 = 6 s/g entry or 24k 9233303932fdSDon Brace */ 9234303932fdSDon Brace 9235b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9236b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9237b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9238b3a52e79SStephen M. Cameron */ 9239b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9240b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9241b3a52e79SStephen M. Cameron 9242303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9243072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9244072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9245303932fdSDon Brace 9246d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9247d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9248e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9249303932fdSDon Brace for (i = 0; i < 8; i++) 9250303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9251303932fdSDon Brace 9252303932fdSDon Brace /* size of controller ring buffer */ 9253303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9254254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9255303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9256303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9257254f796bSMatt Gates 9258254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9259254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9260072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9261254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9262254f796bSMatt Gates } 9263254f796bSMatt Gates 9264b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9265e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9266e1f7de0cSMatt Gates /* 9267e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9268e1f7de0cSMatt Gates */ 9269e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9270e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9271e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9272e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9273c349775eSScott Teel } else { 9274c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9275c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9276c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9277c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9278c349775eSScott Teel } 9279e1f7de0cSMatt Gates } 9280303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9281c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9282c706a795SRobert Elliott dev_err(&h->pdev->dev, 9283c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9284c706a795SRobert Elliott return -ENODEV; 9285c706a795SRobert Elliott } 9286303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9287303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9288050f7147SStephen Cameron dev_err(&h->pdev->dev, 9289050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9290c706a795SRobert Elliott return -ENODEV; 9291303932fdSDon Brace } 9292960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9293e1f7de0cSMatt Gates h->access = access; 9294e1f7de0cSMatt Gates h->transMethod = transMethod; 9295e1f7de0cSMatt Gates 9296b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9297b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9298c706a795SRobert Elliott return 0; 9299e1f7de0cSMatt Gates 9300b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9301e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9302e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9303e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9304e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9305e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9306e1f7de0cSMatt Gates } 9307283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9308283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9309e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9310e1f7de0cSMatt Gates 9311e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9312072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9313072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9314072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9315072b0518SStephen M. Cameron h->reply_queue_size); 9316e1f7de0cSMatt Gates 9317e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9318e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9319e1f7de0cSMatt Gates */ 9320e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9321e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9322e1f7de0cSMatt Gates 9323e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9324e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9325e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9326e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9327e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 93282b08b3e9SDon Brace cp->host_context_flags = 93292b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9330e1f7de0cSMatt Gates cp->timeout_sec = 0; 9331e1f7de0cSMatt Gates cp->ReplyQueue = 0; 933250a0decfSStephen M. Cameron cp->tag = 9333f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 933450a0decfSStephen M. Cameron cp->host_addr = 933550a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9336e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9337e1f7de0cSMatt Gates } 9338b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9339b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9340b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9341b9af4937SStephen M. Cameron int rc; 9342b9af4937SStephen M. Cameron 9343b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9344b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9345b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9346b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9347b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9348b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9349b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9350b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9351b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9352b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9353b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9354b9af4937SStephen M. Cameron cfg_base_addr_index) + 9355b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9356b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9357b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9358b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9359b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9360b9af4937SStephen M. Cameron } 9361b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9362c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9363c706a795SRobert Elliott dev_err(&h->pdev->dev, 9364c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9365c706a795SRobert Elliott return -ENODEV; 9366c706a795SRobert Elliott } 9367c706a795SRobert Elliott return 0; 9368e1f7de0cSMatt Gates } 9369e1f7de0cSMatt Gates 93701fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93711fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93721fb7c98aSRobert Elliott { 9373105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93741fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93751fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93761fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93771fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9378105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9379105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9380105a3dbcSRobert Elliott } 93811fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9382105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93831fb7c98aSRobert Elliott } 93841fb7c98aSRobert Elliott 9385d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9386d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9387e1f7de0cSMatt Gates { 9388283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9389283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9390283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9391283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9392283b4a9bSStephen M. Cameron 9393e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9394e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9395e1f7de0cSMatt Gates * hardware. 9396e1f7de0cSMatt Gates */ 9397e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9398e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9399e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9400e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9401e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9402e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9403e1f7de0cSMatt Gates 9404e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9405283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9406e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9407e1f7de0cSMatt Gates 9408e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9409e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9410e1f7de0cSMatt Gates goto clean_up; 9411e1f7de0cSMatt Gates 9412e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9413e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9414e1f7de0cSMatt Gates return 0; 9415e1f7de0cSMatt Gates 9416e1f7de0cSMatt Gates clean_up: 94171fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 94182dd02d74SRobert Elliott return -ENOMEM; 94196c311b57SStephen M. Cameron } 94206c311b57SStephen M. Cameron 94211fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 94221fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 94231fb7c98aSRobert Elliott { 9424d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9425d9a729f3SWebb Scales 9426105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 94271fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 94281fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94291fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 94301fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9431105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9432105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9433105a3dbcSRobert Elliott } 94341fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9435105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 94361fb7c98aSRobert Elliott } 94371fb7c98aSRobert Elliott 9438d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9439d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9440aca9012aSStephen M. Cameron { 9441d9a729f3SWebb Scales int rc; 9442d9a729f3SWebb Scales 9443aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9444aca9012aSStephen M. Cameron 9445aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9446aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9447aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9448aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9449aca9012aSStephen M. Cameron 9450aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9451aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9452aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9453aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9454aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9455aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9456aca9012aSStephen M. Cameron 9457aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9458aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9459aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9460aca9012aSStephen M. Cameron 9461aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9462d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9463d9a729f3SWebb Scales rc = -ENOMEM; 9464d9a729f3SWebb Scales goto clean_up; 9465d9a729f3SWebb Scales } 9466d9a729f3SWebb Scales 9467d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9468d9a729f3SWebb Scales if (rc) 9469aca9012aSStephen M. Cameron goto clean_up; 9470aca9012aSStephen M. Cameron 9471aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9472aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9473aca9012aSStephen M. Cameron return 0; 9474aca9012aSStephen M. Cameron 9475aca9012aSStephen M. Cameron clean_up: 94761fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9477d9a729f3SWebb Scales return rc; 9478aca9012aSStephen M. Cameron } 9479aca9012aSStephen M. Cameron 9480105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9481105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9482105a3dbcSRobert Elliott { 9483105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9484105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9485105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9486105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9487105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9488105a3dbcSRobert Elliott } 9489105a3dbcSRobert Elliott 9490105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9491105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9492105a3dbcSRobert Elliott */ 9493105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94946c311b57SStephen M. Cameron { 94956c311b57SStephen M. Cameron u32 trans_support; 9496e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9497e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9498105a3dbcSRobert Elliott int i, rc; 94996c311b57SStephen M. Cameron 950002ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9501105a3dbcSRobert Elliott return 0; 950202ec19c8SStephen M. Cameron 950367c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 950467c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9505105a3dbcSRobert Elliott return 0; 950667c99a72Sscameron@beardog.cce.hp.com 9507e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9508e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9509e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9510e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9511105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9512105a3dbcSRobert Elliott if (rc) 9513105a3dbcSRobert Elliott return rc; 9514105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9515aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9516aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9517105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9518105a3dbcSRobert Elliott if (rc) 9519105a3dbcSRobert Elliott return rc; 9520e1f7de0cSMatt Gates } 9521e1f7de0cSMatt Gates 9522bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9523cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 95246c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9525072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 95266c311b57SStephen M. Cameron 9527254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9528072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9529072b0518SStephen M. Cameron h->reply_queue_size, 9530072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9531105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9532105a3dbcSRobert Elliott rc = -ENOMEM; 9533105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9534105a3dbcSRobert Elliott } 9535254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9536254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9537254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9538254f796bSMatt Gates } 9539254f796bSMatt Gates 95406c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9541d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95426c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9543105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9544105a3dbcSRobert Elliott rc = -ENOMEM; 9545105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9546105a3dbcSRobert Elliott } 95476c311b57SStephen M. Cameron 9548105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9549105a3dbcSRobert Elliott if (rc) 9550105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9551105a3dbcSRobert Elliott return 0; 9552303932fdSDon Brace 9553105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9554303932fdSDon Brace kfree(h->blockFetchTable); 9555105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9556105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9557105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9558105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9559105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9560105a3dbcSRobert Elliott return rc; 9561303932fdSDon Brace } 9562303932fdSDon Brace 956323100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 956476438d08SStephen M. Cameron { 956523100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 956623100dd9SStephen M. Cameron } 956723100dd9SStephen M. Cameron 956823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 956923100dd9SStephen M. Cameron { 957023100dd9SStephen M. Cameron struct CommandList *c = NULL; 9571f2405db8SDon Brace int i, accel_cmds_out; 9572281a7fd0SWebb Scales int refcount; 957376438d08SStephen M. Cameron 9574f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 957523100dd9SStephen M. Cameron accel_cmds_out = 0; 9576f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9577f2405db8SDon Brace c = h->cmd_pool + i; 9578281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9579281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 958023100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9581281a7fd0SWebb Scales cmd_free(h, c); 9582f2405db8SDon Brace } 958323100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 958476438d08SStephen M. Cameron break; 958576438d08SStephen M. Cameron msleep(100); 958676438d08SStephen M. Cameron } while (1); 958776438d08SStephen M. Cameron } 958876438d08SStephen M. Cameron 9589d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9590d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9591d04e62b9SKevin Barnett { 9592d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9593d04e62b9SKevin Barnett struct sas_phy *phy; 9594d04e62b9SKevin Barnett 9595d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9596d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9597d04e62b9SKevin Barnett return NULL; 9598d04e62b9SKevin Barnett 9599d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9600d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9601d04e62b9SKevin Barnett if (!phy) { 9602d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9603d04e62b9SKevin Barnett return NULL; 9604d04e62b9SKevin Barnett } 9605d04e62b9SKevin Barnett 9606d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9607d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9608d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9609d04e62b9SKevin Barnett 9610d04e62b9SKevin Barnett return hpsa_sas_phy; 9611d04e62b9SKevin Barnett } 9612d04e62b9SKevin Barnett 9613d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9614d04e62b9SKevin Barnett { 9615d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9616d04e62b9SKevin Barnett 9617d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9618d04e62b9SKevin Barnett sas_phy_free(phy); 9619d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9620d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9621d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9622d04e62b9SKevin Barnett } 9623d04e62b9SKevin Barnett 9624d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9625d04e62b9SKevin Barnett { 9626d04e62b9SKevin Barnett int rc; 9627d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9628d04e62b9SKevin Barnett struct sas_phy *phy; 9629d04e62b9SKevin Barnett struct sas_identify *identify; 9630d04e62b9SKevin Barnett 9631d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9632d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9633d04e62b9SKevin Barnett 9634d04e62b9SKevin Barnett identify = &phy->identify; 9635d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9636d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9637d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9638d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9639d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9640d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9641d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9642d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9643d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9644d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9645d04e62b9SKevin Barnett 9646d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9647d04e62b9SKevin Barnett if (rc) 9648d04e62b9SKevin Barnett return rc; 9649d04e62b9SKevin Barnett 9650d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9651d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9652d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9653d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9654d04e62b9SKevin Barnett 9655d04e62b9SKevin Barnett return 0; 9656d04e62b9SKevin Barnett } 9657d04e62b9SKevin Barnett 9658d04e62b9SKevin Barnett static int 9659d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9660d04e62b9SKevin Barnett struct sas_rphy *rphy) 9661d04e62b9SKevin Barnett { 9662d04e62b9SKevin Barnett struct sas_identify *identify; 9663d04e62b9SKevin Barnett 9664d04e62b9SKevin Barnett identify = &rphy->identify; 9665d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9666d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9667d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9668d04e62b9SKevin Barnett 9669d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9670d04e62b9SKevin Barnett } 9671d04e62b9SKevin Barnett 9672d04e62b9SKevin Barnett static struct hpsa_sas_port 9673d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9674d04e62b9SKevin Barnett u64 sas_address) 9675d04e62b9SKevin Barnett { 9676d04e62b9SKevin Barnett int rc; 9677d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9678d04e62b9SKevin Barnett struct sas_port *port; 9679d04e62b9SKevin Barnett 9680d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9681d04e62b9SKevin Barnett if (!hpsa_sas_port) 9682d04e62b9SKevin Barnett return NULL; 9683d04e62b9SKevin Barnett 9684d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9685d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9686d04e62b9SKevin Barnett 9687d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9688d04e62b9SKevin Barnett if (!port) 9689d04e62b9SKevin Barnett goto free_hpsa_port; 9690d04e62b9SKevin Barnett 9691d04e62b9SKevin Barnett rc = sas_port_add(port); 9692d04e62b9SKevin Barnett if (rc) 9693d04e62b9SKevin Barnett goto free_sas_port; 9694d04e62b9SKevin Barnett 9695d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9696d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9697d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9698d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9699d04e62b9SKevin Barnett 9700d04e62b9SKevin Barnett return hpsa_sas_port; 9701d04e62b9SKevin Barnett 9702d04e62b9SKevin Barnett free_sas_port: 9703d04e62b9SKevin Barnett sas_port_free(port); 9704d04e62b9SKevin Barnett free_hpsa_port: 9705d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9706d04e62b9SKevin Barnett 9707d04e62b9SKevin Barnett return NULL; 9708d04e62b9SKevin Barnett } 9709d04e62b9SKevin Barnett 9710d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9711d04e62b9SKevin Barnett { 9712d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9713d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9714d04e62b9SKevin Barnett 9715d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9716d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9717d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9718d04e62b9SKevin Barnett 9719d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9720d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9721d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9722d04e62b9SKevin Barnett } 9723d04e62b9SKevin Barnett 9724d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9725d04e62b9SKevin Barnett { 9726d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9727d04e62b9SKevin Barnett 9728d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9729d04e62b9SKevin Barnett if (hpsa_sas_node) { 9730d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9731d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9732d04e62b9SKevin Barnett } 9733d04e62b9SKevin Barnett 9734d04e62b9SKevin Barnett return hpsa_sas_node; 9735d04e62b9SKevin Barnett } 9736d04e62b9SKevin Barnett 9737d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9738d04e62b9SKevin Barnett { 9739d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9740d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9741d04e62b9SKevin Barnett 9742d04e62b9SKevin Barnett if (!hpsa_sas_node) 9743d04e62b9SKevin Barnett return; 9744d04e62b9SKevin Barnett 9745d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9746d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9747d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9748d04e62b9SKevin Barnett 9749d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9750d04e62b9SKevin Barnett } 9751d04e62b9SKevin Barnett 9752d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9753d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9754d04e62b9SKevin Barnett struct sas_rphy *rphy) 9755d04e62b9SKevin Barnett { 9756d04e62b9SKevin Barnett int i; 9757d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9758d04e62b9SKevin Barnett 9759d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9760d04e62b9SKevin Barnett device = h->dev[i]; 9761d04e62b9SKevin Barnett if (!device->sas_port) 9762d04e62b9SKevin Barnett continue; 9763d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9764d04e62b9SKevin Barnett return device; 9765d04e62b9SKevin Barnett } 9766d04e62b9SKevin Barnett 9767d04e62b9SKevin Barnett return NULL; 9768d04e62b9SKevin Barnett } 9769d04e62b9SKevin Barnett 9770d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9771d04e62b9SKevin Barnett { 9772d04e62b9SKevin Barnett int rc; 9773d04e62b9SKevin Barnett struct device *parent_dev; 9774d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9775d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9776d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9777d04e62b9SKevin Barnett 9778d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9779d04e62b9SKevin Barnett 9780d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9781d04e62b9SKevin Barnett if (!hpsa_sas_node) 9782d04e62b9SKevin Barnett return -ENOMEM; 9783d04e62b9SKevin Barnett 9784d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9785d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9786d04e62b9SKevin Barnett rc = -ENODEV; 9787d04e62b9SKevin Barnett goto free_sas_node; 9788d04e62b9SKevin Barnett } 9789d04e62b9SKevin Barnett 9790d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9791d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9792d04e62b9SKevin Barnett rc = -ENODEV; 9793d04e62b9SKevin Barnett goto free_sas_port; 9794d04e62b9SKevin Barnett } 9795d04e62b9SKevin Barnett 9796d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9797d04e62b9SKevin Barnett if (rc) 9798d04e62b9SKevin Barnett goto free_sas_phy; 9799d04e62b9SKevin Barnett 9800d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9801d04e62b9SKevin Barnett 9802d04e62b9SKevin Barnett return 0; 9803d04e62b9SKevin Barnett 9804d04e62b9SKevin Barnett free_sas_phy: 9805d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9806d04e62b9SKevin Barnett free_sas_port: 9807d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9808d04e62b9SKevin Barnett free_sas_node: 9809d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9810d04e62b9SKevin Barnett 9811d04e62b9SKevin Barnett return rc; 9812d04e62b9SKevin Barnett } 9813d04e62b9SKevin Barnett 9814d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9815d04e62b9SKevin Barnett { 9816d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9817d04e62b9SKevin Barnett } 9818d04e62b9SKevin Barnett 9819d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9820d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9821d04e62b9SKevin Barnett { 9822d04e62b9SKevin Barnett int rc; 9823d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9824d04e62b9SKevin Barnett struct sas_rphy *rphy; 9825d04e62b9SKevin Barnett 9826d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9827d04e62b9SKevin Barnett if (!hpsa_sas_port) 9828d04e62b9SKevin Barnett return -ENOMEM; 9829d04e62b9SKevin Barnett 9830d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9831d04e62b9SKevin Barnett if (!rphy) { 9832d04e62b9SKevin Barnett rc = -ENODEV; 9833d04e62b9SKevin Barnett goto free_sas_port; 9834d04e62b9SKevin Barnett } 9835d04e62b9SKevin Barnett 9836d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9837d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9838d04e62b9SKevin Barnett 9839d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9840d04e62b9SKevin Barnett if (rc) 9841d04e62b9SKevin Barnett goto free_sas_port; 9842d04e62b9SKevin Barnett 9843d04e62b9SKevin Barnett return 0; 9844d04e62b9SKevin Barnett 9845d04e62b9SKevin Barnett free_sas_port: 9846d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9847d04e62b9SKevin Barnett device->sas_port = NULL; 9848d04e62b9SKevin Barnett 9849d04e62b9SKevin Barnett return rc; 9850d04e62b9SKevin Barnett } 9851d04e62b9SKevin Barnett 9852d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9853d04e62b9SKevin Barnett { 9854d04e62b9SKevin Barnett if (device->sas_port) { 9855d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9856d04e62b9SKevin Barnett device->sas_port = NULL; 9857d04e62b9SKevin Barnett } 9858d04e62b9SKevin Barnett } 9859d04e62b9SKevin Barnett 9860d04e62b9SKevin Barnett static int 9861d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9862d04e62b9SKevin Barnett { 9863d04e62b9SKevin Barnett return 0; 9864d04e62b9SKevin Barnett } 9865d04e62b9SKevin Barnett 9866d04e62b9SKevin Barnett static int 9867d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9868d04e62b9SKevin Barnett { 9869aa105695SDan Carpenter *identifier = 0; 9870d04e62b9SKevin Barnett return 0; 9871d04e62b9SKevin Barnett } 9872d04e62b9SKevin Barnett 9873d04e62b9SKevin Barnett static int 9874d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9875d04e62b9SKevin Barnett { 9876d04e62b9SKevin Barnett return -ENXIO; 9877d04e62b9SKevin Barnett } 9878d04e62b9SKevin Barnett 9879d04e62b9SKevin Barnett static int 9880d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9881d04e62b9SKevin Barnett { 9882d04e62b9SKevin Barnett return 0; 9883d04e62b9SKevin Barnett } 9884d04e62b9SKevin Barnett 9885d04e62b9SKevin Barnett static int 9886d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9887d04e62b9SKevin Barnett { 9888d04e62b9SKevin Barnett return 0; 9889d04e62b9SKevin Barnett } 9890d04e62b9SKevin Barnett 9891d04e62b9SKevin Barnett static int 9892d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9893d04e62b9SKevin Barnett { 9894d04e62b9SKevin Barnett return 0; 9895d04e62b9SKevin Barnett } 9896d04e62b9SKevin Barnett 9897d04e62b9SKevin Barnett static void 9898d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9899d04e62b9SKevin Barnett { 9900d04e62b9SKevin Barnett } 9901d04e62b9SKevin Barnett 9902d04e62b9SKevin Barnett static int 9903d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9904d04e62b9SKevin Barnett { 9905d04e62b9SKevin Barnett return -EINVAL; 9906d04e62b9SKevin Barnett } 9907d04e62b9SKevin Barnett 9908d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9909d04e62b9SKevin Barnett static int 9910d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9911d04e62b9SKevin Barnett struct request *req) 9912d04e62b9SKevin Barnett { 9913d04e62b9SKevin Barnett return -EINVAL; 9914d04e62b9SKevin Barnett } 9915d04e62b9SKevin Barnett 9916d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9917d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9918d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9919d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9920d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9921d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9922d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9923d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9924d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9925d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9926d04e62b9SKevin Barnett }; 9927d04e62b9SKevin Barnett 9928edd16368SStephen M. Cameron /* 9929edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9930edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9931edd16368SStephen M. Cameron */ 9932edd16368SStephen M. Cameron static int __init hpsa_init(void) 9933edd16368SStephen M. Cameron { 9934d04e62b9SKevin Barnett int rc; 9935d04e62b9SKevin Barnett 9936d04e62b9SKevin Barnett hpsa_sas_transport_template = 9937d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9938d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9939d04e62b9SKevin Barnett return -ENODEV; 9940d04e62b9SKevin Barnett 9941d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9942d04e62b9SKevin Barnett 9943d04e62b9SKevin Barnett if (rc) 9944d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9945d04e62b9SKevin Barnett 9946d04e62b9SKevin Barnett return rc; 9947edd16368SStephen M. Cameron } 9948edd16368SStephen M. Cameron 9949edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9950edd16368SStephen M. Cameron { 9951edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9952d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9953edd16368SStephen M. Cameron } 9954edd16368SStephen M. Cameron 9955e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9956e1f7de0cSMatt Gates { 9957e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9958dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9959dd0e19f3SScott Teel 9960dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9961dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9962dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9963dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9964dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9965dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9966dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9967dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9968dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9969dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9970dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9971dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9972dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9973dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9974dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9975dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9976dd0e19f3SScott Teel 9977dd0e19f3SScott Teel #undef VERIFY_OFFSET 9978dd0e19f3SScott Teel 9979dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9980b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9981b66cc250SMike Miller 9982b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9983b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9984b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9985b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9986b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9987b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9988b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9989b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9990b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9991b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9992b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9993b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9994b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9995b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9996b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9997b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9998b66cc250SMike Miller 9999b66cc250SMike Miller #undef VERIFY_OFFSET 10000b66cc250SMike Miller 10001b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 10002e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 10003e1f7de0cSMatt Gates 10004e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 10005e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 10006e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 10007e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 10008e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 10009e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 10010e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 10011e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 10012e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 10013e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 10014e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 10015e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 10016e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 10017e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 10018e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 10019e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 10020e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 10021e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 10022e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 10023e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 10024e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 10025e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 1002650a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 10027e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 10028e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 10029e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 10030e1f7de0cSMatt Gates #undef VERIFY_OFFSET 10031e1f7de0cSMatt Gates } 10032e1f7de0cSMatt Gates 10033edd16368SStephen M. Cameron module_init(hpsa_init); 10034edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10035