1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 31358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 41358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 5edd16368SStephen M. Cameron * 6edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 7edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 8edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 9edd16368SStephen M. Cameron * 10edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 11edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 12edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 14edd16368SStephen M. Cameron * 151358f6dcSDon Brace * Questions/Comments/Bugfixes to storagedev@pmcs.com 16edd16368SStephen M. Cameron * 17edd16368SStephen M. Cameron */ 18edd16368SStephen M. Cameron 19edd16368SStephen M. Cameron #include <linux/module.h> 20edd16368SStephen M. Cameron #include <linux/interrupt.h> 21edd16368SStephen M. Cameron #include <linux/types.h> 22edd16368SStephen M. Cameron #include <linux/pci.h> 23e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 24edd16368SStephen M. Cameron #include <linux/kernel.h> 25edd16368SStephen M. Cameron #include <linux/slab.h> 26edd16368SStephen M. Cameron #include <linux/delay.h> 27edd16368SStephen M. Cameron #include <linux/fs.h> 28edd16368SStephen M. Cameron #include <linux/timer.h> 29edd16368SStephen M. Cameron #include <linux/init.h> 30edd16368SStephen M. Cameron #include <linux/spinlock.h> 31edd16368SStephen M. Cameron #include <linux/compat.h> 32edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 33edd16368SStephen M. Cameron #include <linux/uaccess.h> 34edd16368SStephen M. Cameron #include <linux/io.h> 35edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 36edd16368SStephen M. Cameron #include <linux/completion.h> 37edd16368SStephen M. Cameron #include <linux/moduleparam.h> 38edd16368SStephen M. Cameron #include <scsi/scsi.h> 39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 439437ac43SStephen Cameron #include <scsi/scsi_eh.h> 44d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4573153fe5SWebb Scales #include <scsi/scsi_dbg.h> 46edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 47edd16368SStephen M. Cameron #include <linux/string.h> 48edd16368SStephen M. Cameron #include <linux/bitmap.h> 4960063497SArun Sharma #include <linux/atomic.h> 50a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5142a91641SDon Brace #include <linux/percpu-defs.h> 52094963daSStephen M. Cameron #include <linux/percpu.h> 532b08b3e9SDon Brace #include <asm/unaligned.h> 54283b4a9bSStephen M. Cameron #include <asm/div64.h> 55edd16368SStephen M. Cameron #include "hpsa_cmd.h" 56edd16368SStephen M. Cameron #include "hpsa.h" 57edd16368SStephen M. Cameron 58ec2c3aa9SDon Brace /* 59ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 60ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 61ec2c3aa9SDon Brace */ 62ec2c3aa9SDon Brace #define HPSA_DRIVER_VERSION "3.4.14-0" 63edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 64f79cfec6SStephen M. Cameron #define HPSA "hpsa" 65edd16368SStephen M. Cameron 66007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 67007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 68007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 70007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 71edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 72edd16368SStephen M. Cameron 73edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 74edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 75edd16368SStephen M. Cameron 76edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 77edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 78edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 79edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 80edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 81edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 82edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 83edd16368SStephen M. Cameron 84edd16368SStephen M. Cameron static int hpsa_allow_any; 85edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 86edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 87edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8802ec19c8SStephen M. Cameron static int hpsa_simple_mode; 8902ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9002ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9102ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 92edd16368SStephen M. Cameron 93edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 94edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 95edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 100163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 102f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1039143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 110fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1263b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1303b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 135fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 136cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1418e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 146edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 147edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 148edd16368SStephen M. Cameron {0,} 149edd16368SStephen M. Cameron }; 150edd16368SStephen M. Cameron 151edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 152edd16368SStephen M. Cameron 153edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 154edd16368SStephen M. Cameron * product = Marketing Name for the board 155edd16368SStephen M. Cameron * access = Address of the struct of function pointers 156edd16368SStephen M. Cameron */ 157edd16368SStephen M. Cameron static struct board_type products[] = { 158edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 159edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 160edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 161edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 162edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 163163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 164163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1657d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 166fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 167fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 168fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 169fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 170fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 171fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 172fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1731fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1741fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1751fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1761fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1771fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1781fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1791fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18027fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18127fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18227fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18327fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 184c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18527fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18627fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18797b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18827fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 18927fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19027fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19127fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19297b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19327fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19427fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1953b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19727fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 198fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 199cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 200cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 201cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 203cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2048e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 209edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 210edd16368SStephen M. Cameron }; 211edd16368SStephen M. Cameron 212d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 213d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 214d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 216d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 217d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 219d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 220d04e62b9SKevin Barnett struct sas_rphy *rphy); 221d04e62b9SKevin Barnett 222a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 223a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 224a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 225a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 226edd16368SStephen M. Cameron static int number_of_controllers; 227edd16368SStephen M. Cameron 22810f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23042a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 231edd16368SStephen M. Cameron 232edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23342a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23442a91641SDon Brace void __user *arg); 235edd16368SStephen M. Cameron #endif 236edd16368SStephen M. Cameron 237edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 238edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 23973153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24073153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24173153fe5SWebb Scales struct scsi_cmnd *scmd); 242a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 243b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 244edd16368SStephen M. Cameron int cmd_type); 2452c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 246b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 247b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 248edd16368SStephen M. Cameron 249f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 250a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 251a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 252a08a8471SStephen M. Cameron unsigned long elapsed_time); 2537c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 254edd16368SStephen M. Cameron 255edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25675167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 257edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25841ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 259edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 260edd16368SStephen M. Cameron 2618aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 262edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 263edd16368SStephen M. Cameron struct CommandList *c); 264edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 265edd16368SStephen M. Cameron struct CommandList *c); 266303932fdSDon Brace /* performant mode helper functions */ 267303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2682b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 269105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 270105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 271254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2726f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2736f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2741df8552aSStephen M. Cameron u64 *cfg_offset); 2756f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2761df8552aSStephen M. Cameron unsigned long *memory_bar); 2776f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2786f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2796f039790SGreg Kroah-Hartman int wait_for_ready); 28075167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 281c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 282fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 283fe5389c8SStephen M. Cameron #define BOARD_READY 1 28423100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28576438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 286c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 287c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28803383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 289080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29025163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29125163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 292c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 293d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 294d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 29534592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 296edd16368SStephen M. Cameron 297edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 298edd16368SStephen M. Cameron { 299edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 300edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 301edd16368SStephen M. Cameron } 302edd16368SStephen M. Cameron 303a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 304a23513e8SStephen M. Cameron { 305a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 306a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 307a23513e8SStephen M. Cameron } 308a23513e8SStephen M. Cameron 309a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 310a58e7e53SWebb Scales { 311a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 312a58e7e53SWebb Scales } 313a58e7e53SWebb Scales 314d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 315d604f533SWebb Scales { 316d604f533SWebb Scales return c->abort_pending || c->reset_pending; 317d604f533SWebb Scales } 318d604f533SWebb Scales 3199437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3209437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3219437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3229437ac43SStephen Cameron { 3239437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3249437ac43SStephen Cameron bool rc; 3259437ac43SStephen Cameron 3269437ac43SStephen Cameron *sense_key = -1; 3279437ac43SStephen Cameron *asc = -1; 3289437ac43SStephen Cameron *ascq = -1; 3299437ac43SStephen Cameron 3309437ac43SStephen Cameron if (sense_data_len < 1) 3319437ac43SStephen Cameron return; 3329437ac43SStephen Cameron 3339437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3349437ac43SStephen Cameron if (rc) { 3359437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3369437ac43SStephen Cameron *asc = sshdr.asc; 3379437ac43SStephen Cameron *ascq = sshdr.ascq; 3389437ac43SStephen Cameron } 3399437ac43SStephen Cameron } 3409437ac43SStephen Cameron 341edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 342edd16368SStephen M. Cameron struct CommandList *c) 343edd16368SStephen M. Cameron { 3449437ac43SStephen Cameron u8 sense_key, asc, ascq; 3459437ac43SStephen Cameron int sense_len; 3469437ac43SStephen Cameron 3479437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3489437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3499437ac43SStephen Cameron else 3509437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3519437ac43SStephen Cameron 3529437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3539437ac43SStephen Cameron &sense_key, &asc, &ascq); 35481c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 355edd16368SStephen M. Cameron return 0; 356edd16368SStephen M. Cameron 3579437ac43SStephen Cameron switch (asc) { 358edd16368SStephen M. Cameron case STATE_CHANGED: 3599437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3602946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3612946e82bSRobert Elliott h->devname); 362edd16368SStephen M. Cameron break; 363edd16368SStephen M. Cameron case LUN_FAILED: 3647f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3652946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 366edd16368SStephen M. Cameron break; 367edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3687f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 370edd16368SStephen M. Cameron /* 3714f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3724f4eb9f1SScott Teel * target (array) devices. 373edd16368SStephen M. Cameron */ 374edd16368SStephen M. Cameron break; 375edd16368SStephen M. Cameron case POWER_OR_RESET: 3762946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3772946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3782946e82bSRobert Elliott h->devname); 379edd16368SStephen M. Cameron break; 380edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3812946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3822946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3832946e82bSRobert Elliott h->devname); 384edd16368SStephen M. Cameron break; 385edd16368SStephen M. Cameron default: 3862946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3872946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3882946e82bSRobert Elliott h->devname); 389edd16368SStephen M. Cameron break; 390edd16368SStephen M. Cameron } 391edd16368SStephen M. Cameron return 1; 392edd16368SStephen M. Cameron } 393edd16368SStephen M. Cameron 394852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 395852af20aSMatt Bondurant { 396852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 397852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 398852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 399852af20aSMatt Bondurant return 0; 400852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 401852af20aSMatt Bondurant return 1; 402852af20aSMatt Bondurant } 403852af20aSMatt Bondurant 404e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 405e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 406e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 407e985c58fSStephen Cameron { 408e985c58fSStephen Cameron int ld; 409e985c58fSStephen Cameron struct ctlr_info *h; 410e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 411e985c58fSStephen Cameron 412e985c58fSStephen Cameron h = shost_to_hba(shost); 413e985c58fSStephen Cameron ld = lockup_detected(h); 414e985c58fSStephen Cameron 415e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 416e985c58fSStephen Cameron } 417e985c58fSStephen Cameron 418da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 419da0697bdSScott Teel struct device_attribute *attr, 420da0697bdSScott Teel const char *buf, size_t count) 421da0697bdSScott Teel { 422da0697bdSScott Teel int status, len; 423da0697bdSScott Teel struct ctlr_info *h; 424da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 425da0697bdSScott Teel char tmpbuf[10]; 426da0697bdSScott Teel 427da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 428da0697bdSScott Teel return -EACCES; 429da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 430da0697bdSScott Teel strncpy(tmpbuf, buf, len); 431da0697bdSScott Teel tmpbuf[len] = '\0'; 432da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 433da0697bdSScott Teel return -EINVAL; 434da0697bdSScott Teel h = shost_to_hba(shost); 435da0697bdSScott Teel h->acciopath_status = !!status; 436da0697bdSScott Teel dev_warn(&h->pdev->dev, 437da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 438da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 439da0697bdSScott Teel return count; 440da0697bdSScott Teel } 441da0697bdSScott Teel 4422ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4432ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4442ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4452ba8bfc8SStephen M. Cameron { 4462ba8bfc8SStephen M. Cameron int debug_level, len; 4472ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4482ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4492ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4502ba8bfc8SStephen M. Cameron 4512ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4522ba8bfc8SStephen M. Cameron return -EACCES; 4532ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4542ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4552ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4562ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4572ba8bfc8SStephen M. Cameron return -EINVAL; 4582ba8bfc8SStephen M. Cameron if (debug_level < 0) 4592ba8bfc8SStephen M. Cameron debug_level = 0; 4602ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4612ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4622ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4632ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4642ba8bfc8SStephen M. Cameron return count; 4652ba8bfc8SStephen M. Cameron } 4662ba8bfc8SStephen M. Cameron 467edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 468edd16368SStephen M. Cameron struct device_attribute *attr, 469edd16368SStephen M. Cameron const char *buf, size_t count) 470edd16368SStephen M. Cameron { 471edd16368SStephen M. Cameron struct ctlr_info *h; 472edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 473a23513e8SStephen M. Cameron h = shost_to_hba(shost); 47431468401SMike Miller hpsa_scan_start(h->scsi_host); 475edd16368SStephen M. Cameron return count; 476edd16368SStephen M. Cameron } 477edd16368SStephen M. Cameron 478d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 479d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 480d28ce020SStephen M. Cameron { 481d28ce020SStephen M. Cameron struct ctlr_info *h; 482d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 483d28ce020SStephen M. Cameron unsigned char *fwrev; 484d28ce020SStephen M. Cameron 485d28ce020SStephen M. Cameron h = shost_to_hba(shost); 486d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 487d28ce020SStephen M. Cameron return 0; 488d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 489d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 490d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 491d28ce020SStephen M. Cameron } 492d28ce020SStephen M. Cameron 49394a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 49494a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 49594a13649SStephen M. Cameron { 49694a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 49794a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 49894a13649SStephen M. Cameron 4990cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5000cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 50194a13649SStephen M. Cameron } 50294a13649SStephen M. Cameron 503745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 504745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 505745a7a25SStephen M. Cameron { 506745a7a25SStephen M. Cameron struct ctlr_info *h; 507745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 508745a7a25SStephen M. Cameron 509745a7a25SStephen M. Cameron h = shost_to_hba(shost); 510745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 511960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 512745a7a25SStephen M. Cameron "performant" : "simple"); 513745a7a25SStephen M. Cameron } 514745a7a25SStephen M. Cameron 515da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 516da0697bdSScott Teel struct device_attribute *attr, char *buf) 517da0697bdSScott Teel { 518da0697bdSScott Teel struct ctlr_info *h; 519da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 520da0697bdSScott Teel 521da0697bdSScott Teel h = shost_to_hba(shost); 522da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 523da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 524da0697bdSScott Teel } 525da0697bdSScott Teel 52646380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 527941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 528941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 529941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 530941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 531941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 532941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 533941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 534941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 535941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 536941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 537941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 538941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 539941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5407af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 541941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 542941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5435a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5445a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5455a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5465a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5475a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5485a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 549941b1cdaSStephen M. Cameron }; 550941b1cdaSStephen M. Cameron 55146380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 55246380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5537af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5545a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5555a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5565a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5575a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5585a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5595a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56046380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 56146380786SStephen M. Cameron * which share a battery backed cache module. One controls the 56246380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56346380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 56446380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 56546380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 56646380786SStephen M. Cameron */ 56746380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 56846380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 56946380786SStephen M. Cameron }; 57046380786SStephen M. Cameron 5719b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5729b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5739b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5749b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5759b5c48c2SStephen Cameron }; 5769b5c48c2SStephen Cameron 5779b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 578941b1cdaSStephen M. Cameron { 579941b1cdaSStephen M. Cameron int i; 580941b1cdaSStephen M. Cameron 5819b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5829b5c48c2SStephen Cameron if (a[i] == board_id) 583941b1cdaSStephen M. Cameron return 1; 5849b5c48c2SStephen Cameron return 0; 5859b5c48c2SStephen Cameron } 5869b5c48c2SStephen Cameron 5879b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5889b5c48c2SStephen Cameron { 5899b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5909b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 591941b1cdaSStephen M. Cameron } 592941b1cdaSStephen M. Cameron 59346380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 59446380786SStephen M. Cameron { 5959b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 5969b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 59746380786SStephen M. Cameron } 59846380786SStephen M. Cameron 59946380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60046380786SStephen M. Cameron { 60146380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60246380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60346380786SStephen M. Cameron } 60446380786SStephen M. Cameron 6059b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6069b5c48c2SStephen Cameron { 6079b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6089b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6099b5c48c2SStephen Cameron } 6109b5c48c2SStephen Cameron 611941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 612941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 613941b1cdaSStephen M. Cameron { 614941b1cdaSStephen M. Cameron struct ctlr_info *h; 615941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 616941b1cdaSStephen M. Cameron 617941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 61846380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 619941b1cdaSStephen M. Cameron } 620941b1cdaSStephen M. Cameron 621edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 622edd16368SStephen M. Cameron { 623edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 624edd16368SStephen M. Cameron } 625edd16368SStephen M. Cameron 626f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6277c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 628edd16368SStephen M. Cameron }; 6296b80b18fSScott Teel #define HPSA_RAID_0 0 6306b80b18fSScott Teel #define HPSA_RAID_4 1 6316b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6326b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6336b80b18fSScott Teel #define HPSA_RAID_51 4 6346b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6356b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6367c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6377c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 638edd16368SStephen M. Cameron 639f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 640f3f01730SKevin Barnett { 641f3f01730SKevin Barnett return !device->physical_device; 642f3f01730SKevin Barnett } 643edd16368SStephen M. Cameron 644edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 645edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 646edd16368SStephen M. Cameron { 647edd16368SStephen M. Cameron ssize_t l = 0; 64882a72c0aSStephen M. Cameron unsigned char rlevel; 649edd16368SStephen M. Cameron struct ctlr_info *h; 650edd16368SStephen M. Cameron struct scsi_device *sdev; 651edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 652edd16368SStephen M. Cameron unsigned long flags; 653edd16368SStephen M. Cameron 654edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 655edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 656edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 657edd16368SStephen M. Cameron hdev = sdev->hostdata; 658edd16368SStephen M. Cameron if (!hdev) { 659edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 660edd16368SStephen M. Cameron return -ENODEV; 661edd16368SStephen M. Cameron } 662edd16368SStephen M. Cameron 663edd16368SStephen M. Cameron /* Is this even a logical drive? */ 664f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 665edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 666edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 667edd16368SStephen M. Cameron return l; 668edd16368SStephen M. Cameron } 669edd16368SStephen M. Cameron 670edd16368SStephen M. Cameron rlevel = hdev->raid_level; 671edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67282a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 673edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 674edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 675edd16368SStephen M. Cameron return l; 676edd16368SStephen M. Cameron } 677edd16368SStephen M. Cameron 678edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 679edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 680edd16368SStephen M. Cameron { 681edd16368SStephen M. Cameron struct ctlr_info *h; 682edd16368SStephen M. Cameron struct scsi_device *sdev; 683edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 684edd16368SStephen M. Cameron unsigned long flags; 685edd16368SStephen M. Cameron unsigned char lunid[8]; 686edd16368SStephen M. Cameron 687edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 688edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 689edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 690edd16368SStephen M. Cameron hdev = sdev->hostdata; 691edd16368SStephen M. Cameron if (!hdev) { 692edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 693edd16368SStephen M. Cameron return -ENODEV; 694edd16368SStephen M. Cameron } 695edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 696edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 697edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 698edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 699edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 700edd16368SStephen M. Cameron } 701edd16368SStephen M. Cameron 702edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 703edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 704edd16368SStephen M. Cameron { 705edd16368SStephen M. Cameron struct ctlr_info *h; 706edd16368SStephen M. Cameron struct scsi_device *sdev; 707edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 708edd16368SStephen M. Cameron unsigned long flags; 709edd16368SStephen M. Cameron unsigned char sn[16]; 710edd16368SStephen M. Cameron 711edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 712edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 713edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 714edd16368SStephen M. Cameron hdev = sdev->hostdata; 715edd16368SStephen M. Cameron if (!hdev) { 716edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 717edd16368SStephen M. Cameron return -ENODEV; 718edd16368SStephen M. Cameron } 719edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 720edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 721edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 722edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 723edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 724edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 725edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 726edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 727edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 728edd16368SStephen M. Cameron } 729edd16368SStephen M. Cameron 730c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 731c1988684SScott Teel struct device_attribute *attr, char *buf) 732c1988684SScott Teel { 733c1988684SScott Teel struct ctlr_info *h; 734c1988684SScott Teel struct scsi_device *sdev; 735c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 736c1988684SScott Teel unsigned long flags; 737c1988684SScott Teel int offload_enabled; 738c1988684SScott Teel 739c1988684SScott Teel sdev = to_scsi_device(dev); 740c1988684SScott Teel h = sdev_to_hba(sdev); 741c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 742c1988684SScott Teel hdev = sdev->hostdata; 743c1988684SScott Teel if (!hdev) { 744c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 745c1988684SScott Teel return -ENODEV; 746c1988684SScott Teel } 747c1988684SScott Teel offload_enabled = hdev->offload_enabled; 748c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 749c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 750c1988684SScott Teel } 751c1988684SScott Teel 7528270b862SJoe Handzik #define MAX_PATHS 8 7538270b862SJoe Handzik 7548270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7558270b862SJoe Handzik struct device_attribute *attr, char *buf) 7568270b862SJoe Handzik { 7578270b862SJoe Handzik struct ctlr_info *h; 7588270b862SJoe Handzik struct scsi_device *sdev; 7598270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7608270b862SJoe Handzik unsigned long flags; 7618270b862SJoe Handzik int i; 7628270b862SJoe Handzik int output_len = 0; 7638270b862SJoe Handzik u8 box; 7648270b862SJoe Handzik u8 bay; 7658270b862SJoe Handzik u8 path_map_index = 0; 7668270b862SJoe Handzik char *active; 7678270b862SJoe Handzik unsigned char phys_connector[2]; 7688270b862SJoe Handzik 7698270b862SJoe Handzik sdev = to_scsi_device(dev); 7708270b862SJoe Handzik h = sdev_to_hba(sdev); 7718270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7728270b862SJoe Handzik hdev = sdev->hostdata; 7738270b862SJoe Handzik if (!hdev) { 7748270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 7758270b862SJoe Handzik return -ENODEV; 7768270b862SJoe Handzik } 7778270b862SJoe Handzik 7788270b862SJoe Handzik bay = hdev->bay; 7798270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 7808270b862SJoe Handzik path_map_index = 1<<i; 7818270b862SJoe Handzik if (i == hdev->active_path_index) 7828270b862SJoe Handzik active = "Active"; 7838270b862SJoe Handzik else if (hdev->path_map & path_map_index) 7848270b862SJoe Handzik active = "Inactive"; 7858270b862SJoe Handzik else 7868270b862SJoe Handzik continue; 7878270b862SJoe Handzik 7881faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 7891faf072cSRasmus Villemoes PAGE_SIZE - output_len, 7901faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 7918270b862SJoe Handzik h->scsi_host->host_no, 7928270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 7938270b862SJoe Handzik scsi_device_type(hdev->devtype)); 7948270b862SJoe Handzik 79566749d0dSScott Teel if (hdev->external || 796f3f01730SKevin Barnett hdev->devtype == TYPE_RAID || 797f3f01730SKevin Barnett is_logical_device(hdev)) { 798*2708f295SDon Brace output_len += scnprintf(buf + output_len, 7991faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8001faf072cSRasmus Villemoes "%s\n", active); 8018270b862SJoe Handzik continue; 8028270b862SJoe Handzik } 8038270b862SJoe Handzik 8048270b862SJoe Handzik box = hdev->box[i]; 8058270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8068270b862SJoe Handzik sizeof(phys_connector)); 8078270b862SJoe Handzik if (phys_connector[0] < '0') 8088270b862SJoe Handzik phys_connector[0] = '0'; 8098270b862SJoe Handzik if (phys_connector[1] < '0') 8108270b862SJoe Handzik phys_connector[1] = '0'; 8118270b862SJoe Handzik if (hdev->phys_connector[i] > 0) 812*2708f295SDon Brace output_len += scnprintf(buf + output_len, 8131faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8148270b862SJoe Handzik "PORT: %.2s ", 8158270b862SJoe Handzik phys_connector); 8162a168208SKevin Barnett if (hdev->devtype == TYPE_DISK && hdev->expose_device) { 8178270b862SJoe Handzik if (box == 0 || box == 0xFF) { 818*2708f295SDon Brace output_len += scnprintf(buf + output_len, 8191faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8208270b862SJoe Handzik "BAY: %hhu %s\n", 8218270b862SJoe Handzik bay, active); 8228270b862SJoe Handzik } else { 823*2708f295SDon Brace output_len += scnprintf(buf + output_len, 8241faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8258270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8268270b862SJoe Handzik box, bay, active); 8278270b862SJoe Handzik } 8288270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 829*2708f295SDon Brace output_len += scnprintf(buf + output_len, 8301faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8318270b862SJoe Handzik box, active); 8328270b862SJoe Handzik } else 833*2708f295SDon Brace output_len += scnprintf(buf + output_len, 8341faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8358270b862SJoe Handzik } 8368270b862SJoe Handzik 8378270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8381faf072cSRasmus Villemoes return output_len; 8398270b862SJoe Handzik } 8408270b862SJoe Handzik 8413f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8423f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8433f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8443f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 845c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 846c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8478270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 848da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 849da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 850da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8512ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8522ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8533f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8543f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8553f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8563f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8573f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8583f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 859941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 860941b1cdaSStephen M. Cameron host_show_resettable, NULL); 861e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 862e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8633f5eac3aSStephen M. Cameron 8643f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8653f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8663f5eac3aSStephen M. Cameron &dev_attr_lunid, 8673f5eac3aSStephen M. Cameron &dev_attr_unique_id, 868c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8698270b862SJoe Handzik &dev_attr_path_info, 8703f5eac3aSStephen M. Cameron NULL, 8713f5eac3aSStephen M. Cameron }; 8723f5eac3aSStephen M. Cameron 8733f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 8743f5eac3aSStephen M. Cameron &dev_attr_rescan, 8753f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 8763f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 8773f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 878941b1cdaSStephen M. Cameron &dev_attr_resettable, 879da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 8802ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 881fb53c439STomas Henzl &dev_attr_lockup_detected, 8823f5eac3aSStephen M. Cameron NULL, 8833f5eac3aSStephen M. Cameron }; 8843f5eac3aSStephen M. Cameron 88541ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 88641ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 88741ce4c35SStephen Cameron 8883f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 8893f5eac3aSStephen M. Cameron .module = THIS_MODULE, 890f79cfec6SStephen M. Cameron .name = HPSA, 891f79cfec6SStephen M. Cameron .proc_name = HPSA, 8923f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 8933f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 8943f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 8957c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 8963f5eac3aSStephen M. Cameron .this_id = -1, 8973f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 89875167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 8993f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9003f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9013f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 90241ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9033f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9043f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9053f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9063f5eac3aSStephen M. Cameron #endif 9073f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9083f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 909c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 91054b2b50cSMartin K. Petersen .no_write_same = 1, 9113f5eac3aSStephen M. Cameron }; 9123f5eac3aSStephen M. Cameron 913254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9143f5eac3aSStephen M. Cameron { 9153f5eac3aSStephen M. Cameron u32 a; 916072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9173f5eac3aSStephen M. Cameron 918e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 919e1f7de0cSMatt Gates return h->access.command_completed(h, q); 920e1f7de0cSMatt Gates 9213f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 922254f796bSMatt Gates return h->access.command_completed(h, q); 9233f5eac3aSStephen M. Cameron 924254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 925254f796bSMatt Gates a = rq->head[rq->current_entry]; 926254f796bSMatt Gates rq->current_entry++; 9270cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9283f5eac3aSStephen M. Cameron } else { 9293f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9303f5eac3aSStephen M. Cameron } 9313f5eac3aSStephen M. Cameron /* Check for wraparound */ 932254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 933254f796bSMatt Gates rq->current_entry = 0; 934254f796bSMatt Gates rq->wraparound ^= 1; 9353f5eac3aSStephen M. Cameron } 9363f5eac3aSStephen M. Cameron return a; 9373f5eac3aSStephen M. Cameron } 9383f5eac3aSStephen M. Cameron 939c349775eSScott Teel /* 940c349775eSScott Teel * There are some special bits in the bus address of the 941c349775eSScott Teel * command that we have to set for the controller to know 942c349775eSScott Teel * how to process the command: 943c349775eSScott Teel * 944c349775eSScott Teel * Normal performant mode: 945c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 946c349775eSScott Teel * bits 1-3 = block fetch table entry 947c349775eSScott Teel * bits 4-6 = command type (== 0) 948c349775eSScott Teel * 949c349775eSScott Teel * ioaccel1 mode: 950c349775eSScott Teel * bit 0 = "performant mode" bit. 951c349775eSScott Teel * bits 1-3 = block fetch table entry 952c349775eSScott Teel * bits 4-6 = command type (== 110) 953c349775eSScott Teel * (command type is needed because ioaccel1 mode 954c349775eSScott Teel * commands are submitted through the same register as normal 955c349775eSScott Teel * mode commands, so this is how the controller knows whether 956c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 957c349775eSScott Teel * 958c349775eSScott Teel * ioaccel2 mode: 959c349775eSScott Teel * bit 0 = "performant mode" bit. 960c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 961c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 962c349775eSScott Teel * a separate special register for submitting commands. 963c349775eSScott Teel */ 964c349775eSScott Teel 96525163bd5SWebb Scales /* 96625163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9673f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9683f5eac3aSStephen M. Cameron * register number 9693f5eac3aSStephen M. Cameron */ 97025163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 97125163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 97225163bd5SWebb Scales int reply_queue) 9733f5eac3aSStephen M. Cameron { 974254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 9753f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 97625163bd5SWebb Scales if (unlikely(!h->msix_vector)) 97725163bd5SWebb Scales return; 97825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 979254f796bSMatt Gates c->Header.ReplyQueue = 980804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 98125163bd5SWebb Scales else 98225163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 983254f796bSMatt Gates } 9843f5eac3aSStephen M. Cameron } 9853f5eac3aSStephen M. Cameron 986c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 98725163bd5SWebb Scales struct CommandList *c, 98825163bd5SWebb Scales int reply_queue) 989c349775eSScott Teel { 990c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 991c349775eSScott Teel 99225163bd5SWebb Scales /* 99325163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 994c349775eSScott Teel * processor. This seems to give the best I/O throughput. 995c349775eSScott Teel */ 99625163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 997c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 99825163bd5SWebb Scales else 99925163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 100025163bd5SWebb Scales /* 100125163bd5SWebb Scales * Set the bits in the address sent down to include: 1002c349775eSScott Teel * - performant mode bit (bit 0) 1003c349775eSScott Teel * - pull count (bits 1-3) 1004c349775eSScott Teel * - command type (bits 4-6) 1005c349775eSScott Teel */ 1006c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1007c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1008c349775eSScott Teel } 1009c349775eSScott Teel 10108be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10118be986ccSStephen Cameron struct CommandList *c, 10128be986ccSStephen Cameron int reply_queue) 10138be986ccSStephen Cameron { 10148be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10158be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10168be986ccSStephen Cameron 10178be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10188be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10198be986ccSStephen Cameron */ 10208be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10218be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10228be986ccSStephen Cameron else 10238be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10248be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10258be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10268be986ccSStephen Cameron * - pull count (bits 0-3) 10278be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10288be986ccSStephen Cameron */ 10298be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10308be986ccSStephen Cameron } 10318be986ccSStephen Cameron 1032c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 103325163bd5SWebb Scales struct CommandList *c, 103425163bd5SWebb Scales int reply_queue) 1035c349775eSScott Teel { 1036c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1037c349775eSScott Teel 103825163bd5SWebb Scales /* 103925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1040c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1041c349775eSScott Teel */ 104225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1043c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 104425163bd5SWebb Scales else 104525163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 104625163bd5SWebb Scales /* 104725163bd5SWebb Scales * Set the bits in the address sent down to include: 1048c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1049c349775eSScott Teel * - pull count (bits 0-3) 1050c349775eSScott Teel * - command type isn't needed for ioaccel2 1051c349775eSScott Teel */ 1052c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1053c349775eSScott Teel } 1054c349775eSScott Teel 1055e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1056e85c5974SStephen M. Cameron { 1057e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1058e85c5974SStephen M. Cameron } 1059e85c5974SStephen M. Cameron 1060e85c5974SStephen M. Cameron /* 1061e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1062e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1063e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1064e85c5974SStephen M. Cameron */ 1065e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1066e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1067e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1068e85c5974SStephen M. Cameron struct CommandList *c) 1069e85c5974SStephen M. Cameron { 1070e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1071e85c5974SStephen M. Cameron return; 1072e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1073e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1074e85c5974SStephen M. Cameron } 1075e85c5974SStephen M. Cameron 1076e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1077e85c5974SStephen M. Cameron struct CommandList *c) 1078e85c5974SStephen M. Cameron { 1079e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1080e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1081e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1082e85c5974SStephen M. Cameron } 1083e85c5974SStephen M. Cameron 108425163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 108525163bd5SWebb Scales struct CommandList *c, int reply_queue) 10863f5eac3aSStephen M. Cameron { 1087c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1088c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1089c349775eSScott Teel switch (c->cmd_type) { 1090c349775eSScott Teel case CMD_IOACCEL1: 109125163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1092c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1093c349775eSScott Teel break; 1094c349775eSScott Teel case CMD_IOACCEL2: 109525163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1096c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1097c349775eSScott Teel break; 10988be986ccSStephen Cameron case IOACCEL2_TMF: 10998be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11008be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11018be986ccSStephen Cameron break; 1102c349775eSScott Teel default: 110325163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1104f2405db8SDon Brace h->access.submit_command(h, c); 11053f5eac3aSStephen M. Cameron } 1106c05e8866SStephen Cameron } 11073f5eac3aSStephen M. Cameron 1108a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 110925163bd5SWebb Scales { 1110d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1111a58e7e53SWebb Scales return finish_cmd(c); 1112a58e7e53SWebb Scales 111325163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 111425163bd5SWebb Scales } 111525163bd5SWebb Scales 11163f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11173f5eac3aSStephen M. Cameron { 11183f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11193f5eac3aSStephen M. Cameron } 11203f5eac3aSStephen M. Cameron 11213f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11223f5eac3aSStephen M. Cameron { 11233f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11243f5eac3aSStephen M. Cameron return 0; 11253f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11263f5eac3aSStephen M. Cameron return 1; 11273f5eac3aSStephen M. Cameron return 0; 11283f5eac3aSStephen M. Cameron } 11293f5eac3aSStephen M. Cameron 1130edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1131edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1132edd16368SStephen M. Cameron { 1133edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1134edd16368SStephen M. Cameron * assumes h->devlock is held 1135edd16368SStephen M. Cameron */ 1136edd16368SStephen M. Cameron int i, found = 0; 1137cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1138edd16368SStephen M. Cameron 1139263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1140edd16368SStephen M. Cameron 1141edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1142edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1143263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1144edd16368SStephen M. Cameron } 1145edd16368SStephen M. Cameron 1146263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1147263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1148edd16368SStephen M. Cameron /* *bus = 1; */ 1149edd16368SStephen M. Cameron *target = i; 1150edd16368SStephen M. Cameron *lun = 0; 1151edd16368SStephen M. Cameron found = 1; 1152edd16368SStephen M. Cameron } 1153edd16368SStephen M. Cameron return !found; 1154edd16368SStephen M. Cameron } 1155edd16368SStephen M. Cameron 11561d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11570d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11580d96ef5fSWebb Scales { 11597c59a0d4SDon Brace #define LABEL_SIZE 25 11607c59a0d4SDon Brace char label[LABEL_SIZE]; 11617c59a0d4SDon Brace 11629975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11639975ec9dSDon Brace return; 11649975ec9dSDon Brace 11657c59a0d4SDon Brace switch (dev->devtype) { 11667c59a0d4SDon Brace case TYPE_RAID: 11677c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11687c59a0d4SDon Brace break; 11697c59a0d4SDon Brace case TYPE_ENCLOSURE: 11707c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11717c59a0d4SDon Brace break; 11727c59a0d4SDon Brace case TYPE_DISK: 11737c59a0d4SDon Brace if (dev->external) 11747c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 11757c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 11767c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 11777c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 11787c59a0d4SDon Brace else 11797c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 11807c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 11817c59a0d4SDon Brace raid_label[dev->raid_level]); 11827c59a0d4SDon Brace break; 11837c59a0d4SDon Brace case TYPE_ROM: 11847c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 11857c59a0d4SDon Brace break; 11867c59a0d4SDon Brace case TYPE_TAPE: 11877c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 11887c59a0d4SDon Brace break; 11897c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 11907c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 11917c59a0d4SDon Brace break; 11927c59a0d4SDon Brace default: 11937c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 11947c59a0d4SDon Brace break; 11957c59a0d4SDon Brace } 11967c59a0d4SDon Brace 11970d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 11987c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 11990d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12000d96ef5fSWebb Scales description, 12010d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12020d96ef5fSWebb Scales dev->vendor, 12030d96ef5fSWebb Scales dev->model, 12047c59a0d4SDon Brace label, 12050d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12060d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12072a168208SKevin Barnett dev->expose_device); 12080d96ef5fSWebb Scales } 12090d96ef5fSWebb Scales 1210edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12118aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1212edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1213edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1214edd16368SStephen M. Cameron { 1215edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1216edd16368SStephen M. Cameron int n = h->ndevices; 1217edd16368SStephen M. Cameron int i; 1218edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1219edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1220edd16368SStephen M. Cameron 1221cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1222edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1223edd16368SStephen M. Cameron "inaccessible.\n"); 1224edd16368SStephen M. Cameron return -1; 1225edd16368SStephen M. Cameron } 1226edd16368SStephen M. Cameron 1227edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1228edd16368SStephen M. Cameron if (device->lun != -1) 1229edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1230edd16368SStephen M. Cameron goto lun_assigned; 1231edd16368SStephen M. Cameron 1232edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1233edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12342b08b3e9SDon Brace * unit no, zero otherwise. 1235edd16368SStephen M. Cameron */ 1236edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1237edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1238edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1239edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1240edd16368SStephen M. Cameron return -1; 1241edd16368SStephen M. Cameron goto lun_assigned; 1242edd16368SStephen M. Cameron } 1243edd16368SStephen M. Cameron 1244edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1245edd16368SStephen M. Cameron * Search through our list and find the device which 12469a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1247edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1248edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1249edd16368SStephen M. Cameron */ 1250edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1251edd16368SStephen M. Cameron addr1[4] = 0; 12529a4178b7Sshane.seymour addr1[5] = 0; 1253edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1254edd16368SStephen M. Cameron sd = h->dev[i]; 1255edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1256edd16368SStephen M. Cameron addr2[4] = 0; 12579a4178b7Sshane.seymour addr2[5] = 0; 12589a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1259edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1260edd16368SStephen M. Cameron device->bus = sd->bus; 1261edd16368SStephen M. Cameron device->target = sd->target; 1262edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1263edd16368SStephen M. Cameron break; 1264edd16368SStephen M. Cameron } 1265edd16368SStephen M. Cameron } 1266edd16368SStephen M. Cameron if (device->lun == -1) { 1267edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1268edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1269edd16368SStephen M. Cameron "configuration.\n"); 1270edd16368SStephen M. Cameron return -1; 1271edd16368SStephen M. Cameron } 1272edd16368SStephen M. Cameron 1273edd16368SStephen M. Cameron lun_assigned: 1274edd16368SStephen M. Cameron 1275edd16368SStephen M. Cameron h->dev[n] = device; 1276edd16368SStephen M. Cameron h->ndevices++; 1277edd16368SStephen M. Cameron added[*nadded] = device; 1278edd16368SStephen M. Cameron (*nadded)++; 12790d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 12802a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1281a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1282a473d86cSRobert Elliott device->offload_enabled = 0; 1283edd16368SStephen M. Cameron return 0; 1284edd16368SStephen M. Cameron } 1285edd16368SStephen M. Cameron 1286bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 12878aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1288bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1289bd9244f7SScott Teel { 1290a473d86cSRobert Elliott int offload_enabled; 1291bd9244f7SScott Teel /* assumes h->devlock is held */ 1292bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1293bd9244f7SScott Teel 1294bd9244f7SScott Teel /* Raid level changed. */ 1295bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1296250fb125SStephen M. Cameron 129703383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 129803383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 129903383736SDon Brace /* 130003383736SDon Brace * if drive is newly offload_enabled, we want to copy the 130103383736SDon Brace * raid map data first. If previously offload_enabled and 130203383736SDon Brace * offload_config were set, raid map data had better be 130303383736SDon Brace * the same as it was before. if raid map data is changed 130403383736SDon Brace * then it had better be the case that 130503383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 130603383736SDon Brace */ 13079fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 130803383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 130903383736SDon Brace } 1310a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1311a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1312a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1313a3144e0bSJoe Handzik } 1314a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 131503383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 131603383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 131703383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1318250fb125SStephen M. Cameron 131941ce4c35SStephen Cameron /* 132041ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 132141ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 132241ce4c35SStephen Cameron * can't do that until all the devices are updated. 132341ce4c35SStephen Cameron */ 132441ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 132541ce4c35SStephen Cameron if (!new_entry->offload_enabled) 132641ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 132741ce4c35SStephen Cameron 1328a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1329a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13300d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1331a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1332bd9244f7SScott Teel } 1333bd9244f7SScott Teel 13342a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13358aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13362a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13372a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13382a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13392a8ccf31SStephen M. Cameron { 13402a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1341cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13422a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13432a8ccf31SStephen M. Cameron (*nremoved)++; 134401350d05SStephen M. Cameron 134501350d05SStephen M. Cameron /* 134601350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 134701350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 134801350d05SStephen M. Cameron */ 134901350d05SStephen M. Cameron if (new_entry->target == -1) { 135001350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 135101350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 135201350d05SStephen M. Cameron } 135301350d05SStephen M. Cameron 13542a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13552a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13562a8ccf31SStephen M. Cameron (*nadded)++; 13570d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1358a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1359a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13602a8ccf31SStephen M. Cameron } 13612a8ccf31SStephen M. Cameron 1362edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13638aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1364edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1365edd16368SStephen M. Cameron { 1366edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1367edd16368SStephen M. Cameron int i; 1368edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1369edd16368SStephen M. Cameron 1370cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1371edd16368SStephen M. Cameron 1372edd16368SStephen M. Cameron sd = h->dev[entry]; 1373edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1374edd16368SStephen M. Cameron (*nremoved)++; 1375edd16368SStephen M. Cameron 1376edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1377edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1378edd16368SStephen M. Cameron h->ndevices--; 13790d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1380edd16368SStephen M. Cameron } 1381edd16368SStephen M. Cameron 1382edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1383edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1384edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1385edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1386edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1387edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1388edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1389edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1390edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1391edd16368SStephen M. Cameron 1392edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1393edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1394edd16368SStephen M. Cameron { 1395edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1396edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1397edd16368SStephen M. Cameron */ 1398edd16368SStephen M. Cameron unsigned long flags; 1399edd16368SStephen M. Cameron int i, j; 1400edd16368SStephen M. Cameron 1401edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1402edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1403edd16368SStephen M. Cameron if (h->dev[i] == added) { 1404edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1405edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1406edd16368SStephen M. Cameron h->ndevices--; 1407edd16368SStephen M. Cameron break; 1408edd16368SStephen M. Cameron } 1409edd16368SStephen M. Cameron } 1410edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1411edd16368SStephen M. Cameron kfree(added); 1412edd16368SStephen M. Cameron } 1413edd16368SStephen M. Cameron 1414edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1415edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1416edd16368SStephen M. Cameron { 1417edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1418edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1419edd16368SStephen M. Cameron * to differ first 1420edd16368SStephen M. Cameron */ 1421edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1422edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1423edd16368SStephen M. Cameron return 0; 1424edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1425edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1426edd16368SStephen M. Cameron return 0; 1427edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1428edd16368SStephen M. Cameron return 0; 1429edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1430edd16368SStephen M. Cameron return 0; 1431edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1432edd16368SStephen M. Cameron return 0; 1433edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1434edd16368SStephen M. Cameron return 0; 1435edd16368SStephen M. Cameron return 1; 1436edd16368SStephen M. Cameron } 1437edd16368SStephen M. Cameron 1438bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1439bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1440bd9244f7SScott Teel { 1441bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1442bd9244f7SScott Teel * that the device is a different device, nor that the OS 1443bd9244f7SScott Teel * needs to be told anything about the change. 1444bd9244f7SScott Teel */ 1445bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1446bd9244f7SScott Teel return 1; 1447250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1448250fb125SStephen M. Cameron return 1; 1449250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1450250fb125SStephen M. Cameron return 1; 145193849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 145203383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 145303383736SDon Brace return 1; 1454bd9244f7SScott Teel return 0; 1455bd9244f7SScott Teel } 1456bd9244f7SScott Teel 1457edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1458edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1459edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1460bd9244f7SScott Teel * location in *index. 1461bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1462bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1463bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1464edd16368SStephen M. Cameron */ 1465edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1466edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1467edd16368SStephen M. Cameron int *index) 1468edd16368SStephen M. Cameron { 1469edd16368SStephen M. Cameron int i; 1470edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1471edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1472edd16368SStephen M. Cameron #define DEVICE_SAME 2 1473bd9244f7SScott Teel #define DEVICE_UPDATED 3 14741d33d85dSDon Brace if (needle == NULL) 14751d33d85dSDon Brace return DEVICE_NOT_FOUND; 14761d33d85dSDon Brace 1477edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 147823231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 147923231048SStephen M. Cameron continue; 1480edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1481edd16368SStephen M. Cameron *index = i; 1482bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1483bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1484bd9244f7SScott Teel return DEVICE_UPDATED; 1485edd16368SStephen M. Cameron return DEVICE_SAME; 1486bd9244f7SScott Teel } else { 14879846590eSStephen M. Cameron /* Keep offline devices offline */ 14889846590eSStephen M. Cameron if (needle->volume_offline) 14899846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1490edd16368SStephen M. Cameron return DEVICE_CHANGED; 1491edd16368SStephen M. Cameron } 1492edd16368SStephen M. Cameron } 1493bd9244f7SScott Teel } 1494edd16368SStephen M. Cameron *index = -1; 1495edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1496edd16368SStephen M. Cameron } 1497edd16368SStephen M. Cameron 14989846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 14999846590eSStephen M. Cameron unsigned char scsi3addr[]) 15009846590eSStephen M. Cameron { 15019846590eSStephen M. Cameron struct offline_device_entry *device; 15029846590eSStephen M. Cameron unsigned long flags; 15039846590eSStephen M. Cameron 15049846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15059846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15069846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15079846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15089846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15099846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15109846590eSStephen M. Cameron return; 15119846590eSStephen M. Cameron } 15129846590eSStephen M. Cameron } 15139846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15149846590eSStephen M. Cameron 15159846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15169846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15179846590eSStephen M. Cameron if (!device) { 15189846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15199846590eSStephen M. Cameron return; 15209846590eSStephen M. Cameron } 15219846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15229846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15239846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15249846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15259846590eSStephen M. Cameron } 15269846590eSStephen M. Cameron 15279846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15289846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15299846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15309846590eSStephen M. Cameron { 15319846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15329846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15339846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15349846590eSStephen M. Cameron h->scsi_host->host_no, 15359846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15369846590eSStephen M. Cameron switch (sd->volume_offline) { 15379846590eSStephen M. Cameron case HPSA_LV_OK: 15389846590eSStephen M. Cameron break; 15399846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15409846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15419846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15429846590eSStephen M. Cameron h->scsi_host->host_no, 15439846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15449846590eSStephen M. Cameron break; 15455ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15465ca01204SScott Benesh dev_info(&h->pdev->dev, 15475ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15485ca01204SScott Benesh h->scsi_host->host_no, 15495ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15505ca01204SScott Benesh break; 15519846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15529846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15535ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15549846590eSStephen M. Cameron h->scsi_host->host_no, 15559846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15569846590eSStephen M. Cameron break; 15579846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15589846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15599846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15609846590eSStephen M. Cameron h->scsi_host->host_no, 15619846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15629846590eSStephen M. Cameron break; 15639846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15649846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15659846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15669846590eSStephen M. Cameron h->scsi_host->host_no, 15679846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15689846590eSStephen M. Cameron break; 15699846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15709846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15719846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15729846590eSStephen M. Cameron h->scsi_host->host_no, 15739846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15749846590eSStephen M. Cameron break; 15759846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 15769846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15779846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 15789846590eSStephen M. Cameron h->scsi_host->host_no, 15799846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15809846590eSStephen M. Cameron break; 15819846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 15829846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15839846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 15849846590eSStephen M. Cameron h->scsi_host->host_no, 15859846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15869846590eSStephen M. Cameron break; 15879846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 15889846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15899846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 15909846590eSStephen M. Cameron h->scsi_host->host_no, 15919846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15929846590eSStephen M. Cameron break; 15939846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 15949846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15959846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 15969846590eSStephen M. Cameron h->scsi_host->host_no, 15979846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15989846590eSStephen M. Cameron break; 15999846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16009846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16019846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16029846590eSStephen M. Cameron h->scsi_host->host_no, 16039846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16049846590eSStephen M. Cameron break; 16059846590eSStephen M. Cameron } 16069846590eSStephen M. Cameron } 16079846590eSStephen M. Cameron 160803383736SDon Brace /* 160903383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 161003383736SDon Brace * raid offload configured. 161103383736SDon Brace */ 161203383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 161303383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 161403383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 161503383736SDon Brace { 161603383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 161703383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 161803383736SDon Brace int i, j; 161903383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 162003383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 162103383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 162203383736SDon Brace le16_to_cpu(map->layout_map_count) * 162303383736SDon Brace total_disks_per_row; 162403383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 162503383736SDon Brace total_disks_per_row; 162603383736SDon Brace int qdepth; 162703383736SDon Brace 162803383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 162903383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 163003383736SDon Brace 1631d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1632d604f533SWebb Scales 163303383736SDon Brace qdepth = 0; 163403383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 163503383736SDon Brace logical_drive->phys_disk[i] = NULL; 163603383736SDon Brace if (!logical_drive->offload_config) 163703383736SDon Brace continue; 163803383736SDon Brace for (j = 0; j < ndevices; j++) { 16391d33d85dSDon Brace if (dev[j] == NULL) 16401d33d85dSDon Brace continue; 164103383736SDon Brace if (dev[j]->devtype != TYPE_DISK) 164203383736SDon Brace continue; 1643f3f01730SKevin Barnett if (is_logical_device(dev[j])) 164403383736SDon Brace continue; 164503383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 164603383736SDon Brace continue; 164703383736SDon Brace 164803383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 164903383736SDon Brace if (i < nphys_disk) 165003383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 165103383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 165203383736SDon Brace break; 165303383736SDon Brace } 165403383736SDon Brace 165503383736SDon Brace /* 165603383736SDon Brace * This can happen if a physical drive is removed and 165703383736SDon Brace * the logical drive is degraded. In that case, the RAID 165803383736SDon Brace * map data will refer to a physical disk which isn't actually 165903383736SDon Brace * present. And in that case offload_enabled should already 166003383736SDon Brace * be 0, but we'll turn it off here just in case 166103383736SDon Brace */ 166203383736SDon Brace if (!logical_drive->phys_disk[i]) { 166303383736SDon Brace logical_drive->offload_enabled = 0; 166441ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 166541ce4c35SStephen Cameron logical_drive->queue_depth = 8; 166603383736SDon Brace } 166703383736SDon Brace } 166803383736SDon Brace if (nraid_map_entries) 166903383736SDon Brace /* 167003383736SDon Brace * This is correct for reads, too high for full stripe writes, 167103383736SDon Brace * way too high for partial stripe writes 167203383736SDon Brace */ 167303383736SDon Brace logical_drive->queue_depth = qdepth; 167403383736SDon Brace else 167503383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 167603383736SDon Brace } 167703383736SDon Brace 167803383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 167903383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 168003383736SDon Brace { 168103383736SDon Brace int i; 168203383736SDon Brace 168303383736SDon Brace for (i = 0; i < ndevices; i++) { 16841d33d85dSDon Brace if (dev[i] == NULL) 16851d33d85dSDon Brace continue; 168603383736SDon Brace if (dev[i]->devtype != TYPE_DISK) 168703383736SDon Brace continue; 1688f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 168903383736SDon Brace continue; 169041ce4c35SStephen Cameron 169141ce4c35SStephen Cameron /* 169241ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 169341ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 169441ce4c35SStephen Cameron * and since it isn't changing, we do not need to 169541ce4c35SStephen Cameron * update it. 169641ce4c35SStephen Cameron */ 169741ce4c35SStephen Cameron if (dev[i]->offload_enabled) 169841ce4c35SStephen Cameron continue; 169941ce4c35SStephen Cameron 170003383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 170103383736SDon Brace } 170203383736SDon Brace } 170303383736SDon Brace 1704096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1705096ccff4SKevin Barnett { 1706096ccff4SKevin Barnett int rc = 0; 1707096ccff4SKevin Barnett 1708096ccff4SKevin Barnett if (!h->scsi_host) 1709096ccff4SKevin Barnett return 1; 1710096ccff4SKevin Barnett 1711d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1712096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1713096ccff4SKevin Barnett device->target, device->lun); 1714d04e62b9SKevin Barnett else /* HBA */ 1715d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1716d04e62b9SKevin Barnett 1717096ccff4SKevin Barnett return rc; 1718096ccff4SKevin Barnett } 1719096ccff4SKevin Barnett 1720096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1721096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1722096ccff4SKevin Barnett { 1723096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1724096ccff4SKevin Barnett 1725096ccff4SKevin Barnett if (!h->scsi_host) 1726096ccff4SKevin Barnett return; 1727096ccff4SKevin Barnett 1728d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1729096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1730096ccff4SKevin Barnett device->target, device->lun); 1731096ccff4SKevin Barnett if (sdev) { 1732096ccff4SKevin Barnett scsi_remove_device(sdev); 1733096ccff4SKevin Barnett scsi_device_put(sdev); 1734096ccff4SKevin Barnett } else { 1735096ccff4SKevin Barnett /* 1736096ccff4SKevin Barnett * We don't expect to get here. Future commands 1737096ccff4SKevin Barnett * to this device will get a selection timeout as 1738096ccff4SKevin Barnett * if the device were gone. 1739096ccff4SKevin Barnett */ 1740096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1741096ccff4SKevin Barnett "didn't find device for removal."); 1742096ccff4SKevin Barnett } 1743d04e62b9SKevin Barnett } else /* HBA */ 1744d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1745096ccff4SKevin Barnett } 1746096ccff4SKevin Barnett 17478aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1748edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1749edd16368SStephen M. Cameron { 1750edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1751edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1752edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1753edd16368SStephen M. Cameron */ 1754edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1755edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1756edd16368SStephen M. Cameron unsigned long flags; 1757edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1758edd16368SStephen M. Cameron int nadded, nremoved; 1759edd16368SStephen M. Cameron 1760da03ded0SDon Brace /* 1761da03ded0SDon Brace * A reset can cause a device status to change 1762da03ded0SDon Brace * re-schedule the scan to see what happened. 1763da03ded0SDon Brace */ 1764da03ded0SDon Brace if (h->reset_in_progress) { 1765da03ded0SDon Brace h->drv_req_rescan = 1; 1766da03ded0SDon Brace return; 1767da03ded0SDon Brace } 1768edd16368SStephen M. Cameron 1769cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1770cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1771edd16368SStephen M. Cameron 1772edd16368SStephen M. Cameron if (!added || !removed) { 1773edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1774edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1775edd16368SStephen M. Cameron goto free_and_out; 1776edd16368SStephen M. Cameron } 1777edd16368SStephen M. Cameron 1778edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1779edd16368SStephen M. Cameron 1780edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1781edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1782edd16368SStephen M. Cameron * devices which have changed, remove the old device 1783edd16368SStephen M. Cameron * info and add the new device info. 1784bd9244f7SScott Teel * If minor device attributes change, just update 1785bd9244f7SScott Teel * the existing device structure. 1786edd16368SStephen M. Cameron */ 1787edd16368SStephen M. Cameron i = 0; 1788edd16368SStephen M. Cameron nremoved = 0; 1789edd16368SStephen M. Cameron nadded = 0; 1790edd16368SStephen M. Cameron while (i < h->ndevices) { 1791edd16368SStephen M. Cameron csd = h->dev[i]; 1792edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1793edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1794edd16368SStephen M. Cameron changes++; 17958aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1796edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1797edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1798edd16368SStephen M. Cameron changes++; 17998aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18002a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1801c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1802c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1803c7f172dcSStephen M. Cameron */ 1804c7f172dcSStephen M. Cameron sd[entry] = NULL; 1805bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18068aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1807edd16368SStephen M. Cameron } 1808edd16368SStephen M. Cameron i++; 1809edd16368SStephen M. Cameron } 1810edd16368SStephen M. Cameron 1811edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1812edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1813edd16368SStephen M. Cameron */ 1814edd16368SStephen M. Cameron 1815edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1816edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1817edd16368SStephen M. Cameron continue; 18189846590eSStephen M. Cameron 18199846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 18209846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 18219846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 18229846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 18239846590eSStephen M. Cameron */ 18249846590eSStephen M. Cameron if (sd[i]->volume_offline) { 18259846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 18260d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 18279846590eSStephen M. Cameron continue; 18289846590eSStephen M. Cameron } 18299846590eSStephen M. Cameron 1830edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1831edd16368SStephen M. Cameron h->ndevices, &entry); 1832edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1833edd16368SStephen M. Cameron changes++; 18348aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1835edd16368SStephen M. Cameron break; 1836edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1837edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1838edd16368SStephen M. Cameron /* should never happen... */ 1839edd16368SStephen M. Cameron changes++; 1840edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1841edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1842edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1843edd16368SStephen M. Cameron } 1844edd16368SStephen M. Cameron } 184541ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 184641ce4c35SStephen Cameron 184741ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 184841ce4c35SStephen Cameron * any logical drives that need it enabled. 184941ce4c35SStephen Cameron */ 18501d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 18511d33d85dSDon Brace if (h->dev[i] == NULL) 18521d33d85dSDon Brace continue; 185341ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 18541d33d85dSDon Brace } 185541ce4c35SStephen Cameron 1856edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1857edd16368SStephen M. Cameron 18589846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 18599846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 18609846590eSStephen M. Cameron * so don't touch h->dev[] 18619846590eSStephen M. Cameron */ 18629846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 18639846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 18649846590eSStephen M. Cameron continue; 18659846590eSStephen M. Cameron if (sd[i]->volume_offline) 18669846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 18679846590eSStephen M. Cameron } 18689846590eSStephen M. Cameron 1869edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1870edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1871edd16368SStephen M. Cameron * first time through. 1872edd16368SStephen M. Cameron */ 18738aa60681SDon Brace if (!changes) 1874edd16368SStephen M. Cameron goto free_and_out; 1875edd16368SStephen M. Cameron 1876edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1877edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 18781d33d85dSDon Brace if (removed[i] == NULL) 18791d33d85dSDon Brace continue; 1880096ccff4SKevin Barnett if (removed[i]->expose_device) 1881096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1882edd16368SStephen M. Cameron kfree(removed[i]); 1883edd16368SStephen M. Cameron removed[i] = NULL; 1884edd16368SStephen M. Cameron } 1885edd16368SStephen M. Cameron 1886edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1887edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1888096ccff4SKevin Barnett int rc = 0; 1889096ccff4SKevin Barnett 18901d33d85dSDon Brace if (added[i] == NULL) 189141ce4c35SStephen Cameron continue; 18922a168208SKevin Barnett if (!(added[i]->expose_device)) 1893edd16368SStephen M. Cameron continue; 1894096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1895096ccff4SKevin Barnett if (!rc) 1896edd16368SStephen M. Cameron continue; 1897096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1898096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1899edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1900edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1901edd16368SStephen M. Cameron */ 1902edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1903853633e8SDon Brace h->drv_req_rescan = 1; 1904edd16368SStephen M. Cameron } 1905edd16368SStephen M. Cameron 1906edd16368SStephen M. Cameron free_and_out: 1907edd16368SStephen M. Cameron kfree(added); 1908edd16368SStephen M. Cameron kfree(removed); 1909edd16368SStephen M. Cameron } 1910edd16368SStephen M. Cameron 1911edd16368SStephen M. Cameron /* 19129e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1913edd16368SStephen M. Cameron * Assume's h->devlock is held. 1914edd16368SStephen M. Cameron */ 1915edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1916edd16368SStephen M. Cameron int bus, int target, int lun) 1917edd16368SStephen M. Cameron { 1918edd16368SStephen M. Cameron int i; 1919edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1920edd16368SStephen M. Cameron 1921edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1922edd16368SStephen M. Cameron sd = h->dev[i]; 1923edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 1924edd16368SStephen M. Cameron return sd; 1925edd16368SStephen M. Cameron } 1926edd16368SStephen M. Cameron return NULL; 1927edd16368SStephen M. Cameron } 1928edd16368SStephen M. Cameron 1929edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 1930edd16368SStephen M. Cameron { 1931edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1932edd16368SStephen M. Cameron unsigned long flags; 1933edd16368SStephen M. Cameron struct ctlr_info *h; 1934edd16368SStephen M. Cameron 1935edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 1936edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1937d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 1938d04e62b9SKevin Barnett struct scsi_target *starget; 1939d04e62b9SKevin Barnett struct sas_rphy *rphy; 1940d04e62b9SKevin Barnett 1941d04e62b9SKevin Barnett starget = scsi_target(sdev); 1942d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 1943d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 1944d04e62b9SKevin Barnett if (sd) { 1945d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 1946d04e62b9SKevin Barnett sd->lun = sdev->lun; 1947d04e62b9SKevin Barnett } 1948d04e62b9SKevin Barnett } else 1949edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1950edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 1951d04e62b9SKevin Barnett 1952d04e62b9SKevin Barnett if (sd && sd->expose_device) { 195303383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 1954d04e62b9SKevin Barnett sdev->hostdata = sd; 195541ce4c35SStephen Cameron } else 195641ce4c35SStephen Cameron sdev->hostdata = NULL; 1957edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1958edd16368SStephen M. Cameron return 0; 1959edd16368SStephen M. Cameron } 1960edd16368SStephen M. Cameron 196141ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 196241ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 196341ce4c35SStephen Cameron { 196441ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 196541ce4c35SStephen Cameron int queue_depth; 196641ce4c35SStephen Cameron 196741ce4c35SStephen Cameron sd = sdev->hostdata; 19682a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 196941ce4c35SStephen Cameron 197041ce4c35SStephen Cameron if (sd) 197141ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 197241ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 197341ce4c35SStephen Cameron else 197441ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 197541ce4c35SStephen Cameron 197641ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 197741ce4c35SStephen Cameron 197841ce4c35SStephen Cameron return 0; 197941ce4c35SStephen Cameron } 198041ce4c35SStephen Cameron 1981edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 1982edd16368SStephen M. Cameron { 1983bcc44255SStephen M. Cameron /* nothing to do. */ 1984edd16368SStephen M. Cameron } 1985edd16368SStephen M. Cameron 1986d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 1987d9a729f3SWebb Scales { 1988d9a729f3SWebb Scales int i; 1989d9a729f3SWebb Scales 1990d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 1991d9a729f3SWebb Scales return; 1992d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 1993d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 1994d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 1995d9a729f3SWebb Scales } 1996d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 1997d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 1998d9a729f3SWebb Scales } 1999d9a729f3SWebb Scales 2000d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2001d9a729f3SWebb Scales { 2002d9a729f3SWebb Scales int i; 2003d9a729f3SWebb Scales 2004d9a729f3SWebb Scales if (h->chainsize <= 0) 2005d9a729f3SWebb Scales return 0; 2006d9a729f3SWebb Scales 2007d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2008d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2009d9a729f3SWebb Scales GFP_KERNEL); 2010d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2011d9a729f3SWebb Scales return -ENOMEM; 2012d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2013d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2014d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2015d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2016d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2017d9a729f3SWebb Scales goto clean; 2018d9a729f3SWebb Scales } 2019d9a729f3SWebb Scales return 0; 2020d9a729f3SWebb Scales 2021d9a729f3SWebb Scales clean: 2022d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2023d9a729f3SWebb Scales return -ENOMEM; 2024d9a729f3SWebb Scales } 2025d9a729f3SWebb Scales 202633a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 202733a2ffceSStephen M. Cameron { 202833a2ffceSStephen M. Cameron int i; 202933a2ffceSStephen M. Cameron 203033a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 203133a2ffceSStephen M. Cameron return; 203233a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 203333a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 203433a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 203533a2ffceSStephen M. Cameron } 203633a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 203733a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 203833a2ffceSStephen M. Cameron } 203933a2ffceSStephen M. Cameron 2040105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 204133a2ffceSStephen M. Cameron { 204233a2ffceSStephen M. Cameron int i; 204333a2ffceSStephen M. Cameron 204433a2ffceSStephen M. Cameron if (h->chainsize <= 0) 204533a2ffceSStephen M. Cameron return 0; 204633a2ffceSStephen M. Cameron 204733a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 204833a2ffceSStephen M. Cameron GFP_KERNEL); 20493d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 20503d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 205133a2ffceSStephen M. Cameron return -ENOMEM; 20523d4e6af8SRobert Elliott } 205333a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 205433a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 205533a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 20563d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 20573d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 205833a2ffceSStephen M. Cameron goto clean; 205933a2ffceSStephen M. Cameron } 20603d4e6af8SRobert Elliott } 206133a2ffceSStephen M. Cameron return 0; 206233a2ffceSStephen M. Cameron 206333a2ffceSStephen M. Cameron clean: 206433a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 206533a2ffceSStephen M. Cameron return -ENOMEM; 206633a2ffceSStephen M. Cameron } 206733a2ffceSStephen M. Cameron 2068d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2069d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2070d9a729f3SWebb Scales { 2071d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2072d9a729f3SWebb Scales u64 temp64; 2073d9a729f3SWebb Scales u32 chain_size; 2074d9a729f3SWebb Scales 2075d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2076a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2077d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2078d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2079d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2080d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2081d9a729f3SWebb Scales cp->sg->address = 0; 2082d9a729f3SWebb Scales return -1; 2083d9a729f3SWebb Scales } 2084d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2085d9a729f3SWebb Scales return 0; 2086d9a729f3SWebb Scales } 2087d9a729f3SWebb Scales 2088d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2089d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2090d9a729f3SWebb Scales { 2091d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2092d9a729f3SWebb Scales u64 temp64; 2093d9a729f3SWebb Scales u32 chain_size; 2094d9a729f3SWebb Scales 2095d9a729f3SWebb Scales chain_sg = cp->sg; 2096d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2097a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2098d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2099d9a729f3SWebb Scales } 2100d9a729f3SWebb Scales 2101e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 210233a2ffceSStephen M. Cameron struct CommandList *c) 210333a2ffceSStephen M. Cameron { 210433a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 210533a2ffceSStephen M. Cameron u64 temp64; 210650a0decfSStephen M. Cameron u32 chain_len; 210733a2ffceSStephen M. Cameron 210833a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 210933a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 211050a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 211150a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21122b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 211350a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 211450a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 211533a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2116e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2117e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 211850a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2119e2bea6dfSStephen M. Cameron return -1; 2120e2bea6dfSStephen M. Cameron } 212150a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2122e2bea6dfSStephen M. Cameron return 0; 212333a2ffceSStephen M. Cameron } 212433a2ffceSStephen M. Cameron 212533a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 212633a2ffceSStephen M. Cameron struct CommandList *c) 212733a2ffceSStephen M. Cameron { 212833a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 212933a2ffceSStephen M. Cameron 213050a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 213133a2ffceSStephen M. Cameron return; 213233a2ffceSStephen M. Cameron 213333a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 213450a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 213550a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 213633a2ffceSStephen M. Cameron } 213733a2ffceSStephen M. Cameron 2138a09c1441SScott Teel 2139a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2140a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2141a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2142a09c1441SScott Teel */ 2143a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2144c349775eSScott Teel struct CommandList *c, 2145c349775eSScott Teel struct scsi_cmnd *cmd, 2146c349775eSScott Teel struct io_accel2_cmd *c2) 2147c349775eSScott Teel { 2148c349775eSScott Teel int data_len; 2149a09c1441SScott Teel int retry = 0; 2150c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2151c349775eSScott Teel 2152c349775eSScott Teel switch (c2->error_data.serv_response) { 2153c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2154c349775eSScott Teel switch (c2->error_data.status) { 2155c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2156c349775eSScott Teel break; 2157c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2158ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2159c349775eSScott Teel if (c2->error_data.data_present != 2160ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2161ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2162ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2163c349775eSScott Teel break; 2164ee6b1889SStephen M. Cameron } 2165c349775eSScott Teel /* copy the sense data */ 2166c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2167c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2168c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2169c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2170c349775eSScott Teel data_len = 2171c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2172c349775eSScott Teel memcpy(cmd->sense_buffer, 2173c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2174a09c1441SScott Teel retry = 1; 2175c349775eSScott Teel break; 2176c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2177a09c1441SScott Teel retry = 1; 2178c349775eSScott Teel break; 2179c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2180a09c1441SScott Teel retry = 1; 2181c349775eSScott Teel break; 2182c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 21834a8da22bSStephen Cameron retry = 1; 2184c349775eSScott Teel break; 2185c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2186a09c1441SScott Teel retry = 1; 2187c349775eSScott Teel break; 2188c349775eSScott Teel default: 2189a09c1441SScott Teel retry = 1; 2190c349775eSScott Teel break; 2191c349775eSScott Teel } 2192c349775eSScott Teel break; 2193c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2194c40820d5SJoe Handzik switch (c2->error_data.status) { 2195c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2196c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2197c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2198c40820d5SJoe Handzik retry = 1; 2199c40820d5SJoe Handzik break; 2200c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2201c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2202c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2203c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2204c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2205c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2206c40820d5SJoe Handzik break; 2207c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2208c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2209c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2210c40820d5SJoe Handzik /* We will get an event from ctlr to trigger rescan */ 2211c40820d5SJoe Handzik retry = 1; 2212c40820d5SJoe Handzik break; 2213c40820d5SJoe Handzik default: 2214c40820d5SJoe Handzik retry = 1; 2215c40820d5SJoe Handzik } 2216c349775eSScott Teel break; 2217c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2218c349775eSScott Teel break; 2219c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2220c349775eSScott Teel break; 2221c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2222a09c1441SScott Teel retry = 1; 2223c349775eSScott Teel break; 2224c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2225c349775eSScott Teel break; 2226c349775eSScott Teel default: 2227a09c1441SScott Teel retry = 1; 2228c349775eSScott Teel break; 2229c349775eSScott Teel } 2230a09c1441SScott Teel 2231a09c1441SScott Teel return retry; /* retry on raid path? */ 2232c349775eSScott Teel } 2233c349775eSScott Teel 2234a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2235a58e7e53SWebb Scales struct CommandList *c) 2236a58e7e53SWebb Scales { 2237d604f533SWebb Scales bool do_wake = false; 2238d604f533SWebb Scales 2239a58e7e53SWebb Scales /* 2240a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2241a58e7e53SWebb Scales * 2242a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2243a58e7e53SWebb Scales * 2. The SCSI command completes 2244a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2245a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2246a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2247a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2248a58e7e53SWebb Scales * Now we have aborted the wrong command. 2249a58e7e53SWebb Scales * 2250d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2251d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2252a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2253a58e7e53SWebb Scales */ 2254a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2255d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2256a58e7e53SWebb Scales if (c->abort_pending) { 2257d604f533SWebb Scales do_wake = true; 2258a58e7e53SWebb Scales c->abort_pending = false; 2259a58e7e53SWebb Scales } 2260d604f533SWebb Scales if (c->reset_pending) { 2261d604f533SWebb Scales unsigned long flags; 2262d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2263d604f533SWebb Scales 2264d604f533SWebb Scales /* 2265d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2266d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2267d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2268d604f533SWebb Scales */ 2269d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2270d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2271d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2272d604f533SWebb Scales do_wake = true; 2273d604f533SWebb Scales c->reset_pending = NULL; 2274d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2275d604f533SWebb Scales } 2276d604f533SWebb Scales 2277d604f533SWebb Scales if (do_wake) 2278d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2279a58e7e53SWebb Scales } 2280a58e7e53SWebb Scales 228173153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 228273153fe5SWebb Scales struct CommandList *c) 228373153fe5SWebb Scales { 228473153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 228573153fe5SWebb Scales cmd_tagged_free(h, c); 228673153fe5SWebb Scales } 228773153fe5SWebb Scales 22888a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 22898a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 22908a0ff92cSWebb Scales { 229173153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 22928a0ff92cSWebb Scales cmd->scsi_done(cmd); 22938a0ff92cSWebb Scales } 22948a0ff92cSWebb Scales 22958a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 22968a0ff92cSWebb Scales { 22978a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 22988a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 22998a0ff92cSWebb Scales } 23008a0ff92cSWebb Scales 2301a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2302a58e7e53SWebb Scales { 2303a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2304a58e7e53SWebb Scales } 2305a58e7e53SWebb Scales 2306a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2307a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2308a58e7e53SWebb Scales { 2309a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2310a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2311a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 231273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2313a58e7e53SWebb Scales } 2314a58e7e53SWebb Scales 2315c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2316c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2317c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2318c349775eSScott Teel { 2319c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2320c349775eSScott Teel 2321c349775eSScott Teel /* check for good status */ 2322c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 23238a0ff92cSWebb Scales c2->error_data.status == 0)) 23248a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2325c349775eSScott Teel 23268a0ff92cSWebb Scales /* 23278a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2328c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2329c349775eSScott Teel * wrong. 2330c349775eSScott Teel */ 2331f3f01730SKevin Barnett if (is_logical_device(dev) && 2332c349775eSScott Teel c2->error_data.serv_response == 2333c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2334080ef1ccSDon Brace if (c2->error_data.status == 2335080ef1ccSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) 2336c349775eSScott Teel dev->offload_enabled = 0; 23378a0ff92cSWebb Scales 23388a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2339080ef1ccSDon Brace } 2340080ef1ccSDon Brace 2341080ef1ccSDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2)) 23428a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2343080ef1ccSDon Brace 23448a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2345c349775eSScott Teel } 2346c349775eSScott Teel 23479437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 23489437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 23499437ac43SStephen Cameron struct CommandList *cp) 23509437ac43SStephen Cameron { 23519437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 23529437ac43SStephen Cameron 23539437ac43SStephen Cameron switch (tmf_status) { 23549437ac43SStephen Cameron case CISS_TMF_COMPLETE: 23559437ac43SStephen Cameron /* 23569437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 23579437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 23589437ac43SStephen Cameron */ 23599437ac43SStephen Cameron case CISS_TMF_SUCCESS: 23609437ac43SStephen Cameron return 0; 23619437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 23629437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 23639437ac43SStephen Cameron case CISS_TMF_FAILED: 23649437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 23659437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 23669437ac43SStephen Cameron break; 23679437ac43SStephen Cameron default: 23689437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 23699437ac43SStephen Cameron tmf_status); 23709437ac43SStephen Cameron break; 23719437ac43SStephen Cameron } 23729437ac43SStephen Cameron return -tmf_status; 23739437ac43SStephen Cameron } 23749437ac43SStephen Cameron 23751fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2376edd16368SStephen M. Cameron { 2377edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2378edd16368SStephen M. Cameron struct ctlr_info *h; 2379edd16368SStephen M. Cameron struct ErrorInfo *ei; 2380283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2381d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2382edd16368SStephen M. Cameron 23839437ac43SStephen Cameron u8 sense_key; 23849437ac43SStephen Cameron u8 asc; /* additional sense code */ 23859437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2386db111e18SStephen M. Cameron unsigned long sense_data_size; 2387edd16368SStephen M. Cameron 2388edd16368SStephen M. Cameron ei = cp->err_info; 23897fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2390edd16368SStephen M. Cameron h = cp->h; 2391283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2392d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2393edd16368SStephen M. Cameron 2394edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2395e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 23962b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 239733a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2398edd16368SStephen M. Cameron 2399d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2400d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2401d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2402d9a729f3SWebb Scales 2403edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2404edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2405c349775eSScott Teel 240603383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 240703383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 240803383736SDon Brace 240925163bd5SWebb Scales /* 241025163bd5SWebb Scales * We check for lockup status here as it may be set for 241125163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 241225163bd5SWebb Scales * fail_all_oustanding_cmds() 241325163bd5SWebb Scales */ 241425163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 241525163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 241625163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 24178a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 241825163bd5SWebb Scales } 241925163bd5SWebb Scales 2420d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2421d604f533SWebb Scales if (cp->reset_pending) 2422d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2423d604f533SWebb Scales if (cp->abort_pending) 2424d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2425d604f533SWebb Scales } 2426d604f533SWebb Scales 2427c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2428c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2429c349775eSScott Teel 24306aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 24318a0ff92cSWebb Scales if (ei->CommandStatus == 0) 24328a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 24336aa4c361SRobert Elliott 2434e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2435e1f7de0cSMatt Gates * CISS header used below for error handling. 2436e1f7de0cSMatt Gates */ 2437e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2438e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 24392b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 24402b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 24412b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 24422b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 244350a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2444e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2445e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2446283b4a9bSStephen M. Cameron 2447283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2448283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2449283b4a9bSStephen M. Cameron * wrong. 2450283b4a9bSStephen M. Cameron */ 2451f3f01730SKevin Barnett if (is_logical_device(dev)) { 2452283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2453283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 24548a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2455283b4a9bSStephen M. Cameron } 2456e1f7de0cSMatt Gates } 2457e1f7de0cSMatt Gates 2458edd16368SStephen M. Cameron /* an error has occurred */ 2459edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2460edd16368SStephen M. Cameron 2461edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 24629437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 24639437ac43SStephen Cameron /* copy the sense data */ 24649437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 24659437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 24669437ac43SStephen Cameron else 24679437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 24689437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 24699437ac43SStephen Cameron sense_data_size = ei->SenseLen; 24709437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 24719437ac43SStephen Cameron if (ei->ScsiStatus) 24729437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 24739437ac43SStephen Cameron &sense_key, &asc, &ascq); 2474edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 24751d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 24762e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 24771d3b3609SMatt Gates break; 24781d3b3609SMatt Gates } 2479edd16368SStephen M. Cameron break; 2480edd16368SStephen M. Cameron } 2481edd16368SStephen M. Cameron /* Problem was not a check condition 2482edd16368SStephen M. Cameron * Pass it up to the upper layers... 2483edd16368SStephen M. Cameron */ 2484edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2485edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2486edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2487edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2488edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2489edd16368SStephen M. Cameron sense_key, asc, ascq, 2490edd16368SStephen M. Cameron cmd->result); 2491edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2492edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2493edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2494edd16368SStephen M. Cameron 2495edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2496edd16368SStephen M. Cameron * but there is a bug in some released firmware 2497edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2498edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2499edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2500edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2501edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2502edd16368SStephen M. Cameron * look like selection timeout since that is 2503edd16368SStephen M. Cameron * the most common reason for this to occur, 2504edd16368SStephen M. Cameron * and it's severe enough. 2505edd16368SStephen M. Cameron */ 2506edd16368SStephen M. Cameron 2507edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2508edd16368SStephen M. Cameron } 2509edd16368SStephen M. Cameron break; 2510edd16368SStephen M. Cameron 2511edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2512edd16368SStephen M. Cameron break; 2513edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2514f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2515f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2516edd16368SStephen M. Cameron break; 2517edd16368SStephen M. Cameron case CMD_INVALID: { 2518edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2519edd16368SStephen M. Cameron print_cmd(cp); */ 2520edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2521edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2522edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2523edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2524edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2525edd16368SStephen M. Cameron * missing target. */ 2526edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2527edd16368SStephen M. Cameron } 2528edd16368SStephen M. Cameron break; 2529edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2530256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2531f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2532f42e81e1SStephen Cameron cp->Request.CDB); 2533edd16368SStephen M. Cameron break; 2534edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2535edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2536f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2537f42e81e1SStephen Cameron cp->Request.CDB); 2538edd16368SStephen M. Cameron break; 2539edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2540edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2541f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2542f42e81e1SStephen Cameron cp->Request.CDB); 2543edd16368SStephen M. Cameron break; 2544edd16368SStephen M. Cameron case CMD_ABORTED: 2545a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2546a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2547edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2548edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2549f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2550f42e81e1SStephen Cameron cp->Request.CDB); 2551edd16368SStephen M. Cameron break; 2552edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2553f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2554f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2555f42e81e1SStephen Cameron cp->Request.CDB); 2556edd16368SStephen M. Cameron break; 2557edd16368SStephen M. Cameron case CMD_TIMEOUT: 2558edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2559f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2560f42e81e1SStephen Cameron cp->Request.CDB); 2561edd16368SStephen M. Cameron break; 25621d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 25631d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 25641d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 25651d5e2ed0SStephen M. Cameron break; 25669437ac43SStephen Cameron case CMD_TMF_STATUS: 25679437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 25689437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 25699437ac43SStephen Cameron break; 2570283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2571283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2572283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2573283b4a9bSStephen M. Cameron */ 2574283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2575283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2576283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2577283b4a9bSStephen M. Cameron break; 2578edd16368SStephen M. Cameron default: 2579edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2580edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2581edd16368SStephen M. Cameron cp, ei->CommandStatus); 2582edd16368SStephen M. Cameron } 25838a0ff92cSWebb Scales 25848a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2585edd16368SStephen M. Cameron } 2586edd16368SStephen M. Cameron 2587edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2588edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2589edd16368SStephen M. Cameron { 2590edd16368SStephen M. Cameron int i; 2591edd16368SStephen M. Cameron 259250a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 259350a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 259450a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2595edd16368SStephen M. Cameron data_direction); 2596edd16368SStephen M. Cameron } 2597edd16368SStephen M. Cameron 2598a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2599edd16368SStephen M. Cameron struct CommandList *cp, 2600edd16368SStephen M. Cameron unsigned char *buf, 2601edd16368SStephen M. Cameron size_t buflen, 2602edd16368SStephen M. Cameron int data_direction) 2603edd16368SStephen M. Cameron { 260401a02ffcSStephen M. Cameron u64 addr64; 2605edd16368SStephen M. Cameron 2606edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2607edd16368SStephen M. Cameron cp->Header.SGList = 0; 260850a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2609a2dac136SStephen M. Cameron return 0; 2610edd16368SStephen M. Cameron } 2611edd16368SStephen M. Cameron 261250a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2613eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2614a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2615eceaae18SShuah Khan cp->Header.SGList = 0; 261650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2617a2dac136SStephen M. Cameron return -1; 2618eceaae18SShuah Khan } 261950a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 262050a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 262150a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 262250a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 262350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2624a2dac136SStephen M. Cameron return 0; 2625edd16368SStephen M. Cameron } 2626edd16368SStephen M. Cameron 262725163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 262825163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 262925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 263025163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2631edd16368SStephen M. Cameron { 2632edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2633edd16368SStephen M. Cameron 2634edd16368SStephen M. Cameron c->waiting = &wait; 263525163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 263625163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 263725163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 263825163bd5SWebb Scales wait_for_completion_io(&wait); 263925163bd5SWebb Scales return IO_OK; 264025163bd5SWebb Scales } 264125163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 264225163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 264325163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 264425163bd5SWebb Scales return -ETIMEDOUT; 264525163bd5SWebb Scales } 264625163bd5SWebb Scales return IO_OK; 264725163bd5SWebb Scales } 264825163bd5SWebb Scales 264925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 265025163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 265125163bd5SWebb Scales { 265225163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 265325163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 265425163bd5SWebb Scales return IO_OK; 265525163bd5SWebb Scales } 265625163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2657edd16368SStephen M. Cameron } 2658edd16368SStephen M. Cameron 2659094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2660094963daSStephen M. Cameron { 2661094963daSStephen M. Cameron int cpu; 2662094963daSStephen M. Cameron u32 rc, *lockup_detected; 2663094963daSStephen M. Cameron 2664094963daSStephen M. Cameron cpu = get_cpu(); 2665094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2666094963daSStephen M. Cameron rc = *lockup_detected; 2667094963daSStephen M. Cameron put_cpu(); 2668094963daSStephen M. Cameron return rc; 2669094963daSStephen M. Cameron } 2670094963daSStephen M. Cameron 26719c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 267225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 267325163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2674edd16368SStephen M. Cameron { 26759c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 267625163bd5SWebb Scales int rc; 2677edd16368SStephen M. Cameron 2678edd16368SStephen M. Cameron do { 26797630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 268025163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 268125163bd5SWebb Scales timeout_msecs); 268225163bd5SWebb Scales if (rc) 268325163bd5SWebb Scales break; 2684edd16368SStephen M. Cameron retry_count++; 26859c2fc160SStephen M. Cameron if (retry_count > 3) { 26869c2fc160SStephen M. Cameron msleep(backoff_time); 26879c2fc160SStephen M. Cameron if (backoff_time < 1000) 26889c2fc160SStephen M. Cameron backoff_time *= 2; 26899c2fc160SStephen M. Cameron } 2690852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 26919c2fc160SStephen M. Cameron check_for_busy(h, c)) && 26929c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2693edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 269425163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 269525163bd5SWebb Scales rc = -EIO; 269625163bd5SWebb Scales return rc; 2697edd16368SStephen M. Cameron } 2698edd16368SStephen M. Cameron 2699d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2700d1e8beacSStephen M. Cameron struct CommandList *c) 2701edd16368SStephen M. Cameron { 2702d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2703d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2704edd16368SStephen M. Cameron 2705d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2706d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2707d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2708d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2709d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2710d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2711d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2712d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2713d1e8beacSStephen M. Cameron } 2714d1e8beacSStephen M. Cameron 2715d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2716d1e8beacSStephen M. Cameron struct CommandList *cp) 2717d1e8beacSStephen M. Cameron { 2718d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2719d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 27209437ac43SStephen Cameron u8 sense_key, asc, ascq; 27219437ac43SStephen Cameron int sense_len; 2722d1e8beacSStephen M. Cameron 2723edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2724edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 27259437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 27269437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 27279437ac43SStephen Cameron else 27289437ac43SStephen Cameron sense_len = ei->SenseLen; 27299437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 27309437ac43SStephen Cameron &sense_key, &asc, &ascq); 2731d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2732d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 27339437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 27349437ac43SStephen Cameron sense_key, asc, ascq); 2735d1e8beacSStephen M. Cameron else 27369437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2737edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2738edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2739edd16368SStephen M. Cameron "(probably indicates selection timeout " 2740edd16368SStephen M. Cameron "reported incorrectly due to a known " 2741edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2742edd16368SStephen M. Cameron break; 2743edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2744edd16368SStephen M. Cameron break; 2745edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2746d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2747edd16368SStephen M. Cameron break; 2748edd16368SStephen M. Cameron case CMD_INVALID: { 2749edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2750edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2751edd16368SStephen M. Cameron */ 2752d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2753d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2754edd16368SStephen M. Cameron } 2755edd16368SStephen M. Cameron break; 2756edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2757d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2758edd16368SStephen M. Cameron break; 2759edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2760d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2761edd16368SStephen M. Cameron break; 2762edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2763d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2764edd16368SStephen M. Cameron break; 2765edd16368SStephen M. Cameron case CMD_ABORTED: 2766d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2767edd16368SStephen M. Cameron break; 2768edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2769d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2770edd16368SStephen M. Cameron break; 2771edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2772d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2773edd16368SStephen M. Cameron break; 2774edd16368SStephen M. Cameron case CMD_TIMEOUT: 2775d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2776edd16368SStephen M. Cameron break; 27771d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2778d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 27791d5e2ed0SStephen M. Cameron break; 278025163bd5SWebb Scales case CMD_CTLR_LOCKUP: 278125163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 278225163bd5SWebb Scales break; 2783edd16368SStephen M. Cameron default: 2784d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2785d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2786edd16368SStephen M. Cameron ei->CommandStatus); 2787edd16368SStephen M. Cameron } 2788edd16368SStephen M. Cameron } 2789edd16368SStephen M. Cameron 2790edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2791b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2792edd16368SStephen M. Cameron unsigned char bufsize) 2793edd16368SStephen M. Cameron { 2794edd16368SStephen M. Cameron int rc = IO_OK; 2795edd16368SStephen M. Cameron struct CommandList *c; 2796edd16368SStephen M. Cameron struct ErrorInfo *ei; 2797edd16368SStephen M. Cameron 279845fcb86eSStephen Cameron c = cmd_alloc(h); 2799edd16368SStephen M. Cameron 2800a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2801a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2802a2dac136SStephen M. Cameron rc = -1; 2803a2dac136SStephen M. Cameron goto out; 2804a2dac136SStephen M. Cameron } 280525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 280625163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 280725163bd5SWebb Scales if (rc) 280825163bd5SWebb Scales goto out; 2809edd16368SStephen M. Cameron ei = c->err_info; 2810edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2811d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2812edd16368SStephen M. Cameron rc = -1; 2813edd16368SStephen M. Cameron } 2814a2dac136SStephen M. Cameron out: 281545fcb86eSStephen Cameron cmd_free(h, c); 2816edd16368SStephen M. Cameron return rc; 2817edd16368SStephen M. Cameron } 2818edd16368SStephen M. Cameron 2819bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 282025163bd5SWebb Scales u8 reset_type, int reply_queue) 2821edd16368SStephen M. Cameron { 2822edd16368SStephen M. Cameron int rc = IO_OK; 2823edd16368SStephen M. Cameron struct CommandList *c; 2824edd16368SStephen M. Cameron struct ErrorInfo *ei; 2825edd16368SStephen M. Cameron 282645fcb86eSStephen Cameron c = cmd_alloc(h); 2827edd16368SStephen M. Cameron 2828edd16368SStephen M. Cameron 2829a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 28300b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2831bf711ac6SScott Teel scsi3addr, TYPE_MSG); 283225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 283325163bd5SWebb Scales if (rc) { 283425163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 283525163bd5SWebb Scales goto out; 283625163bd5SWebb Scales } 2837edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2838edd16368SStephen M. Cameron 2839edd16368SStephen M. Cameron ei = c->err_info; 2840edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2841d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2842edd16368SStephen M. Cameron rc = -1; 2843edd16368SStephen M. Cameron } 284425163bd5SWebb Scales out: 284545fcb86eSStephen Cameron cmd_free(h, c); 2846edd16368SStephen M. Cameron return rc; 2847edd16368SStephen M. Cameron } 2848edd16368SStephen M. Cameron 2849d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2850d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2851d604f533SWebb Scales unsigned char *scsi3addr) 2852d604f533SWebb Scales { 2853d604f533SWebb Scales int i; 2854d604f533SWebb Scales bool match = false; 2855d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2856d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2857d604f533SWebb Scales 2858d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2859d604f533SWebb Scales return false; 2860d604f533SWebb Scales 2861d604f533SWebb Scales switch (c->cmd_type) { 2862d604f533SWebb Scales case CMD_SCSI: 2863d604f533SWebb Scales case CMD_IOCTL_PEND: 2864d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2865d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2866d604f533SWebb Scales break; 2867d604f533SWebb Scales 2868d604f533SWebb Scales case CMD_IOACCEL1: 2869d604f533SWebb Scales case CMD_IOACCEL2: 2870d604f533SWebb Scales if (c->phys_disk == dev) { 2871d604f533SWebb Scales /* HBA mode match */ 2872d604f533SWebb Scales match = true; 2873d604f533SWebb Scales } else { 2874d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2875d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2876d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2877d604f533SWebb Scales * instead. */ 2878d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2879d604f533SWebb Scales /* FIXME: an alternate test might be 2880d604f533SWebb Scales * 2881d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2882d604f533SWebb Scales * == c2->scsi_nexus; */ 2883d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2884d604f533SWebb Scales } 2885d604f533SWebb Scales } 2886d604f533SWebb Scales break; 2887d604f533SWebb Scales 2888d604f533SWebb Scales case IOACCEL2_TMF: 2889d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2890d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2891d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2892d604f533SWebb Scales } 2893d604f533SWebb Scales break; 2894d604f533SWebb Scales 2895d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2896d604f533SWebb Scales match = false; 2897d604f533SWebb Scales break; 2898d604f533SWebb Scales 2899d604f533SWebb Scales default: 2900d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2901d604f533SWebb Scales c->cmd_type); 2902d604f533SWebb Scales BUG(); 2903d604f533SWebb Scales } 2904d604f533SWebb Scales 2905d604f533SWebb Scales return match; 2906d604f533SWebb Scales } 2907d604f533SWebb Scales 2908d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 2909d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 2910d604f533SWebb Scales { 2911d604f533SWebb Scales int i; 2912d604f533SWebb Scales int rc = 0; 2913d604f533SWebb Scales 2914d604f533SWebb Scales /* We can really only handle one reset at a time */ 2915d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 2916d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 2917d604f533SWebb Scales return -EINTR; 2918d604f533SWebb Scales } 2919d604f533SWebb Scales 2920d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 2921d604f533SWebb Scales 2922d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2923d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 2924d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 2925d604f533SWebb Scales 2926d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 2927d604f533SWebb Scales unsigned long flags; 2928d604f533SWebb Scales 2929d604f533SWebb Scales /* 2930d604f533SWebb Scales * Mark the target command as having a reset pending, 2931d604f533SWebb Scales * then lock a lock so that the command cannot complete 2932d604f533SWebb Scales * while we're considering it. If the command is not 2933d604f533SWebb Scales * idle then count it; otherwise revoke the event. 2934d604f533SWebb Scales */ 2935d604f533SWebb Scales c->reset_pending = dev; 2936d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 2937d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 2938d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 2939d604f533SWebb Scales else 2940d604f533SWebb Scales c->reset_pending = NULL; 2941d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2942d604f533SWebb Scales } 2943d604f533SWebb Scales 2944d604f533SWebb Scales cmd_free(h, c); 2945d604f533SWebb Scales } 2946d604f533SWebb Scales 2947d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 2948d604f533SWebb Scales if (!rc) 2949d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 2950d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 2951d604f533SWebb Scales lockup_detected(h)); 2952d604f533SWebb Scales 2953d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 2954d604f533SWebb Scales dev_warn(&h->pdev->dev, 2955d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 2956d604f533SWebb Scales rc = -ENODEV; 2957d604f533SWebb Scales } 2958d604f533SWebb Scales 2959d604f533SWebb Scales if (unlikely(rc)) 2960d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 2961d604f533SWebb Scales 2962d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 2963d604f533SWebb Scales return rc; 2964d604f533SWebb Scales } 2965d604f533SWebb Scales 2966edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 2967edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 2968edd16368SStephen M. Cameron { 2969edd16368SStephen M. Cameron int rc; 2970edd16368SStephen M. Cameron unsigned char *buf; 2971edd16368SStephen M. Cameron 2972edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2973edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 2974edd16368SStephen M. Cameron if (!buf) 2975edd16368SStephen M. Cameron return; 2976b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 2977edd16368SStephen M. Cameron if (rc == 0) 2978edd16368SStephen M. Cameron *raid_level = buf[8]; 2979edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 2980edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2981edd16368SStephen M. Cameron kfree(buf); 2982edd16368SStephen M. Cameron return; 2983edd16368SStephen M. Cameron } 2984edd16368SStephen M. Cameron 2985283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 2986283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 2987283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 2988283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 2989283b4a9bSStephen M. Cameron { 2990283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 2991283b4a9bSStephen M. Cameron int map, row, col; 2992283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 2993283b4a9bSStephen M. Cameron 2994283b4a9bSStephen M. Cameron if (rc != 0) 2995283b4a9bSStephen M. Cameron return; 2996283b4a9bSStephen M. Cameron 29972ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 29982ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 29992ba8bfc8SStephen M. Cameron return; 30002ba8bfc8SStephen M. Cameron 3001283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3002283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3003283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3004283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3005283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3006283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3007283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3008283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3009283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3010283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3011283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3012283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3013283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3014283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3015283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3016283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3017283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3018283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3019283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3020283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3021283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3022283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3023283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3024283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 30252b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3026dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 30272b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 30282b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 30292b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3030dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3031dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3032283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3033283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3034283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3035283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3036283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3037283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3038283b4a9bSStephen M. Cameron disks_per_row = 3039283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3040283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3041283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3042283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3043283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3044283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3045283b4a9bSStephen M. Cameron disks_per_row = 3046283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3047283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3048283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3049283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3050283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3051283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3052283b4a9bSStephen M. Cameron } 3053283b4a9bSStephen M. Cameron } 3054283b4a9bSStephen M. Cameron } 3055283b4a9bSStephen M. Cameron #else 3056283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3057283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3058283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3059283b4a9bSStephen M. Cameron { 3060283b4a9bSStephen M. Cameron } 3061283b4a9bSStephen M. Cameron #endif 3062283b4a9bSStephen M. Cameron 3063283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3064283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3065283b4a9bSStephen M. Cameron { 3066283b4a9bSStephen M. Cameron int rc = 0; 3067283b4a9bSStephen M. Cameron struct CommandList *c; 3068283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3069283b4a9bSStephen M. Cameron 307045fcb86eSStephen Cameron c = cmd_alloc(h); 3071bf43caf3SRobert Elliott 3072283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3073283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3074283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 30752dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 30762dd02d74SRobert Elliott cmd_free(h, c); 30772dd02d74SRobert Elliott return -1; 3078283b4a9bSStephen M. Cameron } 307925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 308025163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 308125163bd5SWebb Scales if (rc) 308225163bd5SWebb Scales goto out; 3083283b4a9bSStephen M. Cameron ei = c->err_info; 3084283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3085d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 308625163bd5SWebb Scales rc = -1; 308725163bd5SWebb Scales goto out; 3088283b4a9bSStephen M. Cameron } 308945fcb86eSStephen Cameron cmd_free(h, c); 3090283b4a9bSStephen M. Cameron 3091283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3092283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3093283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3094283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3095283b4a9bSStephen M. Cameron rc = -1; 3096283b4a9bSStephen M. Cameron } 3097283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3098283b4a9bSStephen M. Cameron return rc; 309925163bd5SWebb Scales out: 310025163bd5SWebb Scales cmd_free(h, c); 310125163bd5SWebb Scales return rc; 3102283b4a9bSStephen M. Cameron } 3103283b4a9bSStephen M. Cameron 3104d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3105d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3106d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3107d04e62b9SKevin Barnett { 3108d04e62b9SKevin Barnett int rc = IO_OK; 3109d04e62b9SKevin Barnett struct CommandList *c; 3110d04e62b9SKevin Barnett struct ErrorInfo *ei; 3111d04e62b9SKevin Barnett 3112d04e62b9SKevin Barnett c = cmd_alloc(h); 3113d04e62b9SKevin Barnett 3114d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3115d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3116d04e62b9SKevin Barnett if (rc) 3117d04e62b9SKevin Barnett goto out; 3118d04e62b9SKevin Barnett 3119d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3120d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3121d04e62b9SKevin Barnett 3122d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3123d04e62b9SKevin Barnett PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3124d04e62b9SKevin Barnett if (rc) 3125d04e62b9SKevin Barnett goto out; 3126d04e62b9SKevin Barnett ei = c->err_info; 3127d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3128d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3129d04e62b9SKevin Barnett rc = -1; 3130d04e62b9SKevin Barnett } 3131d04e62b9SKevin Barnett out: 3132d04e62b9SKevin Barnett cmd_free(h, c); 3133d04e62b9SKevin Barnett return rc; 3134d04e62b9SKevin Barnett } 3135d04e62b9SKevin Barnett 313666749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 313766749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 313866749d0dSScott Teel { 313966749d0dSScott Teel int rc = IO_OK; 314066749d0dSScott Teel struct CommandList *c; 314166749d0dSScott Teel struct ErrorInfo *ei; 314266749d0dSScott Teel 314366749d0dSScott Teel c = cmd_alloc(h); 314466749d0dSScott Teel 314566749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 314666749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 314766749d0dSScott Teel if (rc) 314866749d0dSScott Teel goto out; 314966749d0dSScott Teel 315066749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 315166749d0dSScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 315266749d0dSScott Teel if (rc) 315366749d0dSScott Teel goto out; 315466749d0dSScott Teel ei = c->err_info; 315566749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 315666749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 315766749d0dSScott Teel rc = -1; 315866749d0dSScott Teel } 315966749d0dSScott Teel out: 316066749d0dSScott Teel cmd_free(h, c); 316166749d0dSScott Teel return rc; 316266749d0dSScott Teel } 316366749d0dSScott Teel 316403383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 316503383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 316603383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 316703383736SDon Brace { 316803383736SDon Brace int rc = IO_OK; 316903383736SDon Brace struct CommandList *c; 317003383736SDon Brace struct ErrorInfo *ei; 317103383736SDon Brace 317203383736SDon Brace c = cmd_alloc(h); 317303383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 317403383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 317503383736SDon Brace if (rc) 317603383736SDon Brace goto out; 317703383736SDon Brace 317803383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 317903383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 318003383736SDon Brace 318125163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 318225163bd5SWebb Scales NO_TIMEOUT); 318303383736SDon Brace ei = c->err_info; 318403383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 318503383736SDon Brace hpsa_scsi_interpret_error(h, c); 318603383736SDon Brace rc = -1; 318703383736SDon Brace } 318803383736SDon Brace out: 318903383736SDon Brace cmd_free(h, c); 3190d04e62b9SKevin Barnett 319103383736SDon Brace return rc; 319203383736SDon Brace } 319303383736SDon Brace 3194d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3195d04e62b9SKevin Barnett unsigned char *scsi3addr) 3196d04e62b9SKevin Barnett { 3197d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3198d04e62b9SKevin Barnett u32 nphysicals; 3199d04e62b9SKevin Barnett u64 sa = 0; 3200d04e62b9SKevin Barnett int i; 3201d04e62b9SKevin Barnett 3202d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3203d04e62b9SKevin Barnett if (!physdev) 3204d04e62b9SKevin Barnett return 0; 3205d04e62b9SKevin Barnett 3206d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3207d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3208d04e62b9SKevin Barnett kfree(physdev); 3209d04e62b9SKevin Barnett return 0; 3210d04e62b9SKevin Barnett } 3211d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3212d04e62b9SKevin Barnett 3213d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3214d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3215d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3216d04e62b9SKevin Barnett break; 3217d04e62b9SKevin Barnett } 3218d04e62b9SKevin Barnett 3219d04e62b9SKevin Barnett kfree(physdev); 3220d04e62b9SKevin Barnett 3221d04e62b9SKevin Barnett return sa; 3222d04e62b9SKevin Barnett } 3223d04e62b9SKevin Barnett 3224d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3225d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3226d04e62b9SKevin Barnett { 3227d04e62b9SKevin Barnett int rc; 3228d04e62b9SKevin Barnett u64 sa = 0; 3229d04e62b9SKevin Barnett 3230d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3231d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3232d04e62b9SKevin Barnett 3233d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3234d04e62b9SKevin Barnett if (ssi == NULL) { 3235d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3236d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3237d04e62b9SKevin Barnett return; 3238d04e62b9SKevin Barnett } 3239d04e62b9SKevin Barnett 3240d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3241d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3242d04e62b9SKevin Barnett if (rc == 0) { 3243d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3244d04e62b9SKevin Barnett h->sas_address = sa; 3245d04e62b9SKevin Barnett } 3246d04e62b9SKevin Barnett 3247d04e62b9SKevin Barnett kfree(ssi); 3248d04e62b9SKevin Barnett } else 3249d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3250d04e62b9SKevin Barnett 3251d04e62b9SKevin Barnett dev->sas_address = sa; 3252d04e62b9SKevin Barnett } 3253d04e62b9SKevin Barnett 3254d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 32551b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 32561b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 32571b70150aSStephen M. Cameron { 32581b70150aSStephen M. Cameron int rc; 32591b70150aSStephen M. Cameron int i; 32601b70150aSStephen M. Cameron int pages; 32611b70150aSStephen M. Cameron unsigned char *buf, bufsize; 32621b70150aSStephen M. Cameron 32631b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 32641b70150aSStephen M. Cameron if (!buf) 32651b70150aSStephen M. Cameron return 0; 32661b70150aSStephen M. Cameron 32671b70150aSStephen M. Cameron /* Get the size of the page list first */ 32681b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 32691b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 32701b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 32711b70150aSStephen M. Cameron if (rc != 0) 32721b70150aSStephen M. Cameron goto exit_unsupported; 32731b70150aSStephen M. Cameron pages = buf[3]; 32741b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 32751b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 32761b70150aSStephen M. Cameron else 32771b70150aSStephen M. Cameron bufsize = 255; 32781b70150aSStephen M. Cameron 32791b70150aSStephen M. Cameron /* Get the whole VPD page list */ 32801b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 32811b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 32821b70150aSStephen M. Cameron buf, bufsize); 32831b70150aSStephen M. Cameron if (rc != 0) 32841b70150aSStephen M. Cameron goto exit_unsupported; 32851b70150aSStephen M. Cameron 32861b70150aSStephen M. Cameron pages = buf[3]; 32871b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 32881b70150aSStephen M. Cameron if (buf[3 + i] == page) 32891b70150aSStephen M. Cameron goto exit_supported; 32901b70150aSStephen M. Cameron exit_unsupported: 32911b70150aSStephen M. Cameron kfree(buf); 32921b70150aSStephen M. Cameron return 0; 32931b70150aSStephen M. Cameron exit_supported: 32941b70150aSStephen M. Cameron kfree(buf); 32951b70150aSStephen M. Cameron return 1; 32961b70150aSStephen M. Cameron } 32971b70150aSStephen M. Cameron 3298283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3299283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3300283b4a9bSStephen M. Cameron { 3301283b4a9bSStephen M. Cameron int rc; 3302283b4a9bSStephen M. Cameron unsigned char *buf; 3303283b4a9bSStephen M. Cameron u8 ioaccel_status; 3304283b4a9bSStephen M. Cameron 3305283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3306283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 330741ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3308283b4a9bSStephen M. Cameron 3309283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3310283b4a9bSStephen M. Cameron if (!buf) 3311283b4a9bSStephen M. Cameron return; 33121b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 33131b70150aSStephen M. Cameron goto out; 3314283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3315b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3316283b4a9bSStephen M. Cameron if (rc != 0) 3317283b4a9bSStephen M. Cameron goto out; 3318283b4a9bSStephen M. Cameron 3319283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3320283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3321283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3322283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3323283b4a9bSStephen M. Cameron this_device->offload_config = 3324283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3325283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3326283b4a9bSStephen M. Cameron this_device->offload_enabled = 3327283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3328283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3329283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3330283b4a9bSStephen M. Cameron } 333141ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3332283b4a9bSStephen M. Cameron out: 3333283b4a9bSStephen M. Cameron kfree(buf); 3334283b4a9bSStephen M. Cameron return; 3335283b4a9bSStephen M. Cameron } 3336283b4a9bSStephen M. Cameron 3337edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3338edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 333975d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3340edd16368SStephen M. Cameron { 3341edd16368SStephen M. Cameron int rc; 3342edd16368SStephen M. Cameron unsigned char *buf; 3343edd16368SStephen M. Cameron 3344edd16368SStephen M. Cameron if (buflen > 16) 3345edd16368SStephen M. Cameron buflen = 16; 3346edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3347edd16368SStephen M. Cameron if (!buf) 3348a84d794dSStephen M. Cameron return -ENOMEM; 3349b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3350edd16368SStephen M. Cameron if (rc == 0) 335175d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 335275d23d89SDon Brace 3353edd16368SStephen M. Cameron kfree(buf); 335475d23d89SDon Brace 3355edd16368SStephen M. Cameron return rc != 0; 3356edd16368SStephen M. Cameron } 3357edd16368SStephen M. Cameron 3358edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 335903383736SDon Brace void *buf, int bufsize, 3360edd16368SStephen M. Cameron int extended_response) 3361edd16368SStephen M. Cameron { 3362edd16368SStephen M. Cameron int rc = IO_OK; 3363edd16368SStephen M. Cameron struct CommandList *c; 3364edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3365edd16368SStephen M. Cameron struct ErrorInfo *ei; 3366edd16368SStephen M. Cameron 336745fcb86eSStephen Cameron c = cmd_alloc(h); 3368bf43caf3SRobert Elliott 3369e89c0ae7SStephen M. Cameron /* address the controller */ 3370e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3371a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3372a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3373a2dac136SStephen M. Cameron rc = -1; 3374a2dac136SStephen M. Cameron goto out; 3375a2dac136SStephen M. Cameron } 3376edd16368SStephen M. Cameron if (extended_response) 3377edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 337825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 337925163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 338025163bd5SWebb Scales if (rc) 338125163bd5SWebb Scales goto out; 3382edd16368SStephen M. Cameron ei = c->err_info; 3383edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3384edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3385d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3386edd16368SStephen M. Cameron rc = -1; 3387283b4a9bSStephen M. Cameron } else { 338803383736SDon Brace struct ReportLUNdata *rld = buf; 338903383736SDon Brace 339003383736SDon Brace if (rld->extended_response_flag != extended_response) { 3391283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3392283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3393283b4a9bSStephen M. Cameron extended_response, 339403383736SDon Brace rld->extended_response_flag); 3395283b4a9bSStephen M. Cameron rc = -1; 3396283b4a9bSStephen M. Cameron } 3397edd16368SStephen M. Cameron } 3398a2dac136SStephen M. Cameron out: 339945fcb86eSStephen Cameron cmd_free(h, c); 3400edd16368SStephen M. Cameron return rc; 3401edd16368SStephen M. Cameron } 3402edd16368SStephen M. Cameron 3403edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 340403383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3405edd16368SStephen M. Cameron { 340603383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 340703383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3408edd16368SStephen M. Cameron } 3409edd16368SStephen M. Cameron 3410edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3411edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3412edd16368SStephen M. Cameron { 3413edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3414edd16368SStephen M. Cameron } 3415edd16368SStephen M. Cameron 3416edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3417edd16368SStephen M. Cameron int bus, int target, int lun) 3418edd16368SStephen M. Cameron { 3419edd16368SStephen M. Cameron device->bus = bus; 3420edd16368SStephen M. Cameron device->target = target; 3421edd16368SStephen M. Cameron device->lun = lun; 3422edd16368SStephen M. Cameron } 3423edd16368SStephen M. Cameron 34249846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 34259846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 34269846590eSStephen M. Cameron unsigned char scsi3addr[]) 34279846590eSStephen M. Cameron { 34289846590eSStephen M. Cameron int rc; 34299846590eSStephen M. Cameron int status; 34309846590eSStephen M. Cameron int size; 34319846590eSStephen M. Cameron unsigned char *buf; 34329846590eSStephen M. Cameron 34339846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 34349846590eSStephen M. Cameron if (!buf) 34359846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 34369846590eSStephen M. Cameron 34379846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 343824a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 34399846590eSStephen M. Cameron goto exit_failed; 34409846590eSStephen M. Cameron 34419846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 34429846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 34439846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 344424a4b078SStephen M. Cameron if (rc != 0) 34459846590eSStephen M. Cameron goto exit_failed; 34469846590eSStephen M. Cameron size = buf[3]; 34479846590eSStephen M. Cameron 34489846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 34499846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 34509846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 345124a4b078SStephen M. Cameron if (rc != 0) 34529846590eSStephen M. Cameron goto exit_failed; 34539846590eSStephen M. Cameron status = buf[4]; /* status byte */ 34549846590eSStephen M. Cameron 34559846590eSStephen M. Cameron kfree(buf); 34569846590eSStephen M. Cameron return status; 34579846590eSStephen M. Cameron exit_failed: 34589846590eSStephen M. Cameron kfree(buf); 34599846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 34609846590eSStephen M. Cameron } 34619846590eSStephen M. Cameron 34629846590eSStephen M. Cameron /* Determine offline status of a volume. 34639846590eSStephen M. Cameron * Return either: 34649846590eSStephen M. Cameron * 0 (not offline) 346567955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 34669846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 34679846590eSStephen M. Cameron * describing why a volume is to be kept offline) 34689846590eSStephen M. Cameron */ 346967955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 34709846590eSStephen M. Cameron unsigned char scsi3addr[]) 34719846590eSStephen M. Cameron { 34729846590eSStephen M. Cameron struct CommandList *c; 34739437ac43SStephen Cameron unsigned char *sense; 34749437ac43SStephen Cameron u8 sense_key, asc, ascq; 34759437ac43SStephen Cameron int sense_len; 347625163bd5SWebb Scales int rc, ldstat = 0; 34779846590eSStephen M. Cameron u16 cmd_status; 34789846590eSStephen M. Cameron u8 scsi_status; 34799846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 34809846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 34819846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 34829846590eSStephen M. Cameron 34839846590eSStephen M. Cameron c = cmd_alloc(h); 3484bf43caf3SRobert Elliott 34859846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 348625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 348725163bd5SWebb Scales if (rc) { 348825163bd5SWebb Scales cmd_free(h, c); 348925163bd5SWebb Scales return 0; 349025163bd5SWebb Scales } 34919846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 34929437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 34939437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 34949437ac43SStephen Cameron else 34959437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 34969437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 34979846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 34989846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 34999846590eSStephen M. Cameron cmd_free(h, c); 35009846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 35019846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 35029846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 35039846590eSStephen M. Cameron sense_key != NOT_READY || 35049846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 35059846590eSStephen M. Cameron return 0; 35069846590eSStephen M. Cameron } 35079846590eSStephen M. Cameron 35089846590eSStephen M. Cameron /* Determine the reason for not ready state */ 35099846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 35109846590eSStephen M. Cameron 35119846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 35129846590eSStephen M. Cameron switch (ldstat) { 35139846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 35145ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 35159846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 35169846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 35179846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 35189846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 35199846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 35209846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 35219846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 35229846590eSStephen M. Cameron return ldstat; 35239846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 35249846590eSStephen M. Cameron /* If VPD status page isn't available, 35259846590eSStephen M. Cameron * use ASC/ASCQ to determine state 35269846590eSStephen M. Cameron */ 35279846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 35289846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 35299846590eSStephen M. Cameron return ldstat; 35309846590eSStephen M. Cameron break; 35319846590eSStephen M. Cameron default: 35329846590eSStephen M. Cameron break; 35339846590eSStephen M. Cameron } 35349846590eSStephen M. Cameron return 0; 35359846590eSStephen M. Cameron } 35369846590eSStephen M. Cameron 35379b5c48c2SStephen Cameron /* 35389b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 35399b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 35409b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 35419b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 35429b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 35439b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 35449b5c48c2SStephen Cameron */ 35459b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 35469b5c48c2SStephen Cameron unsigned char *scsi3addr) 35479b5c48c2SStephen Cameron { 35489b5c48c2SStephen Cameron struct CommandList *c; 35499b5c48c2SStephen Cameron struct ErrorInfo *ei; 35509b5c48c2SStephen Cameron int rc = 0; 35519b5c48c2SStephen Cameron 35529b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 35539b5c48c2SStephen Cameron 35549b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 35559b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 35569b5c48c2SStephen Cameron return 1; 35579b5c48c2SStephen Cameron 35589b5c48c2SStephen Cameron c = cmd_alloc(h); 3559bf43caf3SRobert Elliott 35609b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 35619b5c48c2SStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 35629b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 35639b5c48c2SStephen Cameron ei = c->err_info; 35649b5c48c2SStephen Cameron switch (ei->CommandStatus) { 35659b5c48c2SStephen Cameron case CMD_INVALID: 35669b5c48c2SStephen Cameron rc = 0; 35679b5c48c2SStephen Cameron break; 35689b5c48c2SStephen Cameron case CMD_UNABORTABLE: 35699b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 35709b5c48c2SStephen Cameron rc = 1; 35719b5c48c2SStephen Cameron break; 35729437ac43SStephen Cameron case CMD_TMF_STATUS: 35739437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 35749437ac43SStephen Cameron break; 35759b5c48c2SStephen Cameron default: 35769b5c48c2SStephen Cameron rc = 0; 35779b5c48c2SStephen Cameron break; 35789b5c48c2SStephen Cameron } 35799b5c48c2SStephen Cameron cmd_free(h, c); 35809b5c48c2SStephen Cameron return rc; 35819b5c48c2SStephen Cameron } 35829b5c48c2SStephen Cameron 358375d23d89SDon Brace static void sanitize_inquiry_string(unsigned char *s, int len) 358475d23d89SDon Brace { 358575d23d89SDon Brace bool terminated = false; 358675d23d89SDon Brace 358775d23d89SDon Brace for (; len > 0; (--len, ++s)) { 358875d23d89SDon Brace if (*s == 0) 358975d23d89SDon Brace terminated = true; 359075d23d89SDon Brace if (terminated || *s < 0x20 || *s > 0x7e) 359175d23d89SDon Brace *s = ' '; 359275d23d89SDon Brace } 359375d23d89SDon Brace } 359475d23d89SDon Brace 3595edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 35960b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 35970b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3598edd16368SStephen M. Cameron { 35990b0e1d6cSStephen M. Cameron 36000b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 36010b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 36020b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 36030b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 36040b0e1d6cSStephen M. Cameron 3605ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 36060b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3607683fc444SDon Brace int rc = 0; 3608edd16368SStephen M. Cameron 3609ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3610683fc444SDon Brace if (!inq_buff) { 3611683fc444SDon Brace rc = -ENOMEM; 3612edd16368SStephen M. Cameron goto bail_out; 3613683fc444SDon Brace } 3614edd16368SStephen M. Cameron 3615edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3616edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3617edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3618edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3619edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3620edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3621683fc444SDon Brace rc = -EIO; 3622edd16368SStephen M. Cameron goto bail_out; 3623edd16368SStephen M. Cameron } 3624edd16368SStephen M. Cameron 362575d23d89SDon Brace sanitize_inquiry_string(&inq_buff[8], 8); 362675d23d89SDon Brace sanitize_inquiry_string(&inq_buff[16], 16); 362775d23d89SDon Brace 3628edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3629edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3630edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3631edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3632edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3633edd16368SStephen M. Cameron sizeof(this_device->model)); 3634edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3635edd16368SStephen M. Cameron sizeof(this_device->device_id)); 363675d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3637edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3638edd16368SStephen M. Cameron 3639edd16368SStephen M. Cameron if (this_device->devtype == TYPE_DISK && 3640283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 364167955ba3SStephen M. Cameron int volume_offline; 364267955ba3SStephen M. Cameron 3643edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3644283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3645283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 364667955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 364767955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 364867955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 364967955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3650283b4a9bSStephen M. Cameron } else { 3651edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3652283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3653283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 365441ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3655a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 36569846590eSStephen M. Cameron this_device->volume_offline = 0; 365703383736SDon Brace this_device->queue_depth = h->nr_cmds; 3658283b4a9bSStephen M. Cameron } 3659edd16368SStephen M. Cameron 36600b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 36610b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 36620b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 36630b0e1d6cSStephen M. Cameron */ 36640b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 36650b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 36660b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 36670b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 36680b0e1d6cSStephen M. Cameron } 3669edd16368SStephen M. Cameron kfree(inq_buff); 3670edd16368SStephen M. Cameron return 0; 3671edd16368SStephen M. Cameron 3672edd16368SStephen M. Cameron bail_out: 3673edd16368SStephen M. Cameron kfree(inq_buff); 3674683fc444SDon Brace return rc; 3675edd16368SStephen M. Cameron } 3676edd16368SStephen M. Cameron 36779b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 36789b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 36799b5c48c2SStephen Cameron { 36809b5c48c2SStephen Cameron unsigned long flags; 36819b5c48c2SStephen Cameron int rc, entry; 36829b5c48c2SStephen Cameron /* 36839b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 36849b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 36859b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 36869b5c48c2SStephen Cameron */ 36879b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 36889b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 36899b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 36909b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 36919b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 36929b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 36939b5c48c2SStephen Cameron } else { 36949b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 36959b5c48c2SStephen Cameron dev->supports_aborts = 36969b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 36979b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 36989b5c48c2SStephen Cameron dev->supports_aborts = 0; 36999b5c48c2SStephen Cameron } 37009b5c48c2SStephen Cameron } 37019b5c48c2SStephen Cameron 3702c795505aSKevin Barnett /* 3703c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3704edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3705edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3706edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3707edd16368SStephen M. Cameron */ 3708edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 37091f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3710edd16368SStephen M. Cameron { 3711c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3712edd16368SStephen M. Cameron 37131f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 37141f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 37151f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3716c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3717c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 37181f310bdeSStephen M. Cameron else 37191f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3720c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3721c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 37221f310bdeSStephen M. Cameron return; 37231f310bdeSStephen M. Cameron } 37241f310bdeSStephen M. Cameron /* It's a logical device */ 372566749d0dSScott Teel if (device->external) { 37261f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3727c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3728c795505aSKevin Barnett lunid & 0x00ff); 37291f310bdeSStephen M. Cameron return; 3730339b2b14SStephen M. Cameron } 3731c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3732c795505aSKevin Barnett 0, lunid & 0x3fff); 3733edd16368SStephen M. Cameron } 3734edd16368SStephen M. Cameron 3735edd16368SStephen M. Cameron 3736edd16368SStephen M. Cameron /* 373754b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 373854b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 373954b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 374054b6e9e9SScott Teel * 3. Return: 374154b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 374254b6e9e9SScott Teel * 0 if no matching physical disk was found. 374354b6e9e9SScott Teel */ 374454b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 374554b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 374654b6e9e9SScott Teel { 374741ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 374841ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 374941ce4c35SStephen Cameron unsigned long flags; 375054b6e9e9SScott Teel int i; 375154b6e9e9SScott Teel 375241ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 375341ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 375441ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 375541ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 375641ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 375741ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 375854b6e9e9SScott Teel return 1; 375954b6e9e9SScott Teel } 376041ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 376141ce4c35SStephen Cameron return 0; 376241ce4c35SStephen Cameron } 376341ce4c35SStephen Cameron 376466749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 376566749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 376666749d0dSScott Teel { 376766749d0dSScott Teel /* In report logicals, local logicals are listed first, 376866749d0dSScott Teel * then any externals. 376966749d0dSScott Teel */ 377066749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 377166749d0dSScott Teel 377266749d0dSScott Teel if (i == raid_ctlr_position) 377366749d0dSScott Teel return 0; 377466749d0dSScott Teel 377566749d0dSScott Teel if (i < logicals_start) 377666749d0dSScott Teel return 0; 377766749d0dSScott Teel 377866749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 377966749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 378066749d0dSScott Teel return 0; 378166749d0dSScott Teel 378266749d0dSScott Teel return 1; /* it's an external lun */ 378366749d0dSScott Teel } 378466749d0dSScott Teel 378554b6e9e9SScott Teel /* 3786edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3787edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3788edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3789edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3790edd16368SStephen M. Cameron */ 3791edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 379203383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 379301a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3794edd16368SStephen M. Cameron { 379503383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3796edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3797edd16368SStephen M. Cameron return -1; 3798edd16368SStephen M. Cameron } 379903383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3800edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 380103383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 380203383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3803edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3804edd16368SStephen M. Cameron } 380503383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3806edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3807edd16368SStephen M. Cameron return -1; 3808edd16368SStephen M. Cameron } 38096df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3810edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3811edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3812edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3813edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3814edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3815edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3816edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3817edd16368SStephen M. Cameron } 3818edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3819edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3820edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3821edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3822edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3823edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3824edd16368SStephen M. Cameron } 3825edd16368SStephen M. Cameron return 0; 3826edd16368SStephen M. Cameron } 3827edd16368SStephen M. Cameron 382842a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 382942a91641SDon Brace int i, int nphysicals, int nlogicals, 3830a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 3831339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 3832339b2b14SStephen M. Cameron { 3833339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 3834339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 3835339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 3836339b2b14SStephen M. Cameron */ 3837339b2b14SStephen M. Cameron 3838339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 3839339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3840339b2b14SStephen M. Cameron 3841339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 3842339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 3843339b2b14SStephen M. Cameron 3844339b2b14SStephen M. Cameron if (i < logicals_start) 3845d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 3846d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 3847339b2b14SStephen M. Cameron 3848339b2b14SStephen M. Cameron if (i < last_device) 3849339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 3850339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 3851339b2b14SStephen M. Cameron BUG(); 3852339b2b14SStephen M. Cameron return NULL; 3853339b2b14SStephen M. Cameron } 3854339b2b14SStephen M. Cameron 385503383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 385603383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 385703383736SDon Brace struct hpsa_scsi_dev_t *dev, 3858f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 385903383736SDon Brace struct bmic_identify_physical_device *id_phys) 386003383736SDon Brace { 386103383736SDon Brace int rc; 3862f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 386303383736SDon Brace 386403383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 3865f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3866a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 386703383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 3868f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3869f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 387003383736SDon Brace sizeof(*id_phys)); 387103383736SDon Brace if (!rc) 387203383736SDon Brace /* Reserve space for FW operations */ 387303383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 387403383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 387503383736SDon Brace dev->queue_depth = 387603383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 387703383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 387803383736SDon Brace else 387903383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 388003383736SDon Brace } 388103383736SDon Brace 38828270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 3883f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 38848270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 38858270b862SJoe Handzik { 3886f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3887f2039b03SDon Brace 3888f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 38898270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 38908270b862SJoe Handzik 38918270b862SJoe Handzik memcpy(&this_device->active_path_index, 38928270b862SJoe Handzik &id_phys->active_path_number, 38938270b862SJoe Handzik sizeof(this_device->active_path_index)); 38948270b862SJoe Handzik memcpy(&this_device->path_map, 38958270b862SJoe Handzik &id_phys->redundant_path_present_map, 38968270b862SJoe Handzik sizeof(this_device->path_map)); 38978270b862SJoe Handzik memcpy(&this_device->box, 38988270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 38998270b862SJoe Handzik sizeof(this_device->box)); 39008270b862SJoe Handzik memcpy(&this_device->phys_connector, 39018270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 39028270b862SJoe Handzik sizeof(this_device->phys_connector)); 39038270b862SJoe Handzik memcpy(&this_device->bay, 39048270b862SJoe Handzik &id_phys->phys_bay_in_box, 39058270b862SJoe Handzik sizeof(this_device->bay)); 39068270b862SJoe Handzik } 39078270b862SJoe Handzik 390866749d0dSScott Teel /* get number of local logical disks. */ 390966749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 391066749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 391166749d0dSScott Teel u32 *nlocals) 391266749d0dSScott Teel { 391366749d0dSScott Teel int rc; 391466749d0dSScott Teel 391566749d0dSScott Teel if (!id_ctlr) { 391666749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 391766749d0dSScott Teel __func__); 391866749d0dSScott Teel return -ENOMEM; 391966749d0dSScott Teel } 392066749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 392166749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 392266749d0dSScott Teel if (!rc) 392366749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 392466749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 392566749d0dSScott Teel else 392666749d0dSScott Teel *nlocals = le16_to_cpu( 392766749d0dSScott Teel id_ctlr->extended_logical_unit_count); 392866749d0dSScott Teel else 392966749d0dSScott Teel *nlocals = -1; 393066749d0dSScott Teel return rc; 393166749d0dSScott Teel } 393266749d0dSScott Teel 393366749d0dSScott Teel 39348aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 3935edd16368SStephen M. Cameron { 3936edd16368SStephen M. Cameron /* the idea here is we could get notified 3937edd16368SStephen M. Cameron * that some devices have changed, so we do a report 3938edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 3939edd16368SStephen M. Cameron * our list of devices accordingly. 3940edd16368SStephen M. Cameron * 3941edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 3942edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 3943edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 3944edd16368SStephen M. Cameron * devices, vs. disappearing devices. 3945edd16368SStephen M. Cameron */ 3946a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 3947edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 394803383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 394966749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 395001a02ffcSStephen M. Cameron u32 nphysicals = 0; 395101a02ffcSStephen M. Cameron u32 nlogicals = 0; 395266749d0dSScott Teel u32 nlocal_logicals = 0; 395301a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 3954edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 3955edd16368SStephen M. Cameron int ncurrent = 0; 39564f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 3957339b2b14SStephen M. Cameron int raid_ctlr_position; 395804fa2f44SKevin Barnett bool physical_device; 3959aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 3960edd16368SStephen M. Cameron 3961cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 396292084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 396392084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 3964edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 396503383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 396666749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 3967edd16368SStephen M. Cameron 396803383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 396966749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 3970edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 3971edd16368SStephen M. Cameron goto out; 3972edd16368SStephen M. Cameron } 3973edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 3974edd16368SStephen M. Cameron 3975853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 3976853633e8SDon Brace 397703383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 3978853633e8SDon Brace logdev_list, &nlogicals)) { 3979853633e8SDon Brace h->drv_req_rescan = 1; 3980edd16368SStephen M. Cameron goto out; 3981853633e8SDon Brace } 3982edd16368SStephen M. Cameron 398366749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 398466749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 398566749d0dSScott Teel dev_warn(&h->pdev->dev, 398666749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 398766749d0dSScott Teel __func__); 398866749d0dSScott Teel } 3989edd16368SStephen M. Cameron 3990aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 3991aca4a520SScott Teel * plus external target devices, and a device for the local RAID 3992aca4a520SScott Teel * controller. 3993edd16368SStephen M. Cameron */ 3994aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 3995edd16368SStephen M. Cameron 3996edd16368SStephen M. Cameron /* Allocate the per device structures */ 3997edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 3998b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 3999b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4000b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4001b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4002b7ec021fSScott Teel break; 4003b7ec021fSScott Teel } 4004b7ec021fSScott Teel 4005edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4006edd16368SStephen M. Cameron if (!currentsd[i]) { 4007edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4008edd16368SStephen M. Cameron __FILE__, __LINE__); 4009853633e8SDon Brace h->drv_req_rescan = 1; 4010edd16368SStephen M. Cameron goto out; 4011edd16368SStephen M. Cameron } 4012edd16368SStephen M. Cameron ndev_allocated++; 4013edd16368SStephen M. Cameron } 4014edd16368SStephen M. Cameron 40158645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4016339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4017339b2b14SStephen M. Cameron else 4018339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4019339b2b14SStephen M. Cameron 4020edd16368SStephen M. Cameron /* adjust our table of devices */ 40214f4eb9f1SScott Teel n_ext_target_devs = 0; 4022edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 40230b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4024683fc444SDon Brace int rc = 0; 4025f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 4026edd16368SStephen M. Cameron 402704fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4028edd16368SStephen M. Cameron 4029edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4030339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4031339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 403241ce4c35SStephen Cameron 403341ce4c35SStephen Cameron /* skip masked non-disk devices */ 403404fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && physical_device && 403504fa2f44SKevin Barnett (physdev_list->LUN[phys_dev_index].device_flags & 0x01)) 4036edd16368SStephen M. Cameron continue; 4037edd16368SStephen M. Cameron 4038edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4039683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4040683fc444SDon Brace &is_OBDR); 4041683fc444SDon Brace if (rc == -ENOMEM) { 4042683fc444SDon Brace dev_warn(&h->pdev->dev, 4043683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4044853633e8SDon Brace h->drv_req_rescan = 1; 4045683fc444SDon Brace goto out; 4046853633e8SDon Brace } 4047683fc444SDon Brace if (rc) { 4048683fc444SDon Brace dev_warn(&h->pdev->dev, 4049683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4050683fc444SDon Brace continue; 4051683fc444SDon Brace } 4052683fc444SDon Brace 405366749d0dSScott Teel /* Determine if this is a lun from an external target array */ 405466749d0dSScott Teel tmpdevice->external = 405566749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 405666749d0dSScott Teel nphysicals, nlocal_logicals); 405766749d0dSScott Teel 40581f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 40599b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4060edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4061edd16368SStephen M. Cameron 406234592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 406334592254SScott Teel * Event-based change notification is unreliable for those. 4064edd16368SStephen M. Cameron */ 406534592254SScott Teel if (!h->discovery_polling) { 406634592254SScott Teel if (tmpdevice->external) { 406734592254SScott Teel h->discovery_polling = 1; 406834592254SScott Teel dev_info(&h->pdev->dev, 406934592254SScott Teel "External target, activate discovery polling.\n"); 4070edd16368SStephen M. Cameron } 407134592254SScott Teel } 407234592254SScott Teel 4073edd16368SStephen M. Cameron 4074edd16368SStephen M. Cameron *this_device = *tmpdevice; 407504fa2f44SKevin Barnett this_device->physical_device = physical_device; 4076edd16368SStephen M. Cameron 407704fa2f44SKevin Barnett /* 407804fa2f44SKevin Barnett * Expose all devices except for physical devices that 407904fa2f44SKevin Barnett * are masked. 408004fa2f44SKevin Barnett */ 408104fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 40822a168208SKevin Barnett this_device->expose_device = 0; 40832a168208SKevin Barnett else 40842a168208SKevin Barnett this_device->expose_device = 1; 408541ce4c35SStephen Cameron 4086d04e62b9SKevin Barnett 4087d04e62b9SKevin Barnett /* 4088d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4089d04e62b9SKevin Barnett */ 4090d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4091d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4092edd16368SStephen M. Cameron 4093edd16368SStephen M. Cameron switch (this_device->devtype) { 40940b0e1d6cSStephen M. Cameron case TYPE_ROM: 4095edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4096edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4097edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4098edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4099edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4100edd16368SStephen M. Cameron * the inquiry data. 4101edd16368SStephen M. Cameron */ 41020b0e1d6cSStephen M. Cameron if (is_OBDR) 4103edd16368SStephen M. Cameron ncurrent++; 4104edd16368SStephen M. Cameron break; 4105edd16368SStephen M. Cameron case TYPE_DISK: 410604fa2f44SKevin Barnett if (this_device->physical_device) { 4107b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4108b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4109ecf418d1SJoe Handzik this_device->offload_enabled = 0; 411003383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4111f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4112f2039b03SDon Brace hpsa_get_path_info(this_device, 4113f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4114b9092b79SKevin Barnett } 4115edd16368SStephen M. Cameron ncurrent++; 4116edd16368SStephen M. Cameron break; 4117edd16368SStephen M. Cameron case TYPE_TAPE: 4118edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 411941ce4c35SStephen Cameron case TYPE_ENCLOSURE: 412041ce4c35SStephen Cameron ncurrent++; 412141ce4c35SStephen Cameron break; 4122edd16368SStephen M. Cameron case TYPE_RAID: 4123edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4124edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4125edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4126edd16368SStephen M. Cameron * don't present it. 4127edd16368SStephen M. Cameron */ 4128edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4129edd16368SStephen M. Cameron break; 4130edd16368SStephen M. Cameron ncurrent++; 4131edd16368SStephen M. Cameron break; 4132edd16368SStephen M. Cameron default: 4133edd16368SStephen M. Cameron break; 4134edd16368SStephen M. Cameron } 4135cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4136edd16368SStephen M. Cameron break; 4137edd16368SStephen M. Cameron } 4138d04e62b9SKevin Barnett 4139d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4140d04e62b9SKevin Barnett int rc = 0; 4141d04e62b9SKevin Barnett 4142d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4143d04e62b9SKevin Barnett if (rc) { 4144d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4145d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4146d04e62b9SKevin Barnett goto out; 4147d04e62b9SKevin Barnett } 4148d04e62b9SKevin Barnett } 4149d04e62b9SKevin Barnett 41508aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4151edd16368SStephen M. Cameron out: 4152edd16368SStephen M. Cameron kfree(tmpdevice); 4153edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4154edd16368SStephen M. Cameron kfree(currentsd[i]); 4155edd16368SStephen M. Cameron kfree(currentsd); 4156edd16368SStephen M. Cameron kfree(physdev_list); 4157edd16368SStephen M. Cameron kfree(logdev_list); 415866749d0dSScott Teel kfree(id_ctlr); 415903383736SDon Brace kfree(id_phys); 4160edd16368SStephen M. Cameron } 4161edd16368SStephen M. Cameron 4162ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4163ec5cbf04SWebb Scales struct scatterlist *sg) 4164ec5cbf04SWebb Scales { 4165ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4166ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4167ec5cbf04SWebb Scales 4168ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4169ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4170ec5cbf04SWebb Scales desc->Ext = 0; 4171ec5cbf04SWebb Scales } 4172ec5cbf04SWebb Scales 4173c7ee65b3SWebb Scales /* 4174c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4175edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4176edd16368SStephen M. Cameron * hpsa command, cp. 4177edd16368SStephen M. Cameron */ 417833a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4179edd16368SStephen M. Cameron struct CommandList *cp, 4180edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4181edd16368SStephen M. Cameron { 4182edd16368SStephen M. Cameron struct scatterlist *sg; 4183b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 418433a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4185edd16368SStephen M. Cameron 418633a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4187edd16368SStephen M. Cameron 4188edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4189edd16368SStephen M. Cameron if (use_sg < 0) 4190edd16368SStephen M. Cameron return use_sg; 4191edd16368SStephen M. Cameron 4192edd16368SStephen M. Cameron if (!use_sg) 4193edd16368SStephen M. Cameron goto sglist_finished; 4194edd16368SStephen M. Cameron 4195b3a7ba7cSWebb Scales /* 4196b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4197b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4198b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4199b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4200b3a7ba7cSWebb Scales * the entries in the one list. 4201b3a7ba7cSWebb Scales */ 420233a2ffceSStephen M. Cameron curr_sg = cp->SG; 4203b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4204b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4205b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4206b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4207ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 420833a2ffceSStephen M. Cameron curr_sg++; 420933a2ffceSStephen M. Cameron } 4210ec5cbf04SWebb Scales 4211b3a7ba7cSWebb Scales if (chained) { 4212b3a7ba7cSWebb Scales /* 4213b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4214b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4215b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4216b3a7ba7cSWebb Scales * where the previous loop left off. 4217b3a7ba7cSWebb Scales */ 4218b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4219b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4220b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4221b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4222b3a7ba7cSWebb Scales curr_sg++; 4223b3a7ba7cSWebb Scales } 4224b3a7ba7cSWebb Scales } 4225b3a7ba7cSWebb Scales 4226ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4227b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 422833a2ffceSStephen M. Cameron 422933a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 423033a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 423133a2ffceSStephen M. Cameron 423233a2ffceSStephen M. Cameron if (chained) { 423333a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 423450a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4235e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4236e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4237e2bea6dfSStephen M. Cameron return -1; 4238e2bea6dfSStephen M. Cameron } 423933a2ffceSStephen M. Cameron return 0; 4240edd16368SStephen M. Cameron } 4241edd16368SStephen M. Cameron 4242edd16368SStephen M. Cameron sglist_finished: 4243edd16368SStephen M. Cameron 424401a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4245c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4246edd16368SStephen M. Cameron return 0; 4247edd16368SStephen M. Cameron } 4248edd16368SStephen M. Cameron 4249283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4250283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4251283b4a9bSStephen M. Cameron { 4252283b4a9bSStephen M. Cameron int is_write = 0; 4253283b4a9bSStephen M. Cameron u32 block; 4254283b4a9bSStephen M. Cameron u32 block_cnt; 4255283b4a9bSStephen M. Cameron 4256283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4257283b4a9bSStephen M. Cameron switch (cdb[0]) { 4258283b4a9bSStephen M. Cameron case WRITE_6: 4259283b4a9bSStephen M. Cameron case WRITE_12: 4260283b4a9bSStephen M. Cameron is_write = 1; 4261283b4a9bSStephen M. Cameron case READ_6: 4262283b4a9bSStephen M. Cameron case READ_12: 4263283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4264c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4265283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4266c8a6c9a6SDon Brace if (block_cnt == 0) 4267c8a6c9a6SDon Brace block_cnt = 256; 4268283b4a9bSStephen M. Cameron } else { 4269283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4270c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4271c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4272283b4a9bSStephen M. Cameron } 4273283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4274283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4275283b4a9bSStephen M. Cameron 4276283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4277283b4a9bSStephen M. Cameron cdb[1] = 0; 4278283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4279283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4280283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4281283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4282283b4a9bSStephen M. Cameron cdb[6] = 0; 4283283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4284283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4285283b4a9bSStephen M. Cameron cdb[9] = 0; 4286283b4a9bSStephen M. Cameron *cdb_len = 10; 4287283b4a9bSStephen M. Cameron break; 4288283b4a9bSStephen M. Cameron } 4289283b4a9bSStephen M. Cameron return 0; 4290283b4a9bSStephen M. Cameron } 4291283b4a9bSStephen M. Cameron 4292c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4293283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 429403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4295e1f7de0cSMatt Gates { 4296e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4297e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4298e1f7de0cSMatt Gates unsigned int len; 4299e1f7de0cSMatt Gates unsigned int total_len = 0; 4300e1f7de0cSMatt Gates struct scatterlist *sg; 4301e1f7de0cSMatt Gates u64 addr64; 4302e1f7de0cSMatt Gates int use_sg, i; 4303e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4304e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4305e1f7de0cSMatt Gates 4306283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 430703383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 430803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4309283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 431003383736SDon Brace } 4311283b4a9bSStephen M. Cameron 4312e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4313e1f7de0cSMatt Gates 431403383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 431503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4316283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 431703383736SDon Brace } 4318283b4a9bSStephen M. Cameron 4319e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4320e1f7de0cSMatt Gates 4321e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4322e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4323e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4324e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4325e1f7de0cSMatt Gates 4326e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 432703383736SDon Brace if (use_sg < 0) { 432803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4329e1f7de0cSMatt Gates return use_sg; 433003383736SDon Brace } 4331e1f7de0cSMatt Gates 4332e1f7de0cSMatt Gates if (use_sg) { 4333e1f7de0cSMatt Gates curr_sg = cp->SG; 4334e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4335e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4336e1f7de0cSMatt Gates len = sg_dma_len(sg); 4337e1f7de0cSMatt Gates total_len += len; 433850a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 433950a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 434050a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4341e1f7de0cSMatt Gates curr_sg++; 4342e1f7de0cSMatt Gates } 434350a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4344e1f7de0cSMatt Gates 4345e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4346e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4347e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4348e1f7de0cSMatt Gates break; 4349e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4350e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4351e1f7de0cSMatt Gates break; 4352e1f7de0cSMatt Gates case DMA_NONE: 4353e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4354e1f7de0cSMatt Gates break; 4355e1f7de0cSMatt Gates default: 4356e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4357e1f7de0cSMatt Gates cmd->sc_data_direction); 4358e1f7de0cSMatt Gates BUG(); 4359e1f7de0cSMatt Gates break; 4360e1f7de0cSMatt Gates } 4361e1f7de0cSMatt Gates } else { 4362e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4363e1f7de0cSMatt Gates } 4364e1f7de0cSMatt Gates 4365c349775eSScott Teel c->Header.SGList = use_sg; 4366e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 43672b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 43682b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 43692b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 43702b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 43712b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4372283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4373283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4374c349775eSScott Teel /* Tag was already set at init time. */ 4375e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4376e1f7de0cSMatt Gates return 0; 4377e1f7de0cSMatt Gates } 4378edd16368SStephen M. Cameron 4379283b4a9bSStephen M. Cameron /* 4380283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4381283b4a9bSStephen M. Cameron * I/O accelerator path. 4382283b4a9bSStephen M. Cameron */ 4383283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4384283b4a9bSStephen M. Cameron struct CommandList *c) 4385283b4a9bSStephen M. Cameron { 4386283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4387283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4388283b4a9bSStephen M. Cameron 438903383736SDon Brace c->phys_disk = dev; 439003383736SDon Brace 4391283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 439203383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4393283b4a9bSStephen M. Cameron } 4394283b4a9bSStephen M. Cameron 4395dd0e19f3SScott Teel /* 4396dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4397dd0e19f3SScott Teel */ 4398dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4399dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4400dd0e19f3SScott Teel { 4401dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4402dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4403dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4404dd0e19f3SScott Teel u64 first_block; 4405dd0e19f3SScott Teel 4406dd0e19f3SScott Teel /* Are we doing encryption on this device */ 44072b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4408dd0e19f3SScott Teel return; 4409dd0e19f3SScott Teel /* Set the data encryption key index. */ 4410dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4411dd0e19f3SScott Teel 4412dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4413dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4414dd0e19f3SScott Teel 4415dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4416dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4417dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4418dd0e19f3SScott Teel */ 4419dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4420dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4421dd0e19f3SScott Teel case WRITE_6: 4422dd0e19f3SScott Teel case READ_6: 44232b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4424dd0e19f3SScott Teel break; 4425dd0e19f3SScott Teel case WRITE_10: 4426dd0e19f3SScott Teel case READ_10: 4427dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4428dd0e19f3SScott Teel case WRITE_12: 4429dd0e19f3SScott Teel case READ_12: 44302b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4431dd0e19f3SScott Teel break; 4432dd0e19f3SScott Teel case WRITE_16: 4433dd0e19f3SScott Teel case READ_16: 44342b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4435dd0e19f3SScott Teel break; 4436dd0e19f3SScott Teel default: 4437dd0e19f3SScott Teel dev_err(&h->pdev->dev, 44382b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 44392b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4440dd0e19f3SScott Teel BUG(); 4441dd0e19f3SScott Teel break; 4442dd0e19f3SScott Teel } 44432b08b3e9SDon Brace 44442b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 44452b08b3e9SDon Brace first_block = first_block * 44462b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 44472b08b3e9SDon Brace 44482b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 44492b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4450dd0e19f3SScott Teel } 4451dd0e19f3SScott Teel 4452c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4453c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 445403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4455c349775eSScott Teel { 4456c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4457c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4458c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4459c349775eSScott Teel int use_sg, i; 4460c349775eSScott Teel struct scatterlist *sg; 4461c349775eSScott Teel u64 addr64; 4462c349775eSScott Teel u32 len; 4463c349775eSScott Teel u32 total_len = 0; 4464c349775eSScott Teel 4465d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4466c349775eSScott Teel 446703383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 446803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4469c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 447003383736SDon Brace } 447103383736SDon Brace 4472c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4473c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4474c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4475c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4476c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4477c349775eSScott Teel 4478c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4479c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4480c349775eSScott Teel 4481c349775eSScott Teel use_sg = scsi_dma_map(cmd); 448203383736SDon Brace if (use_sg < 0) { 448303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4484c349775eSScott Teel return use_sg; 448503383736SDon Brace } 4486c349775eSScott Teel 4487c349775eSScott Teel if (use_sg) { 4488c349775eSScott Teel curr_sg = cp->sg; 4489d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4490d9a729f3SWebb Scales addr64 = le64_to_cpu( 4491d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4492d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4493d9a729f3SWebb Scales curr_sg->length = 0; 4494d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4495d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4496d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4497d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4498d9a729f3SWebb Scales 4499d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4500d9a729f3SWebb Scales } 4501c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4502c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4503c349775eSScott Teel len = sg_dma_len(sg); 4504c349775eSScott Teel total_len += len; 4505c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4506c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4507c349775eSScott Teel curr_sg->reserved[0] = 0; 4508c349775eSScott Teel curr_sg->reserved[1] = 0; 4509c349775eSScott Teel curr_sg->reserved[2] = 0; 4510c349775eSScott Teel curr_sg->chain_indicator = 0; 4511c349775eSScott Teel curr_sg++; 4512c349775eSScott Teel } 4513c349775eSScott Teel 4514c349775eSScott Teel switch (cmd->sc_data_direction) { 4515c349775eSScott Teel case DMA_TO_DEVICE: 4516dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4517dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4518c349775eSScott Teel break; 4519c349775eSScott Teel case DMA_FROM_DEVICE: 4520dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4521dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4522c349775eSScott Teel break; 4523c349775eSScott Teel case DMA_NONE: 4524dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4525dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4526c349775eSScott Teel break; 4527c349775eSScott Teel default: 4528c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4529c349775eSScott Teel cmd->sc_data_direction); 4530c349775eSScott Teel BUG(); 4531c349775eSScott Teel break; 4532c349775eSScott Teel } 4533c349775eSScott Teel } else { 4534dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4535dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4536c349775eSScott Teel } 4537dd0e19f3SScott Teel 4538dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4539dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4540dd0e19f3SScott Teel 45412b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4542f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4543c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4544c349775eSScott Teel 4545c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4546c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4547c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 454850a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4549c349775eSScott Teel 4550d9a729f3SWebb Scales /* fill in sg elements */ 4551d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4552d9a729f3SWebb Scales cp->sg_count = 1; 4553a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4554d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4555d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4556d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4557d9a729f3SWebb Scales return -1; 4558d9a729f3SWebb Scales } 4559d9a729f3SWebb Scales } else 4560d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4561d9a729f3SWebb Scales 4562c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4563c349775eSScott Teel return 0; 4564c349775eSScott Teel } 4565c349775eSScott Teel 4566c349775eSScott Teel /* 4567c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4568c349775eSScott Teel */ 4569c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4570c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 457103383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4572c349775eSScott Teel { 457303383736SDon Brace /* Try to honor the device's queue depth */ 457403383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 457503383736SDon Brace phys_disk->queue_depth) { 457603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 457703383736SDon Brace return IO_ACCEL_INELIGIBLE; 457803383736SDon Brace } 4579c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4580c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 458103383736SDon Brace cdb, cdb_len, scsi3addr, 458203383736SDon Brace phys_disk); 4583c349775eSScott Teel else 4584c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 458503383736SDon Brace cdb, cdb_len, scsi3addr, 458603383736SDon Brace phys_disk); 4587c349775eSScott Teel } 4588c349775eSScott Teel 45896b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 45906b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 45916b80b18fSScott Teel { 45926b80b18fSScott Teel if (offload_to_mirror == 0) { 45936b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 45942b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 45956b80b18fSScott Teel return; 45966b80b18fSScott Teel } 45976b80b18fSScott Teel do { 45986b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 45992b08b3e9SDon Brace *current_group = *map_index / 46002b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 46016b80b18fSScott Teel if (offload_to_mirror == *current_group) 46026b80b18fSScott Teel continue; 46032b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 46046b80b18fSScott Teel /* select map index from next group */ 46052b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 46066b80b18fSScott Teel (*current_group)++; 46076b80b18fSScott Teel } else { 46086b80b18fSScott Teel /* select map index from first group */ 46092b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 46106b80b18fSScott Teel *current_group = 0; 46116b80b18fSScott Teel } 46126b80b18fSScott Teel } while (offload_to_mirror != *current_group); 46136b80b18fSScott Teel } 46146b80b18fSScott Teel 4615283b4a9bSStephen M. Cameron /* 4616283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4617283b4a9bSStephen M. Cameron */ 4618283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4619283b4a9bSStephen M. Cameron struct CommandList *c) 4620283b4a9bSStephen M. Cameron { 4621283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4622283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4623283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4624283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4625283b4a9bSStephen M. Cameron int is_write = 0; 4626283b4a9bSStephen M. Cameron u32 map_index; 4627283b4a9bSStephen M. Cameron u64 first_block, last_block; 4628283b4a9bSStephen M. Cameron u32 block_cnt; 4629283b4a9bSStephen M. Cameron u32 blocks_per_row; 4630283b4a9bSStephen M. Cameron u64 first_row, last_row; 4631283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4632283b4a9bSStephen M. Cameron u32 first_column, last_column; 46336b80b18fSScott Teel u64 r0_first_row, r0_last_row; 46346b80b18fSScott Teel u32 r5or6_blocks_per_row; 46356b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 46366b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 46376b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 46386b80b18fSScott Teel u32 total_disks_per_row; 46396b80b18fSScott Teel u32 stripesize; 46406b80b18fSScott Teel u32 first_group, last_group, current_group; 4641283b4a9bSStephen M. Cameron u32 map_row; 4642283b4a9bSStephen M. Cameron u32 disk_handle; 4643283b4a9bSStephen M. Cameron u64 disk_block; 4644283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4645283b4a9bSStephen M. Cameron u8 cdb[16]; 4646283b4a9bSStephen M. Cameron u8 cdb_len; 46472b08b3e9SDon Brace u16 strip_size; 4648283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4649283b4a9bSStephen M. Cameron u64 tmpdiv; 4650283b4a9bSStephen M. Cameron #endif 46516b80b18fSScott Teel int offload_to_mirror; 4652283b4a9bSStephen M. Cameron 4653283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4654283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4655283b4a9bSStephen M. Cameron case WRITE_6: 4656283b4a9bSStephen M. Cameron is_write = 1; 4657283b4a9bSStephen M. Cameron case READ_6: 4658c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4659283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 46603fa89a04SStephen M. Cameron if (block_cnt == 0) 46613fa89a04SStephen M. Cameron block_cnt = 256; 4662283b4a9bSStephen M. Cameron break; 4663283b4a9bSStephen M. Cameron case WRITE_10: 4664283b4a9bSStephen M. Cameron is_write = 1; 4665283b4a9bSStephen M. Cameron case READ_10: 4666283b4a9bSStephen M. Cameron first_block = 4667283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4668283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4669283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4670283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4671283b4a9bSStephen M. Cameron block_cnt = 4672283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4673283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4674283b4a9bSStephen M. Cameron break; 4675283b4a9bSStephen M. Cameron case WRITE_12: 4676283b4a9bSStephen M. Cameron is_write = 1; 4677283b4a9bSStephen M. Cameron case READ_12: 4678283b4a9bSStephen M. Cameron first_block = 4679283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4680283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4681283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4682283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4683283b4a9bSStephen M. Cameron block_cnt = 4684283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4685283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4686283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4687283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4688283b4a9bSStephen M. Cameron break; 4689283b4a9bSStephen M. Cameron case WRITE_16: 4690283b4a9bSStephen M. Cameron is_write = 1; 4691283b4a9bSStephen M. Cameron case READ_16: 4692283b4a9bSStephen M. Cameron first_block = 4693283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4694283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4695283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4696283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4697283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4698283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4699283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4700283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4701283b4a9bSStephen M. Cameron block_cnt = 4702283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4703283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4704283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4705283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4706283b4a9bSStephen M. Cameron break; 4707283b4a9bSStephen M. Cameron default: 4708283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4709283b4a9bSStephen M. Cameron } 4710283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4711283b4a9bSStephen M. Cameron 4712283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4713283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4714283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4715283b4a9bSStephen M. Cameron 4716283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 47172b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 47182b08b3e9SDon Brace last_block < first_block) 4719283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4720283b4a9bSStephen M. Cameron 4721283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 47222b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 47232b08b3e9SDon Brace le16_to_cpu(map->strip_size); 47242b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4725283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4726283b4a9bSStephen M. Cameron tmpdiv = first_block; 4727283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4728283b4a9bSStephen M. Cameron first_row = tmpdiv; 4729283b4a9bSStephen M. Cameron tmpdiv = last_block; 4730283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4731283b4a9bSStephen M. Cameron last_row = tmpdiv; 4732283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4733283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4734283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 47352b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4736283b4a9bSStephen M. Cameron first_column = tmpdiv; 4737283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 47382b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4739283b4a9bSStephen M. Cameron last_column = tmpdiv; 4740283b4a9bSStephen M. Cameron #else 4741283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4742283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4743283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4744283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 47452b08b3e9SDon Brace first_column = first_row_offset / strip_size; 47462b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4747283b4a9bSStephen M. Cameron #endif 4748283b4a9bSStephen M. Cameron 4749283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 4750283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 4751283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4752283b4a9bSStephen M. Cameron 4753283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 47542b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 47552b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 4756283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 47572b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 47586b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 47596b80b18fSScott Teel 47606b80b18fSScott Teel switch (dev->raid_level) { 47616b80b18fSScott Teel case HPSA_RAID_0: 47626b80b18fSScott Teel break; /* nothing special to do */ 47636b80b18fSScott Teel case HPSA_RAID_1: 47646b80b18fSScott Teel /* Handles load balance across RAID 1 members. 47656b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 47666b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 4767283b4a9bSStephen M. Cameron */ 47682b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 4769283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 47702b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 4771283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 47726b80b18fSScott Teel break; 47736b80b18fSScott Teel case HPSA_RAID_ADM: 47746b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 47756b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 47766b80b18fSScott Teel */ 47772b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 47786b80b18fSScott Teel 47796b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 47806b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 47816b80b18fSScott Teel &map_index, ¤t_group); 47826b80b18fSScott Teel /* set mirror group to use next time */ 47836b80b18fSScott Teel offload_to_mirror = 47842b08b3e9SDon Brace (offload_to_mirror >= 47852b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 47866b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 47876b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 47886b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 47896b80b18fSScott Teel * function since multiple threads might simultaneously 47906b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 47916b80b18fSScott Teel */ 47926b80b18fSScott Teel break; 47936b80b18fSScott Teel case HPSA_RAID_5: 47946b80b18fSScott Teel case HPSA_RAID_6: 47952b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 47966b80b18fSScott Teel break; 47976b80b18fSScott Teel 47986b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 47996b80b18fSScott Teel r5or6_blocks_per_row = 48002b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 48012b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 48026b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 48032b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 48042b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 48056b80b18fSScott Teel #if BITS_PER_LONG == 32 48066b80b18fSScott Teel tmpdiv = first_block; 48076b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 48086b80b18fSScott Teel tmpdiv = first_group; 48096b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 48106b80b18fSScott Teel first_group = tmpdiv; 48116b80b18fSScott Teel tmpdiv = last_block; 48126b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 48136b80b18fSScott Teel tmpdiv = last_group; 48146b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 48156b80b18fSScott Teel last_group = tmpdiv; 48166b80b18fSScott Teel #else 48176b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 48186b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 48196b80b18fSScott Teel #endif 4820000ff7c2SStephen M. Cameron if (first_group != last_group) 48216b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 48226b80b18fSScott Teel 48236b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 48246b80b18fSScott Teel #if BITS_PER_LONG == 32 48256b80b18fSScott Teel tmpdiv = first_block; 48266b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 48276b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 48286b80b18fSScott Teel tmpdiv = last_block; 48296b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 48306b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 48316b80b18fSScott Teel #else 48326b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 48336b80b18fSScott Teel first_block / stripesize; 48346b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 48356b80b18fSScott Teel #endif 48366b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 48376b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 48386b80b18fSScott Teel 48396b80b18fSScott Teel 48406b80b18fSScott Teel /* Verify request is in a single column */ 48416b80b18fSScott Teel #if BITS_PER_LONG == 32 48426b80b18fSScott Teel tmpdiv = first_block; 48436b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 48446b80b18fSScott Teel tmpdiv = first_row_offset; 48456b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 48466b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 48476b80b18fSScott Teel tmpdiv = last_block; 48486b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 48496b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 48506b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 48516b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 48526b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 48536b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 48546b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 48556b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 48566b80b18fSScott Teel r5or6_last_column = tmpdiv; 48576b80b18fSScott Teel #else 48586b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 48596b80b18fSScott Teel (u32)((first_block % stripesize) % 48606b80b18fSScott Teel r5or6_blocks_per_row); 48616b80b18fSScott Teel 48626b80b18fSScott Teel r5or6_last_row_offset = 48636b80b18fSScott Teel (u32)((last_block % stripesize) % 48646b80b18fSScott Teel r5or6_blocks_per_row); 48656b80b18fSScott Teel 48666b80b18fSScott Teel first_column = r5or6_first_column = 48672b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 48686b80b18fSScott Teel r5or6_last_column = 48692b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 48706b80b18fSScott Teel #endif 48716b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 48726b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 48736b80b18fSScott Teel 48746b80b18fSScott Teel /* Request is eligible */ 48756b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 48762b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 48776b80b18fSScott Teel 48786b80b18fSScott Teel map_index = (first_group * 48792b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 48806b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 48816b80b18fSScott Teel break; 48826b80b18fSScott Teel default: 48836b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 4884283b4a9bSStephen M. Cameron } 48856b80b18fSScott Teel 488607543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 488707543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 488807543e0cSStephen Cameron 488903383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 489003383736SDon Brace 4891283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 48922b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 48932b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 48942b08b3e9SDon Brace (first_row_offset - first_column * 48952b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 4896283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 4897283b4a9bSStephen M. Cameron 4898283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 4899283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 4900283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 4901283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 4902283b4a9bSStephen M. Cameron } 4903283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 4904283b4a9bSStephen M. Cameron 4905283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 4906283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 4907283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 4908283b4a9bSStephen M. Cameron cdb[1] = 0; 4909283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 4910283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 4911283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 4912283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 4913283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 4914283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 4915283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 4916283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 4917283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 4918283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 4919283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 4920283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 4921283b4a9bSStephen M. Cameron cdb[14] = 0; 4922283b4a9bSStephen M. Cameron cdb[15] = 0; 4923283b4a9bSStephen M. Cameron cdb_len = 16; 4924283b4a9bSStephen M. Cameron } else { 4925283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4926283b4a9bSStephen M. Cameron cdb[1] = 0; 4927283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 4928283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 4929283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 4930283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 4931283b4a9bSStephen M. Cameron cdb[6] = 0; 4932283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 4933283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 4934283b4a9bSStephen M. Cameron cdb[9] = 0; 4935283b4a9bSStephen M. Cameron cdb_len = 10; 4936283b4a9bSStephen M. Cameron } 4937283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 493803383736SDon Brace dev->scsi3addr, 493903383736SDon Brace dev->phys_disk[map_index]); 4940283b4a9bSStephen M. Cameron } 4941283b4a9bSStephen M. Cameron 494225163bd5SWebb Scales /* 494325163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 494425163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 494525163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 494625163bd5SWebb Scales */ 4947574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 4948574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 4949574f05d3SStephen Cameron unsigned char scsi3addr[]) 4950edd16368SStephen M. Cameron { 4951edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 4952edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 4953edd16368SStephen M. Cameron c->scsi_cmd = cmd; 4954edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 4955edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 4956f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 4957edd16368SStephen M. Cameron 4958edd16368SStephen M. Cameron /* Fill in the request block... */ 4959edd16368SStephen M. Cameron 4960edd16368SStephen M. Cameron c->Request.Timeout = 0; 4961edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 4962edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 4963edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 4964edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 4965edd16368SStephen M. Cameron case DMA_TO_DEVICE: 4966a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4967a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 4968edd16368SStephen M. Cameron break; 4969edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 4970a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4971a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 4972edd16368SStephen M. Cameron break; 4973edd16368SStephen M. Cameron case DMA_NONE: 4974a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4975a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 4976edd16368SStephen M. Cameron break; 4977edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 4978edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 4979edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 4980edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 4981edd16368SStephen M. Cameron */ 4982edd16368SStephen M. Cameron 4983a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4984a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 4985edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 4986edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 4987edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 4988edd16368SStephen M. Cameron * slide by, and give the same results as if this field 4989edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 4990edd16368SStephen M. Cameron * our purposes here. 4991edd16368SStephen M. Cameron */ 4992edd16368SStephen M. Cameron 4993edd16368SStephen M. Cameron break; 4994edd16368SStephen M. Cameron 4995edd16368SStephen M. Cameron default: 4996edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4997edd16368SStephen M. Cameron cmd->sc_data_direction); 4998edd16368SStephen M. Cameron BUG(); 4999edd16368SStephen M. Cameron break; 5000edd16368SStephen M. Cameron } 5001edd16368SStephen M. Cameron 500233a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 500373153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5004edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5005edd16368SStephen M. Cameron } 5006edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5007edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5008edd16368SStephen M. Cameron return 0; 5009edd16368SStephen M. Cameron } 5010edd16368SStephen M. Cameron 5011360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5012360c73bdSStephen Cameron struct CommandList *c) 5013360c73bdSStephen Cameron { 5014360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5015360c73bdSStephen Cameron 5016360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5017360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5018360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5019360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5020360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5021360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5022360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5023360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5024360c73bdSStephen Cameron c->cmdindex = index; 5025360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5026360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5027360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5028360c73bdSStephen Cameron c->h = h; 5029a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5030360c73bdSStephen Cameron } 5031360c73bdSStephen Cameron 5032360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5033360c73bdSStephen Cameron { 5034360c73bdSStephen Cameron int i; 5035360c73bdSStephen Cameron 5036360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5037360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5038360c73bdSStephen Cameron 5039360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5040360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5041360c73bdSStephen Cameron } 5042360c73bdSStephen Cameron } 5043360c73bdSStephen Cameron 5044360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5045360c73bdSStephen Cameron struct CommandList *c) 5046360c73bdSStephen Cameron { 5047360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5048360c73bdSStephen Cameron 504973153fe5SWebb Scales BUG_ON(c->cmdindex != index); 505073153fe5SWebb Scales 5051360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5052360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5053360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5054360c73bdSStephen Cameron } 5055360c73bdSStephen Cameron 5056592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5057592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5058592a0ad5SWebb Scales unsigned char *scsi3addr) 5059592a0ad5SWebb Scales { 5060592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5061592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5062592a0ad5SWebb Scales 5063592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5064592a0ad5SWebb Scales 5065592a0ad5SWebb Scales if (dev->offload_enabled) { 5066592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5067592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5068592a0ad5SWebb Scales c->scsi_cmd = cmd; 5069592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5070592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5071592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5072a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5073592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5074592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5075592a0ad5SWebb Scales c->scsi_cmd = cmd; 5076592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5077592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5078592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5079592a0ad5SWebb Scales } 5080592a0ad5SWebb Scales return rc; 5081592a0ad5SWebb Scales } 5082592a0ad5SWebb Scales 5083080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5084080ef1ccSDon Brace { 5085080ef1ccSDon Brace struct scsi_cmnd *cmd; 5086080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 50878a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5088080ef1ccSDon Brace 5089080ef1ccSDon Brace cmd = c->scsi_cmd; 5090080ef1ccSDon Brace dev = cmd->device->hostdata; 5091080ef1ccSDon Brace if (!dev) { 5092080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 50938a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5094080ef1ccSDon Brace } 5095d604f533SWebb Scales if (c->reset_pending) 5096d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5097a58e7e53SWebb Scales if (c->abort_pending) 5098a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5099592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5100592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5101592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5102592a0ad5SWebb Scales int rc; 5103592a0ad5SWebb Scales 5104592a0ad5SWebb Scales if (c2->error_data.serv_response == 5105592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5106592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5107592a0ad5SWebb Scales if (rc == 0) 5108592a0ad5SWebb Scales return; 5109592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5110592a0ad5SWebb Scales /* 5111592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5112592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5113592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5114592a0ad5SWebb Scales */ 5115592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 51168a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5117592a0ad5SWebb Scales } 5118592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5119592a0ad5SWebb Scales } 5120592a0ad5SWebb Scales } 5121360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5122080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5123080ef1ccSDon Brace /* 5124080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5125080ef1ccSDon Brace * again via scsi mid layer, which will then get 5126080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5127592a0ad5SWebb Scales * 5128592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5129592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5130080ef1ccSDon Brace */ 5131080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5132080ef1ccSDon Brace cmd->scsi_done(cmd); 5133080ef1ccSDon Brace } 5134080ef1ccSDon Brace } 5135080ef1ccSDon Brace 5136574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5137574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5138574f05d3SStephen Cameron { 5139574f05d3SStephen Cameron struct ctlr_info *h; 5140574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5141574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5142574f05d3SStephen Cameron struct CommandList *c; 5143574f05d3SStephen Cameron int rc = 0; 5144574f05d3SStephen Cameron 5145574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5146574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 514773153fe5SWebb Scales 514873153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 514973153fe5SWebb Scales 5150574f05d3SStephen Cameron dev = cmd->device->hostdata; 5151574f05d3SStephen Cameron if (!dev) { 5152574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5153574f05d3SStephen Cameron cmd->scsi_done(cmd); 5154574f05d3SStephen Cameron return 0; 5155574f05d3SStephen Cameron } 515673153fe5SWebb Scales 5157574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5158574f05d3SStephen Cameron 5159574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 516025163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5161574f05d3SStephen Cameron cmd->scsi_done(cmd); 5162574f05d3SStephen Cameron return 0; 5163574f05d3SStephen Cameron } 516473153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5165574f05d3SStephen Cameron 5166407863cbSStephen Cameron /* 5167407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5168574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5169574f05d3SStephen Cameron */ 5170574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5171574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5172574f05d3SStephen Cameron h->acciopath_status)) { 5173592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5174574f05d3SStephen Cameron if (rc == 0) 5175592a0ad5SWebb Scales return 0; 5176592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 517773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5178574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5179574f05d3SStephen Cameron } 5180574f05d3SStephen Cameron } 5181574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5182574f05d3SStephen Cameron } 5183574f05d3SStephen Cameron 51848ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 51855f389360SStephen M. Cameron { 51865f389360SStephen M. Cameron unsigned long flags; 51875f389360SStephen M. Cameron 51885f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 51895f389360SStephen M. Cameron h->scan_finished = 1; 51905f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 51915f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 51925f389360SStephen M. Cameron } 51935f389360SStephen M. Cameron 5194a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5195a08a8471SStephen M. Cameron { 5196a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5197a08a8471SStephen M. Cameron unsigned long flags; 5198a08a8471SStephen M. Cameron 51998ebc9248SWebb Scales /* 52008ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 52018ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 52028ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 52038ebc9248SWebb Scales * piling up on a locked up controller. 52048ebc9248SWebb Scales */ 52058ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 52068ebc9248SWebb Scales return hpsa_scan_complete(h); 52075f389360SStephen M. Cameron 5208a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5209a08a8471SStephen M. Cameron while (1) { 5210a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5211a08a8471SStephen M. Cameron if (h->scan_finished) 5212a08a8471SStephen M. Cameron break; 5213a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5214a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5215a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5216a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5217a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5218a08a8471SStephen M. Cameron * happen if we're in here. 5219a08a8471SStephen M. Cameron */ 5220a08a8471SStephen M. Cameron } 5221a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5222a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5223a08a8471SStephen M. Cameron 52248ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 52258ebc9248SWebb Scales return hpsa_scan_complete(h); 52265f389360SStephen M. Cameron 52278aa60681SDon Brace hpsa_update_scsi_devices(h); 5228a08a8471SStephen M. Cameron 52298ebc9248SWebb Scales hpsa_scan_complete(h); 5230a08a8471SStephen M. Cameron } 5231a08a8471SStephen M. Cameron 52327c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 52337c0a0229SDon Brace { 523403383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 523503383736SDon Brace 523603383736SDon Brace if (!logical_drive) 523703383736SDon Brace return -ENODEV; 52387c0a0229SDon Brace 52397c0a0229SDon Brace if (qdepth < 1) 52407c0a0229SDon Brace qdepth = 1; 524103383736SDon Brace else if (qdepth > logical_drive->queue_depth) 524203383736SDon Brace qdepth = logical_drive->queue_depth; 524303383736SDon Brace 524403383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 52457c0a0229SDon Brace } 52467c0a0229SDon Brace 5247a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5248a08a8471SStephen M. Cameron unsigned long elapsed_time) 5249a08a8471SStephen M. Cameron { 5250a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5251a08a8471SStephen M. Cameron unsigned long flags; 5252a08a8471SStephen M. Cameron int finished; 5253a08a8471SStephen M. Cameron 5254a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5255a08a8471SStephen M. Cameron finished = h->scan_finished; 5256a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5257a08a8471SStephen M. Cameron return finished; 5258a08a8471SStephen M. Cameron } 5259a08a8471SStephen M. Cameron 52602946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5261edd16368SStephen M. Cameron { 5262b705690dSStephen M. Cameron struct Scsi_Host *sh; 5263edd16368SStephen M. Cameron 5264b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 52652946e82bSRobert Elliott if (sh == NULL) { 52662946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 52672946e82bSRobert Elliott return -ENOMEM; 52682946e82bSRobert Elliott } 5269b705690dSStephen M. Cameron 5270b705690dSStephen M. Cameron sh->io_port = 0; 5271b705690dSStephen M. Cameron sh->n_io_port = 0; 5272b705690dSStephen M. Cameron sh->this_id = -1; 5273b705690dSStephen M. Cameron sh->max_channel = 3; 5274b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5275b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5276b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 527741ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5278d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5279b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5280d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5281b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5282b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5283b705690dSStephen M. Cameron sh->unique_id = sh->irq; 528464d513acSChristoph Hellwig 52852946e82bSRobert Elliott h->scsi_host = sh; 52862946e82bSRobert Elliott return 0; 52872946e82bSRobert Elliott } 52882946e82bSRobert Elliott 52892946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 52902946e82bSRobert Elliott { 52912946e82bSRobert Elliott int rv; 52922946e82bSRobert Elliott 52932946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 52942946e82bSRobert Elliott if (rv) { 52952946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 52962946e82bSRobert Elliott return rv; 52972946e82bSRobert Elliott } 52982946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 52992946e82bSRobert Elliott return 0; 5300edd16368SStephen M. Cameron } 5301edd16368SStephen M. Cameron 5302b69324ffSWebb Scales /* 530373153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 530473153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 530573153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 530673153fe5SWebb Scales * low-numbered entries for our own uses.) 530773153fe5SWebb Scales */ 530873153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 530973153fe5SWebb Scales { 531073153fe5SWebb Scales int idx = scmd->request->tag; 531173153fe5SWebb Scales 531273153fe5SWebb Scales if (idx < 0) 531373153fe5SWebb Scales return idx; 531473153fe5SWebb Scales 531573153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 531673153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 531773153fe5SWebb Scales } 531873153fe5SWebb Scales 531973153fe5SWebb Scales /* 5320b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5321b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5322b69324ffSWebb Scales */ 5323b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5324b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5325b69324ffSWebb Scales int reply_queue) 5326edd16368SStephen M. Cameron { 53278919358eSTomas Henzl int rc; 5328edd16368SStephen M. Cameron 5329a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5330a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5331a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5332b69324ffSWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 533325163bd5SWebb Scales if (rc) 5334b69324ffSWebb Scales return rc; 5335edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5336edd16368SStephen M. Cameron 5337b69324ffSWebb Scales /* Check if the unit is already ready. */ 5338edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5339b69324ffSWebb Scales return 0; 5340edd16368SStephen M. Cameron 5341b69324ffSWebb Scales /* 5342b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5343b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5344b69324ffSWebb Scales * looking for (but, success is good too). 5345b69324ffSWebb Scales */ 5346edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5347edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5348edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5349edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5350b69324ffSWebb Scales return 0; 5351b69324ffSWebb Scales 5352b69324ffSWebb Scales return 1; 5353b69324ffSWebb Scales } 5354b69324ffSWebb Scales 5355b69324ffSWebb Scales /* 5356b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5357b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5358b69324ffSWebb Scales */ 5359b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5360b69324ffSWebb Scales struct CommandList *c, 5361b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5362b69324ffSWebb Scales { 5363b69324ffSWebb Scales int rc; 5364b69324ffSWebb Scales int count = 0; 5365b69324ffSWebb Scales int waittime = 1; /* seconds */ 5366b69324ffSWebb Scales 5367b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5368b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5369b69324ffSWebb Scales 5370b69324ffSWebb Scales /* 5371b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5372b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5373b69324ffSWebb Scales */ 5374b69324ffSWebb Scales msleep(1000 * waittime); 5375b69324ffSWebb Scales 5376b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5377b69324ffSWebb Scales if (!rc) 5378edd16368SStephen M. Cameron break; 5379b69324ffSWebb Scales 5380b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5381b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5382b69324ffSWebb Scales waittime *= 2; 5383b69324ffSWebb Scales 5384b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5385b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5386b69324ffSWebb Scales waittime); 5387b69324ffSWebb Scales } 5388b69324ffSWebb Scales 5389b69324ffSWebb Scales return rc; 5390b69324ffSWebb Scales } 5391b69324ffSWebb Scales 5392b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5393b69324ffSWebb Scales unsigned char lunaddr[], 5394b69324ffSWebb Scales int reply_queue) 5395b69324ffSWebb Scales { 5396b69324ffSWebb Scales int first_queue; 5397b69324ffSWebb Scales int last_queue; 5398b69324ffSWebb Scales int rq; 5399b69324ffSWebb Scales int rc = 0; 5400b69324ffSWebb Scales struct CommandList *c; 5401b69324ffSWebb Scales 5402b69324ffSWebb Scales c = cmd_alloc(h); 5403b69324ffSWebb Scales 5404b69324ffSWebb Scales /* 5405b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5406b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5407b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5408b69324ffSWebb Scales */ 5409b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5410b69324ffSWebb Scales first_queue = 0; 5411b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5412b69324ffSWebb Scales } else { 5413b69324ffSWebb Scales first_queue = reply_queue; 5414b69324ffSWebb Scales last_queue = reply_queue; 5415b69324ffSWebb Scales } 5416b69324ffSWebb Scales 5417b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5418b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5419b69324ffSWebb Scales if (rc) 5420b69324ffSWebb Scales break; 5421edd16368SStephen M. Cameron } 5422edd16368SStephen M. Cameron 5423edd16368SStephen M. Cameron if (rc) 5424edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5425edd16368SStephen M. Cameron else 5426edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5427edd16368SStephen M. Cameron 542845fcb86eSStephen Cameron cmd_free(h, c); 5429edd16368SStephen M. Cameron return rc; 5430edd16368SStephen M. Cameron } 5431edd16368SStephen M. Cameron 5432edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5433edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5434edd16368SStephen M. Cameron */ 5435edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5436edd16368SStephen M. Cameron { 5437edd16368SStephen M. Cameron int rc; 5438edd16368SStephen M. Cameron struct ctlr_info *h; 5439edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 54400b9b7b6eSScott Teel u8 reset_type; 54412dc127bbSDan Carpenter char msg[48]; 5442edd16368SStephen M. Cameron 5443edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5444edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5445edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5446edd16368SStephen M. Cameron return FAILED; 5447e345893bSDon Brace 5448e345893bSDon Brace if (lockup_detected(h)) 5449e345893bSDon Brace return FAILED; 5450e345893bSDon Brace 5451edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5452edd16368SStephen M. Cameron if (!dev) { 5453d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5454edd16368SStephen M. Cameron return FAILED; 5455edd16368SStephen M. Cameron } 545625163bd5SWebb Scales 545725163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 545825163bd5SWebb Scales if (lockup_detected(h)) { 54592dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 54602dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 546173153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 546273153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 546325163bd5SWebb Scales return FAILED; 546425163bd5SWebb Scales } 546525163bd5SWebb Scales 546625163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 546725163bd5SWebb Scales if (detect_controller_lockup(h)) { 54682dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 54692dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 547073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 547173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 547225163bd5SWebb Scales return FAILED; 547325163bd5SWebb Scales } 547425163bd5SWebb Scales 5475d604f533SWebb Scales /* Do not attempt on controller */ 5476d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5477d604f533SWebb Scales return SUCCESS; 5478d604f533SWebb Scales 54790b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 54800b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 54810b9b7b6eSScott Teel else 54820b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 54830b9b7b6eSScott Teel 54840b9b7b6eSScott Teel sprintf(msg, "resetting %s", 54850b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 54860b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 548725163bd5SWebb Scales 5488da03ded0SDon Brace h->reset_in_progress = 1; 5489d416b0c7SStephen M. Cameron 5490edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 54910b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 549225163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 54930b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 54940b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 54952dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5496d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5497da03ded0SDon Brace h->reset_in_progress = 0; 5498d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5499edd16368SStephen M. Cameron } 5500edd16368SStephen M. Cameron 55016cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 55026cba3f19SStephen M. Cameron { 55036cba3f19SStephen M. Cameron u8 original_tag[8]; 55046cba3f19SStephen M. Cameron 55056cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 55066cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 55076cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 55086cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 55096cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 55106cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 55116cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 55126cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 55136cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 55146cba3f19SStephen M. Cameron } 55156cba3f19SStephen M. Cameron 551617eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 55172b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 551817eb87d2SScott Teel { 55192b08b3e9SDon Brace u64 tag; 552017eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 552117eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 552217eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 55232b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 55242b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 55252b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 552654b6e9e9SScott Teel return; 552754b6e9e9SScott Teel } 552854b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 552954b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 553054b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5531dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5532dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5533dd0e19f3SScott Teel *taglower = cm2->Tag; 553454b6e9e9SScott Teel return; 553554b6e9e9SScott Teel } 55362b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 55372b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 55382b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 553917eb87d2SScott Teel } 554054b6e9e9SScott Teel 554175167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 55429b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 554375167d2cSStephen M. Cameron { 554475167d2cSStephen M. Cameron int rc = IO_OK; 554575167d2cSStephen M. Cameron struct CommandList *c; 554675167d2cSStephen M. Cameron struct ErrorInfo *ei; 55472b08b3e9SDon Brace __le32 tagupper, taglower; 554875167d2cSStephen M. Cameron 554945fcb86eSStephen Cameron c = cmd_alloc(h); 555075167d2cSStephen M. Cameron 5551a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 55529b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5553a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 55549b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 55556cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 555625163bd5SWebb Scales (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 555717eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 555825163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 555917eb87d2SScott Teel __func__, tagupper, taglower); 556075167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 556175167d2cSStephen M. Cameron 556275167d2cSStephen M. Cameron ei = c->err_info; 556375167d2cSStephen M. Cameron switch (ei->CommandStatus) { 556475167d2cSStephen M. Cameron case CMD_SUCCESS: 556575167d2cSStephen M. Cameron break; 55669437ac43SStephen Cameron case CMD_TMF_STATUS: 55679437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 55689437ac43SStephen Cameron break; 556975167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 557075167d2cSStephen M. Cameron rc = -1; 557175167d2cSStephen M. Cameron break; 557275167d2cSStephen M. Cameron default: 557375167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 557417eb87d2SScott Teel __func__, tagupper, taglower); 5575d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 557675167d2cSStephen M. Cameron rc = -1; 557775167d2cSStephen M. Cameron break; 557875167d2cSStephen M. Cameron } 557945fcb86eSStephen Cameron cmd_free(h, c); 5580dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5581dd0e19f3SScott Teel __func__, tagupper, taglower); 558275167d2cSStephen M. Cameron return rc; 558375167d2cSStephen M. Cameron } 558475167d2cSStephen M. Cameron 55858be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 55868be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 55878be986ccSStephen Cameron { 55888be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 55898be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 55908be986ccSStephen Cameron struct io_accel2_cmd *c2a = 55918be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5592a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 55938be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 55948be986ccSStephen Cameron 55958be986ccSStephen Cameron /* 55968be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 55978be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 55988be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 55998be986ccSStephen Cameron */ 56008be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 56018be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 56028be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 56038be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 56048be986ccSStephen Cameron sizeof(ac->error_len)); 56058be986ccSStephen Cameron 56068be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5607a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5608a58e7e53SWebb Scales 56098be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 56108be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 56118be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 56128be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 56138be986ccSStephen Cameron 56148be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 56158be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 56168be986ccSStephen Cameron ac->reply_queue = reply_queue; 56178be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 56188be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 56198be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 56208be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 56218be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 56228be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 56238be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 56248be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 56258be986ccSStephen Cameron } 56268be986ccSStephen Cameron 562754b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 562854b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 562954b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 563054b6e9e9SScott Teel * Return 0 on success (IO_OK) 563154b6e9e9SScott Teel * -1 on failure 563254b6e9e9SScott Teel */ 563354b6e9e9SScott Teel 563454b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 563525163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 563654b6e9e9SScott Teel { 563754b6e9e9SScott Teel int rc = IO_OK; 563854b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 563954b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 564054b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 564154b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 564254b6e9e9SScott Teel 564354b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 56447fa3030cSStephen Cameron scmd = abort->scsi_cmd; 564554b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 564654b6e9e9SScott Teel if (dev == NULL) { 564754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 564854b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 564954b6e9e9SScott Teel return -1; /* not abortable */ 565054b6e9e9SScott Teel } 565154b6e9e9SScott Teel 56522ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 56532ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 56540d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 56552ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 56560d96ef5fSWebb Scales "Reset as abort", 56572ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 56582ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 56592ba8bfc8SStephen M. Cameron 566054b6e9e9SScott Teel if (!dev->offload_enabled) { 566154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 566254b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 566354b6e9e9SScott Teel return -1; /* not abortable */ 566454b6e9e9SScott Teel } 566554b6e9e9SScott Teel 566654b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 566754b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 566854b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 566954b6e9e9SScott Teel return -1; /* not abortable */ 567054b6e9e9SScott Teel } 567154b6e9e9SScott Teel 567254b6e9e9SScott Teel /* send the reset */ 56732ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 56742ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 56752ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 56762ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 56772ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5678d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 567954b6e9e9SScott Teel if (rc != 0) { 568054b6e9e9SScott Teel dev_warn(&h->pdev->dev, 568154b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 568254b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 568354b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 568454b6e9e9SScott Teel return rc; /* failed to reset */ 568554b6e9e9SScott Teel } 568654b6e9e9SScott Teel 568754b6e9e9SScott Teel /* wait for device to recover */ 5688b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 568954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 569054b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 569154b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 569254b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 569354b6e9e9SScott Teel return -1; /* failed to recover */ 569454b6e9e9SScott Teel } 569554b6e9e9SScott Teel 569654b6e9e9SScott Teel /* device recovered */ 569754b6e9e9SScott Teel dev_info(&h->pdev->dev, 569854b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 569954b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 570054b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 570154b6e9e9SScott Teel 570254b6e9e9SScott Teel return rc; /* success */ 570354b6e9e9SScott Teel } 570454b6e9e9SScott Teel 57058be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 57068be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 57078be986ccSStephen Cameron { 57088be986ccSStephen Cameron int rc = IO_OK; 57098be986ccSStephen Cameron struct CommandList *c; 57108be986ccSStephen Cameron __le32 taglower, tagupper; 57118be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 57128be986ccSStephen Cameron struct io_accel2_cmd *c2; 57138be986ccSStephen Cameron 57148be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 57158be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 57168be986ccSStephen Cameron return -1; 57178be986ccSStephen Cameron 57188be986ccSStephen Cameron c = cmd_alloc(h); 57198be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 57208be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 57218be986ccSStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 57228be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 57238be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 57248be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 57258be986ccSStephen Cameron __func__, tagupper, taglower); 57268be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 57278be986ccSStephen Cameron 57288be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 57298be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 57308be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 57318be986ccSStephen Cameron switch (c2->error_data.serv_response) { 57328be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 57338be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 57348be986ccSStephen Cameron rc = 0; 57358be986ccSStephen Cameron break; 57368be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 57378be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 57388be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 57398be986ccSStephen Cameron rc = -1; 57408be986ccSStephen Cameron break; 57418be986ccSStephen Cameron default: 57428be986ccSStephen Cameron dev_warn(&h->pdev->dev, 57438be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 57448be986ccSStephen Cameron __func__, tagupper, taglower, 57458be986ccSStephen Cameron c2->error_data.serv_response); 57468be986ccSStephen Cameron rc = -1; 57478be986ccSStephen Cameron } 57488be986ccSStephen Cameron cmd_free(h, c); 57498be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 57508be986ccSStephen Cameron tagupper, taglower); 57518be986ccSStephen Cameron return rc; 57528be986ccSStephen Cameron } 57538be986ccSStephen Cameron 57546cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 575525163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 57566cba3f19SStephen M. Cameron { 57578be986ccSStephen Cameron /* 57588be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 575954b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 57608be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 57618be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 576254b6e9e9SScott Teel */ 57638be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 57648be986ccSStephen Cameron if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) 57658be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 57668be986ccSStephen Cameron reply_queue); 57678be986ccSStephen Cameron else 576825163bd5SWebb Scales return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, 576925163bd5SWebb Scales abort, reply_queue); 57708be986ccSStephen Cameron } 57719b5c48c2SStephen Cameron return hpsa_send_abort(h, scsi3addr, abort, reply_queue); 577225163bd5SWebb Scales } 577325163bd5SWebb Scales 577425163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 577525163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 577625163bd5SWebb Scales struct CommandList *c) 577725163bd5SWebb Scales { 577825163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 577925163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 578025163bd5SWebb Scales return c->Header.ReplyQueue; 57816cba3f19SStephen M. Cameron } 57826cba3f19SStephen M. Cameron 57839b5c48c2SStephen Cameron /* 57849b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 57859b5c48c2SStephen Cameron * over-subscription of commands 57869b5c48c2SStephen Cameron */ 57879b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 57889b5c48c2SStephen Cameron { 57899b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 57909b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 57919b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 57929b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 57939b5c48c2SStephen Cameron } 57949b5c48c2SStephen Cameron 579575167d2cSStephen M. Cameron /* Send an abort for the specified command. 579675167d2cSStephen M. Cameron * If the device and controller support it, 579775167d2cSStephen M. Cameron * send a task abort request. 579875167d2cSStephen M. Cameron */ 579975167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 580075167d2cSStephen M. Cameron { 580175167d2cSStephen M. Cameron 5802a58e7e53SWebb Scales int rc; 580375167d2cSStephen M. Cameron struct ctlr_info *h; 580475167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 580575167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 580675167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 580775167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 580875167d2cSStephen M. Cameron int ml = 0; 58092b08b3e9SDon Brace __le32 tagupper, taglower; 581025163bd5SWebb Scales int refcount, reply_queue; 581125163bd5SWebb Scales 581225163bd5SWebb Scales if (sc == NULL) 581325163bd5SWebb Scales return FAILED; 581475167d2cSStephen M. Cameron 58159b5c48c2SStephen Cameron if (sc->device == NULL) 58169b5c48c2SStephen Cameron return FAILED; 58179b5c48c2SStephen Cameron 581875167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 581975167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 58209b5c48c2SStephen Cameron if (h == NULL) 582175167d2cSStephen M. Cameron return FAILED; 582275167d2cSStephen M. Cameron 582325163bd5SWebb Scales /* Find the device of the command to be aborted */ 582425163bd5SWebb Scales dev = sc->device->hostdata; 582525163bd5SWebb Scales if (!dev) { 582625163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 582725163bd5SWebb Scales msg); 5828e345893bSDon Brace return FAILED; 582925163bd5SWebb Scales } 583025163bd5SWebb Scales 583125163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 583225163bd5SWebb Scales if (lockup_detected(h)) { 583325163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 583425163bd5SWebb Scales "ABORT FAILED, lockup detected"); 583525163bd5SWebb Scales return FAILED; 583625163bd5SWebb Scales } 583725163bd5SWebb Scales 583825163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 583925163bd5SWebb Scales if (detect_controller_lockup(h)) { 584025163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 584125163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 584225163bd5SWebb Scales return FAILED; 584325163bd5SWebb Scales } 5844e345893bSDon Brace 584575167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 584675167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 584775167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 584875167d2cSStephen M. Cameron return FAILED; 584975167d2cSStephen M. Cameron 585075167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 58514b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 585275167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 58530d96ef5fSWebb Scales sc->device->id, sc->device->lun, 58544b761557SRobert Elliott "Aborting command", sc); 585575167d2cSStephen M. Cameron 585675167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 585775167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 585875167d2cSStephen M. Cameron if (abort == NULL) { 5859281a7fd0SWebb Scales /* This can happen if the command already completed. */ 5860281a7fd0SWebb Scales return SUCCESS; 5861281a7fd0SWebb Scales } 5862281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 5863281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 5864281a7fd0SWebb Scales cmd_free(h, abort); 5865281a7fd0SWebb Scales return SUCCESS; 586675167d2cSStephen M. Cameron } 58679b5c48c2SStephen Cameron 58689b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 58699b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 58709b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 58719b5c48c2SStephen Cameron cmd_free(h, abort); 58729b5c48c2SStephen Cameron return FAILED; 58739b5c48c2SStephen Cameron } 58749b5c48c2SStephen Cameron 5875a58e7e53SWebb Scales /* 5876a58e7e53SWebb Scales * Check that we're aborting the right command. 5877a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 5878a58e7e53SWebb Scales */ 5879a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 5880a58e7e53SWebb Scales cmd_free(h, abort); 5881a58e7e53SWebb Scales return SUCCESS; 5882a58e7e53SWebb Scales } 5883a58e7e53SWebb Scales 5884a58e7e53SWebb Scales abort->abort_pending = true; 588517eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 588625163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 588717eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 58887fa3030cSStephen Cameron as = abort->scsi_cmd; 588975167d2cSStephen M. Cameron if (as != NULL) 58904b761557SRobert Elliott ml += sprintf(msg+ml, 58914b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 58924b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 58934b761557SRobert Elliott as->serial_number); 58944b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 58950d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 58964b761557SRobert Elliott 589775167d2cSStephen M. Cameron /* 589875167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 589975167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 590075167d2cSStephen M. Cameron * distinguish which. Send the abort down. 590175167d2cSStephen M. Cameron */ 59029b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 59039b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 59044b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 59054b761557SRobert Elliott msg); 59069b5c48c2SStephen Cameron cmd_free(h, abort); 59079b5c48c2SStephen Cameron return FAILED; 59089b5c48c2SStephen Cameron } 590925163bd5SWebb Scales rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue); 59109b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 59119b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 591275167d2cSStephen M. Cameron if (rc != 0) { 59134b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 59140d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 59150d96ef5fSWebb Scales "FAILED to abort command"); 5916281a7fd0SWebb Scales cmd_free(h, abort); 591775167d2cSStephen M. Cameron return FAILED; 591875167d2cSStephen M. Cameron } 59194b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 5920d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 5921a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 5922281a7fd0SWebb Scales cmd_free(h, abort); 5923a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 592475167d2cSStephen M. Cameron } 592575167d2cSStephen M. Cameron 5926edd16368SStephen M. Cameron /* 592773153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 592873153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 592973153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 593073153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 593173153fe5SWebb Scales */ 593273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 593373153fe5SWebb Scales struct scsi_cmnd *scmd) 593473153fe5SWebb Scales { 593573153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 593673153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 593773153fe5SWebb Scales 593873153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 593973153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 594073153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 594173153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 594273153fe5SWebb Scales * bounds, it's probably not our bug. 594373153fe5SWebb Scales */ 594473153fe5SWebb Scales BUG(); 594573153fe5SWebb Scales } 594673153fe5SWebb Scales 594773153fe5SWebb Scales atomic_inc(&c->refcount); 594873153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 594973153fe5SWebb Scales /* 595073153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 595173153fe5SWebb Scales * value. Thus, there should never be a collision here between 595273153fe5SWebb Scales * two requests...because if the selected command isn't idle 595373153fe5SWebb Scales * then someone is going to be very disappointed. 595473153fe5SWebb Scales */ 595573153fe5SWebb Scales dev_err(&h->pdev->dev, 595673153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 595773153fe5SWebb Scales idx); 595873153fe5SWebb Scales if (c->scsi_cmd != NULL) 595973153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 596073153fe5SWebb Scales scsi_print_command(scmd); 596173153fe5SWebb Scales } 596273153fe5SWebb Scales 596373153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 596473153fe5SWebb Scales return c; 596573153fe5SWebb Scales } 596673153fe5SWebb Scales 596773153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 596873153fe5SWebb Scales { 596973153fe5SWebb Scales /* 597073153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 597173153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 597273153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 597373153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 597473153fe5SWebb Scales */ 597573153fe5SWebb Scales (void)atomic_dec(&c->refcount); 597673153fe5SWebb Scales } 597773153fe5SWebb Scales 597873153fe5SWebb Scales /* 5979edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 5980edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 5981edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 5982edd16368SStephen M. Cameron * cmd_free() is the complement. 5983bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 5984bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 5985edd16368SStephen M. Cameron */ 5986281a7fd0SWebb Scales 5987edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 5988edd16368SStephen M. Cameron { 5989edd16368SStephen M. Cameron struct CommandList *c; 5990360c73bdSStephen Cameron int refcount, i; 599173153fe5SWebb Scales int offset = 0; 5992edd16368SStephen M. Cameron 599333811026SRobert Elliott /* 599433811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 59954c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 59964c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 59974c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 59984c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 59994c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 60004c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 60014c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 60024c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 600373153fe5SWebb Scales * 600473153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 600573153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 600673153fe5SWebb Scales * all works, since we have at least one command structure available; 600773153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 600873153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 600973153fe5SWebb Scales * layer will use the higher indexes. 60104c413128SStephen M. Cameron */ 60114c413128SStephen M. Cameron 6012281a7fd0SWebb Scales for (;;) { 601373153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 601473153fe5SWebb Scales HPSA_NRESERVED_CMDS, 601573153fe5SWebb Scales offset); 601673153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6017281a7fd0SWebb Scales offset = 0; 6018281a7fd0SWebb Scales continue; 6019281a7fd0SWebb Scales } 6020edd16368SStephen M. Cameron c = h->cmd_pool + i; 6021281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6022281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6023281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 602473153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6025281a7fd0SWebb Scales continue; 6026281a7fd0SWebb Scales } 6027281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6028281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6029281a7fd0SWebb Scales break; /* it's ours now. */ 6030281a7fd0SWebb Scales } 6031360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6032edd16368SStephen M. Cameron return c; 6033edd16368SStephen M. Cameron } 6034edd16368SStephen M. Cameron 603573153fe5SWebb Scales /* 603673153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 603773153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 603873153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 603973153fe5SWebb Scales * the clear-bit is harmless. 604073153fe5SWebb Scales */ 6041edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6042edd16368SStephen M. Cameron { 6043281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6044edd16368SStephen M. Cameron int i; 6045edd16368SStephen M. Cameron 6046edd16368SStephen M. Cameron i = c - h->cmd_pool; 6047edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6048edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6049edd16368SStephen M. Cameron } 6050281a7fd0SWebb Scales } 6051edd16368SStephen M. Cameron 6052edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6053edd16368SStephen M. Cameron 605442a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 605542a91641SDon Brace void __user *arg) 6056edd16368SStephen M. Cameron { 6057edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6058edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6059edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6060edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6061edd16368SStephen M. Cameron int err; 6062edd16368SStephen M. Cameron u32 cp; 6063edd16368SStephen M. Cameron 6064938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6065edd16368SStephen M. Cameron err = 0; 6066edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6067edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6068edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6069edd16368SStephen M. Cameron sizeof(arg64.Request)); 6070edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6071edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6072edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6073edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6074edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6075edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6076edd16368SStephen M. Cameron 6077edd16368SStephen M. Cameron if (err) 6078edd16368SStephen M. Cameron return -EFAULT; 6079edd16368SStephen M. Cameron 608042a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6081edd16368SStephen M. Cameron if (err) 6082edd16368SStephen M. Cameron return err; 6083edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6084edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6085edd16368SStephen M. Cameron if (err) 6086edd16368SStephen M. Cameron return -EFAULT; 6087edd16368SStephen M. Cameron return err; 6088edd16368SStephen M. Cameron } 6089edd16368SStephen M. Cameron 6090edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 609142a91641SDon Brace int cmd, void __user *arg) 6092edd16368SStephen M. Cameron { 6093edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6094edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6095edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6096edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6097edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6098edd16368SStephen M. Cameron int err; 6099edd16368SStephen M. Cameron u32 cp; 6100edd16368SStephen M. Cameron 6101938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6102edd16368SStephen M. Cameron err = 0; 6103edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6104edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6105edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6106edd16368SStephen M. Cameron sizeof(arg64.Request)); 6107edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6108edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6109edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6110edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6111edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6112edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6113edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6114edd16368SStephen M. Cameron 6115edd16368SStephen M. Cameron if (err) 6116edd16368SStephen M. Cameron return -EFAULT; 6117edd16368SStephen M. Cameron 611842a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6119edd16368SStephen M. Cameron if (err) 6120edd16368SStephen M. Cameron return err; 6121edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6122edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6123edd16368SStephen M. Cameron if (err) 6124edd16368SStephen M. Cameron return -EFAULT; 6125edd16368SStephen M. Cameron return err; 6126edd16368SStephen M. Cameron } 612771fe75a7SStephen M. Cameron 612842a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 612971fe75a7SStephen M. Cameron { 613071fe75a7SStephen M. Cameron switch (cmd) { 613171fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 613271fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 613371fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 613471fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 613571fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 613671fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 613771fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 613871fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 613971fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 614071fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 614171fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 614271fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 614371fe75a7SStephen M. Cameron case CCISS_REGNEWD: 614471fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 614571fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 614671fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 614771fe75a7SStephen M. Cameron 614871fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 614971fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 615071fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 615171fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 615271fe75a7SStephen M. Cameron 615371fe75a7SStephen M. Cameron default: 615471fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 615571fe75a7SStephen M. Cameron } 615671fe75a7SStephen M. Cameron } 6157edd16368SStephen M. Cameron #endif 6158edd16368SStephen M. Cameron 6159edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6160edd16368SStephen M. Cameron { 6161edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6162edd16368SStephen M. Cameron 6163edd16368SStephen M. Cameron if (!argp) 6164edd16368SStephen M. Cameron return -EINVAL; 6165edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6166edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6167edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6168edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6169edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6170edd16368SStephen M. Cameron return -EFAULT; 6171edd16368SStephen M. Cameron return 0; 6172edd16368SStephen M. Cameron } 6173edd16368SStephen M. Cameron 6174edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6175edd16368SStephen M. Cameron { 6176edd16368SStephen M. Cameron DriverVer_type DriverVer; 6177edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6178edd16368SStephen M. Cameron int rc; 6179edd16368SStephen M. Cameron 6180edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6181edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6182edd16368SStephen M. Cameron if (rc != 3) { 6183edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6184edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6185edd16368SStephen M. Cameron vmaj = 0; 6186edd16368SStephen M. Cameron vmin = 0; 6187edd16368SStephen M. Cameron vsubmin = 0; 6188edd16368SStephen M. Cameron } 6189edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6190edd16368SStephen M. Cameron if (!argp) 6191edd16368SStephen M. Cameron return -EINVAL; 6192edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6193edd16368SStephen M. Cameron return -EFAULT; 6194edd16368SStephen M. Cameron return 0; 6195edd16368SStephen M. Cameron } 6196edd16368SStephen M. Cameron 6197edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6198edd16368SStephen M. Cameron { 6199edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6200edd16368SStephen M. Cameron struct CommandList *c; 6201edd16368SStephen M. Cameron char *buff = NULL; 620250a0decfSStephen M. Cameron u64 temp64; 6203c1f63c8fSStephen M. Cameron int rc = 0; 6204edd16368SStephen M. Cameron 6205edd16368SStephen M. Cameron if (!argp) 6206edd16368SStephen M. Cameron return -EINVAL; 6207edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6208edd16368SStephen M. Cameron return -EPERM; 6209edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6210edd16368SStephen M. Cameron return -EFAULT; 6211edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6212edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6213edd16368SStephen M. Cameron return -EINVAL; 6214edd16368SStephen M. Cameron } 6215edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6216edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6217edd16368SStephen M. Cameron if (buff == NULL) 62182dd02d74SRobert Elliott return -ENOMEM; 62199233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6220edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6221b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6222b03a7771SStephen M. Cameron iocommand.buf_size)) { 6223c1f63c8fSStephen M. Cameron rc = -EFAULT; 6224c1f63c8fSStephen M. Cameron goto out_kfree; 6225edd16368SStephen M. Cameron } 6226b03a7771SStephen M. Cameron } else { 6227edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6228b03a7771SStephen M. Cameron } 6229b03a7771SStephen M. Cameron } 623045fcb86eSStephen Cameron c = cmd_alloc(h); 6231bf43caf3SRobert Elliott 6232edd16368SStephen M. Cameron /* Fill in the command type */ 6233edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6234a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6235edd16368SStephen M. Cameron /* Fill in Command Header */ 6236edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6237edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6238edd16368SStephen M. Cameron c->Header.SGList = 1; 623950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6240edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6241edd16368SStephen M. Cameron c->Header.SGList = 0; 624250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6243edd16368SStephen M. Cameron } 6244edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6245edd16368SStephen M. Cameron 6246edd16368SStephen M. Cameron /* Fill in Request block */ 6247edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6248edd16368SStephen M. Cameron sizeof(c->Request)); 6249edd16368SStephen M. Cameron 6250edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6251edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 625250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6253edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 625450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 625550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 625650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6257bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6258bcc48ffaSStephen M. Cameron goto out; 6259bcc48ffaSStephen M. Cameron } 626050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 626150a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 626250a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6263edd16368SStephen M. Cameron } 626425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6265c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6266edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6267edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 626825163bd5SWebb Scales if (rc) { 626925163bd5SWebb Scales rc = -EIO; 627025163bd5SWebb Scales goto out; 627125163bd5SWebb Scales } 6272edd16368SStephen M. Cameron 6273edd16368SStephen M. Cameron /* Copy the error information out */ 6274edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6275edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6276edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6277c1f63c8fSStephen M. Cameron rc = -EFAULT; 6278c1f63c8fSStephen M. Cameron goto out; 6279edd16368SStephen M. Cameron } 62809233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6281b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6282edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6283edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6284c1f63c8fSStephen M. Cameron rc = -EFAULT; 6285c1f63c8fSStephen M. Cameron goto out; 6286edd16368SStephen M. Cameron } 6287edd16368SStephen M. Cameron } 6288c1f63c8fSStephen M. Cameron out: 628945fcb86eSStephen Cameron cmd_free(h, c); 6290c1f63c8fSStephen M. Cameron out_kfree: 6291c1f63c8fSStephen M. Cameron kfree(buff); 6292c1f63c8fSStephen M. Cameron return rc; 6293edd16368SStephen M. Cameron } 6294edd16368SStephen M. Cameron 6295edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6296edd16368SStephen M. Cameron { 6297edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6298edd16368SStephen M. Cameron struct CommandList *c; 6299edd16368SStephen M. Cameron unsigned char **buff = NULL; 6300edd16368SStephen M. Cameron int *buff_size = NULL; 630150a0decfSStephen M. Cameron u64 temp64; 6302edd16368SStephen M. Cameron BYTE sg_used = 0; 6303edd16368SStephen M. Cameron int status = 0; 630401a02ffcSStephen M. Cameron u32 left; 630501a02ffcSStephen M. Cameron u32 sz; 6306edd16368SStephen M. Cameron BYTE __user *data_ptr; 6307edd16368SStephen M. Cameron 6308edd16368SStephen M. Cameron if (!argp) 6309edd16368SStephen M. Cameron return -EINVAL; 6310edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6311edd16368SStephen M. Cameron return -EPERM; 6312edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6313edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6314edd16368SStephen M. Cameron if (!ioc) { 6315edd16368SStephen M. Cameron status = -ENOMEM; 6316edd16368SStephen M. Cameron goto cleanup1; 6317edd16368SStephen M. Cameron } 6318edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6319edd16368SStephen M. Cameron status = -EFAULT; 6320edd16368SStephen M. Cameron goto cleanup1; 6321edd16368SStephen M. Cameron } 6322edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6323edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6324edd16368SStephen M. Cameron status = -EINVAL; 6325edd16368SStephen M. Cameron goto cleanup1; 6326edd16368SStephen M. Cameron } 6327edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6328edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6329edd16368SStephen M. Cameron status = -EINVAL; 6330edd16368SStephen M. Cameron goto cleanup1; 6331edd16368SStephen M. Cameron } 6332d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6333edd16368SStephen M. Cameron status = -EINVAL; 6334edd16368SStephen M. Cameron goto cleanup1; 6335edd16368SStephen M. Cameron } 6336d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6337edd16368SStephen M. Cameron if (!buff) { 6338edd16368SStephen M. Cameron status = -ENOMEM; 6339edd16368SStephen M. Cameron goto cleanup1; 6340edd16368SStephen M. Cameron } 6341d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6342edd16368SStephen M. Cameron if (!buff_size) { 6343edd16368SStephen M. Cameron status = -ENOMEM; 6344edd16368SStephen M. Cameron goto cleanup1; 6345edd16368SStephen M. Cameron } 6346edd16368SStephen M. Cameron left = ioc->buf_size; 6347edd16368SStephen M. Cameron data_ptr = ioc->buf; 6348edd16368SStephen M. Cameron while (left) { 6349edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6350edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6351edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6352edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6353edd16368SStephen M. Cameron status = -ENOMEM; 6354edd16368SStephen M. Cameron goto cleanup1; 6355edd16368SStephen M. Cameron } 63569233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6357edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 63580758f4f7SStephen M. Cameron status = -EFAULT; 6359edd16368SStephen M. Cameron goto cleanup1; 6360edd16368SStephen M. Cameron } 6361edd16368SStephen M. Cameron } else 6362edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6363edd16368SStephen M. Cameron left -= sz; 6364edd16368SStephen M. Cameron data_ptr += sz; 6365edd16368SStephen M. Cameron sg_used++; 6366edd16368SStephen M. Cameron } 636745fcb86eSStephen Cameron c = cmd_alloc(h); 6368bf43caf3SRobert Elliott 6369edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6370a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6371edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 637250a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 637350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6374edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6375edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6376edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6377edd16368SStephen M. Cameron int i; 6378edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 637950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6380edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 638150a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 638250a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 638350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 638450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6385bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6386bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6387bcc48ffaSStephen M. Cameron status = -ENOMEM; 6388e2d4a1f6SStephen M. Cameron goto cleanup0; 6389bcc48ffaSStephen M. Cameron } 639050a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 639150a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 639250a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6393edd16368SStephen M. Cameron } 639450a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6395edd16368SStephen M. Cameron } 639625163bd5SWebb Scales status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6397b03a7771SStephen M. Cameron if (sg_used) 6398edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6399edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 640025163bd5SWebb Scales if (status) { 640125163bd5SWebb Scales status = -EIO; 640225163bd5SWebb Scales goto cleanup0; 640325163bd5SWebb Scales } 640425163bd5SWebb Scales 6405edd16368SStephen M. Cameron /* Copy the error information out */ 6406edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6407edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6408edd16368SStephen M. Cameron status = -EFAULT; 6409e2d4a1f6SStephen M. Cameron goto cleanup0; 6410edd16368SStephen M. Cameron } 64119233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 64122b08b3e9SDon Brace int i; 64132b08b3e9SDon Brace 6414edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6415edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6416edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6417edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6418edd16368SStephen M. Cameron status = -EFAULT; 6419e2d4a1f6SStephen M. Cameron goto cleanup0; 6420edd16368SStephen M. Cameron } 6421edd16368SStephen M. Cameron ptr += buff_size[i]; 6422edd16368SStephen M. Cameron } 6423edd16368SStephen M. Cameron } 6424edd16368SStephen M. Cameron status = 0; 6425e2d4a1f6SStephen M. Cameron cleanup0: 642645fcb86eSStephen Cameron cmd_free(h, c); 6427edd16368SStephen M. Cameron cleanup1: 6428edd16368SStephen M. Cameron if (buff) { 64292b08b3e9SDon Brace int i; 64302b08b3e9SDon Brace 6431edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6432edd16368SStephen M. Cameron kfree(buff[i]); 6433edd16368SStephen M. Cameron kfree(buff); 6434edd16368SStephen M. Cameron } 6435edd16368SStephen M. Cameron kfree(buff_size); 6436edd16368SStephen M. Cameron kfree(ioc); 6437edd16368SStephen M. Cameron return status; 6438edd16368SStephen M. Cameron } 6439edd16368SStephen M. Cameron 6440edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6441edd16368SStephen M. Cameron struct CommandList *c) 6442edd16368SStephen M. Cameron { 6443edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6444edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6445edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6446edd16368SStephen M. Cameron } 64470390f0c0SStephen M. Cameron 6448edd16368SStephen M. Cameron /* 6449edd16368SStephen M. Cameron * ioctl 6450edd16368SStephen M. Cameron */ 645142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6452edd16368SStephen M. Cameron { 6453edd16368SStephen M. Cameron struct ctlr_info *h; 6454edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 64550390f0c0SStephen M. Cameron int rc; 6456edd16368SStephen M. Cameron 6457edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6458edd16368SStephen M. Cameron 6459edd16368SStephen M. Cameron switch (cmd) { 6460edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6461edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6462edd16368SStephen M. Cameron case CCISS_REGNEWD: 6463a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6464edd16368SStephen M. Cameron return 0; 6465edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6466edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6467edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6468edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6469edd16368SStephen M. Cameron case CCISS_PASSTHRU: 647034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 64710390f0c0SStephen M. Cameron return -EAGAIN; 64720390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 647334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 64740390f0c0SStephen M. Cameron return rc; 6475edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 647634f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 64770390f0c0SStephen M. Cameron return -EAGAIN; 64780390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 647934f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 64800390f0c0SStephen M. Cameron return rc; 6481edd16368SStephen M. Cameron default: 6482edd16368SStephen M. Cameron return -ENOTTY; 6483edd16368SStephen M. Cameron } 6484edd16368SStephen M. Cameron } 6485edd16368SStephen M. Cameron 6486bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 64876f039790SGreg Kroah-Hartman u8 reset_type) 648864670ac8SStephen M. Cameron { 648964670ac8SStephen M. Cameron struct CommandList *c; 649064670ac8SStephen M. Cameron 649164670ac8SStephen M. Cameron c = cmd_alloc(h); 6492bf43caf3SRobert Elliott 6493a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6494a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 649564670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 649664670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 649764670ac8SStephen M. Cameron c->waiting = NULL; 649864670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 649964670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 650064670ac8SStephen M. Cameron * the command either. This is the last command we will send before 650164670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 650264670ac8SStephen M. Cameron */ 6503bf43caf3SRobert Elliott return; 650464670ac8SStephen M. Cameron } 650564670ac8SStephen M. Cameron 6506a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6507b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6508edd16368SStephen M. Cameron int cmd_type) 6509edd16368SStephen M. Cameron { 6510edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 65119b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6512edd16368SStephen M. Cameron 6513edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6514a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6515edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6516edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6517edd16368SStephen M. Cameron c->Header.SGList = 1; 651850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6519edd16368SStephen M. Cameron } else { 6520edd16368SStephen M. Cameron c->Header.SGList = 0; 652150a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6522edd16368SStephen M. Cameron } 6523edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6524edd16368SStephen M. Cameron 6525edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6526edd16368SStephen M. Cameron switch (cmd) { 6527edd16368SStephen M. Cameron case HPSA_INQUIRY: 6528edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6529b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6530edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6531b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6532edd16368SStephen M. Cameron } 6533edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6534a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6535a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6536edd16368SStephen M. Cameron c->Request.Timeout = 0; 6537edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6538edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6539edd16368SStephen M. Cameron break; 6540edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6541edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6542edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6543edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6544edd16368SStephen M. Cameron */ 6545edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6546a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6547a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6548edd16368SStephen M. Cameron c->Request.Timeout = 0; 6549edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6550edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6551edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6552edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6553edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6554edd16368SStephen M. Cameron break; 6555c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6556c2adae44SScott Teel c->Request.CDBLen = 16; 6557c2adae44SScott Teel c->Request.type_attr_dir = 6558c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6559c2adae44SScott Teel c->Request.Timeout = 0; 6560c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6561c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6562c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6563c2adae44SScott Teel break; 6564c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6565c2adae44SScott Teel c->Request.CDBLen = 16; 6566c2adae44SScott Teel c->Request.type_attr_dir = 6567c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6568c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6569c2adae44SScott Teel c->Request.Timeout = 0; 6570c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6571c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6572c2adae44SScott Teel break; 6573edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6574edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6575a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6576a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6577a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6578edd16368SStephen M. Cameron c->Request.Timeout = 0; 6579edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6580edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6581bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6582bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6583edd16368SStephen M. Cameron break; 6584edd16368SStephen M. Cameron case TEST_UNIT_READY: 6585edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6586a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6587a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6588edd16368SStephen M. Cameron c->Request.Timeout = 0; 6589edd16368SStephen M. Cameron break; 6590283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6591283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6592a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6593a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6594283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6595283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6596283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6597283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6598283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6599283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6600283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6601283b4a9bSStephen M. Cameron break; 6602316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6603316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6604a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6605a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6606316b221aSStephen M. Cameron c->Request.Timeout = 0; 6607316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6608316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6609316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6610316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6611316b221aSStephen M. Cameron break; 661203383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 661303383736SDon Brace c->Request.CDBLen = 10; 661403383736SDon Brace c->Request.type_attr_dir = 661503383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 661603383736SDon Brace c->Request.Timeout = 0; 661703383736SDon Brace c->Request.CDB[0] = BMIC_READ; 661803383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 661903383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 662003383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 662103383736SDon Brace break; 6622d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6623d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6624d04e62b9SKevin Barnett c->Request.type_attr_dir = 6625d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6626d04e62b9SKevin Barnett c->Request.Timeout = 0; 6627d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6628d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6629d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6630d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6631d04e62b9SKevin Barnett break; 663266749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 663366749d0dSScott Teel c->Request.CDBLen = 10; 663466749d0dSScott Teel c->Request.type_attr_dir = 663566749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 663666749d0dSScott Teel c->Request.Timeout = 0; 663766749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 663866749d0dSScott Teel c->Request.CDB[1] = 0; 663966749d0dSScott Teel c->Request.CDB[2] = 0; 664066749d0dSScott Teel c->Request.CDB[3] = 0; 664166749d0dSScott Teel c->Request.CDB[4] = 0; 664266749d0dSScott Teel c->Request.CDB[5] = 0; 664366749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 664466749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 664566749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 664666749d0dSScott Teel c->Request.CDB[9] = 0; 664766749d0dSScott Teel break; 6648edd16368SStephen M. Cameron default: 6649edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6650edd16368SStephen M. Cameron BUG(); 6651a2dac136SStephen M. Cameron return -1; 6652edd16368SStephen M. Cameron } 6653edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6654edd16368SStephen M. Cameron switch (cmd) { 6655edd16368SStephen M. Cameron 66560b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 66570b9b7b6eSScott Teel c->Request.CDBLen = 16; 66580b9b7b6eSScott Teel c->Request.type_attr_dir = 66590b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 66600b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 66610b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 66620b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 66630b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 66640b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 66650b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 66660b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 66670b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 66680b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 66690b9b7b6eSScott Teel break; 6670edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6671edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6672a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6673a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6674edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 667564670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 667664670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 667721e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6678edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6679edd16368SStephen M. Cameron /* LunID device */ 6680edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6681edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6682edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6683edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6684edd16368SStephen M. Cameron break; 668575167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 66869b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 66872b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 66889b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 66899b5c48c2SStephen Cameron tag, c->Header.tag); 669075167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6691a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6692a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6693a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 669475167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 669575167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 669675167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 669775167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 669875167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 669975167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 67009b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 670175167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 670275167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 670375167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 670475167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 670575167d2cSStephen M. Cameron break; 6706edd16368SStephen M. Cameron default: 6707edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6708edd16368SStephen M. Cameron cmd); 6709edd16368SStephen M. Cameron BUG(); 6710edd16368SStephen M. Cameron } 6711edd16368SStephen M. Cameron } else { 6712edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6713edd16368SStephen M. Cameron BUG(); 6714edd16368SStephen M. Cameron } 6715edd16368SStephen M. Cameron 6716a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6717edd16368SStephen M. Cameron case XFER_READ: 6718edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6719edd16368SStephen M. Cameron break; 6720edd16368SStephen M. Cameron case XFER_WRITE: 6721edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6722edd16368SStephen M. Cameron break; 6723edd16368SStephen M. Cameron case XFER_NONE: 6724edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6725edd16368SStephen M. Cameron break; 6726edd16368SStephen M. Cameron default: 6727edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6728edd16368SStephen M. Cameron } 6729a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6730a2dac136SStephen M. Cameron return -1; 6731a2dac136SStephen M. Cameron return 0; 6732edd16368SStephen M. Cameron } 6733edd16368SStephen M. Cameron 6734edd16368SStephen M. Cameron /* 6735edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6736edd16368SStephen M. Cameron */ 6737edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6738edd16368SStephen M. Cameron { 6739edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6740edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6741088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6742088ba34cSStephen M. Cameron page_offs + size); 6743edd16368SStephen M. Cameron 6744edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6745edd16368SStephen M. Cameron } 6746edd16368SStephen M. Cameron 6747254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6748edd16368SStephen M. Cameron { 6749254f796bSMatt Gates return h->access.command_completed(h, q); 6750edd16368SStephen M. Cameron } 6751edd16368SStephen M. Cameron 6752900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6753edd16368SStephen M. Cameron { 6754edd16368SStephen M. Cameron return h->access.intr_pending(h); 6755edd16368SStephen M. Cameron } 6756edd16368SStephen M. Cameron 6757edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6758edd16368SStephen M. Cameron { 675910f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 676010f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6761edd16368SStephen M. Cameron } 6762edd16368SStephen M. Cameron 676301a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 676401a02ffcSStephen M. Cameron u32 raw_tag) 6765edd16368SStephen M. Cameron { 6766edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6767edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6768edd16368SStephen M. Cameron return 1; 6769edd16368SStephen M. Cameron } 6770edd16368SStephen M. Cameron return 0; 6771edd16368SStephen M. Cameron } 6772edd16368SStephen M. Cameron 67735a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6774edd16368SStephen M. Cameron { 6775e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6776c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6777c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 67781fb011fbSStephen M. Cameron complete_scsi_command(c); 67798be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6780edd16368SStephen M. Cameron complete(c->waiting); 6781a104c99fSStephen M. Cameron } 6782a104c99fSStephen M. Cameron 6783303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 67841d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6785303932fdSDon Brace u32 raw_tag) 6786303932fdSDon Brace { 6787303932fdSDon Brace u32 tag_index; 6788303932fdSDon Brace struct CommandList *c; 6789303932fdSDon Brace 6790f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 67911d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6792303932fdSDon Brace c = h->cmd_pool + tag_index; 67935a3d16f5SStephen M. Cameron finish_cmd(c); 67941d94f94dSStephen M. Cameron } 6795303932fdSDon Brace } 6796303932fdSDon Brace 679764670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 679864670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 679964670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 680064670ac8SStephen M. Cameron * functions. 680164670ac8SStephen M. Cameron */ 680264670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 680364670ac8SStephen M. Cameron { 680464670ac8SStephen M. Cameron if (likely(!reset_devices)) 680564670ac8SStephen M. Cameron return 0; 680664670ac8SStephen M. Cameron 680764670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 680864670ac8SStephen M. Cameron return 0; 680964670ac8SStephen M. Cameron 681064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 681164670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 681264670ac8SStephen M. Cameron 681364670ac8SStephen M. Cameron return 1; 681464670ac8SStephen M. Cameron } 681564670ac8SStephen M. Cameron 6816254f796bSMatt Gates /* 6817254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6818254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6819254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6820254f796bSMatt Gates */ 6821254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 682264670ac8SStephen M. Cameron { 6823254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6824254f796bSMatt Gates } 6825254f796bSMatt Gates 6826254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6827254f796bSMatt Gates { 6828254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6829254f796bSMatt Gates u8 q = *(u8 *) queue; 683064670ac8SStephen M. Cameron u32 raw_tag; 683164670ac8SStephen M. Cameron 683264670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 683364670ac8SStephen M. Cameron return IRQ_NONE; 683464670ac8SStephen M. Cameron 683564670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 683664670ac8SStephen M. Cameron return IRQ_NONE; 6837a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 683864670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6839254f796bSMatt Gates raw_tag = get_next_completion(h, q); 684064670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6841254f796bSMatt Gates raw_tag = next_command(h, q); 684264670ac8SStephen M. Cameron } 684364670ac8SStephen M. Cameron return IRQ_HANDLED; 684464670ac8SStephen M. Cameron } 684564670ac8SStephen M. Cameron 6846254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 684764670ac8SStephen M. Cameron { 6848254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 684964670ac8SStephen M. Cameron u32 raw_tag; 6850254f796bSMatt Gates u8 q = *(u8 *) queue; 685164670ac8SStephen M. Cameron 685264670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 685364670ac8SStephen M. Cameron return IRQ_NONE; 685464670ac8SStephen M. Cameron 6855a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6856254f796bSMatt Gates raw_tag = get_next_completion(h, q); 685764670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6858254f796bSMatt Gates raw_tag = next_command(h, q); 685964670ac8SStephen M. Cameron return IRQ_HANDLED; 686064670ac8SStephen M. Cameron } 686164670ac8SStephen M. Cameron 6862254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6863edd16368SStephen M. Cameron { 6864254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6865303932fdSDon Brace u32 raw_tag; 6866254f796bSMatt Gates u8 q = *(u8 *) queue; 6867edd16368SStephen M. Cameron 6868edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6869edd16368SStephen M. Cameron return IRQ_NONE; 6870a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 687110f66018SStephen M. Cameron while (interrupt_pending(h)) { 6872254f796bSMatt Gates raw_tag = get_next_completion(h, q); 687310f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 68741d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6875254f796bSMatt Gates raw_tag = next_command(h, q); 687610f66018SStephen M. Cameron } 687710f66018SStephen M. Cameron } 687810f66018SStephen M. Cameron return IRQ_HANDLED; 687910f66018SStephen M. Cameron } 688010f66018SStephen M. Cameron 6881254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 688210f66018SStephen M. Cameron { 6883254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 688410f66018SStephen M. Cameron u32 raw_tag; 6885254f796bSMatt Gates u8 q = *(u8 *) queue; 688610f66018SStephen M. Cameron 6887a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6888254f796bSMatt Gates raw_tag = get_next_completion(h, q); 6889303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 68901d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6891254f796bSMatt Gates raw_tag = next_command(h, q); 6892edd16368SStephen M. Cameron } 6893edd16368SStephen M. Cameron return IRQ_HANDLED; 6894edd16368SStephen M. Cameron } 6895edd16368SStephen M. Cameron 6896a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 6897a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 6898a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 6899a9a3a273SStephen M. Cameron */ 69006f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6901edd16368SStephen M. Cameron unsigned char type) 6902edd16368SStephen M. Cameron { 6903edd16368SStephen M. Cameron struct Command { 6904edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 6905edd16368SStephen M. Cameron struct RequestBlock Request; 6906edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 6907edd16368SStephen M. Cameron }; 6908edd16368SStephen M. Cameron struct Command *cmd; 6909edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 6910edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 6911edd16368SStephen M. Cameron dma_addr_t paddr64; 69122b08b3e9SDon Brace __le32 paddr32; 69132b08b3e9SDon Brace u32 tag; 6914edd16368SStephen M. Cameron void __iomem *vaddr; 6915edd16368SStephen M. Cameron int i, err; 6916edd16368SStephen M. Cameron 6917edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 6918edd16368SStephen M. Cameron if (vaddr == NULL) 6919edd16368SStephen M. Cameron return -ENOMEM; 6920edd16368SStephen M. Cameron 6921edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6922edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 6923edd16368SStephen M. Cameron * memory. 6924edd16368SStephen M. Cameron */ 6925edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 6926edd16368SStephen M. Cameron if (err) { 6927edd16368SStephen M. Cameron iounmap(vaddr); 69281eaec8f3SRobert Elliott return err; 6929edd16368SStephen M. Cameron } 6930edd16368SStephen M. Cameron 6931edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 6932edd16368SStephen M. Cameron if (cmd == NULL) { 6933edd16368SStephen M. Cameron iounmap(vaddr); 6934edd16368SStephen M. Cameron return -ENOMEM; 6935edd16368SStephen M. Cameron } 6936edd16368SStephen M. Cameron 6937edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 6938edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 6939edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 6940edd16368SStephen M. Cameron */ 69412b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 6942edd16368SStephen M. Cameron 6943edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 6944edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 694550a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 69462b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 6947edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 6948edd16368SStephen M. Cameron 6949edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 6950a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 6951a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 6952edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 6953edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 6954edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 6955edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 695650a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 69572b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 695850a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 6959edd16368SStephen M. Cameron 69602b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 6961edd16368SStephen M. Cameron 6962edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 6963edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 69642b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 6965edd16368SStephen M. Cameron break; 6966edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 6967edd16368SStephen M. Cameron } 6968edd16368SStephen M. Cameron 6969edd16368SStephen M. Cameron iounmap(vaddr); 6970edd16368SStephen M. Cameron 6971edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 6972edd16368SStephen M. Cameron * still complete the command. 6973edd16368SStephen M. Cameron */ 6974edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 6975edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 6976edd16368SStephen M. Cameron opcode, type); 6977edd16368SStephen M. Cameron return -ETIMEDOUT; 6978edd16368SStephen M. Cameron } 6979edd16368SStephen M. Cameron 6980edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 6981edd16368SStephen M. Cameron 6982edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 6983edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 6984edd16368SStephen M. Cameron opcode, type); 6985edd16368SStephen M. Cameron return -EIO; 6986edd16368SStephen M. Cameron } 6987edd16368SStephen M. Cameron 6988edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 6989edd16368SStephen M. Cameron opcode, type); 6990edd16368SStephen M. Cameron return 0; 6991edd16368SStephen M. Cameron } 6992edd16368SStephen M. Cameron 6993edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 6994edd16368SStephen M. Cameron 69951df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 699642a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 6997edd16368SStephen M. Cameron { 6998edd16368SStephen M. Cameron 69991df8552aSStephen M. Cameron if (use_doorbell) { 70001df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 70011df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 70021df8552aSStephen M. Cameron * other way using the doorbell register. 7003edd16368SStephen M. Cameron */ 70041df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7005cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 700685009239SStephen M. Cameron 700700701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 700885009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 700985009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 701085009239SStephen M. Cameron * over in some weird corner cases. 701185009239SStephen M. Cameron */ 701200701a96SJustin Lindley msleep(10000); 70131df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7014edd16368SStephen M. Cameron 7015edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7016edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7017edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7018edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 70191df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 70201df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 70211df8552aSStephen M. Cameron * controller." */ 7022edd16368SStephen M. Cameron 70232662cab8SDon Brace int rc = 0; 70242662cab8SDon Brace 70251df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 70262662cab8SDon Brace 7027edd16368SStephen M. Cameron /* enter the D3hot power management state */ 70282662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 70292662cab8SDon Brace if (rc) 70302662cab8SDon Brace return rc; 7031edd16368SStephen M. Cameron 7032edd16368SStephen M. Cameron msleep(500); 7033edd16368SStephen M. Cameron 7034edd16368SStephen M. Cameron /* enter the D0 power management state */ 70352662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 70362662cab8SDon Brace if (rc) 70372662cab8SDon Brace return rc; 7038c4853efeSMike Miller 7039c4853efeSMike Miller /* 7040c4853efeSMike Miller * The P600 requires a small delay when changing states. 7041c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7042c4853efeSMike Miller * This for kdump only and is particular to the P600. 7043c4853efeSMike Miller */ 7044c4853efeSMike Miller msleep(500); 70451df8552aSStephen M. Cameron } 70461df8552aSStephen M. Cameron return 0; 70471df8552aSStephen M. Cameron } 70481df8552aSStephen M. Cameron 70496f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7050580ada3cSStephen M. Cameron { 7051580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7052f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7053580ada3cSStephen M. Cameron } 7054580ada3cSStephen M. Cameron 70556f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7056580ada3cSStephen M. Cameron { 7057580ada3cSStephen M. Cameron char *driver_version; 7058580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7059580ada3cSStephen M. Cameron 7060580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7061580ada3cSStephen M. Cameron if (!driver_version) 7062580ada3cSStephen M. Cameron return -ENOMEM; 7063580ada3cSStephen M. Cameron 7064580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7065580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7066580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7067580ada3cSStephen M. Cameron kfree(driver_version); 7068580ada3cSStephen M. Cameron return 0; 7069580ada3cSStephen M. Cameron } 7070580ada3cSStephen M. Cameron 70716f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 70726f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7073580ada3cSStephen M. Cameron { 7074580ada3cSStephen M. Cameron int i; 7075580ada3cSStephen M. Cameron 7076580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7077580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7078580ada3cSStephen M. Cameron } 7079580ada3cSStephen M. Cameron 70806f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7081580ada3cSStephen M. Cameron { 7082580ada3cSStephen M. Cameron 7083580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7084580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7085580ada3cSStephen M. Cameron 7086580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7087580ada3cSStephen M. Cameron if (!old_driver_ver) 7088580ada3cSStephen M. Cameron return -ENOMEM; 7089580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7090580ada3cSStephen M. Cameron 7091580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7092580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7093580ada3cSStephen M. Cameron */ 7094580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7095580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7096580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7097580ada3cSStephen M. Cameron kfree(old_driver_ver); 7098580ada3cSStephen M. Cameron return rc; 7099580ada3cSStephen M. Cameron } 71001df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 71011df8552aSStephen M. Cameron * states or the using the doorbell register. 71021df8552aSStephen M. Cameron */ 71036b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 71041df8552aSStephen M. Cameron { 71051df8552aSStephen M. Cameron u64 cfg_offset; 71061df8552aSStephen M. Cameron u32 cfg_base_addr; 71071df8552aSStephen M. Cameron u64 cfg_base_addr_index; 71081df8552aSStephen M. Cameron void __iomem *vaddr; 71091df8552aSStephen M. Cameron unsigned long paddr; 7110580ada3cSStephen M. Cameron u32 misc_fw_support; 7111270d05deSStephen M. Cameron int rc; 71121df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7113cf0b08d0SStephen M. Cameron u32 use_doorbell; 7114270d05deSStephen M. Cameron u16 command_register; 71151df8552aSStephen M. Cameron 71161df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 71171df8552aSStephen M. Cameron * the same thing as 71181df8552aSStephen M. Cameron * 71191df8552aSStephen M. Cameron * pci_save_state(pci_dev); 71201df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 71211df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 71221df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 71231df8552aSStephen M. Cameron * 71241df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 71251df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 71261df8552aSStephen M. Cameron * using the doorbell register. 71271df8552aSStephen M. Cameron */ 712818867659SStephen M. Cameron 712960f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 713060f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 713125c1e56aSStephen M. Cameron return -ENODEV; 713225c1e56aSStephen M. Cameron } 713346380786SStephen M. Cameron 713446380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 713546380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 713646380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 713718867659SStephen M. Cameron 7138270d05deSStephen M. Cameron /* Save the PCI command register */ 7139270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7140270d05deSStephen M. Cameron pci_save_state(pdev); 71411df8552aSStephen M. Cameron 71421df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 71431df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 71441df8552aSStephen M. Cameron if (rc) 71451df8552aSStephen M. Cameron return rc; 71461df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 71471df8552aSStephen M. Cameron if (!vaddr) 71481df8552aSStephen M. Cameron return -ENOMEM; 71491df8552aSStephen M. Cameron 71501df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 71511df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 71521df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 71531df8552aSStephen M. Cameron if (rc) 71541df8552aSStephen M. Cameron goto unmap_vaddr; 71551df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 71561df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 71571df8552aSStephen M. Cameron if (!cfgtable) { 71581df8552aSStephen M. Cameron rc = -ENOMEM; 71591df8552aSStephen M. Cameron goto unmap_vaddr; 71601df8552aSStephen M. Cameron } 7161580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7162580ada3cSStephen M. Cameron if (rc) 716303741d95STomas Henzl goto unmap_cfgtable; 71641df8552aSStephen M. Cameron 7165cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7166cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7167cf0b08d0SStephen M. Cameron */ 71681df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7169cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7170cf0b08d0SStephen M. Cameron if (use_doorbell) { 7171cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7172cf0b08d0SStephen M. Cameron } else { 71731df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7174cf0b08d0SStephen M. Cameron if (use_doorbell) { 7175050f7147SStephen Cameron dev_warn(&pdev->dev, 7176050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 717764670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7178cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7179cf0b08d0SStephen M. Cameron } 7180cf0b08d0SStephen M. Cameron } 71811df8552aSStephen M. Cameron 71821df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 71831df8552aSStephen M. Cameron if (rc) 71841df8552aSStephen M. Cameron goto unmap_cfgtable; 7185edd16368SStephen M. Cameron 7186270d05deSStephen M. Cameron pci_restore_state(pdev); 7187270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7188edd16368SStephen M. Cameron 71891df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 71901df8552aSStephen M. Cameron need a little pause here */ 71911df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 71921df8552aSStephen M. Cameron 7193fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7194fe5389c8SStephen M. Cameron if (rc) { 7195fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7196050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7197fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7198fe5389c8SStephen M. Cameron } 7199fe5389c8SStephen M. Cameron 7200580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7201580ada3cSStephen M. Cameron if (rc < 0) 7202580ada3cSStephen M. Cameron goto unmap_cfgtable; 7203580ada3cSStephen M. Cameron if (rc) { 720464670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 720564670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 720664670ac8SStephen M. Cameron rc = -ENOTSUPP; 7207580ada3cSStephen M. Cameron } else { 720864670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 72091df8552aSStephen M. Cameron } 72101df8552aSStephen M. Cameron 72111df8552aSStephen M. Cameron unmap_cfgtable: 72121df8552aSStephen M. Cameron iounmap(cfgtable); 72131df8552aSStephen M. Cameron 72141df8552aSStephen M. Cameron unmap_vaddr: 72151df8552aSStephen M. Cameron iounmap(vaddr); 72161df8552aSStephen M. Cameron return rc; 7217edd16368SStephen M. Cameron } 7218edd16368SStephen M. Cameron 7219edd16368SStephen M. Cameron /* 7220edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7221edd16368SStephen M. Cameron * the io functions. 7222edd16368SStephen M. Cameron * This is for debug only. 7223edd16368SStephen M. Cameron */ 722442a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7225edd16368SStephen M. Cameron { 722658f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7227edd16368SStephen M. Cameron int i; 7228edd16368SStephen M. Cameron char temp_name[17]; 7229edd16368SStephen M. Cameron 7230edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7231edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7232edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7233edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7234edd16368SStephen M. Cameron temp_name[4] = '\0'; 7235edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7236edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7237edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7238edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7239edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7240edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7241edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7242edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7243edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7244edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7245edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7246edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 724769d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7248edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7249edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7250edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7251edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7252edd16368SStephen M. Cameron temp_name[16] = '\0'; 7253edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7254edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7255edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7256edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 725758f8665cSStephen M. Cameron } 7258edd16368SStephen M. Cameron 7259edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7260edd16368SStephen M. Cameron { 7261edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7262edd16368SStephen M. Cameron 7263edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7264edd16368SStephen M. Cameron return 0; 7265edd16368SStephen M. Cameron offset = 0; 7266edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7267edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7268edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7269edd16368SStephen M. Cameron offset += 4; 7270edd16368SStephen M. Cameron else { 7271edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7272edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7273edd16368SStephen M. Cameron switch (mem_type) { 7274edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7275edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7276edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7277edd16368SStephen M. Cameron break; 7278edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7279edd16368SStephen M. Cameron offset += 8; 7280edd16368SStephen M. Cameron break; 7281edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7282edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7283edd16368SStephen M. Cameron "base address is invalid\n"); 7284edd16368SStephen M. Cameron return -1; 7285edd16368SStephen M. Cameron break; 7286edd16368SStephen M. Cameron } 7287edd16368SStephen M. Cameron } 7288edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7289edd16368SStephen M. Cameron return i + 1; 7290edd16368SStephen M. Cameron } 7291edd16368SStephen M. Cameron return -1; 7292edd16368SStephen M. Cameron } 7293edd16368SStephen M. Cameron 7294cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7295cc64c817SRobert Elliott { 7296cc64c817SRobert Elliott if (h->msix_vector) { 7297cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7298cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7299105a3dbcSRobert Elliott h->msix_vector = 0; 7300cc64c817SRobert Elliott } else if (h->msi_vector) { 7301cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7302cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7303105a3dbcSRobert Elliott h->msi_vector = 0; 7304cc64c817SRobert Elliott } 7305cc64c817SRobert Elliott } 7306cc64c817SRobert Elliott 7307edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7308050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7309edd16368SStephen M. Cameron */ 73106f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7311edd16368SStephen M. Cameron { 7312edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7313254f796bSMatt Gates int err, i; 7314254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7315254f796bSMatt Gates 7316254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7317254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7318254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7319254f796bSMatt Gates } 7320edd16368SStephen M. Cameron 7321edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 73226b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 73236b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7324edd16368SStephen M. Cameron goto default_int_mode; 732555c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7326050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7327eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7328f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7329f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 733018fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 733118fce3c4SAlexander Gordeev 1, h->msix_vector); 733218fce3c4SAlexander Gordeev if (err < 0) { 733318fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 733418fce3c4SAlexander Gordeev h->msix_vector = 0; 733518fce3c4SAlexander Gordeev goto single_msi_mode; 733618fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 733755c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7338edd16368SStephen M. Cameron "available\n", err); 7339eee0f03aSHannes Reinecke } 734018fce3c4SAlexander Gordeev h->msix_vector = err; 7341eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7342eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7343eee0f03aSHannes Reinecke return; 7344edd16368SStephen M. Cameron } 734518fce3c4SAlexander Gordeev single_msi_mode: 734655c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7347050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 734855c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7349edd16368SStephen M. Cameron h->msi_vector = 1; 7350edd16368SStephen M. Cameron else 735155c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7352edd16368SStephen M. Cameron } 7353edd16368SStephen M. Cameron default_int_mode: 7354edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7355edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7356a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7357edd16368SStephen M. Cameron } 7358edd16368SStephen M. Cameron 73596f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7360e5c880d1SStephen M. Cameron { 7361e5c880d1SStephen M. Cameron int i; 7362e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7363e5c880d1SStephen M. Cameron 7364e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7365e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7366e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7367e5c880d1SStephen M. Cameron subsystem_vendor_id; 7368e5c880d1SStephen M. Cameron 7369e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7370e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7371e5c880d1SStephen M. Cameron return i; 7372e5c880d1SStephen M. Cameron 73736798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 73746798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 73756798cc0aSStephen M. Cameron !hpsa_allow_any) { 7376e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7377e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7378e5c880d1SStephen M. Cameron return -ENODEV; 7379e5c880d1SStephen M. Cameron } 7380e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7381e5c880d1SStephen M. Cameron } 7382e5c880d1SStephen M. Cameron 73836f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 73843a7774ceSStephen M. Cameron unsigned long *memory_bar) 73853a7774ceSStephen M. Cameron { 73863a7774ceSStephen M. Cameron int i; 73873a7774ceSStephen M. Cameron 73883a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 738912d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 73903a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 739112d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 739212d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 73933a7774ceSStephen M. Cameron *memory_bar); 73943a7774ceSStephen M. Cameron return 0; 73953a7774ceSStephen M. Cameron } 739612d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 73973a7774ceSStephen M. Cameron return -ENODEV; 73983a7774ceSStephen M. Cameron } 73993a7774ceSStephen M. Cameron 74006f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 74016f039790SGreg Kroah-Hartman int wait_for_ready) 74022c4c8c8bSStephen M. Cameron { 7403fe5389c8SStephen M. Cameron int i, iterations; 74042c4c8c8bSStephen M. Cameron u32 scratchpad; 7405fe5389c8SStephen M. Cameron if (wait_for_ready) 7406fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7407fe5389c8SStephen M. Cameron else 7408fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 74092c4c8c8bSStephen M. Cameron 7410fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7411fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7412fe5389c8SStephen M. Cameron if (wait_for_ready) { 74132c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 74142c4c8c8bSStephen M. Cameron return 0; 7415fe5389c8SStephen M. Cameron } else { 7416fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7417fe5389c8SStephen M. Cameron return 0; 7418fe5389c8SStephen M. Cameron } 74192c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 74202c4c8c8bSStephen M. Cameron } 7421fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 74222c4c8c8bSStephen M. Cameron return -ENODEV; 74232c4c8c8bSStephen M. Cameron } 74242c4c8c8bSStephen M. Cameron 74256f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 74266f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7427a51fd47fSStephen M. Cameron u64 *cfg_offset) 7428a51fd47fSStephen M. Cameron { 7429a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7430a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7431a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7432a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7433a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7434a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7435a51fd47fSStephen M. Cameron return -ENODEV; 7436a51fd47fSStephen M. Cameron } 7437a51fd47fSStephen M. Cameron return 0; 7438a51fd47fSStephen M. Cameron } 7439a51fd47fSStephen M. Cameron 7440195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7441195f2c65SRobert Elliott { 7442105a3dbcSRobert Elliott if (h->transtable) { 7443195f2c65SRobert Elliott iounmap(h->transtable); 7444105a3dbcSRobert Elliott h->transtable = NULL; 7445105a3dbcSRobert Elliott } 7446105a3dbcSRobert Elliott if (h->cfgtable) { 7447195f2c65SRobert Elliott iounmap(h->cfgtable); 7448105a3dbcSRobert Elliott h->cfgtable = NULL; 7449105a3dbcSRobert Elliott } 7450195f2c65SRobert Elliott } 7451195f2c65SRobert Elliott 7452195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7453195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7454195f2c65SRobert Elliott + * */ 74556f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7456edd16368SStephen M. Cameron { 745701a02ffcSStephen M. Cameron u64 cfg_offset; 745801a02ffcSStephen M. Cameron u32 cfg_base_addr; 745901a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7460303932fdSDon Brace u32 trans_offset; 7461a51fd47fSStephen M. Cameron int rc; 746277c4495cSStephen M. Cameron 7463a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7464a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7465a51fd47fSStephen M. Cameron if (rc) 7466a51fd47fSStephen M. Cameron return rc; 746777c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7468a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7469cd3c81c4SRobert Elliott if (!h->cfgtable) { 7470cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 747177c4495cSStephen M. Cameron return -ENOMEM; 7472cd3c81c4SRobert Elliott } 7473580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7474580ada3cSStephen M. Cameron if (rc) 7475580ada3cSStephen M. Cameron return rc; 747677c4495cSStephen M. Cameron /* Find performant mode table. */ 7477a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 747877c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 747977c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 748077c4495cSStephen M. Cameron sizeof(*h->transtable)); 7481195f2c65SRobert Elliott if (!h->transtable) { 7482195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7483195f2c65SRobert Elliott hpsa_free_cfgtables(h); 748477c4495cSStephen M. Cameron return -ENOMEM; 7485195f2c65SRobert Elliott } 748677c4495cSStephen M. Cameron return 0; 748777c4495cSStephen M. Cameron } 748877c4495cSStephen M. Cameron 74896f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7490cba3d38bSStephen M. Cameron { 749141ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 749241ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 749341ce4c35SStephen Cameron 749441ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 749572ceeaecSStephen M. Cameron 749672ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 749772ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 749872ceeaecSStephen M. Cameron h->max_commands = 32; 749972ceeaecSStephen M. Cameron 750041ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 750141ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 750241ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 750341ce4c35SStephen Cameron h->max_commands, 750441ce4c35SStephen Cameron MIN_MAX_COMMANDS); 750541ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7506cba3d38bSStephen M. Cameron } 7507cba3d38bSStephen M. Cameron } 7508cba3d38bSStephen M. Cameron 7509c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7510c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7511c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7512c7ee65b3SWebb Scales */ 7513c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7514c7ee65b3SWebb Scales { 7515c7ee65b3SWebb Scales return h->maxsgentries > 512; 7516c7ee65b3SWebb Scales } 7517c7ee65b3SWebb Scales 7518b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7519b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7520b93d7536SStephen M. Cameron * SG chain block size, etc. 7521b93d7536SStephen M. Cameron */ 75226f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7523b93d7536SStephen M. Cameron { 7524cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 752545fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7526b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7527283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7528c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7529c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7530b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 75311a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7532b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7533b93d7536SStephen M. Cameron } else { 7534c7ee65b3SWebb Scales /* 7535c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7536c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7537c7ee65b3SWebb Scales * would lock up the controller) 7538c7ee65b3SWebb Scales */ 7539c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 75401a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7541c7ee65b3SWebb Scales h->chainsize = 0; 7542b93d7536SStephen M. Cameron } 754375167d2cSStephen M. Cameron 754475167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 754575167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 75460e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 75470e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 75480e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 75490e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 75508be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 75518be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7552b93d7536SStephen M. Cameron } 7553b93d7536SStephen M. Cameron 755476c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 755576c46e49SStephen M. Cameron { 75560fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7557050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 755876c46e49SStephen M. Cameron return false; 755976c46e49SStephen M. Cameron } 756076c46e49SStephen M. Cameron return true; 756176c46e49SStephen M. Cameron } 756276c46e49SStephen M. Cameron 756397a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7564f7c39101SStephen M. Cameron { 756597a5e98cSStephen M. Cameron u32 driver_support; 7566f7c39101SStephen M. Cameron 756797a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 75680b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 75690b9e7b74SArnd Bergmann #ifdef CONFIG_X86 757097a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7571f7c39101SStephen M. Cameron #endif 757228e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 757328e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7574f7c39101SStephen M. Cameron } 7575f7c39101SStephen M. Cameron 75763d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 75773d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 75783d0eab67SStephen M. Cameron */ 75793d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 75803d0eab67SStephen M. Cameron { 75813d0eab67SStephen M. Cameron u32 dma_prefetch; 75823d0eab67SStephen M. Cameron 75833d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 75843d0eab67SStephen M. Cameron return; 75853d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 75863d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 75873d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 75883d0eab67SStephen M. Cameron } 75893d0eab67SStephen M. Cameron 7590c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 759176438d08SStephen M. Cameron { 759276438d08SStephen M. Cameron int i; 759376438d08SStephen M. Cameron u32 doorbell_value; 759476438d08SStephen M. Cameron unsigned long flags; 759576438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7596007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 759776438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 759876438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 759976438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 760076438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7601c706a795SRobert Elliott goto done; 760276438d08SStephen M. Cameron /* delay and try again */ 7603007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 760476438d08SStephen M. Cameron } 7605c706a795SRobert Elliott return -ENODEV; 7606c706a795SRobert Elliott done: 7607c706a795SRobert Elliott return 0; 760876438d08SStephen M. Cameron } 760976438d08SStephen M. Cameron 7610c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7611eb6b2ae9SStephen M. Cameron { 7612eb6b2ae9SStephen M. Cameron int i; 76136eaf46fdSStephen M. Cameron u32 doorbell_value; 76146eaf46fdSStephen M. Cameron unsigned long flags; 7615eb6b2ae9SStephen M. Cameron 7616eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7617eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7618eb6b2ae9SStephen M. Cameron * as we enter this code.) 7619eb6b2ae9SStephen M. Cameron */ 7620007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 762125163bd5SWebb Scales if (h->remove_in_progress) 762225163bd5SWebb Scales goto done; 76236eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 76246eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 76256eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7626382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7627c706a795SRobert Elliott goto done; 7628eb6b2ae9SStephen M. Cameron /* delay and try again */ 7629007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7630eb6b2ae9SStephen M. Cameron } 7631c706a795SRobert Elliott return -ENODEV; 7632c706a795SRobert Elliott done: 7633c706a795SRobert Elliott return 0; 76343f4336f3SStephen M. Cameron } 76353f4336f3SStephen M. Cameron 7636c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 76376f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 76383f4336f3SStephen M. Cameron { 76393f4336f3SStephen M. Cameron u32 trans_support; 76403f4336f3SStephen M. Cameron 76413f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 76423f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 76433f4336f3SStephen M. Cameron return -ENOTSUPP; 76443f4336f3SStephen M. Cameron 76453f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7646283b4a9bSStephen M. Cameron 76473f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 76483f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7649b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 76503f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7651c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7652c706a795SRobert Elliott goto error; 7653eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7654283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7655283b4a9bSStephen M. Cameron goto error; 7656960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7657eb6b2ae9SStephen M. Cameron return 0; 7658283b4a9bSStephen M. Cameron error: 7659050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7660283b4a9bSStephen M. Cameron return -ENODEV; 7661eb6b2ae9SStephen M. Cameron } 7662eb6b2ae9SStephen M. Cameron 7663195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7664195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7665195f2c65SRobert Elliott { 7666195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7667195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7668105a3dbcSRobert Elliott h->vaddr = NULL; 7669195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7670943a7021SRobert Elliott /* 7671943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7672943a7021SRobert Elliott * Documentation/PCI/pci.txt 7673943a7021SRobert Elliott */ 7674195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7675943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7676195f2c65SRobert Elliott } 7677195f2c65SRobert Elliott 7678195f2c65SRobert Elliott /* several items must be freed later */ 76796f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 768077c4495cSStephen M. Cameron { 7681eb6b2ae9SStephen M. Cameron int prod_index, err; 7682edd16368SStephen M. Cameron 7683e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7684e5c880d1SStephen M. Cameron if (prod_index < 0) 768560f923b9SRobert Elliott return prod_index; 7686e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7687e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7688e5c880d1SStephen M. Cameron 76899b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 76909b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 76919b5c48c2SStephen Cameron 7692e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7693e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7694e5a44df8SMatthew Garrett 769555c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7696edd16368SStephen M. Cameron if (err) { 7697195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7698943a7021SRobert Elliott pci_disable_device(h->pdev); 7699edd16368SStephen M. Cameron return err; 7700edd16368SStephen M. Cameron } 7701edd16368SStephen M. Cameron 7702f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7703edd16368SStephen M. Cameron if (err) { 770455c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7705195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7706943a7021SRobert Elliott pci_disable_device(h->pdev); 7707943a7021SRobert Elliott return err; 7708edd16368SStephen M. Cameron } 77094fa604e1SRobert Elliott 77104fa604e1SRobert Elliott pci_set_master(h->pdev); 77114fa604e1SRobert Elliott 77126b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 771312d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 77143a7774ceSStephen M. Cameron if (err) 7715195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7716edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7717204892e9SStephen M. Cameron if (!h->vaddr) { 7718195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7719204892e9SStephen M. Cameron err = -ENOMEM; 7720195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7721204892e9SStephen M. Cameron } 7722fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 77232c4c8c8bSStephen M. Cameron if (err) 7724195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 772577c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 772677c4495cSStephen M. Cameron if (err) 7727195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7728b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7729edd16368SStephen M. Cameron 773076c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7731edd16368SStephen M. Cameron err = -ENODEV; 7732195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7733edd16368SStephen M. Cameron } 773497a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 77353d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7736eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7737eb6b2ae9SStephen M. Cameron if (err) 7738195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7739edd16368SStephen M. Cameron return 0; 7740edd16368SStephen M. Cameron 7741195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7742195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7743195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7744204892e9SStephen M. Cameron iounmap(h->vaddr); 7745105a3dbcSRobert Elliott h->vaddr = NULL; 7746195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7747195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7748943a7021SRobert Elliott /* 7749943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7750943a7021SRobert Elliott * Documentation/PCI/pci.txt 7751943a7021SRobert Elliott */ 7752195f2c65SRobert Elliott pci_disable_device(h->pdev); 7753943a7021SRobert Elliott pci_release_regions(h->pdev); 7754edd16368SStephen M. Cameron return err; 7755edd16368SStephen M. Cameron } 7756edd16368SStephen M. Cameron 77576f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7758339b2b14SStephen M. Cameron { 7759339b2b14SStephen M. Cameron int rc; 7760339b2b14SStephen M. Cameron 7761339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7762339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7763339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7764339b2b14SStephen M. Cameron return; 7765339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7766339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7767339b2b14SStephen M. Cameron if (rc != 0) { 7768339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7769339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7770339b2b14SStephen M. Cameron } 7771339b2b14SStephen M. Cameron } 7772339b2b14SStephen M. Cameron 77736b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7774edd16368SStephen M. Cameron { 77751df8552aSStephen M. Cameron int rc, i; 77763b747298STomas Henzl void __iomem *vaddr; 7777edd16368SStephen M. Cameron 77784c2a8c40SStephen M. Cameron if (!reset_devices) 77794c2a8c40SStephen M. Cameron return 0; 77804c2a8c40SStephen M. Cameron 7781132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7782132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7783132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7784132aa220STomas Henzl */ 7785132aa220STomas Henzl rc = pci_enable_device(pdev); 7786132aa220STomas Henzl if (rc) { 7787132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7788132aa220STomas Henzl return -ENODEV; 7789132aa220STomas Henzl } 7790132aa220STomas Henzl pci_disable_device(pdev); 7791132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7792132aa220STomas Henzl rc = pci_enable_device(pdev); 7793132aa220STomas Henzl if (rc) { 7794132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7795132aa220STomas Henzl return -ENODEV; 7796132aa220STomas Henzl } 77974fa604e1SRobert Elliott 7798859c75abSTomas Henzl pci_set_master(pdev); 77994fa604e1SRobert Elliott 78003b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 78013b747298STomas Henzl if (vaddr == NULL) { 78023b747298STomas Henzl rc = -ENOMEM; 78033b747298STomas Henzl goto out_disable; 78043b747298STomas Henzl } 78053b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 78063b747298STomas Henzl iounmap(vaddr); 78073b747298STomas Henzl 78081df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 78096b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7810edd16368SStephen M. Cameron 78111df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 78121df8552aSStephen M. Cameron * but it's already (and still) up and running in 781318867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 781418867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 78151df8552aSStephen M. Cameron */ 7816adf1b3a3SRobert Elliott if (rc) 7817132aa220STomas Henzl goto out_disable; 7818edd16368SStephen M. Cameron 7819edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 78201ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7821edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7822edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7823edd16368SStephen M. Cameron break; 7824edd16368SStephen M. Cameron else 7825edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7826edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7827edd16368SStephen M. Cameron } 7828132aa220STomas Henzl 7829132aa220STomas Henzl out_disable: 7830132aa220STomas Henzl 7831132aa220STomas Henzl pci_disable_device(pdev); 7832132aa220STomas Henzl return rc; 7833edd16368SStephen M. Cameron } 7834edd16368SStephen M. Cameron 78351fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 78361fb7c98aSRobert Elliott { 78371fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7838105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7839105a3dbcSRobert Elliott if (h->cmd_pool) { 78401fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 78411fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 78421fb7c98aSRobert Elliott h->cmd_pool, 78431fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7844105a3dbcSRobert Elliott h->cmd_pool = NULL; 7845105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7846105a3dbcSRobert Elliott } 7847105a3dbcSRobert Elliott if (h->errinfo_pool) { 78481fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 78491fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 78501fb7c98aSRobert Elliott h->errinfo_pool, 78511fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7852105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7853105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7854105a3dbcSRobert Elliott } 78551fb7c98aSRobert Elliott } 78561fb7c98aSRobert Elliott 7857d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 78582e9d1b36SStephen M. Cameron { 78592e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 78602e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 78612e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 78622e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 78632e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 78642e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 78652e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 78662e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 78672e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 78682e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 78692e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 78702e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 78712e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 78722c143342SRobert Elliott goto clean_up; 78732e9d1b36SStephen M. Cameron } 7874360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 78752e9d1b36SStephen M. Cameron return 0; 78762c143342SRobert Elliott clean_up: 78772c143342SRobert Elliott hpsa_free_cmd_pool(h); 78782c143342SRobert Elliott return -ENOMEM; 78792e9d1b36SStephen M. Cameron } 78802e9d1b36SStephen M. Cameron 788141b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 788241b3cf08SStephen M. Cameron { 7883ec429952SFabian Frederick int i, cpu; 788441b3cf08SStephen M. Cameron 788541b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 788641b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 7887ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 788841b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 788941b3cf08SStephen M. Cameron } 789041b3cf08SStephen M. Cameron } 789141b3cf08SStephen M. Cameron 7892ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7893ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 7894ec501a18SRobert Elliott { 7895ec501a18SRobert Elliott int i; 7896ec501a18SRobert Elliott 7897ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 7898ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 7899ec501a18SRobert Elliott i = h->intr_mode; 7900ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7901ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7902105a3dbcSRobert Elliott h->q[i] = 0; 7903ec501a18SRobert Elliott return; 7904ec501a18SRobert Elliott } 7905ec501a18SRobert Elliott 7906ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 7907ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7908ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7909105a3dbcSRobert Elliott h->q[i] = 0; 7910ec501a18SRobert Elliott } 7911a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 7912a4e17fc1SRobert Elliott h->q[i] = 0; 7913ec501a18SRobert Elliott } 7914ec501a18SRobert Elliott 79159ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 79169ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 79170ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 79180ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 79190ae01a32SStephen M. Cameron { 7920254f796bSMatt Gates int rc, i; 79210ae01a32SStephen M. Cameron 7922254f796bSMatt Gates /* 7923254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 7924254f796bSMatt Gates * queue to process. 7925254f796bSMatt Gates */ 7926254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 7927254f796bSMatt Gates h->q[i] = (u8) i; 7928254f796bSMatt Gates 7929eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 7930254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 7931a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 79328b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7933254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 79348b47004aSRobert Elliott 0, h->intrname[i], 7935254f796bSMatt Gates &h->q[i]); 7936a4e17fc1SRobert Elliott if (rc) { 7937a4e17fc1SRobert Elliott int j; 7938a4e17fc1SRobert Elliott 7939a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 7940a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 7941a4e17fc1SRobert Elliott h->intr[i], h->devname); 7942a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 7943a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 7944a4e17fc1SRobert Elliott h->q[j] = 0; 7945a4e17fc1SRobert Elliott } 7946a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 7947a4e17fc1SRobert Elliott h->q[j] = 0; 7948a4e17fc1SRobert Elliott return rc; 7949a4e17fc1SRobert Elliott } 7950a4e17fc1SRobert Elliott } 795141b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 7952254f796bSMatt Gates } else { 7953254f796bSMatt Gates /* Use single reply pool */ 7954eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 79558b47004aSRobert Elliott if (h->msix_vector) 79568b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 79578b47004aSRobert Elliott "%s-msix", h->devname); 79588b47004aSRobert Elliott else 79598b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 79608b47004aSRobert Elliott "%s-msi", h->devname); 7961254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 79628b47004aSRobert Elliott msixhandler, 0, 79638b47004aSRobert Elliott h->intrname[h->intr_mode], 7964254f796bSMatt Gates &h->q[h->intr_mode]); 7965254f796bSMatt Gates } else { 79668b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 79678b47004aSRobert Elliott "%s-intx", h->devname); 7968254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 79698b47004aSRobert Elliott intxhandler, IRQF_SHARED, 79708b47004aSRobert Elliott h->intrname[h->intr_mode], 7971254f796bSMatt Gates &h->q[h->intr_mode]); 7972254f796bSMatt Gates } 7973105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 7974254f796bSMatt Gates } 79750ae01a32SStephen M. Cameron if (rc) { 7976195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 79770ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 7978195f2c65SRobert Elliott hpsa_free_irqs(h); 79790ae01a32SStephen M. Cameron return -ENODEV; 79800ae01a32SStephen M. Cameron } 79810ae01a32SStephen M. Cameron return 0; 79820ae01a32SStephen M. Cameron } 79830ae01a32SStephen M. Cameron 79846f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 798564670ac8SStephen M. Cameron { 798639c53f55SRobert Elliott int rc; 7987bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 798864670ac8SStephen M. Cameron 798964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 799039c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 799139c53f55SRobert Elliott if (rc) { 799264670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 799339c53f55SRobert Elliott return rc; 799464670ac8SStephen M. Cameron } 799564670ac8SStephen M. Cameron 799664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 799739c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 799839c53f55SRobert Elliott if (rc) { 799964670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 800064670ac8SStephen M. Cameron "after soft reset.\n"); 800139c53f55SRobert Elliott return rc; 800264670ac8SStephen M. Cameron } 800364670ac8SStephen M. Cameron 800464670ac8SStephen M. Cameron return 0; 800564670ac8SStephen M. Cameron } 800664670ac8SStephen M. Cameron 8007072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8008072b0518SStephen M. Cameron { 8009072b0518SStephen M. Cameron int i; 8010072b0518SStephen M. Cameron 8011072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8012072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8013072b0518SStephen M. Cameron continue; 80141fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 80151fb7c98aSRobert Elliott h->reply_queue_size, 80161fb7c98aSRobert Elliott h->reply_queue[i].head, 80171fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8018072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8019072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8020072b0518SStephen M. Cameron } 8021105a3dbcSRobert Elliott h->reply_queue_size = 0; 8022072b0518SStephen M. Cameron } 8023072b0518SStephen M. Cameron 80240097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 80250097f0f4SStephen M. Cameron { 8026105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8027105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8028105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8029105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 80302946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 80312946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 80322946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 80339ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 80349ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 80359ecd953aSRobert Elliott if (h->resubmit_wq) { 80369ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 80379ecd953aSRobert Elliott h->resubmit_wq = NULL; 80389ecd953aSRobert Elliott } 80399ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 80409ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 80419ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 80429ecd953aSRobert Elliott } 8043105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 804464670ac8SStephen M. Cameron } 804564670ac8SStephen M. Cameron 8046a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8047f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8048a0c12413SStephen M. Cameron { 8049281a7fd0SWebb Scales int i, refcount; 8050281a7fd0SWebb Scales struct CommandList *c; 805125163bd5SWebb Scales int failcount = 0; 8052a0c12413SStephen M. Cameron 8053080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8054f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8055f2405db8SDon Brace c = h->cmd_pool + i; 8056281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8057281a7fd0SWebb Scales if (refcount > 1) { 805825163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 80595a3d16f5SStephen M. Cameron finish_cmd(c); 8060433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 806125163bd5SWebb Scales failcount++; 8062a0c12413SStephen M. Cameron } 8063281a7fd0SWebb Scales cmd_free(h, c); 8064281a7fd0SWebb Scales } 806525163bd5SWebb Scales dev_warn(&h->pdev->dev, 806625163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8067a0c12413SStephen M. Cameron } 8068a0c12413SStephen M. Cameron 8069094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8070094963daSStephen M. Cameron { 8071c8ed0010SRusty Russell int cpu; 8072094963daSStephen M. Cameron 8073c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8074094963daSStephen M. Cameron u32 *lockup_detected; 8075094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8076094963daSStephen M. Cameron *lockup_detected = value; 8077094963daSStephen M. Cameron } 8078094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8079094963daSStephen M. Cameron } 8080094963daSStephen M. Cameron 8081a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8082a0c12413SStephen M. Cameron { 8083a0c12413SStephen M. Cameron unsigned long flags; 8084094963daSStephen M. Cameron u32 lockup_detected; 8085a0c12413SStephen M. Cameron 8086a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8087a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8088094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8089094963daSStephen M. Cameron if (!lockup_detected) { 8090094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8091094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 809225163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 809325163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8094094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8095094963daSStephen M. Cameron } 8096094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8097a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 809825163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 809925163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8100a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8101f2405db8SDon Brace fail_all_outstanding_cmds(h); 8102a0c12413SStephen M. Cameron } 8103a0c12413SStephen M. Cameron 810425163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8105a0c12413SStephen M. Cameron { 8106a0c12413SStephen M. Cameron u64 now; 8107a0c12413SStephen M. Cameron u32 heartbeat; 8108a0c12413SStephen M. Cameron unsigned long flags; 8109a0c12413SStephen M. Cameron 8110a0c12413SStephen M. Cameron now = get_jiffies_64(); 8111a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8112a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8113e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 811425163bd5SWebb Scales return false; 8115a0c12413SStephen M. Cameron 8116a0c12413SStephen M. Cameron /* 8117a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8118a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8119a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8120a0c12413SStephen M. Cameron */ 8121a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8122e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 812325163bd5SWebb Scales return false; 8124a0c12413SStephen M. Cameron 8125a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8126a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8127a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8128a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8129a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8130a0c12413SStephen M. Cameron controller_lockup_detected(h); 813125163bd5SWebb Scales return true; 8132a0c12413SStephen M. Cameron } 8133a0c12413SStephen M. Cameron 8134a0c12413SStephen M. Cameron /* We're ok. */ 8135a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8136a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 813725163bd5SWebb Scales return false; 8138a0c12413SStephen M. Cameron } 8139a0c12413SStephen M. Cameron 81409846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 814176438d08SStephen M. Cameron { 814276438d08SStephen M. Cameron int i; 814376438d08SStephen M. Cameron char *event_type; 814476438d08SStephen M. Cameron 8145e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8146e4aa3e6aSStephen Cameron return; 8147e4aa3e6aSStephen Cameron 814876438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 81491f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 81501f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 815176438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 815276438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 815376438d08SStephen M. Cameron 815476438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 815576438d08SStephen M. Cameron event_type = "state change"; 815676438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 815776438d08SStephen M. Cameron event_type = "configuration change"; 815876438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 815976438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 816076438d08SStephen M. Cameron for (i = 0; i < h->ndevices; i++) 816176438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 816223100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 816376438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 816476438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 816576438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 816676438d08SStephen M. Cameron h->events, event_type); 816776438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 816876438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 816976438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 817076438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 817176438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 817276438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 817376438d08SStephen M. Cameron } else { 817476438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 817576438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 817676438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 817776438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 817876438d08SStephen M. Cameron #if 0 817976438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 818076438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 818176438d08SStephen M. Cameron #endif 818276438d08SStephen M. Cameron } 81839846590eSStephen M. Cameron return; 818476438d08SStephen M. Cameron } 818576438d08SStephen M. Cameron 818676438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 818776438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8188e863d68eSScott Teel * we should rescan the controller for devices. 8189e863d68eSScott Teel * Also check flag for driver-initiated rescan. 819076438d08SStephen M. Cameron */ 81919846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 819276438d08SStephen M. Cameron { 8193853633e8SDon Brace if (h->drv_req_rescan) { 8194853633e8SDon Brace h->drv_req_rescan = 0; 8195853633e8SDon Brace return 1; 8196853633e8SDon Brace } 8197853633e8SDon Brace 819876438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 81999846590eSStephen M. Cameron return 0; 820076438d08SStephen M. Cameron 820176438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 82029846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 82039846590eSStephen M. Cameron } 820476438d08SStephen M. Cameron 820576438d08SStephen M. Cameron /* 82069846590eSStephen M. Cameron * Check if any of the offline devices have become ready 820776438d08SStephen M. Cameron */ 82089846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 82099846590eSStephen M. Cameron { 82109846590eSStephen M. Cameron unsigned long flags; 82119846590eSStephen M. Cameron struct offline_device_entry *d; 82129846590eSStephen M. Cameron struct list_head *this, *tmp; 82139846590eSStephen M. Cameron 82149846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 82159846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 82169846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 82179846590eSStephen M. Cameron offline_list); 82189846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8219d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8220d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8221d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8222d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 82239846590eSStephen M. Cameron return 1; 8224d1fea47cSStephen M. Cameron } 82259846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 822676438d08SStephen M. Cameron } 82279846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 82289846590eSStephen M. Cameron return 0; 82299846590eSStephen M. Cameron } 82309846590eSStephen M. Cameron 823134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 823234592254SScott Teel { 823334592254SScott Teel int rc = 1; /* assume there are changes */ 823434592254SScott Teel struct ReportLUNdata *logdev = NULL; 823534592254SScott Teel 823634592254SScott Teel /* if we can't find out if lun data has changed, 823734592254SScott Teel * assume that it has. 823834592254SScott Teel */ 823934592254SScott Teel 824034592254SScott Teel if (!h->lastlogicals) 824134592254SScott Teel goto out; 824234592254SScott Teel 824334592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 824434592254SScott Teel if (!logdev) { 824534592254SScott Teel dev_warn(&h->pdev->dev, 824634592254SScott Teel "Out of memory, can't track lun changes.\n"); 824734592254SScott Teel goto out; 824834592254SScott Teel } 824934592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 825034592254SScott Teel dev_warn(&h->pdev->dev, 825134592254SScott Teel "report luns failed, can't track lun changes.\n"); 825234592254SScott Teel goto out; 825334592254SScott Teel } 825434592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 825534592254SScott Teel dev_info(&h->pdev->dev, 825634592254SScott Teel "Lun changes detected.\n"); 825734592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 825834592254SScott Teel goto out; 825934592254SScott Teel } else 826034592254SScott Teel rc = 0; /* no changes detected. */ 826134592254SScott Teel out: 826234592254SScott Teel kfree(logdev); 826334592254SScott Teel return rc; 826434592254SScott Teel } 826534592254SScott Teel 82666636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8267a0c12413SStephen M. Cameron { 8268a0c12413SStephen M. Cameron unsigned long flags; 82698a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 82706636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 82716636e7f4SDon Brace 82726636e7f4SDon Brace 82736636e7f4SDon Brace if (h->remove_in_progress) 82748a98db73SStephen M. Cameron return; 82759846590eSStephen M. Cameron 82769846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 82779846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 82789846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 82799846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 82809846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 828134592254SScott Teel } else if (h->discovery_polling) { 8282c2adae44SScott Teel hpsa_disable_rld_caching(h); 828334592254SScott Teel if (hpsa_luns_changed(h)) { 828434592254SScott Teel struct Scsi_Host *sh = NULL; 828534592254SScott Teel 828634592254SScott Teel dev_info(&h->pdev->dev, 828734592254SScott Teel "driver discovery polling rescan.\n"); 828834592254SScott Teel sh = scsi_host_get(h->scsi_host); 828934592254SScott Teel if (sh != NULL) { 829034592254SScott Teel hpsa_scan_start(sh); 829134592254SScott Teel scsi_host_put(sh); 829234592254SScott Teel } 829334592254SScott Teel } 82949846590eSStephen M. Cameron } 82956636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 82966636e7f4SDon Brace if (!h->remove_in_progress) 82976636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 82986636e7f4SDon Brace h->heartbeat_sample_interval); 82996636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 83006636e7f4SDon Brace } 83016636e7f4SDon Brace 83026636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 83036636e7f4SDon Brace { 83046636e7f4SDon Brace unsigned long flags; 83056636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 83066636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 83076636e7f4SDon Brace 83086636e7f4SDon Brace detect_controller_lockup(h); 83096636e7f4SDon Brace if (lockup_detected(h)) 83106636e7f4SDon Brace return; 83119846590eSStephen M. Cameron 83128a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 83136636e7f4SDon Brace if (!h->remove_in_progress) 83148a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 83158a98db73SStephen M. Cameron h->heartbeat_sample_interval); 83168a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8317a0c12413SStephen M. Cameron } 8318a0c12413SStephen M. Cameron 83196636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 83206636e7f4SDon Brace char *name) 83216636e7f4SDon Brace { 83226636e7f4SDon Brace struct workqueue_struct *wq = NULL; 83236636e7f4SDon Brace 8324397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 83256636e7f4SDon Brace if (!wq) 83266636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 83276636e7f4SDon Brace 83286636e7f4SDon Brace return wq; 83296636e7f4SDon Brace } 83306636e7f4SDon Brace 83316f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 83324c2a8c40SStephen M. Cameron { 83334c2a8c40SStephen M. Cameron int dac, rc; 83344c2a8c40SStephen M. Cameron struct ctlr_info *h; 833564670ac8SStephen M. Cameron int try_soft_reset = 0; 833664670ac8SStephen M. Cameron unsigned long flags; 83376b6c1cd7STomas Henzl u32 board_id; 83384c2a8c40SStephen M. Cameron 83394c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 83404c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 83414c2a8c40SStephen M. Cameron 83426b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 83436b6c1cd7STomas Henzl if (rc < 0) { 83446b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 83456b6c1cd7STomas Henzl return rc; 83466b6c1cd7STomas Henzl } 83476b6c1cd7STomas Henzl 83486b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 834964670ac8SStephen M. Cameron if (rc) { 835064670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 83514c2a8c40SStephen M. Cameron return rc; 835264670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 835364670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 835464670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 835564670ac8SStephen M. Cameron * point that it can accept a command. 835664670ac8SStephen M. Cameron */ 835764670ac8SStephen M. Cameron try_soft_reset = 1; 835864670ac8SStephen M. Cameron rc = 0; 835964670ac8SStephen M. Cameron } 836064670ac8SStephen M. Cameron 836164670ac8SStephen M. Cameron reinit_after_soft_reset: 83624c2a8c40SStephen M. Cameron 8363303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8364303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8365303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8366303932fdSDon Brace */ 8367303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8368edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8369105a3dbcSRobert Elliott if (!h) { 8370105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8371ecd9aad4SStephen M. Cameron return -ENOMEM; 8372105a3dbcSRobert Elliott } 8373edd16368SStephen M. Cameron 837455c06c71SStephen M. Cameron h->pdev = pdev; 8375105a3dbcSRobert Elliott 8376a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 83779846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 83786eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 83799846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 83806eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 838134f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 83829b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8383094963daSStephen M. Cameron 8384094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8385094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 83862a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8387105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 83882a5ac326SStephen M. Cameron rc = -ENOMEM; 83892efa5929SRobert Elliott goto clean1; /* aer/h */ 83902a5ac326SStephen M. Cameron } 8391094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8392094963daSStephen M. Cameron 839355c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8394105a3dbcSRobert Elliott if (rc) 83952946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8396edd16368SStephen M. Cameron 83972946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 83982946e82bSRobert Elliott * interrupt_mode h->intr */ 83992946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 84002946e82bSRobert Elliott if (rc) 84012946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 84022946e82bSRobert Elliott 84032946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8404edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8405edd16368SStephen M. Cameron number_of_controllers++; 8406edd16368SStephen M. Cameron 8407edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8408ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8409ecd9aad4SStephen M. Cameron if (rc == 0) { 8410edd16368SStephen M. Cameron dac = 1; 8411ecd9aad4SStephen M. Cameron } else { 8412ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8413ecd9aad4SStephen M. Cameron if (rc == 0) { 8414edd16368SStephen M. Cameron dac = 0; 8415ecd9aad4SStephen M. Cameron } else { 8416edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 84172946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8418edd16368SStephen M. Cameron } 8419ecd9aad4SStephen M. Cameron } 8420edd16368SStephen M. Cameron 8421edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8422edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 842310f66018SStephen M. Cameron 8424105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8425105a3dbcSRobert Elliott if (rc) 84262946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8427d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 84288947fd10SRobert Elliott if (rc) 84292946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8430105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8431105a3dbcSRobert Elliott if (rc) 84322946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8433a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 84349b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8435d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8436d604f533SWebb Scales mutex_init(&h->reset_mutex); 8437a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8438edd16368SStephen M. Cameron 8439edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 84409a41338eSStephen M. Cameron h->ndevices = 0; 84412946e82bSRobert Elliott 84429a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8443105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8444105a3dbcSRobert Elliott if (rc) 84452946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 84462946e82bSRobert Elliott 84472946e82bSRobert Elliott /* hook into SCSI subsystem */ 84482946e82bSRobert Elliott rc = hpsa_scsi_add_host(h); 84492946e82bSRobert Elliott if (rc) 84502946e82bSRobert Elliott goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 84512efa5929SRobert Elliott 84522efa5929SRobert Elliott /* create the resubmit workqueue */ 84532efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 84542efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 84552efa5929SRobert Elliott rc = -ENOMEM; 84562efa5929SRobert Elliott goto clean7; 84572efa5929SRobert Elliott } 84582efa5929SRobert Elliott 84592efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 84602efa5929SRobert Elliott if (!h->resubmit_wq) { 84612efa5929SRobert Elliott rc = -ENOMEM; 84622efa5929SRobert Elliott goto clean7; /* aer/h */ 84632efa5929SRobert Elliott } 846464670ac8SStephen M. Cameron 8465105a3dbcSRobert Elliott /* 8466105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 846764670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 846864670ac8SStephen M. Cameron * the soft reset and see if that works. 846964670ac8SStephen M. Cameron */ 847064670ac8SStephen M. Cameron if (try_soft_reset) { 847164670ac8SStephen M. Cameron 847264670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 847364670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 847464670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 847564670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 847664670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 847764670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 847864670ac8SStephen M. Cameron */ 847964670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 848064670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 848164670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8482ec501a18SRobert Elliott hpsa_free_irqs(h); 84839ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 848464670ac8SStephen M. Cameron hpsa_intx_discard_completions); 848564670ac8SStephen M. Cameron if (rc) { 84869ee61794SRobert Elliott dev_warn(&h->pdev->dev, 84879ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8488d498757cSRobert Elliott /* 8489b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8490b2ef480cSRobert Elliott * again. Instead, do its work 8491b2ef480cSRobert Elliott */ 8492b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8493b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8494b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8495b2ef480cSRobert Elliott /* 8496b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8497b2ef480cSRobert Elliott * was just called before request_irqs failed 8498d498757cSRobert Elliott */ 8499d498757cSRobert Elliott goto clean3; 850064670ac8SStephen M. Cameron } 850164670ac8SStephen M. Cameron 850264670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 850364670ac8SStephen M. Cameron if (rc) 850464670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 85057ef7323fSDon Brace goto clean7; 850664670ac8SStephen M. Cameron 850764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 850864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 850964670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 851064670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 851164670ac8SStephen M. Cameron msleep(10000); 851264670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 851364670ac8SStephen M. Cameron 851464670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 851564670ac8SStephen M. Cameron if (rc) 851664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 851764670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 851864670ac8SStephen M. Cameron 851964670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 852064670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 852164670ac8SStephen M. Cameron * all over again. 852264670ac8SStephen M. Cameron */ 852364670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 852464670ac8SStephen M. Cameron try_soft_reset = 0; 852564670ac8SStephen M. Cameron if (rc) 8526b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 852764670ac8SStephen M. Cameron return -ENODEV; 852864670ac8SStephen M. Cameron 852964670ac8SStephen M. Cameron goto reinit_after_soft_reset; 853064670ac8SStephen M. Cameron } 8531edd16368SStephen M. Cameron 8532da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8533da0697bdSScott Teel h->acciopath_status = 1; 853434592254SScott Teel /* Disable discovery polling.*/ 853534592254SScott Teel h->discovery_polling = 0; 8536da0697bdSScott Teel 8537e863d68eSScott Teel 8538edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8539edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8540edd16368SStephen M. Cameron 8541339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 85428a98db73SStephen M. Cameron 854334592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 854434592254SScott Teel if (!h->lastlogicals) 854534592254SScott Teel dev_info(&h->pdev->dev, 854634592254SScott Teel "Can't track change to report lun data\n"); 854734592254SScott Teel 85488a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 85498a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 85508a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 85518a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 85528a98db73SStephen M. Cameron h->heartbeat_sample_interval); 85536636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 85546636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 85556636e7f4SDon Brace h->heartbeat_sample_interval); 855688bf6d62SStephen M. Cameron return 0; 8557edd16368SStephen M. Cameron 85582946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8559105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8560105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8561105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 856233a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 85632946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 85642e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 85652946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8566ec501a18SRobert Elliott hpsa_free_irqs(h); 85672946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 85682946e82bSRobert Elliott scsi_host_put(h->scsi_host); 85692946e82bSRobert Elliott h->scsi_host = NULL; 85702946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8571195f2c65SRobert Elliott hpsa_free_pci_init(h); 85722946e82bSRobert Elliott clean2: /* lu, aer/h */ 8573105a3dbcSRobert Elliott if (h->lockup_detected) { 8574094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8575105a3dbcSRobert Elliott h->lockup_detected = NULL; 8576105a3dbcSRobert Elliott } 8577105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8578105a3dbcSRobert Elliott if (h->resubmit_wq) { 8579105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8580105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8581105a3dbcSRobert Elliott } 8582105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8583105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8584105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8585105a3dbcSRobert Elliott } 8586edd16368SStephen M. Cameron kfree(h); 8587ecd9aad4SStephen M. Cameron return rc; 8588edd16368SStephen M. Cameron } 8589edd16368SStephen M. Cameron 8590edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8591edd16368SStephen M. Cameron { 8592edd16368SStephen M. Cameron char *flush_buf; 8593edd16368SStephen M. Cameron struct CommandList *c; 859425163bd5SWebb Scales int rc; 8595702890e3SStephen M. Cameron 8596094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8597702890e3SStephen M. Cameron return; 8598edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8599edd16368SStephen M. Cameron if (!flush_buf) 8600edd16368SStephen M. Cameron return; 8601edd16368SStephen M. Cameron 860245fcb86eSStephen Cameron c = cmd_alloc(h); 8603bf43caf3SRobert Elliott 8604a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8605a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8606a2dac136SStephen M. Cameron goto out; 8607a2dac136SStephen M. Cameron } 860825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 860925163bd5SWebb Scales PCI_DMA_TODEVICE, NO_TIMEOUT); 861025163bd5SWebb Scales if (rc) 861125163bd5SWebb Scales goto out; 8612edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8613a2dac136SStephen M. Cameron out: 8614edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8615edd16368SStephen M. Cameron "error flushing cache on controller\n"); 861645fcb86eSStephen Cameron cmd_free(h, c); 8617edd16368SStephen M. Cameron kfree(flush_buf); 8618edd16368SStephen M. Cameron } 8619edd16368SStephen M. Cameron 8620c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8621c2adae44SScott Teel * send down a report luns request 8622c2adae44SScott Teel */ 8623c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8624c2adae44SScott Teel { 8625c2adae44SScott Teel u32 *options; 8626c2adae44SScott Teel struct CommandList *c; 8627c2adae44SScott Teel int rc; 8628c2adae44SScott Teel 8629c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8630c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8631c2adae44SScott Teel return; 8632c2adae44SScott Teel 8633c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8634c2adae44SScott Teel if (!options) { 8635c2adae44SScott Teel dev_err(&h->pdev->dev, 8636c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8637c2adae44SScott Teel return; 8638c2adae44SScott Teel } 8639c2adae44SScott Teel 8640c2adae44SScott Teel c = cmd_alloc(h); 8641c2adae44SScott Teel 8642c2adae44SScott Teel /* first, get the current diag options settings */ 8643c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8644c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8645c2adae44SScott Teel goto errout; 8646c2adae44SScott Teel 8647c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8648c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8649c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8650c2adae44SScott Teel goto errout; 8651c2adae44SScott Teel 8652c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8653c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8654c2adae44SScott Teel 8655c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8656c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8657c2adae44SScott Teel goto errout; 8658c2adae44SScott Teel 8659c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8660c2adae44SScott Teel PCI_DMA_TODEVICE, NO_TIMEOUT); 8661c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8662c2adae44SScott Teel goto errout; 8663c2adae44SScott Teel 8664c2adae44SScott Teel /* Now verify that it got set: */ 8665c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8666c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8667c2adae44SScott Teel goto errout; 8668c2adae44SScott Teel 8669c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8670c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8671c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8672c2adae44SScott Teel goto errout; 8673c2adae44SScott Teel 8674c2adae44SScott Teel if (*options && HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8675c2adae44SScott Teel goto out; 8676c2adae44SScott Teel 8677c2adae44SScott Teel errout: 8678c2adae44SScott Teel dev_err(&h->pdev->dev, 8679c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8680c2adae44SScott Teel out: 8681c2adae44SScott Teel cmd_free(h, c); 8682c2adae44SScott Teel kfree(options); 8683c2adae44SScott Teel } 8684c2adae44SScott Teel 8685edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8686edd16368SStephen M. Cameron { 8687edd16368SStephen M. Cameron struct ctlr_info *h; 8688edd16368SStephen M. Cameron 8689edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8690edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8691edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8692edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8693edd16368SStephen M. Cameron */ 8694edd16368SStephen M. Cameron hpsa_flush_cache(h); 8695edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8696105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8697cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8698edd16368SStephen M. Cameron } 8699edd16368SStephen M. Cameron 87006f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 870155e14e76SStephen M. Cameron { 870255e14e76SStephen M. Cameron int i; 870355e14e76SStephen M. Cameron 8704105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 870555e14e76SStephen M. Cameron kfree(h->dev[i]); 8706105a3dbcSRobert Elliott h->dev[i] = NULL; 8707105a3dbcSRobert Elliott } 870855e14e76SStephen M. Cameron } 870955e14e76SStephen M. Cameron 87106f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8711edd16368SStephen M. Cameron { 8712edd16368SStephen M. Cameron struct ctlr_info *h; 87138a98db73SStephen M. Cameron unsigned long flags; 8714edd16368SStephen M. Cameron 8715edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8716edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8717edd16368SStephen M. Cameron return; 8718edd16368SStephen M. Cameron } 8719edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 87208a98db73SStephen M. Cameron 87218a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 87228a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 87238a98db73SStephen M. Cameron h->remove_in_progress = 1; 87248a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 87256636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 87266636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 87276636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 87286636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8729cc64c817SRobert Elliott 87302d041306SDon Brace /* 87312d041306SDon Brace * Call before disabling interrupts. 87322d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 87332d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 87342d041306SDon Brace * operations which cannot complete and will hang the system. 87352d041306SDon Brace */ 87362d041306SDon Brace if (h->scsi_host) 87372d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8738105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8739195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8740edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8741cc64c817SRobert Elliott 8742105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8743105a3dbcSRobert Elliott 87442946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 87452946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 87462946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8747105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8748105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 87491fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 875034592254SScott Teel kfree(h->lastlogicals); 8751105a3dbcSRobert Elliott 8752105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8753195f2c65SRobert Elliott 87542946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 87552946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 87562946e82bSRobert Elliott 8757195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 87582946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8759195f2c65SRobert Elliott 8760105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8761105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8762105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8763d04e62b9SKevin Barnett 8764d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 8765d04e62b9SKevin Barnett 8766105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8767edd16368SStephen M. Cameron } 8768edd16368SStephen M. Cameron 8769edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8770edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8771edd16368SStephen M. Cameron { 8772edd16368SStephen M. Cameron return -ENOSYS; 8773edd16368SStephen M. Cameron } 8774edd16368SStephen M. Cameron 8775edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8776edd16368SStephen M. Cameron { 8777edd16368SStephen M. Cameron return -ENOSYS; 8778edd16368SStephen M. Cameron } 8779edd16368SStephen M. Cameron 8780edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8781f79cfec6SStephen M. Cameron .name = HPSA, 8782edd16368SStephen M. Cameron .probe = hpsa_init_one, 87836f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8784edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8785edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8786edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8787edd16368SStephen M. Cameron .resume = hpsa_resume, 8788edd16368SStephen M. Cameron }; 8789edd16368SStephen M. Cameron 8790303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8791303932fdSDon Brace * scatter gather elements supported) and bucket[], 8792303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8793303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8794303932fdSDon Brace * byte increments) which the controller uses to fetch 8795303932fdSDon Brace * commands. This function fills in bucket_map[], which 8796303932fdSDon Brace * maps a given number of scatter gather elements to one of 8797303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8798303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8799303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8800303932fdSDon Brace * bits of the command address. 8801303932fdSDon Brace */ 8802303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 88032b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8804303932fdSDon Brace { 8805303932fdSDon Brace int i, j, b, size; 8806303932fdSDon Brace 8807303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8808303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8809303932fdSDon Brace /* Compute size of a command with i SG entries */ 8810e1f7de0cSMatt Gates size = i + min_blocks; 8811303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8812303932fdSDon Brace /* Find the bucket that is just big enough */ 8813e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8814303932fdSDon Brace if (bucket[j] >= size) { 8815303932fdSDon Brace b = j; 8816303932fdSDon Brace break; 8817303932fdSDon Brace } 8818303932fdSDon Brace } 8819303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8820303932fdSDon Brace bucket_map[i] = b; 8821303932fdSDon Brace } 8822303932fdSDon Brace } 8823303932fdSDon Brace 8824105a3dbcSRobert Elliott /* 8825105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8826105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8827105a3dbcSRobert Elliott */ 8828c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8829303932fdSDon Brace { 88306c311b57SStephen M. Cameron int i; 88316c311b57SStephen M. Cameron unsigned long register_value; 8832e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8833e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8834e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8835b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8836b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 8837e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 8838def342bdSStephen M. Cameron 8839def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 8840def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 8841def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 8842def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 8843def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 8844def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 8845def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 8846def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 8847def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 8848def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 8849d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8850def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 8851def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 8852def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 8853def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 8854def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 8855def342bdSStephen M. Cameron */ 8856d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8857b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 8858b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 8859b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8860b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 8861b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8862b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8863b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8864b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8865b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 8866b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8867d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8868303932fdSDon Brace /* 5 = 1 s/g entry or 4k 8869303932fdSDon Brace * 6 = 2 s/g entry or 8k 8870303932fdSDon Brace * 8 = 4 s/g entry or 16k 8871303932fdSDon Brace * 10 = 6 s/g entry or 24k 8872303932fdSDon Brace */ 8873303932fdSDon Brace 8874b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 8875b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 8876b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 8877b3a52e79SStephen M. Cameron */ 8878b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 8879b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 8880b3a52e79SStephen M. Cameron 8881303932fdSDon Brace /* Controller spec: zero out this buffer. */ 8882072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8883072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 8884303932fdSDon Brace 8885d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 8886d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 8887e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 8888303932fdSDon Brace for (i = 0; i < 8; i++) 8889303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 8890303932fdSDon Brace 8891303932fdSDon Brace /* size of controller ring buffer */ 8892303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 8893254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 8894303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 8895303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 8896254f796bSMatt Gates 8897254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8898254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 8899072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 8900254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 8901254f796bSMatt Gates } 8902254f796bSMatt Gates 8903b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8904e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 8905e1f7de0cSMatt Gates /* 8906e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 8907e1f7de0cSMatt Gates */ 8908e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 8909e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 8910e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8911e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8912c349775eSScott Teel } else { 8913c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 8914c349775eSScott Teel access = SA5_ioaccel_mode2_access; 8915c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8916c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8917c349775eSScott Teel } 8918e1f7de0cSMatt Gates } 8919303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8920c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 8921c706a795SRobert Elliott dev_err(&h->pdev->dev, 8922c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 8923c706a795SRobert Elliott return -ENODEV; 8924c706a795SRobert Elliott } 8925303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 8926303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 8927050f7147SStephen Cameron dev_err(&h->pdev->dev, 8928050f7147SStephen Cameron "performant mode problem - transport not active\n"); 8929c706a795SRobert Elliott return -ENODEV; 8930303932fdSDon Brace } 8931960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 8932e1f7de0cSMatt Gates h->access = access; 8933e1f7de0cSMatt Gates h->transMethod = transMethod; 8934e1f7de0cSMatt Gates 8935b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 8936b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 8937c706a795SRobert Elliott return 0; 8938e1f7de0cSMatt Gates 8939b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 8940e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 8941e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8942e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 8943e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 8944e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 8945e1f7de0cSMatt Gates } 8946283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 8947283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 8948e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 8949e1f7de0cSMatt Gates 8950e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 8951072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8952072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 8953072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 8954072b0518SStephen M. Cameron h->reply_queue_size); 8955e1f7de0cSMatt Gates 8956e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 8957e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 8958e1f7de0cSMatt Gates */ 8959e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 8960e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 8961e1f7de0cSMatt Gates 8962e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 8963e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 8964e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 8965e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 8966e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 89672b08b3e9SDon Brace cp->host_context_flags = 89682b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 8969e1f7de0cSMatt Gates cp->timeout_sec = 0; 8970e1f7de0cSMatt Gates cp->ReplyQueue = 0; 897150a0decfSStephen M. Cameron cp->tag = 8972f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 897350a0decfSStephen M. Cameron cp->host_addr = 897450a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 8975e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 8976e1f7de0cSMatt Gates } 8977b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 8978b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 8979b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 8980b9af4937SStephen M. Cameron int rc; 8981b9af4937SStephen M. Cameron 8982b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 8983b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 8984b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 8985b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 8986b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 8987b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 8988b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 8989b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 8990b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 8991b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 8992b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 8993b9af4937SStephen M. Cameron cfg_base_addr_index) + 8994b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 8995b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 8996b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 8997b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 8998b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 8999b9af4937SStephen M. Cameron } 9000b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9001c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9002c706a795SRobert Elliott dev_err(&h->pdev->dev, 9003c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9004c706a795SRobert Elliott return -ENODEV; 9005c706a795SRobert Elliott } 9006c706a795SRobert Elliott return 0; 9007e1f7de0cSMatt Gates } 9008e1f7de0cSMatt Gates 90091fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 90101fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 90111fb7c98aSRobert Elliott { 9012105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 90131fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 90141fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 90151fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 90161fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9017105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9018105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9019105a3dbcSRobert Elliott } 90201fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9021105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 90221fb7c98aSRobert Elliott } 90231fb7c98aSRobert Elliott 9024d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9025d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9026e1f7de0cSMatt Gates { 9027283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9028283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9029283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9030283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9031283b4a9bSStephen M. Cameron 9032e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9033e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9034e1f7de0cSMatt Gates * hardware. 9035e1f7de0cSMatt Gates */ 9036e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9037e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9038e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9039e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9040e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9041e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9042e1f7de0cSMatt Gates 9043e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9044283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9045e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9046e1f7de0cSMatt Gates 9047e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9048e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9049e1f7de0cSMatt Gates goto clean_up; 9050e1f7de0cSMatt Gates 9051e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9052e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9053e1f7de0cSMatt Gates return 0; 9054e1f7de0cSMatt Gates 9055e1f7de0cSMatt Gates clean_up: 90561fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 90572dd02d74SRobert Elliott return -ENOMEM; 90586c311b57SStephen M. Cameron } 90596c311b57SStephen M. Cameron 90601fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 90611fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 90621fb7c98aSRobert Elliott { 9063d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9064d9a729f3SWebb Scales 9065105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 90661fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 90671fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 90681fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 90691fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9070105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9071105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9072105a3dbcSRobert Elliott } 90731fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9074105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 90751fb7c98aSRobert Elliott } 90761fb7c98aSRobert Elliott 9077d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9078d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9079aca9012aSStephen M. Cameron { 9080d9a729f3SWebb Scales int rc; 9081d9a729f3SWebb Scales 9082aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9083aca9012aSStephen M. Cameron 9084aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9085aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9086aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9087aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9088aca9012aSStephen M. Cameron 9089aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9090aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9091aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9092aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9093aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9094aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9095aca9012aSStephen M. Cameron 9096aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9097aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9098aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9099aca9012aSStephen M. Cameron 9100aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9101d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9102d9a729f3SWebb Scales rc = -ENOMEM; 9103d9a729f3SWebb Scales goto clean_up; 9104d9a729f3SWebb Scales } 9105d9a729f3SWebb Scales 9106d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9107d9a729f3SWebb Scales if (rc) 9108aca9012aSStephen M. Cameron goto clean_up; 9109aca9012aSStephen M. Cameron 9110aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9111aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9112aca9012aSStephen M. Cameron return 0; 9113aca9012aSStephen M. Cameron 9114aca9012aSStephen M. Cameron clean_up: 91151fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9116d9a729f3SWebb Scales return rc; 9117aca9012aSStephen M. Cameron } 9118aca9012aSStephen M. Cameron 9119105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9120105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9121105a3dbcSRobert Elliott { 9122105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9123105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9124105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9125105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9126105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9127105a3dbcSRobert Elliott } 9128105a3dbcSRobert Elliott 9129105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9130105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9131105a3dbcSRobert Elliott */ 9132105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 91336c311b57SStephen M. Cameron { 91346c311b57SStephen M. Cameron u32 trans_support; 9135e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9136e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9137105a3dbcSRobert Elliott int i, rc; 91386c311b57SStephen M. Cameron 913902ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9140105a3dbcSRobert Elliott return 0; 914102ec19c8SStephen M. Cameron 914267c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 914367c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9144105a3dbcSRobert Elliott return 0; 914567c99a72Sscameron@beardog.cce.hp.com 9146e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9147e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9148e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9149e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9150105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9151105a3dbcSRobert Elliott if (rc) 9152105a3dbcSRobert Elliott return rc; 9153105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9154aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9155aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9156105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9157105a3dbcSRobert Elliott if (rc) 9158105a3dbcSRobert Elliott return rc; 9159e1f7de0cSMatt Gates } 9160e1f7de0cSMatt Gates 9161eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9162cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 91636c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9164072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 91656c311b57SStephen M. Cameron 9166254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9167072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9168072b0518SStephen M. Cameron h->reply_queue_size, 9169072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9170105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9171105a3dbcSRobert Elliott rc = -ENOMEM; 9172105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9173105a3dbcSRobert Elliott } 9174254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9175254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9176254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9177254f796bSMatt Gates } 9178254f796bSMatt Gates 91796c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9180d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 91816c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9182105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9183105a3dbcSRobert Elliott rc = -ENOMEM; 9184105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9185105a3dbcSRobert Elliott } 91866c311b57SStephen M. Cameron 9187105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9188105a3dbcSRobert Elliott if (rc) 9189105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9190105a3dbcSRobert Elliott return 0; 9191303932fdSDon Brace 9192105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9193303932fdSDon Brace kfree(h->blockFetchTable); 9194105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9195105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9196105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9197105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9198105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9199105a3dbcSRobert Elliott return rc; 9200303932fdSDon Brace } 9201303932fdSDon Brace 920223100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 920376438d08SStephen M. Cameron { 920423100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 920523100dd9SStephen M. Cameron } 920623100dd9SStephen M. Cameron 920723100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 920823100dd9SStephen M. Cameron { 920923100dd9SStephen M. Cameron struct CommandList *c = NULL; 9210f2405db8SDon Brace int i, accel_cmds_out; 9211281a7fd0SWebb Scales int refcount; 921276438d08SStephen M. Cameron 9213f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 921423100dd9SStephen M. Cameron accel_cmds_out = 0; 9215f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9216f2405db8SDon Brace c = h->cmd_pool + i; 9217281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9218281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 921923100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9220281a7fd0SWebb Scales cmd_free(h, c); 9221f2405db8SDon Brace } 922223100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 922376438d08SStephen M. Cameron break; 922476438d08SStephen M. Cameron msleep(100); 922576438d08SStephen M. Cameron } while (1); 922676438d08SStephen M. Cameron } 922776438d08SStephen M. Cameron 9228d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9229d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9230d04e62b9SKevin Barnett { 9231d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9232d04e62b9SKevin Barnett struct sas_phy *phy; 9233d04e62b9SKevin Barnett 9234d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9235d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9236d04e62b9SKevin Barnett return NULL; 9237d04e62b9SKevin Barnett 9238d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9239d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9240d04e62b9SKevin Barnett if (!phy) { 9241d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9242d04e62b9SKevin Barnett return NULL; 9243d04e62b9SKevin Barnett } 9244d04e62b9SKevin Barnett 9245d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9246d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9247d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9248d04e62b9SKevin Barnett 9249d04e62b9SKevin Barnett return hpsa_sas_phy; 9250d04e62b9SKevin Barnett } 9251d04e62b9SKevin Barnett 9252d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9253d04e62b9SKevin Barnett { 9254d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9255d04e62b9SKevin Barnett 9256d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9257d04e62b9SKevin Barnett sas_phy_free(phy); 9258d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9259d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9260d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9261d04e62b9SKevin Barnett } 9262d04e62b9SKevin Barnett 9263d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9264d04e62b9SKevin Barnett { 9265d04e62b9SKevin Barnett int rc; 9266d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9267d04e62b9SKevin Barnett struct sas_phy *phy; 9268d04e62b9SKevin Barnett struct sas_identify *identify; 9269d04e62b9SKevin Barnett 9270d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9271d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9272d04e62b9SKevin Barnett 9273d04e62b9SKevin Barnett identify = &phy->identify; 9274d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9275d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9276d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9277d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9278d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9279d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9280d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9281d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9282d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9283d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9284d04e62b9SKevin Barnett 9285d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9286d04e62b9SKevin Barnett if (rc) 9287d04e62b9SKevin Barnett return rc; 9288d04e62b9SKevin Barnett 9289d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9290d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9291d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9292d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9293d04e62b9SKevin Barnett 9294d04e62b9SKevin Barnett return 0; 9295d04e62b9SKevin Barnett } 9296d04e62b9SKevin Barnett 9297d04e62b9SKevin Barnett static int 9298d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9299d04e62b9SKevin Barnett struct sas_rphy *rphy) 9300d04e62b9SKevin Barnett { 9301d04e62b9SKevin Barnett struct sas_identify *identify; 9302d04e62b9SKevin Barnett 9303d04e62b9SKevin Barnett identify = &rphy->identify; 9304d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9305d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9306d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9307d04e62b9SKevin Barnett 9308d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9309d04e62b9SKevin Barnett } 9310d04e62b9SKevin Barnett 9311d04e62b9SKevin Barnett static struct hpsa_sas_port 9312d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9313d04e62b9SKevin Barnett u64 sas_address) 9314d04e62b9SKevin Barnett { 9315d04e62b9SKevin Barnett int rc; 9316d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9317d04e62b9SKevin Barnett struct sas_port *port; 9318d04e62b9SKevin Barnett 9319d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9320d04e62b9SKevin Barnett if (!hpsa_sas_port) 9321d04e62b9SKevin Barnett return NULL; 9322d04e62b9SKevin Barnett 9323d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9324d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9325d04e62b9SKevin Barnett 9326d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9327d04e62b9SKevin Barnett if (!port) 9328d04e62b9SKevin Barnett goto free_hpsa_port; 9329d04e62b9SKevin Barnett 9330d04e62b9SKevin Barnett rc = sas_port_add(port); 9331d04e62b9SKevin Barnett if (rc) 9332d04e62b9SKevin Barnett goto free_sas_port; 9333d04e62b9SKevin Barnett 9334d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9335d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9336d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9337d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9338d04e62b9SKevin Barnett 9339d04e62b9SKevin Barnett return hpsa_sas_port; 9340d04e62b9SKevin Barnett 9341d04e62b9SKevin Barnett free_sas_port: 9342d04e62b9SKevin Barnett sas_port_free(port); 9343d04e62b9SKevin Barnett free_hpsa_port: 9344d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9345d04e62b9SKevin Barnett 9346d04e62b9SKevin Barnett return NULL; 9347d04e62b9SKevin Barnett } 9348d04e62b9SKevin Barnett 9349d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9350d04e62b9SKevin Barnett { 9351d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9352d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9353d04e62b9SKevin Barnett 9354d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9355d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9356d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9357d04e62b9SKevin Barnett 9358d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9359d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9360d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9361d04e62b9SKevin Barnett } 9362d04e62b9SKevin Barnett 9363d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9364d04e62b9SKevin Barnett { 9365d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9366d04e62b9SKevin Barnett 9367d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9368d04e62b9SKevin Barnett if (hpsa_sas_node) { 9369d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9370d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9371d04e62b9SKevin Barnett } 9372d04e62b9SKevin Barnett 9373d04e62b9SKevin Barnett return hpsa_sas_node; 9374d04e62b9SKevin Barnett } 9375d04e62b9SKevin Barnett 9376d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9377d04e62b9SKevin Barnett { 9378d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9379d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9380d04e62b9SKevin Barnett 9381d04e62b9SKevin Barnett if (!hpsa_sas_node) 9382d04e62b9SKevin Barnett return; 9383d04e62b9SKevin Barnett 9384d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9385d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9386d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9387d04e62b9SKevin Barnett 9388d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9389d04e62b9SKevin Barnett } 9390d04e62b9SKevin Barnett 9391d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9392d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9393d04e62b9SKevin Barnett struct sas_rphy *rphy) 9394d04e62b9SKevin Barnett { 9395d04e62b9SKevin Barnett int i; 9396d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9397d04e62b9SKevin Barnett 9398d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9399d04e62b9SKevin Barnett device = h->dev[i]; 9400d04e62b9SKevin Barnett if (!device->sas_port) 9401d04e62b9SKevin Barnett continue; 9402d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9403d04e62b9SKevin Barnett return device; 9404d04e62b9SKevin Barnett } 9405d04e62b9SKevin Barnett 9406d04e62b9SKevin Barnett return NULL; 9407d04e62b9SKevin Barnett } 9408d04e62b9SKevin Barnett 9409d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9410d04e62b9SKevin Barnett { 9411d04e62b9SKevin Barnett int rc; 9412d04e62b9SKevin Barnett struct device *parent_dev; 9413d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9414d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9415d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9416d04e62b9SKevin Barnett 9417d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9418d04e62b9SKevin Barnett 9419d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9420d04e62b9SKevin Barnett if (!hpsa_sas_node) 9421d04e62b9SKevin Barnett return -ENOMEM; 9422d04e62b9SKevin Barnett 9423d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9424d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9425d04e62b9SKevin Barnett rc = -ENODEV; 9426d04e62b9SKevin Barnett goto free_sas_node; 9427d04e62b9SKevin Barnett } 9428d04e62b9SKevin Barnett 9429d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9430d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9431d04e62b9SKevin Barnett rc = -ENODEV; 9432d04e62b9SKevin Barnett goto free_sas_port; 9433d04e62b9SKevin Barnett } 9434d04e62b9SKevin Barnett 9435d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9436d04e62b9SKevin Barnett if (rc) 9437d04e62b9SKevin Barnett goto free_sas_phy; 9438d04e62b9SKevin Barnett 9439d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9440d04e62b9SKevin Barnett 9441d04e62b9SKevin Barnett return 0; 9442d04e62b9SKevin Barnett 9443d04e62b9SKevin Barnett free_sas_phy: 9444d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9445d04e62b9SKevin Barnett free_sas_port: 9446d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9447d04e62b9SKevin Barnett free_sas_node: 9448d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9449d04e62b9SKevin Barnett 9450d04e62b9SKevin Barnett return rc; 9451d04e62b9SKevin Barnett } 9452d04e62b9SKevin Barnett 9453d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9454d04e62b9SKevin Barnett { 9455d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9456d04e62b9SKevin Barnett } 9457d04e62b9SKevin Barnett 9458d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9459d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9460d04e62b9SKevin Barnett { 9461d04e62b9SKevin Barnett int rc; 9462d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9463d04e62b9SKevin Barnett struct sas_rphy *rphy; 9464d04e62b9SKevin Barnett 9465d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9466d04e62b9SKevin Barnett if (!hpsa_sas_port) 9467d04e62b9SKevin Barnett return -ENOMEM; 9468d04e62b9SKevin Barnett 9469d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9470d04e62b9SKevin Barnett if (!rphy) { 9471d04e62b9SKevin Barnett rc = -ENODEV; 9472d04e62b9SKevin Barnett goto free_sas_port; 9473d04e62b9SKevin Barnett } 9474d04e62b9SKevin Barnett 9475d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9476d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9477d04e62b9SKevin Barnett 9478d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9479d04e62b9SKevin Barnett if (rc) 9480d04e62b9SKevin Barnett goto free_sas_port; 9481d04e62b9SKevin Barnett 9482d04e62b9SKevin Barnett return 0; 9483d04e62b9SKevin Barnett 9484d04e62b9SKevin Barnett free_sas_port: 9485d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9486d04e62b9SKevin Barnett device->sas_port = NULL; 9487d04e62b9SKevin Barnett 9488d04e62b9SKevin Barnett return rc; 9489d04e62b9SKevin Barnett } 9490d04e62b9SKevin Barnett 9491d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9492d04e62b9SKevin Barnett { 9493d04e62b9SKevin Barnett if (device->sas_port) { 9494d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9495d04e62b9SKevin Barnett device->sas_port = NULL; 9496d04e62b9SKevin Barnett } 9497d04e62b9SKevin Barnett } 9498d04e62b9SKevin Barnett 9499d04e62b9SKevin Barnett static int 9500d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9501d04e62b9SKevin Barnett { 9502d04e62b9SKevin Barnett return 0; 9503d04e62b9SKevin Barnett } 9504d04e62b9SKevin Barnett 9505d04e62b9SKevin Barnett static int 9506d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9507d04e62b9SKevin Barnett { 9508d04e62b9SKevin Barnett return 0; 9509d04e62b9SKevin Barnett } 9510d04e62b9SKevin Barnett 9511d04e62b9SKevin Barnett static int 9512d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9513d04e62b9SKevin Barnett { 9514d04e62b9SKevin Barnett return -ENXIO; 9515d04e62b9SKevin Barnett } 9516d04e62b9SKevin Barnett 9517d04e62b9SKevin Barnett static int 9518d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9519d04e62b9SKevin Barnett { 9520d04e62b9SKevin Barnett return 0; 9521d04e62b9SKevin Barnett } 9522d04e62b9SKevin Barnett 9523d04e62b9SKevin Barnett static int 9524d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9525d04e62b9SKevin Barnett { 9526d04e62b9SKevin Barnett return 0; 9527d04e62b9SKevin Barnett } 9528d04e62b9SKevin Barnett 9529d04e62b9SKevin Barnett static int 9530d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9531d04e62b9SKevin Barnett { 9532d04e62b9SKevin Barnett return 0; 9533d04e62b9SKevin Barnett } 9534d04e62b9SKevin Barnett 9535d04e62b9SKevin Barnett static void 9536d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9537d04e62b9SKevin Barnett { 9538d04e62b9SKevin Barnett } 9539d04e62b9SKevin Barnett 9540d04e62b9SKevin Barnett static int 9541d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9542d04e62b9SKevin Barnett { 9543d04e62b9SKevin Barnett return -EINVAL; 9544d04e62b9SKevin Barnett } 9545d04e62b9SKevin Barnett 9546d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9547d04e62b9SKevin Barnett static int 9548d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9549d04e62b9SKevin Barnett struct request *req) 9550d04e62b9SKevin Barnett { 9551d04e62b9SKevin Barnett return -EINVAL; 9552d04e62b9SKevin Barnett } 9553d04e62b9SKevin Barnett 9554d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9555d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9556d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9557d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9558d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9559d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9560d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9561d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9562d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9563d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9564d04e62b9SKevin Barnett }; 9565d04e62b9SKevin Barnett 9566edd16368SStephen M. Cameron /* 9567edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9568edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9569edd16368SStephen M. Cameron */ 9570edd16368SStephen M. Cameron static int __init hpsa_init(void) 9571edd16368SStephen M. Cameron { 9572d04e62b9SKevin Barnett int rc; 9573d04e62b9SKevin Barnett 9574d04e62b9SKevin Barnett hpsa_sas_transport_template = 9575d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9576d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9577d04e62b9SKevin Barnett return -ENODEV; 9578d04e62b9SKevin Barnett 9579d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9580d04e62b9SKevin Barnett 9581d04e62b9SKevin Barnett if (rc) 9582d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9583d04e62b9SKevin Barnett 9584d04e62b9SKevin Barnett return rc; 9585edd16368SStephen M. Cameron } 9586edd16368SStephen M. Cameron 9587edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9588edd16368SStephen M. Cameron { 9589edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9590d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9591edd16368SStephen M. Cameron } 9592edd16368SStephen M. Cameron 9593e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9594e1f7de0cSMatt Gates { 9595e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9596dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9597dd0e19f3SScott Teel 9598dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9599dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9600dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9601dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9602dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9603dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9604dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9605dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9606dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9607dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9608dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9609dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9610dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9611dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9612dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9613dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9614dd0e19f3SScott Teel 9615dd0e19f3SScott Teel #undef VERIFY_OFFSET 9616dd0e19f3SScott Teel 9617dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9618b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9619b66cc250SMike Miller 9620b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9621b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9622b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9623b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9624b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9625b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9626b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9627b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9628b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9629b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9630b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9631b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9632b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9633b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9634b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9635b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9636b66cc250SMike Miller 9637b66cc250SMike Miller #undef VERIFY_OFFSET 9638b66cc250SMike Miller 9639b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9640e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9641e1f7de0cSMatt Gates 9642e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9643e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9644e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9645e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9646e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9647e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9648e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9649e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9650e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9651e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9652e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9653e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9654e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9655e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9656e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9657e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9658e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9659e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9660e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9661e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9662e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9663e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 966450a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9665e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9666e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9667e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9668e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9669e1f7de0cSMatt Gates } 9670e1f7de0cSMatt Gates 9671edd16368SStephen M. Cameron module_init(hpsa_init); 9672edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9673