1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 31358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 41358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 5edd16368SStephen M. Cameron * 6edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 7edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 8edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 9edd16368SStephen M. Cameron * 10edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 11edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 12edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 14edd16368SStephen M. Cameron * 151358f6dcSDon Brace * Questions/Comments/Bugfixes to storagedev@pmcs.com 16edd16368SStephen M. Cameron * 17edd16368SStephen M. Cameron */ 18edd16368SStephen M. Cameron 19edd16368SStephen M. Cameron #include <linux/module.h> 20edd16368SStephen M. Cameron #include <linux/interrupt.h> 21edd16368SStephen M. Cameron #include <linux/types.h> 22edd16368SStephen M. Cameron #include <linux/pci.h> 23e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 24edd16368SStephen M. Cameron #include <linux/kernel.h> 25edd16368SStephen M. Cameron #include <linux/slab.h> 26edd16368SStephen M. Cameron #include <linux/delay.h> 27edd16368SStephen M. Cameron #include <linux/fs.h> 28edd16368SStephen M. Cameron #include <linux/timer.h> 29edd16368SStephen M. Cameron #include <linux/init.h> 30edd16368SStephen M. Cameron #include <linux/spinlock.h> 31edd16368SStephen M. Cameron #include <linux/compat.h> 32edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 33edd16368SStephen M. Cameron #include <linux/uaccess.h> 34edd16368SStephen M. Cameron #include <linux/io.h> 35edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 36edd16368SStephen M. Cameron #include <linux/completion.h> 37edd16368SStephen M. Cameron #include <linux/moduleparam.h> 38edd16368SStephen M. Cameron #include <scsi/scsi.h> 39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 439437ac43SStephen Cameron #include <scsi/scsi_eh.h> 4473153fe5SWebb Scales #include <scsi/scsi_dbg.h> 45edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 46edd16368SStephen M. Cameron #include <linux/string.h> 47edd16368SStephen M. Cameron #include <linux/bitmap.h> 4860063497SArun Sharma #include <linux/atomic.h> 49a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5042a91641SDon Brace #include <linux/percpu-defs.h> 51094963daSStephen M. Cameron #include <linux/percpu.h> 522b08b3e9SDon Brace #include <asm/unaligned.h> 53283b4a9bSStephen M. Cameron #include <asm/div64.h> 54edd16368SStephen M. Cameron #include "hpsa_cmd.h" 55edd16368SStephen M. Cameron #include "hpsa.h" 56edd16368SStephen M. Cameron 57edd16368SStephen M. Cameron /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 58f532a3f9SDon Brace #define HPSA_DRIVER_VERSION "3.4.10-0" 59edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 60f79cfec6SStephen M. Cameron #define HPSA "hpsa" 61edd16368SStephen M. Cameron 62007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 63007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 64007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 65007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 66007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 67edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 68edd16368SStephen M. Cameron 69edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 70edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 71edd16368SStephen M. Cameron 72edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 73edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 74edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 75edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 76edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 77edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 78edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 79edd16368SStephen M. Cameron 80edd16368SStephen M. Cameron static int hpsa_allow_any; 81edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 82edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 83edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8402ec19c8SStephen M. Cameron static int hpsa_simple_mode; 8502ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 8602ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 8702ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 88edd16368SStephen M. Cameron 89edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 90edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 91edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 92edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 93edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 94edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 95edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 96163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 97163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 98f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 999143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1009143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1019143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1029143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1039143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 106fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 107fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 108fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 109fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 110fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 11597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 11697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1223b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1263b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1283b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1293b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1303b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 131fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 132cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 133cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 134cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 135cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 136cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1378e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1388e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1398e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1408e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1418e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 142edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 143edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 144edd16368SStephen M. Cameron {0,} 145edd16368SStephen M. Cameron }; 146edd16368SStephen M. Cameron 147edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 148edd16368SStephen M. Cameron 149edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 150edd16368SStephen M. Cameron * product = Marketing Name for the board 151edd16368SStephen M. Cameron * access = Address of the struct of function pointers 152edd16368SStephen M. Cameron */ 153edd16368SStephen M. Cameron static struct board_type products[] = { 154edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 155edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 156edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 157edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 158edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 159163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 160163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1617d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 162fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 163fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 164fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 165fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 166fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 167fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 168fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1691fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1701fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1711fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1721fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1731fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 17627fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 17727fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 17827fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 17927fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 180c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18127fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18227fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18397b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18427fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 18527fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 18627fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 18727fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 18897b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19027fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1913b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1923b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19327fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 194fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 195cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 196cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 197cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 198cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 199cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2008e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2018e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2028e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2038e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2048e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 205edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 206edd16368SStephen M. Cameron }; 207edd16368SStephen M. Cameron 208a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 209a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 210a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 211a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 212edd16368SStephen M. Cameron static int number_of_controllers; 213edd16368SStephen M. Cameron 21410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 21510f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 21642a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 217edd16368SStephen M. Cameron 218edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 21942a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 22042a91641SDon Brace void __user *arg); 221edd16368SStephen M. Cameron #endif 222edd16368SStephen M. Cameron 223edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 224edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 22573153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 22673153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 22773153fe5SWebb Scales struct scsi_cmnd *scmd); 228a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 229b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 230edd16368SStephen M. Cameron int cmd_type); 2312c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 232b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 233b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 234edd16368SStephen M. Cameron 235f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 236a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 237a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 238a08a8471SStephen M. Cameron unsigned long elapsed_time); 2397c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 240edd16368SStephen M. Cameron 241edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 24275167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 243edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 24441ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 245edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 246edd16368SStephen M. Cameron 2478aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 248edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 249edd16368SStephen M. Cameron struct CommandList *c); 250edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 251edd16368SStephen M. Cameron struct CommandList *c); 252303932fdSDon Brace /* performant mode helper functions */ 253303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2542b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 255105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 256105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 257254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2586f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2596f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2601df8552aSStephen M. Cameron u64 *cfg_offset); 2616f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2621df8552aSStephen M. Cameron unsigned long *memory_bar); 2636f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2646f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2656f039790SGreg Kroah-Hartman int wait_for_ready); 26675167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 267c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 268fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 269fe5389c8SStephen M. Cameron #define BOARD_READY 1 27023100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 27176438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 272c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 273c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 27403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 275080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 27625163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 27725163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 278c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 27934592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 280edd16368SStephen M. Cameron 281edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 282edd16368SStephen M. Cameron { 283edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 284edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 285edd16368SStephen M. Cameron } 286edd16368SStephen M. Cameron 287a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 288a23513e8SStephen M. Cameron { 289a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 290a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 291a23513e8SStephen M. Cameron } 292a23513e8SStephen M. Cameron 293a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 294a58e7e53SWebb Scales { 295a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 296a58e7e53SWebb Scales } 297a58e7e53SWebb Scales 298d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 299d604f533SWebb Scales { 300d604f533SWebb Scales return c->abort_pending || c->reset_pending; 301d604f533SWebb Scales } 302d604f533SWebb Scales 3039437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3049437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3059437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3069437ac43SStephen Cameron { 3079437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3089437ac43SStephen Cameron bool rc; 3099437ac43SStephen Cameron 3109437ac43SStephen Cameron *sense_key = -1; 3119437ac43SStephen Cameron *asc = -1; 3129437ac43SStephen Cameron *ascq = -1; 3139437ac43SStephen Cameron 3149437ac43SStephen Cameron if (sense_data_len < 1) 3159437ac43SStephen Cameron return; 3169437ac43SStephen Cameron 3179437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3189437ac43SStephen Cameron if (rc) { 3199437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3209437ac43SStephen Cameron *asc = sshdr.asc; 3219437ac43SStephen Cameron *ascq = sshdr.ascq; 3229437ac43SStephen Cameron } 3239437ac43SStephen Cameron } 3249437ac43SStephen Cameron 325edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 326edd16368SStephen M. Cameron struct CommandList *c) 327edd16368SStephen M. Cameron { 3289437ac43SStephen Cameron u8 sense_key, asc, ascq; 3299437ac43SStephen Cameron int sense_len; 3309437ac43SStephen Cameron 3319437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3329437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3339437ac43SStephen Cameron else 3349437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3359437ac43SStephen Cameron 3369437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3379437ac43SStephen Cameron &sense_key, &asc, &ascq); 33881c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 339edd16368SStephen M. Cameron return 0; 340edd16368SStephen M. Cameron 3419437ac43SStephen Cameron switch (asc) { 342edd16368SStephen M. Cameron case STATE_CHANGED: 3439437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3442946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3452946e82bSRobert Elliott h->devname); 346edd16368SStephen M. Cameron break; 347edd16368SStephen M. Cameron case LUN_FAILED: 3487f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3492946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 350edd16368SStephen M. Cameron break; 351edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3527f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3532946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 354edd16368SStephen M. Cameron /* 3554f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3564f4eb9f1SScott Teel * target (array) devices. 357edd16368SStephen M. Cameron */ 358edd16368SStephen M. Cameron break; 359edd16368SStephen M. Cameron case POWER_OR_RESET: 3602946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3612946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3622946e82bSRobert Elliott h->devname); 363edd16368SStephen M. Cameron break; 364edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3652946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3662946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3672946e82bSRobert Elliott h->devname); 368edd16368SStephen M. Cameron break; 369edd16368SStephen M. Cameron default: 3702946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3712946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3722946e82bSRobert Elliott h->devname); 373edd16368SStephen M. Cameron break; 374edd16368SStephen M. Cameron } 375edd16368SStephen M. Cameron return 1; 376edd16368SStephen M. Cameron } 377edd16368SStephen M. Cameron 378852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 379852af20aSMatt Bondurant { 380852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 381852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 382852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 383852af20aSMatt Bondurant return 0; 384852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 385852af20aSMatt Bondurant return 1; 386852af20aSMatt Bondurant } 387852af20aSMatt Bondurant 388e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 389e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 390e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 391e985c58fSStephen Cameron { 392e985c58fSStephen Cameron int ld; 393e985c58fSStephen Cameron struct ctlr_info *h; 394e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 395e985c58fSStephen Cameron 396e985c58fSStephen Cameron h = shost_to_hba(shost); 397e985c58fSStephen Cameron ld = lockup_detected(h); 398e985c58fSStephen Cameron 399e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 400e985c58fSStephen Cameron } 401e985c58fSStephen Cameron 402da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 403da0697bdSScott Teel struct device_attribute *attr, 404da0697bdSScott Teel const char *buf, size_t count) 405da0697bdSScott Teel { 406da0697bdSScott Teel int status, len; 407da0697bdSScott Teel struct ctlr_info *h; 408da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 409da0697bdSScott Teel char tmpbuf[10]; 410da0697bdSScott Teel 411da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 412da0697bdSScott Teel return -EACCES; 413da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 414da0697bdSScott Teel strncpy(tmpbuf, buf, len); 415da0697bdSScott Teel tmpbuf[len] = '\0'; 416da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 417da0697bdSScott Teel return -EINVAL; 418da0697bdSScott Teel h = shost_to_hba(shost); 419da0697bdSScott Teel h->acciopath_status = !!status; 420da0697bdSScott Teel dev_warn(&h->pdev->dev, 421da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 422da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 423da0697bdSScott Teel return count; 424da0697bdSScott Teel } 425da0697bdSScott Teel 4262ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4272ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4282ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4292ba8bfc8SStephen M. Cameron { 4302ba8bfc8SStephen M. Cameron int debug_level, len; 4312ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4322ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4332ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4342ba8bfc8SStephen M. Cameron 4352ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4362ba8bfc8SStephen M. Cameron return -EACCES; 4372ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4382ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4392ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4402ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4412ba8bfc8SStephen M. Cameron return -EINVAL; 4422ba8bfc8SStephen M. Cameron if (debug_level < 0) 4432ba8bfc8SStephen M. Cameron debug_level = 0; 4442ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4452ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4462ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4472ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4482ba8bfc8SStephen M. Cameron return count; 4492ba8bfc8SStephen M. Cameron } 4502ba8bfc8SStephen M. Cameron 451edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 452edd16368SStephen M. Cameron struct device_attribute *attr, 453edd16368SStephen M. Cameron const char *buf, size_t count) 454edd16368SStephen M. Cameron { 455edd16368SStephen M. Cameron struct ctlr_info *h; 456edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 457a23513e8SStephen M. Cameron h = shost_to_hba(shost); 45831468401SMike Miller hpsa_scan_start(h->scsi_host); 459edd16368SStephen M. Cameron return count; 460edd16368SStephen M. Cameron } 461edd16368SStephen M. Cameron 462d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 463d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 464d28ce020SStephen M. Cameron { 465d28ce020SStephen M. Cameron struct ctlr_info *h; 466d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 467d28ce020SStephen M. Cameron unsigned char *fwrev; 468d28ce020SStephen M. Cameron 469d28ce020SStephen M. Cameron h = shost_to_hba(shost); 470d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 471d28ce020SStephen M. Cameron return 0; 472d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 473d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 474d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 475d28ce020SStephen M. Cameron } 476d28ce020SStephen M. Cameron 47794a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 47894a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 47994a13649SStephen M. Cameron { 48094a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 48194a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 48294a13649SStephen M. Cameron 4830cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 4840cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 48594a13649SStephen M. Cameron } 48694a13649SStephen M. Cameron 487745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 488745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 489745a7a25SStephen M. Cameron { 490745a7a25SStephen M. Cameron struct ctlr_info *h; 491745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 492745a7a25SStephen M. Cameron 493745a7a25SStephen M. Cameron h = shost_to_hba(shost); 494745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 495960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 496745a7a25SStephen M. Cameron "performant" : "simple"); 497745a7a25SStephen M. Cameron } 498745a7a25SStephen M. Cameron 499da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 500da0697bdSScott Teel struct device_attribute *attr, char *buf) 501da0697bdSScott Teel { 502da0697bdSScott Teel struct ctlr_info *h; 503da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 504da0697bdSScott Teel 505da0697bdSScott Teel h = shost_to_hba(shost); 506da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 507da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 508da0697bdSScott Teel } 509da0697bdSScott Teel 51046380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 511941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 512941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 513941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 514941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 515941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 516941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 517941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 518941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 519941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 520941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 521941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 522941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 523941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5247af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 525941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 526941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5275a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5285a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5295a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5305a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5315a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5325a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 533941b1cdaSStephen M. Cameron }; 534941b1cdaSStephen M. Cameron 53546380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 53646380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5377af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5385a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5395a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5405a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5415a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5425a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5435a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 54446380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 54546380786SStephen M. Cameron * which share a battery backed cache module. One controls the 54646380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 54746380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 54846380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 54946380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 55046380786SStephen M. Cameron */ 55146380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 55246380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 55346380786SStephen M. Cameron }; 55446380786SStephen M. Cameron 5559b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5569b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5579b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5589b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5599b5c48c2SStephen Cameron }; 5609b5c48c2SStephen Cameron 5619b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 562941b1cdaSStephen M. Cameron { 563941b1cdaSStephen M. Cameron int i; 564941b1cdaSStephen M. Cameron 5659b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5669b5c48c2SStephen Cameron if (a[i] == board_id) 567941b1cdaSStephen M. Cameron return 1; 5689b5c48c2SStephen Cameron return 0; 5699b5c48c2SStephen Cameron } 5709b5c48c2SStephen Cameron 5719b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5729b5c48c2SStephen Cameron { 5739b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5749b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 575941b1cdaSStephen M. Cameron } 576941b1cdaSStephen M. Cameron 57746380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 57846380786SStephen M. Cameron { 5799b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 5809b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 58146380786SStephen M. Cameron } 58246380786SStephen M. Cameron 58346380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 58446380786SStephen M. Cameron { 58546380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 58646380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 58746380786SStephen M. Cameron } 58846380786SStephen M. Cameron 5899b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 5909b5c48c2SStephen Cameron { 5919b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 5929b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 5939b5c48c2SStephen Cameron } 5949b5c48c2SStephen Cameron 595941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 596941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 597941b1cdaSStephen M. Cameron { 598941b1cdaSStephen M. Cameron struct ctlr_info *h; 599941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 600941b1cdaSStephen M. Cameron 601941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 60246380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 603941b1cdaSStephen M. Cameron } 604941b1cdaSStephen M. Cameron 605edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 606edd16368SStephen M. Cameron { 607edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 608edd16368SStephen M. Cameron } 609edd16368SStephen M. Cameron 610f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6117c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 612edd16368SStephen M. Cameron }; 6136b80b18fSScott Teel #define HPSA_RAID_0 0 6146b80b18fSScott Teel #define HPSA_RAID_4 1 6156b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6166b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6176b80b18fSScott Teel #define HPSA_RAID_51 4 6186b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6196b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6207c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6217c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 622edd16368SStephen M. Cameron 623f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 624f3f01730SKevin Barnett { 625f3f01730SKevin Barnett return !device->physical_device; 626f3f01730SKevin Barnett } 627f3f01730SKevin Barnett 628edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 629edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 630edd16368SStephen M. Cameron { 631edd16368SStephen M. Cameron ssize_t l = 0; 63282a72c0aSStephen M. Cameron unsigned char rlevel; 633edd16368SStephen M. Cameron struct ctlr_info *h; 634edd16368SStephen M. Cameron struct scsi_device *sdev; 635edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 636edd16368SStephen M. Cameron unsigned long flags; 637edd16368SStephen M. Cameron 638edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 639edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 640edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 641edd16368SStephen M. Cameron hdev = sdev->hostdata; 642edd16368SStephen M. Cameron if (!hdev) { 643edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 644edd16368SStephen M. Cameron return -ENODEV; 645edd16368SStephen M. Cameron } 646edd16368SStephen M. Cameron 647edd16368SStephen M. Cameron /* Is this even a logical drive? */ 648f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 649edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 650edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 651edd16368SStephen M. Cameron return l; 652edd16368SStephen M. Cameron } 653edd16368SStephen M. Cameron 654edd16368SStephen M. Cameron rlevel = hdev->raid_level; 655edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 65682a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 657edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 658edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 659edd16368SStephen M. Cameron return l; 660edd16368SStephen M. Cameron } 661edd16368SStephen M. Cameron 662edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 663edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 664edd16368SStephen M. Cameron { 665edd16368SStephen M. Cameron struct ctlr_info *h; 666edd16368SStephen M. Cameron struct scsi_device *sdev; 667edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 668edd16368SStephen M. Cameron unsigned long flags; 669edd16368SStephen M. Cameron unsigned char lunid[8]; 670edd16368SStephen M. Cameron 671edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 672edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 673edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 674edd16368SStephen M. Cameron hdev = sdev->hostdata; 675edd16368SStephen M. Cameron if (!hdev) { 676edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 677edd16368SStephen M. Cameron return -ENODEV; 678edd16368SStephen M. Cameron } 679edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 680edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 681edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 682edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 683edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 684edd16368SStephen M. Cameron } 685edd16368SStephen M. Cameron 686edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 687edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 688edd16368SStephen M. Cameron { 689edd16368SStephen M. Cameron struct ctlr_info *h; 690edd16368SStephen M. Cameron struct scsi_device *sdev; 691edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 692edd16368SStephen M. Cameron unsigned long flags; 693edd16368SStephen M. Cameron unsigned char sn[16]; 694edd16368SStephen M. Cameron 695edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 696edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 697edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 698edd16368SStephen M. Cameron hdev = sdev->hostdata; 699edd16368SStephen M. Cameron if (!hdev) { 700edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 701edd16368SStephen M. Cameron return -ENODEV; 702edd16368SStephen M. Cameron } 703edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 704edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 705edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 706edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 707edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 708edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 709edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 710edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 711edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 712edd16368SStephen M. Cameron } 713edd16368SStephen M. Cameron 714c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 715c1988684SScott Teel struct device_attribute *attr, char *buf) 716c1988684SScott Teel { 717c1988684SScott Teel struct ctlr_info *h; 718c1988684SScott Teel struct scsi_device *sdev; 719c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 720c1988684SScott Teel unsigned long flags; 721c1988684SScott Teel int offload_enabled; 722c1988684SScott Teel 723c1988684SScott Teel sdev = to_scsi_device(dev); 724c1988684SScott Teel h = sdev_to_hba(sdev); 725c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 726c1988684SScott Teel hdev = sdev->hostdata; 727c1988684SScott Teel if (!hdev) { 728c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 729c1988684SScott Teel return -ENODEV; 730c1988684SScott Teel } 731c1988684SScott Teel offload_enabled = hdev->offload_enabled; 732c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 733c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 734c1988684SScott Teel } 735c1988684SScott Teel 7368270b862SJoe Handzik #define MAX_PATHS 8 7378270b862SJoe Handzik 7388270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7398270b862SJoe Handzik struct device_attribute *attr, char *buf) 7408270b862SJoe Handzik { 7418270b862SJoe Handzik struct ctlr_info *h; 7428270b862SJoe Handzik struct scsi_device *sdev; 7438270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7448270b862SJoe Handzik unsigned long flags; 7458270b862SJoe Handzik int i; 7468270b862SJoe Handzik int output_len = 0; 7478270b862SJoe Handzik u8 box; 7488270b862SJoe Handzik u8 bay; 7498270b862SJoe Handzik u8 path_map_index = 0; 7508270b862SJoe Handzik char *active; 7518270b862SJoe Handzik unsigned char phys_connector[2]; 7528270b862SJoe Handzik 7538270b862SJoe Handzik sdev = to_scsi_device(dev); 7548270b862SJoe Handzik h = sdev_to_hba(sdev); 7558270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7568270b862SJoe Handzik hdev = sdev->hostdata; 7578270b862SJoe Handzik if (!hdev) { 7588270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 7598270b862SJoe Handzik return -ENODEV; 7608270b862SJoe Handzik } 7618270b862SJoe Handzik 7628270b862SJoe Handzik bay = hdev->bay; 7638270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 7648270b862SJoe Handzik path_map_index = 1<<i; 7658270b862SJoe Handzik if (i == hdev->active_path_index) 7668270b862SJoe Handzik active = "Active"; 7678270b862SJoe Handzik else if (hdev->path_map & path_map_index) 7688270b862SJoe Handzik active = "Inactive"; 7698270b862SJoe Handzik else 7708270b862SJoe Handzik continue; 7718270b862SJoe Handzik 772*1faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 773*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, 774*1faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 7758270b862SJoe Handzik h->scsi_host->host_no, 7768270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 7778270b862SJoe Handzik scsi_device_type(hdev->devtype)); 7788270b862SJoe Handzik 77966749d0dSScott Teel if (hdev->external || 780f3f01730SKevin Barnett hdev->devtype == TYPE_RAID || 781f3f01730SKevin Barnett is_logical_device(hdev)) { 782*1faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 783*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, 784*1faf072cSRasmus Villemoes "%s\n", active); 7858270b862SJoe Handzik continue; 7868270b862SJoe Handzik } 7878270b862SJoe Handzik 7888270b862SJoe Handzik box = hdev->box[i]; 7898270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 7908270b862SJoe Handzik sizeof(phys_connector)); 7918270b862SJoe Handzik if (phys_connector[0] < '0') 7928270b862SJoe Handzik phys_connector[0] = '0'; 7938270b862SJoe Handzik if (phys_connector[1] < '0') 7948270b862SJoe Handzik phys_connector[1] = '0'; 7958270b862SJoe Handzik if (hdev->phys_connector[i] > 0) 796*1faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 797*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, 7988270b862SJoe Handzik "PORT: %.2s ", 7998270b862SJoe Handzik phys_connector); 8002a168208SKevin Barnett if (hdev->devtype == TYPE_DISK && hdev->expose_device) { 8018270b862SJoe Handzik if (box == 0 || box == 0xFF) { 802*1faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 803*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8048270b862SJoe Handzik "BAY: %hhu %s\n", 8058270b862SJoe Handzik bay, active); 8068270b862SJoe Handzik } else { 807*1faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 808*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8098270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8108270b862SJoe Handzik box, bay, active); 8118270b862SJoe Handzik } 8128270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 813*1faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 814*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8158270b862SJoe Handzik box, active); 8168270b862SJoe Handzik } else 817*1faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 818*1faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8198270b862SJoe Handzik } 8208270b862SJoe Handzik 8218270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 822*1faf072cSRasmus Villemoes return output_len; 8238270b862SJoe Handzik } 8248270b862SJoe Handzik 8253f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8263f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8273f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8283f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 829c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 830c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8318270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 832da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 833da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 834da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8352ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8362ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8373f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8383f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8393f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8403f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8413f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8423f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 843941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 844941b1cdaSStephen M. Cameron host_show_resettable, NULL); 845e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 846e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8473f5eac3aSStephen M. Cameron 8483f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8493f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8503f5eac3aSStephen M. Cameron &dev_attr_lunid, 8513f5eac3aSStephen M. Cameron &dev_attr_unique_id, 852c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8538270b862SJoe Handzik &dev_attr_path_info, 854e985c58fSStephen Cameron &dev_attr_lockup_detected, 8553f5eac3aSStephen M. Cameron NULL, 8563f5eac3aSStephen M. Cameron }; 8573f5eac3aSStephen M. Cameron 8583f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 8593f5eac3aSStephen M. Cameron &dev_attr_rescan, 8603f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 8613f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 8623f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 863941b1cdaSStephen M. Cameron &dev_attr_resettable, 864da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 8652ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 8663f5eac3aSStephen M. Cameron NULL, 8673f5eac3aSStephen M. Cameron }; 8683f5eac3aSStephen M. Cameron 86941ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 87041ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 87141ce4c35SStephen Cameron 8723f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 8733f5eac3aSStephen M. Cameron .module = THIS_MODULE, 874f79cfec6SStephen M. Cameron .name = HPSA, 875f79cfec6SStephen M. Cameron .proc_name = HPSA, 8763f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 8773f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 8783f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 8797c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 8803f5eac3aSStephen M. Cameron .this_id = -1, 8813f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 88275167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 8833f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 8843f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 8853f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 88641ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 8873f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 8883f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 8893f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 8903f5eac3aSStephen M. Cameron #endif 8913f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 8923f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 893c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 89454b2b50cSMartin K. Petersen .no_write_same = 1, 8953f5eac3aSStephen M. Cameron }; 8963f5eac3aSStephen M. Cameron 897254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 8983f5eac3aSStephen M. Cameron { 8993f5eac3aSStephen M. Cameron u32 a; 900072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9013f5eac3aSStephen M. Cameron 902e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 903e1f7de0cSMatt Gates return h->access.command_completed(h, q); 904e1f7de0cSMatt Gates 9053f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 906254f796bSMatt Gates return h->access.command_completed(h, q); 9073f5eac3aSStephen M. Cameron 908254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 909254f796bSMatt Gates a = rq->head[rq->current_entry]; 910254f796bSMatt Gates rq->current_entry++; 9110cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9123f5eac3aSStephen M. Cameron } else { 9133f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9143f5eac3aSStephen M. Cameron } 9153f5eac3aSStephen M. Cameron /* Check for wraparound */ 916254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 917254f796bSMatt Gates rq->current_entry = 0; 918254f796bSMatt Gates rq->wraparound ^= 1; 9193f5eac3aSStephen M. Cameron } 9203f5eac3aSStephen M. Cameron return a; 9213f5eac3aSStephen M. Cameron } 9223f5eac3aSStephen M. Cameron 923c349775eSScott Teel /* 924c349775eSScott Teel * There are some special bits in the bus address of the 925c349775eSScott Teel * command that we have to set for the controller to know 926c349775eSScott Teel * how to process the command: 927c349775eSScott Teel * 928c349775eSScott Teel * Normal performant mode: 929c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 930c349775eSScott Teel * bits 1-3 = block fetch table entry 931c349775eSScott Teel * bits 4-6 = command type (== 0) 932c349775eSScott Teel * 933c349775eSScott Teel * ioaccel1 mode: 934c349775eSScott Teel * bit 0 = "performant mode" bit. 935c349775eSScott Teel * bits 1-3 = block fetch table entry 936c349775eSScott Teel * bits 4-6 = command type (== 110) 937c349775eSScott Teel * (command type is needed because ioaccel1 mode 938c349775eSScott Teel * commands are submitted through the same register as normal 939c349775eSScott Teel * mode commands, so this is how the controller knows whether 940c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 941c349775eSScott Teel * 942c349775eSScott Teel * ioaccel2 mode: 943c349775eSScott Teel * bit 0 = "performant mode" bit. 944c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 945c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 946c349775eSScott Teel * a separate special register for submitting commands. 947c349775eSScott Teel */ 948c349775eSScott Teel 94925163bd5SWebb Scales /* 95025163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9513f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9523f5eac3aSStephen M. Cameron * register number 9533f5eac3aSStephen M. Cameron */ 95425163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 95525163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 95625163bd5SWebb Scales int reply_queue) 9573f5eac3aSStephen M. Cameron { 958254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 9593f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 96025163bd5SWebb Scales if (unlikely(!h->msix_vector)) 96125163bd5SWebb Scales return; 96225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 963254f796bSMatt Gates c->Header.ReplyQueue = 964804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 96525163bd5SWebb Scales else 96625163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 967254f796bSMatt Gates } 9683f5eac3aSStephen M. Cameron } 9693f5eac3aSStephen M. Cameron 970c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 97125163bd5SWebb Scales struct CommandList *c, 97225163bd5SWebb Scales int reply_queue) 973c349775eSScott Teel { 974c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 975c349775eSScott Teel 97625163bd5SWebb Scales /* 97725163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 978c349775eSScott Teel * processor. This seems to give the best I/O throughput. 979c349775eSScott Teel */ 98025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 981c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 98225163bd5SWebb Scales else 98325163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 98425163bd5SWebb Scales /* 98525163bd5SWebb Scales * Set the bits in the address sent down to include: 986c349775eSScott Teel * - performant mode bit (bit 0) 987c349775eSScott Teel * - pull count (bits 1-3) 988c349775eSScott Teel * - command type (bits 4-6) 989c349775eSScott Teel */ 990c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 991c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 992c349775eSScott Teel } 993c349775eSScott Teel 9948be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 9958be986ccSStephen Cameron struct CommandList *c, 9968be986ccSStephen Cameron int reply_queue) 9978be986ccSStephen Cameron { 9988be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 9998be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10008be986ccSStephen Cameron 10018be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10028be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10038be986ccSStephen Cameron */ 10048be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10058be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10068be986ccSStephen Cameron else 10078be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10088be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10098be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10108be986ccSStephen Cameron * - pull count (bits 0-3) 10118be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10128be986ccSStephen Cameron */ 10138be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10148be986ccSStephen Cameron } 10158be986ccSStephen Cameron 1016c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 101725163bd5SWebb Scales struct CommandList *c, 101825163bd5SWebb Scales int reply_queue) 1019c349775eSScott Teel { 1020c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1021c349775eSScott Teel 102225163bd5SWebb Scales /* 102325163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1024c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1025c349775eSScott Teel */ 102625163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1027c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 102825163bd5SWebb Scales else 102925163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 103025163bd5SWebb Scales /* 103125163bd5SWebb Scales * Set the bits in the address sent down to include: 1032c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1033c349775eSScott Teel * - pull count (bits 0-3) 1034c349775eSScott Teel * - command type isn't needed for ioaccel2 1035c349775eSScott Teel */ 1036c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1037c349775eSScott Teel } 1038c349775eSScott Teel 1039e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1040e85c5974SStephen M. Cameron { 1041e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1042e85c5974SStephen M. Cameron } 1043e85c5974SStephen M. Cameron 1044e85c5974SStephen M. Cameron /* 1045e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1046e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1047e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1048e85c5974SStephen M. Cameron */ 1049e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1050e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1051e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1052e85c5974SStephen M. Cameron struct CommandList *c) 1053e85c5974SStephen M. Cameron { 1054e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1055e85c5974SStephen M. Cameron return; 1056e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1057e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1058e85c5974SStephen M. Cameron } 1059e85c5974SStephen M. Cameron 1060e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1061e85c5974SStephen M. Cameron struct CommandList *c) 1062e85c5974SStephen M. Cameron { 1063e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1064e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1065e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1066e85c5974SStephen M. Cameron } 1067e85c5974SStephen M. Cameron 106825163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 106925163bd5SWebb Scales struct CommandList *c, int reply_queue) 10703f5eac3aSStephen M. Cameron { 1071c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1072c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1073c349775eSScott Teel switch (c->cmd_type) { 1074c349775eSScott Teel case CMD_IOACCEL1: 107525163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1076c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1077c349775eSScott Teel break; 1078c349775eSScott Teel case CMD_IOACCEL2: 107925163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1080c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1081c349775eSScott Teel break; 10828be986ccSStephen Cameron case IOACCEL2_TMF: 10838be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 10848be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 10858be986ccSStephen Cameron break; 1086c349775eSScott Teel default: 108725163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1088f2405db8SDon Brace h->access.submit_command(h, c); 10893f5eac3aSStephen M. Cameron } 1090c05e8866SStephen Cameron } 10913f5eac3aSStephen M. Cameron 1092a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 109325163bd5SWebb Scales { 1094d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1095a58e7e53SWebb Scales return finish_cmd(c); 1096a58e7e53SWebb Scales 109725163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 109825163bd5SWebb Scales } 109925163bd5SWebb Scales 11003f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11013f5eac3aSStephen M. Cameron { 11023f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11033f5eac3aSStephen M. Cameron } 11043f5eac3aSStephen M. Cameron 11053f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11063f5eac3aSStephen M. Cameron { 11073f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11083f5eac3aSStephen M. Cameron return 0; 11093f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11103f5eac3aSStephen M. Cameron return 1; 11113f5eac3aSStephen M. Cameron return 0; 11123f5eac3aSStephen M. Cameron } 11133f5eac3aSStephen M. Cameron 1114edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1115edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1116edd16368SStephen M. Cameron { 1117edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1118edd16368SStephen M. Cameron * assumes h->devlock is held 1119edd16368SStephen M. Cameron */ 1120edd16368SStephen M. Cameron int i, found = 0; 1121cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1122edd16368SStephen M. Cameron 1123263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1124edd16368SStephen M. Cameron 1125edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1126edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1127263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1128edd16368SStephen M. Cameron } 1129edd16368SStephen M. Cameron 1130263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1131263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1132edd16368SStephen M. Cameron /* *bus = 1; */ 1133edd16368SStephen M. Cameron *target = i; 1134edd16368SStephen M. Cameron *lun = 0; 1135edd16368SStephen M. Cameron found = 1; 1136edd16368SStephen M. Cameron } 1137edd16368SStephen M. Cameron return !found; 1138edd16368SStephen M. Cameron } 1139edd16368SStephen M. Cameron 11401d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11410d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11420d96ef5fSWebb Scales { 11437c59a0d4SDon Brace #define LABEL_SIZE 25 11447c59a0d4SDon Brace char label[LABEL_SIZE]; 11457c59a0d4SDon Brace 11469975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11479975ec9dSDon Brace return; 11489975ec9dSDon Brace 11497c59a0d4SDon Brace switch (dev->devtype) { 11507c59a0d4SDon Brace case TYPE_RAID: 11517c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11527c59a0d4SDon Brace break; 11537c59a0d4SDon Brace case TYPE_ENCLOSURE: 11547c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11557c59a0d4SDon Brace break; 11567c59a0d4SDon Brace case TYPE_DISK: 11577c59a0d4SDon Brace if (dev->external) 11587c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 11597c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 11607c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 11617c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 11627c59a0d4SDon Brace else 11637c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 11647c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 11657c59a0d4SDon Brace raid_label[dev->raid_level]); 11667c59a0d4SDon Brace break; 11677c59a0d4SDon Brace case TYPE_ROM: 11687c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 11697c59a0d4SDon Brace break; 11707c59a0d4SDon Brace case TYPE_TAPE: 11717c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 11727c59a0d4SDon Brace break; 11737c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 11747c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 11757c59a0d4SDon Brace break; 11767c59a0d4SDon Brace default: 11777c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 11787c59a0d4SDon Brace break; 11797c59a0d4SDon Brace } 11807c59a0d4SDon Brace 11810d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 11827c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 11830d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 11840d96ef5fSWebb Scales description, 11850d96ef5fSWebb Scales scsi_device_type(dev->devtype), 11860d96ef5fSWebb Scales dev->vendor, 11870d96ef5fSWebb Scales dev->model, 11887c59a0d4SDon Brace label, 11890d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 11900d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 11912a168208SKevin Barnett dev->expose_device); 11920d96ef5fSWebb Scales } 11930d96ef5fSWebb Scales 1194edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 11958aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1196edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1197edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1198edd16368SStephen M. Cameron { 1199edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1200edd16368SStephen M. Cameron int n = h->ndevices; 1201edd16368SStephen M. Cameron int i; 1202edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1203edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1204edd16368SStephen M. Cameron 1205cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1206edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1207edd16368SStephen M. Cameron "inaccessible.\n"); 1208edd16368SStephen M. Cameron return -1; 1209edd16368SStephen M. Cameron } 1210edd16368SStephen M. Cameron 1211edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1212edd16368SStephen M. Cameron if (device->lun != -1) 1213edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1214edd16368SStephen M. Cameron goto lun_assigned; 1215edd16368SStephen M. Cameron 1216edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1217edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12182b08b3e9SDon Brace * unit no, zero otherwise. 1219edd16368SStephen M. Cameron */ 1220edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1221edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1222edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1223edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1224edd16368SStephen M. Cameron return -1; 1225edd16368SStephen M. Cameron goto lun_assigned; 1226edd16368SStephen M. Cameron } 1227edd16368SStephen M. Cameron 1228edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1229edd16368SStephen M. Cameron * Search through our list and find the device which 12309a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1231edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1232edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1233edd16368SStephen M. Cameron */ 1234edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1235edd16368SStephen M. Cameron addr1[4] = 0; 12369a4178b7Sshane.seymour addr1[5] = 0; 1237edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1238edd16368SStephen M. Cameron sd = h->dev[i]; 1239edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1240edd16368SStephen M. Cameron addr2[4] = 0; 12419a4178b7Sshane.seymour addr2[5] = 0; 12429a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1243edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1244edd16368SStephen M. Cameron device->bus = sd->bus; 1245edd16368SStephen M. Cameron device->target = sd->target; 1246edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1247edd16368SStephen M. Cameron break; 1248edd16368SStephen M. Cameron } 1249edd16368SStephen M. Cameron } 1250edd16368SStephen M. Cameron if (device->lun == -1) { 1251edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1252edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1253edd16368SStephen M. Cameron "configuration.\n"); 1254edd16368SStephen M. Cameron return -1; 1255edd16368SStephen M. Cameron } 1256edd16368SStephen M. Cameron 1257edd16368SStephen M. Cameron lun_assigned: 1258edd16368SStephen M. Cameron 1259edd16368SStephen M. Cameron h->dev[n] = device; 1260edd16368SStephen M. Cameron h->ndevices++; 1261edd16368SStephen M. Cameron added[*nadded] = device; 1262edd16368SStephen M. Cameron (*nadded)++; 12630d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 12642a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1265a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1266a473d86cSRobert Elliott device->offload_enabled = 0; 1267edd16368SStephen M. Cameron return 0; 1268edd16368SStephen M. Cameron } 1269edd16368SStephen M. Cameron 1270bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 12718aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1272bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1273bd9244f7SScott Teel { 1274a473d86cSRobert Elliott int offload_enabled; 1275bd9244f7SScott Teel /* assumes h->devlock is held */ 1276bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1277bd9244f7SScott Teel 1278bd9244f7SScott Teel /* Raid level changed. */ 1279bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1280250fb125SStephen M. Cameron 128103383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 128203383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 128303383736SDon Brace /* 128403383736SDon Brace * if drive is newly offload_enabled, we want to copy the 128503383736SDon Brace * raid map data first. If previously offload_enabled and 128603383736SDon Brace * offload_config were set, raid map data had better be 128703383736SDon Brace * the same as it was before. if raid map data is changed 128803383736SDon Brace * then it had better be the case that 128903383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 129003383736SDon Brace */ 12919fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 129203383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 129303383736SDon Brace } 1294a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1295a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1296a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1297a3144e0bSJoe Handzik } 1298a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 129903383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 130003383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 130103383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1302250fb125SStephen M. Cameron 130341ce4c35SStephen Cameron /* 130441ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 130541ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 130641ce4c35SStephen Cameron * can't do that until all the devices are updated. 130741ce4c35SStephen Cameron */ 130841ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 130941ce4c35SStephen Cameron if (!new_entry->offload_enabled) 131041ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 131141ce4c35SStephen Cameron 1312a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1313a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13140d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1315a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1316bd9244f7SScott Teel } 1317bd9244f7SScott Teel 13182a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13198aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13202a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13212a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13222a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13232a8ccf31SStephen M. Cameron { 13242a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1325cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13262a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13272a8ccf31SStephen M. Cameron (*nremoved)++; 132801350d05SStephen M. Cameron 132901350d05SStephen M. Cameron /* 133001350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 133101350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 133201350d05SStephen M. Cameron */ 133301350d05SStephen M. Cameron if (new_entry->target == -1) { 133401350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 133501350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 133601350d05SStephen M. Cameron } 133701350d05SStephen M. Cameron 13382a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13392a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13402a8ccf31SStephen M. Cameron (*nadded)++; 13410d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1342a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1343a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13442a8ccf31SStephen M. Cameron } 13452a8ccf31SStephen M. Cameron 1346edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13478aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1348edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1349edd16368SStephen M. Cameron { 1350edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1351edd16368SStephen M. Cameron int i; 1352edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1353edd16368SStephen M. Cameron 1354cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1355edd16368SStephen M. Cameron 1356edd16368SStephen M. Cameron sd = h->dev[entry]; 1357edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1358edd16368SStephen M. Cameron (*nremoved)++; 1359edd16368SStephen M. Cameron 1360edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1361edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1362edd16368SStephen M. Cameron h->ndevices--; 13630d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1364edd16368SStephen M. Cameron } 1365edd16368SStephen M. Cameron 1366edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1367edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1368edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1369edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1370edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1371edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1372edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1373edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1374edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1375edd16368SStephen M. Cameron 1376edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1377edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1378edd16368SStephen M. Cameron { 1379edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1380edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1381edd16368SStephen M. Cameron */ 1382edd16368SStephen M. Cameron unsigned long flags; 1383edd16368SStephen M. Cameron int i, j; 1384edd16368SStephen M. Cameron 1385edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1386edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1387edd16368SStephen M. Cameron if (h->dev[i] == added) { 1388edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1389edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1390edd16368SStephen M. Cameron h->ndevices--; 1391edd16368SStephen M. Cameron break; 1392edd16368SStephen M. Cameron } 1393edd16368SStephen M. Cameron } 1394edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1395edd16368SStephen M. Cameron kfree(added); 1396edd16368SStephen M. Cameron } 1397edd16368SStephen M. Cameron 1398edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1399edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1400edd16368SStephen M. Cameron { 1401edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1402edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1403edd16368SStephen M. Cameron * to differ first 1404edd16368SStephen M. Cameron */ 1405edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1406edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1407edd16368SStephen M. Cameron return 0; 1408edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1409edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1410edd16368SStephen M. Cameron return 0; 1411edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1412edd16368SStephen M. Cameron return 0; 1413edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1414edd16368SStephen M. Cameron return 0; 1415edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1416edd16368SStephen M. Cameron return 0; 1417edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1418edd16368SStephen M. Cameron return 0; 1419edd16368SStephen M. Cameron return 1; 1420edd16368SStephen M. Cameron } 1421edd16368SStephen M. Cameron 1422bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1423bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1424bd9244f7SScott Teel { 1425bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1426bd9244f7SScott Teel * that the device is a different device, nor that the OS 1427bd9244f7SScott Teel * needs to be told anything about the change. 1428bd9244f7SScott Teel */ 1429bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1430bd9244f7SScott Teel return 1; 1431250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1432250fb125SStephen M. Cameron return 1; 1433250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1434250fb125SStephen M. Cameron return 1; 143593849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 143603383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 143703383736SDon Brace return 1; 1438bd9244f7SScott Teel return 0; 1439bd9244f7SScott Teel } 1440bd9244f7SScott Teel 1441edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1442edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1443edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1444bd9244f7SScott Teel * location in *index. 1445bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1446bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1447bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1448edd16368SStephen M. Cameron */ 1449edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1450edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1451edd16368SStephen M. Cameron int *index) 1452edd16368SStephen M. Cameron { 1453edd16368SStephen M. Cameron int i; 1454edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1455edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1456edd16368SStephen M. Cameron #define DEVICE_SAME 2 1457bd9244f7SScott Teel #define DEVICE_UPDATED 3 14581d33d85dSDon Brace if (needle == NULL) 14591d33d85dSDon Brace return DEVICE_NOT_FOUND; 14601d33d85dSDon Brace 1461edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 146223231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 146323231048SStephen M. Cameron continue; 1464edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1465edd16368SStephen M. Cameron *index = i; 1466bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1467bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1468bd9244f7SScott Teel return DEVICE_UPDATED; 1469edd16368SStephen M. Cameron return DEVICE_SAME; 1470bd9244f7SScott Teel } else { 14719846590eSStephen M. Cameron /* Keep offline devices offline */ 14729846590eSStephen M. Cameron if (needle->volume_offline) 14739846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1474edd16368SStephen M. Cameron return DEVICE_CHANGED; 1475edd16368SStephen M. Cameron } 1476edd16368SStephen M. Cameron } 1477bd9244f7SScott Teel } 1478edd16368SStephen M. Cameron *index = -1; 1479edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1480edd16368SStephen M. Cameron } 1481edd16368SStephen M. Cameron 14829846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 14839846590eSStephen M. Cameron unsigned char scsi3addr[]) 14849846590eSStephen M. Cameron { 14859846590eSStephen M. Cameron struct offline_device_entry *device; 14869846590eSStephen M. Cameron unsigned long flags; 14879846590eSStephen M. Cameron 14889846590eSStephen M. Cameron /* Check to see if device is already on the list */ 14899846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 14909846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 14919846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 14929846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 14939846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 14949846590eSStephen M. Cameron return; 14959846590eSStephen M. Cameron } 14969846590eSStephen M. Cameron } 14979846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 14989846590eSStephen M. Cameron 14999846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15009846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15019846590eSStephen M. Cameron if (!device) { 15029846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15039846590eSStephen M. Cameron return; 15049846590eSStephen M. Cameron } 15059846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15069846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15079846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15089846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15099846590eSStephen M. Cameron } 15109846590eSStephen M. Cameron 15119846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15129846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15139846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15149846590eSStephen M. Cameron { 15159846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15169846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15179846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15189846590eSStephen M. Cameron h->scsi_host->host_no, 15199846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15209846590eSStephen M. Cameron switch (sd->volume_offline) { 15219846590eSStephen M. Cameron case HPSA_LV_OK: 15229846590eSStephen M. Cameron break; 15239846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15249846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15259846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15269846590eSStephen M. Cameron h->scsi_host->host_no, 15279846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15289846590eSStephen M. Cameron break; 15295ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15305ca01204SScott Benesh dev_info(&h->pdev->dev, 15315ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15325ca01204SScott Benesh h->scsi_host->host_no, 15335ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15345ca01204SScott Benesh break; 15359846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15369846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15375ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15389846590eSStephen M. Cameron h->scsi_host->host_no, 15399846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15409846590eSStephen M. Cameron break; 15419846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15429846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15439846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15449846590eSStephen M. Cameron h->scsi_host->host_no, 15459846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15469846590eSStephen M. Cameron break; 15479846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15489846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15499846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15509846590eSStephen M. Cameron h->scsi_host->host_no, 15519846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15529846590eSStephen M. Cameron break; 15539846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15549846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15559846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15569846590eSStephen M. Cameron h->scsi_host->host_no, 15579846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15589846590eSStephen M. Cameron break; 15599846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 15609846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15619846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 15629846590eSStephen M. Cameron h->scsi_host->host_no, 15639846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15649846590eSStephen M. Cameron break; 15659846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 15669846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15679846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 15689846590eSStephen M. Cameron h->scsi_host->host_no, 15699846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15709846590eSStephen M. Cameron break; 15719846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 15729846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15739846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 15749846590eSStephen M. Cameron h->scsi_host->host_no, 15759846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15769846590eSStephen M. Cameron break; 15779846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 15789846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15799846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 15809846590eSStephen M. Cameron h->scsi_host->host_no, 15819846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15829846590eSStephen M. Cameron break; 15839846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 15849846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15859846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 15869846590eSStephen M. Cameron h->scsi_host->host_no, 15879846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15889846590eSStephen M. Cameron break; 15899846590eSStephen M. Cameron } 15909846590eSStephen M. Cameron } 15919846590eSStephen M. Cameron 159203383736SDon Brace /* 159303383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 159403383736SDon Brace * raid offload configured. 159503383736SDon Brace */ 159603383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 159703383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 159803383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 159903383736SDon Brace { 160003383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 160103383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 160203383736SDon Brace int i, j; 160303383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 160403383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 160503383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 160603383736SDon Brace le16_to_cpu(map->layout_map_count) * 160703383736SDon Brace total_disks_per_row; 160803383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 160903383736SDon Brace total_disks_per_row; 161003383736SDon Brace int qdepth; 161103383736SDon Brace 161203383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 161303383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 161403383736SDon Brace 1615d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1616d604f533SWebb Scales 161703383736SDon Brace qdepth = 0; 161803383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 161903383736SDon Brace logical_drive->phys_disk[i] = NULL; 162003383736SDon Brace if (!logical_drive->offload_config) 162103383736SDon Brace continue; 162203383736SDon Brace for (j = 0; j < ndevices; j++) { 16231d33d85dSDon Brace if (dev[j] == NULL) 16241d33d85dSDon Brace continue; 162503383736SDon Brace if (dev[j]->devtype != TYPE_DISK) 162603383736SDon Brace continue; 1627f3f01730SKevin Barnett if (is_logical_device(dev[j])) 162803383736SDon Brace continue; 162903383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 163003383736SDon Brace continue; 163103383736SDon Brace 163203383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 163303383736SDon Brace if (i < nphys_disk) 163403383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 163503383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 163603383736SDon Brace break; 163703383736SDon Brace } 163803383736SDon Brace 163903383736SDon Brace /* 164003383736SDon Brace * This can happen if a physical drive is removed and 164103383736SDon Brace * the logical drive is degraded. In that case, the RAID 164203383736SDon Brace * map data will refer to a physical disk which isn't actually 164303383736SDon Brace * present. And in that case offload_enabled should already 164403383736SDon Brace * be 0, but we'll turn it off here just in case 164503383736SDon Brace */ 164603383736SDon Brace if (!logical_drive->phys_disk[i]) { 164703383736SDon Brace logical_drive->offload_enabled = 0; 164841ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 164941ce4c35SStephen Cameron logical_drive->queue_depth = 8; 165003383736SDon Brace } 165103383736SDon Brace } 165203383736SDon Brace if (nraid_map_entries) 165303383736SDon Brace /* 165403383736SDon Brace * This is correct for reads, too high for full stripe writes, 165503383736SDon Brace * way too high for partial stripe writes 165603383736SDon Brace */ 165703383736SDon Brace logical_drive->queue_depth = qdepth; 165803383736SDon Brace else 165903383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 166003383736SDon Brace } 166103383736SDon Brace 166203383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 166303383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 166403383736SDon Brace { 166503383736SDon Brace int i; 166603383736SDon Brace 166703383736SDon Brace for (i = 0; i < ndevices; i++) { 16681d33d85dSDon Brace if (dev[i] == NULL) 16691d33d85dSDon Brace continue; 167003383736SDon Brace if (dev[i]->devtype != TYPE_DISK) 167103383736SDon Brace continue; 1672f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 167303383736SDon Brace continue; 167441ce4c35SStephen Cameron 167541ce4c35SStephen Cameron /* 167641ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 167741ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 167841ce4c35SStephen Cameron * and since it isn't changing, we do not need to 167941ce4c35SStephen Cameron * update it. 168041ce4c35SStephen Cameron */ 168141ce4c35SStephen Cameron if (dev[i]->offload_enabled) 168241ce4c35SStephen Cameron continue; 168341ce4c35SStephen Cameron 168403383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 168503383736SDon Brace } 168603383736SDon Brace } 168703383736SDon Brace 1688096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1689096ccff4SKevin Barnett { 1690096ccff4SKevin Barnett int rc = 0; 1691096ccff4SKevin Barnett 1692096ccff4SKevin Barnett if (!h->scsi_host) 1693096ccff4SKevin Barnett return 1; 1694096ccff4SKevin Barnett 1695096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1696096ccff4SKevin Barnett device->target, device->lun); 1697096ccff4SKevin Barnett return rc; 1698096ccff4SKevin Barnett } 1699096ccff4SKevin Barnett 1700096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1701096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1702096ccff4SKevin Barnett { 1703096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1704096ccff4SKevin Barnett 1705096ccff4SKevin Barnett if (!h->scsi_host) 1706096ccff4SKevin Barnett return; 1707096ccff4SKevin Barnett 1708096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1709096ccff4SKevin Barnett device->target, device->lun); 1710096ccff4SKevin Barnett 1711096ccff4SKevin Barnett if (sdev) { 1712096ccff4SKevin Barnett scsi_remove_device(sdev); 1713096ccff4SKevin Barnett scsi_device_put(sdev); 1714096ccff4SKevin Barnett } else { 1715096ccff4SKevin Barnett /* 1716096ccff4SKevin Barnett * We don't expect to get here. Future commands 1717096ccff4SKevin Barnett * to this device will get a selection timeout as 1718096ccff4SKevin Barnett * if the device were gone. 1719096ccff4SKevin Barnett */ 1720096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1721096ccff4SKevin Barnett "didn't find device for removal."); 1722096ccff4SKevin Barnett } 1723096ccff4SKevin Barnett } 1724096ccff4SKevin Barnett 17258aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1726edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1727edd16368SStephen M. Cameron { 1728edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1729edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1730edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1731edd16368SStephen M. Cameron */ 1732edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1733edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1734edd16368SStephen M. Cameron unsigned long flags; 1735edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1736edd16368SStephen M. Cameron int nadded, nremoved; 1737edd16368SStephen M. Cameron 1738da03ded0SDon Brace /* 1739da03ded0SDon Brace * A reset can cause a device status to change 1740da03ded0SDon Brace * re-schedule the scan to see what happened. 1741da03ded0SDon Brace */ 1742da03ded0SDon Brace if (h->reset_in_progress) { 1743da03ded0SDon Brace h->drv_req_rescan = 1; 1744da03ded0SDon Brace return; 1745da03ded0SDon Brace } 1746da03ded0SDon Brace 1747cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1748cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1749edd16368SStephen M. Cameron 1750edd16368SStephen M. Cameron if (!added || !removed) { 1751edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1752edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1753edd16368SStephen M. Cameron goto free_and_out; 1754edd16368SStephen M. Cameron } 1755edd16368SStephen M. Cameron 1756edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1757edd16368SStephen M. Cameron 1758edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1759edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1760edd16368SStephen M. Cameron * devices which have changed, remove the old device 1761edd16368SStephen M. Cameron * info and add the new device info. 1762bd9244f7SScott Teel * If minor device attributes change, just update 1763bd9244f7SScott Teel * the existing device structure. 1764edd16368SStephen M. Cameron */ 1765edd16368SStephen M. Cameron i = 0; 1766edd16368SStephen M. Cameron nremoved = 0; 1767edd16368SStephen M. Cameron nadded = 0; 1768edd16368SStephen M. Cameron while (i < h->ndevices) { 1769edd16368SStephen M. Cameron csd = h->dev[i]; 1770edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1771edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1772edd16368SStephen M. Cameron changes++; 17738aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1774edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1775edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1776edd16368SStephen M. Cameron changes++; 17778aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 17782a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1779c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1780c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1781c7f172dcSStephen M. Cameron */ 1782c7f172dcSStephen M. Cameron sd[entry] = NULL; 1783bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 17848aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1785edd16368SStephen M. Cameron } 1786edd16368SStephen M. Cameron i++; 1787edd16368SStephen M. Cameron } 1788edd16368SStephen M. Cameron 1789edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1790edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1791edd16368SStephen M. Cameron */ 1792edd16368SStephen M. Cameron 1793edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1794edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1795edd16368SStephen M. Cameron continue; 17969846590eSStephen M. Cameron 17979846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 17989846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 17999846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 18009846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 18019846590eSStephen M. Cameron */ 18029846590eSStephen M. Cameron if (sd[i]->volume_offline) { 18039846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 18040d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 18059846590eSStephen M. Cameron continue; 18069846590eSStephen M. Cameron } 18079846590eSStephen M. Cameron 1808edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1809edd16368SStephen M. Cameron h->ndevices, &entry); 1810edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1811edd16368SStephen M. Cameron changes++; 18128aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1813edd16368SStephen M. Cameron break; 1814edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1815edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1816edd16368SStephen M. Cameron /* should never happen... */ 1817edd16368SStephen M. Cameron changes++; 1818edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1819edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1820edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1821edd16368SStephen M. Cameron } 1822edd16368SStephen M. Cameron } 182341ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 182441ce4c35SStephen Cameron 182541ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 182641ce4c35SStephen Cameron * any logical drives that need it enabled. 182741ce4c35SStephen Cameron */ 18281d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 18291d33d85dSDon Brace if (h->dev[i] == NULL) 18301d33d85dSDon Brace continue; 183141ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 18321d33d85dSDon Brace } 183341ce4c35SStephen Cameron 1834edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1835edd16368SStephen M. Cameron 18369846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 18379846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 18389846590eSStephen M. Cameron * so don't touch h->dev[] 18399846590eSStephen M. Cameron */ 18409846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 18419846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 18429846590eSStephen M. Cameron continue; 18439846590eSStephen M. Cameron if (sd[i]->volume_offline) 18449846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 18459846590eSStephen M. Cameron } 18469846590eSStephen M. Cameron 1847edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1848edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1849edd16368SStephen M. Cameron * first time through. 1850edd16368SStephen M. Cameron */ 18518aa60681SDon Brace if (!changes) 1852edd16368SStephen M. Cameron goto free_and_out; 1853edd16368SStephen M. Cameron 1854edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1855edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 18561d33d85dSDon Brace if (removed[i] == NULL) 18571d33d85dSDon Brace continue; 1858096ccff4SKevin Barnett if (removed[i]->expose_device) 1859096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1860edd16368SStephen M. Cameron kfree(removed[i]); 1861edd16368SStephen M. Cameron removed[i] = NULL; 1862edd16368SStephen M. Cameron } 1863edd16368SStephen M. Cameron 1864edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1865edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1866096ccff4SKevin Barnett int rc = 0; 1867096ccff4SKevin Barnett 18681d33d85dSDon Brace if (added[i] == NULL) 18691d33d85dSDon Brace continue; 18702a168208SKevin Barnett if (!(added[i]->expose_device)) 187141ce4c35SStephen Cameron continue; 1872096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1873096ccff4SKevin Barnett if (!rc) 1874edd16368SStephen M. Cameron continue; 1875096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1876096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1877edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1878edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1879edd16368SStephen M. Cameron */ 1880edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1881853633e8SDon Brace h->drv_req_rescan = 1; 1882edd16368SStephen M. Cameron } 1883edd16368SStephen M. Cameron 1884edd16368SStephen M. Cameron free_and_out: 1885edd16368SStephen M. Cameron kfree(added); 1886edd16368SStephen M. Cameron kfree(removed); 1887edd16368SStephen M. Cameron } 1888edd16368SStephen M. Cameron 1889edd16368SStephen M. Cameron /* 18909e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1891edd16368SStephen M. Cameron * Assume's h->devlock is held. 1892edd16368SStephen M. Cameron */ 1893edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1894edd16368SStephen M. Cameron int bus, int target, int lun) 1895edd16368SStephen M. Cameron { 1896edd16368SStephen M. Cameron int i; 1897edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1898edd16368SStephen M. Cameron 1899edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1900edd16368SStephen M. Cameron sd = h->dev[i]; 1901edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 1902edd16368SStephen M. Cameron return sd; 1903edd16368SStephen M. Cameron } 1904edd16368SStephen M. Cameron return NULL; 1905edd16368SStephen M. Cameron } 1906edd16368SStephen M. Cameron 1907edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 1908edd16368SStephen M. Cameron { 1909edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1910edd16368SStephen M. Cameron unsigned long flags; 1911edd16368SStephen M. Cameron struct ctlr_info *h; 1912edd16368SStephen M. Cameron 1913edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 1914edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1915edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1916edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 191741ce4c35SStephen Cameron if (likely(sd)) { 191803383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 19192a168208SKevin Barnett sdev->hostdata = sd->expose_device ? sd : NULL; 192041ce4c35SStephen Cameron } else 192141ce4c35SStephen Cameron sdev->hostdata = NULL; 1922edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1923edd16368SStephen M. Cameron return 0; 1924edd16368SStephen M. Cameron } 1925edd16368SStephen M. Cameron 192641ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 192741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 192841ce4c35SStephen Cameron { 192941ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 193041ce4c35SStephen Cameron int queue_depth; 193141ce4c35SStephen Cameron 193241ce4c35SStephen Cameron sd = sdev->hostdata; 19332a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 193441ce4c35SStephen Cameron 193541ce4c35SStephen Cameron if (sd) 193641ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 193741ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 193841ce4c35SStephen Cameron else 193941ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 194041ce4c35SStephen Cameron 194141ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 194241ce4c35SStephen Cameron 194341ce4c35SStephen Cameron return 0; 194441ce4c35SStephen Cameron } 194541ce4c35SStephen Cameron 1946edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 1947edd16368SStephen M. Cameron { 1948bcc44255SStephen M. Cameron /* nothing to do. */ 1949edd16368SStephen M. Cameron } 1950edd16368SStephen M. Cameron 1951d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 1952d9a729f3SWebb Scales { 1953d9a729f3SWebb Scales int i; 1954d9a729f3SWebb Scales 1955d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 1956d9a729f3SWebb Scales return; 1957d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 1958d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 1959d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 1960d9a729f3SWebb Scales } 1961d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 1962d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 1963d9a729f3SWebb Scales } 1964d9a729f3SWebb Scales 1965d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 1966d9a729f3SWebb Scales { 1967d9a729f3SWebb Scales int i; 1968d9a729f3SWebb Scales 1969d9a729f3SWebb Scales if (h->chainsize <= 0) 1970d9a729f3SWebb Scales return 0; 1971d9a729f3SWebb Scales 1972d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 1973d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 1974d9a729f3SWebb Scales GFP_KERNEL); 1975d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 1976d9a729f3SWebb Scales return -ENOMEM; 1977d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 1978d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 1979d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 1980d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 1981d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 1982d9a729f3SWebb Scales goto clean; 1983d9a729f3SWebb Scales } 1984d9a729f3SWebb Scales return 0; 1985d9a729f3SWebb Scales 1986d9a729f3SWebb Scales clean: 1987d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 1988d9a729f3SWebb Scales return -ENOMEM; 1989d9a729f3SWebb Scales } 1990d9a729f3SWebb Scales 199133a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 199233a2ffceSStephen M. Cameron { 199333a2ffceSStephen M. Cameron int i; 199433a2ffceSStephen M. Cameron 199533a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 199633a2ffceSStephen M. Cameron return; 199733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 199833a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 199933a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 200033a2ffceSStephen M. Cameron } 200133a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 200233a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 200333a2ffceSStephen M. Cameron } 200433a2ffceSStephen M. Cameron 2005105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 200633a2ffceSStephen M. Cameron { 200733a2ffceSStephen M. Cameron int i; 200833a2ffceSStephen M. Cameron 200933a2ffceSStephen M. Cameron if (h->chainsize <= 0) 201033a2ffceSStephen M. Cameron return 0; 201133a2ffceSStephen M. Cameron 201233a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 201333a2ffceSStephen M. Cameron GFP_KERNEL); 20143d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 20153d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 201633a2ffceSStephen M. Cameron return -ENOMEM; 20173d4e6af8SRobert Elliott } 201833a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 201933a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 202033a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 20213d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 20223d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 202333a2ffceSStephen M. Cameron goto clean; 202433a2ffceSStephen M. Cameron } 20253d4e6af8SRobert Elliott } 202633a2ffceSStephen M. Cameron return 0; 202733a2ffceSStephen M. Cameron 202833a2ffceSStephen M. Cameron clean: 202933a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 203033a2ffceSStephen M. Cameron return -ENOMEM; 203133a2ffceSStephen M. Cameron } 203233a2ffceSStephen M. Cameron 2033d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2034d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2035d9a729f3SWebb Scales { 2036d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2037d9a729f3SWebb Scales u64 temp64; 2038d9a729f3SWebb Scales u32 chain_size; 2039d9a729f3SWebb Scales 2040d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2041a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2042d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2043d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2044d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2045d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2046d9a729f3SWebb Scales cp->sg->address = 0; 2047d9a729f3SWebb Scales return -1; 2048d9a729f3SWebb Scales } 2049d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2050d9a729f3SWebb Scales return 0; 2051d9a729f3SWebb Scales } 2052d9a729f3SWebb Scales 2053d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2054d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2055d9a729f3SWebb Scales { 2056d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2057d9a729f3SWebb Scales u64 temp64; 2058d9a729f3SWebb Scales u32 chain_size; 2059d9a729f3SWebb Scales 2060d9a729f3SWebb Scales chain_sg = cp->sg; 2061d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2062a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2063d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2064d9a729f3SWebb Scales } 2065d9a729f3SWebb Scales 2066e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 206733a2ffceSStephen M. Cameron struct CommandList *c) 206833a2ffceSStephen M. Cameron { 206933a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 207033a2ffceSStephen M. Cameron u64 temp64; 207150a0decfSStephen M. Cameron u32 chain_len; 207233a2ffceSStephen M. Cameron 207333a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 207433a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 207550a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 207650a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 20772b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 207850a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 207950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 208033a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2081e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2082e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 208350a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2084e2bea6dfSStephen M. Cameron return -1; 2085e2bea6dfSStephen M. Cameron } 208650a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2087e2bea6dfSStephen M. Cameron return 0; 208833a2ffceSStephen M. Cameron } 208933a2ffceSStephen M. Cameron 209033a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 209133a2ffceSStephen M. Cameron struct CommandList *c) 209233a2ffceSStephen M. Cameron { 209333a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 209433a2ffceSStephen M. Cameron 209550a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 209633a2ffceSStephen M. Cameron return; 209733a2ffceSStephen M. Cameron 209833a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 209950a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 210050a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 210133a2ffceSStephen M. Cameron } 210233a2ffceSStephen M. Cameron 2103a09c1441SScott Teel 2104a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2105a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2106a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2107a09c1441SScott Teel */ 2108a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2109c349775eSScott Teel struct CommandList *c, 2110c349775eSScott Teel struct scsi_cmnd *cmd, 2111c349775eSScott Teel struct io_accel2_cmd *c2) 2112c349775eSScott Teel { 2113c349775eSScott Teel int data_len; 2114a09c1441SScott Teel int retry = 0; 2115c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2116c349775eSScott Teel 2117c349775eSScott Teel switch (c2->error_data.serv_response) { 2118c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2119c349775eSScott Teel switch (c2->error_data.status) { 2120c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2121c349775eSScott Teel break; 2122c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2123ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2124c349775eSScott Teel if (c2->error_data.data_present != 2125ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2126ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2127ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2128c349775eSScott Teel break; 2129ee6b1889SStephen M. Cameron } 2130c349775eSScott Teel /* copy the sense data */ 2131c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2132c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2133c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2134c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2135c349775eSScott Teel data_len = 2136c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2137c349775eSScott Teel memcpy(cmd->sense_buffer, 2138c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2139a09c1441SScott Teel retry = 1; 2140c349775eSScott Teel break; 2141c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2142a09c1441SScott Teel retry = 1; 2143c349775eSScott Teel break; 2144c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2145a09c1441SScott Teel retry = 1; 2146c349775eSScott Teel break; 2147c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 21484a8da22bSStephen Cameron retry = 1; 2149c349775eSScott Teel break; 2150c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2151a09c1441SScott Teel retry = 1; 2152c349775eSScott Teel break; 2153c349775eSScott Teel default: 2154a09c1441SScott Teel retry = 1; 2155c349775eSScott Teel break; 2156c349775eSScott Teel } 2157c349775eSScott Teel break; 2158c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2159c40820d5SJoe Handzik switch (c2->error_data.status) { 2160c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2161c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2162c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2163c40820d5SJoe Handzik retry = 1; 2164c40820d5SJoe Handzik break; 2165c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2166c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2167c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2168c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2169c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2170c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2171c40820d5SJoe Handzik break; 2172c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2173c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2174c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2175c40820d5SJoe Handzik /* We will get an event from ctlr to trigger rescan */ 2176c40820d5SJoe Handzik retry = 1; 2177c40820d5SJoe Handzik break; 2178c40820d5SJoe Handzik default: 2179c40820d5SJoe Handzik retry = 1; 2180c40820d5SJoe Handzik } 2181c349775eSScott Teel break; 2182c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2183c349775eSScott Teel break; 2184c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2185c349775eSScott Teel break; 2186c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2187a09c1441SScott Teel retry = 1; 2188c349775eSScott Teel break; 2189c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2190c349775eSScott Teel break; 2191c349775eSScott Teel default: 2192a09c1441SScott Teel retry = 1; 2193c349775eSScott Teel break; 2194c349775eSScott Teel } 2195a09c1441SScott Teel 2196a09c1441SScott Teel return retry; /* retry on raid path? */ 2197c349775eSScott Teel } 2198c349775eSScott Teel 2199a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2200a58e7e53SWebb Scales struct CommandList *c) 2201a58e7e53SWebb Scales { 2202d604f533SWebb Scales bool do_wake = false; 2203d604f533SWebb Scales 2204a58e7e53SWebb Scales /* 2205a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2206a58e7e53SWebb Scales * 2207a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2208a58e7e53SWebb Scales * 2. The SCSI command completes 2209a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2210a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2211a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2212a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2213a58e7e53SWebb Scales * Now we have aborted the wrong command. 2214a58e7e53SWebb Scales * 2215d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2216d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2217a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2218a58e7e53SWebb Scales */ 2219a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2220d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2221a58e7e53SWebb Scales if (c->abort_pending) { 2222d604f533SWebb Scales do_wake = true; 2223a58e7e53SWebb Scales c->abort_pending = false; 2224a58e7e53SWebb Scales } 2225d604f533SWebb Scales if (c->reset_pending) { 2226d604f533SWebb Scales unsigned long flags; 2227d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2228d604f533SWebb Scales 2229d604f533SWebb Scales /* 2230d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2231d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2232d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2233d604f533SWebb Scales */ 2234d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2235d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2236d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2237d604f533SWebb Scales do_wake = true; 2238d604f533SWebb Scales c->reset_pending = NULL; 2239d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2240d604f533SWebb Scales } 2241d604f533SWebb Scales 2242d604f533SWebb Scales if (do_wake) 2243d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2244a58e7e53SWebb Scales } 2245a58e7e53SWebb Scales 224673153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 224773153fe5SWebb Scales struct CommandList *c) 224873153fe5SWebb Scales { 224973153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 225073153fe5SWebb Scales cmd_tagged_free(h, c); 225173153fe5SWebb Scales } 225273153fe5SWebb Scales 22538a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 22548a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 22558a0ff92cSWebb Scales { 225673153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 22578a0ff92cSWebb Scales cmd->scsi_done(cmd); 22588a0ff92cSWebb Scales } 22598a0ff92cSWebb Scales 22608a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 22618a0ff92cSWebb Scales { 22628a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 22638a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 22648a0ff92cSWebb Scales } 22658a0ff92cSWebb Scales 2266a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2267a58e7e53SWebb Scales { 2268a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2269a58e7e53SWebb Scales } 2270a58e7e53SWebb Scales 2271a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2272a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2273a58e7e53SWebb Scales { 2274a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2275a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2276a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 227773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2278a58e7e53SWebb Scales } 2279a58e7e53SWebb Scales 2280c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2281c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2282c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2283c349775eSScott Teel { 2284c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2285c349775eSScott Teel 2286c349775eSScott Teel /* check for good status */ 2287c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 22888a0ff92cSWebb Scales c2->error_data.status == 0)) 22898a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2290c349775eSScott Teel 22918a0ff92cSWebb Scales /* 22928a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2293c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2294c349775eSScott Teel * wrong. 2295c349775eSScott Teel */ 2296f3f01730SKevin Barnett if (is_logical_device(dev) && 2297c349775eSScott Teel c2->error_data.serv_response == 2298c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2299080ef1ccSDon Brace if (c2->error_data.status == 2300080ef1ccSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) 2301c349775eSScott Teel dev->offload_enabled = 0; 23028a0ff92cSWebb Scales 23038a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2304080ef1ccSDon Brace } 2305080ef1ccSDon Brace 2306080ef1ccSDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2)) 23078a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2308080ef1ccSDon Brace 23098a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2310c349775eSScott Teel } 2311c349775eSScott Teel 23129437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 23139437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 23149437ac43SStephen Cameron struct CommandList *cp) 23159437ac43SStephen Cameron { 23169437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 23179437ac43SStephen Cameron 23189437ac43SStephen Cameron switch (tmf_status) { 23199437ac43SStephen Cameron case CISS_TMF_COMPLETE: 23209437ac43SStephen Cameron /* 23219437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 23229437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 23239437ac43SStephen Cameron */ 23249437ac43SStephen Cameron case CISS_TMF_SUCCESS: 23259437ac43SStephen Cameron return 0; 23269437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 23279437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 23289437ac43SStephen Cameron case CISS_TMF_FAILED: 23299437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 23309437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 23319437ac43SStephen Cameron break; 23329437ac43SStephen Cameron default: 23339437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 23349437ac43SStephen Cameron tmf_status); 23359437ac43SStephen Cameron break; 23369437ac43SStephen Cameron } 23379437ac43SStephen Cameron return -tmf_status; 23389437ac43SStephen Cameron } 23399437ac43SStephen Cameron 23401fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2341edd16368SStephen M. Cameron { 2342edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2343edd16368SStephen M. Cameron struct ctlr_info *h; 2344edd16368SStephen M. Cameron struct ErrorInfo *ei; 2345283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2346d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2347edd16368SStephen M. Cameron 23489437ac43SStephen Cameron u8 sense_key; 23499437ac43SStephen Cameron u8 asc; /* additional sense code */ 23509437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2351db111e18SStephen M. Cameron unsigned long sense_data_size; 2352edd16368SStephen M. Cameron 2353edd16368SStephen M. Cameron ei = cp->err_info; 23547fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2355edd16368SStephen M. Cameron h = cp->h; 2356283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2357d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2358edd16368SStephen M. Cameron 2359edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2360e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 23612b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 236233a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2363edd16368SStephen M. Cameron 2364d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2365d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2366d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2367d9a729f3SWebb Scales 2368edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2369edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2370c349775eSScott Teel 237103383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 237203383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 237303383736SDon Brace 237425163bd5SWebb Scales /* 237525163bd5SWebb Scales * We check for lockup status here as it may be set for 237625163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 237725163bd5SWebb Scales * fail_all_oustanding_cmds() 237825163bd5SWebb Scales */ 237925163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 238025163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 238125163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 23828a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 238325163bd5SWebb Scales } 238425163bd5SWebb Scales 2385d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2386d604f533SWebb Scales if (cp->reset_pending) 2387d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2388d604f533SWebb Scales if (cp->abort_pending) 2389d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2390d604f533SWebb Scales } 2391d604f533SWebb Scales 2392c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2393c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2394c349775eSScott Teel 23956aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 23968a0ff92cSWebb Scales if (ei->CommandStatus == 0) 23978a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 23986aa4c361SRobert Elliott 2399e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2400e1f7de0cSMatt Gates * CISS header used below for error handling. 2401e1f7de0cSMatt Gates */ 2402e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2403e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 24042b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 24052b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 24062b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 24072b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 240850a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2409e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2410e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2411283b4a9bSStephen M. Cameron 2412283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2413283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2414283b4a9bSStephen M. Cameron * wrong. 2415283b4a9bSStephen M. Cameron */ 2416f3f01730SKevin Barnett if (is_logical_device(dev)) { 2417283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2418283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 24198a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2420283b4a9bSStephen M. Cameron } 2421e1f7de0cSMatt Gates } 2422e1f7de0cSMatt Gates 2423edd16368SStephen M. Cameron /* an error has occurred */ 2424edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2425edd16368SStephen M. Cameron 2426edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 24279437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 24289437ac43SStephen Cameron /* copy the sense data */ 24299437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 24309437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 24319437ac43SStephen Cameron else 24329437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 24339437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 24349437ac43SStephen Cameron sense_data_size = ei->SenseLen; 24359437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 24369437ac43SStephen Cameron if (ei->ScsiStatus) 24379437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 24389437ac43SStephen Cameron &sense_key, &asc, &ascq); 2439edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 24401d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 24412e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 24421d3b3609SMatt Gates break; 24431d3b3609SMatt Gates } 2444edd16368SStephen M. Cameron break; 2445edd16368SStephen M. Cameron } 2446edd16368SStephen M. Cameron /* Problem was not a check condition 2447edd16368SStephen M. Cameron * Pass it up to the upper layers... 2448edd16368SStephen M. Cameron */ 2449edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2450edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2451edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2452edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2453edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2454edd16368SStephen M. Cameron sense_key, asc, ascq, 2455edd16368SStephen M. Cameron cmd->result); 2456edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2457edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2458edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2459edd16368SStephen M. Cameron 2460edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2461edd16368SStephen M. Cameron * but there is a bug in some released firmware 2462edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2463edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2464edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2465edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2466edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2467edd16368SStephen M. Cameron * look like selection timeout since that is 2468edd16368SStephen M. Cameron * the most common reason for this to occur, 2469edd16368SStephen M. Cameron * and it's severe enough. 2470edd16368SStephen M. Cameron */ 2471edd16368SStephen M. Cameron 2472edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2473edd16368SStephen M. Cameron } 2474edd16368SStephen M. Cameron break; 2475edd16368SStephen M. Cameron 2476edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2477edd16368SStephen M. Cameron break; 2478edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2479f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2480f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2481edd16368SStephen M. Cameron break; 2482edd16368SStephen M. Cameron case CMD_INVALID: { 2483edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2484edd16368SStephen M. Cameron print_cmd(cp); */ 2485edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2486edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2487edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2488edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2489edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2490edd16368SStephen M. Cameron * missing target. */ 2491edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2492edd16368SStephen M. Cameron } 2493edd16368SStephen M. Cameron break; 2494edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2495256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2496f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2497f42e81e1SStephen Cameron cp->Request.CDB); 2498edd16368SStephen M. Cameron break; 2499edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2500edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2501f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2502f42e81e1SStephen Cameron cp->Request.CDB); 2503edd16368SStephen M. Cameron break; 2504edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2505edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2506f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2507f42e81e1SStephen Cameron cp->Request.CDB); 2508edd16368SStephen M. Cameron break; 2509edd16368SStephen M. Cameron case CMD_ABORTED: 2510a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2511a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2512edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2513edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2514f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2515f42e81e1SStephen Cameron cp->Request.CDB); 2516edd16368SStephen M. Cameron break; 2517edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2518f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2519f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2520f42e81e1SStephen Cameron cp->Request.CDB); 2521edd16368SStephen M. Cameron break; 2522edd16368SStephen M. Cameron case CMD_TIMEOUT: 2523edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2524f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2525f42e81e1SStephen Cameron cp->Request.CDB); 2526edd16368SStephen M. Cameron break; 25271d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 25281d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 25291d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 25301d5e2ed0SStephen M. Cameron break; 25319437ac43SStephen Cameron case CMD_TMF_STATUS: 25329437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 25339437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 25349437ac43SStephen Cameron break; 2535283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2536283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2537283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2538283b4a9bSStephen M. Cameron */ 2539283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2540283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2541283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2542283b4a9bSStephen M. Cameron break; 2543edd16368SStephen M. Cameron default: 2544edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2545edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2546edd16368SStephen M. Cameron cp, ei->CommandStatus); 2547edd16368SStephen M. Cameron } 25488a0ff92cSWebb Scales 25498a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2550edd16368SStephen M. Cameron } 2551edd16368SStephen M. Cameron 2552edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2553edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2554edd16368SStephen M. Cameron { 2555edd16368SStephen M. Cameron int i; 2556edd16368SStephen M. Cameron 255750a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 255850a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 255950a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2560edd16368SStephen M. Cameron data_direction); 2561edd16368SStephen M. Cameron } 2562edd16368SStephen M. Cameron 2563a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2564edd16368SStephen M. Cameron struct CommandList *cp, 2565edd16368SStephen M. Cameron unsigned char *buf, 2566edd16368SStephen M. Cameron size_t buflen, 2567edd16368SStephen M. Cameron int data_direction) 2568edd16368SStephen M. Cameron { 256901a02ffcSStephen M. Cameron u64 addr64; 2570edd16368SStephen M. Cameron 2571edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2572edd16368SStephen M. Cameron cp->Header.SGList = 0; 257350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2574a2dac136SStephen M. Cameron return 0; 2575edd16368SStephen M. Cameron } 2576edd16368SStephen M. Cameron 257750a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2578eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2579a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2580eceaae18SShuah Khan cp->Header.SGList = 0; 258150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2582a2dac136SStephen M. Cameron return -1; 2583eceaae18SShuah Khan } 258450a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 258550a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 258650a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 258750a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 258850a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2589a2dac136SStephen M. Cameron return 0; 2590edd16368SStephen M. Cameron } 2591edd16368SStephen M. Cameron 259225163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 259325163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 259425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 259525163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2596edd16368SStephen M. Cameron { 2597edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2598edd16368SStephen M. Cameron 2599edd16368SStephen M. Cameron c->waiting = &wait; 260025163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 260125163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 260225163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 260325163bd5SWebb Scales wait_for_completion_io(&wait); 260425163bd5SWebb Scales return IO_OK; 260525163bd5SWebb Scales } 260625163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 260725163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 260825163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 260925163bd5SWebb Scales return -ETIMEDOUT; 261025163bd5SWebb Scales } 261125163bd5SWebb Scales return IO_OK; 261225163bd5SWebb Scales } 261325163bd5SWebb Scales 261425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 261525163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 261625163bd5SWebb Scales { 261725163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 261825163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 261925163bd5SWebb Scales return IO_OK; 262025163bd5SWebb Scales } 262125163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2622edd16368SStephen M. Cameron } 2623edd16368SStephen M. Cameron 2624094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2625094963daSStephen M. Cameron { 2626094963daSStephen M. Cameron int cpu; 2627094963daSStephen M. Cameron u32 rc, *lockup_detected; 2628094963daSStephen M. Cameron 2629094963daSStephen M. Cameron cpu = get_cpu(); 2630094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2631094963daSStephen M. Cameron rc = *lockup_detected; 2632094963daSStephen M. Cameron put_cpu(); 2633094963daSStephen M. Cameron return rc; 2634094963daSStephen M. Cameron } 2635094963daSStephen M. Cameron 26369c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 263725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 263825163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2639edd16368SStephen M. Cameron { 26409c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 264125163bd5SWebb Scales int rc; 2642edd16368SStephen M. Cameron 2643edd16368SStephen M. Cameron do { 26447630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 264525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 264625163bd5SWebb Scales timeout_msecs); 264725163bd5SWebb Scales if (rc) 264825163bd5SWebb Scales break; 2649edd16368SStephen M. Cameron retry_count++; 26509c2fc160SStephen M. Cameron if (retry_count > 3) { 26519c2fc160SStephen M. Cameron msleep(backoff_time); 26529c2fc160SStephen M. Cameron if (backoff_time < 1000) 26539c2fc160SStephen M. Cameron backoff_time *= 2; 26549c2fc160SStephen M. Cameron } 2655852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 26569c2fc160SStephen M. Cameron check_for_busy(h, c)) && 26579c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2658edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 265925163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 266025163bd5SWebb Scales rc = -EIO; 266125163bd5SWebb Scales return rc; 2662edd16368SStephen M. Cameron } 2663edd16368SStephen M. Cameron 2664d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2665d1e8beacSStephen M. Cameron struct CommandList *c) 2666edd16368SStephen M. Cameron { 2667d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2668d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2669edd16368SStephen M. Cameron 2670d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2671d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2672d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2673d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2674d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2675d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2676d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2677d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2678d1e8beacSStephen M. Cameron } 2679d1e8beacSStephen M. Cameron 2680d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2681d1e8beacSStephen M. Cameron struct CommandList *cp) 2682d1e8beacSStephen M. Cameron { 2683d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2684d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 26859437ac43SStephen Cameron u8 sense_key, asc, ascq; 26869437ac43SStephen Cameron int sense_len; 2687d1e8beacSStephen M. Cameron 2688edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2689edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 26909437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 26919437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 26929437ac43SStephen Cameron else 26939437ac43SStephen Cameron sense_len = ei->SenseLen; 26949437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 26959437ac43SStephen Cameron &sense_key, &asc, &ascq); 2696d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2697d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 26989437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 26999437ac43SStephen Cameron sense_key, asc, ascq); 2700d1e8beacSStephen M. Cameron else 27019437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2702edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2703edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2704edd16368SStephen M. Cameron "(probably indicates selection timeout " 2705edd16368SStephen M. Cameron "reported incorrectly due to a known " 2706edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2707edd16368SStephen M. Cameron break; 2708edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2709edd16368SStephen M. Cameron break; 2710edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2711d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2712edd16368SStephen M. Cameron break; 2713edd16368SStephen M. Cameron case CMD_INVALID: { 2714edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2715edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2716edd16368SStephen M. Cameron */ 2717d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2718d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2719edd16368SStephen M. Cameron } 2720edd16368SStephen M. Cameron break; 2721edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2722d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2723edd16368SStephen M. Cameron break; 2724edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2725d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2726edd16368SStephen M. Cameron break; 2727edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2728d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2729edd16368SStephen M. Cameron break; 2730edd16368SStephen M. Cameron case CMD_ABORTED: 2731d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2732edd16368SStephen M. Cameron break; 2733edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2734d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2735edd16368SStephen M. Cameron break; 2736edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2737d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2738edd16368SStephen M. Cameron break; 2739edd16368SStephen M. Cameron case CMD_TIMEOUT: 2740d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2741edd16368SStephen M. Cameron break; 27421d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2743d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 27441d5e2ed0SStephen M. Cameron break; 274525163bd5SWebb Scales case CMD_CTLR_LOCKUP: 274625163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 274725163bd5SWebb Scales break; 2748edd16368SStephen M. Cameron default: 2749d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2750d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2751edd16368SStephen M. Cameron ei->CommandStatus); 2752edd16368SStephen M. Cameron } 2753edd16368SStephen M. Cameron } 2754edd16368SStephen M. Cameron 2755edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2756b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2757edd16368SStephen M. Cameron unsigned char bufsize) 2758edd16368SStephen M. Cameron { 2759edd16368SStephen M. Cameron int rc = IO_OK; 2760edd16368SStephen M. Cameron struct CommandList *c; 2761edd16368SStephen M. Cameron struct ErrorInfo *ei; 2762edd16368SStephen M. Cameron 276345fcb86eSStephen Cameron c = cmd_alloc(h); 2764edd16368SStephen M. Cameron 2765a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2766a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2767a2dac136SStephen M. Cameron rc = -1; 2768a2dac136SStephen M. Cameron goto out; 2769a2dac136SStephen M. Cameron } 277025163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 277125163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 277225163bd5SWebb Scales if (rc) 277325163bd5SWebb Scales goto out; 2774edd16368SStephen M. Cameron ei = c->err_info; 2775edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2776d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2777edd16368SStephen M. Cameron rc = -1; 2778edd16368SStephen M. Cameron } 2779a2dac136SStephen M. Cameron out: 278045fcb86eSStephen Cameron cmd_free(h, c); 2781edd16368SStephen M. Cameron return rc; 2782edd16368SStephen M. Cameron } 2783edd16368SStephen M. Cameron 2784bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 278525163bd5SWebb Scales u8 reset_type, int reply_queue) 2786edd16368SStephen M. Cameron { 2787edd16368SStephen M. Cameron int rc = IO_OK; 2788edd16368SStephen M. Cameron struct CommandList *c; 2789edd16368SStephen M. Cameron struct ErrorInfo *ei; 2790edd16368SStephen M. Cameron 279145fcb86eSStephen Cameron c = cmd_alloc(h); 2792edd16368SStephen M. Cameron 2793edd16368SStephen M. Cameron 2794a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 27950b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2796bf711ac6SScott Teel scsi3addr, TYPE_MSG); 279725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 279825163bd5SWebb Scales if (rc) { 279925163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 280025163bd5SWebb Scales goto out; 280125163bd5SWebb Scales } 2802edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2803edd16368SStephen M. Cameron 2804edd16368SStephen M. Cameron ei = c->err_info; 2805edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2806d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2807edd16368SStephen M. Cameron rc = -1; 2808edd16368SStephen M. Cameron } 280925163bd5SWebb Scales out: 281045fcb86eSStephen Cameron cmd_free(h, c); 2811edd16368SStephen M. Cameron return rc; 2812edd16368SStephen M. Cameron } 2813edd16368SStephen M. Cameron 2814d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2815d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2816d604f533SWebb Scales unsigned char *scsi3addr) 2817d604f533SWebb Scales { 2818d604f533SWebb Scales int i; 2819d604f533SWebb Scales bool match = false; 2820d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2821d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2822d604f533SWebb Scales 2823d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2824d604f533SWebb Scales return false; 2825d604f533SWebb Scales 2826d604f533SWebb Scales switch (c->cmd_type) { 2827d604f533SWebb Scales case CMD_SCSI: 2828d604f533SWebb Scales case CMD_IOCTL_PEND: 2829d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2830d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2831d604f533SWebb Scales break; 2832d604f533SWebb Scales 2833d604f533SWebb Scales case CMD_IOACCEL1: 2834d604f533SWebb Scales case CMD_IOACCEL2: 2835d604f533SWebb Scales if (c->phys_disk == dev) { 2836d604f533SWebb Scales /* HBA mode match */ 2837d604f533SWebb Scales match = true; 2838d604f533SWebb Scales } else { 2839d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2840d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2841d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2842d604f533SWebb Scales * instead. */ 2843d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2844d604f533SWebb Scales /* FIXME: an alternate test might be 2845d604f533SWebb Scales * 2846d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2847d604f533SWebb Scales * == c2->scsi_nexus; */ 2848d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2849d604f533SWebb Scales } 2850d604f533SWebb Scales } 2851d604f533SWebb Scales break; 2852d604f533SWebb Scales 2853d604f533SWebb Scales case IOACCEL2_TMF: 2854d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2855d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2856d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2857d604f533SWebb Scales } 2858d604f533SWebb Scales break; 2859d604f533SWebb Scales 2860d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2861d604f533SWebb Scales match = false; 2862d604f533SWebb Scales break; 2863d604f533SWebb Scales 2864d604f533SWebb Scales default: 2865d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2866d604f533SWebb Scales c->cmd_type); 2867d604f533SWebb Scales BUG(); 2868d604f533SWebb Scales } 2869d604f533SWebb Scales 2870d604f533SWebb Scales return match; 2871d604f533SWebb Scales } 2872d604f533SWebb Scales 2873d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 2874d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 2875d604f533SWebb Scales { 2876d604f533SWebb Scales int i; 2877d604f533SWebb Scales int rc = 0; 2878d604f533SWebb Scales 2879d604f533SWebb Scales /* We can really only handle one reset at a time */ 2880d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 2881d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 2882d604f533SWebb Scales return -EINTR; 2883d604f533SWebb Scales } 2884d604f533SWebb Scales 2885d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 2886d604f533SWebb Scales 2887d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2888d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 2889d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 2890d604f533SWebb Scales 2891d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 2892d604f533SWebb Scales unsigned long flags; 2893d604f533SWebb Scales 2894d604f533SWebb Scales /* 2895d604f533SWebb Scales * Mark the target command as having a reset pending, 2896d604f533SWebb Scales * then lock a lock so that the command cannot complete 2897d604f533SWebb Scales * while we're considering it. If the command is not 2898d604f533SWebb Scales * idle then count it; otherwise revoke the event. 2899d604f533SWebb Scales */ 2900d604f533SWebb Scales c->reset_pending = dev; 2901d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 2902d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 2903d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 2904d604f533SWebb Scales else 2905d604f533SWebb Scales c->reset_pending = NULL; 2906d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2907d604f533SWebb Scales } 2908d604f533SWebb Scales 2909d604f533SWebb Scales cmd_free(h, c); 2910d604f533SWebb Scales } 2911d604f533SWebb Scales 2912d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 2913d604f533SWebb Scales if (!rc) 2914d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 2915d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 2916d604f533SWebb Scales lockup_detected(h)); 2917d604f533SWebb Scales 2918d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 2919d604f533SWebb Scales dev_warn(&h->pdev->dev, 2920d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 2921d604f533SWebb Scales rc = -ENODEV; 2922d604f533SWebb Scales } 2923d604f533SWebb Scales 2924d604f533SWebb Scales if (unlikely(rc)) 2925d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 2926d604f533SWebb Scales 2927d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 2928d604f533SWebb Scales return rc; 2929d604f533SWebb Scales } 2930d604f533SWebb Scales 2931edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 2932edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 2933edd16368SStephen M. Cameron { 2934edd16368SStephen M. Cameron int rc; 2935edd16368SStephen M. Cameron unsigned char *buf; 2936edd16368SStephen M. Cameron 2937edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2938edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 2939edd16368SStephen M. Cameron if (!buf) 2940edd16368SStephen M. Cameron return; 2941b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 2942edd16368SStephen M. Cameron if (rc == 0) 2943edd16368SStephen M. Cameron *raid_level = buf[8]; 2944edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 2945edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2946edd16368SStephen M. Cameron kfree(buf); 2947edd16368SStephen M. Cameron return; 2948edd16368SStephen M. Cameron } 2949edd16368SStephen M. Cameron 2950283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 2951283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 2952283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 2953283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 2954283b4a9bSStephen M. Cameron { 2955283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 2956283b4a9bSStephen M. Cameron int map, row, col; 2957283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 2958283b4a9bSStephen M. Cameron 2959283b4a9bSStephen M. Cameron if (rc != 0) 2960283b4a9bSStephen M. Cameron return; 2961283b4a9bSStephen M. Cameron 29622ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 29632ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 29642ba8bfc8SStephen M. Cameron return; 29652ba8bfc8SStephen M. Cameron 2966283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 2967283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 2968283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 2969283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 2970283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 2971283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 2972283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 2973283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 2974283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 2975283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 2976283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 2977283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 2978283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 2979283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 2980283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 2981283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 2982283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 2983283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 2984283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 2985283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 2986283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 2987283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 2988283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 2989283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 29902b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 2991dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 29922b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 29932b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 29942b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 2995dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 2996dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 2997283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 2998283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 2999283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3000283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3001283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3002283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3003283b4a9bSStephen M. Cameron disks_per_row = 3004283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3005283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3006283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3007283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3008283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3009283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3010283b4a9bSStephen M. Cameron disks_per_row = 3011283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3012283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3013283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3014283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3015283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3016283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3017283b4a9bSStephen M. Cameron } 3018283b4a9bSStephen M. Cameron } 3019283b4a9bSStephen M. Cameron } 3020283b4a9bSStephen M. Cameron #else 3021283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3022283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3023283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3024283b4a9bSStephen M. Cameron { 3025283b4a9bSStephen M. Cameron } 3026283b4a9bSStephen M. Cameron #endif 3027283b4a9bSStephen M. Cameron 3028283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3029283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3030283b4a9bSStephen M. Cameron { 3031283b4a9bSStephen M. Cameron int rc = 0; 3032283b4a9bSStephen M. Cameron struct CommandList *c; 3033283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3034283b4a9bSStephen M. Cameron 303545fcb86eSStephen Cameron c = cmd_alloc(h); 3036bf43caf3SRobert Elliott 3037283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3038283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3039283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 30402dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 30412dd02d74SRobert Elliott cmd_free(h, c); 30422dd02d74SRobert Elliott return -1; 3043283b4a9bSStephen M. Cameron } 304425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 304525163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 304625163bd5SWebb Scales if (rc) 304725163bd5SWebb Scales goto out; 3048283b4a9bSStephen M. Cameron ei = c->err_info; 3049283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3050d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 305125163bd5SWebb Scales rc = -1; 305225163bd5SWebb Scales goto out; 3053283b4a9bSStephen M. Cameron } 305445fcb86eSStephen Cameron cmd_free(h, c); 3055283b4a9bSStephen M. Cameron 3056283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3057283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3058283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3059283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3060283b4a9bSStephen M. Cameron rc = -1; 3061283b4a9bSStephen M. Cameron } 3062283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3063283b4a9bSStephen M. Cameron return rc; 306425163bd5SWebb Scales out: 306525163bd5SWebb Scales cmd_free(h, c); 306625163bd5SWebb Scales return rc; 3067283b4a9bSStephen M. Cameron } 3068283b4a9bSStephen M. Cameron 306966749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 307066749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 307166749d0dSScott Teel { 307266749d0dSScott Teel int rc = IO_OK; 307366749d0dSScott Teel struct CommandList *c; 307466749d0dSScott Teel struct ErrorInfo *ei; 307566749d0dSScott Teel 307666749d0dSScott Teel c = cmd_alloc(h); 307766749d0dSScott Teel 307866749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 307966749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 308066749d0dSScott Teel if (rc) 308166749d0dSScott Teel goto out; 308266749d0dSScott Teel 308366749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 308466749d0dSScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 308566749d0dSScott Teel if (rc) 308666749d0dSScott Teel goto out; 308766749d0dSScott Teel ei = c->err_info; 308866749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 308966749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 309066749d0dSScott Teel rc = -1; 309166749d0dSScott Teel } 309266749d0dSScott Teel out: 309366749d0dSScott Teel cmd_free(h, c); 309466749d0dSScott Teel return rc; 309566749d0dSScott Teel } 309666749d0dSScott Teel 309766749d0dSScott Teel 309803383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 309903383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 310003383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 310103383736SDon Brace { 310203383736SDon Brace int rc = IO_OK; 310303383736SDon Brace struct CommandList *c; 310403383736SDon Brace struct ErrorInfo *ei; 310503383736SDon Brace 310603383736SDon Brace c = cmd_alloc(h); 310703383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 310803383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 310903383736SDon Brace if (rc) 311003383736SDon Brace goto out; 311103383736SDon Brace 311203383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 311303383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 311403383736SDon Brace 311525163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 311625163bd5SWebb Scales NO_TIMEOUT); 311703383736SDon Brace ei = c->err_info; 311803383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 311903383736SDon Brace hpsa_scsi_interpret_error(h, c); 312003383736SDon Brace rc = -1; 312103383736SDon Brace } 312203383736SDon Brace out: 312303383736SDon Brace cmd_free(h, c); 312403383736SDon Brace return rc; 312503383736SDon Brace } 312603383736SDon Brace 31271b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 31281b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 31291b70150aSStephen M. Cameron { 31301b70150aSStephen M. Cameron int rc; 31311b70150aSStephen M. Cameron int i; 31321b70150aSStephen M. Cameron int pages; 31331b70150aSStephen M. Cameron unsigned char *buf, bufsize; 31341b70150aSStephen M. Cameron 31351b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 31361b70150aSStephen M. Cameron if (!buf) 31371b70150aSStephen M. Cameron return 0; 31381b70150aSStephen M. Cameron 31391b70150aSStephen M. Cameron /* Get the size of the page list first */ 31401b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 31411b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 31421b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 31431b70150aSStephen M. Cameron if (rc != 0) 31441b70150aSStephen M. Cameron goto exit_unsupported; 31451b70150aSStephen M. Cameron pages = buf[3]; 31461b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 31471b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 31481b70150aSStephen M. Cameron else 31491b70150aSStephen M. Cameron bufsize = 255; 31501b70150aSStephen M. Cameron 31511b70150aSStephen M. Cameron /* Get the whole VPD page list */ 31521b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 31531b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 31541b70150aSStephen M. Cameron buf, bufsize); 31551b70150aSStephen M. Cameron if (rc != 0) 31561b70150aSStephen M. Cameron goto exit_unsupported; 31571b70150aSStephen M. Cameron 31581b70150aSStephen M. Cameron pages = buf[3]; 31591b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 31601b70150aSStephen M. Cameron if (buf[3 + i] == page) 31611b70150aSStephen M. Cameron goto exit_supported; 31621b70150aSStephen M. Cameron exit_unsupported: 31631b70150aSStephen M. Cameron kfree(buf); 31641b70150aSStephen M. Cameron return 0; 31651b70150aSStephen M. Cameron exit_supported: 31661b70150aSStephen M. Cameron kfree(buf); 31671b70150aSStephen M. Cameron return 1; 31681b70150aSStephen M. Cameron } 31691b70150aSStephen M. Cameron 3170283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3171283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3172283b4a9bSStephen M. Cameron { 3173283b4a9bSStephen M. Cameron int rc; 3174283b4a9bSStephen M. Cameron unsigned char *buf; 3175283b4a9bSStephen M. Cameron u8 ioaccel_status; 3176283b4a9bSStephen M. Cameron 3177283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3178283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 317941ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3180283b4a9bSStephen M. Cameron 3181283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3182283b4a9bSStephen M. Cameron if (!buf) 3183283b4a9bSStephen M. Cameron return; 31841b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 31851b70150aSStephen M. Cameron goto out; 3186283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3187b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3188283b4a9bSStephen M. Cameron if (rc != 0) 3189283b4a9bSStephen M. Cameron goto out; 3190283b4a9bSStephen M. Cameron 3191283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3192283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3193283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3194283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3195283b4a9bSStephen M. Cameron this_device->offload_config = 3196283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3197283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3198283b4a9bSStephen M. Cameron this_device->offload_enabled = 3199283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3200283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3201283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3202283b4a9bSStephen M. Cameron } 320341ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3204283b4a9bSStephen M. Cameron out: 3205283b4a9bSStephen M. Cameron kfree(buf); 3206283b4a9bSStephen M. Cameron return; 3207283b4a9bSStephen M. Cameron } 3208283b4a9bSStephen M. Cameron 3209edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3210edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 321175d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3212edd16368SStephen M. Cameron { 3213edd16368SStephen M. Cameron int rc; 3214edd16368SStephen M. Cameron unsigned char *buf; 3215edd16368SStephen M. Cameron 3216edd16368SStephen M. Cameron if (buflen > 16) 3217edd16368SStephen M. Cameron buflen = 16; 3218edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3219edd16368SStephen M. Cameron if (!buf) 3220a84d794dSStephen M. Cameron return -ENOMEM; 3221b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3222edd16368SStephen M. Cameron if (rc == 0) 322375d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 322475d23d89SDon Brace 3225edd16368SStephen M. Cameron kfree(buf); 322675d23d89SDon Brace 3227edd16368SStephen M. Cameron return rc != 0; 3228edd16368SStephen M. Cameron } 3229edd16368SStephen M. Cameron 3230edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 323103383736SDon Brace void *buf, int bufsize, 3232edd16368SStephen M. Cameron int extended_response) 3233edd16368SStephen M. Cameron { 3234edd16368SStephen M. Cameron int rc = IO_OK; 3235edd16368SStephen M. Cameron struct CommandList *c; 3236edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3237edd16368SStephen M. Cameron struct ErrorInfo *ei; 3238edd16368SStephen M. Cameron 323945fcb86eSStephen Cameron c = cmd_alloc(h); 3240bf43caf3SRobert Elliott 3241e89c0ae7SStephen M. Cameron /* address the controller */ 3242e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3243a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3244a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3245a2dac136SStephen M. Cameron rc = -1; 3246a2dac136SStephen M. Cameron goto out; 3247a2dac136SStephen M. Cameron } 3248edd16368SStephen M. Cameron if (extended_response) 3249edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 325025163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 325125163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 325225163bd5SWebb Scales if (rc) 325325163bd5SWebb Scales goto out; 3254edd16368SStephen M. Cameron ei = c->err_info; 3255edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3256edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3257d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3258edd16368SStephen M. Cameron rc = -1; 3259283b4a9bSStephen M. Cameron } else { 326003383736SDon Brace struct ReportLUNdata *rld = buf; 326103383736SDon Brace 326203383736SDon Brace if (rld->extended_response_flag != extended_response) { 3263283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3264283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3265283b4a9bSStephen M. Cameron extended_response, 326603383736SDon Brace rld->extended_response_flag); 3267283b4a9bSStephen M. Cameron rc = -1; 3268283b4a9bSStephen M. Cameron } 3269edd16368SStephen M. Cameron } 3270a2dac136SStephen M. Cameron out: 327145fcb86eSStephen Cameron cmd_free(h, c); 3272edd16368SStephen M. Cameron return rc; 3273edd16368SStephen M. Cameron } 3274edd16368SStephen M. Cameron 3275edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 327603383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3277edd16368SStephen M. Cameron { 327803383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 327903383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3280edd16368SStephen M. Cameron } 3281edd16368SStephen M. Cameron 3282edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3283edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3284edd16368SStephen M. Cameron { 3285edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3286edd16368SStephen M. Cameron } 3287edd16368SStephen M. Cameron 3288edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3289edd16368SStephen M. Cameron int bus, int target, int lun) 3290edd16368SStephen M. Cameron { 3291edd16368SStephen M. Cameron device->bus = bus; 3292edd16368SStephen M. Cameron device->target = target; 3293edd16368SStephen M. Cameron device->lun = lun; 3294edd16368SStephen M. Cameron } 3295edd16368SStephen M. Cameron 32969846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 32979846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 32989846590eSStephen M. Cameron unsigned char scsi3addr[]) 32999846590eSStephen M. Cameron { 33009846590eSStephen M. Cameron int rc; 33019846590eSStephen M. Cameron int status; 33029846590eSStephen M. Cameron int size; 33039846590eSStephen M. Cameron unsigned char *buf; 33049846590eSStephen M. Cameron 33059846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 33069846590eSStephen M. Cameron if (!buf) 33079846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 33089846590eSStephen M. Cameron 33099846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 331024a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 33119846590eSStephen M. Cameron goto exit_failed; 33129846590eSStephen M. Cameron 33139846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 33149846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 33159846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 331624a4b078SStephen M. Cameron if (rc != 0) 33179846590eSStephen M. Cameron goto exit_failed; 33189846590eSStephen M. Cameron size = buf[3]; 33199846590eSStephen M. Cameron 33209846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 33219846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 33229846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 332324a4b078SStephen M. Cameron if (rc != 0) 33249846590eSStephen M. Cameron goto exit_failed; 33259846590eSStephen M. Cameron status = buf[4]; /* status byte */ 33269846590eSStephen M. Cameron 33279846590eSStephen M. Cameron kfree(buf); 33289846590eSStephen M. Cameron return status; 33299846590eSStephen M. Cameron exit_failed: 33309846590eSStephen M. Cameron kfree(buf); 33319846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 33329846590eSStephen M. Cameron } 33339846590eSStephen M. Cameron 33349846590eSStephen M. Cameron /* Determine offline status of a volume. 33359846590eSStephen M. Cameron * Return either: 33369846590eSStephen M. Cameron * 0 (not offline) 333767955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 33389846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 33399846590eSStephen M. Cameron * describing why a volume is to be kept offline) 33409846590eSStephen M. Cameron */ 334167955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 33429846590eSStephen M. Cameron unsigned char scsi3addr[]) 33439846590eSStephen M. Cameron { 33449846590eSStephen M. Cameron struct CommandList *c; 33459437ac43SStephen Cameron unsigned char *sense; 33469437ac43SStephen Cameron u8 sense_key, asc, ascq; 33479437ac43SStephen Cameron int sense_len; 334825163bd5SWebb Scales int rc, ldstat = 0; 33499846590eSStephen M. Cameron u16 cmd_status; 33509846590eSStephen M. Cameron u8 scsi_status; 33519846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 33529846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 33539846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 33549846590eSStephen M. Cameron 33559846590eSStephen M. Cameron c = cmd_alloc(h); 3356bf43caf3SRobert Elliott 33579846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 335825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 335925163bd5SWebb Scales if (rc) { 336025163bd5SWebb Scales cmd_free(h, c); 336125163bd5SWebb Scales return 0; 336225163bd5SWebb Scales } 33639846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 33649437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 33659437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 33669437ac43SStephen Cameron else 33679437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 33689437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 33699846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 33709846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 33719846590eSStephen M. Cameron cmd_free(h, c); 33729846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 33739846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 33749846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 33759846590eSStephen M. Cameron sense_key != NOT_READY || 33769846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 33779846590eSStephen M. Cameron return 0; 33789846590eSStephen M. Cameron } 33799846590eSStephen M. Cameron 33809846590eSStephen M. Cameron /* Determine the reason for not ready state */ 33819846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 33829846590eSStephen M. Cameron 33839846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 33849846590eSStephen M. Cameron switch (ldstat) { 33859846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 33865ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 33879846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 33889846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 33899846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 33909846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 33919846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 33929846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 33939846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 33949846590eSStephen M. Cameron return ldstat; 33959846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 33969846590eSStephen M. Cameron /* If VPD status page isn't available, 33979846590eSStephen M. Cameron * use ASC/ASCQ to determine state 33989846590eSStephen M. Cameron */ 33999846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 34009846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 34019846590eSStephen M. Cameron return ldstat; 34029846590eSStephen M. Cameron break; 34039846590eSStephen M. Cameron default: 34049846590eSStephen M. Cameron break; 34059846590eSStephen M. Cameron } 34069846590eSStephen M. Cameron return 0; 34079846590eSStephen M. Cameron } 34089846590eSStephen M. Cameron 34099b5c48c2SStephen Cameron /* 34109b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 34119b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 34129b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 34139b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 34149b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 34159b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 34169b5c48c2SStephen Cameron */ 34179b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 34189b5c48c2SStephen Cameron unsigned char *scsi3addr) 34199b5c48c2SStephen Cameron { 34209b5c48c2SStephen Cameron struct CommandList *c; 34219b5c48c2SStephen Cameron struct ErrorInfo *ei; 34229b5c48c2SStephen Cameron int rc = 0; 34239b5c48c2SStephen Cameron 34249b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 34259b5c48c2SStephen Cameron 34269b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 34279b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 34289b5c48c2SStephen Cameron return 1; 34299b5c48c2SStephen Cameron 34309b5c48c2SStephen Cameron c = cmd_alloc(h); 3431bf43caf3SRobert Elliott 34329b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 34339b5c48c2SStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 34349b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 34359b5c48c2SStephen Cameron ei = c->err_info; 34369b5c48c2SStephen Cameron switch (ei->CommandStatus) { 34379b5c48c2SStephen Cameron case CMD_INVALID: 34389b5c48c2SStephen Cameron rc = 0; 34399b5c48c2SStephen Cameron break; 34409b5c48c2SStephen Cameron case CMD_UNABORTABLE: 34419b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 34429b5c48c2SStephen Cameron rc = 1; 34439b5c48c2SStephen Cameron break; 34449437ac43SStephen Cameron case CMD_TMF_STATUS: 34459437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 34469437ac43SStephen Cameron break; 34479b5c48c2SStephen Cameron default: 34489b5c48c2SStephen Cameron rc = 0; 34499b5c48c2SStephen Cameron break; 34509b5c48c2SStephen Cameron } 34519b5c48c2SStephen Cameron cmd_free(h, c); 34529b5c48c2SStephen Cameron return rc; 34539b5c48c2SStephen Cameron } 34549b5c48c2SStephen Cameron 345575d23d89SDon Brace static void sanitize_inquiry_string(unsigned char *s, int len) 345675d23d89SDon Brace { 345775d23d89SDon Brace bool terminated = false; 345875d23d89SDon Brace 345975d23d89SDon Brace for (; len > 0; (--len, ++s)) { 346075d23d89SDon Brace if (*s == 0) 346175d23d89SDon Brace terminated = true; 346275d23d89SDon Brace if (terminated || *s < 0x20 || *s > 0x7e) 346375d23d89SDon Brace *s = ' '; 346475d23d89SDon Brace } 346575d23d89SDon Brace } 346675d23d89SDon Brace 3467edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 34680b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 34690b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3470edd16368SStephen M. Cameron { 34710b0e1d6cSStephen M. Cameron 34720b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 34730b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 34740b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 34750b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 34760b0e1d6cSStephen M. Cameron 3477ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 34780b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3479683fc444SDon Brace int rc = 0; 3480edd16368SStephen M. Cameron 3481ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3482683fc444SDon Brace if (!inq_buff) { 3483683fc444SDon Brace rc = -ENOMEM; 3484edd16368SStephen M. Cameron goto bail_out; 3485683fc444SDon Brace } 3486edd16368SStephen M. Cameron 3487edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3488edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3489edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3490edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3491edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3492edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3493683fc444SDon Brace rc = -EIO; 3494edd16368SStephen M. Cameron goto bail_out; 3495edd16368SStephen M. Cameron } 3496edd16368SStephen M. Cameron 349775d23d89SDon Brace sanitize_inquiry_string(&inq_buff[8], 8); 349875d23d89SDon Brace sanitize_inquiry_string(&inq_buff[16], 16); 349975d23d89SDon Brace 3500edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3501edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3502edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3503edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3504edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3505edd16368SStephen M. Cameron sizeof(this_device->model)); 3506edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3507edd16368SStephen M. Cameron sizeof(this_device->device_id)); 350875d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3509edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3510edd16368SStephen M. Cameron 3511edd16368SStephen M. Cameron if (this_device->devtype == TYPE_DISK && 3512283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 351367955ba3SStephen M. Cameron int volume_offline; 351467955ba3SStephen M. Cameron 3515edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3516283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3517283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 351867955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 351967955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 352067955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 352167955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3522283b4a9bSStephen M. Cameron } else { 3523edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3524283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3525283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 352641ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3527a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 35289846590eSStephen M. Cameron this_device->volume_offline = 0; 352903383736SDon Brace this_device->queue_depth = h->nr_cmds; 3530283b4a9bSStephen M. Cameron } 3531edd16368SStephen M. Cameron 35320b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 35330b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 35340b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 35350b0e1d6cSStephen M. Cameron */ 35360b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 35370b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 35380b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 35390b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 35400b0e1d6cSStephen M. Cameron } 3541edd16368SStephen M. Cameron kfree(inq_buff); 3542edd16368SStephen M. Cameron return 0; 3543edd16368SStephen M. Cameron 3544edd16368SStephen M. Cameron bail_out: 3545edd16368SStephen M. Cameron kfree(inq_buff); 3546683fc444SDon Brace return rc; 3547edd16368SStephen M. Cameron } 3548edd16368SStephen M. Cameron 35499b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 35509b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 35519b5c48c2SStephen Cameron { 35529b5c48c2SStephen Cameron unsigned long flags; 35539b5c48c2SStephen Cameron int rc, entry; 35549b5c48c2SStephen Cameron /* 35559b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 35569b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 35579b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 35589b5c48c2SStephen Cameron */ 35599b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 35609b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 35619b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 35629b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 35639b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 35649b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 35659b5c48c2SStephen Cameron } else { 35669b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 35679b5c48c2SStephen Cameron dev->supports_aborts = 35689b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 35699b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 35709b5c48c2SStephen Cameron dev->supports_aborts = 0; 35719b5c48c2SStephen Cameron } 35729b5c48c2SStephen Cameron } 35739b5c48c2SStephen Cameron 3574c795505aSKevin Barnett /* 3575c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3576edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3577edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3578edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3579edd16368SStephen M. Cameron */ 3580edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 35811f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3582edd16368SStephen M. Cameron { 3583c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3584edd16368SStephen M. Cameron 35851f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 35861f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 35871f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3588c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3589c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 35901f310bdeSStephen M. Cameron else 35911f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3592c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3593c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 35941f310bdeSStephen M. Cameron return; 35951f310bdeSStephen M. Cameron } 35961f310bdeSStephen M. Cameron /* It's a logical device */ 359766749d0dSScott Teel if (device->external) { 35981f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3599c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3600c795505aSKevin Barnett lunid & 0x00ff); 36011f310bdeSStephen M. Cameron return; 3602339b2b14SStephen M. Cameron } 3603c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3604c795505aSKevin Barnett 0, lunid & 0x3fff); 3605edd16368SStephen M. Cameron } 3606edd16368SStephen M. Cameron 3607edd16368SStephen M. Cameron 3608edd16368SStephen M. Cameron /* 360954b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 361054b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 361154b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 361254b6e9e9SScott Teel * 3. Return: 361354b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 361454b6e9e9SScott Teel * 0 if no matching physical disk was found. 361554b6e9e9SScott Teel */ 361654b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 361754b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 361854b6e9e9SScott Teel { 361941ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 362041ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 362141ce4c35SStephen Cameron unsigned long flags; 362254b6e9e9SScott Teel int i; 362354b6e9e9SScott Teel 362441ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 362541ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 362641ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 362741ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 362841ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 362941ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 363054b6e9e9SScott Teel return 1; 363154b6e9e9SScott Teel } 363241ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 363341ce4c35SStephen Cameron return 0; 363441ce4c35SStephen Cameron } 363541ce4c35SStephen Cameron 363666749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 363766749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 363866749d0dSScott Teel { 363966749d0dSScott Teel /* In report logicals, local logicals are listed first, 364066749d0dSScott Teel * then any externals. 364166749d0dSScott Teel */ 364266749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 364366749d0dSScott Teel 364466749d0dSScott Teel if (i == raid_ctlr_position) 364566749d0dSScott Teel return 0; 364666749d0dSScott Teel 364766749d0dSScott Teel if (i < logicals_start) 364866749d0dSScott Teel return 0; 364966749d0dSScott Teel 365066749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 365166749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 365266749d0dSScott Teel return 0; 365366749d0dSScott Teel 365466749d0dSScott Teel return 1; /* it's an external lun */ 365566749d0dSScott Teel } 365666749d0dSScott Teel 365754b6e9e9SScott Teel /* 3658edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3659edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3660edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3661edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3662edd16368SStephen M. Cameron */ 3663edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 366403383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 366501a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3666edd16368SStephen M. Cameron { 366703383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3668edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3669edd16368SStephen M. Cameron return -1; 3670edd16368SStephen M. Cameron } 367103383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3672edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 367303383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 367403383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3675edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3676edd16368SStephen M. Cameron } 367703383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3678edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3679edd16368SStephen M. Cameron return -1; 3680edd16368SStephen M. Cameron } 36816df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3682edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3683edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3684edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3685edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3686edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3687edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3688edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3689edd16368SStephen M. Cameron } 3690edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3691edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3692edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3693edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3694edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3695edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3696edd16368SStephen M. Cameron } 3697edd16368SStephen M. Cameron return 0; 3698edd16368SStephen M. Cameron } 3699edd16368SStephen M. Cameron 370042a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 370142a91641SDon Brace int i, int nphysicals, int nlogicals, 3702a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 3703339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 3704339b2b14SStephen M. Cameron { 3705339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 3706339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 3707339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 3708339b2b14SStephen M. Cameron */ 3709339b2b14SStephen M. Cameron 3710339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 3711339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3712339b2b14SStephen M. Cameron 3713339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 3714339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 3715339b2b14SStephen M. Cameron 3716339b2b14SStephen M. Cameron if (i < logicals_start) 3717d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 3718d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 3719339b2b14SStephen M. Cameron 3720339b2b14SStephen M. Cameron if (i < last_device) 3721339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 3722339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 3723339b2b14SStephen M. Cameron BUG(); 3724339b2b14SStephen M. Cameron return NULL; 3725339b2b14SStephen M. Cameron } 3726339b2b14SStephen M. Cameron 372703383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 372803383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 372903383736SDon Brace struct hpsa_scsi_dev_t *dev, 3730f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 373103383736SDon Brace struct bmic_identify_physical_device *id_phys) 373203383736SDon Brace { 373303383736SDon Brace int rc; 3734f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 373503383736SDon Brace 373603383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 3737f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3738a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 373903383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 3740f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3741f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 374203383736SDon Brace sizeof(*id_phys)); 374303383736SDon Brace if (!rc) 374403383736SDon Brace /* Reserve space for FW operations */ 374503383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 374603383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 374703383736SDon Brace dev->queue_depth = 374803383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 374903383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 375003383736SDon Brace else 375103383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 375203383736SDon Brace } 375303383736SDon Brace 37548270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 3755f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 37568270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 37578270b862SJoe Handzik { 3758f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3759f2039b03SDon Brace 3760f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 37618270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 37628270b862SJoe Handzik 37638270b862SJoe Handzik memcpy(&this_device->active_path_index, 37648270b862SJoe Handzik &id_phys->active_path_number, 37658270b862SJoe Handzik sizeof(this_device->active_path_index)); 37668270b862SJoe Handzik memcpy(&this_device->path_map, 37678270b862SJoe Handzik &id_phys->redundant_path_present_map, 37688270b862SJoe Handzik sizeof(this_device->path_map)); 37698270b862SJoe Handzik memcpy(&this_device->box, 37708270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 37718270b862SJoe Handzik sizeof(this_device->box)); 37728270b862SJoe Handzik memcpy(&this_device->phys_connector, 37738270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 37748270b862SJoe Handzik sizeof(this_device->phys_connector)); 37758270b862SJoe Handzik memcpy(&this_device->bay, 37768270b862SJoe Handzik &id_phys->phys_bay_in_box, 37778270b862SJoe Handzik sizeof(this_device->bay)); 37788270b862SJoe Handzik } 37798270b862SJoe Handzik 378066749d0dSScott Teel /* get number of local logical disks. */ 378166749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 378266749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 378366749d0dSScott Teel u32 *nlocals) 378466749d0dSScott Teel { 378566749d0dSScott Teel int rc; 378666749d0dSScott Teel 378766749d0dSScott Teel if (!id_ctlr) { 378866749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 378966749d0dSScott Teel __func__); 379066749d0dSScott Teel return -ENOMEM; 379166749d0dSScott Teel } 379266749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 379366749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 379466749d0dSScott Teel if (!rc) 379566749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 379666749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 379766749d0dSScott Teel else 379866749d0dSScott Teel *nlocals = le16_to_cpu( 379966749d0dSScott Teel id_ctlr->extended_logical_unit_count); 380066749d0dSScott Teel else 380166749d0dSScott Teel *nlocals = -1; 380266749d0dSScott Teel return rc; 380366749d0dSScott Teel } 380466749d0dSScott Teel 380566749d0dSScott Teel 38068aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 3807edd16368SStephen M. Cameron { 3808edd16368SStephen M. Cameron /* the idea here is we could get notified 3809edd16368SStephen M. Cameron * that some devices have changed, so we do a report 3810edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 3811edd16368SStephen M. Cameron * our list of devices accordingly. 3812edd16368SStephen M. Cameron * 3813edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 3814edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 3815edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 3816edd16368SStephen M. Cameron * devices, vs. disappearing devices. 3817edd16368SStephen M. Cameron */ 3818a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 3819edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 382003383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 382166749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 382201a02ffcSStephen M. Cameron u32 nphysicals = 0; 382301a02ffcSStephen M. Cameron u32 nlogicals = 0; 382466749d0dSScott Teel u32 nlocal_logicals = 0; 382501a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 3826edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 3827edd16368SStephen M. Cameron int ncurrent = 0; 38284f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 3829339b2b14SStephen M. Cameron int raid_ctlr_position; 383004fa2f44SKevin Barnett bool physical_device; 3831aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 3832edd16368SStephen M. Cameron 3833cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 383492084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 383592084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 3836edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 383703383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 383866749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 3839edd16368SStephen M. Cameron 384003383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 384166749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 3842edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 3843edd16368SStephen M. Cameron goto out; 3844edd16368SStephen M. Cameron } 3845edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 3846edd16368SStephen M. Cameron 3847853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 3848853633e8SDon Brace 384903383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 3850853633e8SDon Brace logdev_list, &nlogicals)) { 3851853633e8SDon Brace h->drv_req_rescan = 1; 3852edd16368SStephen M. Cameron goto out; 3853853633e8SDon Brace } 3854edd16368SStephen M. Cameron 385566749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 385666749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 385766749d0dSScott Teel dev_warn(&h->pdev->dev, 385866749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 385966749d0dSScott Teel __func__); 386066749d0dSScott Teel } 386166749d0dSScott Teel 3862aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 3863aca4a520SScott Teel * plus external target devices, and a device for the local RAID 3864aca4a520SScott Teel * controller. 3865edd16368SStephen M. Cameron */ 3866aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 3867edd16368SStephen M. Cameron 3868edd16368SStephen M. Cameron /* Allocate the per device structures */ 3869edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 3870b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 3871b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 3872b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 3873b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 3874b7ec021fSScott Teel break; 3875b7ec021fSScott Teel } 3876b7ec021fSScott Teel 3877edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 3878edd16368SStephen M. Cameron if (!currentsd[i]) { 3879edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 3880edd16368SStephen M. Cameron __FILE__, __LINE__); 3881853633e8SDon Brace h->drv_req_rescan = 1; 3882edd16368SStephen M. Cameron goto out; 3883edd16368SStephen M. Cameron } 3884edd16368SStephen M. Cameron ndev_allocated++; 3885edd16368SStephen M. Cameron } 3886edd16368SStephen M. Cameron 38878645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 3888339b2b14SStephen M. Cameron raid_ctlr_position = 0; 3889339b2b14SStephen M. Cameron else 3890339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 3891339b2b14SStephen M. Cameron 3892edd16368SStephen M. Cameron /* adjust our table of devices */ 38934f4eb9f1SScott Teel n_ext_target_devs = 0; 3894edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 38950b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 3896683fc444SDon Brace int rc = 0; 3897f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 3898edd16368SStephen M. Cameron 389904fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 390004fa2f44SKevin Barnett 3901edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 3902339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 3903339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 390441ce4c35SStephen Cameron 390541ce4c35SStephen Cameron /* skip masked non-disk devices */ 390604fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && physical_device && 390704fa2f44SKevin Barnett (physdev_list->LUN[phys_dev_index].device_flags & 0x01)) 3908edd16368SStephen M. Cameron continue; 3909edd16368SStephen M. Cameron 3910edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 3911683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 3912683fc444SDon Brace &is_OBDR); 3913683fc444SDon Brace if (rc == -ENOMEM) { 3914683fc444SDon Brace dev_warn(&h->pdev->dev, 3915683fc444SDon Brace "Out of memory, rescan deferred.\n"); 3916853633e8SDon Brace h->drv_req_rescan = 1; 3917683fc444SDon Brace goto out; 3918853633e8SDon Brace } 3919683fc444SDon Brace if (rc) { 3920683fc444SDon Brace dev_warn(&h->pdev->dev, 3921683fc444SDon Brace "Inquiry failed, skipping device.\n"); 3922683fc444SDon Brace continue; 3923683fc444SDon Brace } 3924683fc444SDon Brace 392566749d0dSScott Teel /* Determine if this is a lun from an external target array */ 392666749d0dSScott Teel tmpdevice->external = 392766749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 392866749d0dSScott Teel nphysicals, nlocal_logicals); 392966749d0dSScott Teel 39301f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 39319b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 3932edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 3933edd16368SStephen M. Cameron 393434592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 393534592254SScott Teel * Event-based change notification is unreliable for those. 393634592254SScott Teel */ 393734592254SScott Teel if (!h->discovery_polling) { 393834592254SScott Teel if (tmpdevice->external) { 393934592254SScott Teel h->discovery_polling = 1; 394034592254SScott Teel dev_info(&h->pdev->dev, 394134592254SScott Teel "External target, activate discovery polling.\n"); 394234592254SScott Teel } 394334592254SScott Teel } 394434592254SScott Teel 394534592254SScott Teel 3946edd16368SStephen M. Cameron *this_device = *tmpdevice; 394704fa2f44SKevin Barnett this_device->physical_device = physical_device; 3948edd16368SStephen M. Cameron 394904fa2f44SKevin Barnett /* 395004fa2f44SKevin Barnett * Expose all devices except for physical devices that 395104fa2f44SKevin Barnett * are masked. 395204fa2f44SKevin Barnett */ 395304fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 39542a168208SKevin Barnett this_device->expose_device = 0; 39552a168208SKevin Barnett else 39562a168208SKevin Barnett this_device->expose_device = 1; 395741ce4c35SStephen Cameron 3958edd16368SStephen M. Cameron switch (this_device->devtype) { 39590b0e1d6cSStephen M. Cameron case TYPE_ROM: 3960edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 3961edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 3962edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 3963edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 3964edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 3965edd16368SStephen M. Cameron * the inquiry data. 3966edd16368SStephen M. Cameron */ 39670b0e1d6cSStephen M. Cameron if (is_OBDR) 3968edd16368SStephen M. Cameron ncurrent++; 3969edd16368SStephen M. Cameron break; 3970edd16368SStephen M. Cameron case TYPE_DISK: 397104fa2f44SKevin Barnett if (this_device->physical_device) { 3972b9092b79SKevin Barnett /* The disk is in HBA mode. */ 3973b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 3974ecf418d1SJoe Handzik this_device->offload_enabled = 0; 397503383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 3976f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 3977f2039b03SDon Brace hpsa_get_path_info(this_device, 3978f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 3979b9092b79SKevin Barnett } 3980edd16368SStephen M. Cameron ncurrent++; 3981edd16368SStephen M. Cameron break; 3982edd16368SStephen M. Cameron case TYPE_TAPE: 3983edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 398441ce4c35SStephen Cameron case TYPE_ENCLOSURE: 398541ce4c35SStephen Cameron ncurrent++; 398641ce4c35SStephen Cameron break; 3987edd16368SStephen M. Cameron case TYPE_RAID: 3988edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 3989edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 3990edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 3991edd16368SStephen M. Cameron * don't present it. 3992edd16368SStephen M. Cameron */ 3993edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 3994edd16368SStephen M. Cameron break; 3995edd16368SStephen M. Cameron ncurrent++; 3996edd16368SStephen M. Cameron break; 3997edd16368SStephen M. Cameron default: 3998edd16368SStephen M. Cameron break; 3999edd16368SStephen M. Cameron } 4000cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4001edd16368SStephen M. Cameron break; 4002edd16368SStephen M. Cameron } 40038aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4004edd16368SStephen M. Cameron out: 4005edd16368SStephen M. Cameron kfree(tmpdevice); 4006edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4007edd16368SStephen M. Cameron kfree(currentsd[i]); 4008edd16368SStephen M. Cameron kfree(currentsd); 4009edd16368SStephen M. Cameron kfree(physdev_list); 4010edd16368SStephen M. Cameron kfree(logdev_list); 401166749d0dSScott Teel kfree(id_ctlr); 401203383736SDon Brace kfree(id_phys); 4013edd16368SStephen M. Cameron } 4014edd16368SStephen M. Cameron 4015ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4016ec5cbf04SWebb Scales struct scatterlist *sg) 4017ec5cbf04SWebb Scales { 4018ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4019ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4020ec5cbf04SWebb Scales 4021ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4022ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4023ec5cbf04SWebb Scales desc->Ext = 0; 4024ec5cbf04SWebb Scales } 4025ec5cbf04SWebb Scales 4026c7ee65b3SWebb Scales /* 4027c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4028edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4029edd16368SStephen M. Cameron * hpsa command, cp. 4030edd16368SStephen M. Cameron */ 403133a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4032edd16368SStephen M. Cameron struct CommandList *cp, 4033edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4034edd16368SStephen M. Cameron { 4035edd16368SStephen M. Cameron struct scatterlist *sg; 4036b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 403733a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4038edd16368SStephen M. Cameron 403933a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4040edd16368SStephen M. Cameron 4041edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4042edd16368SStephen M. Cameron if (use_sg < 0) 4043edd16368SStephen M. Cameron return use_sg; 4044edd16368SStephen M. Cameron 4045edd16368SStephen M. Cameron if (!use_sg) 4046edd16368SStephen M. Cameron goto sglist_finished; 4047edd16368SStephen M. Cameron 4048b3a7ba7cSWebb Scales /* 4049b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4050b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4051b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4052b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4053b3a7ba7cSWebb Scales * the entries in the one list. 4054b3a7ba7cSWebb Scales */ 405533a2ffceSStephen M. Cameron curr_sg = cp->SG; 4056b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4057b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4058b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4059b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4060ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 406133a2ffceSStephen M. Cameron curr_sg++; 406233a2ffceSStephen M. Cameron } 4063ec5cbf04SWebb Scales 4064b3a7ba7cSWebb Scales if (chained) { 4065b3a7ba7cSWebb Scales /* 4066b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4067b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4068b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4069b3a7ba7cSWebb Scales * where the previous loop left off. 4070b3a7ba7cSWebb Scales */ 4071b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4072b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4073b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4074b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4075b3a7ba7cSWebb Scales curr_sg++; 4076b3a7ba7cSWebb Scales } 4077b3a7ba7cSWebb Scales } 4078b3a7ba7cSWebb Scales 4079ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4080b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 408133a2ffceSStephen M. Cameron 408233a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 408333a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 408433a2ffceSStephen M. Cameron 408533a2ffceSStephen M. Cameron if (chained) { 408633a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 408750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4088e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4089e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4090e2bea6dfSStephen M. Cameron return -1; 4091e2bea6dfSStephen M. Cameron } 409233a2ffceSStephen M. Cameron return 0; 4093edd16368SStephen M. Cameron } 4094edd16368SStephen M. Cameron 4095edd16368SStephen M. Cameron sglist_finished: 4096edd16368SStephen M. Cameron 409701a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4098c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4099edd16368SStephen M. Cameron return 0; 4100edd16368SStephen M. Cameron } 4101edd16368SStephen M. Cameron 4102283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4103283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4104283b4a9bSStephen M. Cameron { 4105283b4a9bSStephen M. Cameron int is_write = 0; 4106283b4a9bSStephen M. Cameron u32 block; 4107283b4a9bSStephen M. Cameron u32 block_cnt; 4108283b4a9bSStephen M. Cameron 4109283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4110283b4a9bSStephen M. Cameron switch (cdb[0]) { 4111283b4a9bSStephen M. Cameron case WRITE_6: 4112283b4a9bSStephen M. Cameron case WRITE_12: 4113283b4a9bSStephen M. Cameron is_write = 1; 4114283b4a9bSStephen M. Cameron case READ_6: 4115283b4a9bSStephen M. Cameron case READ_12: 4116283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4117c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4118283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4119c8a6c9a6SDon Brace if (block_cnt == 0) 4120c8a6c9a6SDon Brace block_cnt = 256; 4121283b4a9bSStephen M. Cameron } else { 4122283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4123c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4124c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4125283b4a9bSStephen M. Cameron } 4126283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4127283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4128283b4a9bSStephen M. Cameron 4129283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4130283b4a9bSStephen M. Cameron cdb[1] = 0; 4131283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4132283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4133283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4134283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4135283b4a9bSStephen M. Cameron cdb[6] = 0; 4136283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4137283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4138283b4a9bSStephen M. Cameron cdb[9] = 0; 4139283b4a9bSStephen M. Cameron *cdb_len = 10; 4140283b4a9bSStephen M. Cameron break; 4141283b4a9bSStephen M. Cameron } 4142283b4a9bSStephen M. Cameron return 0; 4143283b4a9bSStephen M. Cameron } 4144283b4a9bSStephen M. Cameron 4145c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4146283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 414703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4148e1f7de0cSMatt Gates { 4149e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4150e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4151e1f7de0cSMatt Gates unsigned int len; 4152e1f7de0cSMatt Gates unsigned int total_len = 0; 4153e1f7de0cSMatt Gates struct scatterlist *sg; 4154e1f7de0cSMatt Gates u64 addr64; 4155e1f7de0cSMatt Gates int use_sg, i; 4156e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4157e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4158e1f7de0cSMatt Gates 4159283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 416003383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 416103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4162283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 416303383736SDon Brace } 4164283b4a9bSStephen M. Cameron 4165e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4166e1f7de0cSMatt Gates 416703383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 416803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4169283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 417003383736SDon Brace } 4171283b4a9bSStephen M. Cameron 4172e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4173e1f7de0cSMatt Gates 4174e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4175e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4176e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4177e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4178e1f7de0cSMatt Gates 4179e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 418003383736SDon Brace if (use_sg < 0) { 418103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4182e1f7de0cSMatt Gates return use_sg; 418303383736SDon Brace } 4184e1f7de0cSMatt Gates 4185e1f7de0cSMatt Gates if (use_sg) { 4186e1f7de0cSMatt Gates curr_sg = cp->SG; 4187e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4188e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4189e1f7de0cSMatt Gates len = sg_dma_len(sg); 4190e1f7de0cSMatt Gates total_len += len; 419150a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 419250a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 419350a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4194e1f7de0cSMatt Gates curr_sg++; 4195e1f7de0cSMatt Gates } 419650a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4197e1f7de0cSMatt Gates 4198e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4199e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4200e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4201e1f7de0cSMatt Gates break; 4202e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4203e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4204e1f7de0cSMatt Gates break; 4205e1f7de0cSMatt Gates case DMA_NONE: 4206e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4207e1f7de0cSMatt Gates break; 4208e1f7de0cSMatt Gates default: 4209e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4210e1f7de0cSMatt Gates cmd->sc_data_direction); 4211e1f7de0cSMatt Gates BUG(); 4212e1f7de0cSMatt Gates break; 4213e1f7de0cSMatt Gates } 4214e1f7de0cSMatt Gates } else { 4215e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4216e1f7de0cSMatt Gates } 4217e1f7de0cSMatt Gates 4218c349775eSScott Teel c->Header.SGList = use_sg; 4219e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 42202b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 42212b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 42222b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 42232b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 42242b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4225283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4226283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4227c349775eSScott Teel /* Tag was already set at init time. */ 4228e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4229e1f7de0cSMatt Gates return 0; 4230e1f7de0cSMatt Gates } 4231edd16368SStephen M. Cameron 4232283b4a9bSStephen M. Cameron /* 4233283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4234283b4a9bSStephen M. Cameron * I/O accelerator path. 4235283b4a9bSStephen M. Cameron */ 4236283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4237283b4a9bSStephen M. Cameron struct CommandList *c) 4238283b4a9bSStephen M. Cameron { 4239283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4240283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4241283b4a9bSStephen M. Cameron 424203383736SDon Brace c->phys_disk = dev; 424303383736SDon Brace 4244283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 424503383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4246283b4a9bSStephen M. Cameron } 4247283b4a9bSStephen M. Cameron 4248dd0e19f3SScott Teel /* 4249dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4250dd0e19f3SScott Teel */ 4251dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4252dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4253dd0e19f3SScott Teel { 4254dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4255dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4256dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4257dd0e19f3SScott Teel u64 first_block; 4258dd0e19f3SScott Teel 4259dd0e19f3SScott Teel /* Are we doing encryption on this device */ 42602b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4261dd0e19f3SScott Teel return; 4262dd0e19f3SScott Teel /* Set the data encryption key index. */ 4263dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4264dd0e19f3SScott Teel 4265dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4266dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4267dd0e19f3SScott Teel 4268dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4269dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4270dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4271dd0e19f3SScott Teel */ 4272dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4273dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4274dd0e19f3SScott Teel case WRITE_6: 4275dd0e19f3SScott Teel case READ_6: 42762b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4277dd0e19f3SScott Teel break; 4278dd0e19f3SScott Teel case WRITE_10: 4279dd0e19f3SScott Teel case READ_10: 4280dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4281dd0e19f3SScott Teel case WRITE_12: 4282dd0e19f3SScott Teel case READ_12: 42832b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4284dd0e19f3SScott Teel break; 4285dd0e19f3SScott Teel case WRITE_16: 4286dd0e19f3SScott Teel case READ_16: 42872b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4288dd0e19f3SScott Teel break; 4289dd0e19f3SScott Teel default: 4290dd0e19f3SScott Teel dev_err(&h->pdev->dev, 42912b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 42922b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4293dd0e19f3SScott Teel BUG(); 4294dd0e19f3SScott Teel break; 4295dd0e19f3SScott Teel } 42962b08b3e9SDon Brace 42972b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 42982b08b3e9SDon Brace first_block = first_block * 42992b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 43002b08b3e9SDon Brace 43012b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 43022b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4303dd0e19f3SScott Teel } 4304dd0e19f3SScott Teel 4305c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4306c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 430703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4308c349775eSScott Teel { 4309c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4310c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4311c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4312c349775eSScott Teel int use_sg, i; 4313c349775eSScott Teel struct scatterlist *sg; 4314c349775eSScott Teel u64 addr64; 4315c349775eSScott Teel u32 len; 4316c349775eSScott Teel u32 total_len = 0; 4317c349775eSScott Teel 4318d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4319c349775eSScott Teel 432003383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 432103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4322c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 432303383736SDon Brace } 432403383736SDon Brace 4325c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4326c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4327c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4328c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4329c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4330c349775eSScott Teel 4331c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4332c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4333c349775eSScott Teel 4334c349775eSScott Teel use_sg = scsi_dma_map(cmd); 433503383736SDon Brace if (use_sg < 0) { 433603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4337c349775eSScott Teel return use_sg; 433803383736SDon Brace } 4339c349775eSScott Teel 4340c349775eSScott Teel if (use_sg) { 4341c349775eSScott Teel curr_sg = cp->sg; 4342d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4343d9a729f3SWebb Scales addr64 = le64_to_cpu( 4344d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4345d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4346d9a729f3SWebb Scales curr_sg->length = 0; 4347d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4348d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4349d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4350d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4351d9a729f3SWebb Scales 4352d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4353d9a729f3SWebb Scales } 4354c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4355c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4356c349775eSScott Teel len = sg_dma_len(sg); 4357c349775eSScott Teel total_len += len; 4358c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4359c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4360c349775eSScott Teel curr_sg->reserved[0] = 0; 4361c349775eSScott Teel curr_sg->reserved[1] = 0; 4362c349775eSScott Teel curr_sg->reserved[2] = 0; 4363c349775eSScott Teel curr_sg->chain_indicator = 0; 4364c349775eSScott Teel curr_sg++; 4365c349775eSScott Teel } 4366c349775eSScott Teel 4367c349775eSScott Teel switch (cmd->sc_data_direction) { 4368c349775eSScott Teel case DMA_TO_DEVICE: 4369dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4370dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4371c349775eSScott Teel break; 4372c349775eSScott Teel case DMA_FROM_DEVICE: 4373dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4374dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4375c349775eSScott Teel break; 4376c349775eSScott Teel case DMA_NONE: 4377dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4378dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4379c349775eSScott Teel break; 4380c349775eSScott Teel default: 4381c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4382c349775eSScott Teel cmd->sc_data_direction); 4383c349775eSScott Teel BUG(); 4384c349775eSScott Teel break; 4385c349775eSScott Teel } 4386c349775eSScott Teel } else { 4387dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4388dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4389c349775eSScott Teel } 4390dd0e19f3SScott Teel 4391dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4392dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4393dd0e19f3SScott Teel 43942b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4395f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4396c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4397c349775eSScott Teel 4398c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4399c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4400c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 440150a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4402c349775eSScott Teel 4403d9a729f3SWebb Scales /* fill in sg elements */ 4404d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4405d9a729f3SWebb Scales cp->sg_count = 1; 4406a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4407d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4408d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4409d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4410d9a729f3SWebb Scales return -1; 4411d9a729f3SWebb Scales } 4412d9a729f3SWebb Scales } else 4413d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4414d9a729f3SWebb Scales 4415c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4416c349775eSScott Teel return 0; 4417c349775eSScott Teel } 4418c349775eSScott Teel 4419c349775eSScott Teel /* 4420c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4421c349775eSScott Teel */ 4422c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4423c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 442403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4425c349775eSScott Teel { 442603383736SDon Brace /* Try to honor the device's queue depth */ 442703383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 442803383736SDon Brace phys_disk->queue_depth) { 442903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 443003383736SDon Brace return IO_ACCEL_INELIGIBLE; 443103383736SDon Brace } 4432c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4433c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 443403383736SDon Brace cdb, cdb_len, scsi3addr, 443503383736SDon Brace phys_disk); 4436c349775eSScott Teel else 4437c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 443803383736SDon Brace cdb, cdb_len, scsi3addr, 443903383736SDon Brace phys_disk); 4440c349775eSScott Teel } 4441c349775eSScott Teel 44426b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 44436b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 44446b80b18fSScott Teel { 44456b80b18fSScott Teel if (offload_to_mirror == 0) { 44466b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 44472b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 44486b80b18fSScott Teel return; 44496b80b18fSScott Teel } 44506b80b18fSScott Teel do { 44516b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 44522b08b3e9SDon Brace *current_group = *map_index / 44532b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 44546b80b18fSScott Teel if (offload_to_mirror == *current_group) 44556b80b18fSScott Teel continue; 44562b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 44576b80b18fSScott Teel /* select map index from next group */ 44582b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 44596b80b18fSScott Teel (*current_group)++; 44606b80b18fSScott Teel } else { 44616b80b18fSScott Teel /* select map index from first group */ 44622b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 44636b80b18fSScott Teel *current_group = 0; 44646b80b18fSScott Teel } 44656b80b18fSScott Teel } while (offload_to_mirror != *current_group); 44666b80b18fSScott Teel } 44676b80b18fSScott Teel 4468283b4a9bSStephen M. Cameron /* 4469283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4470283b4a9bSStephen M. Cameron */ 4471283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4472283b4a9bSStephen M. Cameron struct CommandList *c) 4473283b4a9bSStephen M. Cameron { 4474283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4475283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4476283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4477283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4478283b4a9bSStephen M. Cameron int is_write = 0; 4479283b4a9bSStephen M. Cameron u32 map_index; 4480283b4a9bSStephen M. Cameron u64 first_block, last_block; 4481283b4a9bSStephen M. Cameron u32 block_cnt; 4482283b4a9bSStephen M. Cameron u32 blocks_per_row; 4483283b4a9bSStephen M. Cameron u64 first_row, last_row; 4484283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4485283b4a9bSStephen M. Cameron u32 first_column, last_column; 44866b80b18fSScott Teel u64 r0_first_row, r0_last_row; 44876b80b18fSScott Teel u32 r5or6_blocks_per_row; 44886b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 44896b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 44906b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 44916b80b18fSScott Teel u32 total_disks_per_row; 44926b80b18fSScott Teel u32 stripesize; 44936b80b18fSScott Teel u32 first_group, last_group, current_group; 4494283b4a9bSStephen M. Cameron u32 map_row; 4495283b4a9bSStephen M. Cameron u32 disk_handle; 4496283b4a9bSStephen M. Cameron u64 disk_block; 4497283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4498283b4a9bSStephen M. Cameron u8 cdb[16]; 4499283b4a9bSStephen M. Cameron u8 cdb_len; 45002b08b3e9SDon Brace u16 strip_size; 4501283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4502283b4a9bSStephen M. Cameron u64 tmpdiv; 4503283b4a9bSStephen M. Cameron #endif 45046b80b18fSScott Teel int offload_to_mirror; 4505283b4a9bSStephen M. Cameron 4506283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4507283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4508283b4a9bSStephen M. Cameron case WRITE_6: 4509283b4a9bSStephen M. Cameron is_write = 1; 4510283b4a9bSStephen M. Cameron case READ_6: 4511c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4512283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 45133fa89a04SStephen M. Cameron if (block_cnt == 0) 45143fa89a04SStephen M. Cameron block_cnt = 256; 4515283b4a9bSStephen M. Cameron break; 4516283b4a9bSStephen M. Cameron case WRITE_10: 4517283b4a9bSStephen M. Cameron is_write = 1; 4518283b4a9bSStephen M. Cameron case READ_10: 4519283b4a9bSStephen M. Cameron first_block = 4520283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4521283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4522283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4523283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4524283b4a9bSStephen M. Cameron block_cnt = 4525283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4526283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4527283b4a9bSStephen M. Cameron break; 4528283b4a9bSStephen M. Cameron case WRITE_12: 4529283b4a9bSStephen M. Cameron is_write = 1; 4530283b4a9bSStephen M. Cameron case READ_12: 4531283b4a9bSStephen M. Cameron first_block = 4532283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4533283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4534283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4535283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4536283b4a9bSStephen M. Cameron block_cnt = 4537283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4538283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4539283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4540283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4541283b4a9bSStephen M. Cameron break; 4542283b4a9bSStephen M. Cameron case WRITE_16: 4543283b4a9bSStephen M. Cameron is_write = 1; 4544283b4a9bSStephen M. Cameron case READ_16: 4545283b4a9bSStephen M. Cameron first_block = 4546283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4547283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4548283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4549283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4550283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4551283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4552283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4553283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4554283b4a9bSStephen M. Cameron block_cnt = 4555283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4556283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4557283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4558283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4559283b4a9bSStephen M. Cameron break; 4560283b4a9bSStephen M. Cameron default: 4561283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4562283b4a9bSStephen M. Cameron } 4563283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4564283b4a9bSStephen M. Cameron 4565283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4566283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4567283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4568283b4a9bSStephen M. Cameron 4569283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 45702b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 45712b08b3e9SDon Brace last_block < first_block) 4572283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4573283b4a9bSStephen M. Cameron 4574283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 45752b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 45762b08b3e9SDon Brace le16_to_cpu(map->strip_size); 45772b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4578283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4579283b4a9bSStephen M. Cameron tmpdiv = first_block; 4580283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4581283b4a9bSStephen M. Cameron first_row = tmpdiv; 4582283b4a9bSStephen M. Cameron tmpdiv = last_block; 4583283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4584283b4a9bSStephen M. Cameron last_row = tmpdiv; 4585283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4586283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4587283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 45882b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4589283b4a9bSStephen M. Cameron first_column = tmpdiv; 4590283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 45912b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4592283b4a9bSStephen M. Cameron last_column = tmpdiv; 4593283b4a9bSStephen M. Cameron #else 4594283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4595283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4596283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4597283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 45982b08b3e9SDon Brace first_column = first_row_offset / strip_size; 45992b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4600283b4a9bSStephen M. Cameron #endif 4601283b4a9bSStephen M. Cameron 4602283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 4603283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 4604283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4605283b4a9bSStephen M. Cameron 4606283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 46072b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 46082b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 4609283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 46102b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 46116b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 46126b80b18fSScott Teel 46136b80b18fSScott Teel switch (dev->raid_level) { 46146b80b18fSScott Teel case HPSA_RAID_0: 46156b80b18fSScott Teel break; /* nothing special to do */ 46166b80b18fSScott Teel case HPSA_RAID_1: 46176b80b18fSScott Teel /* Handles load balance across RAID 1 members. 46186b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 46196b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 4620283b4a9bSStephen M. Cameron */ 46212b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 4622283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 46232b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 4624283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 46256b80b18fSScott Teel break; 46266b80b18fSScott Teel case HPSA_RAID_ADM: 46276b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 46286b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 46296b80b18fSScott Teel */ 46302b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 46316b80b18fSScott Teel 46326b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 46336b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 46346b80b18fSScott Teel &map_index, ¤t_group); 46356b80b18fSScott Teel /* set mirror group to use next time */ 46366b80b18fSScott Teel offload_to_mirror = 46372b08b3e9SDon Brace (offload_to_mirror >= 46382b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 46396b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 46406b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 46416b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 46426b80b18fSScott Teel * function since multiple threads might simultaneously 46436b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 46446b80b18fSScott Teel */ 46456b80b18fSScott Teel break; 46466b80b18fSScott Teel case HPSA_RAID_5: 46476b80b18fSScott Teel case HPSA_RAID_6: 46482b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 46496b80b18fSScott Teel break; 46506b80b18fSScott Teel 46516b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 46526b80b18fSScott Teel r5or6_blocks_per_row = 46532b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 46542b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 46556b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 46562b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 46572b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 46586b80b18fSScott Teel #if BITS_PER_LONG == 32 46596b80b18fSScott Teel tmpdiv = first_block; 46606b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 46616b80b18fSScott Teel tmpdiv = first_group; 46626b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 46636b80b18fSScott Teel first_group = tmpdiv; 46646b80b18fSScott Teel tmpdiv = last_block; 46656b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 46666b80b18fSScott Teel tmpdiv = last_group; 46676b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 46686b80b18fSScott Teel last_group = tmpdiv; 46696b80b18fSScott Teel #else 46706b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 46716b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 46726b80b18fSScott Teel #endif 4673000ff7c2SStephen M. Cameron if (first_group != last_group) 46746b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 46756b80b18fSScott Teel 46766b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 46776b80b18fSScott Teel #if BITS_PER_LONG == 32 46786b80b18fSScott Teel tmpdiv = first_block; 46796b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 46806b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 46816b80b18fSScott Teel tmpdiv = last_block; 46826b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 46836b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 46846b80b18fSScott Teel #else 46856b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 46866b80b18fSScott Teel first_block / stripesize; 46876b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 46886b80b18fSScott Teel #endif 46896b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 46906b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 46916b80b18fSScott Teel 46926b80b18fSScott Teel 46936b80b18fSScott Teel /* Verify request is in a single column */ 46946b80b18fSScott Teel #if BITS_PER_LONG == 32 46956b80b18fSScott Teel tmpdiv = first_block; 46966b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 46976b80b18fSScott Teel tmpdiv = first_row_offset; 46986b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 46996b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 47006b80b18fSScott Teel tmpdiv = last_block; 47016b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 47026b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 47036b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 47046b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 47056b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 47066b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 47076b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 47086b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 47096b80b18fSScott Teel r5or6_last_column = tmpdiv; 47106b80b18fSScott Teel #else 47116b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 47126b80b18fSScott Teel (u32)((first_block % stripesize) % 47136b80b18fSScott Teel r5or6_blocks_per_row); 47146b80b18fSScott Teel 47156b80b18fSScott Teel r5or6_last_row_offset = 47166b80b18fSScott Teel (u32)((last_block % stripesize) % 47176b80b18fSScott Teel r5or6_blocks_per_row); 47186b80b18fSScott Teel 47196b80b18fSScott Teel first_column = r5or6_first_column = 47202b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 47216b80b18fSScott Teel r5or6_last_column = 47222b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 47236b80b18fSScott Teel #endif 47246b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 47256b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 47266b80b18fSScott Teel 47276b80b18fSScott Teel /* Request is eligible */ 47286b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 47292b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 47306b80b18fSScott Teel 47316b80b18fSScott Teel map_index = (first_group * 47322b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 47336b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 47346b80b18fSScott Teel break; 47356b80b18fSScott Teel default: 47366b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 4737283b4a9bSStephen M. Cameron } 47386b80b18fSScott Teel 473907543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 474007543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 474107543e0cSStephen Cameron 474203383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 474303383736SDon Brace 4744283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 47452b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 47462b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 47472b08b3e9SDon Brace (first_row_offset - first_column * 47482b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 4749283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 4750283b4a9bSStephen M. Cameron 4751283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 4752283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 4753283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 4754283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 4755283b4a9bSStephen M. Cameron } 4756283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 4757283b4a9bSStephen M. Cameron 4758283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 4759283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 4760283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 4761283b4a9bSStephen M. Cameron cdb[1] = 0; 4762283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 4763283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 4764283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 4765283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 4766283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 4767283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 4768283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 4769283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 4770283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 4771283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 4772283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 4773283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 4774283b4a9bSStephen M. Cameron cdb[14] = 0; 4775283b4a9bSStephen M. Cameron cdb[15] = 0; 4776283b4a9bSStephen M. Cameron cdb_len = 16; 4777283b4a9bSStephen M. Cameron } else { 4778283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4779283b4a9bSStephen M. Cameron cdb[1] = 0; 4780283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 4781283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 4782283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 4783283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 4784283b4a9bSStephen M. Cameron cdb[6] = 0; 4785283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 4786283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 4787283b4a9bSStephen M. Cameron cdb[9] = 0; 4788283b4a9bSStephen M. Cameron cdb_len = 10; 4789283b4a9bSStephen M. Cameron } 4790283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 479103383736SDon Brace dev->scsi3addr, 479203383736SDon Brace dev->phys_disk[map_index]); 4793283b4a9bSStephen M. Cameron } 4794283b4a9bSStephen M. Cameron 479525163bd5SWebb Scales /* 479625163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 479725163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 479825163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 479925163bd5SWebb Scales */ 4800574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 4801574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 4802574f05d3SStephen Cameron unsigned char scsi3addr[]) 4803edd16368SStephen M. Cameron { 4804edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 4805edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 4806edd16368SStephen M. Cameron c->scsi_cmd = cmd; 4807edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 4808edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 4809f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 4810edd16368SStephen M. Cameron 4811edd16368SStephen M. Cameron /* Fill in the request block... */ 4812edd16368SStephen M. Cameron 4813edd16368SStephen M. Cameron c->Request.Timeout = 0; 4814edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 4815edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 4816edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 4817edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 4818edd16368SStephen M. Cameron case DMA_TO_DEVICE: 4819a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4820a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 4821edd16368SStephen M. Cameron break; 4822edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 4823a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4824a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 4825edd16368SStephen M. Cameron break; 4826edd16368SStephen M. Cameron case DMA_NONE: 4827a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4828a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 4829edd16368SStephen M. Cameron break; 4830edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 4831edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 4832edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 4833edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 4834edd16368SStephen M. Cameron */ 4835edd16368SStephen M. Cameron 4836a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4837a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 4838edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 4839edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 4840edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 4841edd16368SStephen M. Cameron * slide by, and give the same results as if this field 4842edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 4843edd16368SStephen M. Cameron * our purposes here. 4844edd16368SStephen M. Cameron */ 4845edd16368SStephen M. Cameron 4846edd16368SStephen M. Cameron break; 4847edd16368SStephen M. Cameron 4848edd16368SStephen M. Cameron default: 4849edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4850edd16368SStephen M. Cameron cmd->sc_data_direction); 4851edd16368SStephen M. Cameron BUG(); 4852edd16368SStephen M. Cameron break; 4853edd16368SStephen M. Cameron } 4854edd16368SStephen M. Cameron 485533a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 485673153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 4857edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 4858edd16368SStephen M. Cameron } 4859edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 4860edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 4861edd16368SStephen M. Cameron return 0; 4862edd16368SStephen M. Cameron } 4863edd16368SStephen M. Cameron 4864360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 4865360c73bdSStephen Cameron struct CommandList *c) 4866360c73bdSStephen Cameron { 4867360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 4868360c73bdSStephen Cameron 4869360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 4870360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 4871360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 4872360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 4873360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 4874360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 4875360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 4876360c73bdSStephen Cameron + index * sizeof(*c->err_info); 4877360c73bdSStephen Cameron c->cmdindex = index; 4878360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 4879360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 4880360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 4881360c73bdSStephen Cameron c->h = h; 4882a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 4883360c73bdSStephen Cameron } 4884360c73bdSStephen Cameron 4885360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 4886360c73bdSStephen Cameron { 4887360c73bdSStephen Cameron int i; 4888360c73bdSStephen Cameron 4889360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 4890360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 4891360c73bdSStephen Cameron 4892360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 4893360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 4894360c73bdSStephen Cameron } 4895360c73bdSStephen Cameron } 4896360c73bdSStephen Cameron 4897360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 4898360c73bdSStephen Cameron struct CommandList *c) 4899360c73bdSStephen Cameron { 4900360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 4901360c73bdSStephen Cameron 490273153fe5SWebb Scales BUG_ON(c->cmdindex != index); 490373153fe5SWebb Scales 4904360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 4905360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 4906360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 4907360c73bdSStephen Cameron } 4908360c73bdSStephen Cameron 4909592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 4910592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 4911592a0ad5SWebb Scales unsigned char *scsi3addr) 4912592a0ad5SWebb Scales { 4913592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4914592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 4915592a0ad5SWebb Scales 4916592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 4917592a0ad5SWebb Scales 4918592a0ad5SWebb Scales if (dev->offload_enabled) { 4919592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 4920592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 4921592a0ad5SWebb Scales c->scsi_cmd = cmd; 4922592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 4923592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 4924592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 4925a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 4926592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 4927592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 4928592a0ad5SWebb Scales c->scsi_cmd = cmd; 4929592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 4930592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 4931592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 4932592a0ad5SWebb Scales } 4933592a0ad5SWebb Scales return rc; 4934592a0ad5SWebb Scales } 4935592a0ad5SWebb Scales 4936080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 4937080ef1ccSDon Brace { 4938080ef1ccSDon Brace struct scsi_cmnd *cmd; 4939080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 49408a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 4941080ef1ccSDon Brace 4942080ef1ccSDon Brace cmd = c->scsi_cmd; 4943080ef1ccSDon Brace dev = cmd->device->hostdata; 4944080ef1ccSDon Brace if (!dev) { 4945080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 49468a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 4947080ef1ccSDon Brace } 4948d604f533SWebb Scales if (c->reset_pending) 4949d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 4950a58e7e53SWebb Scales if (c->abort_pending) 4951a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 4952592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 4953592a0ad5SWebb Scales struct ctlr_info *h = c->h; 4954592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 4955592a0ad5SWebb Scales int rc; 4956592a0ad5SWebb Scales 4957592a0ad5SWebb Scales if (c2->error_data.serv_response == 4958592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 4959592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 4960592a0ad5SWebb Scales if (rc == 0) 4961592a0ad5SWebb Scales return; 4962592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 4963592a0ad5SWebb Scales /* 4964592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 4965592a0ad5SWebb Scales * Try again via scsi mid layer, which will 4966592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 4967592a0ad5SWebb Scales */ 4968592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 49698a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 4970592a0ad5SWebb Scales } 4971592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 4972592a0ad5SWebb Scales } 4973592a0ad5SWebb Scales } 4974360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 4975080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 4976080ef1ccSDon Brace /* 4977080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 4978080ef1ccSDon Brace * again via scsi mid layer, which will then get 4979080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 4980592a0ad5SWebb Scales * 4981592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 4982592a0ad5SWebb Scales * if it encountered a dma mapping failure. 4983080ef1ccSDon Brace */ 4984080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 4985080ef1ccSDon Brace cmd->scsi_done(cmd); 4986080ef1ccSDon Brace } 4987080ef1ccSDon Brace } 4988080ef1ccSDon Brace 4989574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 4990574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 4991574f05d3SStephen Cameron { 4992574f05d3SStephen Cameron struct ctlr_info *h; 4993574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 4994574f05d3SStephen Cameron unsigned char scsi3addr[8]; 4995574f05d3SStephen Cameron struct CommandList *c; 4996574f05d3SStephen Cameron int rc = 0; 4997574f05d3SStephen Cameron 4998574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 4999574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 500073153fe5SWebb Scales 500173153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 500273153fe5SWebb Scales 5003574f05d3SStephen Cameron dev = cmd->device->hostdata; 5004574f05d3SStephen Cameron if (!dev) { 5005574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5006574f05d3SStephen Cameron cmd->scsi_done(cmd); 5007574f05d3SStephen Cameron return 0; 5008574f05d3SStephen Cameron } 500973153fe5SWebb Scales 5010574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5011574f05d3SStephen Cameron 5012574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 501325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5014574f05d3SStephen Cameron cmd->scsi_done(cmd); 5015574f05d3SStephen Cameron return 0; 5016574f05d3SStephen Cameron } 501773153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5018574f05d3SStephen Cameron 5019407863cbSStephen Cameron /* 5020407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5021574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5022574f05d3SStephen Cameron */ 5023574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5024574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5025574f05d3SStephen Cameron h->acciopath_status)) { 5026592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5027574f05d3SStephen Cameron if (rc == 0) 5028592a0ad5SWebb Scales return 0; 5029592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 503073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5031574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5032574f05d3SStephen Cameron } 5033574f05d3SStephen Cameron } 5034574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5035574f05d3SStephen Cameron } 5036574f05d3SStephen Cameron 50378ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 50385f389360SStephen M. Cameron { 50395f389360SStephen M. Cameron unsigned long flags; 50405f389360SStephen M. Cameron 50415f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 50425f389360SStephen M. Cameron h->scan_finished = 1; 50435f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 50445f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 50455f389360SStephen M. Cameron } 50465f389360SStephen M. Cameron 5047a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5048a08a8471SStephen M. Cameron { 5049a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5050a08a8471SStephen M. Cameron unsigned long flags; 5051a08a8471SStephen M. Cameron 50528ebc9248SWebb Scales /* 50538ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 50548ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 50558ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 50568ebc9248SWebb Scales * piling up on a locked up controller. 50578ebc9248SWebb Scales */ 50588ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 50598ebc9248SWebb Scales return hpsa_scan_complete(h); 50605f389360SStephen M. Cameron 5061a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5062a08a8471SStephen M. Cameron while (1) { 5063a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5064a08a8471SStephen M. Cameron if (h->scan_finished) 5065a08a8471SStephen M. Cameron break; 5066a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5067a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5068a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5069a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5070a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5071a08a8471SStephen M. Cameron * happen if we're in here. 5072a08a8471SStephen M. Cameron */ 5073a08a8471SStephen M. Cameron } 5074a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5075a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5076a08a8471SStephen M. Cameron 50778ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 50788ebc9248SWebb Scales return hpsa_scan_complete(h); 50795f389360SStephen M. Cameron 50808aa60681SDon Brace hpsa_update_scsi_devices(h); 5081a08a8471SStephen M. Cameron 50828ebc9248SWebb Scales hpsa_scan_complete(h); 5083a08a8471SStephen M. Cameron } 5084a08a8471SStephen M. Cameron 50857c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 50867c0a0229SDon Brace { 508703383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 508803383736SDon Brace 508903383736SDon Brace if (!logical_drive) 509003383736SDon Brace return -ENODEV; 50917c0a0229SDon Brace 50927c0a0229SDon Brace if (qdepth < 1) 50937c0a0229SDon Brace qdepth = 1; 509403383736SDon Brace else if (qdepth > logical_drive->queue_depth) 509503383736SDon Brace qdepth = logical_drive->queue_depth; 509603383736SDon Brace 509703383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 50987c0a0229SDon Brace } 50997c0a0229SDon Brace 5100a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5101a08a8471SStephen M. Cameron unsigned long elapsed_time) 5102a08a8471SStephen M. Cameron { 5103a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5104a08a8471SStephen M. Cameron unsigned long flags; 5105a08a8471SStephen M. Cameron int finished; 5106a08a8471SStephen M. Cameron 5107a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5108a08a8471SStephen M. Cameron finished = h->scan_finished; 5109a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5110a08a8471SStephen M. Cameron return finished; 5111a08a8471SStephen M. Cameron } 5112a08a8471SStephen M. Cameron 51132946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5114edd16368SStephen M. Cameron { 5115b705690dSStephen M. Cameron struct Scsi_Host *sh; 5116b705690dSStephen M. Cameron int error; 5117edd16368SStephen M. Cameron 5118b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 51192946e82bSRobert Elliott if (sh == NULL) { 51202946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 51212946e82bSRobert Elliott return -ENOMEM; 51222946e82bSRobert Elliott } 5123b705690dSStephen M. Cameron 5124b705690dSStephen M. Cameron sh->io_port = 0; 5125b705690dSStephen M. Cameron sh->n_io_port = 0; 5126b705690dSStephen M. Cameron sh->this_id = -1; 5127b705690dSStephen M. Cameron sh->max_channel = 3; 5128b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5129b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5130b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 513141ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5132d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5133b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5134b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5135b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5136b705690dSStephen M. Cameron sh->unique_id = sh->irq; 513773153fe5SWebb Scales error = scsi_init_shared_tag_map(sh, sh->can_queue); 513873153fe5SWebb Scales if (error) { 513973153fe5SWebb Scales dev_err(&h->pdev->dev, 514073153fe5SWebb Scales "%s: scsi_init_shared_tag_map failed for controller %d\n", 514173153fe5SWebb Scales __func__, h->ctlr); 5142b705690dSStephen M. Cameron scsi_host_put(sh); 5143b705690dSStephen M. Cameron return error; 51442946e82bSRobert Elliott } 51452946e82bSRobert Elliott h->scsi_host = sh; 51462946e82bSRobert Elliott return 0; 51472946e82bSRobert Elliott } 51482946e82bSRobert Elliott 51492946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 51502946e82bSRobert Elliott { 51512946e82bSRobert Elliott int rv; 51522946e82bSRobert Elliott 51532946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 51542946e82bSRobert Elliott if (rv) { 51552946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 51562946e82bSRobert Elliott return rv; 51572946e82bSRobert Elliott } 51582946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 51592946e82bSRobert Elliott return 0; 5160edd16368SStephen M. Cameron } 5161edd16368SStephen M. Cameron 5162b69324ffSWebb Scales /* 516373153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 516473153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 516573153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 516673153fe5SWebb Scales * low-numbered entries for our own uses.) 516773153fe5SWebb Scales */ 516873153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 516973153fe5SWebb Scales { 517073153fe5SWebb Scales int idx = scmd->request->tag; 517173153fe5SWebb Scales 517273153fe5SWebb Scales if (idx < 0) 517373153fe5SWebb Scales return idx; 517473153fe5SWebb Scales 517573153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 517673153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 517773153fe5SWebb Scales } 517873153fe5SWebb Scales 517973153fe5SWebb Scales /* 5180b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5181b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5182b69324ffSWebb Scales */ 5183b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5184b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5185b69324ffSWebb Scales int reply_queue) 5186edd16368SStephen M. Cameron { 51878919358eSTomas Henzl int rc; 5188edd16368SStephen M. Cameron 5189a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5190a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5191a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5192b69324ffSWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 519325163bd5SWebb Scales if (rc) 5194b69324ffSWebb Scales return rc; 5195edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5196edd16368SStephen M. Cameron 5197b69324ffSWebb Scales /* Check if the unit is already ready. */ 5198edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5199b69324ffSWebb Scales return 0; 5200edd16368SStephen M. Cameron 5201b69324ffSWebb Scales /* 5202b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5203b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5204b69324ffSWebb Scales * looking for (but, success is good too). 5205b69324ffSWebb Scales */ 5206edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5207edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5208edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5209edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5210b69324ffSWebb Scales return 0; 5211b69324ffSWebb Scales 5212b69324ffSWebb Scales return 1; 5213b69324ffSWebb Scales } 5214b69324ffSWebb Scales 5215b69324ffSWebb Scales /* 5216b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5217b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5218b69324ffSWebb Scales */ 5219b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5220b69324ffSWebb Scales struct CommandList *c, 5221b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5222b69324ffSWebb Scales { 5223b69324ffSWebb Scales int rc; 5224b69324ffSWebb Scales int count = 0; 5225b69324ffSWebb Scales int waittime = 1; /* seconds */ 5226b69324ffSWebb Scales 5227b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5228b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5229b69324ffSWebb Scales 5230b69324ffSWebb Scales /* 5231b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5232b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5233b69324ffSWebb Scales */ 5234b69324ffSWebb Scales msleep(1000 * waittime); 5235b69324ffSWebb Scales 5236b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5237b69324ffSWebb Scales if (!rc) 5238edd16368SStephen M. Cameron break; 5239b69324ffSWebb Scales 5240b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5241b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5242b69324ffSWebb Scales waittime *= 2; 5243b69324ffSWebb Scales 5244b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5245b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5246b69324ffSWebb Scales waittime); 5247b69324ffSWebb Scales } 5248b69324ffSWebb Scales 5249b69324ffSWebb Scales return rc; 5250b69324ffSWebb Scales } 5251b69324ffSWebb Scales 5252b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5253b69324ffSWebb Scales unsigned char lunaddr[], 5254b69324ffSWebb Scales int reply_queue) 5255b69324ffSWebb Scales { 5256b69324ffSWebb Scales int first_queue; 5257b69324ffSWebb Scales int last_queue; 5258b69324ffSWebb Scales int rq; 5259b69324ffSWebb Scales int rc = 0; 5260b69324ffSWebb Scales struct CommandList *c; 5261b69324ffSWebb Scales 5262b69324ffSWebb Scales c = cmd_alloc(h); 5263b69324ffSWebb Scales 5264b69324ffSWebb Scales /* 5265b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5266b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5267b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5268b69324ffSWebb Scales */ 5269b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5270b69324ffSWebb Scales first_queue = 0; 5271b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5272b69324ffSWebb Scales } else { 5273b69324ffSWebb Scales first_queue = reply_queue; 5274b69324ffSWebb Scales last_queue = reply_queue; 5275b69324ffSWebb Scales } 5276b69324ffSWebb Scales 5277b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5278b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5279b69324ffSWebb Scales if (rc) 5280b69324ffSWebb Scales break; 5281edd16368SStephen M. Cameron } 5282edd16368SStephen M. Cameron 5283edd16368SStephen M. Cameron if (rc) 5284edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5285edd16368SStephen M. Cameron else 5286edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5287edd16368SStephen M. Cameron 528845fcb86eSStephen Cameron cmd_free(h, c); 5289edd16368SStephen M. Cameron return rc; 5290edd16368SStephen M. Cameron } 5291edd16368SStephen M. Cameron 5292edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5293edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5294edd16368SStephen M. Cameron */ 5295edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5296edd16368SStephen M. Cameron { 5297edd16368SStephen M. Cameron int rc; 5298edd16368SStephen M. Cameron struct ctlr_info *h; 5299edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 53000b9b7b6eSScott Teel u8 reset_type; 53012dc127bbSDan Carpenter char msg[48]; 5302edd16368SStephen M. Cameron 5303edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5304edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5305edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5306edd16368SStephen M. Cameron return FAILED; 5307e345893bSDon Brace 5308e345893bSDon Brace if (lockup_detected(h)) 5309e345893bSDon Brace return FAILED; 5310e345893bSDon Brace 5311edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5312edd16368SStephen M. Cameron if (!dev) { 5313d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5314edd16368SStephen M. Cameron return FAILED; 5315edd16368SStephen M. Cameron } 531625163bd5SWebb Scales 531725163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 531825163bd5SWebb Scales if (lockup_detected(h)) { 53192dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 53202dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 532173153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 532273153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 532325163bd5SWebb Scales return FAILED; 532425163bd5SWebb Scales } 532525163bd5SWebb Scales 532625163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 532725163bd5SWebb Scales if (detect_controller_lockup(h)) { 53282dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 53292dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 533073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 533173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 533225163bd5SWebb Scales return FAILED; 533325163bd5SWebb Scales } 533425163bd5SWebb Scales 5335d604f533SWebb Scales /* Do not attempt on controller */ 5336d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5337d604f533SWebb Scales return SUCCESS; 5338d604f533SWebb Scales 53390b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 53400b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 53410b9b7b6eSScott Teel else 53420b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 53430b9b7b6eSScott Teel 53440b9b7b6eSScott Teel sprintf(msg, "resetting %s", 53450b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 53460b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 534725163bd5SWebb Scales 5348da03ded0SDon Brace h->reset_in_progress = 1; 5349da03ded0SDon Brace 5350edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 53510b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 535225163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 53530b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 53540b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 53552dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5356d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5357da03ded0SDon Brace h->reset_in_progress = 0; 5358d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5359edd16368SStephen M. Cameron } 5360edd16368SStephen M. Cameron 53616cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 53626cba3f19SStephen M. Cameron { 53636cba3f19SStephen M. Cameron u8 original_tag[8]; 53646cba3f19SStephen M. Cameron 53656cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 53666cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 53676cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 53686cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 53696cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 53706cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 53716cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 53726cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 53736cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 53746cba3f19SStephen M. Cameron } 53756cba3f19SStephen M. Cameron 537617eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 53772b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 537817eb87d2SScott Teel { 53792b08b3e9SDon Brace u64 tag; 538017eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 538117eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 538217eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 53832b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 53842b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 53852b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 538654b6e9e9SScott Teel return; 538754b6e9e9SScott Teel } 538854b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 538954b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 539054b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5391dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5392dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5393dd0e19f3SScott Teel *taglower = cm2->Tag; 539454b6e9e9SScott Teel return; 539554b6e9e9SScott Teel } 53962b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 53972b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 53982b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 539917eb87d2SScott Teel } 540054b6e9e9SScott Teel 540175167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 54029b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 540375167d2cSStephen M. Cameron { 540475167d2cSStephen M. Cameron int rc = IO_OK; 540575167d2cSStephen M. Cameron struct CommandList *c; 540675167d2cSStephen M. Cameron struct ErrorInfo *ei; 54072b08b3e9SDon Brace __le32 tagupper, taglower; 540875167d2cSStephen M. Cameron 540945fcb86eSStephen Cameron c = cmd_alloc(h); 541075167d2cSStephen M. Cameron 5411a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 54129b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5413a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 54149b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 54156cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 541625163bd5SWebb Scales (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 541717eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 541825163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 541917eb87d2SScott Teel __func__, tagupper, taglower); 542075167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 542175167d2cSStephen M. Cameron 542275167d2cSStephen M. Cameron ei = c->err_info; 542375167d2cSStephen M. Cameron switch (ei->CommandStatus) { 542475167d2cSStephen M. Cameron case CMD_SUCCESS: 542575167d2cSStephen M. Cameron break; 54269437ac43SStephen Cameron case CMD_TMF_STATUS: 54279437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 54289437ac43SStephen Cameron break; 542975167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 543075167d2cSStephen M. Cameron rc = -1; 543175167d2cSStephen M. Cameron break; 543275167d2cSStephen M. Cameron default: 543375167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 543417eb87d2SScott Teel __func__, tagupper, taglower); 5435d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 543675167d2cSStephen M. Cameron rc = -1; 543775167d2cSStephen M. Cameron break; 543875167d2cSStephen M. Cameron } 543945fcb86eSStephen Cameron cmd_free(h, c); 5440dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5441dd0e19f3SScott Teel __func__, tagupper, taglower); 544275167d2cSStephen M. Cameron return rc; 544375167d2cSStephen M. Cameron } 544475167d2cSStephen M. Cameron 54458be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 54468be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 54478be986ccSStephen Cameron { 54488be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 54498be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 54508be986ccSStephen Cameron struct io_accel2_cmd *c2a = 54518be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5452a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 54538be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 54548be986ccSStephen Cameron 54558be986ccSStephen Cameron /* 54568be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 54578be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 54588be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 54598be986ccSStephen Cameron */ 54608be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 54618be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 54628be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 54638be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 54648be986ccSStephen Cameron sizeof(ac->error_len)); 54658be986ccSStephen Cameron 54668be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5467a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5468a58e7e53SWebb Scales 54698be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 54708be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 54718be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 54728be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 54738be986ccSStephen Cameron 54748be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 54758be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 54768be986ccSStephen Cameron ac->reply_queue = reply_queue; 54778be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 54788be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 54798be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 54808be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 54818be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 54828be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 54838be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 54848be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 54858be986ccSStephen Cameron } 54868be986ccSStephen Cameron 548754b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 548854b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 548954b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 549054b6e9e9SScott Teel * Return 0 on success (IO_OK) 549154b6e9e9SScott Teel * -1 on failure 549254b6e9e9SScott Teel */ 549354b6e9e9SScott Teel 549454b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 549525163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 549654b6e9e9SScott Teel { 549754b6e9e9SScott Teel int rc = IO_OK; 549854b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 549954b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 550054b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 550154b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 550254b6e9e9SScott Teel 550354b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 55047fa3030cSStephen Cameron scmd = abort->scsi_cmd; 550554b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 550654b6e9e9SScott Teel if (dev == NULL) { 550754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 550854b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 550954b6e9e9SScott Teel return -1; /* not abortable */ 551054b6e9e9SScott Teel } 551154b6e9e9SScott Teel 55122ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 55132ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 55140d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 55152ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 55160d96ef5fSWebb Scales "Reset as abort", 55172ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 55182ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 55192ba8bfc8SStephen M. Cameron 552054b6e9e9SScott Teel if (!dev->offload_enabled) { 552154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 552254b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 552354b6e9e9SScott Teel return -1; /* not abortable */ 552454b6e9e9SScott Teel } 552554b6e9e9SScott Teel 552654b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 552754b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 552854b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 552954b6e9e9SScott Teel return -1; /* not abortable */ 553054b6e9e9SScott Teel } 553154b6e9e9SScott Teel 553254b6e9e9SScott Teel /* send the reset */ 55332ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 55342ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 55352ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 55362ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 55372ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5538d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 553954b6e9e9SScott Teel if (rc != 0) { 554054b6e9e9SScott Teel dev_warn(&h->pdev->dev, 554154b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 554254b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 554354b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 554454b6e9e9SScott Teel return rc; /* failed to reset */ 554554b6e9e9SScott Teel } 554654b6e9e9SScott Teel 554754b6e9e9SScott Teel /* wait for device to recover */ 5548b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 554954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 555054b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 555154b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 555254b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 555354b6e9e9SScott Teel return -1; /* failed to recover */ 555454b6e9e9SScott Teel } 555554b6e9e9SScott Teel 555654b6e9e9SScott Teel /* device recovered */ 555754b6e9e9SScott Teel dev_info(&h->pdev->dev, 555854b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 555954b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 556054b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 556154b6e9e9SScott Teel 556254b6e9e9SScott Teel return rc; /* success */ 556354b6e9e9SScott Teel } 556454b6e9e9SScott Teel 55658be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 55668be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 55678be986ccSStephen Cameron { 55688be986ccSStephen Cameron int rc = IO_OK; 55698be986ccSStephen Cameron struct CommandList *c; 55708be986ccSStephen Cameron __le32 taglower, tagupper; 55718be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 55728be986ccSStephen Cameron struct io_accel2_cmd *c2; 55738be986ccSStephen Cameron 55748be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 55758be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 55768be986ccSStephen Cameron return -1; 55778be986ccSStephen Cameron 55788be986ccSStephen Cameron c = cmd_alloc(h); 55798be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 55808be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 55818be986ccSStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 55828be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 55838be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 55848be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 55858be986ccSStephen Cameron __func__, tagupper, taglower); 55868be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 55878be986ccSStephen Cameron 55888be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 55898be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 55908be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 55918be986ccSStephen Cameron switch (c2->error_data.serv_response) { 55928be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 55938be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 55948be986ccSStephen Cameron rc = 0; 55958be986ccSStephen Cameron break; 55968be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 55978be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 55988be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 55998be986ccSStephen Cameron rc = -1; 56008be986ccSStephen Cameron break; 56018be986ccSStephen Cameron default: 56028be986ccSStephen Cameron dev_warn(&h->pdev->dev, 56038be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 56048be986ccSStephen Cameron __func__, tagupper, taglower, 56058be986ccSStephen Cameron c2->error_data.serv_response); 56068be986ccSStephen Cameron rc = -1; 56078be986ccSStephen Cameron } 56088be986ccSStephen Cameron cmd_free(h, c); 56098be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 56108be986ccSStephen Cameron tagupper, taglower); 56118be986ccSStephen Cameron return rc; 56128be986ccSStephen Cameron } 56138be986ccSStephen Cameron 56146cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 561525163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 56166cba3f19SStephen M. Cameron { 56178be986ccSStephen Cameron /* 56188be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 561954b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 56208be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 56218be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 562254b6e9e9SScott Teel */ 56238be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 56248be986ccSStephen Cameron if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) 56258be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 56268be986ccSStephen Cameron reply_queue); 56278be986ccSStephen Cameron else 562825163bd5SWebb Scales return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, 562925163bd5SWebb Scales abort, reply_queue); 56308be986ccSStephen Cameron } 56319b5c48c2SStephen Cameron return hpsa_send_abort(h, scsi3addr, abort, reply_queue); 563225163bd5SWebb Scales } 563325163bd5SWebb Scales 563425163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 563525163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 563625163bd5SWebb Scales struct CommandList *c) 563725163bd5SWebb Scales { 563825163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 563925163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 564025163bd5SWebb Scales return c->Header.ReplyQueue; 56416cba3f19SStephen M. Cameron } 56426cba3f19SStephen M. Cameron 56439b5c48c2SStephen Cameron /* 56449b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 56459b5c48c2SStephen Cameron * over-subscription of commands 56469b5c48c2SStephen Cameron */ 56479b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 56489b5c48c2SStephen Cameron { 56499b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 56509b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 56519b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 56529b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 56539b5c48c2SStephen Cameron } 56549b5c48c2SStephen Cameron 565575167d2cSStephen M. Cameron /* Send an abort for the specified command. 565675167d2cSStephen M. Cameron * If the device and controller support it, 565775167d2cSStephen M. Cameron * send a task abort request. 565875167d2cSStephen M. Cameron */ 565975167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 566075167d2cSStephen M. Cameron { 566175167d2cSStephen M. Cameron 5662a58e7e53SWebb Scales int rc; 566375167d2cSStephen M. Cameron struct ctlr_info *h; 566475167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 566575167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 566675167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 566775167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 566875167d2cSStephen M. Cameron int ml = 0; 56692b08b3e9SDon Brace __le32 tagupper, taglower; 567025163bd5SWebb Scales int refcount, reply_queue; 567125163bd5SWebb Scales 567225163bd5SWebb Scales if (sc == NULL) 567325163bd5SWebb Scales return FAILED; 567475167d2cSStephen M. Cameron 56759b5c48c2SStephen Cameron if (sc->device == NULL) 56769b5c48c2SStephen Cameron return FAILED; 56779b5c48c2SStephen Cameron 567875167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 567975167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 56809b5c48c2SStephen Cameron if (h == NULL) 568175167d2cSStephen M. Cameron return FAILED; 568275167d2cSStephen M. Cameron 568325163bd5SWebb Scales /* Find the device of the command to be aborted */ 568425163bd5SWebb Scales dev = sc->device->hostdata; 568525163bd5SWebb Scales if (!dev) { 568625163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 568725163bd5SWebb Scales msg); 5688e345893bSDon Brace return FAILED; 568925163bd5SWebb Scales } 569025163bd5SWebb Scales 569125163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 569225163bd5SWebb Scales if (lockup_detected(h)) { 569325163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 569425163bd5SWebb Scales "ABORT FAILED, lockup detected"); 569525163bd5SWebb Scales return FAILED; 569625163bd5SWebb Scales } 569725163bd5SWebb Scales 569825163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 569925163bd5SWebb Scales if (detect_controller_lockup(h)) { 570025163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 570125163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 570225163bd5SWebb Scales return FAILED; 570325163bd5SWebb Scales } 5704e345893bSDon Brace 570575167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 570675167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 570775167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 570875167d2cSStephen M. Cameron return FAILED; 570975167d2cSStephen M. Cameron 571075167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 57114b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 571275167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 57130d96ef5fSWebb Scales sc->device->id, sc->device->lun, 57144b761557SRobert Elliott "Aborting command", sc); 571575167d2cSStephen M. Cameron 571675167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 571775167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 571875167d2cSStephen M. Cameron if (abort == NULL) { 5719281a7fd0SWebb Scales /* This can happen if the command already completed. */ 5720281a7fd0SWebb Scales return SUCCESS; 5721281a7fd0SWebb Scales } 5722281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 5723281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 5724281a7fd0SWebb Scales cmd_free(h, abort); 5725281a7fd0SWebb Scales return SUCCESS; 572675167d2cSStephen M. Cameron } 57279b5c48c2SStephen Cameron 57289b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 57299b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 57309b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 57319b5c48c2SStephen Cameron cmd_free(h, abort); 57329b5c48c2SStephen Cameron return FAILED; 57339b5c48c2SStephen Cameron } 57349b5c48c2SStephen Cameron 5735a58e7e53SWebb Scales /* 5736a58e7e53SWebb Scales * Check that we're aborting the right command. 5737a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 5738a58e7e53SWebb Scales */ 5739a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 5740a58e7e53SWebb Scales cmd_free(h, abort); 5741a58e7e53SWebb Scales return SUCCESS; 5742a58e7e53SWebb Scales } 5743a58e7e53SWebb Scales 5744a58e7e53SWebb Scales abort->abort_pending = true; 574517eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 574625163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 574717eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 57487fa3030cSStephen Cameron as = abort->scsi_cmd; 574975167d2cSStephen M. Cameron if (as != NULL) 57504b761557SRobert Elliott ml += sprintf(msg+ml, 57514b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 57524b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 57534b761557SRobert Elliott as->serial_number); 57544b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 57550d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 57564b761557SRobert Elliott 575775167d2cSStephen M. Cameron /* 575875167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 575975167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 576075167d2cSStephen M. Cameron * distinguish which. Send the abort down. 576175167d2cSStephen M. Cameron */ 57629b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 57639b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 57644b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 57654b761557SRobert Elliott msg); 57669b5c48c2SStephen Cameron cmd_free(h, abort); 57679b5c48c2SStephen Cameron return FAILED; 57689b5c48c2SStephen Cameron } 576925163bd5SWebb Scales rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue); 57709b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 57719b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 577275167d2cSStephen M. Cameron if (rc != 0) { 57734b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 57740d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 57750d96ef5fSWebb Scales "FAILED to abort command"); 5776281a7fd0SWebb Scales cmd_free(h, abort); 577775167d2cSStephen M. Cameron return FAILED; 577875167d2cSStephen M. Cameron } 57794b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 5780d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 5781a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 5782281a7fd0SWebb Scales cmd_free(h, abort); 5783a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 578475167d2cSStephen M. Cameron } 578575167d2cSStephen M. Cameron 5786edd16368SStephen M. Cameron /* 578773153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 578873153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 578973153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 579073153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 579173153fe5SWebb Scales */ 579273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 579373153fe5SWebb Scales struct scsi_cmnd *scmd) 579473153fe5SWebb Scales { 579573153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 579673153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 579773153fe5SWebb Scales 579873153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 579973153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 580073153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 580173153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 580273153fe5SWebb Scales * bounds, it's probably not our bug. 580373153fe5SWebb Scales */ 580473153fe5SWebb Scales BUG(); 580573153fe5SWebb Scales } 580673153fe5SWebb Scales 580773153fe5SWebb Scales atomic_inc(&c->refcount); 580873153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 580973153fe5SWebb Scales /* 581073153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 581173153fe5SWebb Scales * value. Thus, there should never be a collision here between 581273153fe5SWebb Scales * two requests...because if the selected command isn't idle 581373153fe5SWebb Scales * then someone is going to be very disappointed. 581473153fe5SWebb Scales */ 581573153fe5SWebb Scales dev_err(&h->pdev->dev, 581673153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 581773153fe5SWebb Scales idx); 581873153fe5SWebb Scales if (c->scsi_cmd != NULL) 581973153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 582073153fe5SWebb Scales scsi_print_command(scmd); 582173153fe5SWebb Scales } 582273153fe5SWebb Scales 582373153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 582473153fe5SWebb Scales return c; 582573153fe5SWebb Scales } 582673153fe5SWebb Scales 582773153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 582873153fe5SWebb Scales { 582973153fe5SWebb Scales /* 583073153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 583173153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 583273153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 583373153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 583473153fe5SWebb Scales */ 583573153fe5SWebb Scales (void)atomic_dec(&c->refcount); 583673153fe5SWebb Scales } 583773153fe5SWebb Scales 583873153fe5SWebb Scales /* 5839edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 5840edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 5841edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 5842edd16368SStephen M. Cameron * cmd_free() is the complement. 5843bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 5844bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 5845edd16368SStephen M. Cameron */ 5846281a7fd0SWebb Scales 5847edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 5848edd16368SStephen M. Cameron { 5849edd16368SStephen M. Cameron struct CommandList *c; 5850360c73bdSStephen Cameron int refcount, i; 585173153fe5SWebb Scales int offset = 0; 5852edd16368SStephen M. Cameron 585333811026SRobert Elliott /* 585433811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 58554c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 58564c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 58574c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 58584c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 58594c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 58604c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 58614c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 58624c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 586373153fe5SWebb Scales * 586473153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 586573153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 586673153fe5SWebb Scales * all works, since we have at least one command structure available; 586773153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 586873153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 586973153fe5SWebb Scales * layer will use the higher indexes. 58704c413128SStephen M. Cameron */ 58714c413128SStephen M. Cameron 5872281a7fd0SWebb Scales for (;;) { 587373153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 587473153fe5SWebb Scales HPSA_NRESERVED_CMDS, 587573153fe5SWebb Scales offset); 587673153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 5877281a7fd0SWebb Scales offset = 0; 5878281a7fd0SWebb Scales continue; 5879281a7fd0SWebb Scales } 5880edd16368SStephen M. Cameron c = h->cmd_pool + i; 5881281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 5882281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 5883281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 588473153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 5885281a7fd0SWebb Scales continue; 5886281a7fd0SWebb Scales } 5887281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 5888281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 5889281a7fd0SWebb Scales break; /* it's ours now. */ 5890281a7fd0SWebb Scales } 5891360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 5892edd16368SStephen M. Cameron return c; 5893edd16368SStephen M. Cameron } 5894edd16368SStephen M. Cameron 589573153fe5SWebb Scales /* 589673153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 589773153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 589873153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 589973153fe5SWebb Scales * the clear-bit is harmless. 590073153fe5SWebb Scales */ 5901edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 5902edd16368SStephen M. Cameron { 5903281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 5904edd16368SStephen M. Cameron int i; 5905edd16368SStephen M. Cameron 5906edd16368SStephen M. Cameron i = c - h->cmd_pool; 5907edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 5908edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 5909edd16368SStephen M. Cameron } 5910281a7fd0SWebb Scales } 5911edd16368SStephen M. Cameron 5912edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 5913edd16368SStephen M. Cameron 591442a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 591542a91641SDon Brace void __user *arg) 5916edd16368SStephen M. Cameron { 5917edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 5918edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 5919edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 5920edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 5921edd16368SStephen M. Cameron int err; 5922edd16368SStephen M. Cameron u32 cp; 5923edd16368SStephen M. Cameron 5924938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 5925edd16368SStephen M. Cameron err = 0; 5926edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 5927edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 5928edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 5929edd16368SStephen M. Cameron sizeof(arg64.Request)); 5930edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 5931edd16368SStephen M. Cameron sizeof(arg64.error_info)); 5932edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 5933edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 5934edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 5935edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 5936edd16368SStephen M. Cameron 5937edd16368SStephen M. Cameron if (err) 5938edd16368SStephen M. Cameron return -EFAULT; 5939edd16368SStephen M. Cameron 594042a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 5941edd16368SStephen M. Cameron if (err) 5942edd16368SStephen M. Cameron return err; 5943edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 5944edd16368SStephen M. Cameron sizeof(arg32->error_info)); 5945edd16368SStephen M. Cameron if (err) 5946edd16368SStephen M. Cameron return -EFAULT; 5947edd16368SStephen M. Cameron return err; 5948edd16368SStephen M. Cameron } 5949edd16368SStephen M. Cameron 5950edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 595142a91641SDon Brace int cmd, void __user *arg) 5952edd16368SStephen M. Cameron { 5953edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 5954edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 5955edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 5956edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 5957edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 5958edd16368SStephen M. Cameron int err; 5959edd16368SStephen M. Cameron u32 cp; 5960edd16368SStephen M. Cameron 5961938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 5962edd16368SStephen M. Cameron err = 0; 5963edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 5964edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 5965edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 5966edd16368SStephen M. Cameron sizeof(arg64.Request)); 5967edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 5968edd16368SStephen M. Cameron sizeof(arg64.error_info)); 5969edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 5970edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 5971edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 5972edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 5973edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 5974edd16368SStephen M. Cameron 5975edd16368SStephen M. Cameron if (err) 5976edd16368SStephen M. Cameron return -EFAULT; 5977edd16368SStephen M. Cameron 597842a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 5979edd16368SStephen M. Cameron if (err) 5980edd16368SStephen M. Cameron return err; 5981edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 5982edd16368SStephen M. Cameron sizeof(arg32->error_info)); 5983edd16368SStephen M. Cameron if (err) 5984edd16368SStephen M. Cameron return -EFAULT; 5985edd16368SStephen M. Cameron return err; 5986edd16368SStephen M. Cameron } 598771fe75a7SStephen M. Cameron 598842a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 598971fe75a7SStephen M. Cameron { 599071fe75a7SStephen M. Cameron switch (cmd) { 599171fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 599271fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 599371fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 599471fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 599571fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 599671fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 599771fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 599871fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 599971fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 600071fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 600171fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 600271fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 600371fe75a7SStephen M. Cameron case CCISS_REGNEWD: 600471fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 600571fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 600671fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 600771fe75a7SStephen M. Cameron 600871fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 600971fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 601071fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 601171fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 601271fe75a7SStephen M. Cameron 601371fe75a7SStephen M. Cameron default: 601471fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 601571fe75a7SStephen M. Cameron } 601671fe75a7SStephen M. Cameron } 6017edd16368SStephen M. Cameron #endif 6018edd16368SStephen M. Cameron 6019edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6020edd16368SStephen M. Cameron { 6021edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6022edd16368SStephen M. Cameron 6023edd16368SStephen M. Cameron if (!argp) 6024edd16368SStephen M. Cameron return -EINVAL; 6025edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6026edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6027edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6028edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6029edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6030edd16368SStephen M. Cameron return -EFAULT; 6031edd16368SStephen M. Cameron return 0; 6032edd16368SStephen M. Cameron } 6033edd16368SStephen M. Cameron 6034edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6035edd16368SStephen M. Cameron { 6036edd16368SStephen M. Cameron DriverVer_type DriverVer; 6037edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6038edd16368SStephen M. Cameron int rc; 6039edd16368SStephen M. Cameron 6040edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6041edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6042edd16368SStephen M. Cameron if (rc != 3) { 6043edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6044edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6045edd16368SStephen M. Cameron vmaj = 0; 6046edd16368SStephen M. Cameron vmin = 0; 6047edd16368SStephen M. Cameron vsubmin = 0; 6048edd16368SStephen M. Cameron } 6049edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6050edd16368SStephen M. Cameron if (!argp) 6051edd16368SStephen M. Cameron return -EINVAL; 6052edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6053edd16368SStephen M. Cameron return -EFAULT; 6054edd16368SStephen M. Cameron return 0; 6055edd16368SStephen M. Cameron } 6056edd16368SStephen M. Cameron 6057edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6058edd16368SStephen M. Cameron { 6059edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6060edd16368SStephen M. Cameron struct CommandList *c; 6061edd16368SStephen M. Cameron char *buff = NULL; 606250a0decfSStephen M. Cameron u64 temp64; 6063c1f63c8fSStephen M. Cameron int rc = 0; 6064edd16368SStephen M. Cameron 6065edd16368SStephen M. Cameron if (!argp) 6066edd16368SStephen M. Cameron return -EINVAL; 6067edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6068edd16368SStephen M. Cameron return -EPERM; 6069edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6070edd16368SStephen M. Cameron return -EFAULT; 6071edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6072edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6073edd16368SStephen M. Cameron return -EINVAL; 6074edd16368SStephen M. Cameron } 6075edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6076edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6077edd16368SStephen M. Cameron if (buff == NULL) 60782dd02d74SRobert Elliott return -ENOMEM; 60799233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6080edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6081b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6082b03a7771SStephen M. Cameron iocommand.buf_size)) { 6083c1f63c8fSStephen M. Cameron rc = -EFAULT; 6084c1f63c8fSStephen M. Cameron goto out_kfree; 6085edd16368SStephen M. Cameron } 6086b03a7771SStephen M. Cameron } else { 6087edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6088b03a7771SStephen M. Cameron } 6089b03a7771SStephen M. Cameron } 609045fcb86eSStephen Cameron c = cmd_alloc(h); 6091bf43caf3SRobert Elliott 6092edd16368SStephen M. Cameron /* Fill in the command type */ 6093edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6094a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6095edd16368SStephen M. Cameron /* Fill in Command Header */ 6096edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6097edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6098edd16368SStephen M. Cameron c->Header.SGList = 1; 609950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6100edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6101edd16368SStephen M. Cameron c->Header.SGList = 0; 610250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6103edd16368SStephen M. Cameron } 6104edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6105edd16368SStephen M. Cameron 6106edd16368SStephen M. Cameron /* Fill in Request block */ 6107edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6108edd16368SStephen M. Cameron sizeof(c->Request)); 6109edd16368SStephen M. Cameron 6110edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6111edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 611250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6113edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 611450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 611550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 611650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6117bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6118bcc48ffaSStephen M. Cameron goto out; 6119bcc48ffaSStephen M. Cameron } 612050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 612150a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 612250a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6123edd16368SStephen M. Cameron } 612425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6125c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6126edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6127edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 612825163bd5SWebb Scales if (rc) { 612925163bd5SWebb Scales rc = -EIO; 613025163bd5SWebb Scales goto out; 613125163bd5SWebb Scales } 6132edd16368SStephen M. Cameron 6133edd16368SStephen M. Cameron /* Copy the error information out */ 6134edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6135edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6136edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6137c1f63c8fSStephen M. Cameron rc = -EFAULT; 6138c1f63c8fSStephen M. Cameron goto out; 6139edd16368SStephen M. Cameron } 61409233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6141b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6142edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6143edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6144c1f63c8fSStephen M. Cameron rc = -EFAULT; 6145c1f63c8fSStephen M. Cameron goto out; 6146edd16368SStephen M. Cameron } 6147edd16368SStephen M. Cameron } 6148c1f63c8fSStephen M. Cameron out: 614945fcb86eSStephen Cameron cmd_free(h, c); 6150c1f63c8fSStephen M. Cameron out_kfree: 6151c1f63c8fSStephen M. Cameron kfree(buff); 6152c1f63c8fSStephen M. Cameron return rc; 6153edd16368SStephen M. Cameron } 6154edd16368SStephen M. Cameron 6155edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6156edd16368SStephen M. Cameron { 6157edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6158edd16368SStephen M. Cameron struct CommandList *c; 6159edd16368SStephen M. Cameron unsigned char **buff = NULL; 6160edd16368SStephen M. Cameron int *buff_size = NULL; 616150a0decfSStephen M. Cameron u64 temp64; 6162edd16368SStephen M. Cameron BYTE sg_used = 0; 6163edd16368SStephen M. Cameron int status = 0; 616401a02ffcSStephen M. Cameron u32 left; 616501a02ffcSStephen M. Cameron u32 sz; 6166edd16368SStephen M. Cameron BYTE __user *data_ptr; 6167edd16368SStephen M. Cameron 6168edd16368SStephen M. Cameron if (!argp) 6169edd16368SStephen M. Cameron return -EINVAL; 6170edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6171edd16368SStephen M. Cameron return -EPERM; 6172edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6173edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6174edd16368SStephen M. Cameron if (!ioc) { 6175edd16368SStephen M. Cameron status = -ENOMEM; 6176edd16368SStephen M. Cameron goto cleanup1; 6177edd16368SStephen M. Cameron } 6178edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6179edd16368SStephen M. Cameron status = -EFAULT; 6180edd16368SStephen M. Cameron goto cleanup1; 6181edd16368SStephen M. Cameron } 6182edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6183edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6184edd16368SStephen M. Cameron status = -EINVAL; 6185edd16368SStephen M. Cameron goto cleanup1; 6186edd16368SStephen M. Cameron } 6187edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6188edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6189edd16368SStephen M. Cameron status = -EINVAL; 6190edd16368SStephen M. Cameron goto cleanup1; 6191edd16368SStephen M. Cameron } 6192d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6193edd16368SStephen M. Cameron status = -EINVAL; 6194edd16368SStephen M. Cameron goto cleanup1; 6195edd16368SStephen M. Cameron } 6196d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6197edd16368SStephen M. Cameron if (!buff) { 6198edd16368SStephen M. Cameron status = -ENOMEM; 6199edd16368SStephen M. Cameron goto cleanup1; 6200edd16368SStephen M. Cameron } 6201d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6202edd16368SStephen M. Cameron if (!buff_size) { 6203edd16368SStephen M. Cameron status = -ENOMEM; 6204edd16368SStephen M. Cameron goto cleanup1; 6205edd16368SStephen M. Cameron } 6206edd16368SStephen M. Cameron left = ioc->buf_size; 6207edd16368SStephen M. Cameron data_ptr = ioc->buf; 6208edd16368SStephen M. Cameron while (left) { 6209edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6210edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6211edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6212edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6213edd16368SStephen M. Cameron status = -ENOMEM; 6214edd16368SStephen M. Cameron goto cleanup1; 6215edd16368SStephen M. Cameron } 62169233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6217edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 62180758f4f7SStephen M. Cameron status = -EFAULT; 6219edd16368SStephen M. Cameron goto cleanup1; 6220edd16368SStephen M. Cameron } 6221edd16368SStephen M. Cameron } else 6222edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6223edd16368SStephen M. Cameron left -= sz; 6224edd16368SStephen M. Cameron data_ptr += sz; 6225edd16368SStephen M. Cameron sg_used++; 6226edd16368SStephen M. Cameron } 622745fcb86eSStephen Cameron c = cmd_alloc(h); 6228bf43caf3SRobert Elliott 6229edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6230a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6231edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 623250a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 623350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6234edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6235edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6236edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6237edd16368SStephen M. Cameron int i; 6238edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 623950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6240edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 624150a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 624250a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 624350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 624450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6245bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6246bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6247bcc48ffaSStephen M. Cameron status = -ENOMEM; 6248e2d4a1f6SStephen M. Cameron goto cleanup0; 6249bcc48ffaSStephen M. Cameron } 625050a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 625150a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 625250a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6253edd16368SStephen M. Cameron } 625450a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6255edd16368SStephen M. Cameron } 625625163bd5SWebb Scales status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6257b03a7771SStephen M. Cameron if (sg_used) 6258edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6259edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 626025163bd5SWebb Scales if (status) { 626125163bd5SWebb Scales status = -EIO; 626225163bd5SWebb Scales goto cleanup0; 626325163bd5SWebb Scales } 626425163bd5SWebb Scales 6265edd16368SStephen M. Cameron /* Copy the error information out */ 6266edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6267edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6268edd16368SStephen M. Cameron status = -EFAULT; 6269e2d4a1f6SStephen M. Cameron goto cleanup0; 6270edd16368SStephen M. Cameron } 62719233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 62722b08b3e9SDon Brace int i; 62732b08b3e9SDon Brace 6274edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6275edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6276edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6277edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6278edd16368SStephen M. Cameron status = -EFAULT; 6279e2d4a1f6SStephen M. Cameron goto cleanup0; 6280edd16368SStephen M. Cameron } 6281edd16368SStephen M. Cameron ptr += buff_size[i]; 6282edd16368SStephen M. Cameron } 6283edd16368SStephen M. Cameron } 6284edd16368SStephen M. Cameron status = 0; 6285e2d4a1f6SStephen M. Cameron cleanup0: 628645fcb86eSStephen Cameron cmd_free(h, c); 6287edd16368SStephen M. Cameron cleanup1: 6288edd16368SStephen M. Cameron if (buff) { 62892b08b3e9SDon Brace int i; 62902b08b3e9SDon Brace 6291edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6292edd16368SStephen M. Cameron kfree(buff[i]); 6293edd16368SStephen M. Cameron kfree(buff); 6294edd16368SStephen M. Cameron } 6295edd16368SStephen M. Cameron kfree(buff_size); 6296edd16368SStephen M. Cameron kfree(ioc); 6297edd16368SStephen M. Cameron return status; 6298edd16368SStephen M. Cameron } 6299edd16368SStephen M. Cameron 6300edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6301edd16368SStephen M. Cameron struct CommandList *c) 6302edd16368SStephen M. Cameron { 6303edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6304edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6305edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6306edd16368SStephen M. Cameron } 63070390f0c0SStephen M. Cameron 6308edd16368SStephen M. Cameron /* 6309edd16368SStephen M. Cameron * ioctl 6310edd16368SStephen M. Cameron */ 631142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6312edd16368SStephen M. Cameron { 6313edd16368SStephen M. Cameron struct ctlr_info *h; 6314edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 63150390f0c0SStephen M. Cameron int rc; 6316edd16368SStephen M. Cameron 6317edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6318edd16368SStephen M. Cameron 6319edd16368SStephen M. Cameron switch (cmd) { 6320edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6321edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6322edd16368SStephen M. Cameron case CCISS_REGNEWD: 6323a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6324edd16368SStephen M. Cameron return 0; 6325edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6326edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6327edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6328edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6329edd16368SStephen M. Cameron case CCISS_PASSTHRU: 633034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 63310390f0c0SStephen M. Cameron return -EAGAIN; 63320390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 633334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 63340390f0c0SStephen M. Cameron return rc; 6335edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 633634f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 63370390f0c0SStephen M. Cameron return -EAGAIN; 63380390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 633934f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 63400390f0c0SStephen M. Cameron return rc; 6341edd16368SStephen M. Cameron default: 6342edd16368SStephen M. Cameron return -ENOTTY; 6343edd16368SStephen M. Cameron } 6344edd16368SStephen M. Cameron } 6345edd16368SStephen M. Cameron 6346bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 63476f039790SGreg Kroah-Hartman u8 reset_type) 634864670ac8SStephen M. Cameron { 634964670ac8SStephen M. Cameron struct CommandList *c; 635064670ac8SStephen M. Cameron 635164670ac8SStephen M. Cameron c = cmd_alloc(h); 6352bf43caf3SRobert Elliott 6353a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6354a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 635564670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 635664670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 635764670ac8SStephen M. Cameron c->waiting = NULL; 635864670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 635964670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 636064670ac8SStephen M. Cameron * the command either. This is the last command we will send before 636164670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 636264670ac8SStephen M. Cameron */ 6363bf43caf3SRobert Elliott return; 636464670ac8SStephen M. Cameron } 636564670ac8SStephen M. Cameron 6366a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6367b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6368edd16368SStephen M. Cameron int cmd_type) 6369edd16368SStephen M. Cameron { 6370edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 63719b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6372edd16368SStephen M. Cameron 6373edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6374a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6375edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6376edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6377edd16368SStephen M. Cameron c->Header.SGList = 1; 637850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6379edd16368SStephen M. Cameron } else { 6380edd16368SStephen M. Cameron c->Header.SGList = 0; 638150a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6382edd16368SStephen M. Cameron } 6383edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6384edd16368SStephen M. Cameron 6385edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6386edd16368SStephen M. Cameron switch (cmd) { 6387edd16368SStephen M. Cameron case HPSA_INQUIRY: 6388edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6389b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6390edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6391b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6392edd16368SStephen M. Cameron } 6393edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6394a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6395a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6396edd16368SStephen M. Cameron c->Request.Timeout = 0; 6397edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6398edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6399edd16368SStephen M. Cameron break; 6400edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6401edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6402edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6403edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6404edd16368SStephen M. Cameron */ 6405edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6406a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6407a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6408edd16368SStephen M. Cameron c->Request.Timeout = 0; 6409edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6410edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6411edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6412edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6413edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6414edd16368SStephen M. Cameron break; 6415c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6416c2adae44SScott Teel c->Request.CDBLen = 16; 6417c2adae44SScott Teel c->Request.type_attr_dir = 6418c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6419c2adae44SScott Teel c->Request.Timeout = 0; 6420c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6421c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6422c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6423c2adae44SScott Teel break; 6424c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6425c2adae44SScott Teel c->Request.CDBLen = 16; 6426c2adae44SScott Teel c->Request.type_attr_dir = 6427c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6428c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6429c2adae44SScott Teel c->Request.Timeout = 0; 6430c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6431c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6432c2adae44SScott Teel break; 6433edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6434edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6435a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6436a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6437a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6438edd16368SStephen M. Cameron c->Request.Timeout = 0; 6439edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6440edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6441bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6442bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6443edd16368SStephen M. Cameron break; 6444edd16368SStephen M. Cameron case TEST_UNIT_READY: 6445edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6446a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6447a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6448edd16368SStephen M. Cameron c->Request.Timeout = 0; 6449edd16368SStephen M. Cameron break; 6450283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6451283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6452a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6453a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6454283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6455283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6456283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6457283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6458283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6459283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6460283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6461283b4a9bSStephen M. Cameron break; 6462316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6463316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6464a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6465a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6466316b221aSStephen M. Cameron c->Request.Timeout = 0; 6467316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6468316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6469316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6470316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6471316b221aSStephen M. Cameron break; 647203383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 647303383736SDon Brace c->Request.CDBLen = 10; 647403383736SDon Brace c->Request.type_attr_dir = 647503383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 647603383736SDon Brace c->Request.Timeout = 0; 647703383736SDon Brace c->Request.CDB[0] = BMIC_READ; 647803383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 647903383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 648003383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 648103383736SDon Brace break; 648266749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 648366749d0dSScott Teel c->Request.CDBLen = 10; 648466749d0dSScott Teel c->Request.type_attr_dir = 648566749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 648666749d0dSScott Teel c->Request.Timeout = 0; 648766749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 648866749d0dSScott Teel c->Request.CDB[1] = 0; 648966749d0dSScott Teel c->Request.CDB[2] = 0; 649066749d0dSScott Teel c->Request.CDB[3] = 0; 649166749d0dSScott Teel c->Request.CDB[4] = 0; 649266749d0dSScott Teel c->Request.CDB[5] = 0; 649366749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 649466749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 649566749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 649666749d0dSScott Teel c->Request.CDB[9] = 0; 649766749d0dSScott Teel break; 649866749d0dSScott Teel 6499edd16368SStephen M. Cameron default: 6500edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6501edd16368SStephen M. Cameron BUG(); 6502a2dac136SStephen M. Cameron return -1; 6503edd16368SStephen M. Cameron } 6504edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6505edd16368SStephen M. Cameron switch (cmd) { 6506edd16368SStephen M. Cameron 65070b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 65080b9b7b6eSScott Teel c->Request.CDBLen = 16; 65090b9b7b6eSScott Teel c->Request.type_attr_dir = 65100b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 65110b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 65120b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 65130b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 65140b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 65150b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 65160b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 65170b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 65180b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 65190b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 65200b9b7b6eSScott Teel break; 6521edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6522edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6523a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6524a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6525edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 652664670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 652764670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 652821e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6529edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6530edd16368SStephen M. Cameron /* LunID device */ 6531edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6532edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6533edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6534edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6535edd16368SStephen M. Cameron break; 653675167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 65379b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 65382b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 65399b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 65409b5c48c2SStephen Cameron tag, c->Header.tag); 654175167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6542a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6543a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6544a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 654575167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 654675167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 654775167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 654875167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 654975167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 655075167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 65519b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 655275167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 655375167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 655475167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 655575167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 655675167d2cSStephen M. Cameron break; 6557edd16368SStephen M. Cameron default: 6558edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6559edd16368SStephen M. Cameron cmd); 6560edd16368SStephen M. Cameron BUG(); 6561edd16368SStephen M. Cameron } 6562edd16368SStephen M. Cameron } else { 6563edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6564edd16368SStephen M. Cameron BUG(); 6565edd16368SStephen M. Cameron } 6566edd16368SStephen M. Cameron 6567a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6568edd16368SStephen M. Cameron case XFER_READ: 6569edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6570edd16368SStephen M. Cameron break; 6571edd16368SStephen M. Cameron case XFER_WRITE: 6572edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6573edd16368SStephen M. Cameron break; 6574edd16368SStephen M. Cameron case XFER_NONE: 6575edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6576edd16368SStephen M. Cameron break; 6577edd16368SStephen M. Cameron default: 6578edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6579edd16368SStephen M. Cameron } 6580a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6581a2dac136SStephen M. Cameron return -1; 6582a2dac136SStephen M. Cameron return 0; 6583edd16368SStephen M. Cameron } 6584edd16368SStephen M. Cameron 6585edd16368SStephen M. Cameron /* 6586edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6587edd16368SStephen M. Cameron */ 6588edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6589edd16368SStephen M. Cameron { 6590edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6591edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6592088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6593088ba34cSStephen M. Cameron page_offs + size); 6594edd16368SStephen M. Cameron 6595edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6596edd16368SStephen M. Cameron } 6597edd16368SStephen M. Cameron 6598254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6599edd16368SStephen M. Cameron { 6600254f796bSMatt Gates return h->access.command_completed(h, q); 6601edd16368SStephen M. Cameron } 6602edd16368SStephen M. Cameron 6603900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6604edd16368SStephen M. Cameron { 6605edd16368SStephen M. Cameron return h->access.intr_pending(h); 6606edd16368SStephen M. Cameron } 6607edd16368SStephen M. Cameron 6608edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6609edd16368SStephen M. Cameron { 661010f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 661110f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6612edd16368SStephen M. Cameron } 6613edd16368SStephen M. Cameron 661401a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 661501a02ffcSStephen M. Cameron u32 raw_tag) 6616edd16368SStephen M. Cameron { 6617edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6618edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6619edd16368SStephen M. Cameron return 1; 6620edd16368SStephen M. Cameron } 6621edd16368SStephen M. Cameron return 0; 6622edd16368SStephen M. Cameron } 6623edd16368SStephen M. Cameron 66245a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6625edd16368SStephen M. Cameron { 6626e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6627c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6628c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 66291fb011fbSStephen M. Cameron complete_scsi_command(c); 66308be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6631edd16368SStephen M. Cameron complete(c->waiting); 6632a104c99fSStephen M. Cameron } 6633a104c99fSStephen M. Cameron 6634303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 66351d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6636303932fdSDon Brace u32 raw_tag) 6637303932fdSDon Brace { 6638303932fdSDon Brace u32 tag_index; 6639303932fdSDon Brace struct CommandList *c; 6640303932fdSDon Brace 6641f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 66421d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6643303932fdSDon Brace c = h->cmd_pool + tag_index; 66445a3d16f5SStephen M. Cameron finish_cmd(c); 66451d94f94dSStephen M. Cameron } 6646303932fdSDon Brace } 6647303932fdSDon Brace 664864670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 664964670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 665064670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 665164670ac8SStephen M. Cameron * functions. 665264670ac8SStephen M. Cameron */ 665364670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 665464670ac8SStephen M. Cameron { 665564670ac8SStephen M. Cameron if (likely(!reset_devices)) 665664670ac8SStephen M. Cameron return 0; 665764670ac8SStephen M. Cameron 665864670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 665964670ac8SStephen M. Cameron return 0; 666064670ac8SStephen M. Cameron 666164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 666264670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 666364670ac8SStephen M. Cameron 666464670ac8SStephen M. Cameron return 1; 666564670ac8SStephen M. Cameron } 666664670ac8SStephen M. Cameron 6667254f796bSMatt Gates /* 6668254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6669254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6670254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6671254f796bSMatt Gates */ 6672254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 667364670ac8SStephen M. Cameron { 6674254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6675254f796bSMatt Gates } 6676254f796bSMatt Gates 6677254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6678254f796bSMatt Gates { 6679254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6680254f796bSMatt Gates u8 q = *(u8 *) queue; 668164670ac8SStephen M. Cameron u32 raw_tag; 668264670ac8SStephen M. Cameron 668364670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 668464670ac8SStephen M. Cameron return IRQ_NONE; 668564670ac8SStephen M. Cameron 668664670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 668764670ac8SStephen M. Cameron return IRQ_NONE; 6688a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 668964670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6690254f796bSMatt Gates raw_tag = get_next_completion(h, q); 669164670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6692254f796bSMatt Gates raw_tag = next_command(h, q); 669364670ac8SStephen M. Cameron } 669464670ac8SStephen M. Cameron return IRQ_HANDLED; 669564670ac8SStephen M. Cameron } 669664670ac8SStephen M. Cameron 6697254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 669864670ac8SStephen M. Cameron { 6699254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 670064670ac8SStephen M. Cameron u32 raw_tag; 6701254f796bSMatt Gates u8 q = *(u8 *) queue; 670264670ac8SStephen M. Cameron 670364670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 670464670ac8SStephen M. Cameron return IRQ_NONE; 670564670ac8SStephen M. Cameron 6706a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6707254f796bSMatt Gates raw_tag = get_next_completion(h, q); 670864670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6709254f796bSMatt Gates raw_tag = next_command(h, q); 671064670ac8SStephen M. Cameron return IRQ_HANDLED; 671164670ac8SStephen M. Cameron } 671264670ac8SStephen M. Cameron 6713254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6714edd16368SStephen M. Cameron { 6715254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6716303932fdSDon Brace u32 raw_tag; 6717254f796bSMatt Gates u8 q = *(u8 *) queue; 6718edd16368SStephen M. Cameron 6719edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6720edd16368SStephen M. Cameron return IRQ_NONE; 6721a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 672210f66018SStephen M. Cameron while (interrupt_pending(h)) { 6723254f796bSMatt Gates raw_tag = get_next_completion(h, q); 672410f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 67251d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6726254f796bSMatt Gates raw_tag = next_command(h, q); 672710f66018SStephen M. Cameron } 672810f66018SStephen M. Cameron } 672910f66018SStephen M. Cameron return IRQ_HANDLED; 673010f66018SStephen M. Cameron } 673110f66018SStephen M. Cameron 6732254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 673310f66018SStephen M. Cameron { 6734254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 673510f66018SStephen M. Cameron u32 raw_tag; 6736254f796bSMatt Gates u8 q = *(u8 *) queue; 673710f66018SStephen M. Cameron 6738a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6739254f796bSMatt Gates raw_tag = get_next_completion(h, q); 6740303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 67411d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6742254f796bSMatt Gates raw_tag = next_command(h, q); 6743edd16368SStephen M. Cameron } 6744edd16368SStephen M. Cameron return IRQ_HANDLED; 6745edd16368SStephen M. Cameron } 6746edd16368SStephen M. Cameron 6747a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 6748a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 6749a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 6750a9a3a273SStephen M. Cameron */ 67516f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6752edd16368SStephen M. Cameron unsigned char type) 6753edd16368SStephen M. Cameron { 6754edd16368SStephen M. Cameron struct Command { 6755edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 6756edd16368SStephen M. Cameron struct RequestBlock Request; 6757edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 6758edd16368SStephen M. Cameron }; 6759edd16368SStephen M. Cameron struct Command *cmd; 6760edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 6761edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 6762edd16368SStephen M. Cameron dma_addr_t paddr64; 67632b08b3e9SDon Brace __le32 paddr32; 67642b08b3e9SDon Brace u32 tag; 6765edd16368SStephen M. Cameron void __iomem *vaddr; 6766edd16368SStephen M. Cameron int i, err; 6767edd16368SStephen M. Cameron 6768edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 6769edd16368SStephen M. Cameron if (vaddr == NULL) 6770edd16368SStephen M. Cameron return -ENOMEM; 6771edd16368SStephen M. Cameron 6772edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6773edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 6774edd16368SStephen M. Cameron * memory. 6775edd16368SStephen M. Cameron */ 6776edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 6777edd16368SStephen M. Cameron if (err) { 6778edd16368SStephen M. Cameron iounmap(vaddr); 67791eaec8f3SRobert Elliott return err; 6780edd16368SStephen M. Cameron } 6781edd16368SStephen M. Cameron 6782edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 6783edd16368SStephen M. Cameron if (cmd == NULL) { 6784edd16368SStephen M. Cameron iounmap(vaddr); 6785edd16368SStephen M. Cameron return -ENOMEM; 6786edd16368SStephen M. Cameron } 6787edd16368SStephen M. Cameron 6788edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 6789edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 6790edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 6791edd16368SStephen M. Cameron */ 67922b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 6793edd16368SStephen M. Cameron 6794edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 6795edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 679650a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 67972b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 6798edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 6799edd16368SStephen M. Cameron 6800edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 6801a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 6802a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 6803edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 6804edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 6805edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 6806edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 680750a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 68082b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 680950a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 6810edd16368SStephen M. Cameron 68112b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 6812edd16368SStephen M. Cameron 6813edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 6814edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 68152b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 6816edd16368SStephen M. Cameron break; 6817edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 6818edd16368SStephen M. Cameron } 6819edd16368SStephen M. Cameron 6820edd16368SStephen M. Cameron iounmap(vaddr); 6821edd16368SStephen M. Cameron 6822edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 6823edd16368SStephen M. Cameron * still complete the command. 6824edd16368SStephen M. Cameron */ 6825edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 6826edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 6827edd16368SStephen M. Cameron opcode, type); 6828edd16368SStephen M. Cameron return -ETIMEDOUT; 6829edd16368SStephen M. Cameron } 6830edd16368SStephen M. Cameron 6831edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 6832edd16368SStephen M. Cameron 6833edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 6834edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 6835edd16368SStephen M. Cameron opcode, type); 6836edd16368SStephen M. Cameron return -EIO; 6837edd16368SStephen M. Cameron } 6838edd16368SStephen M. Cameron 6839edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 6840edd16368SStephen M. Cameron opcode, type); 6841edd16368SStephen M. Cameron return 0; 6842edd16368SStephen M. Cameron } 6843edd16368SStephen M. Cameron 6844edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 6845edd16368SStephen M. Cameron 68461df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 684742a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 6848edd16368SStephen M. Cameron { 6849edd16368SStephen M. Cameron 68501df8552aSStephen M. Cameron if (use_doorbell) { 68511df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 68521df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 68531df8552aSStephen M. Cameron * other way using the doorbell register. 6854edd16368SStephen M. Cameron */ 68551df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 6856cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 685785009239SStephen M. Cameron 685800701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 685985009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 686085009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 686185009239SStephen M. Cameron * over in some weird corner cases. 686285009239SStephen M. Cameron */ 686300701a96SJustin Lindley msleep(10000); 68641df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 6865edd16368SStephen M. Cameron 6866edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 6867edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 6868edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 6869edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 68701df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 68711df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 68721df8552aSStephen M. Cameron * controller." */ 6873edd16368SStephen M. Cameron 68742662cab8SDon Brace int rc = 0; 68752662cab8SDon Brace 68761df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 68772662cab8SDon Brace 6878edd16368SStephen M. Cameron /* enter the D3hot power management state */ 68792662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 68802662cab8SDon Brace if (rc) 68812662cab8SDon Brace return rc; 6882edd16368SStephen M. Cameron 6883edd16368SStephen M. Cameron msleep(500); 6884edd16368SStephen M. Cameron 6885edd16368SStephen M. Cameron /* enter the D0 power management state */ 68862662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 68872662cab8SDon Brace if (rc) 68882662cab8SDon Brace return rc; 6889c4853efeSMike Miller 6890c4853efeSMike Miller /* 6891c4853efeSMike Miller * The P600 requires a small delay when changing states. 6892c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 6893c4853efeSMike Miller * This for kdump only and is particular to the P600. 6894c4853efeSMike Miller */ 6895c4853efeSMike Miller msleep(500); 68961df8552aSStephen M. Cameron } 68971df8552aSStephen M. Cameron return 0; 68981df8552aSStephen M. Cameron } 68991df8552aSStephen M. Cameron 69006f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 6901580ada3cSStephen M. Cameron { 6902580ada3cSStephen M. Cameron memset(driver_version, 0, len); 6903f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 6904580ada3cSStephen M. Cameron } 6905580ada3cSStephen M. Cameron 69066f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 6907580ada3cSStephen M. Cameron { 6908580ada3cSStephen M. Cameron char *driver_version; 6909580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 6910580ada3cSStephen M. Cameron 6911580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 6912580ada3cSStephen M. Cameron if (!driver_version) 6913580ada3cSStephen M. Cameron return -ENOMEM; 6914580ada3cSStephen M. Cameron 6915580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 6916580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 6917580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 6918580ada3cSStephen M. Cameron kfree(driver_version); 6919580ada3cSStephen M. Cameron return 0; 6920580ada3cSStephen M. Cameron } 6921580ada3cSStephen M. Cameron 69226f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 69236f039790SGreg Kroah-Hartman unsigned char *driver_ver) 6924580ada3cSStephen M. Cameron { 6925580ada3cSStephen M. Cameron int i; 6926580ada3cSStephen M. Cameron 6927580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 6928580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 6929580ada3cSStephen M. Cameron } 6930580ada3cSStephen M. Cameron 69316f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 6932580ada3cSStephen M. Cameron { 6933580ada3cSStephen M. Cameron 6934580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 6935580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 6936580ada3cSStephen M. Cameron 6937580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 6938580ada3cSStephen M. Cameron if (!old_driver_ver) 6939580ada3cSStephen M. Cameron return -ENOMEM; 6940580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 6941580ada3cSStephen M. Cameron 6942580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 6943580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 6944580ada3cSStephen M. Cameron */ 6945580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 6946580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 6947580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 6948580ada3cSStephen M. Cameron kfree(old_driver_ver); 6949580ada3cSStephen M. Cameron return rc; 6950580ada3cSStephen M. Cameron } 69511df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 69521df8552aSStephen M. Cameron * states or the using the doorbell register. 69531df8552aSStephen M. Cameron */ 69546b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 69551df8552aSStephen M. Cameron { 69561df8552aSStephen M. Cameron u64 cfg_offset; 69571df8552aSStephen M. Cameron u32 cfg_base_addr; 69581df8552aSStephen M. Cameron u64 cfg_base_addr_index; 69591df8552aSStephen M. Cameron void __iomem *vaddr; 69601df8552aSStephen M. Cameron unsigned long paddr; 6961580ada3cSStephen M. Cameron u32 misc_fw_support; 6962270d05deSStephen M. Cameron int rc; 69631df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 6964cf0b08d0SStephen M. Cameron u32 use_doorbell; 6965270d05deSStephen M. Cameron u16 command_register; 69661df8552aSStephen M. Cameron 69671df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 69681df8552aSStephen M. Cameron * the same thing as 69691df8552aSStephen M. Cameron * 69701df8552aSStephen M. Cameron * pci_save_state(pci_dev); 69711df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 69721df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 69731df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 69741df8552aSStephen M. Cameron * 69751df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 69761df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 69771df8552aSStephen M. Cameron * using the doorbell register. 69781df8552aSStephen M. Cameron */ 697918867659SStephen M. Cameron 698060f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 698160f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 698225c1e56aSStephen M. Cameron return -ENODEV; 698325c1e56aSStephen M. Cameron } 698446380786SStephen M. Cameron 698546380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 698646380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 698746380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 698818867659SStephen M. Cameron 6989270d05deSStephen M. Cameron /* Save the PCI command register */ 6990270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 6991270d05deSStephen M. Cameron pci_save_state(pdev); 69921df8552aSStephen M. Cameron 69931df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 69941df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 69951df8552aSStephen M. Cameron if (rc) 69961df8552aSStephen M. Cameron return rc; 69971df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 69981df8552aSStephen M. Cameron if (!vaddr) 69991df8552aSStephen M. Cameron return -ENOMEM; 70001df8552aSStephen M. Cameron 70011df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 70021df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 70031df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 70041df8552aSStephen M. Cameron if (rc) 70051df8552aSStephen M. Cameron goto unmap_vaddr; 70061df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 70071df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 70081df8552aSStephen M. Cameron if (!cfgtable) { 70091df8552aSStephen M. Cameron rc = -ENOMEM; 70101df8552aSStephen M. Cameron goto unmap_vaddr; 70111df8552aSStephen M. Cameron } 7012580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7013580ada3cSStephen M. Cameron if (rc) 701403741d95STomas Henzl goto unmap_cfgtable; 70151df8552aSStephen M. Cameron 7016cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7017cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7018cf0b08d0SStephen M. Cameron */ 70191df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7020cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7021cf0b08d0SStephen M. Cameron if (use_doorbell) { 7022cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7023cf0b08d0SStephen M. Cameron } else { 70241df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7025cf0b08d0SStephen M. Cameron if (use_doorbell) { 7026050f7147SStephen Cameron dev_warn(&pdev->dev, 7027050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 702864670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7029cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7030cf0b08d0SStephen M. Cameron } 7031cf0b08d0SStephen M. Cameron } 70321df8552aSStephen M. Cameron 70331df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 70341df8552aSStephen M. Cameron if (rc) 70351df8552aSStephen M. Cameron goto unmap_cfgtable; 7036edd16368SStephen M. Cameron 7037270d05deSStephen M. Cameron pci_restore_state(pdev); 7038270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7039edd16368SStephen M. Cameron 70401df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 70411df8552aSStephen M. Cameron need a little pause here */ 70421df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 70431df8552aSStephen M. Cameron 7044fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7045fe5389c8SStephen M. Cameron if (rc) { 7046fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7047050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7048fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7049fe5389c8SStephen M. Cameron } 7050fe5389c8SStephen M. Cameron 7051580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7052580ada3cSStephen M. Cameron if (rc < 0) 7053580ada3cSStephen M. Cameron goto unmap_cfgtable; 7054580ada3cSStephen M. Cameron if (rc) { 705564670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 705664670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 705764670ac8SStephen M. Cameron rc = -ENOTSUPP; 7058580ada3cSStephen M. Cameron } else { 705964670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 70601df8552aSStephen M. Cameron } 70611df8552aSStephen M. Cameron 70621df8552aSStephen M. Cameron unmap_cfgtable: 70631df8552aSStephen M. Cameron iounmap(cfgtable); 70641df8552aSStephen M. Cameron 70651df8552aSStephen M. Cameron unmap_vaddr: 70661df8552aSStephen M. Cameron iounmap(vaddr); 70671df8552aSStephen M. Cameron return rc; 7068edd16368SStephen M. Cameron } 7069edd16368SStephen M. Cameron 7070edd16368SStephen M. Cameron /* 7071edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7072edd16368SStephen M. Cameron * the io functions. 7073edd16368SStephen M. Cameron * This is for debug only. 7074edd16368SStephen M. Cameron */ 707542a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7076edd16368SStephen M. Cameron { 707758f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7078edd16368SStephen M. Cameron int i; 7079edd16368SStephen M. Cameron char temp_name[17]; 7080edd16368SStephen M. Cameron 7081edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7082edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7083edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7084edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7085edd16368SStephen M. Cameron temp_name[4] = '\0'; 7086edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7087edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7088edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7089edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7090edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7091edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7092edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7093edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7094edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7095edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7096edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7097edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 709869d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7099edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7100edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7101edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7102edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7103edd16368SStephen M. Cameron temp_name[16] = '\0'; 7104edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7105edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7106edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7107edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 710858f8665cSStephen M. Cameron } 7109edd16368SStephen M. Cameron 7110edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7111edd16368SStephen M. Cameron { 7112edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7113edd16368SStephen M. Cameron 7114edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7115edd16368SStephen M. Cameron return 0; 7116edd16368SStephen M. Cameron offset = 0; 7117edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7118edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7119edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7120edd16368SStephen M. Cameron offset += 4; 7121edd16368SStephen M. Cameron else { 7122edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7123edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7124edd16368SStephen M. Cameron switch (mem_type) { 7125edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7126edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7127edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7128edd16368SStephen M. Cameron break; 7129edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7130edd16368SStephen M. Cameron offset += 8; 7131edd16368SStephen M. Cameron break; 7132edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7133edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7134edd16368SStephen M. Cameron "base address is invalid\n"); 7135edd16368SStephen M. Cameron return -1; 7136edd16368SStephen M. Cameron break; 7137edd16368SStephen M. Cameron } 7138edd16368SStephen M. Cameron } 7139edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7140edd16368SStephen M. Cameron return i + 1; 7141edd16368SStephen M. Cameron } 7142edd16368SStephen M. Cameron return -1; 7143edd16368SStephen M. Cameron } 7144edd16368SStephen M. Cameron 7145cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7146cc64c817SRobert Elliott { 7147cc64c817SRobert Elliott if (h->msix_vector) { 7148cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7149cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7150105a3dbcSRobert Elliott h->msix_vector = 0; 7151cc64c817SRobert Elliott } else if (h->msi_vector) { 7152cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7153cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7154105a3dbcSRobert Elliott h->msi_vector = 0; 7155cc64c817SRobert Elliott } 7156cc64c817SRobert Elliott } 7157cc64c817SRobert Elliott 7158edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7159050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7160edd16368SStephen M. Cameron */ 71616f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7162edd16368SStephen M. Cameron { 7163edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7164254f796bSMatt Gates int err, i; 7165254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7166254f796bSMatt Gates 7167254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7168254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7169254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7170254f796bSMatt Gates } 7171edd16368SStephen M. Cameron 7172edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 71736b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 71746b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7175edd16368SStephen M. Cameron goto default_int_mode; 717655c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7177050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7178eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7179f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7180f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 718118fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 718218fce3c4SAlexander Gordeev 1, h->msix_vector); 718318fce3c4SAlexander Gordeev if (err < 0) { 718418fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 718518fce3c4SAlexander Gordeev h->msix_vector = 0; 718618fce3c4SAlexander Gordeev goto single_msi_mode; 718718fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 718855c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7189edd16368SStephen M. Cameron "available\n", err); 7190eee0f03aSHannes Reinecke } 719118fce3c4SAlexander Gordeev h->msix_vector = err; 7192eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7193eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7194eee0f03aSHannes Reinecke return; 7195edd16368SStephen M. Cameron } 719618fce3c4SAlexander Gordeev single_msi_mode: 719755c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7198050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 719955c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7200edd16368SStephen M. Cameron h->msi_vector = 1; 7201edd16368SStephen M. Cameron else 720255c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7203edd16368SStephen M. Cameron } 7204edd16368SStephen M. Cameron default_int_mode: 7205edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7206edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7207a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7208edd16368SStephen M. Cameron } 7209edd16368SStephen M. Cameron 72106f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7211e5c880d1SStephen M. Cameron { 7212e5c880d1SStephen M. Cameron int i; 7213e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7214e5c880d1SStephen M. Cameron 7215e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7216e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7217e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7218e5c880d1SStephen M. Cameron subsystem_vendor_id; 7219e5c880d1SStephen M. Cameron 7220e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7221e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7222e5c880d1SStephen M. Cameron return i; 7223e5c880d1SStephen M. Cameron 72246798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 72256798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 72266798cc0aSStephen M. Cameron !hpsa_allow_any) { 7227e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7228e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7229e5c880d1SStephen M. Cameron return -ENODEV; 7230e5c880d1SStephen M. Cameron } 7231e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7232e5c880d1SStephen M. Cameron } 7233e5c880d1SStephen M. Cameron 72346f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 72353a7774ceSStephen M. Cameron unsigned long *memory_bar) 72363a7774ceSStephen M. Cameron { 72373a7774ceSStephen M. Cameron int i; 72383a7774ceSStephen M. Cameron 72393a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 724012d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 72413a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 724212d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 724312d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 72443a7774ceSStephen M. Cameron *memory_bar); 72453a7774ceSStephen M. Cameron return 0; 72463a7774ceSStephen M. Cameron } 724712d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 72483a7774ceSStephen M. Cameron return -ENODEV; 72493a7774ceSStephen M. Cameron } 72503a7774ceSStephen M. Cameron 72516f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 72526f039790SGreg Kroah-Hartman int wait_for_ready) 72532c4c8c8bSStephen M. Cameron { 7254fe5389c8SStephen M. Cameron int i, iterations; 72552c4c8c8bSStephen M. Cameron u32 scratchpad; 7256fe5389c8SStephen M. Cameron if (wait_for_ready) 7257fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7258fe5389c8SStephen M. Cameron else 7259fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 72602c4c8c8bSStephen M. Cameron 7261fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7262fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7263fe5389c8SStephen M. Cameron if (wait_for_ready) { 72642c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 72652c4c8c8bSStephen M. Cameron return 0; 7266fe5389c8SStephen M. Cameron } else { 7267fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7268fe5389c8SStephen M. Cameron return 0; 7269fe5389c8SStephen M. Cameron } 72702c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 72712c4c8c8bSStephen M. Cameron } 7272fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 72732c4c8c8bSStephen M. Cameron return -ENODEV; 72742c4c8c8bSStephen M. Cameron } 72752c4c8c8bSStephen M. Cameron 72766f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 72776f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7278a51fd47fSStephen M. Cameron u64 *cfg_offset) 7279a51fd47fSStephen M. Cameron { 7280a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7281a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7282a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7283a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7284a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7285a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7286a51fd47fSStephen M. Cameron return -ENODEV; 7287a51fd47fSStephen M. Cameron } 7288a51fd47fSStephen M. Cameron return 0; 7289a51fd47fSStephen M. Cameron } 7290a51fd47fSStephen M. Cameron 7291195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7292195f2c65SRobert Elliott { 7293105a3dbcSRobert Elliott if (h->transtable) { 7294195f2c65SRobert Elliott iounmap(h->transtable); 7295105a3dbcSRobert Elliott h->transtable = NULL; 7296105a3dbcSRobert Elliott } 7297105a3dbcSRobert Elliott if (h->cfgtable) { 7298195f2c65SRobert Elliott iounmap(h->cfgtable); 7299105a3dbcSRobert Elliott h->cfgtable = NULL; 7300105a3dbcSRobert Elliott } 7301195f2c65SRobert Elliott } 7302195f2c65SRobert Elliott 7303195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7304195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7305195f2c65SRobert Elliott + * */ 73066f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7307edd16368SStephen M. Cameron { 730801a02ffcSStephen M. Cameron u64 cfg_offset; 730901a02ffcSStephen M. Cameron u32 cfg_base_addr; 731001a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7311303932fdSDon Brace u32 trans_offset; 7312a51fd47fSStephen M. Cameron int rc; 731377c4495cSStephen M. Cameron 7314a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7315a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7316a51fd47fSStephen M. Cameron if (rc) 7317a51fd47fSStephen M. Cameron return rc; 731877c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7319a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7320cd3c81c4SRobert Elliott if (!h->cfgtable) { 7321cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 732277c4495cSStephen M. Cameron return -ENOMEM; 7323cd3c81c4SRobert Elliott } 7324580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7325580ada3cSStephen M. Cameron if (rc) 7326580ada3cSStephen M. Cameron return rc; 732777c4495cSStephen M. Cameron /* Find performant mode table. */ 7328a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 732977c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 733077c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 733177c4495cSStephen M. Cameron sizeof(*h->transtable)); 7332195f2c65SRobert Elliott if (!h->transtable) { 7333195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7334195f2c65SRobert Elliott hpsa_free_cfgtables(h); 733577c4495cSStephen M. Cameron return -ENOMEM; 7336195f2c65SRobert Elliott } 733777c4495cSStephen M. Cameron return 0; 733877c4495cSStephen M. Cameron } 733977c4495cSStephen M. Cameron 73406f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7341cba3d38bSStephen M. Cameron { 734241ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 734341ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 734441ce4c35SStephen Cameron 734541ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 734672ceeaecSStephen M. Cameron 734772ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 734872ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 734972ceeaecSStephen M. Cameron h->max_commands = 32; 735072ceeaecSStephen M. Cameron 735141ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 735241ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 735341ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 735441ce4c35SStephen Cameron h->max_commands, 735541ce4c35SStephen Cameron MIN_MAX_COMMANDS); 735641ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7357cba3d38bSStephen M. Cameron } 7358cba3d38bSStephen M. Cameron } 7359cba3d38bSStephen M. Cameron 7360c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7361c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7362c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7363c7ee65b3SWebb Scales */ 7364c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7365c7ee65b3SWebb Scales { 7366c7ee65b3SWebb Scales return h->maxsgentries > 512; 7367c7ee65b3SWebb Scales } 7368c7ee65b3SWebb Scales 7369b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7370b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7371b93d7536SStephen M. Cameron * SG chain block size, etc. 7372b93d7536SStephen M. Cameron */ 73736f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7374b93d7536SStephen M. Cameron { 7375cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 737645fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7377b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7378283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7379c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7380c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7381b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 73821a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7383b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7384b93d7536SStephen M. Cameron } else { 7385c7ee65b3SWebb Scales /* 7386c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7387c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7388c7ee65b3SWebb Scales * would lock up the controller) 7389c7ee65b3SWebb Scales */ 7390c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 73911a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7392c7ee65b3SWebb Scales h->chainsize = 0; 7393b93d7536SStephen M. Cameron } 739475167d2cSStephen M. Cameron 739575167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 739675167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 73970e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 73980e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 73990e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 74000e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 74018be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 74028be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7403b93d7536SStephen M. Cameron } 7404b93d7536SStephen M. Cameron 740576c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 740676c46e49SStephen M. Cameron { 74070fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7408050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 740976c46e49SStephen M. Cameron return false; 741076c46e49SStephen M. Cameron } 741176c46e49SStephen M. Cameron return true; 741276c46e49SStephen M. Cameron } 741376c46e49SStephen M. Cameron 741497a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7415f7c39101SStephen M. Cameron { 741697a5e98cSStephen M. Cameron u32 driver_support; 7417f7c39101SStephen M. Cameron 741897a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 74190b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 74200b9e7b74SArnd Bergmann #ifdef CONFIG_X86 742197a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7422f7c39101SStephen M. Cameron #endif 742328e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 742428e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7425f7c39101SStephen M. Cameron } 7426f7c39101SStephen M. Cameron 74273d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 74283d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 74293d0eab67SStephen M. Cameron */ 74303d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 74313d0eab67SStephen M. Cameron { 74323d0eab67SStephen M. Cameron u32 dma_prefetch; 74333d0eab67SStephen M. Cameron 74343d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 74353d0eab67SStephen M. Cameron return; 74363d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 74373d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 74383d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 74393d0eab67SStephen M. Cameron } 74403d0eab67SStephen M. Cameron 7441c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 744276438d08SStephen M. Cameron { 744376438d08SStephen M. Cameron int i; 744476438d08SStephen M. Cameron u32 doorbell_value; 744576438d08SStephen M. Cameron unsigned long flags; 744676438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7447007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 744876438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 744976438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 745076438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 745176438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7452c706a795SRobert Elliott goto done; 745376438d08SStephen M. Cameron /* delay and try again */ 7454007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 745576438d08SStephen M. Cameron } 7456c706a795SRobert Elliott return -ENODEV; 7457c706a795SRobert Elliott done: 7458c706a795SRobert Elliott return 0; 745976438d08SStephen M. Cameron } 746076438d08SStephen M. Cameron 7461c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7462eb6b2ae9SStephen M. Cameron { 7463eb6b2ae9SStephen M. Cameron int i; 74646eaf46fdSStephen M. Cameron u32 doorbell_value; 74656eaf46fdSStephen M. Cameron unsigned long flags; 7466eb6b2ae9SStephen M. Cameron 7467eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7468eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7469eb6b2ae9SStephen M. Cameron * as we enter this code.) 7470eb6b2ae9SStephen M. Cameron */ 7471007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 747225163bd5SWebb Scales if (h->remove_in_progress) 747325163bd5SWebb Scales goto done; 74746eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 74756eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 74766eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7477382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7478c706a795SRobert Elliott goto done; 7479eb6b2ae9SStephen M. Cameron /* delay and try again */ 7480007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7481eb6b2ae9SStephen M. Cameron } 7482c706a795SRobert Elliott return -ENODEV; 7483c706a795SRobert Elliott done: 7484c706a795SRobert Elliott return 0; 74853f4336f3SStephen M. Cameron } 74863f4336f3SStephen M. Cameron 7487c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 74886f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 74893f4336f3SStephen M. Cameron { 74903f4336f3SStephen M. Cameron u32 trans_support; 74913f4336f3SStephen M. Cameron 74923f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 74933f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 74943f4336f3SStephen M. Cameron return -ENOTSUPP; 74953f4336f3SStephen M. Cameron 74963f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7497283b4a9bSStephen M. Cameron 74983f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 74993f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7500b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 75013f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7502c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7503c706a795SRobert Elliott goto error; 7504eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7505283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7506283b4a9bSStephen M. Cameron goto error; 7507960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7508eb6b2ae9SStephen M. Cameron return 0; 7509283b4a9bSStephen M. Cameron error: 7510050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7511283b4a9bSStephen M. Cameron return -ENODEV; 7512eb6b2ae9SStephen M. Cameron } 7513eb6b2ae9SStephen M. Cameron 7514195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7515195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7516195f2c65SRobert Elliott { 7517195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7518195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7519105a3dbcSRobert Elliott h->vaddr = NULL; 7520195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7521943a7021SRobert Elliott /* 7522943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7523943a7021SRobert Elliott * Documentation/PCI/pci.txt 7524943a7021SRobert Elliott */ 7525195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7526943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7527195f2c65SRobert Elliott } 7528195f2c65SRobert Elliott 7529195f2c65SRobert Elliott /* several items must be freed later */ 75306f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 753177c4495cSStephen M. Cameron { 7532eb6b2ae9SStephen M. Cameron int prod_index, err; 7533edd16368SStephen M. Cameron 7534e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7535e5c880d1SStephen M. Cameron if (prod_index < 0) 753660f923b9SRobert Elliott return prod_index; 7537e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7538e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7539e5c880d1SStephen M. Cameron 75409b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 75419b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 75429b5c48c2SStephen Cameron 7543e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7544e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7545e5a44df8SMatthew Garrett 754655c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7547edd16368SStephen M. Cameron if (err) { 7548195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7549943a7021SRobert Elliott pci_disable_device(h->pdev); 7550edd16368SStephen M. Cameron return err; 7551edd16368SStephen M. Cameron } 7552edd16368SStephen M. Cameron 7553f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7554edd16368SStephen M. Cameron if (err) { 755555c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7556195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7557943a7021SRobert Elliott pci_disable_device(h->pdev); 7558943a7021SRobert Elliott return err; 7559edd16368SStephen M. Cameron } 75604fa604e1SRobert Elliott 75614fa604e1SRobert Elliott pci_set_master(h->pdev); 75624fa604e1SRobert Elliott 75636b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 756412d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 75653a7774ceSStephen M. Cameron if (err) 7566195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7567edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7568204892e9SStephen M. Cameron if (!h->vaddr) { 7569195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7570204892e9SStephen M. Cameron err = -ENOMEM; 7571195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7572204892e9SStephen M. Cameron } 7573fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 75742c4c8c8bSStephen M. Cameron if (err) 7575195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 757677c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 757777c4495cSStephen M. Cameron if (err) 7578195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7579b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7580edd16368SStephen M. Cameron 758176c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7582edd16368SStephen M. Cameron err = -ENODEV; 7583195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7584edd16368SStephen M. Cameron } 758597a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 75863d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7587eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7588eb6b2ae9SStephen M. Cameron if (err) 7589195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7590edd16368SStephen M. Cameron return 0; 7591edd16368SStephen M. Cameron 7592195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7593195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7594195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7595204892e9SStephen M. Cameron iounmap(h->vaddr); 7596105a3dbcSRobert Elliott h->vaddr = NULL; 7597195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7598195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7599943a7021SRobert Elliott /* 7600943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7601943a7021SRobert Elliott * Documentation/PCI/pci.txt 7602943a7021SRobert Elliott */ 7603195f2c65SRobert Elliott pci_disable_device(h->pdev); 7604943a7021SRobert Elliott pci_release_regions(h->pdev); 7605edd16368SStephen M. Cameron return err; 7606edd16368SStephen M. Cameron } 7607edd16368SStephen M. Cameron 76086f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7609339b2b14SStephen M. Cameron { 7610339b2b14SStephen M. Cameron int rc; 7611339b2b14SStephen M. Cameron 7612339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7613339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7614339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7615339b2b14SStephen M. Cameron return; 7616339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7617339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7618339b2b14SStephen M. Cameron if (rc != 0) { 7619339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7620339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7621339b2b14SStephen M. Cameron } 7622339b2b14SStephen M. Cameron } 7623339b2b14SStephen M. Cameron 76246b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7625edd16368SStephen M. Cameron { 76261df8552aSStephen M. Cameron int rc, i; 76273b747298STomas Henzl void __iomem *vaddr; 7628edd16368SStephen M. Cameron 76294c2a8c40SStephen M. Cameron if (!reset_devices) 76304c2a8c40SStephen M. Cameron return 0; 76314c2a8c40SStephen M. Cameron 7632132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7633132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7634132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7635132aa220STomas Henzl */ 7636132aa220STomas Henzl rc = pci_enable_device(pdev); 7637132aa220STomas Henzl if (rc) { 7638132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7639132aa220STomas Henzl return -ENODEV; 7640132aa220STomas Henzl } 7641132aa220STomas Henzl pci_disable_device(pdev); 7642132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7643132aa220STomas Henzl rc = pci_enable_device(pdev); 7644132aa220STomas Henzl if (rc) { 7645132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7646132aa220STomas Henzl return -ENODEV; 7647132aa220STomas Henzl } 76484fa604e1SRobert Elliott 7649859c75abSTomas Henzl pci_set_master(pdev); 76504fa604e1SRobert Elliott 76513b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 76523b747298STomas Henzl if (vaddr == NULL) { 76533b747298STomas Henzl rc = -ENOMEM; 76543b747298STomas Henzl goto out_disable; 76553b747298STomas Henzl } 76563b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 76573b747298STomas Henzl iounmap(vaddr); 76583b747298STomas Henzl 76591df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 76606b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7661edd16368SStephen M. Cameron 76621df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 76631df8552aSStephen M. Cameron * but it's already (and still) up and running in 766418867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 766518867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 76661df8552aSStephen M. Cameron */ 7667adf1b3a3SRobert Elliott if (rc) 7668132aa220STomas Henzl goto out_disable; 7669edd16368SStephen M. Cameron 7670edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 76711ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7672edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7673edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7674edd16368SStephen M. Cameron break; 7675edd16368SStephen M. Cameron else 7676edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7677edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7678edd16368SStephen M. Cameron } 7679132aa220STomas Henzl 7680132aa220STomas Henzl out_disable: 7681132aa220STomas Henzl 7682132aa220STomas Henzl pci_disable_device(pdev); 7683132aa220STomas Henzl return rc; 7684edd16368SStephen M. Cameron } 7685edd16368SStephen M. Cameron 76861fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 76871fb7c98aSRobert Elliott { 76881fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7689105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7690105a3dbcSRobert Elliott if (h->cmd_pool) { 76911fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 76921fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 76931fb7c98aSRobert Elliott h->cmd_pool, 76941fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7695105a3dbcSRobert Elliott h->cmd_pool = NULL; 7696105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7697105a3dbcSRobert Elliott } 7698105a3dbcSRobert Elliott if (h->errinfo_pool) { 76991fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 77001fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 77011fb7c98aSRobert Elliott h->errinfo_pool, 77021fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7703105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7704105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7705105a3dbcSRobert Elliott } 77061fb7c98aSRobert Elliott } 77071fb7c98aSRobert Elliott 7708d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 77092e9d1b36SStephen M. Cameron { 77102e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 77112e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 77122e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 77132e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 77142e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 77152e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 77162e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 77172e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 77182e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 77192e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 77202e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 77212e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 77222e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 77232c143342SRobert Elliott goto clean_up; 77242e9d1b36SStephen M. Cameron } 7725360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 77262e9d1b36SStephen M. Cameron return 0; 77272c143342SRobert Elliott clean_up: 77282c143342SRobert Elliott hpsa_free_cmd_pool(h); 77292c143342SRobert Elliott return -ENOMEM; 77302e9d1b36SStephen M. Cameron } 77312e9d1b36SStephen M. Cameron 773241b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 773341b3cf08SStephen M. Cameron { 7734ec429952SFabian Frederick int i, cpu; 773541b3cf08SStephen M. Cameron 773641b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 773741b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 7738ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 773941b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 774041b3cf08SStephen M. Cameron } 774141b3cf08SStephen M. Cameron } 774241b3cf08SStephen M. Cameron 7743ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7744ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 7745ec501a18SRobert Elliott { 7746ec501a18SRobert Elliott int i; 7747ec501a18SRobert Elliott 7748ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 7749ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 7750ec501a18SRobert Elliott i = h->intr_mode; 7751ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7752ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7753105a3dbcSRobert Elliott h->q[i] = 0; 7754ec501a18SRobert Elliott return; 7755ec501a18SRobert Elliott } 7756ec501a18SRobert Elliott 7757ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 7758ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7759ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7760105a3dbcSRobert Elliott h->q[i] = 0; 7761ec501a18SRobert Elliott } 7762a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 7763a4e17fc1SRobert Elliott h->q[i] = 0; 7764ec501a18SRobert Elliott } 7765ec501a18SRobert Elliott 77669ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 77679ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 77680ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 77690ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 77700ae01a32SStephen M. Cameron { 7771254f796bSMatt Gates int rc, i; 77720ae01a32SStephen M. Cameron 7773254f796bSMatt Gates /* 7774254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 7775254f796bSMatt Gates * queue to process. 7776254f796bSMatt Gates */ 7777254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 7778254f796bSMatt Gates h->q[i] = (u8) i; 7779254f796bSMatt Gates 7780eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 7781254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 7782a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 77838b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7784254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 77858b47004aSRobert Elliott 0, h->intrname[i], 7786254f796bSMatt Gates &h->q[i]); 7787a4e17fc1SRobert Elliott if (rc) { 7788a4e17fc1SRobert Elliott int j; 7789a4e17fc1SRobert Elliott 7790a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 7791a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 7792a4e17fc1SRobert Elliott h->intr[i], h->devname); 7793a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 7794a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 7795a4e17fc1SRobert Elliott h->q[j] = 0; 7796a4e17fc1SRobert Elliott } 7797a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 7798a4e17fc1SRobert Elliott h->q[j] = 0; 7799a4e17fc1SRobert Elliott return rc; 7800a4e17fc1SRobert Elliott } 7801a4e17fc1SRobert Elliott } 780241b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 7803254f796bSMatt Gates } else { 7804254f796bSMatt Gates /* Use single reply pool */ 7805eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 78068b47004aSRobert Elliott if (h->msix_vector) 78078b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 78088b47004aSRobert Elliott "%s-msix", h->devname); 78098b47004aSRobert Elliott else 78108b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 78118b47004aSRobert Elliott "%s-msi", h->devname); 7812254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 78138b47004aSRobert Elliott msixhandler, 0, 78148b47004aSRobert Elliott h->intrname[h->intr_mode], 7815254f796bSMatt Gates &h->q[h->intr_mode]); 7816254f796bSMatt Gates } else { 78178b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 78188b47004aSRobert Elliott "%s-intx", h->devname); 7819254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 78208b47004aSRobert Elliott intxhandler, IRQF_SHARED, 78218b47004aSRobert Elliott h->intrname[h->intr_mode], 7822254f796bSMatt Gates &h->q[h->intr_mode]); 7823254f796bSMatt Gates } 7824105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 7825254f796bSMatt Gates } 78260ae01a32SStephen M. Cameron if (rc) { 7827195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 78280ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 7829195f2c65SRobert Elliott hpsa_free_irqs(h); 78300ae01a32SStephen M. Cameron return -ENODEV; 78310ae01a32SStephen M. Cameron } 78320ae01a32SStephen M. Cameron return 0; 78330ae01a32SStephen M. Cameron } 78340ae01a32SStephen M. Cameron 78356f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 783664670ac8SStephen M. Cameron { 783739c53f55SRobert Elliott int rc; 7838bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 783964670ac8SStephen M. Cameron 784064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 784139c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 784239c53f55SRobert Elliott if (rc) { 784364670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 784439c53f55SRobert Elliott return rc; 784564670ac8SStephen M. Cameron } 784664670ac8SStephen M. Cameron 784764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 784839c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 784939c53f55SRobert Elliott if (rc) { 785064670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 785164670ac8SStephen M. Cameron "after soft reset.\n"); 785239c53f55SRobert Elliott return rc; 785364670ac8SStephen M. Cameron } 785464670ac8SStephen M. Cameron 785564670ac8SStephen M. Cameron return 0; 785664670ac8SStephen M. Cameron } 785764670ac8SStephen M. Cameron 7858072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 7859072b0518SStephen M. Cameron { 7860072b0518SStephen M. Cameron int i; 7861072b0518SStephen M. Cameron 7862072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 7863072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 7864072b0518SStephen M. Cameron continue; 78651fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 78661fb7c98aSRobert Elliott h->reply_queue_size, 78671fb7c98aSRobert Elliott h->reply_queue[i].head, 78681fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 7869072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 7870072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 7871072b0518SStephen M. Cameron } 7872105a3dbcSRobert Elliott h->reply_queue_size = 0; 7873072b0518SStephen M. Cameron } 7874072b0518SStephen M. Cameron 78750097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 78760097f0f4SStephen M. Cameron { 7877105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 7878105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 7879105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 7880105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 78812946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 78822946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 78832946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 78849ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 78859ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 78869ecd953aSRobert Elliott if (h->resubmit_wq) { 78879ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 78889ecd953aSRobert Elliott h->resubmit_wq = NULL; 78899ecd953aSRobert Elliott } 78909ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 78919ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 78929ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 78939ecd953aSRobert Elliott } 7894105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 789564670ac8SStephen M. Cameron } 789664670ac8SStephen M. Cameron 7897a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 7898f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 7899a0c12413SStephen M. Cameron { 7900281a7fd0SWebb Scales int i, refcount; 7901281a7fd0SWebb Scales struct CommandList *c; 790225163bd5SWebb Scales int failcount = 0; 7903a0c12413SStephen M. Cameron 7904080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 7905f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 7906f2405db8SDon Brace c = h->cmd_pool + i; 7907281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 7908281a7fd0SWebb Scales if (refcount > 1) { 790925163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 79105a3d16f5SStephen M. Cameron finish_cmd(c); 7911433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 791225163bd5SWebb Scales failcount++; 7913a0c12413SStephen M. Cameron } 7914281a7fd0SWebb Scales cmd_free(h, c); 7915281a7fd0SWebb Scales } 791625163bd5SWebb Scales dev_warn(&h->pdev->dev, 791725163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 7918a0c12413SStephen M. Cameron } 7919a0c12413SStephen M. Cameron 7920094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 7921094963daSStephen M. Cameron { 7922c8ed0010SRusty Russell int cpu; 7923094963daSStephen M. Cameron 7924c8ed0010SRusty Russell for_each_online_cpu(cpu) { 7925094963daSStephen M. Cameron u32 *lockup_detected; 7926094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 7927094963daSStephen M. Cameron *lockup_detected = value; 7928094963daSStephen M. Cameron } 7929094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 7930094963daSStephen M. Cameron } 7931094963daSStephen M. Cameron 7932a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 7933a0c12413SStephen M. Cameron { 7934a0c12413SStephen M. Cameron unsigned long flags; 7935094963daSStephen M. Cameron u32 lockup_detected; 7936a0c12413SStephen M. Cameron 7937a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 7938a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 7939094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 7940094963daSStephen M. Cameron if (!lockup_detected) { 7941094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 7942094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 794325163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 794425163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 7945094963daSStephen M. Cameron lockup_detected = 0xffffffff; 7946094963daSStephen M. Cameron } 7947094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 7948a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 794925163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 795025163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 7951a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 7952f2405db8SDon Brace fail_all_outstanding_cmds(h); 7953a0c12413SStephen M. Cameron } 7954a0c12413SStephen M. Cameron 795525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 7956a0c12413SStephen M. Cameron { 7957a0c12413SStephen M. Cameron u64 now; 7958a0c12413SStephen M. Cameron u32 heartbeat; 7959a0c12413SStephen M. Cameron unsigned long flags; 7960a0c12413SStephen M. Cameron 7961a0c12413SStephen M. Cameron now = get_jiffies_64(); 7962a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 7963a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 7964e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 796525163bd5SWebb Scales return false; 7966a0c12413SStephen M. Cameron 7967a0c12413SStephen M. Cameron /* 7968a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 7969a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 7970a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 7971a0c12413SStephen M. Cameron */ 7972a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 7973e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 797425163bd5SWebb Scales return false; 7975a0c12413SStephen M. Cameron 7976a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 7977a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 7978a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 7979a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7980a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 7981a0c12413SStephen M. Cameron controller_lockup_detected(h); 798225163bd5SWebb Scales return true; 7983a0c12413SStephen M. Cameron } 7984a0c12413SStephen M. Cameron 7985a0c12413SStephen M. Cameron /* We're ok. */ 7986a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 7987a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 798825163bd5SWebb Scales return false; 7989a0c12413SStephen M. Cameron } 7990a0c12413SStephen M. Cameron 79919846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 799276438d08SStephen M. Cameron { 799376438d08SStephen M. Cameron int i; 799476438d08SStephen M. Cameron char *event_type; 799576438d08SStephen M. Cameron 7996e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 7997e4aa3e6aSStephen Cameron return; 7998e4aa3e6aSStephen Cameron 799976438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 80001f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 80011f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 800276438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 800376438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 800476438d08SStephen M. Cameron 800576438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 800676438d08SStephen M. Cameron event_type = "state change"; 800776438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 800876438d08SStephen M. Cameron event_type = "configuration change"; 800976438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 801076438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 801176438d08SStephen M. Cameron for (i = 0; i < h->ndevices; i++) 801276438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 801323100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 801476438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 801576438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 801676438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 801776438d08SStephen M. Cameron h->events, event_type); 801876438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 801976438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 802076438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 802176438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 802276438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 802376438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 802476438d08SStephen M. Cameron } else { 802576438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 802676438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 802776438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 802876438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 802976438d08SStephen M. Cameron #if 0 803076438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 803176438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 803276438d08SStephen M. Cameron #endif 803376438d08SStephen M. Cameron } 80349846590eSStephen M. Cameron return; 803576438d08SStephen M. Cameron } 803676438d08SStephen M. Cameron 803776438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 803876438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8039e863d68eSScott Teel * we should rescan the controller for devices. 8040e863d68eSScott Teel * Also check flag for driver-initiated rescan. 804176438d08SStephen M. Cameron */ 80429846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 804376438d08SStephen M. Cameron { 8044853633e8SDon Brace if (h->drv_req_rescan) { 8045853633e8SDon Brace h->drv_req_rescan = 0; 8046853633e8SDon Brace return 1; 8047853633e8SDon Brace } 8048853633e8SDon Brace 804976438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 80509846590eSStephen M. Cameron return 0; 805176438d08SStephen M. Cameron 805276438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 80539846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 80549846590eSStephen M. Cameron } 805576438d08SStephen M. Cameron 805676438d08SStephen M. Cameron /* 80579846590eSStephen M. Cameron * Check if any of the offline devices have become ready 805876438d08SStephen M. Cameron */ 80599846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 80609846590eSStephen M. Cameron { 80619846590eSStephen M. Cameron unsigned long flags; 80629846590eSStephen M. Cameron struct offline_device_entry *d; 80639846590eSStephen M. Cameron struct list_head *this, *tmp; 80649846590eSStephen M. Cameron 80659846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 80669846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 80679846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 80689846590eSStephen M. Cameron offline_list); 80699846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8070d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8071d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8072d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8073d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 80749846590eSStephen M. Cameron return 1; 8075d1fea47cSStephen M. Cameron } 80769846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 807776438d08SStephen M. Cameron } 80789846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 80799846590eSStephen M. Cameron return 0; 80809846590eSStephen M. Cameron } 80819846590eSStephen M. Cameron 808234592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 808334592254SScott Teel { 808434592254SScott Teel int rc = 1; /* assume there are changes */ 808534592254SScott Teel struct ReportLUNdata *logdev = NULL; 808634592254SScott Teel 808734592254SScott Teel /* if we can't find out if lun data has changed, 808834592254SScott Teel * assume that it has. 808934592254SScott Teel */ 809034592254SScott Teel 809134592254SScott Teel if (!h->lastlogicals) 809234592254SScott Teel goto out; 809334592254SScott Teel 809434592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 809534592254SScott Teel if (!logdev) { 809634592254SScott Teel dev_warn(&h->pdev->dev, 809734592254SScott Teel "Out of memory, can't track lun changes.\n"); 809834592254SScott Teel goto out; 809934592254SScott Teel } 810034592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 810134592254SScott Teel dev_warn(&h->pdev->dev, 810234592254SScott Teel "report luns failed, can't track lun changes.\n"); 810334592254SScott Teel goto out; 810434592254SScott Teel } 810534592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 810634592254SScott Teel dev_info(&h->pdev->dev, 810734592254SScott Teel "Lun changes detected.\n"); 810834592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 810934592254SScott Teel goto out; 811034592254SScott Teel } else 811134592254SScott Teel rc = 0; /* no changes detected. */ 811234592254SScott Teel out: 811334592254SScott Teel kfree(logdev); 811434592254SScott Teel return rc; 811534592254SScott Teel } 811634592254SScott Teel 81176636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8118a0c12413SStephen M. Cameron { 8119a0c12413SStephen M. Cameron unsigned long flags; 81208a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 81216636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 81226636e7f4SDon Brace 81236636e7f4SDon Brace 81246636e7f4SDon Brace if (h->remove_in_progress) 81258a98db73SStephen M. Cameron return; 81269846590eSStephen M. Cameron 81279846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 81289846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 81299846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 81309846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 81319846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 813234592254SScott Teel } else if (h->discovery_polling) { 8133c2adae44SScott Teel hpsa_disable_rld_caching(h); 813434592254SScott Teel if (hpsa_luns_changed(h)) { 813534592254SScott Teel struct Scsi_Host *sh = NULL; 813634592254SScott Teel 813734592254SScott Teel dev_info(&h->pdev->dev, 813834592254SScott Teel "driver discovery polling rescan.\n"); 813934592254SScott Teel sh = scsi_host_get(h->scsi_host); 814034592254SScott Teel if (sh != NULL) { 814134592254SScott Teel hpsa_scan_start(sh); 814234592254SScott Teel scsi_host_put(sh); 814334592254SScott Teel } 814434592254SScott Teel } 81459846590eSStephen M. Cameron } 81466636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 81476636e7f4SDon Brace if (!h->remove_in_progress) 81486636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 81496636e7f4SDon Brace h->heartbeat_sample_interval); 81506636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 81516636e7f4SDon Brace } 81526636e7f4SDon Brace 81536636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 81546636e7f4SDon Brace { 81556636e7f4SDon Brace unsigned long flags; 81566636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 81576636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 81586636e7f4SDon Brace 81596636e7f4SDon Brace detect_controller_lockup(h); 81606636e7f4SDon Brace if (lockup_detected(h)) 81616636e7f4SDon Brace return; 81629846590eSStephen M. Cameron 81638a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 81646636e7f4SDon Brace if (!h->remove_in_progress) 81658a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 81668a98db73SStephen M. Cameron h->heartbeat_sample_interval); 81678a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8168a0c12413SStephen M. Cameron } 8169a0c12413SStephen M. Cameron 81706636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 81716636e7f4SDon Brace char *name) 81726636e7f4SDon Brace { 81736636e7f4SDon Brace struct workqueue_struct *wq = NULL; 81746636e7f4SDon Brace 8175397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 81766636e7f4SDon Brace if (!wq) 81776636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 81786636e7f4SDon Brace 81796636e7f4SDon Brace return wq; 81806636e7f4SDon Brace } 81816636e7f4SDon Brace 81826f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 81834c2a8c40SStephen M. Cameron { 81844c2a8c40SStephen M. Cameron int dac, rc; 81854c2a8c40SStephen M. Cameron struct ctlr_info *h; 818664670ac8SStephen M. Cameron int try_soft_reset = 0; 818764670ac8SStephen M. Cameron unsigned long flags; 81886b6c1cd7STomas Henzl u32 board_id; 81894c2a8c40SStephen M. Cameron 81904c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 81914c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 81924c2a8c40SStephen M. Cameron 81936b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 81946b6c1cd7STomas Henzl if (rc < 0) { 81956b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 81966b6c1cd7STomas Henzl return rc; 81976b6c1cd7STomas Henzl } 81986b6c1cd7STomas Henzl 81996b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 820064670ac8SStephen M. Cameron if (rc) { 820164670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 82024c2a8c40SStephen M. Cameron return rc; 820364670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 820464670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 820564670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 820664670ac8SStephen M. Cameron * point that it can accept a command. 820764670ac8SStephen M. Cameron */ 820864670ac8SStephen M. Cameron try_soft_reset = 1; 820964670ac8SStephen M. Cameron rc = 0; 821064670ac8SStephen M. Cameron } 821164670ac8SStephen M. Cameron 821264670ac8SStephen M. Cameron reinit_after_soft_reset: 82134c2a8c40SStephen M. Cameron 8214303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8215303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8216303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8217303932fdSDon Brace */ 8218303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8219edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8220105a3dbcSRobert Elliott if (!h) { 8221105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8222ecd9aad4SStephen M. Cameron return -ENOMEM; 8223105a3dbcSRobert Elliott } 8224edd16368SStephen M. Cameron 822555c06c71SStephen M. Cameron h->pdev = pdev; 8226105a3dbcSRobert Elliott 8227a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 82289846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 82296eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 82309846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 82316eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 823234f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 82339b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8234094963daSStephen M. Cameron 8235094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8236094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 82372a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8238105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 82392a5ac326SStephen M. Cameron rc = -ENOMEM; 82402efa5929SRobert Elliott goto clean1; /* aer/h */ 82412a5ac326SStephen M. Cameron } 8242094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8243094963daSStephen M. Cameron 824455c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8245105a3dbcSRobert Elliott if (rc) 82462946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8247edd16368SStephen M. Cameron 82482946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 82492946e82bSRobert Elliott * interrupt_mode h->intr */ 82502946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 82512946e82bSRobert Elliott if (rc) 82522946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 82532946e82bSRobert Elliott 82542946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8255edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8256edd16368SStephen M. Cameron number_of_controllers++; 8257edd16368SStephen M. Cameron 8258edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8259ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8260ecd9aad4SStephen M. Cameron if (rc == 0) { 8261edd16368SStephen M. Cameron dac = 1; 8262ecd9aad4SStephen M. Cameron } else { 8263ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8264ecd9aad4SStephen M. Cameron if (rc == 0) { 8265edd16368SStephen M. Cameron dac = 0; 8266ecd9aad4SStephen M. Cameron } else { 8267edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 82682946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8269edd16368SStephen M. Cameron } 8270ecd9aad4SStephen M. Cameron } 8271edd16368SStephen M. Cameron 8272edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8273edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 827410f66018SStephen M. Cameron 8275105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8276105a3dbcSRobert Elliott if (rc) 82772946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8278d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 82798947fd10SRobert Elliott if (rc) 82802946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8281105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8282105a3dbcSRobert Elliott if (rc) 82832946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8284a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 82859b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8286d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8287d604f533SWebb Scales mutex_init(&h->reset_mutex); 8288a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8289edd16368SStephen M. Cameron 8290edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 82919a41338eSStephen M. Cameron h->ndevices = 0; 82922946e82bSRobert Elliott 82939a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8294105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8295105a3dbcSRobert Elliott if (rc) 82962946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 82972946e82bSRobert Elliott 82982946e82bSRobert Elliott /* hook into SCSI subsystem */ 82992946e82bSRobert Elliott rc = hpsa_scsi_add_host(h); 83002946e82bSRobert Elliott if (rc) 83012946e82bSRobert Elliott goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 83022efa5929SRobert Elliott 83032efa5929SRobert Elliott /* create the resubmit workqueue */ 83042efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 83052efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 83062efa5929SRobert Elliott rc = -ENOMEM; 83072efa5929SRobert Elliott goto clean7; 83082efa5929SRobert Elliott } 83092efa5929SRobert Elliott 83102efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 83112efa5929SRobert Elliott if (!h->resubmit_wq) { 83122efa5929SRobert Elliott rc = -ENOMEM; 83132efa5929SRobert Elliott goto clean7; /* aer/h */ 83142efa5929SRobert Elliott } 831564670ac8SStephen M. Cameron 8316105a3dbcSRobert Elliott /* 8317105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 831864670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 831964670ac8SStephen M. Cameron * the soft reset and see if that works. 832064670ac8SStephen M. Cameron */ 832164670ac8SStephen M. Cameron if (try_soft_reset) { 832264670ac8SStephen M. Cameron 832364670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 832464670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 832564670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 832664670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 832764670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 832864670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 832964670ac8SStephen M. Cameron */ 833064670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 833164670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 833264670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8333ec501a18SRobert Elliott hpsa_free_irqs(h); 83349ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 833564670ac8SStephen M. Cameron hpsa_intx_discard_completions); 833664670ac8SStephen M. Cameron if (rc) { 83379ee61794SRobert Elliott dev_warn(&h->pdev->dev, 83389ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8339d498757cSRobert Elliott /* 8340b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8341b2ef480cSRobert Elliott * again. Instead, do its work 8342b2ef480cSRobert Elliott */ 8343b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8344b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8345b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8346b2ef480cSRobert Elliott /* 8347b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8348b2ef480cSRobert Elliott * was just called before request_irqs failed 8349d498757cSRobert Elliott */ 8350d498757cSRobert Elliott goto clean3; 835164670ac8SStephen M. Cameron } 835264670ac8SStephen M. Cameron 835364670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 835464670ac8SStephen M. Cameron if (rc) 835564670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 83567ef7323fSDon Brace goto clean7; 835764670ac8SStephen M. Cameron 835864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 835964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 836064670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 836164670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 836264670ac8SStephen M. Cameron msleep(10000); 836364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 836464670ac8SStephen M. Cameron 836564670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 836664670ac8SStephen M. Cameron if (rc) 836764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 836864670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 836964670ac8SStephen M. Cameron 837064670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 837164670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 837264670ac8SStephen M. Cameron * all over again. 837364670ac8SStephen M. Cameron */ 837464670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 837564670ac8SStephen M. Cameron try_soft_reset = 0; 837664670ac8SStephen M. Cameron if (rc) 8377b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 837864670ac8SStephen M. Cameron return -ENODEV; 837964670ac8SStephen M. Cameron 838064670ac8SStephen M. Cameron goto reinit_after_soft_reset; 838164670ac8SStephen M. Cameron } 8382edd16368SStephen M. Cameron 8383da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8384da0697bdSScott Teel h->acciopath_status = 1; 838534592254SScott Teel /* Disable discovery polling.*/ 838634592254SScott Teel h->discovery_polling = 0; 8387da0697bdSScott Teel 8388e863d68eSScott Teel 8389edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8390edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8391edd16368SStephen M. Cameron 8392339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 83938a98db73SStephen M. Cameron 839434592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 839534592254SScott Teel if (!h->lastlogicals) 839634592254SScott Teel dev_info(&h->pdev->dev, 839734592254SScott Teel "Can't track change to report lun data\n"); 839834592254SScott Teel 83998a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 84008a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 84018a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 84028a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 84038a98db73SStephen M. Cameron h->heartbeat_sample_interval); 84046636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 84056636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 84066636e7f4SDon Brace h->heartbeat_sample_interval); 840788bf6d62SStephen M. Cameron return 0; 8408edd16368SStephen M. Cameron 84092946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8410105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8411105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8412105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 841333a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 84142946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 84152e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 84162946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8417ec501a18SRobert Elliott hpsa_free_irqs(h); 84182946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 84192946e82bSRobert Elliott scsi_host_put(h->scsi_host); 84202946e82bSRobert Elliott h->scsi_host = NULL; 84212946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8422195f2c65SRobert Elliott hpsa_free_pci_init(h); 84232946e82bSRobert Elliott clean2: /* lu, aer/h */ 8424105a3dbcSRobert Elliott if (h->lockup_detected) { 8425094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8426105a3dbcSRobert Elliott h->lockup_detected = NULL; 8427105a3dbcSRobert Elliott } 8428105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8429105a3dbcSRobert Elliott if (h->resubmit_wq) { 8430105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8431105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8432105a3dbcSRobert Elliott } 8433105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8434105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8435105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8436105a3dbcSRobert Elliott } 8437edd16368SStephen M. Cameron kfree(h); 8438ecd9aad4SStephen M. Cameron return rc; 8439edd16368SStephen M. Cameron } 8440edd16368SStephen M. Cameron 8441edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8442edd16368SStephen M. Cameron { 8443edd16368SStephen M. Cameron char *flush_buf; 8444edd16368SStephen M. Cameron struct CommandList *c; 844525163bd5SWebb Scales int rc; 8446702890e3SStephen M. Cameron 8447094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8448702890e3SStephen M. Cameron return; 8449edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8450edd16368SStephen M. Cameron if (!flush_buf) 8451edd16368SStephen M. Cameron return; 8452edd16368SStephen M. Cameron 845345fcb86eSStephen Cameron c = cmd_alloc(h); 8454bf43caf3SRobert Elliott 8455a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8456a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8457a2dac136SStephen M. Cameron goto out; 8458a2dac136SStephen M. Cameron } 845925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 846025163bd5SWebb Scales PCI_DMA_TODEVICE, NO_TIMEOUT); 846125163bd5SWebb Scales if (rc) 846225163bd5SWebb Scales goto out; 8463edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8464a2dac136SStephen M. Cameron out: 8465edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8466edd16368SStephen M. Cameron "error flushing cache on controller\n"); 846745fcb86eSStephen Cameron cmd_free(h, c); 8468edd16368SStephen M. Cameron kfree(flush_buf); 8469edd16368SStephen M. Cameron } 8470edd16368SStephen M. Cameron 8471c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8472c2adae44SScott Teel * send down a report luns request 8473c2adae44SScott Teel */ 8474c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8475c2adae44SScott Teel { 8476c2adae44SScott Teel u32 *options; 8477c2adae44SScott Teel struct CommandList *c; 8478c2adae44SScott Teel int rc; 8479c2adae44SScott Teel 8480c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8481c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8482c2adae44SScott Teel return; 8483c2adae44SScott Teel 8484c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8485c2adae44SScott Teel if (!options) { 8486c2adae44SScott Teel dev_err(&h->pdev->dev, 8487c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8488c2adae44SScott Teel return; 8489c2adae44SScott Teel } 8490c2adae44SScott Teel 8491c2adae44SScott Teel c = cmd_alloc(h); 8492c2adae44SScott Teel 8493c2adae44SScott Teel /* first, get the current diag options settings */ 8494c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8495c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8496c2adae44SScott Teel goto errout; 8497c2adae44SScott Teel 8498c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8499c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8500c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8501c2adae44SScott Teel goto errout; 8502c2adae44SScott Teel 8503c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8504c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8505c2adae44SScott Teel 8506c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8507c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8508c2adae44SScott Teel goto errout; 8509c2adae44SScott Teel 8510c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8511c2adae44SScott Teel PCI_DMA_TODEVICE, NO_TIMEOUT); 8512c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8513c2adae44SScott Teel goto errout; 8514c2adae44SScott Teel 8515c2adae44SScott Teel /* Now verify that it got set: */ 8516c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8517c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8518c2adae44SScott Teel goto errout; 8519c2adae44SScott Teel 8520c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8521c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8522c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8523c2adae44SScott Teel goto errout; 8524c2adae44SScott Teel 8525c2adae44SScott Teel if (*options && HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8526c2adae44SScott Teel goto out; 8527c2adae44SScott Teel 8528c2adae44SScott Teel errout: 8529c2adae44SScott Teel dev_err(&h->pdev->dev, 8530c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8531c2adae44SScott Teel out: 8532c2adae44SScott Teel cmd_free(h, c); 8533c2adae44SScott Teel kfree(options); 8534c2adae44SScott Teel } 8535c2adae44SScott Teel 8536edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8537edd16368SStephen M. Cameron { 8538edd16368SStephen M. Cameron struct ctlr_info *h; 8539edd16368SStephen M. Cameron 8540edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8541edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8542edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8543edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8544edd16368SStephen M. Cameron */ 8545edd16368SStephen M. Cameron hpsa_flush_cache(h); 8546edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8547105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8548cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8549edd16368SStephen M. Cameron } 8550edd16368SStephen M. Cameron 85516f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 855255e14e76SStephen M. Cameron { 855355e14e76SStephen M. Cameron int i; 855455e14e76SStephen M. Cameron 8555105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 855655e14e76SStephen M. Cameron kfree(h->dev[i]); 8557105a3dbcSRobert Elliott h->dev[i] = NULL; 8558105a3dbcSRobert Elliott } 855955e14e76SStephen M. Cameron } 856055e14e76SStephen M. Cameron 85616f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8562edd16368SStephen M. Cameron { 8563edd16368SStephen M. Cameron struct ctlr_info *h; 85648a98db73SStephen M. Cameron unsigned long flags; 8565edd16368SStephen M. Cameron 8566edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8567edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8568edd16368SStephen M. Cameron return; 8569edd16368SStephen M. Cameron } 8570edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 85718a98db73SStephen M. Cameron 85728a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 85738a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 85748a98db73SStephen M. Cameron h->remove_in_progress = 1; 85758a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 85766636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 85776636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 85786636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 85796636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8580cc64c817SRobert Elliott 85812d041306SDon Brace /* 85822d041306SDon Brace * Call before disabling interrupts. 85832d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 85842d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 85852d041306SDon Brace * operations which cannot complete and will hang the system. 85862d041306SDon Brace */ 85872d041306SDon Brace if (h->scsi_host) 85882d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8589105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8590195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8591edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8592cc64c817SRobert Elliott 8593105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8594105a3dbcSRobert Elliott 85952946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 85962946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 85972946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8598105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8599105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 86001fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 860134592254SScott Teel kfree(h->lastlogicals); 8602105a3dbcSRobert Elliott 8603105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8604195f2c65SRobert Elliott 86052946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 86062946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 86072946e82bSRobert Elliott 8608195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 86092946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8610195f2c65SRobert Elliott 8611105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8612105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8613105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8614105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8615edd16368SStephen M. Cameron } 8616edd16368SStephen M. Cameron 8617edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8618edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8619edd16368SStephen M. Cameron { 8620edd16368SStephen M. Cameron return -ENOSYS; 8621edd16368SStephen M. Cameron } 8622edd16368SStephen M. Cameron 8623edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8624edd16368SStephen M. Cameron { 8625edd16368SStephen M. Cameron return -ENOSYS; 8626edd16368SStephen M. Cameron } 8627edd16368SStephen M. Cameron 8628edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8629f79cfec6SStephen M. Cameron .name = HPSA, 8630edd16368SStephen M. Cameron .probe = hpsa_init_one, 86316f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8632edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8633edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8634edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8635edd16368SStephen M. Cameron .resume = hpsa_resume, 8636edd16368SStephen M. Cameron }; 8637edd16368SStephen M. Cameron 8638303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8639303932fdSDon Brace * scatter gather elements supported) and bucket[], 8640303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8641303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8642303932fdSDon Brace * byte increments) which the controller uses to fetch 8643303932fdSDon Brace * commands. This function fills in bucket_map[], which 8644303932fdSDon Brace * maps a given number of scatter gather elements to one of 8645303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8646303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8647303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8648303932fdSDon Brace * bits of the command address. 8649303932fdSDon Brace */ 8650303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 86512b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8652303932fdSDon Brace { 8653303932fdSDon Brace int i, j, b, size; 8654303932fdSDon Brace 8655303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8656303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8657303932fdSDon Brace /* Compute size of a command with i SG entries */ 8658e1f7de0cSMatt Gates size = i + min_blocks; 8659303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8660303932fdSDon Brace /* Find the bucket that is just big enough */ 8661e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8662303932fdSDon Brace if (bucket[j] >= size) { 8663303932fdSDon Brace b = j; 8664303932fdSDon Brace break; 8665303932fdSDon Brace } 8666303932fdSDon Brace } 8667303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8668303932fdSDon Brace bucket_map[i] = b; 8669303932fdSDon Brace } 8670303932fdSDon Brace } 8671303932fdSDon Brace 8672105a3dbcSRobert Elliott /* 8673105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8674105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8675105a3dbcSRobert Elliott */ 8676c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8677303932fdSDon Brace { 86786c311b57SStephen M. Cameron int i; 86796c311b57SStephen M. Cameron unsigned long register_value; 8680e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8681e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8682e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8683b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8684b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 8685e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 8686def342bdSStephen M. Cameron 8687def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 8688def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 8689def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 8690def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 8691def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 8692def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 8693def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 8694def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 8695def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 8696def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 8697d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8698def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 8699def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 8700def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 8701def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 8702def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 8703def342bdSStephen M. Cameron */ 8704d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8705b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 8706b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 8707b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8708b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 8709b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8710b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8711b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8712b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8713b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 8714b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8715d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8716303932fdSDon Brace /* 5 = 1 s/g entry or 4k 8717303932fdSDon Brace * 6 = 2 s/g entry or 8k 8718303932fdSDon Brace * 8 = 4 s/g entry or 16k 8719303932fdSDon Brace * 10 = 6 s/g entry or 24k 8720303932fdSDon Brace */ 8721303932fdSDon Brace 8722b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 8723b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 8724b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 8725b3a52e79SStephen M. Cameron */ 8726b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 8727b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 8728b3a52e79SStephen M. Cameron 8729303932fdSDon Brace /* Controller spec: zero out this buffer. */ 8730072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8731072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 8732303932fdSDon Brace 8733d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 8734d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 8735e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 8736303932fdSDon Brace for (i = 0; i < 8; i++) 8737303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 8738303932fdSDon Brace 8739303932fdSDon Brace /* size of controller ring buffer */ 8740303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 8741254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 8742303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 8743303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 8744254f796bSMatt Gates 8745254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8746254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 8747072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 8748254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 8749254f796bSMatt Gates } 8750254f796bSMatt Gates 8751b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8752e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 8753e1f7de0cSMatt Gates /* 8754e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 8755e1f7de0cSMatt Gates */ 8756e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 8757e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 8758e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8759e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8760c349775eSScott Teel } else { 8761c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 8762c349775eSScott Teel access = SA5_ioaccel_mode2_access; 8763c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8764c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8765c349775eSScott Teel } 8766e1f7de0cSMatt Gates } 8767303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8768c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 8769c706a795SRobert Elliott dev_err(&h->pdev->dev, 8770c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 8771c706a795SRobert Elliott return -ENODEV; 8772c706a795SRobert Elliott } 8773303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 8774303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 8775050f7147SStephen Cameron dev_err(&h->pdev->dev, 8776050f7147SStephen Cameron "performant mode problem - transport not active\n"); 8777c706a795SRobert Elliott return -ENODEV; 8778303932fdSDon Brace } 8779960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 8780e1f7de0cSMatt Gates h->access = access; 8781e1f7de0cSMatt Gates h->transMethod = transMethod; 8782e1f7de0cSMatt Gates 8783b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 8784b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 8785c706a795SRobert Elliott return 0; 8786e1f7de0cSMatt Gates 8787b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 8788e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 8789e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8790e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 8791e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 8792e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 8793e1f7de0cSMatt Gates } 8794283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 8795283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 8796e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 8797e1f7de0cSMatt Gates 8798e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 8799072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8800072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 8801072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 8802072b0518SStephen M. Cameron h->reply_queue_size); 8803e1f7de0cSMatt Gates 8804e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 8805e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 8806e1f7de0cSMatt Gates */ 8807e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 8808e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 8809e1f7de0cSMatt Gates 8810e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 8811e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 8812e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 8813e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 8814e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 88152b08b3e9SDon Brace cp->host_context_flags = 88162b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 8817e1f7de0cSMatt Gates cp->timeout_sec = 0; 8818e1f7de0cSMatt Gates cp->ReplyQueue = 0; 881950a0decfSStephen M. Cameron cp->tag = 8820f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 882150a0decfSStephen M. Cameron cp->host_addr = 882250a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 8823e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 8824e1f7de0cSMatt Gates } 8825b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 8826b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 8827b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 8828b9af4937SStephen M. Cameron int rc; 8829b9af4937SStephen M. Cameron 8830b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 8831b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 8832b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 8833b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 8834b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 8835b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 8836b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 8837b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 8838b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 8839b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 8840b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 8841b9af4937SStephen M. Cameron cfg_base_addr_index) + 8842b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 8843b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 8844b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 8845b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 8846b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 8847b9af4937SStephen M. Cameron } 8848b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8849c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 8850c706a795SRobert Elliott dev_err(&h->pdev->dev, 8851c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 8852c706a795SRobert Elliott return -ENODEV; 8853c706a795SRobert Elliott } 8854c706a795SRobert Elliott return 0; 8855e1f7de0cSMatt Gates } 8856e1f7de0cSMatt Gates 88571fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 88581fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 88591fb7c98aSRobert Elliott { 8860105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 88611fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 88621fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 88631fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 88641fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 8865105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 8866105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 8867105a3dbcSRobert Elliott } 88681fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 8869105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 88701fb7c98aSRobert Elliott } 88711fb7c98aSRobert Elliott 8872d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 8873d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 8874e1f7de0cSMatt Gates { 8875283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 8876283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 8877283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 8878283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 8879283b4a9bSStephen M. Cameron 8880e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 8881e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 8882e1f7de0cSMatt Gates * hardware. 8883e1f7de0cSMatt Gates */ 8884e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 8885e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 8886e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 8887e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 8888e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 8889e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 8890e1f7de0cSMatt Gates 8891e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 8892283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 8893e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 8894e1f7de0cSMatt Gates 8895e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 8896e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 8897e1f7de0cSMatt Gates goto clean_up; 8898e1f7de0cSMatt Gates 8899e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 8900e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 8901e1f7de0cSMatt Gates return 0; 8902e1f7de0cSMatt Gates 8903e1f7de0cSMatt Gates clean_up: 89041fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 89052dd02d74SRobert Elliott return -ENOMEM; 89066c311b57SStephen M. Cameron } 89076c311b57SStephen M. Cameron 89081fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 89091fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 89101fb7c98aSRobert Elliott { 8911d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 8912d9a729f3SWebb Scales 8913105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 89141fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 89151fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 89161fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 89171fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 8918105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 8919105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 8920105a3dbcSRobert Elliott } 89211fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 8922105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 89231fb7c98aSRobert Elliott } 89241fb7c98aSRobert Elliott 8925d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 8926d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 8927aca9012aSStephen M. Cameron { 8928d9a729f3SWebb Scales int rc; 8929d9a729f3SWebb Scales 8930aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 8931aca9012aSStephen M. Cameron 8932aca9012aSStephen M. Cameron h->ioaccel_maxsg = 8933aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 8934aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 8935aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 8936aca9012aSStephen M. Cameron 8937aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 8938aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 8939aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 8940aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 8941aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 8942aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 8943aca9012aSStephen M. Cameron 8944aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 8945aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 8946aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 8947aca9012aSStephen M. Cameron 8948aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 8949d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 8950d9a729f3SWebb Scales rc = -ENOMEM; 8951d9a729f3SWebb Scales goto clean_up; 8952d9a729f3SWebb Scales } 8953d9a729f3SWebb Scales 8954d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 8955d9a729f3SWebb Scales if (rc) 8956aca9012aSStephen M. Cameron goto clean_up; 8957aca9012aSStephen M. Cameron 8958aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 8959aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 8960aca9012aSStephen M. Cameron return 0; 8961aca9012aSStephen M. Cameron 8962aca9012aSStephen M. Cameron clean_up: 89631fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 8964d9a729f3SWebb Scales return rc; 8965aca9012aSStephen M. Cameron } 8966aca9012aSStephen M. Cameron 8967105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 8968105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 8969105a3dbcSRobert Elliott { 8970105a3dbcSRobert Elliott kfree(h->blockFetchTable); 8971105a3dbcSRobert Elliott h->blockFetchTable = NULL; 8972105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 8973105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 8974105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 8975105a3dbcSRobert Elliott } 8976105a3dbcSRobert Elliott 8977105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 8978105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8979105a3dbcSRobert Elliott */ 8980105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 89816c311b57SStephen M. Cameron { 89826c311b57SStephen M. Cameron u32 trans_support; 8983e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8984e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 8985105a3dbcSRobert Elliott int i, rc; 89866c311b57SStephen M. Cameron 898702ec19c8SStephen M. Cameron if (hpsa_simple_mode) 8988105a3dbcSRobert Elliott return 0; 898902ec19c8SStephen M. Cameron 899067c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 899167c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 8992105a3dbcSRobert Elliott return 0; 899367c99a72Sscameron@beardog.cce.hp.com 8994e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 8995e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 8996e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 8997e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 8998105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 8999105a3dbcSRobert Elliott if (rc) 9000105a3dbcSRobert Elliott return rc; 9001105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9002aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9003aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9004105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9005105a3dbcSRobert Elliott if (rc) 9006105a3dbcSRobert Elliott return rc; 9007e1f7de0cSMatt Gates } 9008e1f7de0cSMatt Gates 9009eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9010cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 90116c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9012072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 90136c311b57SStephen M. Cameron 9014254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9015072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9016072b0518SStephen M. Cameron h->reply_queue_size, 9017072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9018105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9019105a3dbcSRobert Elliott rc = -ENOMEM; 9020105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9021105a3dbcSRobert Elliott } 9022254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9023254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9024254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9025254f796bSMatt Gates } 9026254f796bSMatt Gates 90276c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9028d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 90296c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9030105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9031105a3dbcSRobert Elliott rc = -ENOMEM; 9032105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9033105a3dbcSRobert Elliott } 90346c311b57SStephen M. Cameron 9035105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9036105a3dbcSRobert Elliott if (rc) 9037105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9038105a3dbcSRobert Elliott return 0; 9039303932fdSDon Brace 9040105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9041303932fdSDon Brace kfree(h->blockFetchTable); 9042105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9043105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9044105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9045105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9046105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9047105a3dbcSRobert Elliott return rc; 9048303932fdSDon Brace } 9049303932fdSDon Brace 905023100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 905176438d08SStephen M. Cameron { 905223100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 905323100dd9SStephen M. Cameron } 905423100dd9SStephen M. Cameron 905523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 905623100dd9SStephen M. Cameron { 905723100dd9SStephen M. Cameron struct CommandList *c = NULL; 9058f2405db8SDon Brace int i, accel_cmds_out; 9059281a7fd0SWebb Scales int refcount; 906076438d08SStephen M. Cameron 9061f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 906223100dd9SStephen M. Cameron accel_cmds_out = 0; 9063f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9064f2405db8SDon Brace c = h->cmd_pool + i; 9065281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9066281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 906723100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9068281a7fd0SWebb Scales cmd_free(h, c); 9069f2405db8SDon Brace } 907023100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 907176438d08SStephen M. Cameron break; 907276438d08SStephen M. Cameron msleep(100); 907376438d08SStephen M. Cameron } while (1); 907476438d08SStephen M. Cameron } 907576438d08SStephen M. Cameron 9076edd16368SStephen M. Cameron /* 9077edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9078edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9079edd16368SStephen M. Cameron */ 9080edd16368SStephen M. Cameron static int __init hpsa_init(void) 9081edd16368SStephen M. Cameron { 908231468401SMike Miller return pci_register_driver(&hpsa_pci_driver); 9083edd16368SStephen M. Cameron } 9084edd16368SStephen M. Cameron 9085edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9086edd16368SStephen M. Cameron { 9087edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9088edd16368SStephen M. Cameron } 9089edd16368SStephen M. Cameron 9090e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9091e1f7de0cSMatt Gates { 9092e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9093dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9094dd0e19f3SScott Teel 9095dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9096dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9097dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9098dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9099dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9100dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9101dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9102dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9103dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9104dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9105dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9106dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9107dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9108dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9109dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9110dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9111dd0e19f3SScott Teel 9112dd0e19f3SScott Teel #undef VERIFY_OFFSET 9113dd0e19f3SScott Teel 9114dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9115b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9116b66cc250SMike Miller 9117b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9118b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9119b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9120b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9121b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9122b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9123b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9124b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9125b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9126b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9127b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9128b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9129b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9130b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9131b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9132b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9133b66cc250SMike Miller 9134b66cc250SMike Miller #undef VERIFY_OFFSET 9135b66cc250SMike Miller 9136b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9137e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9138e1f7de0cSMatt Gates 9139e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9140e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9141e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9142e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9143e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9144e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9145e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9146e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9147e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9148e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9149e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9150e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9151e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9152e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9153e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9154e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9155e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9156e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9157e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9158e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9159e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9160e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 916150a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9162e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9163e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9164e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9165e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9166e1f7de0cSMatt Gates } 9167e1f7de0cSMatt Gates 9168edd16368SStephen M. Cameron module_init(hpsa_init); 9169edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9170