1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 280bfd7546cSDon Brace unsigned char lunaddr[], 281bfd7546cSDon Brace int reply_queue); 2826f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2836f039790SGreg Kroah-Hartman int wait_for_ready); 28475167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 285c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 287fe5389c8SStephen M. Cameron #define BOARD_READY 1 28823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28976438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 290c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 29203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29425163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 296c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 297d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 2998383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3008383278dSScott Teel unsigned char scsi3addr[], u8 page); 30134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 302ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 304ba74fdc4SDon Brace unsigned char *scsi3addr); 305edd16368SStephen M. Cameron 306edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307edd16368SStephen M. Cameron { 308edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 309edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 310edd16368SStephen M. Cameron } 311edd16368SStephen M. Cameron 312a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313a23513e8SStephen M. Cameron { 314a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 315a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 316a23513e8SStephen M. Cameron } 317a23513e8SStephen M. Cameron 318a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319a58e7e53SWebb Scales { 320a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 321a58e7e53SWebb Scales } 322a58e7e53SWebb Scales 323d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 324d604f533SWebb Scales { 325d604f533SWebb Scales return c->abort_pending || c->reset_pending; 326d604f533SWebb Scales } 327d604f533SWebb Scales 3289437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3299437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3309437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3319437ac43SStephen Cameron { 3329437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3339437ac43SStephen Cameron bool rc; 3349437ac43SStephen Cameron 3359437ac43SStephen Cameron *sense_key = -1; 3369437ac43SStephen Cameron *asc = -1; 3379437ac43SStephen Cameron *ascq = -1; 3389437ac43SStephen Cameron 3399437ac43SStephen Cameron if (sense_data_len < 1) 3409437ac43SStephen Cameron return; 3419437ac43SStephen Cameron 3429437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3439437ac43SStephen Cameron if (rc) { 3449437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3459437ac43SStephen Cameron *asc = sshdr.asc; 3469437ac43SStephen Cameron *ascq = sshdr.ascq; 3479437ac43SStephen Cameron } 3489437ac43SStephen Cameron } 3499437ac43SStephen Cameron 350edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 351edd16368SStephen M. Cameron struct CommandList *c) 352edd16368SStephen M. Cameron { 3539437ac43SStephen Cameron u8 sense_key, asc, ascq; 3549437ac43SStephen Cameron int sense_len; 3559437ac43SStephen Cameron 3569437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3579437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3589437ac43SStephen Cameron else 3599437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3609437ac43SStephen Cameron 3619437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3629437ac43SStephen Cameron &sense_key, &asc, &ascq); 36381c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 364edd16368SStephen M. Cameron return 0; 365edd16368SStephen M. Cameron 3669437ac43SStephen Cameron switch (asc) { 367edd16368SStephen M. Cameron case STATE_CHANGED: 3689437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3702946e82bSRobert Elliott h->devname); 371edd16368SStephen M. Cameron break; 372edd16368SStephen M. Cameron case LUN_FAILED: 3737f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3742946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3777f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 379edd16368SStephen M. Cameron /* 3804f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3814f4eb9f1SScott Teel * target (array) devices. 382edd16368SStephen M. Cameron */ 383edd16368SStephen M. Cameron break; 384edd16368SStephen M. Cameron case POWER_OR_RESET: 3852946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3862946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3872946e82bSRobert Elliott h->devname); 388edd16368SStephen M. Cameron break; 389edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3902946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3912946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3922946e82bSRobert Elliott h->devname); 393edd16368SStephen M. Cameron break; 394edd16368SStephen M. Cameron default: 3952946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3962946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3972946e82bSRobert Elliott h->devname); 398edd16368SStephen M. Cameron break; 399edd16368SStephen M. Cameron } 400edd16368SStephen M. Cameron return 1; 401edd16368SStephen M. Cameron } 402edd16368SStephen M. Cameron 403852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404852af20aSMatt Bondurant { 405852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408852af20aSMatt Bondurant return 0; 409852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 410852af20aSMatt Bondurant return 1; 411852af20aSMatt Bondurant } 412852af20aSMatt Bondurant 413e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 414e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 415e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 416e985c58fSStephen Cameron { 417e985c58fSStephen Cameron int ld; 418e985c58fSStephen Cameron struct ctlr_info *h; 419e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 420e985c58fSStephen Cameron 421e985c58fSStephen Cameron h = shost_to_hba(shost); 422e985c58fSStephen Cameron ld = lockup_detected(h); 423e985c58fSStephen Cameron 424e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 425e985c58fSStephen Cameron } 426e985c58fSStephen Cameron 427da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428da0697bdSScott Teel struct device_attribute *attr, 429da0697bdSScott Teel const char *buf, size_t count) 430da0697bdSScott Teel { 431da0697bdSScott Teel int status, len; 432da0697bdSScott Teel struct ctlr_info *h; 433da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 434da0697bdSScott Teel char tmpbuf[10]; 435da0697bdSScott Teel 436da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437da0697bdSScott Teel return -EACCES; 438da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439da0697bdSScott Teel strncpy(tmpbuf, buf, len); 440da0697bdSScott Teel tmpbuf[len] = '\0'; 441da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 442da0697bdSScott Teel return -EINVAL; 443da0697bdSScott Teel h = shost_to_hba(shost); 444da0697bdSScott Teel h->acciopath_status = !!status; 445da0697bdSScott Teel dev_warn(&h->pdev->dev, 446da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 448da0697bdSScott Teel return count; 449da0697bdSScott Teel } 450da0697bdSScott Teel 4512ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4522ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4532ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4542ba8bfc8SStephen M. Cameron { 4552ba8bfc8SStephen M. Cameron int debug_level, len; 4562ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4572ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4582ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4592ba8bfc8SStephen M. Cameron 4602ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4612ba8bfc8SStephen M. Cameron return -EACCES; 4622ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4632ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4642ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4652ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4662ba8bfc8SStephen M. Cameron return -EINVAL; 4672ba8bfc8SStephen M. Cameron if (debug_level < 0) 4682ba8bfc8SStephen M. Cameron debug_level = 0; 4692ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4702ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4712ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4722ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4732ba8bfc8SStephen M. Cameron return count; 4742ba8bfc8SStephen M. Cameron } 4752ba8bfc8SStephen M. Cameron 476edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 477edd16368SStephen M. Cameron struct device_attribute *attr, 478edd16368SStephen M. Cameron const char *buf, size_t count) 479edd16368SStephen M. Cameron { 480edd16368SStephen M. Cameron struct ctlr_info *h; 481edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 482a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48331468401SMike Miller hpsa_scan_start(h->scsi_host); 484edd16368SStephen M. Cameron return count; 485edd16368SStephen M. Cameron } 486edd16368SStephen M. Cameron 487d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 488d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 489d28ce020SStephen M. Cameron { 490d28ce020SStephen M. Cameron struct ctlr_info *h; 491d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 492d28ce020SStephen M. Cameron unsigned char *fwrev; 493d28ce020SStephen M. Cameron 494d28ce020SStephen M. Cameron h = shost_to_hba(shost); 495d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 496d28ce020SStephen M. Cameron return 0; 497d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 498d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 499d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500d28ce020SStephen M. Cameron } 501d28ce020SStephen M. Cameron 50294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50394a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50494a13649SStephen M. Cameron { 50594a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50694a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50794a13649SStephen M. Cameron 5080cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5090cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 51094a13649SStephen M. Cameron } 51194a13649SStephen M. Cameron 512745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 513745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 514745a7a25SStephen M. Cameron { 515745a7a25SStephen M. Cameron struct ctlr_info *h; 516745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 517745a7a25SStephen M. Cameron 518745a7a25SStephen M. Cameron h = shost_to_hba(shost); 519745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 520960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 521745a7a25SStephen M. Cameron "performant" : "simple"); 522745a7a25SStephen M. Cameron } 523745a7a25SStephen M. Cameron 524da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525da0697bdSScott Teel struct device_attribute *attr, char *buf) 526da0697bdSScott Teel { 527da0697bdSScott Teel struct ctlr_info *h; 528da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 529da0697bdSScott Teel 530da0697bdSScott Teel h = shost_to_hba(shost); 531da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 533da0697bdSScott Teel } 534da0697bdSScott Teel 53546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 537941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 538941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 539941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 540941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 541941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 542941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 543941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 544941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 545941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 546941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 547941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 548941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5497af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 550941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 551941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5525a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5535a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5545a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5555a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5565a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5575a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 558941b1cdaSStephen M. Cameron }; 559941b1cdaSStephen M. Cameron 56046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 56146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5627af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5635a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5645a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5655a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5665a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5675a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5685a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56946380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 57046380786SStephen M. Cameron * which share a battery backed cache module. One controls the 57146380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 57246380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57346380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57446380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57546380786SStephen M. Cameron */ 57646380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57746380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57846380786SStephen M. Cameron }; 57946380786SStephen M. Cameron 5809b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5819b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5829b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5839b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5849b5c48c2SStephen Cameron }; 5859b5c48c2SStephen Cameron 5869b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587941b1cdaSStephen M. Cameron { 588941b1cdaSStephen M. Cameron int i; 589941b1cdaSStephen M. Cameron 5909b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5919b5c48c2SStephen Cameron if (a[i] == board_id) 592941b1cdaSStephen M. Cameron return 1; 5939b5c48c2SStephen Cameron return 0; 5949b5c48c2SStephen Cameron } 5959b5c48c2SStephen Cameron 5969b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5979b5c48c2SStephen Cameron { 5989b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5999b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 600941b1cdaSStephen M. Cameron } 601941b1cdaSStephen M. Cameron 60246380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60346380786SStephen M. Cameron { 6049b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6059b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60646380786SStephen M. Cameron } 60746380786SStephen M. Cameron 60846380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60946380786SStephen M. Cameron { 61046380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 61146380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 61246380786SStephen M. Cameron } 61346380786SStephen M. Cameron 6149b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6159b5c48c2SStephen Cameron { 6169b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6179b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6189b5c48c2SStephen Cameron } 6199b5c48c2SStephen Cameron 620941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 621941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 622941b1cdaSStephen M. Cameron { 623941b1cdaSStephen M. Cameron struct ctlr_info *h; 624941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 625941b1cdaSStephen M. Cameron 626941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62746380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628941b1cdaSStephen M. Cameron } 629941b1cdaSStephen M. Cameron 630edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631edd16368SStephen M. Cameron { 632edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 633edd16368SStephen M. Cameron } 634edd16368SStephen M. Cameron 635f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6367c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637edd16368SStephen M. Cameron }; 6386b80b18fSScott Teel #define HPSA_RAID_0 0 6396b80b18fSScott Teel #define HPSA_RAID_4 1 6406b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6416b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6426b80b18fSScott Teel #define HPSA_RAID_51 4 6436b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6446b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6457c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6467c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647edd16368SStephen M. Cameron 648f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649f3f01730SKevin Barnett { 650f3f01730SKevin Barnett return !device->physical_device; 651f3f01730SKevin Barnett } 652edd16368SStephen M. Cameron 653edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 654edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 655edd16368SStephen M. Cameron { 656edd16368SStephen M. Cameron ssize_t l = 0; 65782a72c0aSStephen M. Cameron unsigned char rlevel; 658edd16368SStephen M. Cameron struct ctlr_info *h; 659edd16368SStephen M. Cameron struct scsi_device *sdev; 660edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 661edd16368SStephen M. Cameron unsigned long flags; 662edd16368SStephen M. Cameron 663edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 664edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 665edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 666edd16368SStephen M. Cameron hdev = sdev->hostdata; 667edd16368SStephen M. Cameron if (!hdev) { 668edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 669edd16368SStephen M. Cameron return -ENODEV; 670edd16368SStephen M. Cameron } 671edd16368SStephen M. Cameron 672edd16368SStephen M. Cameron /* Is this even a logical drive? */ 673f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 674edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 675edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676edd16368SStephen M. Cameron return l; 677edd16368SStephen M. Cameron } 678edd16368SStephen M. Cameron 679edd16368SStephen M. Cameron rlevel = hdev->raid_level; 680edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 68182a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 682edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 683edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684edd16368SStephen M. Cameron return l; 685edd16368SStephen M. Cameron } 686edd16368SStephen M. Cameron 687edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 688edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 689edd16368SStephen M. Cameron { 690edd16368SStephen M. Cameron struct ctlr_info *h; 691edd16368SStephen M. Cameron struct scsi_device *sdev; 692edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 693edd16368SStephen M. Cameron unsigned long flags; 694edd16368SStephen M. Cameron unsigned char lunid[8]; 695edd16368SStephen M. Cameron 696edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 697edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 698edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 699edd16368SStephen M. Cameron hdev = sdev->hostdata; 700edd16368SStephen M. Cameron if (!hdev) { 701edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 702edd16368SStephen M. Cameron return -ENODEV; 703edd16368SStephen M. Cameron } 704edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 706edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 707edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 708edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 709edd16368SStephen M. Cameron } 710edd16368SStephen M. Cameron 711edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 712edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 713edd16368SStephen M. Cameron { 714edd16368SStephen M. Cameron struct ctlr_info *h; 715edd16368SStephen M. Cameron struct scsi_device *sdev; 716edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 717edd16368SStephen M. Cameron unsigned long flags; 718edd16368SStephen M. Cameron unsigned char sn[16]; 719edd16368SStephen M. Cameron 720edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 721edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 722edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 723edd16368SStephen M. Cameron hdev = sdev->hostdata; 724edd16368SStephen M. Cameron if (!hdev) { 725edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 726edd16368SStephen M. Cameron return -ENODEV; 727edd16368SStephen M. Cameron } 728edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 729edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 730edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 731edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 732edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 733edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 734edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 735edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 736edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 737edd16368SStephen M. Cameron } 738edd16368SStephen M. Cameron 739ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 740ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 741ded1be4aSJoseph T Handzik { 742ded1be4aSJoseph T Handzik struct ctlr_info *h; 743ded1be4aSJoseph T Handzik struct scsi_device *sdev; 744ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 745ded1be4aSJoseph T Handzik unsigned long flags; 746ded1be4aSJoseph T Handzik u64 sas_address; 747ded1be4aSJoseph T Handzik 748ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 749ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 750ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 751ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 752ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 753ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 754ded1be4aSJoseph T Handzik return -ENODEV; 755ded1be4aSJoseph T Handzik } 756ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 757ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 758ded1be4aSJoseph T Handzik 759ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 760ded1be4aSJoseph T Handzik } 761ded1be4aSJoseph T Handzik 762c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 763c1988684SScott Teel struct device_attribute *attr, char *buf) 764c1988684SScott Teel { 765c1988684SScott Teel struct ctlr_info *h; 766c1988684SScott Teel struct scsi_device *sdev; 767c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 768c1988684SScott Teel unsigned long flags; 769c1988684SScott Teel int offload_enabled; 770c1988684SScott Teel 771c1988684SScott Teel sdev = to_scsi_device(dev); 772c1988684SScott Teel h = sdev_to_hba(sdev); 773c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 774c1988684SScott Teel hdev = sdev->hostdata; 775c1988684SScott Teel if (!hdev) { 776c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 777c1988684SScott Teel return -ENODEV; 778c1988684SScott Teel } 779c1988684SScott Teel offload_enabled = hdev->offload_enabled; 780c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 781c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 782c1988684SScott Teel } 783c1988684SScott Teel 7848270b862SJoe Handzik #define MAX_PATHS 8 7858270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7868270b862SJoe Handzik struct device_attribute *attr, char *buf) 7878270b862SJoe Handzik { 7888270b862SJoe Handzik struct ctlr_info *h; 7898270b862SJoe Handzik struct scsi_device *sdev; 7908270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7918270b862SJoe Handzik unsigned long flags; 7928270b862SJoe Handzik int i; 7938270b862SJoe Handzik int output_len = 0; 7948270b862SJoe Handzik u8 box; 7958270b862SJoe Handzik u8 bay; 7968270b862SJoe Handzik u8 path_map_index = 0; 7978270b862SJoe Handzik char *active; 7988270b862SJoe Handzik unsigned char phys_connector[2]; 7998270b862SJoe Handzik 8008270b862SJoe Handzik sdev = to_scsi_device(dev); 8018270b862SJoe Handzik h = sdev_to_hba(sdev); 8028270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8038270b862SJoe Handzik hdev = sdev->hostdata; 8048270b862SJoe Handzik if (!hdev) { 8058270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8068270b862SJoe Handzik return -ENODEV; 8078270b862SJoe Handzik } 8088270b862SJoe Handzik 8098270b862SJoe Handzik bay = hdev->bay; 8108270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8118270b862SJoe Handzik path_map_index = 1<<i; 8128270b862SJoe Handzik if (i == hdev->active_path_index) 8138270b862SJoe Handzik active = "Active"; 8148270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8158270b862SJoe Handzik active = "Inactive"; 8168270b862SJoe Handzik else 8178270b862SJoe Handzik continue; 8188270b862SJoe Handzik 8191faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8201faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8211faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8228270b862SJoe Handzik h->scsi_host->host_no, 8238270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8248270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8258270b862SJoe Handzik 826cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8272708f295SDon Brace output_len += scnprintf(buf + output_len, 8281faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8291faf072cSRasmus Villemoes "%s\n", active); 8308270b862SJoe Handzik continue; 8318270b862SJoe Handzik } 8328270b862SJoe Handzik 8338270b862SJoe Handzik box = hdev->box[i]; 8348270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8358270b862SJoe Handzik sizeof(phys_connector)); 8368270b862SJoe Handzik if (phys_connector[0] < '0') 8378270b862SJoe Handzik phys_connector[0] = '0'; 8388270b862SJoe Handzik if (phys_connector[1] < '0') 8398270b862SJoe Handzik phys_connector[1] = '0'; 8402708f295SDon Brace output_len += scnprintf(buf + output_len, 8411faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8428270b862SJoe Handzik "PORT: %.2s ", 8438270b862SJoe Handzik phys_connector); 844af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 845af15ed36SDon Brace hdev->expose_device) { 8468270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8472708f295SDon Brace output_len += scnprintf(buf + output_len, 8481faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8498270b862SJoe Handzik "BAY: %hhu %s\n", 8508270b862SJoe Handzik bay, active); 8518270b862SJoe Handzik } else { 8522708f295SDon Brace output_len += scnprintf(buf + output_len, 8531faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8548270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8558270b862SJoe Handzik box, bay, active); 8568270b862SJoe Handzik } 8578270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8582708f295SDon Brace output_len += scnprintf(buf + output_len, 8591faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8608270b862SJoe Handzik box, active); 8618270b862SJoe Handzik } else 8622708f295SDon Brace output_len += scnprintf(buf + output_len, 8631faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8648270b862SJoe Handzik } 8658270b862SJoe Handzik 8668270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8671faf072cSRasmus Villemoes return output_len; 8688270b862SJoe Handzik } 8698270b862SJoe Handzik 870*16961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 871*16961204SHannes Reinecke struct device_attribute *attr, char *buf) 872*16961204SHannes Reinecke { 873*16961204SHannes Reinecke struct ctlr_info *h; 874*16961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 875*16961204SHannes Reinecke 876*16961204SHannes Reinecke h = shost_to_hba(shost); 877*16961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 878*16961204SHannes Reinecke } 879*16961204SHannes Reinecke 8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8813f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8833f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 884ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 885c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 886c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8878270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 888da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 889da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 890da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8912ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8922ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8933f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8943f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8953f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8963f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8973f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8983f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 899941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 900941b1cdaSStephen M. Cameron host_show_resettable, NULL); 901e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 902e985c58fSStephen Cameron host_show_lockup_detected, NULL); 903*16961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 904*16961204SHannes Reinecke host_show_ctlr_num, NULL); 9053f5eac3aSStephen M. Cameron 9063f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 9073f5eac3aSStephen M. Cameron &dev_attr_raid_level, 9083f5eac3aSStephen M. Cameron &dev_attr_lunid, 9093f5eac3aSStephen M. Cameron &dev_attr_unique_id, 910c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9118270b862SJoe Handzik &dev_attr_path_info, 912ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9133f5eac3aSStephen M. Cameron NULL, 9143f5eac3aSStephen M. Cameron }; 9153f5eac3aSStephen M. Cameron 9163f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9173f5eac3aSStephen M. Cameron &dev_attr_rescan, 9183f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9193f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9203f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 921941b1cdaSStephen M. Cameron &dev_attr_resettable, 922da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9232ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 924fb53c439STomas Henzl &dev_attr_lockup_detected, 925*16961204SHannes Reinecke &dev_attr_ctlr_num, 9263f5eac3aSStephen M. Cameron NULL, 9273f5eac3aSStephen M. Cameron }; 9283f5eac3aSStephen M. Cameron 92941ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 93041ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 93141ce4c35SStephen Cameron 9323f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9333f5eac3aSStephen M. Cameron .module = THIS_MODULE, 934f79cfec6SStephen M. Cameron .name = HPSA, 935f79cfec6SStephen M. Cameron .proc_name = HPSA, 9363f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9373f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9383f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9397c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9403f5eac3aSStephen M. Cameron .this_id = -1, 9413f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 94275167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9433f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9443f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9453f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 94641ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9473f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9483f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9493f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9503f5eac3aSStephen M. Cameron #endif 9513f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9523f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 953c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 95454b2b50cSMartin K. Petersen .no_write_same = 1, 9553f5eac3aSStephen M. Cameron }; 9563f5eac3aSStephen M. Cameron 957254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9583f5eac3aSStephen M. Cameron { 9593f5eac3aSStephen M. Cameron u32 a; 960072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9613f5eac3aSStephen M. Cameron 962e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 963e1f7de0cSMatt Gates return h->access.command_completed(h, q); 964e1f7de0cSMatt Gates 9653f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 966254f796bSMatt Gates return h->access.command_completed(h, q); 9673f5eac3aSStephen M. Cameron 968254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 969254f796bSMatt Gates a = rq->head[rq->current_entry]; 970254f796bSMatt Gates rq->current_entry++; 9710cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9723f5eac3aSStephen M. Cameron } else { 9733f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9743f5eac3aSStephen M. Cameron } 9753f5eac3aSStephen M. Cameron /* Check for wraparound */ 976254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 977254f796bSMatt Gates rq->current_entry = 0; 978254f796bSMatt Gates rq->wraparound ^= 1; 9793f5eac3aSStephen M. Cameron } 9803f5eac3aSStephen M. Cameron return a; 9813f5eac3aSStephen M. Cameron } 9823f5eac3aSStephen M. Cameron 983c349775eSScott Teel /* 984c349775eSScott Teel * There are some special bits in the bus address of the 985c349775eSScott Teel * command that we have to set for the controller to know 986c349775eSScott Teel * how to process the command: 987c349775eSScott Teel * 988c349775eSScott Teel * Normal performant mode: 989c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 990c349775eSScott Teel * bits 1-3 = block fetch table entry 991c349775eSScott Teel * bits 4-6 = command type (== 0) 992c349775eSScott Teel * 993c349775eSScott Teel * ioaccel1 mode: 994c349775eSScott Teel * bit 0 = "performant mode" bit. 995c349775eSScott Teel * bits 1-3 = block fetch table entry 996c349775eSScott Teel * bits 4-6 = command type (== 110) 997c349775eSScott Teel * (command type is needed because ioaccel1 mode 998c349775eSScott Teel * commands are submitted through the same register as normal 999c349775eSScott Teel * mode commands, so this is how the controller knows whether 1000c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 1001c349775eSScott Teel * 1002c349775eSScott Teel * ioaccel2 mode: 1003c349775eSScott Teel * bit 0 = "performant mode" bit. 1004c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1005c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1006c349775eSScott Teel * a separate special register for submitting commands. 1007c349775eSScott Teel */ 1008c349775eSScott Teel 100925163bd5SWebb Scales /* 101025163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10113f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10123f5eac3aSStephen M. Cameron * register number 10133f5eac3aSStephen M. Cameron */ 101425163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 101525163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 101625163bd5SWebb Scales int reply_queue) 10173f5eac3aSStephen M. Cameron { 1018254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10193f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1020bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 102125163bd5SWebb Scales return; 102225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1023254f796bSMatt Gates c->Header.ReplyQueue = 1024804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 102525163bd5SWebb Scales else 102625163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1027254f796bSMatt Gates } 10283f5eac3aSStephen M. Cameron } 10293f5eac3aSStephen M. Cameron 1030c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 103125163bd5SWebb Scales struct CommandList *c, 103225163bd5SWebb Scales int reply_queue) 1033c349775eSScott Teel { 1034c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1035c349775eSScott Teel 103625163bd5SWebb Scales /* 103725163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1038c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1039c349775eSScott Teel */ 104025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1041c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 104225163bd5SWebb Scales else 104325163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 104425163bd5SWebb Scales /* 104525163bd5SWebb Scales * Set the bits in the address sent down to include: 1046c349775eSScott Teel * - performant mode bit (bit 0) 1047c349775eSScott Teel * - pull count (bits 1-3) 1048c349775eSScott Teel * - command type (bits 4-6) 1049c349775eSScott Teel */ 1050c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1051c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1052c349775eSScott Teel } 1053c349775eSScott Teel 10548be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10558be986ccSStephen Cameron struct CommandList *c, 10568be986ccSStephen Cameron int reply_queue) 10578be986ccSStephen Cameron { 10588be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10598be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10608be986ccSStephen Cameron 10618be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10628be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10638be986ccSStephen Cameron */ 10648be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10658be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10668be986ccSStephen Cameron else 10678be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10688be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10698be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10708be986ccSStephen Cameron * - pull count (bits 0-3) 10718be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10728be986ccSStephen Cameron */ 10738be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10748be986ccSStephen Cameron } 10758be986ccSStephen Cameron 1076c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 107725163bd5SWebb Scales struct CommandList *c, 107825163bd5SWebb Scales int reply_queue) 1079c349775eSScott Teel { 1080c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1081c349775eSScott Teel 108225163bd5SWebb Scales /* 108325163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1084c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1085c349775eSScott Teel */ 108625163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1087c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 108825163bd5SWebb Scales else 108925163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 109025163bd5SWebb Scales /* 109125163bd5SWebb Scales * Set the bits in the address sent down to include: 1092c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1093c349775eSScott Teel * - pull count (bits 0-3) 1094c349775eSScott Teel * - command type isn't needed for ioaccel2 1095c349775eSScott Teel */ 1096c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1097c349775eSScott Teel } 1098c349775eSScott Teel 1099e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1100e85c5974SStephen M. Cameron { 1101e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1102e85c5974SStephen M. Cameron } 1103e85c5974SStephen M. Cameron 1104e85c5974SStephen M. Cameron /* 1105e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1106e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1107e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1108e85c5974SStephen M. Cameron */ 1109e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1110e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1111e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1112e85c5974SStephen M. Cameron struct CommandList *c) 1113e85c5974SStephen M. Cameron { 1114e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1115e85c5974SStephen M. Cameron return; 1116e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1117e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1118e85c5974SStephen M. Cameron } 1119e85c5974SStephen M. Cameron 1120e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1121e85c5974SStephen M. Cameron struct CommandList *c) 1122e85c5974SStephen M. Cameron { 1123e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1124e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1125e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1126e85c5974SStephen M. Cameron } 1127e85c5974SStephen M. Cameron 112825163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 112925163bd5SWebb Scales struct CommandList *c, int reply_queue) 11303f5eac3aSStephen M. Cameron { 1131c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1132c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1133c349775eSScott Teel switch (c->cmd_type) { 1134c349775eSScott Teel case CMD_IOACCEL1: 113525163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1136c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1137c349775eSScott Teel break; 1138c349775eSScott Teel case CMD_IOACCEL2: 113925163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1140c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1141c349775eSScott Teel break; 11428be986ccSStephen Cameron case IOACCEL2_TMF: 11438be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11448be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11458be986ccSStephen Cameron break; 1146c349775eSScott Teel default: 114725163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1148f2405db8SDon Brace h->access.submit_command(h, c); 11493f5eac3aSStephen M. Cameron } 1150c05e8866SStephen Cameron } 11513f5eac3aSStephen M. Cameron 1152a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 115325163bd5SWebb Scales { 1154d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1155a58e7e53SWebb Scales return finish_cmd(c); 1156a58e7e53SWebb Scales 115725163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 115825163bd5SWebb Scales } 115925163bd5SWebb Scales 11603f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11613f5eac3aSStephen M. Cameron { 11623f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11633f5eac3aSStephen M. Cameron } 11643f5eac3aSStephen M. Cameron 11653f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11663f5eac3aSStephen M. Cameron { 11673f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11683f5eac3aSStephen M. Cameron return 0; 11693f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11703f5eac3aSStephen M. Cameron return 1; 11713f5eac3aSStephen M. Cameron return 0; 11723f5eac3aSStephen M. Cameron } 11733f5eac3aSStephen M. Cameron 1174edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1175edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1176edd16368SStephen M. Cameron { 1177edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1178edd16368SStephen M. Cameron * assumes h->devlock is held 1179edd16368SStephen M. Cameron */ 1180edd16368SStephen M. Cameron int i, found = 0; 1181cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1182edd16368SStephen M. Cameron 1183263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1184edd16368SStephen M. Cameron 1185edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1186edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1187263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1188edd16368SStephen M. Cameron } 1189edd16368SStephen M. Cameron 1190263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1191263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1192edd16368SStephen M. Cameron /* *bus = 1; */ 1193edd16368SStephen M. Cameron *target = i; 1194edd16368SStephen M. Cameron *lun = 0; 1195edd16368SStephen M. Cameron found = 1; 1196edd16368SStephen M. Cameron } 1197edd16368SStephen M. Cameron return !found; 1198edd16368SStephen M. Cameron } 1199edd16368SStephen M. Cameron 12001d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 12010d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12020d96ef5fSWebb Scales { 12037c59a0d4SDon Brace #define LABEL_SIZE 25 12047c59a0d4SDon Brace char label[LABEL_SIZE]; 12057c59a0d4SDon Brace 12069975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12079975ec9dSDon Brace return; 12089975ec9dSDon Brace 12097c59a0d4SDon Brace switch (dev->devtype) { 12107c59a0d4SDon Brace case TYPE_RAID: 12117c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12127c59a0d4SDon Brace break; 12137c59a0d4SDon Brace case TYPE_ENCLOSURE: 12147c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12157c59a0d4SDon Brace break; 12167c59a0d4SDon Brace case TYPE_DISK: 1217af15ed36SDon Brace case TYPE_ZBC: 12187c59a0d4SDon Brace if (dev->external) 12197c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12207c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12217c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12227c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12237c59a0d4SDon Brace else 12247c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12257c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12267c59a0d4SDon Brace raid_label[dev->raid_level]); 12277c59a0d4SDon Brace break; 12287c59a0d4SDon Brace case TYPE_ROM: 12297c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12307c59a0d4SDon Brace break; 12317c59a0d4SDon Brace case TYPE_TAPE: 12327c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12337c59a0d4SDon Brace break; 12347c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12357c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12367c59a0d4SDon Brace break; 12377c59a0d4SDon Brace default: 12387c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12397c59a0d4SDon Brace break; 12407c59a0d4SDon Brace } 12417c59a0d4SDon Brace 12420d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12437c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12440d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12450d96ef5fSWebb Scales description, 12460d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12470d96ef5fSWebb Scales dev->vendor, 12480d96ef5fSWebb Scales dev->model, 12497c59a0d4SDon Brace label, 12500d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12510d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12522a168208SKevin Barnett dev->expose_device); 12530d96ef5fSWebb Scales } 12540d96ef5fSWebb Scales 1255edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12568aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1257edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1258edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1259edd16368SStephen M. Cameron { 1260edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1261edd16368SStephen M. Cameron int n = h->ndevices; 1262edd16368SStephen M. Cameron int i; 1263edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1264edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1265edd16368SStephen M. Cameron 1266cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1267edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1268edd16368SStephen M. Cameron "inaccessible.\n"); 1269edd16368SStephen M. Cameron return -1; 1270edd16368SStephen M. Cameron } 1271edd16368SStephen M. Cameron 1272edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1273edd16368SStephen M. Cameron if (device->lun != -1) 1274edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1275edd16368SStephen M. Cameron goto lun_assigned; 1276edd16368SStephen M. Cameron 1277edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1278edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12792b08b3e9SDon Brace * unit no, zero otherwise. 1280edd16368SStephen M. Cameron */ 1281edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1282edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1283edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1284edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1285edd16368SStephen M. Cameron return -1; 1286edd16368SStephen M. Cameron goto lun_assigned; 1287edd16368SStephen M. Cameron } 1288edd16368SStephen M. Cameron 1289edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1290edd16368SStephen M. Cameron * Search through our list and find the device which 12919a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1292edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1293edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1294edd16368SStephen M. Cameron */ 1295edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1296edd16368SStephen M. Cameron addr1[4] = 0; 12979a4178b7Sshane.seymour addr1[5] = 0; 1298edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1299edd16368SStephen M. Cameron sd = h->dev[i]; 1300edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1301edd16368SStephen M. Cameron addr2[4] = 0; 13029a4178b7Sshane.seymour addr2[5] = 0; 13039a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1304edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1305edd16368SStephen M. Cameron device->bus = sd->bus; 1306edd16368SStephen M. Cameron device->target = sd->target; 1307edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1308edd16368SStephen M. Cameron break; 1309edd16368SStephen M. Cameron } 1310edd16368SStephen M. Cameron } 1311edd16368SStephen M. Cameron if (device->lun == -1) { 1312edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1313edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1314edd16368SStephen M. Cameron "configuration.\n"); 1315edd16368SStephen M. Cameron return -1; 1316edd16368SStephen M. Cameron } 1317edd16368SStephen M. Cameron 1318edd16368SStephen M. Cameron lun_assigned: 1319edd16368SStephen M. Cameron 1320edd16368SStephen M. Cameron h->dev[n] = device; 1321edd16368SStephen M. Cameron h->ndevices++; 1322edd16368SStephen M. Cameron added[*nadded] = device; 1323edd16368SStephen M. Cameron (*nadded)++; 13240d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13252a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1326a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1327a473d86cSRobert Elliott device->offload_enabled = 0; 1328edd16368SStephen M. Cameron return 0; 1329edd16368SStephen M. Cameron } 1330edd16368SStephen M. Cameron 1331bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13328aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1333bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1334bd9244f7SScott Teel { 1335a473d86cSRobert Elliott int offload_enabled; 1336bd9244f7SScott Teel /* assumes h->devlock is held */ 1337bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1338bd9244f7SScott Teel 1339bd9244f7SScott Teel /* Raid level changed. */ 1340bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1341250fb125SStephen M. Cameron 134203383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 134303383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 134403383736SDon Brace /* 134503383736SDon Brace * if drive is newly offload_enabled, we want to copy the 134603383736SDon Brace * raid map data first. If previously offload_enabled and 134703383736SDon Brace * offload_config were set, raid map data had better be 134803383736SDon Brace * the same as it was before. if raid map data is changed 134903383736SDon Brace * then it had better be the case that 135003383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 135103383736SDon Brace */ 13529fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 135303383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 135403383736SDon Brace } 1355a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1356a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1357a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1358a3144e0bSJoe Handzik } 1359a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 136003383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 136103383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 136203383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1363250fb125SStephen M. Cameron 136441ce4c35SStephen Cameron /* 136541ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 136641ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 136741ce4c35SStephen Cameron * can't do that until all the devices are updated. 136841ce4c35SStephen Cameron */ 136941ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 137041ce4c35SStephen Cameron if (!new_entry->offload_enabled) 137141ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 137241ce4c35SStephen Cameron 1373a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1374a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13750d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1376a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1377bd9244f7SScott Teel } 1378bd9244f7SScott Teel 13792a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13808aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13812a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13822a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13832a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13842a8ccf31SStephen M. Cameron { 13852a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1386cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13872a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13882a8ccf31SStephen M. Cameron (*nremoved)++; 138901350d05SStephen M. Cameron 139001350d05SStephen M. Cameron /* 139101350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 139201350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 139301350d05SStephen M. Cameron */ 139401350d05SStephen M. Cameron if (new_entry->target == -1) { 139501350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 139601350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 139701350d05SStephen M. Cameron } 139801350d05SStephen M. Cameron 13992a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 14002a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 14012a8ccf31SStephen M. Cameron (*nadded)++; 14020d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1403a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1404a473d86cSRobert Elliott new_entry->offload_enabled = 0; 14052a8ccf31SStephen M. Cameron } 14062a8ccf31SStephen M. Cameron 1407edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14088aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1409edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1410edd16368SStephen M. Cameron { 1411edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1412edd16368SStephen M. Cameron int i; 1413edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1414edd16368SStephen M. Cameron 1415cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1416edd16368SStephen M. Cameron 1417edd16368SStephen M. Cameron sd = h->dev[entry]; 1418edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1419edd16368SStephen M. Cameron (*nremoved)++; 1420edd16368SStephen M. Cameron 1421edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1422edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1423edd16368SStephen M. Cameron h->ndevices--; 14240d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1425edd16368SStephen M. Cameron } 1426edd16368SStephen M. Cameron 1427edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1428edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1429edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1430edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1431edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1432edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1433edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1434edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1435edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1436edd16368SStephen M. Cameron 1437edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1438edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1439edd16368SStephen M. Cameron { 1440edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1441edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1442edd16368SStephen M. Cameron */ 1443edd16368SStephen M. Cameron unsigned long flags; 1444edd16368SStephen M. Cameron int i, j; 1445edd16368SStephen M. Cameron 1446edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1447edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1448edd16368SStephen M. Cameron if (h->dev[i] == added) { 1449edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1450edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1451edd16368SStephen M. Cameron h->ndevices--; 1452edd16368SStephen M. Cameron break; 1453edd16368SStephen M. Cameron } 1454edd16368SStephen M. Cameron } 1455edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1456edd16368SStephen M. Cameron kfree(added); 1457edd16368SStephen M. Cameron } 1458edd16368SStephen M. Cameron 1459edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1460edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1461edd16368SStephen M. Cameron { 1462edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1463edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1464edd16368SStephen M. Cameron * to differ first 1465edd16368SStephen M. Cameron */ 1466edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1467edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1468edd16368SStephen M. Cameron return 0; 1469edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1470edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1471edd16368SStephen M. Cameron return 0; 1472edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1473edd16368SStephen M. Cameron return 0; 1474edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1475edd16368SStephen M. Cameron return 0; 1476edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1477edd16368SStephen M. Cameron return 0; 1478edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1479edd16368SStephen M. Cameron return 0; 1480edd16368SStephen M. Cameron return 1; 1481edd16368SStephen M. Cameron } 1482edd16368SStephen M. Cameron 1483bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1484bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1485bd9244f7SScott Teel { 1486bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1487bd9244f7SScott Teel * that the device is a different device, nor that the OS 1488bd9244f7SScott Teel * needs to be told anything about the change. 1489bd9244f7SScott Teel */ 1490bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1491bd9244f7SScott Teel return 1; 1492250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1493250fb125SStephen M. Cameron return 1; 1494250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1495250fb125SStephen M. Cameron return 1; 149693849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 149703383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 149803383736SDon Brace return 1; 1499bd9244f7SScott Teel return 0; 1500bd9244f7SScott Teel } 1501bd9244f7SScott Teel 1502edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1503edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1504edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1505bd9244f7SScott Teel * location in *index. 1506bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1507bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1508bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1509edd16368SStephen M. Cameron */ 1510edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1511edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1512edd16368SStephen M. Cameron int *index) 1513edd16368SStephen M. Cameron { 1514edd16368SStephen M. Cameron int i; 1515edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1516edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1517edd16368SStephen M. Cameron #define DEVICE_SAME 2 1518bd9244f7SScott Teel #define DEVICE_UPDATED 3 15191d33d85dSDon Brace if (needle == NULL) 15201d33d85dSDon Brace return DEVICE_NOT_FOUND; 15211d33d85dSDon Brace 1522edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 152323231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 152423231048SStephen M. Cameron continue; 1525edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1526edd16368SStephen M. Cameron *index = i; 1527bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1528bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1529bd9244f7SScott Teel return DEVICE_UPDATED; 1530edd16368SStephen M. Cameron return DEVICE_SAME; 1531bd9244f7SScott Teel } else { 15329846590eSStephen M. Cameron /* Keep offline devices offline */ 15339846590eSStephen M. Cameron if (needle->volume_offline) 15349846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1535edd16368SStephen M. Cameron return DEVICE_CHANGED; 1536edd16368SStephen M. Cameron } 1537edd16368SStephen M. Cameron } 1538bd9244f7SScott Teel } 1539edd16368SStephen M. Cameron *index = -1; 1540edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1541edd16368SStephen M. Cameron } 1542edd16368SStephen M. Cameron 15439846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15449846590eSStephen M. Cameron unsigned char scsi3addr[]) 15459846590eSStephen M. Cameron { 15469846590eSStephen M. Cameron struct offline_device_entry *device; 15479846590eSStephen M. Cameron unsigned long flags; 15489846590eSStephen M. Cameron 15499846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15509846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15519846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15529846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15539846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15549846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15559846590eSStephen M. Cameron return; 15569846590eSStephen M. Cameron } 15579846590eSStephen M. Cameron } 15589846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15599846590eSStephen M. Cameron 15609846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15619846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15629846590eSStephen M. Cameron if (!device) { 15639846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15649846590eSStephen M. Cameron return; 15659846590eSStephen M. Cameron } 15669846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15679846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15689846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15699846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15709846590eSStephen M. Cameron } 15719846590eSStephen M. Cameron 15729846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15739846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15749846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15759846590eSStephen M. Cameron { 15769846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15779846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15789846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15799846590eSStephen M. Cameron h->scsi_host->host_no, 15809846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15819846590eSStephen M. Cameron switch (sd->volume_offline) { 15829846590eSStephen M. Cameron case HPSA_LV_OK: 15839846590eSStephen M. Cameron break; 15849846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15859846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15869846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15879846590eSStephen M. Cameron h->scsi_host->host_no, 15889846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15899846590eSStephen M. Cameron break; 15905ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15915ca01204SScott Benesh dev_info(&h->pdev->dev, 15925ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15935ca01204SScott Benesh h->scsi_host->host_no, 15945ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15955ca01204SScott Benesh break; 15969846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15979846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15985ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15999846590eSStephen M. Cameron h->scsi_host->host_no, 16009846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16019846590eSStephen M. Cameron break; 16029846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16039846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16049846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16059846590eSStephen M. Cameron h->scsi_host->host_no, 16069846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16079846590eSStephen M. Cameron break; 16089846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16099846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16109846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16119846590eSStephen M. Cameron h->scsi_host->host_no, 16129846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16139846590eSStephen M. Cameron break; 16149846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16159846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16169846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16179846590eSStephen M. Cameron h->scsi_host->host_no, 16189846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16199846590eSStephen M. Cameron break; 16209846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16219846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16229846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16239846590eSStephen M. Cameron h->scsi_host->host_no, 16249846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16259846590eSStephen M. Cameron break; 16269846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16279846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16289846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16299846590eSStephen M. Cameron h->scsi_host->host_no, 16309846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16319846590eSStephen M. Cameron break; 16329846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16339846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16349846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16359846590eSStephen M. Cameron h->scsi_host->host_no, 16369846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16379846590eSStephen M. Cameron break; 16389846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16399846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16409846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16419846590eSStephen M. Cameron h->scsi_host->host_no, 16429846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16439846590eSStephen M. Cameron break; 16449846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16459846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16469846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16479846590eSStephen M. Cameron h->scsi_host->host_no, 16489846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16499846590eSStephen M. Cameron break; 16509846590eSStephen M. Cameron } 16519846590eSStephen M. Cameron } 16529846590eSStephen M. Cameron 165303383736SDon Brace /* 165403383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 165503383736SDon Brace * raid offload configured. 165603383736SDon Brace */ 165703383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 165803383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 165903383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 166003383736SDon Brace { 166103383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 166203383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 166303383736SDon Brace int i, j; 166403383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 166503383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 166603383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 166703383736SDon Brace le16_to_cpu(map->layout_map_count) * 166803383736SDon Brace total_disks_per_row; 166903383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 167003383736SDon Brace total_disks_per_row; 167103383736SDon Brace int qdepth; 167203383736SDon Brace 167303383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 167403383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 167503383736SDon Brace 1676d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1677d604f533SWebb Scales 167803383736SDon Brace qdepth = 0; 167903383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 168003383736SDon Brace logical_drive->phys_disk[i] = NULL; 168103383736SDon Brace if (!logical_drive->offload_config) 168203383736SDon Brace continue; 168303383736SDon Brace for (j = 0; j < ndevices; j++) { 16841d33d85dSDon Brace if (dev[j] == NULL) 16851d33d85dSDon Brace continue; 1686ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1687ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1688af15ed36SDon Brace continue; 1689f3f01730SKevin Barnett if (is_logical_device(dev[j])) 169003383736SDon Brace continue; 169103383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 169203383736SDon Brace continue; 169303383736SDon Brace 169403383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 169503383736SDon Brace if (i < nphys_disk) 169603383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 169703383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 169803383736SDon Brace break; 169903383736SDon Brace } 170003383736SDon Brace 170103383736SDon Brace /* 170203383736SDon Brace * This can happen if a physical drive is removed and 170303383736SDon Brace * the logical drive is degraded. In that case, the RAID 170403383736SDon Brace * map data will refer to a physical disk which isn't actually 170503383736SDon Brace * present. And in that case offload_enabled should already 170603383736SDon Brace * be 0, but we'll turn it off here just in case 170703383736SDon Brace */ 170803383736SDon Brace if (!logical_drive->phys_disk[i]) { 170903383736SDon Brace logical_drive->offload_enabled = 0; 171041ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 171141ce4c35SStephen Cameron logical_drive->queue_depth = 8; 171203383736SDon Brace } 171303383736SDon Brace } 171403383736SDon Brace if (nraid_map_entries) 171503383736SDon Brace /* 171603383736SDon Brace * This is correct for reads, too high for full stripe writes, 171703383736SDon Brace * way too high for partial stripe writes 171803383736SDon Brace */ 171903383736SDon Brace logical_drive->queue_depth = qdepth; 172003383736SDon Brace else 172103383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 172203383736SDon Brace } 172303383736SDon Brace 172403383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 172503383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 172603383736SDon Brace { 172703383736SDon Brace int i; 172803383736SDon Brace 172903383736SDon Brace for (i = 0; i < ndevices; i++) { 17301d33d85dSDon Brace if (dev[i] == NULL) 17311d33d85dSDon Brace continue; 1732ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1733ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1734af15ed36SDon Brace continue; 1735f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 173603383736SDon Brace continue; 173741ce4c35SStephen Cameron 173841ce4c35SStephen Cameron /* 173941ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 174041ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 174141ce4c35SStephen Cameron * and since it isn't changing, we do not need to 174241ce4c35SStephen Cameron * update it. 174341ce4c35SStephen Cameron */ 174441ce4c35SStephen Cameron if (dev[i]->offload_enabled) 174541ce4c35SStephen Cameron continue; 174641ce4c35SStephen Cameron 174703383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 174803383736SDon Brace } 174903383736SDon Brace } 175003383736SDon Brace 1751096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1752096ccff4SKevin Barnett { 1753096ccff4SKevin Barnett int rc = 0; 1754096ccff4SKevin Barnett 1755096ccff4SKevin Barnett if (!h->scsi_host) 1756096ccff4SKevin Barnett return 1; 1757096ccff4SKevin Barnett 1758d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1759096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1760096ccff4SKevin Barnett device->target, device->lun); 1761d04e62b9SKevin Barnett else /* HBA */ 1762d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1763d04e62b9SKevin Barnett 1764096ccff4SKevin Barnett return rc; 1765096ccff4SKevin Barnett } 1766096ccff4SKevin Barnett 1767ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1768ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1769ba74fdc4SDon Brace { 1770ba74fdc4SDon Brace int i; 1771ba74fdc4SDon Brace int count = 0; 1772ba74fdc4SDon Brace 1773ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1774ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1775ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1776ba74fdc4SDon Brace 1777ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1778ba74fdc4SDon Brace dev->scsi3addr)) { 1779ba74fdc4SDon Brace unsigned long flags; 1780ba74fdc4SDon Brace 1781ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1782ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1783ba74fdc4SDon Brace ++count; 1784ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1785ba74fdc4SDon Brace } 1786ba74fdc4SDon Brace 1787ba74fdc4SDon Brace cmd_free(h, c); 1788ba74fdc4SDon Brace } 1789ba74fdc4SDon Brace 1790ba74fdc4SDon Brace return count; 1791ba74fdc4SDon Brace } 1792ba74fdc4SDon Brace 1793ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1794ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1795ba74fdc4SDon Brace { 1796ba74fdc4SDon Brace int cmds = 0; 1797ba74fdc4SDon Brace int waits = 0; 1798ba74fdc4SDon Brace 1799ba74fdc4SDon Brace while (1) { 1800ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1801ba74fdc4SDon Brace if (cmds == 0) 1802ba74fdc4SDon Brace break; 1803ba74fdc4SDon Brace if (++waits > 20) 1804ba74fdc4SDon Brace break; 1805ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1806ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1807ba74fdc4SDon Brace __func__, cmds); 1808ba74fdc4SDon Brace msleep(1000); 1809ba74fdc4SDon Brace } 1810ba74fdc4SDon Brace } 1811ba74fdc4SDon Brace 1812096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1813096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1814096ccff4SKevin Barnett { 1815096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1816096ccff4SKevin Barnett 1817096ccff4SKevin Barnett if (!h->scsi_host) 1818096ccff4SKevin Barnett return; 1819096ccff4SKevin Barnett 1820d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1821096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1822096ccff4SKevin Barnett device->target, device->lun); 1823096ccff4SKevin Barnett if (sdev) { 1824096ccff4SKevin Barnett scsi_remove_device(sdev); 1825096ccff4SKevin Barnett scsi_device_put(sdev); 1826096ccff4SKevin Barnett } else { 1827096ccff4SKevin Barnett /* 1828096ccff4SKevin Barnett * We don't expect to get here. Future commands 1829096ccff4SKevin Barnett * to this device will get a selection timeout as 1830096ccff4SKevin Barnett * if the device were gone. 1831096ccff4SKevin Barnett */ 1832096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1833096ccff4SKevin Barnett "didn't find device for removal."); 1834096ccff4SKevin Barnett } 1835ba74fdc4SDon Brace } else { /* HBA */ 1836ba74fdc4SDon Brace 1837ba74fdc4SDon Brace device->removed = 1; 1838ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1839ba74fdc4SDon Brace 1840d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1841096ccff4SKevin Barnett } 1842ba74fdc4SDon Brace } 1843096ccff4SKevin Barnett 18448aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1845edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1846edd16368SStephen M. Cameron { 1847edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1848edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1849edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1850edd16368SStephen M. Cameron */ 1851edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1852edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1853edd16368SStephen M. Cameron unsigned long flags; 1854edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1855edd16368SStephen M. Cameron int nadded, nremoved; 1856edd16368SStephen M. Cameron 1857da03ded0SDon Brace /* 1858da03ded0SDon Brace * A reset can cause a device status to change 1859da03ded0SDon Brace * re-schedule the scan to see what happened. 1860da03ded0SDon Brace */ 1861da03ded0SDon Brace if (h->reset_in_progress) { 1862da03ded0SDon Brace h->drv_req_rescan = 1; 1863da03ded0SDon Brace return; 1864da03ded0SDon Brace } 1865edd16368SStephen M. Cameron 1866cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1867cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1868edd16368SStephen M. Cameron 1869edd16368SStephen M. Cameron if (!added || !removed) { 1870edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1871edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1872edd16368SStephen M. Cameron goto free_and_out; 1873edd16368SStephen M. Cameron } 1874edd16368SStephen M. Cameron 1875edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1876edd16368SStephen M. Cameron 1877edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1878edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1879edd16368SStephen M. Cameron * devices which have changed, remove the old device 1880edd16368SStephen M. Cameron * info and add the new device info. 1881bd9244f7SScott Teel * If minor device attributes change, just update 1882bd9244f7SScott Teel * the existing device structure. 1883edd16368SStephen M. Cameron */ 1884edd16368SStephen M. Cameron i = 0; 1885edd16368SStephen M. Cameron nremoved = 0; 1886edd16368SStephen M. Cameron nadded = 0; 1887edd16368SStephen M. Cameron while (i < h->ndevices) { 1888edd16368SStephen M. Cameron csd = h->dev[i]; 1889edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1890edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1891edd16368SStephen M. Cameron changes++; 18928aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1893edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1894edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1895edd16368SStephen M. Cameron changes++; 18968aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18972a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1898c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1899c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1900c7f172dcSStephen M. Cameron */ 1901c7f172dcSStephen M. Cameron sd[entry] = NULL; 1902bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19038aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1904edd16368SStephen M. Cameron } 1905edd16368SStephen M. Cameron i++; 1906edd16368SStephen M. Cameron } 1907edd16368SStephen M. Cameron 1908edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1909edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1910edd16368SStephen M. Cameron */ 1911edd16368SStephen M. Cameron 1912edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1913edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1914edd16368SStephen M. Cameron continue; 19159846590eSStephen M. Cameron 19169846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19179846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19189846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19199846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19209846590eSStephen M. Cameron */ 19219846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19229846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19230d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19249846590eSStephen M. Cameron continue; 19259846590eSStephen M. Cameron } 19269846590eSStephen M. Cameron 1927edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1928edd16368SStephen M. Cameron h->ndevices, &entry); 1929edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1930edd16368SStephen M. Cameron changes++; 19318aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1932edd16368SStephen M. Cameron break; 1933edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1934edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1935edd16368SStephen M. Cameron /* should never happen... */ 1936edd16368SStephen M. Cameron changes++; 1937edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1938edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1939edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1940edd16368SStephen M. Cameron } 1941edd16368SStephen M. Cameron } 194241ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 194341ce4c35SStephen Cameron 194441ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 194541ce4c35SStephen Cameron * any logical drives that need it enabled. 194641ce4c35SStephen Cameron */ 19471d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19481d33d85dSDon Brace if (h->dev[i] == NULL) 19491d33d85dSDon Brace continue; 195041ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19511d33d85dSDon Brace } 195241ce4c35SStephen Cameron 1953edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1954edd16368SStephen M. Cameron 19559846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19569846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19579846590eSStephen M. Cameron * so don't touch h->dev[] 19589846590eSStephen M. Cameron */ 19599846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19609846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19619846590eSStephen M. Cameron continue; 19629846590eSStephen M. Cameron if (sd[i]->volume_offline) 19639846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19649846590eSStephen M. Cameron } 19659846590eSStephen M. Cameron 1966edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1967edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1968edd16368SStephen M. Cameron * first time through. 1969edd16368SStephen M. Cameron */ 19708aa60681SDon Brace if (!changes) 1971edd16368SStephen M. Cameron goto free_and_out; 1972edd16368SStephen M. Cameron 1973edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1974edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19751d33d85dSDon Brace if (removed[i] == NULL) 19761d33d85dSDon Brace continue; 1977096ccff4SKevin Barnett if (removed[i]->expose_device) 1978096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1979edd16368SStephen M. Cameron kfree(removed[i]); 1980edd16368SStephen M. Cameron removed[i] = NULL; 1981edd16368SStephen M. Cameron } 1982edd16368SStephen M. Cameron 1983edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1984edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1985096ccff4SKevin Barnett int rc = 0; 1986096ccff4SKevin Barnett 19871d33d85dSDon Brace if (added[i] == NULL) 198841ce4c35SStephen Cameron continue; 19892a168208SKevin Barnett if (!(added[i]->expose_device)) 1990edd16368SStephen M. Cameron continue; 1991096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1992096ccff4SKevin Barnett if (!rc) 1993edd16368SStephen M. Cameron continue; 1994096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1995096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1996edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1997edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1998edd16368SStephen M. Cameron */ 1999edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 2000853633e8SDon Brace h->drv_req_rescan = 1; 2001edd16368SStephen M. Cameron } 2002edd16368SStephen M. Cameron 2003edd16368SStephen M. Cameron free_and_out: 2004edd16368SStephen M. Cameron kfree(added); 2005edd16368SStephen M. Cameron kfree(removed); 2006edd16368SStephen M. Cameron } 2007edd16368SStephen M. Cameron 2008edd16368SStephen M. Cameron /* 20099e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2010edd16368SStephen M. Cameron * Assume's h->devlock is held. 2011edd16368SStephen M. Cameron */ 2012edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2013edd16368SStephen M. Cameron int bus, int target, int lun) 2014edd16368SStephen M. Cameron { 2015edd16368SStephen M. Cameron int i; 2016edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2017edd16368SStephen M. Cameron 2018edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2019edd16368SStephen M. Cameron sd = h->dev[i]; 2020edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2021edd16368SStephen M. Cameron return sd; 2022edd16368SStephen M. Cameron } 2023edd16368SStephen M. Cameron return NULL; 2024edd16368SStephen M. Cameron } 2025edd16368SStephen M. Cameron 2026edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2027edd16368SStephen M. Cameron { 2028edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2029edd16368SStephen M. Cameron unsigned long flags; 2030edd16368SStephen M. Cameron struct ctlr_info *h; 2031edd16368SStephen M. Cameron 2032edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2033edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2034d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2035d04e62b9SKevin Barnett struct scsi_target *starget; 2036d04e62b9SKevin Barnett struct sas_rphy *rphy; 2037d04e62b9SKevin Barnett 2038d04e62b9SKevin Barnett starget = scsi_target(sdev); 2039d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2040d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2041d04e62b9SKevin Barnett if (sd) { 2042d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2043d04e62b9SKevin Barnett sd->lun = sdev->lun; 2044d04e62b9SKevin Barnett } 2045d04e62b9SKevin Barnett } else 2046edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2047edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2048d04e62b9SKevin Barnett 2049d04e62b9SKevin Barnett if (sd && sd->expose_device) { 205003383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2051d04e62b9SKevin Barnett sdev->hostdata = sd; 205241ce4c35SStephen Cameron } else 205341ce4c35SStephen Cameron sdev->hostdata = NULL; 2054edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2055edd16368SStephen M. Cameron return 0; 2056edd16368SStephen M. Cameron } 2057edd16368SStephen M. Cameron 205841ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 205941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 206041ce4c35SStephen Cameron { 206141ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 206241ce4c35SStephen Cameron int queue_depth; 206341ce4c35SStephen Cameron 206441ce4c35SStephen Cameron sd = sdev->hostdata; 20652a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 206641ce4c35SStephen Cameron 206741ce4c35SStephen Cameron if (sd) 206841ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 206941ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 207041ce4c35SStephen Cameron else 207141ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 207241ce4c35SStephen Cameron 207341ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 207441ce4c35SStephen Cameron 207541ce4c35SStephen Cameron return 0; 207641ce4c35SStephen Cameron } 207741ce4c35SStephen Cameron 2078edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2079edd16368SStephen M. Cameron { 2080bcc44255SStephen M. Cameron /* nothing to do. */ 2081edd16368SStephen M. Cameron } 2082edd16368SStephen M. Cameron 2083d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2084d9a729f3SWebb Scales { 2085d9a729f3SWebb Scales int i; 2086d9a729f3SWebb Scales 2087d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2088d9a729f3SWebb Scales return; 2089d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2090d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2091d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2092d9a729f3SWebb Scales } 2093d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2094d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2095d9a729f3SWebb Scales } 2096d9a729f3SWebb Scales 2097d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2098d9a729f3SWebb Scales { 2099d9a729f3SWebb Scales int i; 2100d9a729f3SWebb Scales 2101d9a729f3SWebb Scales if (h->chainsize <= 0) 2102d9a729f3SWebb Scales return 0; 2103d9a729f3SWebb Scales 2104d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2105d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2106d9a729f3SWebb Scales GFP_KERNEL); 2107d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2108d9a729f3SWebb Scales return -ENOMEM; 2109d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2110d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2111d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2112d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2113d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2114d9a729f3SWebb Scales goto clean; 2115d9a729f3SWebb Scales } 2116d9a729f3SWebb Scales return 0; 2117d9a729f3SWebb Scales 2118d9a729f3SWebb Scales clean: 2119d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2120d9a729f3SWebb Scales return -ENOMEM; 2121d9a729f3SWebb Scales } 2122d9a729f3SWebb Scales 212333a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 212433a2ffceSStephen M. Cameron { 212533a2ffceSStephen M. Cameron int i; 212633a2ffceSStephen M. Cameron 212733a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 212833a2ffceSStephen M. Cameron return; 212933a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 213033a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 213133a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 213233a2ffceSStephen M. Cameron } 213333a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 213433a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 213533a2ffceSStephen M. Cameron } 213633a2ffceSStephen M. Cameron 2137105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 213833a2ffceSStephen M. Cameron { 213933a2ffceSStephen M. Cameron int i; 214033a2ffceSStephen M. Cameron 214133a2ffceSStephen M. Cameron if (h->chainsize <= 0) 214233a2ffceSStephen M. Cameron return 0; 214333a2ffceSStephen M. Cameron 214433a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 214533a2ffceSStephen M. Cameron GFP_KERNEL); 21463d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 21473d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 214833a2ffceSStephen M. Cameron return -ENOMEM; 21493d4e6af8SRobert Elliott } 215033a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 215133a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 215233a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21533d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 21543d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 215533a2ffceSStephen M. Cameron goto clean; 215633a2ffceSStephen M. Cameron } 21573d4e6af8SRobert Elliott } 215833a2ffceSStephen M. Cameron return 0; 215933a2ffceSStephen M. Cameron 216033a2ffceSStephen M. Cameron clean: 216133a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 216233a2ffceSStephen M. Cameron return -ENOMEM; 216333a2ffceSStephen M. Cameron } 216433a2ffceSStephen M. Cameron 2165d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2166d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2167d9a729f3SWebb Scales { 2168d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2169d9a729f3SWebb Scales u64 temp64; 2170d9a729f3SWebb Scales u32 chain_size; 2171d9a729f3SWebb Scales 2172d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2173a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2174d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2175d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2176d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2177d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2178d9a729f3SWebb Scales cp->sg->address = 0; 2179d9a729f3SWebb Scales return -1; 2180d9a729f3SWebb Scales } 2181d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2182d9a729f3SWebb Scales return 0; 2183d9a729f3SWebb Scales } 2184d9a729f3SWebb Scales 2185d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2186d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2187d9a729f3SWebb Scales { 2188d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2189d9a729f3SWebb Scales u64 temp64; 2190d9a729f3SWebb Scales u32 chain_size; 2191d9a729f3SWebb Scales 2192d9a729f3SWebb Scales chain_sg = cp->sg; 2193d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2194a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2195d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2196d9a729f3SWebb Scales } 2197d9a729f3SWebb Scales 2198e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 219933a2ffceSStephen M. Cameron struct CommandList *c) 220033a2ffceSStephen M. Cameron { 220133a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 220233a2ffceSStephen M. Cameron u64 temp64; 220350a0decfSStephen M. Cameron u32 chain_len; 220433a2ffceSStephen M. Cameron 220533a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 220633a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 220750a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 220850a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22092b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 221050a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 221150a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 221233a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2213e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2214e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 221550a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2216e2bea6dfSStephen M. Cameron return -1; 2217e2bea6dfSStephen M. Cameron } 221850a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2219e2bea6dfSStephen M. Cameron return 0; 222033a2ffceSStephen M. Cameron } 222133a2ffceSStephen M. Cameron 222233a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 222333a2ffceSStephen M. Cameron struct CommandList *c) 222433a2ffceSStephen M. Cameron { 222533a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 222633a2ffceSStephen M. Cameron 222750a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 222833a2ffceSStephen M. Cameron return; 222933a2ffceSStephen M. Cameron 223033a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 223150a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 223250a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 223333a2ffceSStephen M. Cameron } 223433a2ffceSStephen M. Cameron 2235a09c1441SScott Teel 2236a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2237a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2238a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2239a09c1441SScott Teel */ 2240a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2241c349775eSScott Teel struct CommandList *c, 2242c349775eSScott Teel struct scsi_cmnd *cmd, 2243ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2244ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2245c349775eSScott Teel { 2246c349775eSScott Teel int data_len; 2247a09c1441SScott Teel int retry = 0; 2248c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2249c349775eSScott Teel 2250c349775eSScott Teel switch (c2->error_data.serv_response) { 2251c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2252c349775eSScott Teel switch (c2->error_data.status) { 2253c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2254c349775eSScott Teel break; 2255c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2256ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2257c349775eSScott Teel if (c2->error_data.data_present != 2258ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2259ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2260ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2261c349775eSScott Teel break; 2262ee6b1889SStephen M. Cameron } 2263c349775eSScott Teel /* copy the sense data */ 2264c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2265c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2266c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2267c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2268c349775eSScott Teel data_len = 2269c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2270c349775eSScott Teel memcpy(cmd->sense_buffer, 2271c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2272a09c1441SScott Teel retry = 1; 2273c349775eSScott Teel break; 2274c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2275a09c1441SScott Teel retry = 1; 2276c349775eSScott Teel break; 2277c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2278a09c1441SScott Teel retry = 1; 2279c349775eSScott Teel break; 2280c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22814a8da22bSStephen Cameron retry = 1; 2282c349775eSScott Teel break; 2283c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2284a09c1441SScott Teel retry = 1; 2285c349775eSScott Teel break; 2286c349775eSScott Teel default: 2287a09c1441SScott Teel retry = 1; 2288c349775eSScott Teel break; 2289c349775eSScott Teel } 2290c349775eSScott Teel break; 2291c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2292c40820d5SJoe Handzik switch (c2->error_data.status) { 2293c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2294c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2295c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2296c40820d5SJoe Handzik retry = 1; 2297c40820d5SJoe Handzik break; 2298c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2299c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2300c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2301c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2302c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2303c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2304c40820d5SJoe Handzik break; 2305c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2306c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2307c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2308ba74fdc4SDon Brace /* 2309ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2310ba74fdc4SDon Brace * get a state change event from the controller but 2311ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2312ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2313ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2314ba74fdc4SDon Brace * of the disk to get the same device node. 2315ba74fdc4SDon Brace */ 2316ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2317ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2318ba74fdc4SDon Brace dev->removed = 1; 2319ba74fdc4SDon Brace h->drv_req_rescan = 1; 2320ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2321ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2322ba74fdc4SDon Brace } else 2323ba74fdc4SDon Brace /* 2324ba74fdc4SDon Brace * Retry by sending down the RAID path. 2325ba74fdc4SDon Brace * We will get an event from ctlr to 2326ba74fdc4SDon Brace * trigger rescan regardless. 2327ba74fdc4SDon Brace */ 2328c40820d5SJoe Handzik retry = 1; 2329c40820d5SJoe Handzik break; 2330c40820d5SJoe Handzik default: 2331c40820d5SJoe Handzik retry = 1; 2332c40820d5SJoe Handzik } 2333c349775eSScott Teel break; 2334c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2335c349775eSScott Teel break; 2336c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2337c349775eSScott Teel break; 2338c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2339a09c1441SScott Teel retry = 1; 2340c349775eSScott Teel break; 2341c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2342c349775eSScott Teel break; 2343c349775eSScott Teel default: 2344a09c1441SScott Teel retry = 1; 2345c349775eSScott Teel break; 2346c349775eSScott Teel } 2347a09c1441SScott Teel 2348a09c1441SScott Teel return retry; /* retry on raid path? */ 2349c349775eSScott Teel } 2350c349775eSScott Teel 2351a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2352a58e7e53SWebb Scales struct CommandList *c) 2353a58e7e53SWebb Scales { 2354d604f533SWebb Scales bool do_wake = false; 2355d604f533SWebb Scales 2356a58e7e53SWebb Scales /* 2357a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2358a58e7e53SWebb Scales * 2359a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2360a58e7e53SWebb Scales * 2. The SCSI command completes 2361a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2362a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2363a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2364a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2365a58e7e53SWebb Scales * Now we have aborted the wrong command. 2366a58e7e53SWebb Scales * 2367d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2368d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2369a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2370a58e7e53SWebb Scales */ 2371a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2372d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2373a58e7e53SWebb Scales if (c->abort_pending) { 2374d604f533SWebb Scales do_wake = true; 2375a58e7e53SWebb Scales c->abort_pending = false; 2376a58e7e53SWebb Scales } 2377d604f533SWebb Scales if (c->reset_pending) { 2378d604f533SWebb Scales unsigned long flags; 2379d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2380d604f533SWebb Scales 2381d604f533SWebb Scales /* 2382d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2383d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2384d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2385d604f533SWebb Scales */ 2386d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2387d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2388d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2389d604f533SWebb Scales do_wake = true; 2390d604f533SWebb Scales c->reset_pending = NULL; 2391d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2392d604f533SWebb Scales } 2393d604f533SWebb Scales 2394d604f533SWebb Scales if (do_wake) 2395d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2396a58e7e53SWebb Scales } 2397a58e7e53SWebb Scales 239873153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 239973153fe5SWebb Scales struct CommandList *c) 240073153fe5SWebb Scales { 240173153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 240273153fe5SWebb Scales cmd_tagged_free(h, c); 240373153fe5SWebb Scales } 240473153fe5SWebb Scales 24058a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24068a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24078a0ff92cSWebb Scales { 240873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2409d49c2077SDon Brace if (cmd && cmd->scsi_done) 24108a0ff92cSWebb Scales cmd->scsi_done(cmd); 24118a0ff92cSWebb Scales } 24128a0ff92cSWebb Scales 24138a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24148a0ff92cSWebb Scales { 24158a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24168a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24178a0ff92cSWebb Scales } 24188a0ff92cSWebb Scales 2419a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2420a58e7e53SWebb Scales { 2421a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2422a58e7e53SWebb Scales } 2423a58e7e53SWebb Scales 2424a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2425a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2426a58e7e53SWebb Scales { 2427a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2428a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2429a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 243073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2431a58e7e53SWebb Scales } 2432a58e7e53SWebb Scales 2433c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2434c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2435c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2436c349775eSScott Teel { 2437c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2438c349775eSScott Teel 2439c349775eSScott Teel /* check for good status */ 2440c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24418a0ff92cSWebb Scales c2->error_data.status == 0)) 24428a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2443c349775eSScott Teel 24448a0ff92cSWebb Scales /* 24458a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2446c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2447c349775eSScott Teel * wrong. 2448c349775eSScott Teel */ 2449f3f01730SKevin Barnett if (is_logical_device(dev) && 2450c349775eSScott Teel c2->error_data.serv_response == 2451c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2452080ef1ccSDon Brace if (c2->error_data.status == 2453064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2454c349775eSScott Teel dev->offload_enabled = 0; 2455064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2456064d1b1dSDon Brace } 24578a0ff92cSWebb Scales 24588a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2459080ef1ccSDon Brace } 2460080ef1ccSDon Brace 2461ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24628a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2463080ef1ccSDon Brace 24648a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2465c349775eSScott Teel } 2466c349775eSScott Teel 24679437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24689437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24699437ac43SStephen Cameron struct CommandList *cp) 24709437ac43SStephen Cameron { 24719437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24729437ac43SStephen Cameron 24739437ac43SStephen Cameron switch (tmf_status) { 24749437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24759437ac43SStephen Cameron /* 24769437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24779437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24789437ac43SStephen Cameron */ 24799437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24809437ac43SStephen Cameron return 0; 24819437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24829437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24839437ac43SStephen Cameron case CISS_TMF_FAILED: 24849437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24859437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24869437ac43SStephen Cameron break; 24879437ac43SStephen Cameron default: 24889437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24899437ac43SStephen Cameron tmf_status); 24909437ac43SStephen Cameron break; 24919437ac43SStephen Cameron } 24929437ac43SStephen Cameron return -tmf_status; 24939437ac43SStephen Cameron } 24949437ac43SStephen Cameron 24951fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2496edd16368SStephen M. Cameron { 2497edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2498edd16368SStephen M. Cameron struct ctlr_info *h; 2499edd16368SStephen M. Cameron struct ErrorInfo *ei; 2500283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2501d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2502edd16368SStephen M. Cameron 25039437ac43SStephen Cameron u8 sense_key; 25049437ac43SStephen Cameron u8 asc; /* additional sense code */ 25059437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2506db111e18SStephen M. Cameron unsigned long sense_data_size; 2507edd16368SStephen M. Cameron 2508edd16368SStephen M. Cameron ei = cp->err_info; 25097fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2510edd16368SStephen M. Cameron h = cp->h; 2511d49c2077SDon Brace 2512d49c2077SDon Brace if (!cmd->device) { 2513d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2514d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2515d49c2077SDon Brace } 2516d49c2077SDon Brace 2517283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 251845e596cdSDon Brace if (!dev) { 251945e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 252045e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 252145e596cdSDon Brace } 2522d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2523edd16368SStephen M. Cameron 2524edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2525e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25262b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 252733a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2528edd16368SStephen M. Cameron 2529d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2530d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2531d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2532d9a729f3SWebb Scales 2533edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2534edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2535c349775eSScott Teel 2536d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2537d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2538d49c2077SDon Brace dev->removed) { 2539d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2540d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2541d49c2077SDon Brace } 2542d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 254303383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2544d49c2077SDon Brace } 254503383736SDon Brace 254625163bd5SWebb Scales /* 254725163bd5SWebb Scales * We check for lockup status here as it may be set for 254825163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 254925163bd5SWebb Scales * fail_all_oustanding_cmds() 255025163bd5SWebb Scales */ 255125163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 255225163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 255325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25548a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 255525163bd5SWebb Scales } 255625163bd5SWebb Scales 2557d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2558d604f533SWebb Scales if (cp->reset_pending) 2559bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2560d604f533SWebb Scales if (cp->abort_pending) 2561d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2562d604f533SWebb Scales } 2563d604f533SWebb Scales 2564c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2565c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2566c349775eSScott Teel 25676aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25688a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25698a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25706aa4c361SRobert Elliott 2571e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2572e1f7de0cSMatt Gates * CISS header used below for error handling. 2573e1f7de0cSMatt Gates */ 2574e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2575e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25762b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25772b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25782b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25792b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 258050a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2581e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2582e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2583283b4a9bSStephen M. Cameron 2584283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2585283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2586283b4a9bSStephen M. Cameron * wrong. 2587283b4a9bSStephen M. Cameron */ 2588f3f01730SKevin Barnett if (is_logical_device(dev)) { 2589283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2590283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25918a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2592283b4a9bSStephen M. Cameron } 2593e1f7de0cSMatt Gates } 2594e1f7de0cSMatt Gates 2595edd16368SStephen M. Cameron /* an error has occurred */ 2596edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2597edd16368SStephen M. Cameron 2598edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25999437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 26009437ac43SStephen Cameron /* copy the sense data */ 26019437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 26029437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 26039437ac43SStephen Cameron else 26049437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26059437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26069437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26079437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26089437ac43SStephen Cameron if (ei->ScsiStatus) 26099437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26109437ac43SStephen Cameron &sense_key, &asc, &ascq); 2611edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 26121d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 26132e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26141d3b3609SMatt Gates break; 26151d3b3609SMatt Gates } 2616edd16368SStephen M. Cameron break; 2617edd16368SStephen M. Cameron } 2618edd16368SStephen M. Cameron /* Problem was not a check condition 2619edd16368SStephen M. Cameron * Pass it up to the upper layers... 2620edd16368SStephen M. Cameron */ 2621edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2622edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2623edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2624edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2625edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2626edd16368SStephen M. Cameron sense_key, asc, ascq, 2627edd16368SStephen M. Cameron cmd->result); 2628edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2629edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2630edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2631edd16368SStephen M. Cameron 2632edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2633edd16368SStephen M. Cameron * but there is a bug in some released firmware 2634edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2635edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2636edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2637edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2638edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2639edd16368SStephen M. Cameron * look like selection timeout since that is 2640edd16368SStephen M. Cameron * the most common reason for this to occur, 2641edd16368SStephen M. Cameron * and it's severe enough. 2642edd16368SStephen M. Cameron */ 2643edd16368SStephen M. Cameron 2644edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2645edd16368SStephen M. Cameron } 2646edd16368SStephen M. Cameron break; 2647edd16368SStephen M. Cameron 2648edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2649edd16368SStephen M. Cameron break; 2650edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2651f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2652f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2653edd16368SStephen M. Cameron break; 2654edd16368SStephen M. Cameron case CMD_INVALID: { 2655edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2656edd16368SStephen M. Cameron print_cmd(cp); */ 2657edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2658edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2659edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2660edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2661edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2662edd16368SStephen M. Cameron * missing target. */ 2663edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2664edd16368SStephen M. Cameron } 2665edd16368SStephen M. Cameron break; 2666edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2667256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2668f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2669f42e81e1SStephen Cameron cp->Request.CDB); 2670edd16368SStephen M. Cameron break; 2671edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2672edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2673f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2674f42e81e1SStephen Cameron cp->Request.CDB); 2675edd16368SStephen M. Cameron break; 2676edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2677edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2678f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2679f42e81e1SStephen Cameron cp->Request.CDB); 2680edd16368SStephen M. Cameron break; 2681edd16368SStephen M. Cameron case CMD_ABORTED: 2682a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2683a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2684edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2685edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2686f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2687f42e81e1SStephen Cameron cp->Request.CDB); 2688edd16368SStephen M. Cameron break; 2689edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2690f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2691f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2692f42e81e1SStephen Cameron cp->Request.CDB); 2693edd16368SStephen M. Cameron break; 2694edd16368SStephen M. Cameron case CMD_TIMEOUT: 2695edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2696f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2697f42e81e1SStephen Cameron cp->Request.CDB); 2698edd16368SStephen M. Cameron break; 26991d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 27001d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 27011d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 27021d5e2ed0SStephen M. Cameron break; 27039437ac43SStephen Cameron case CMD_TMF_STATUS: 27049437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27059437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27069437ac43SStephen Cameron break; 2707283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2708283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2709283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2710283b4a9bSStephen M. Cameron */ 2711283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2712283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2713283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2714283b4a9bSStephen M. Cameron break; 2715edd16368SStephen M. Cameron default: 2716edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2717edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2718edd16368SStephen M. Cameron cp, ei->CommandStatus); 2719edd16368SStephen M. Cameron } 27208a0ff92cSWebb Scales 27218a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2722edd16368SStephen M. Cameron } 2723edd16368SStephen M. Cameron 2724edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2725edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2726edd16368SStephen M. Cameron { 2727edd16368SStephen M. Cameron int i; 2728edd16368SStephen M. Cameron 272950a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 273050a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 273150a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2732edd16368SStephen M. Cameron data_direction); 2733edd16368SStephen M. Cameron } 2734edd16368SStephen M. Cameron 2735a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2736edd16368SStephen M. Cameron struct CommandList *cp, 2737edd16368SStephen M. Cameron unsigned char *buf, 2738edd16368SStephen M. Cameron size_t buflen, 2739edd16368SStephen M. Cameron int data_direction) 2740edd16368SStephen M. Cameron { 274101a02ffcSStephen M. Cameron u64 addr64; 2742edd16368SStephen M. Cameron 2743edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2744edd16368SStephen M. Cameron cp->Header.SGList = 0; 274550a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2746a2dac136SStephen M. Cameron return 0; 2747edd16368SStephen M. Cameron } 2748edd16368SStephen M. Cameron 274950a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2750eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2751a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2752eceaae18SShuah Khan cp->Header.SGList = 0; 275350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2754a2dac136SStephen M. Cameron return -1; 2755eceaae18SShuah Khan } 275650a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 275750a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 275850a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 275950a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 276050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2761a2dac136SStephen M. Cameron return 0; 2762edd16368SStephen M. Cameron } 2763edd16368SStephen M. Cameron 276425163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 276525163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 276625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 276725163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2768edd16368SStephen M. Cameron { 2769edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2770edd16368SStephen M. Cameron 2771edd16368SStephen M. Cameron c->waiting = &wait; 277225163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 277325163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 277425163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 277525163bd5SWebb Scales wait_for_completion_io(&wait); 277625163bd5SWebb Scales return IO_OK; 277725163bd5SWebb Scales } 277825163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 277925163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 278025163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 278125163bd5SWebb Scales return -ETIMEDOUT; 278225163bd5SWebb Scales } 278325163bd5SWebb Scales return IO_OK; 278425163bd5SWebb Scales } 278525163bd5SWebb Scales 278625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 278725163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 278825163bd5SWebb Scales { 278925163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 279025163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 279125163bd5SWebb Scales return IO_OK; 279225163bd5SWebb Scales } 279325163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2794edd16368SStephen M. Cameron } 2795edd16368SStephen M. Cameron 2796094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2797094963daSStephen M. Cameron { 2798094963daSStephen M. Cameron int cpu; 2799094963daSStephen M. Cameron u32 rc, *lockup_detected; 2800094963daSStephen M. Cameron 2801094963daSStephen M. Cameron cpu = get_cpu(); 2802094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2803094963daSStephen M. Cameron rc = *lockup_detected; 2804094963daSStephen M. Cameron put_cpu(); 2805094963daSStephen M. Cameron return rc; 2806094963daSStephen M. Cameron } 2807094963daSStephen M. Cameron 28089c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 280925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 281025163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2811edd16368SStephen M. Cameron { 28129c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 281325163bd5SWebb Scales int rc; 2814edd16368SStephen M. Cameron 2815edd16368SStephen M. Cameron do { 28167630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 281725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 281825163bd5SWebb Scales timeout_msecs); 281925163bd5SWebb Scales if (rc) 282025163bd5SWebb Scales break; 2821edd16368SStephen M. Cameron retry_count++; 28229c2fc160SStephen M. Cameron if (retry_count > 3) { 28239c2fc160SStephen M. Cameron msleep(backoff_time); 28249c2fc160SStephen M. Cameron if (backoff_time < 1000) 28259c2fc160SStephen M. Cameron backoff_time *= 2; 28269c2fc160SStephen M. Cameron } 2827852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28289c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28299c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2830edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 283125163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 283225163bd5SWebb Scales rc = -EIO; 283325163bd5SWebb Scales return rc; 2834edd16368SStephen M. Cameron } 2835edd16368SStephen M. Cameron 2836d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2837d1e8beacSStephen M. Cameron struct CommandList *c) 2838edd16368SStephen M. Cameron { 2839d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2840d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2841edd16368SStephen M. Cameron 2842d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2843d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2844d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2845d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2846d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2847d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2848d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2849d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2850d1e8beacSStephen M. Cameron } 2851d1e8beacSStephen M. Cameron 2852d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2853d1e8beacSStephen M. Cameron struct CommandList *cp) 2854d1e8beacSStephen M. Cameron { 2855d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2856d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28579437ac43SStephen Cameron u8 sense_key, asc, ascq; 28589437ac43SStephen Cameron int sense_len; 2859d1e8beacSStephen M. Cameron 2860edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2861edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28629437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28639437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28649437ac43SStephen Cameron else 28659437ac43SStephen Cameron sense_len = ei->SenseLen; 28669437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28679437ac43SStephen Cameron &sense_key, &asc, &ascq); 2868d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2869d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28709437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28719437ac43SStephen Cameron sense_key, asc, ascq); 2872d1e8beacSStephen M. Cameron else 28739437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2874edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2875edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2876edd16368SStephen M. Cameron "(probably indicates selection timeout " 2877edd16368SStephen M. Cameron "reported incorrectly due to a known " 2878edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2879edd16368SStephen M. Cameron break; 2880edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2881edd16368SStephen M. Cameron break; 2882edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2883d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2884edd16368SStephen M. Cameron break; 2885edd16368SStephen M. Cameron case CMD_INVALID: { 2886edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2887edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2888edd16368SStephen M. Cameron */ 2889d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2890d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2891edd16368SStephen M. Cameron } 2892edd16368SStephen M. Cameron break; 2893edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2894d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2895edd16368SStephen M. Cameron break; 2896edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2897d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2898edd16368SStephen M. Cameron break; 2899edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2900d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2901edd16368SStephen M. Cameron break; 2902edd16368SStephen M. Cameron case CMD_ABORTED: 2903d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2904edd16368SStephen M. Cameron break; 2905edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2906d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2907edd16368SStephen M. Cameron break; 2908edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2909d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2910edd16368SStephen M. Cameron break; 2911edd16368SStephen M. Cameron case CMD_TIMEOUT: 2912d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2913edd16368SStephen M. Cameron break; 29141d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2915d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29161d5e2ed0SStephen M. Cameron break; 291725163bd5SWebb Scales case CMD_CTLR_LOCKUP: 291825163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 291925163bd5SWebb Scales break; 2920edd16368SStephen M. Cameron default: 2921d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2922d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2923edd16368SStephen M. Cameron ei->CommandStatus); 2924edd16368SStephen M. Cameron } 2925edd16368SStephen M. Cameron } 2926edd16368SStephen M. Cameron 2927edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2928b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2929edd16368SStephen M. Cameron unsigned char bufsize) 2930edd16368SStephen M. Cameron { 2931edd16368SStephen M. Cameron int rc = IO_OK; 2932edd16368SStephen M. Cameron struct CommandList *c; 2933edd16368SStephen M. Cameron struct ErrorInfo *ei; 2934edd16368SStephen M. Cameron 293545fcb86eSStephen Cameron c = cmd_alloc(h); 2936edd16368SStephen M. Cameron 2937a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2938a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2939a2dac136SStephen M. Cameron rc = -1; 2940a2dac136SStephen M. Cameron goto out; 2941a2dac136SStephen M. Cameron } 294225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2943c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 294425163bd5SWebb Scales if (rc) 294525163bd5SWebb Scales goto out; 2946edd16368SStephen M. Cameron ei = c->err_info; 2947edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2948d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2949edd16368SStephen M. Cameron rc = -1; 2950edd16368SStephen M. Cameron } 2951a2dac136SStephen M. Cameron out: 295245fcb86eSStephen Cameron cmd_free(h, c); 2953edd16368SStephen M. Cameron return rc; 2954edd16368SStephen M. Cameron } 2955edd16368SStephen M. Cameron 2956bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 295725163bd5SWebb Scales u8 reset_type, int reply_queue) 2958edd16368SStephen M. Cameron { 2959edd16368SStephen M. Cameron int rc = IO_OK; 2960edd16368SStephen M. Cameron struct CommandList *c; 2961edd16368SStephen M. Cameron struct ErrorInfo *ei; 2962edd16368SStephen M. Cameron 296345fcb86eSStephen Cameron c = cmd_alloc(h); 2964edd16368SStephen M. Cameron 2965edd16368SStephen M. Cameron 2966a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29670b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2968bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2969c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 297025163bd5SWebb Scales if (rc) { 297125163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 297225163bd5SWebb Scales goto out; 297325163bd5SWebb Scales } 2974edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2975edd16368SStephen M. Cameron 2976edd16368SStephen M. Cameron ei = c->err_info; 2977edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2978d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2979edd16368SStephen M. Cameron rc = -1; 2980edd16368SStephen M. Cameron } 298125163bd5SWebb Scales out: 298245fcb86eSStephen Cameron cmd_free(h, c); 2983edd16368SStephen M. Cameron return rc; 2984edd16368SStephen M. Cameron } 2985edd16368SStephen M. Cameron 2986d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2987d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2988d604f533SWebb Scales unsigned char *scsi3addr) 2989d604f533SWebb Scales { 2990d604f533SWebb Scales int i; 2991d604f533SWebb Scales bool match = false; 2992d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2993d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2994d604f533SWebb Scales 2995d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2996d604f533SWebb Scales return false; 2997d604f533SWebb Scales 2998d604f533SWebb Scales switch (c->cmd_type) { 2999d604f533SWebb Scales case CMD_SCSI: 3000d604f533SWebb Scales case CMD_IOCTL_PEND: 3001d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3002d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 3003d604f533SWebb Scales break; 3004d604f533SWebb Scales 3005d604f533SWebb Scales case CMD_IOACCEL1: 3006d604f533SWebb Scales case CMD_IOACCEL2: 3007d604f533SWebb Scales if (c->phys_disk == dev) { 3008d604f533SWebb Scales /* HBA mode match */ 3009d604f533SWebb Scales match = true; 3010d604f533SWebb Scales } else { 3011d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3012d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3013d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3014d604f533SWebb Scales * instead. */ 3015d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3016d604f533SWebb Scales /* FIXME: an alternate test might be 3017d604f533SWebb Scales * 3018d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3019d604f533SWebb Scales * == c2->scsi_nexus; */ 3020d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3021d604f533SWebb Scales } 3022d604f533SWebb Scales } 3023d604f533SWebb Scales break; 3024d604f533SWebb Scales 3025d604f533SWebb Scales case IOACCEL2_TMF: 3026d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3027d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3028d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3029d604f533SWebb Scales } 3030d604f533SWebb Scales break; 3031d604f533SWebb Scales 3032d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3033d604f533SWebb Scales match = false; 3034d604f533SWebb Scales break; 3035d604f533SWebb Scales 3036d604f533SWebb Scales default: 3037d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3038d604f533SWebb Scales c->cmd_type); 3039d604f533SWebb Scales BUG(); 3040d604f533SWebb Scales } 3041d604f533SWebb Scales 3042d604f533SWebb Scales return match; 3043d604f533SWebb Scales } 3044d604f533SWebb Scales 3045d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3046d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3047d604f533SWebb Scales { 3048d604f533SWebb Scales int i; 3049d604f533SWebb Scales int rc = 0; 3050d604f533SWebb Scales 3051d604f533SWebb Scales /* We can really only handle one reset at a time */ 3052d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3053d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3054d604f533SWebb Scales return -EINTR; 3055d604f533SWebb Scales } 3056d604f533SWebb Scales 3057d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3058d604f533SWebb Scales 3059d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3060d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3061d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3062d604f533SWebb Scales 3063d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3064d604f533SWebb Scales unsigned long flags; 3065d604f533SWebb Scales 3066d604f533SWebb Scales /* 3067d604f533SWebb Scales * Mark the target command as having a reset pending, 3068d604f533SWebb Scales * then lock a lock so that the command cannot complete 3069d604f533SWebb Scales * while we're considering it. If the command is not 3070d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3071d604f533SWebb Scales */ 3072d604f533SWebb Scales c->reset_pending = dev; 3073d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3074d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3075d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3076d604f533SWebb Scales else 3077d604f533SWebb Scales c->reset_pending = NULL; 3078d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3079d604f533SWebb Scales } 3080d604f533SWebb Scales 3081d604f533SWebb Scales cmd_free(h, c); 3082d604f533SWebb Scales } 3083d604f533SWebb Scales 3084d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3085d604f533SWebb Scales if (!rc) 3086d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3087d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3088d604f533SWebb Scales lockup_detected(h)); 3089d604f533SWebb Scales 3090d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3091d604f533SWebb Scales dev_warn(&h->pdev->dev, 3092d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3093d604f533SWebb Scales rc = -ENODEV; 3094d604f533SWebb Scales } 3095d604f533SWebb Scales 3096d604f533SWebb Scales if (unlikely(rc)) 3097d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3098bfd7546cSDon Brace else 3099bfd7546cSDon Brace wait_for_device_to_become_ready(h, scsi3addr, 0); 3100d604f533SWebb Scales 3101d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3102d604f533SWebb Scales return rc; 3103d604f533SWebb Scales } 3104d604f533SWebb Scales 3105edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3106edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3107edd16368SStephen M. Cameron { 3108edd16368SStephen M. Cameron int rc; 3109edd16368SStephen M. Cameron unsigned char *buf; 3110edd16368SStephen M. Cameron 3111edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3112edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3113edd16368SStephen M. Cameron if (!buf) 3114edd16368SStephen M. Cameron return; 31158383278dSScott Teel 31168383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 31178383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 31188383278dSScott Teel goto exit; 31198383278dSScott Teel 31208383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 31218383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 31228383278dSScott Teel 3123edd16368SStephen M. Cameron if (rc == 0) 3124edd16368SStephen M. Cameron *raid_level = buf[8]; 3125edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3126edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 31278383278dSScott Teel exit: 3128edd16368SStephen M. Cameron kfree(buf); 3129edd16368SStephen M. Cameron return; 3130edd16368SStephen M. Cameron } 3131edd16368SStephen M. Cameron 3132283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3133283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3134283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3135283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3136283b4a9bSStephen M. Cameron { 3137283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3138283b4a9bSStephen M. Cameron int map, row, col; 3139283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3140283b4a9bSStephen M. Cameron 3141283b4a9bSStephen M. Cameron if (rc != 0) 3142283b4a9bSStephen M. Cameron return; 3143283b4a9bSStephen M. Cameron 31442ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31452ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31462ba8bfc8SStephen M. Cameron return; 31472ba8bfc8SStephen M. Cameron 3148283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3149283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3150283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3151283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3152283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3153283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3154283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3155283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3156283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3157283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3158283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3159283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3160283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3161283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3162283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3163283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3164283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3165283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3166283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3167283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3168283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3169283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3170283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3171283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31722b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3173dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31742b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31752b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31762b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3177dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3178dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3179283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3180283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3181283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3182283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3183283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3184283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3185283b4a9bSStephen M. Cameron disks_per_row = 3186283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3187283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3188283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3189283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3190283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3191283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3192283b4a9bSStephen M. Cameron disks_per_row = 3193283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3194283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3195283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3196283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3197283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3198283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3199283b4a9bSStephen M. Cameron } 3200283b4a9bSStephen M. Cameron } 3201283b4a9bSStephen M. Cameron } 3202283b4a9bSStephen M. Cameron #else 3203283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3204283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3205283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3206283b4a9bSStephen M. Cameron { 3207283b4a9bSStephen M. Cameron } 3208283b4a9bSStephen M. Cameron #endif 3209283b4a9bSStephen M. Cameron 3210283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3211283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3212283b4a9bSStephen M. Cameron { 3213283b4a9bSStephen M. Cameron int rc = 0; 3214283b4a9bSStephen M. Cameron struct CommandList *c; 3215283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3216283b4a9bSStephen M. Cameron 321745fcb86eSStephen Cameron c = cmd_alloc(h); 3218bf43caf3SRobert Elliott 3219283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3220283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3221283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 32222dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 32232dd02d74SRobert Elliott cmd_free(h, c); 32242dd02d74SRobert Elliott return -1; 3225283b4a9bSStephen M. Cameron } 322625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3227c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 322825163bd5SWebb Scales if (rc) 322925163bd5SWebb Scales goto out; 3230283b4a9bSStephen M. Cameron ei = c->err_info; 3231283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3232d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 323325163bd5SWebb Scales rc = -1; 323425163bd5SWebb Scales goto out; 3235283b4a9bSStephen M. Cameron } 323645fcb86eSStephen Cameron cmd_free(h, c); 3237283b4a9bSStephen M. Cameron 3238283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3239283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3240283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3241283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3242283b4a9bSStephen M. Cameron rc = -1; 3243283b4a9bSStephen M. Cameron } 3244283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3245283b4a9bSStephen M. Cameron return rc; 324625163bd5SWebb Scales out: 324725163bd5SWebb Scales cmd_free(h, c); 324825163bd5SWebb Scales return rc; 3249283b4a9bSStephen M. Cameron } 3250283b4a9bSStephen M. Cameron 3251d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3252d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3253d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3254d04e62b9SKevin Barnett { 3255d04e62b9SKevin Barnett int rc = IO_OK; 3256d04e62b9SKevin Barnett struct CommandList *c; 3257d04e62b9SKevin Barnett struct ErrorInfo *ei; 3258d04e62b9SKevin Barnett 3259d04e62b9SKevin Barnett c = cmd_alloc(h); 3260d04e62b9SKevin Barnett 3261d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3262d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3263d04e62b9SKevin Barnett if (rc) 3264d04e62b9SKevin Barnett goto out; 3265d04e62b9SKevin Barnett 3266d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3267d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3268d04e62b9SKevin Barnett 3269d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3270c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3271d04e62b9SKevin Barnett if (rc) 3272d04e62b9SKevin Barnett goto out; 3273d04e62b9SKevin Barnett ei = c->err_info; 3274d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3275d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3276d04e62b9SKevin Barnett rc = -1; 3277d04e62b9SKevin Barnett } 3278d04e62b9SKevin Barnett out: 3279d04e62b9SKevin Barnett cmd_free(h, c); 3280d04e62b9SKevin Barnett return rc; 3281d04e62b9SKevin Barnett } 3282d04e62b9SKevin Barnett 328366749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 328466749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 328566749d0dSScott Teel { 328666749d0dSScott Teel int rc = IO_OK; 328766749d0dSScott Teel struct CommandList *c; 328866749d0dSScott Teel struct ErrorInfo *ei; 328966749d0dSScott Teel 329066749d0dSScott Teel c = cmd_alloc(h); 329166749d0dSScott Teel 329266749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 329366749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 329466749d0dSScott Teel if (rc) 329566749d0dSScott Teel goto out; 329666749d0dSScott Teel 329766749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3298c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 329966749d0dSScott Teel if (rc) 330066749d0dSScott Teel goto out; 330166749d0dSScott Teel ei = c->err_info; 330266749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 330366749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 330466749d0dSScott Teel rc = -1; 330566749d0dSScott Teel } 330666749d0dSScott Teel out: 330766749d0dSScott Teel cmd_free(h, c); 330866749d0dSScott Teel return rc; 330966749d0dSScott Teel } 331066749d0dSScott Teel 331103383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 331203383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 331303383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 331403383736SDon Brace { 331503383736SDon Brace int rc = IO_OK; 331603383736SDon Brace struct CommandList *c; 331703383736SDon Brace struct ErrorInfo *ei; 331803383736SDon Brace 331903383736SDon Brace c = cmd_alloc(h); 332003383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 332103383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 332203383736SDon Brace if (rc) 332303383736SDon Brace goto out; 332403383736SDon Brace 332503383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 332603383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 332703383736SDon Brace 332825163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3329c448ecfaSDon Brace DEFAULT_TIMEOUT); 333003383736SDon Brace ei = c->err_info; 333103383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 333203383736SDon Brace hpsa_scsi_interpret_error(h, c); 333303383736SDon Brace rc = -1; 333403383736SDon Brace } 333503383736SDon Brace out: 333603383736SDon Brace cmd_free(h, c); 3337d04e62b9SKevin Barnett 333803383736SDon Brace return rc; 333903383736SDon Brace } 334003383736SDon Brace 3341cca8f13bSDon Brace /* 3342cca8f13bSDon Brace * get enclosure information 3343cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3344cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3345cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3346cca8f13bSDon Brace */ 3347cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3348cca8f13bSDon Brace unsigned char *scsi3addr, 3349cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3350cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3351cca8f13bSDon Brace { 3352cca8f13bSDon Brace int rc = -1; 3353cca8f13bSDon Brace struct CommandList *c = NULL; 3354cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3355cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3356cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3357cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3358cca8f13bSDon Brace u16 bmic_device_index = 0; 3359cca8f13bSDon Brace 3360cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3361cca8f13bSDon Brace 336217a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 336317a9e54aSDon Brace rc = IO_OK; 3364cca8f13bSDon Brace goto out; 336517a9e54aSDon Brace } 3366cca8f13bSDon Brace 3367cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3368cca8f13bSDon Brace if (!bssbp) 3369cca8f13bSDon Brace goto out; 3370cca8f13bSDon Brace 3371cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3372cca8f13bSDon Brace if (!id_phys) 3373cca8f13bSDon Brace goto out; 3374cca8f13bSDon Brace 3375cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3376cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3377cca8f13bSDon Brace if (rc) { 3378cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3379cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3380cca8f13bSDon Brace goto out; 3381cca8f13bSDon Brace } 3382cca8f13bSDon Brace 3383cca8f13bSDon Brace c = cmd_alloc(h); 3384cca8f13bSDon Brace 3385cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3386cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3387cca8f13bSDon Brace 3388cca8f13bSDon Brace if (rc) 3389cca8f13bSDon Brace goto out; 3390cca8f13bSDon Brace 3391cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3392cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3393cca8f13bSDon Brace else 3394cca8f13bSDon Brace c->Request.CDB[5] = 0; 3395cca8f13bSDon Brace 3396cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3397c448ecfaSDon Brace DEFAULT_TIMEOUT); 3398cca8f13bSDon Brace if (rc) 3399cca8f13bSDon Brace goto out; 3400cca8f13bSDon Brace 3401cca8f13bSDon Brace ei = c->err_info; 3402cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3403cca8f13bSDon Brace rc = -1; 3404cca8f13bSDon Brace goto out; 3405cca8f13bSDon Brace } 3406cca8f13bSDon Brace 3407cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3408cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3409cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3410cca8f13bSDon Brace 3411cca8f13bSDon Brace rc = IO_OK; 3412cca8f13bSDon Brace out: 3413cca8f13bSDon Brace kfree(bssbp); 3414cca8f13bSDon Brace kfree(id_phys); 3415cca8f13bSDon Brace 3416cca8f13bSDon Brace if (c) 3417cca8f13bSDon Brace cmd_free(h, c); 3418cca8f13bSDon Brace 3419cca8f13bSDon Brace if (rc != IO_OK) 3420cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3421cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3422cca8f13bSDon Brace } 3423cca8f13bSDon Brace 3424d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3425d04e62b9SKevin Barnett unsigned char *scsi3addr) 3426d04e62b9SKevin Barnett { 3427d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3428d04e62b9SKevin Barnett u32 nphysicals; 3429d04e62b9SKevin Barnett u64 sa = 0; 3430d04e62b9SKevin Barnett int i; 3431d04e62b9SKevin Barnett 3432d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3433d04e62b9SKevin Barnett if (!physdev) 3434d04e62b9SKevin Barnett return 0; 3435d04e62b9SKevin Barnett 3436d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3437d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3438d04e62b9SKevin Barnett kfree(physdev); 3439d04e62b9SKevin Barnett return 0; 3440d04e62b9SKevin Barnett } 3441d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3442d04e62b9SKevin Barnett 3443d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3444d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3445d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3446d04e62b9SKevin Barnett break; 3447d04e62b9SKevin Barnett } 3448d04e62b9SKevin Barnett 3449d04e62b9SKevin Barnett kfree(physdev); 3450d04e62b9SKevin Barnett 3451d04e62b9SKevin Barnett return sa; 3452d04e62b9SKevin Barnett } 3453d04e62b9SKevin Barnett 3454d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3455d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3456d04e62b9SKevin Barnett { 3457d04e62b9SKevin Barnett int rc; 3458d04e62b9SKevin Barnett u64 sa = 0; 3459d04e62b9SKevin Barnett 3460d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3461d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3462d04e62b9SKevin Barnett 3463d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3464d04e62b9SKevin Barnett if (ssi == NULL) { 3465d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3466d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3467d04e62b9SKevin Barnett return; 3468d04e62b9SKevin Barnett } 3469d04e62b9SKevin Barnett 3470d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3471d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3472d04e62b9SKevin Barnett if (rc == 0) { 3473d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3474d04e62b9SKevin Barnett h->sas_address = sa; 3475d04e62b9SKevin Barnett } 3476d04e62b9SKevin Barnett 3477d04e62b9SKevin Barnett kfree(ssi); 3478d04e62b9SKevin Barnett } else 3479d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3480d04e62b9SKevin Barnett 3481d04e62b9SKevin Barnett dev->sas_address = sa; 3482d04e62b9SKevin Barnett } 3483d04e62b9SKevin Barnett 3484d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34858383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34861b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34871b70150aSStephen M. Cameron { 34881b70150aSStephen M. Cameron int rc; 34891b70150aSStephen M. Cameron int i; 34901b70150aSStephen M. Cameron int pages; 34911b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34921b70150aSStephen M. Cameron 34931b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34941b70150aSStephen M. Cameron if (!buf) 34958383278dSScott Teel return false; 34961b70150aSStephen M. Cameron 34971b70150aSStephen M. Cameron /* Get the size of the page list first */ 34981b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34991b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 35001b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 35011b70150aSStephen M. Cameron if (rc != 0) 35021b70150aSStephen M. Cameron goto exit_unsupported; 35031b70150aSStephen M. Cameron pages = buf[3]; 35041b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 35051b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 35061b70150aSStephen M. Cameron else 35071b70150aSStephen M. Cameron bufsize = 255; 35081b70150aSStephen M. Cameron 35091b70150aSStephen M. Cameron /* Get the whole VPD page list */ 35101b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 35111b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 35121b70150aSStephen M. Cameron buf, bufsize); 35131b70150aSStephen M. Cameron if (rc != 0) 35141b70150aSStephen M. Cameron goto exit_unsupported; 35151b70150aSStephen M. Cameron 35161b70150aSStephen M. Cameron pages = buf[3]; 35171b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 35181b70150aSStephen M. Cameron if (buf[3 + i] == page) 35191b70150aSStephen M. Cameron goto exit_supported; 35201b70150aSStephen M. Cameron exit_unsupported: 35211b70150aSStephen M. Cameron kfree(buf); 35228383278dSScott Teel return false; 35231b70150aSStephen M. Cameron exit_supported: 35241b70150aSStephen M. Cameron kfree(buf); 35258383278dSScott Teel return true; 35261b70150aSStephen M. Cameron } 35271b70150aSStephen M. Cameron 3528283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3529283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3530283b4a9bSStephen M. Cameron { 3531283b4a9bSStephen M. Cameron int rc; 3532283b4a9bSStephen M. Cameron unsigned char *buf; 3533283b4a9bSStephen M. Cameron u8 ioaccel_status; 3534283b4a9bSStephen M. Cameron 3535283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3536283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 353741ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3538283b4a9bSStephen M. Cameron 3539283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3540283b4a9bSStephen M. Cameron if (!buf) 3541283b4a9bSStephen M. Cameron return; 35421b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35431b70150aSStephen M. Cameron goto out; 3544283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3545b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3546283b4a9bSStephen M. Cameron if (rc != 0) 3547283b4a9bSStephen M. Cameron goto out; 3548283b4a9bSStephen M. Cameron 3549283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3550283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3551283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3552283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3553283b4a9bSStephen M. Cameron this_device->offload_config = 3554283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3555283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3556283b4a9bSStephen M. Cameron this_device->offload_enabled = 3557283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3558283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3559283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3560283b4a9bSStephen M. Cameron } 356141ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3562283b4a9bSStephen M. Cameron out: 3563283b4a9bSStephen M. Cameron kfree(buf); 3564283b4a9bSStephen M. Cameron return; 3565283b4a9bSStephen M. Cameron } 3566283b4a9bSStephen M. Cameron 3567edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3568edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 356975d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3570edd16368SStephen M. Cameron { 3571edd16368SStephen M. Cameron int rc; 3572edd16368SStephen M. Cameron unsigned char *buf; 3573edd16368SStephen M. Cameron 35748383278dSScott Teel /* Does controller have VPD for device id? */ 35758383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 35768383278dSScott Teel return 1; /* not supported */ 35778383278dSScott Teel 3578edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3579edd16368SStephen M. Cameron if (!buf) 3580a84d794dSStephen M. Cameron return -ENOMEM; 35818383278dSScott Teel 35828383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 35838383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 35848383278dSScott Teel if (rc == 0) { 35858383278dSScott Teel if (buflen > 16) 35868383278dSScott Teel buflen = 16; 35878383278dSScott Teel memcpy(device_id, &buf[8], buflen); 35888383278dSScott Teel } 358975d23d89SDon Brace 3590edd16368SStephen M. Cameron kfree(buf); 359175d23d89SDon Brace 35928383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3593edd16368SStephen M. Cameron } 3594edd16368SStephen M. Cameron 3595edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 359603383736SDon Brace void *buf, int bufsize, 3597edd16368SStephen M. Cameron int extended_response) 3598edd16368SStephen M. Cameron { 3599edd16368SStephen M. Cameron int rc = IO_OK; 3600edd16368SStephen M. Cameron struct CommandList *c; 3601edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3602edd16368SStephen M. Cameron struct ErrorInfo *ei; 3603edd16368SStephen M. Cameron 360445fcb86eSStephen Cameron c = cmd_alloc(h); 3605bf43caf3SRobert Elliott 3606e89c0ae7SStephen M. Cameron /* address the controller */ 3607e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3608a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3609a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3610a2dac136SStephen M. Cameron rc = -1; 3611a2dac136SStephen M. Cameron goto out; 3612a2dac136SStephen M. Cameron } 3613edd16368SStephen M. Cameron if (extended_response) 3614edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 361525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3616c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 361725163bd5SWebb Scales if (rc) 361825163bd5SWebb Scales goto out; 3619edd16368SStephen M. Cameron ei = c->err_info; 3620edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3621edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3622d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3623edd16368SStephen M. Cameron rc = -1; 3624283b4a9bSStephen M. Cameron } else { 362503383736SDon Brace struct ReportLUNdata *rld = buf; 362603383736SDon Brace 362703383736SDon Brace if (rld->extended_response_flag != extended_response) { 3628283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3629283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3630283b4a9bSStephen M. Cameron extended_response, 363103383736SDon Brace rld->extended_response_flag); 3632283b4a9bSStephen M. Cameron rc = -1; 3633283b4a9bSStephen M. Cameron } 3634edd16368SStephen M. Cameron } 3635a2dac136SStephen M. Cameron out: 363645fcb86eSStephen Cameron cmd_free(h, c); 3637edd16368SStephen M. Cameron return rc; 3638edd16368SStephen M. Cameron } 3639edd16368SStephen M. Cameron 3640edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 364103383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3642edd16368SStephen M. Cameron { 364303383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 364403383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3645edd16368SStephen M. Cameron } 3646edd16368SStephen M. Cameron 3647edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3648edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3649edd16368SStephen M. Cameron { 3650edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3651edd16368SStephen M. Cameron } 3652edd16368SStephen M. Cameron 3653edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3654edd16368SStephen M. Cameron int bus, int target, int lun) 3655edd16368SStephen M. Cameron { 3656edd16368SStephen M. Cameron device->bus = bus; 3657edd16368SStephen M. Cameron device->target = target; 3658edd16368SStephen M. Cameron device->lun = lun; 3659edd16368SStephen M. Cameron } 3660edd16368SStephen M. Cameron 36619846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36629846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36639846590eSStephen M. Cameron unsigned char scsi3addr[]) 36649846590eSStephen M. Cameron { 36659846590eSStephen M. Cameron int rc; 36669846590eSStephen M. Cameron int status; 36679846590eSStephen M. Cameron int size; 36689846590eSStephen M. Cameron unsigned char *buf; 36699846590eSStephen M. Cameron 36709846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36719846590eSStephen M. Cameron if (!buf) 36729846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36739846590eSStephen M. Cameron 36749846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 367524a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36769846590eSStephen M. Cameron goto exit_failed; 36779846590eSStephen M. Cameron 36789846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36799846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36809846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 368124a4b078SStephen M. Cameron if (rc != 0) 36829846590eSStephen M. Cameron goto exit_failed; 36839846590eSStephen M. Cameron size = buf[3]; 36849846590eSStephen M. Cameron 36859846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36869846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36879846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 368824a4b078SStephen M. Cameron if (rc != 0) 36899846590eSStephen M. Cameron goto exit_failed; 36909846590eSStephen M. Cameron status = buf[4]; /* status byte */ 36919846590eSStephen M. Cameron 36929846590eSStephen M. Cameron kfree(buf); 36939846590eSStephen M. Cameron return status; 36949846590eSStephen M. Cameron exit_failed: 36959846590eSStephen M. Cameron kfree(buf); 36969846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36979846590eSStephen M. Cameron } 36989846590eSStephen M. Cameron 36999846590eSStephen M. Cameron /* Determine offline status of a volume. 37009846590eSStephen M. Cameron * Return either: 37019846590eSStephen M. Cameron * 0 (not offline) 370267955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 37039846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 37049846590eSStephen M. Cameron * describing why a volume is to be kept offline) 37059846590eSStephen M. Cameron */ 370667955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 37079846590eSStephen M. Cameron unsigned char scsi3addr[]) 37089846590eSStephen M. Cameron { 37099846590eSStephen M. Cameron struct CommandList *c; 37109437ac43SStephen Cameron unsigned char *sense; 37119437ac43SStephen Cameron u8 sense_key, asc, ascq; 37129437ac43SStephen Cameron int sense_len; 371325163bd5SWebb Scales int rc, ldstat = 0; 37149846590eSStephen M. Cameron u16 cmd_status; 37159846590eSStephen M. Cameron u8 scsi_status; 37169846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 37179846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 37189846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 37199846590eSStephen M. Cameron 37209846590eSStephen M. Cameron c = cmd_alloc(h); 3721bf43caf3SRobert Elliott 37229846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3723c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3724c448ecfaSDon Brace DEFAULT_TIMEOUT); 372525163bd5SWebb Scales if (rc) { 372625163bd5SWebb Scales cmd_free(h, c); 372725163bd5SWebb Scales return 0; 372825163bd5SWebb Scales } 37299846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37309437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37319437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37329437ac43SStephen Cameron else 37339437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37349437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37359846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37369846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37379846590eSStephen M. Cameron cmd_free(h, c); 37389846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 37399846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 37409846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 37419846590eSStephen M. Cameron sense_key != NOT_READY || 37429846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 37439846590eSStephen M. Cameron return 0; 37449846590eSStephen M. Cameron } 37459846590eSStephen M. Cameron 37469846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37479846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37489846590eSStephen M. Cameron 37499846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37509846590eSStephen M. Cameron switch (ldstat) { 37519846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37525ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37539846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37549846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37559846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37569846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37579846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37589846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37599846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37609846590eSStephen M. Cameron return ldstat; 37619846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37629846590eSStephen M. Cameron /* If VPD status page isn't available, 37639846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37649846590eSStephen M. Cameron */ 37659846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37669846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37679846590eSStephen M. Cameron return ldstat; 37689846590eSStephen M. Cameron break; 37699846590eSStephen M. Cameron default: 37709846590eSStephen M. Cameron break; 37719846590eSStephen M. Cameron } 37729846590eSStephen M. Cameron return 0; 37739846590eSStephen M. Cameron } 37749846590eSStephen M. Cameron 37759b5c48c2SStephen Cameron /* 37769b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37779b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37789b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37799b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37809b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37819b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37829b5c48c2SStephen Cameron */ 37839b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37849b5c48c2SStephen Cameron unsigned char *scsi3addr) 37859b5c48c2SStephen Cameron { 37869b5c48c2SStephen Cameron struct CommandList *c; 37879b5c48c2SStephen Cameron struct ErrorInfo *ei; 37889b5c48c2SStephen Cameron int rc = 0; 37899b5c48c2SStephen Cameron 37909b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 37919b5c48c2SStephen Cameron 37929b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 37939b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 37949b5c48c2SStephen Cameron return 1; 37959b5c48c2SStephen Cameron 37969b5c48c2SStephen Cameron c = cmd_alloc(h); 3797bf43caf3SRobert Elliott 37989b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3799c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3800c448ecfaSDon Brace DEFAULT_TIMEOUT); 38019b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 38029b5c48c2SStephen Cameron ei = c->err_info; 38039b5c48c2SStephen Cameron switch (ei->CommandStatus) { 38049b5c48c2SStephen Cameron case CMD_INVALID: 38059b5c48c2SStephen Cameron rc = 0; 38069b5c48c2SStephen Cameron break; 38079b5c48c2SStephen Cameron case CMD_UNABORTABLE: 38089b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 38099b5c48c2SStephen Cameron rc = 1; 38109b5c48c2SStephen Cameron break; 38119437ac43SStephen Cameron case CMD_TMF_STATUS: 38129437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 38139437ac43SStephen Cameron break; 38149b5c48c2SStephen Cameron default: 38159b5c48c2SStephen Cameron rc = 0; 38169b5c48c2SStephen Cameron break; 38179b5c48c2SStephen Cameron } 38189b5c48c2SStephen Cameron cmd_free(h, c); 38199b5c48c2SStephen Cameron return rc; 38209b5c48c2SStephen Cameron } 38219b5c48c2SStephen Cameron 3822edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 38230b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 38240b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3825edd16368SStephen M. Cameron { 38260b0e1d6cSStephen M. Cameron 38270b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 38280b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 38290b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 38300b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 38310b0e1d6cSStephen M. Cameron 3832ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 38330b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3834683fc444SDon Brace int rc = 0; 3835edd16368SStephen M. Cameron 3836ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3837683fc444SDon Brace if (!inq_buff) { 3838683fc444SDon Brace rc = -ENOMEM; 3839edd16368SStephen M. Cameron goto bail_out; 3840683fc444SDon Brace } 3841edd16368SStephen M. Cameron 3842edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3843edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3844edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3845edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3846edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3847edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3848683fc444SDon Brace rc = -EIO; 3849edd16368SStephen M. Cameron goto bail_out; 3850edd16368SStephen M. Cameron } 3851edd16368SStephen M. Cameron 38524af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38534af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 385475d23d89SDon Brace 3855edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3856edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3857edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3858edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3859edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3860edd16368SStephen M. Cameron sizeof(this_device->model)); 3861edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3862edd16368SStephen M. Cameron sizeof(this_device->device_id)); 38638383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 38648383278dSScott Teel sizeof(this_device->device_id))) 38658383278dSScott Teel dev_err(&h->pdev->dev, 38668383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 38678383278dSScott Teel h->ctlr, __func__, 38688383278dSScott Teel h->scsi_host->host_no, 38698383278dSScott Teel this_device->target, this_device->lun, 38708383278dSScott Teel scsi_device_type(this_device->devtype), 38718383278dSScott Teel this_device->model); 3872edd16368SStephen M. Cameron 3873af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3874af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3875283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 387667955ba3SStephen M. Cameron int volume_offline; 387767955ba3SStephen M. Cameron 3878edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3879283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3880283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 388167955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 388267955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 388367955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 388467955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3885283b4a9bSStephen M. Cameron } else { 3886edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3887283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3888283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 388941ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3890a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 38919846590eSStephen M. Cameron this_device->volume_offline = 0; 389203383736SDon Brace this_device->queue_depth = h->nr_cmds; 3893283b4a9bSStephen M. Cameron } 3894edd16368SStephen M. Cameron 38950b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 38960b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 38970b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 38980b0e1d6cSStephen M. Cameron */ 38990b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 39000b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 39010b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 39020b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 39030b0e1d6cSStephen M. Cameron } 3904edd16368SStephen M. Cameron kfree(inq_buff); 3905edd16368SStephen M. Cameron return 0; 3906edd16368SStephen M. Cameron 3907edd16368SStephen M. Cameron bail_out: 3908edd16368SStephen M. Cameron kfree(inq_buff); 3909683fc444SDon Brace return rc; 3910edd16368SStephen M. Cameron } 3911edd16368SStephen M. Cameron 39129b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 39139b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 39149b5c48c2SStephen Cameron { 39159b5c48c2SStephen Cameron unsigned long flags; 39169b5c48c2SStephen Cameron int rc, entry; 39179b5c48c2SStephen Cameron /* 39189b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 39199b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 39209b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 39219b5c48c2SStephen Cameron */ 39229b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 39239b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 39249b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 39259b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 39269b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 39279b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39289b5c48c2SStephen Cameron } else { 39299b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39309b5c48c2SStephen Cameron dev->supports_aborts = 39319b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 39329b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 39339b5c48c2SStephen Cameron dev->supports_aborts = 0; 39349b5c48c2SStephen Cameron } 39359b5c48c2SStephen Cameron } 39369b5c48c2SStephen Cameron 3937c795505aSKevin Barnett /* 3938c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3939edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3940edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3941edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3942edd16368SStephen M. Cameron */ 3943edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 39441f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3945edd16368SStephen M. Cameron { 3946c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3947edd16368SStephen M. Cameron 39481f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 39491f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 39501f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3951c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3952c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 39531f310bdeSStephen M. Cameron else 39541f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3955c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3956c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 39571f310bdeSStephen M. Cameron return; 39581f310bdeSStephen M. Cameron } 39591f310bdeSStephen M. Cameron /* It's a logical device */ 396066749d0dSScott Teel if (device->external) { 39611f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3962c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3963c795505aSKevin Barnett lunid & 0x00ff); 39641f310bdeSStephen M. Cameron return; 3965339b2b14SStephen M. Cameron } 3966c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3967c795505aSKevin Barnett 0, lunid & 0x3fff); 3968edd16368SStephen M. Cameron } 3969edd16368SStephen M. Cameron 3970edd16368SStephen M. Cameron 3971edd16368SStephen M. Cameron /* 397254b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 397354b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 397454b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 397554b6e9e9SScott Teel * 3. Return: 397654b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 397754b6e9e9SScott Teel * 0 if no matching physical disk was found. 397854b6e9e9SScott Teel */ 397954b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 398054b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 398154b6e9e9SScott Teel { 398241ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 398341ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 398441ce4c35SStephen Cameron unsigned long flags; 398554b6e9e9SScott Teel int i; 398654b6e9e9SScott Teel 398741ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 398841ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 398941ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 399041ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 399141ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 399241ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 399354b6e9e9SScott Teel return 1; 399454b6e9e9SScott Teel } 399541ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 399641ce4c35SStephen Cameron return 0; 399741ce4c35SStephen Cameron } 399841ce4c35SStephen Cameron 399966749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 400066749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 400166749d0dSScott Teel { 400266749d0dSScott Teel /* In report logicals, local logicals are listed first, 400366749d0dSScott Teel * then any externals. 400466749d0dSScott Teel */ 400566749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 400666749d0dSScott Teel 400766749d0dSScott Teel if (i == raid_ctlr_position) 400866749d0dSScott Teel return 0; 400966749d0dSScott Teel 401066749d0dSScott Teel if (i < logicals_start) 401166749d0dSScott Teel return 0; 401266749d0dSScott Teel 401366749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 401466749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 401566749d0dSScott Teel return 0; 401666749d0dSScott Teel 401766749d0dSScott Teel return 1; /* it's an external lun */ 401866749d0dSScott Teel } 401966749d0dSScott Teel 402054b6e9e9SScott Teel /* 4021edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4022edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4023edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4024edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4025edd16368SStephen M. Cameron */ 4026edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 402703383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 402801a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4029edd16368SStephen M. Cameron { 403003383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4031edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4032edd16368SStephen M. Cameron return -1; 4033edd16368SStephen M. Cameron } 403403383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4035edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 403603383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 403703383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4038edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4039edd16368SStephen M. Cameron } 404003383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4041edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4042edd16368SStephen M. Cameron return -1; 4043edd16368SStephen M. Cameron } 40446df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4045edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4046edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4047edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4048edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4049edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4050edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4051edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4052edd16368SStephen M. Cameron } 4053edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4054edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4055edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4056edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4057edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4058edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4059edd16368SStephen M. Cameron } 4060edd16368SStephen M. Cameron return 0; 4061edd16368SStephen M. Cameron } 4062edd16368SStephen M. Cameron 406342a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 406442a91641SDon Brace int i, int nphysicals, int nlogicals, 4065a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4066339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4067339b2b14SStephen M. Cameron { 4068339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4069339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4070339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4071339b2b14SStephen M. Cameron */ 4072339b2b14SStephen M. Cameron 4073339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4074339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4075339b2b14SStephen M. Cameron 4076339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4077339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4078339b2b14SStephen M. Cameron 4079339b2b14SStephen M. Cameron if (i < logicals_start) 4080d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4081d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4082339b2b14SStephen M. Cameron 4083339b2b14SStephen M. Cameron if (i < last_device) 4084339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4085339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4086339b2b14SStephen M. Cameron BUG(); 4087339b2b14SStephen M. Cameron return NULL; 4088339b2b14SStephen M. Cameron } 4089339b2b14SStephen M. Cameron 409003383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 409103383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 409203383736SDon Brace struct hpsa_scsi_dev_t *dev, 4093f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 409403383736SDon Brace struct bmic_identify_physical_device *id_phys) 409503383736SDon Brace { 409603383736SDon Brace int rc; 40974b6e5597SScott Teel struct ext_report_lun_entry *rle; 40984b6e5597SScott Teel 40994b6e5597SScott Teel /* 41004b6e5597SScott Teel * external targets don't support BMIC 41014b6e5597SScott Teel */ 41024b6e5597SScott Teel if (dev->external) { 41034b6e5597SScott Teel dev->queue_depth = 7; 41044b6e5597SScott Teel return; 41054b6e5597SScott Teel } 41064b6e5597SScott Teel 41074b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 410803383736SDon Brace 410903383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4110f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4111a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 411203383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4113f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4114f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 411503383736SDon Brace sizeof(*id_phys)); 411603383736SDon Brace if (!rc) 411703383736SDon Brace /* Reserve space for FW operations */ 411803383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 411903383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 412003383736SDon Brace dev->queue_depth = 412103383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 412203383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 412303383736SDon Brace else 412403383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 412503383736SDon Brace } 412603383736SDon Brace 41278270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4128f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41298270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41308270b862SJoe Handzik { 4131f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4132f2039b03SDon Brace 4133f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41348270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41358270b862SJoe Handzik 41368270b862SJoe Handzik memcpy(&this_device->active_path_index, 41378270b862SJoe Handzik &id_phys->active_path_number, 41388270b862SJoe Handzik sizeof(this_device->active_path_index)); 41398270b862SJoe Handzik memcpy(&this_device->path_map, 41408270b862SJoe Handzik &id_phys->redundant_path_present_map, 41418270b862SJoe Handzik sizeof(this_device->path_map)); 41428270b862SJoe Handzik memcpy(&this_device->box, 41438270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 41448270b862SJoe Handzik sizeof(this_device->box)); 41458270b862SJoe Handzik memcpy(&this_device->phys_connector, 41468270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 41478270b862SJoe Handzik sizeof(this_device->phys_connector)); 41488270b862SJoe Handzik memcpy(&this_device->bay, 41498270b862SJoe Handzik &id_phys->phys_bay_in_box, 41508270b862SJoe Handzik sizeof(this_device->bay)); 41518270b862SJoe Handzik } 41528270b862SJoe Handzik 415366749d0dSScott Teel /* get number of local logical disks. */ 415466749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 415566749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 415666749d0dSScott Teel u32 *nlocals) 415766749d0dSScott Teel { 415866749d0dSScott Teel int rc; 415966749d0dSScott Teel 416066749d0dSScott Teel if (!id_ctlr) { 416166749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 416266749d0dSScott Teel __func__); 416366749d0dSScott Teel return -ENOMEM; 416466749d0dSScott Teel } 416566749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 416666749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 416766749d0dSScott Teel if (!rc) 416866749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 416966749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 417066749d0dSScott Teel else 417166749d0dSScott Teel *nlocals = le16_to_cpu( 417266749d0dSScott Teel id_ctlr->extended_logical_unit_count); 417366749d0dSScott Teel else 417466749d0dSScott Teel *nlocals = -1; 417566749d0dSScott Teel return rc; 417666749d0dSScott Teel } 417766749d0dSScott Teel 417864ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 417964ce60caSDon Brace { 418064ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 418164ce60caSDon Brace bool is_spare = false; 418264ce60caSDon Brace int rc; 418364ce60caSDon Brace 418464ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 418564ce60caSDon Brace if (!id_phys) 418664ce60caSDon Brace return false; 418764ce60caSDon Brace 418864ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 418964ce60caSDon Brace lunaddrbytes, 419064ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 419164ce60caSDon Brace id_phys, sizeof(*id_phys)); 419264ce60caSDon Brace if (rc == 0) 419364ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 419464ce60caSDon Brace 419564ce60caSDon Brace kfree(id_phys); 419664ce60caSDon Brace return is_spare; 419764ce60caSDon Brace } 419864ce60caSDon Brace 419964ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 420064ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 420164ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 420264ce60caSDon Brace 420364ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 420464ce60caSDon Brace 420564ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 420664ce60caSDon Brace struct ext_report_lun_entry *rle) 420764ce60caSDon Brace { 420864ce60caSDon Brace u8 device_flags; 420964ce60caSDon Brace u8 device_type; 421064ce60caSDon Brace 421164ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 421264ce60caSDon Brace return false; 421364ce60caSDon Brace 421464ce60caSDon Brace device_flags = rle->device_flags; 421564ce60caSDon Brace device_type = rle->device_type; 421664ce60caSDon Brace 421764ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 421864ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 421964ce60caSDon Brace return false; 422064ce60caSDon Brace return true; 422164ce60caSDon Brace } 422264ce60caSDon Brace 422364ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 422464ce60caSDon Brace return false; 422564ce60caSDon Brace 422664ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 422764ce60caSDon Brace return false; 422864ce60caSDon Brace 422964ce60caSDon Brace /* 423064ce60caSDon Brace * Spares may be spun down, we do not want to 423164ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 423264ce60caSDon Brace * that would have them spun up, that is a 423364ce60caSDon Brace * performance hit because I/O to the RAID device 423464ce60caSDon Brace * stops while the spin up occurs which can take 423564ce60caSDon Brace * over 50 seconds. 423664ce60caSDon Brace */ 423764ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 423864ce60caSDon Brace return true; 423964ce60caSDon Brace 424064ce60caSDon Brace return false; 424164ce60caSDon Brace } 424266749d0dSScott Teel 42438aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4244edd16368SStephen M. Cameron { 4245edd16368SStephen M. Cameron /* the idea here is we could get notified 4246edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4247edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4248edd16368SStephen M. Cameron * our list of devices accordingly. 4249edd16368SStephen M. Cameron * 4250edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4251edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4252edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4253edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4254edd16368SStephen M. Cameron */ 4255a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4256edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 425703383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 425866749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 425901a02ffcSStephen M. Cameron u32 nphysicals = 0; 426001a02ffcSStephen M. Cameron u32 nlogicals = 0; 426166749d0dSScott Teel u32 nlocal_logicals = 0; 426201a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4263edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4264edd16368SStephen M. Cameron int ncurrent = 0; 42654f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4266339b2b14SStephen M. Cameron int raid_ctlr_position; 426704fa2f44SKevin Barnett bool physical_device; 4268aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4269edd16368SStephen M. Cameron 4270cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 427192084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 427292084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4273edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 427403383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 427566749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4276edd16368SStephen M. Cameron 427703383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 427866749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4279edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4280edd16368SStephen M. Cameron goto out; 4281edd16368SStephen M. Cameron } 4282edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4283edd16368SStephen M. Cameron 4284853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4285853633e8SDon Brace 428603383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4287853633e8SDon Brace logdev_list, &nlogicals)) { 4288853633e8SDon Brace h->drv_req_rescan = 1; 4289edd16368SStephen M. Cameron goto out; 4290853633e8SDon Brace } 4291edd16368SStephen M. Cameron 429266749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 429366749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 429466749d0dSScott Teel dev_warn(&h->pdev->dev, 429566749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 429666749d0dSScott Teel __func__); 429766749d0dSScott Teel } 4298edd16368SStephen M. Cameron 4299aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4300aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4301aca4a520SScott Teel * controller. 4302edd16368SStephen M. Cameron */ 4303aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4304edd16368SStephen M. Cameron 4305edd16368SStephen M. Cameron /* Allocate the per device structures */ 4306edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4307b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4308b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4309b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4310b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4311b7ec021fSScott Teel break; 4312b7ec021fSScott Teel } 4313b7ec021fSScott Teel 4314edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4315edd16368SStephen M. Cameron if (!currentsd[i]) { 4316edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4317edd16368SStephen M. Cameron __FILE__, __LINE__); 4318853633e8SDon Brace h->drv_req_rescan = 1; 4319edd16368SStephen M. Cameron goto out; 4320edd16368SStephen M. Cameron } 4321edd16368SStephen M. Cameron ndev_allocated++; 4322edd16368SStephen M. Cameron } 4323edd16368SStephen M. Cameron 43248645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4325339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4326339b2b14SStephen M. Cameron else 4327339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4328339b2b14SStephen M. Cameron 4329edd16368SStephen M. Cameron /* adjust our table of devices */ 43304f4eb9f1SScott Teel n_ext_target_devs = 0; 4331edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43320b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4333683fc444SDon Brace int rc = 0; 4334f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 433564ce60caSDon Brace bool skip_device = false; 4336edd16368SStephen M. Cameron 433704fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4338edd16368SStephen M. Cameron 4339edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4340339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4341339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 434241ce4c35SStephen Cameron 434386cf7130SDon Brace /* Determine if this is a lun from an external target array */ 434486cf7130SDon Brace tmpdevice->external = 434586cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 434686cf7130SDon Brace nphysicals, nlocal_logicals); 434786cf7130SDon Brace 434864ce60caSDon Brace /* 434964ce60caSDon Brace * Skip over some devices such as a spare. 435064ce60caSDon Brace */ 435164ce60caSDon Brace if (!tmpdevice->external && physical_device) { 435264ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 435364ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 435464ce60caSDon Brace if (skip_device) 4355edd16368SStephen M. Cameron continue; 435664ce60caSDon Brace } 4357edd16368SStephen M. Cameron 4358edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4359683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4360683fc444SDon Brace &is_OBDR); 4361683fc444SDon Brace if (rc == -ENOMEM) { 4362683fc444SDon Brace dev_warn(&h->pdev->dev, 4363683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4364853633e8SDon Brace h->drv_req_rescan = 1; 4365683fc444SDon Brace goto out; 4366853633e8SDon Brace } 4367683fc444SDon Brace if (rc) { 4368683fc444SDon Brace dev_warn(&h->pdev->dev, 4369683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4370683fc444SDon Brace continue; 4371683fc444SDon Brace } 4372683fc444SDon Brace 43731f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43749b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4375edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4376edd16368SStephen M. Cameron 437734592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 437834592254SScott Teel * Event-based change notification is unreliable for those. 4379edd16368SStephen M. Cameron */ 438034592254SScott Teel if (!h->discovery_polling) { 438134592254SScott Teel if (tmpdevice->external) { 438234592254SScott Teel h->discovery_polling = 1; 438334592254SScott Teel dev_info(&h->pdev->dev, 438434592254SScott Teel "External target, activate discovery polling.\n"); 4385edd16368SStephen M. Cameron } 438634592254SScott Teel } 438734592254SScott Teel 4388edd16368SStephen M. Cameron 4389edd16368SStephen M. Cameron *this_device = *tmpdevice; 439004fa2f44SKevin Barnett this_device->physical_device = physical_device; 4391edd16368SStephen M. Cameron 439204fa2f44SKevin Barnett /* 439304fa2f44SKevin Barnett * Expose all devices except for physical devices that 439404fa2f44SKevin Barnett * are masked. 439504fa2f44SKevin Barnett */ 439604fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 43972a168208SKevin Barnett this_device->expose_device = 0; 43982a168208SKevin Barnett else 43992a168208SKevin Barnett this_device->expose_device = 1; 440041ce4c35SStephen Cameron 4401d04e62b9SKevin Barnett 4402d04e62b9SKevin Barnett /* 4403d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4404d04e62b9SKevin Barnett */ 4405d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4406d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4407edd16368SStephen M. Cameron 4408edd16368SStephen M. Cameron switch (this_device->devtype) { 44090b0e1d6cSStephen M. Cameron case TYPE_ROM: 4410edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4411edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4412edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4413edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4414edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4415edd16368SStephen M. Cameron * the inquiry data. 4416edd16368SStephen M. Cameron */ 44170b0e1d6cSStephen M. Cameron if (is_OBDR) 4418edd16368SStephen M. Cameron ncurrent++; 4419edd16368SStephen M. Cameron break; 4420edd16368SStephen M. Cameron case TYPE_DISK: 4421af15ed36SDon Brace case TYPE_ZBC: 442204fa2f44SKevin Barnett if (this_device->physical_device) { 4423b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4424b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4425ecf418d1SJoe Handzik this_device->offload_enabled = 0; 442603383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4427f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4428f2039b03SDon Brace hpsa_get_path_info(this_device, 4429f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4430b9092b79SKevin Barnett } 4431edd16368SStephen M. Cameron ncurrent++; 4432edd16368SStephen M. Cameron break; 4433edd16368SStephen M. Cameron case TYPE_TAPE: 4434edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4435cca8f13bSDon Brace ncurrent++; 4436cca8f13bSDon Brace break; 443741ce4c35SStephen Cameron case TYPE_ENCLOSURE: 443817a9e54aSDon Brace if (!this_device->external) 4439cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4440cca8f13bSDon Brace physdev_list, phys_dev_index, 4441cca8f13bSDon Brace this_device); 444241ce4c35SStephen Cameron ncurrent++; 444341ce4c35SStephen Cameron break; 4444edd16368SStephen M. Cameron case TYPE_RAID: 4445edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4446edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4447edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4448edd16368SStephen M. Cameron * don't present it. 4449edd16368SStephen M. Cameron */ 4450edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4451edd16368SStephen M. Cameron break; 4452edd16368SStephen M. Cameron ncurrent++; 4453edd16368SStephen M. Cameron break; 4454edd16368SStephen M. Cameron default: 4455edd16368SStephen M. Cameron break; 4456edd16368SStephen M. Cameron } 4457cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4458edd16368SStephen M. Cameron break; 4459edd16368SStephen M. Cameron } 4460d04e62b9SKevin Barnett 4461d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4462d04e62b9SKevin Barnett int rc = 0; 4463d04e62b9SKevin Barnett 4464d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4465d04e62b9SKevin Barnett if (rc) { 4466d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4467d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4468d04e62b9SKevin Barnett goto out; 4469d04e62b9SKevin Barnett } 4470d04e62b9SKevin Barnett } 4471d04e62b9SKevin Barnett 44728aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4473edd16368SStephen M. Cameron out: 4474edd16368SStephen M. Cameron kfree(tmpdevice); 4475edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4476edd16368SStephen M. Cameron kfree(currentsd[i]); 4477edd16368SStephen M. Cameron kfree(currentsd); 4478edd16368SStephen M. Cameron kfree(physdev_list); 4479edd16368SStephen M. Cameron kfree(logdev_list); 448066749d0dSScott Teel kfree(id_ctlr); 448103383736SDon Brace kfree(id_phys); 4482edd16368SStephen M. Cameron } 4483edd16368SStephen M. Cameron 4484ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4485ec5cbf04SWebb Scales struct scatterlist *sg) 4486ec5cbf04SWebb Scales { 4487ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4488ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4489ec5cbf04SWebb Scales 4490ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4491ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4492ec5cbf04SWebb Scales desc->Ext = 0; 4493ec5cbf04SWebb Scales } 4494ec5cbf04SWebb Scales 4495c7ee65b3SWebb Scales /* 4496c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4497edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4498edd16368SStephen M. Cameron * hpsa command, cp. 4499edd16368SStephen M. Cameron */ 450033a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4501edd16368SStephen M. Cameron struct CommandList *cp, 4502edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4503edd16368SStephen M. Cameron { 4504edd16368SStephen M. Cameron struct scatterlist *sg; 4505b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 450633a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4507edd16368SStephen M. Cameron 450833a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4509edd16368SStephen M. Cameron 4510edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4511edd16368SStephen M. Cameron if (use_sg < 0) 4512edd16368SStephen M. Cameron return use_sg; 4513edd16368SStephen M. Cameron 4514edd16368SStephen M. Cameron if (!use_sg) 4515edd16368SStephen M. Cameron goto sglist_finished; 4516edd16368SStephen M. Cameron 4517b3a7ba7cSWebb Scales /* 4518b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4519b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4520b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4521b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4522b3a7ba7cSWebb Scales * the entries in the one list. 4523b3a7ba7cSWebb Scales */ 452433a2ffceSStephen M. Cameron curr_sg = cp->SG; 4525b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4526b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4527b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4528b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4529ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 453033a2ffceSStephen M. Cameron curr_sg++; 453133a2ffceSStephen M. Cameron } 4532ec5cbf04SWebb Scales 4533b3a7ba7cSWebb Scales if (chained) { 4534b3a7ba7cSWebb Scales /* 4535b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4536b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4537b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4538b3a7ba7cSWebb Scales * where the previous loop left off. 4539b3a7ba7cSWebb Scales */ 4540b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4541b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4542b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4543b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4544b3a7ba7cSWebb Scales curr_sg++; 4545b3a7ba7cSWebb Scales } 4546b3a7ba7cSWebb Scales } 4547b3a7ba7cSWebb Scales 4548ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4549b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 455033a2ffceSStephen M. Cameron 455133a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 455233a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 455333a2ffceSStephen M. Cameron 455433a2ffceSStephen M. Cameron if (chained) { 455533a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 455650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4557e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4558e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4559e2bea6dfSStephen M. Cameron return -1; 4560e2bea6dfSStephen M. Cameron } 456133a2ffceSStephen M. Cameron return 0; 4562edd16368SStephen M. Cameron } 4563edd16368SStephen M. Cameron 4564edd16368SStephen M. Cameron sglist_finished: 4565edd16368SStephen M. Cameron 456601a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4567c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4568edd16368SStephen M. Cameron return 0; 4569edd16368SStephen M. Cameron } 4570edd16368SStephen M. Cameron 4571283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4572283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4573283b4a9bSStephen M. Cameron { 4574283b4a9bSStephen M. Cameron int is_write = 0; 4575283b4a9bSStephen M. Cameron u32 block; 4576283b4a9bSStephen M. Cameron u32 block_cnt; 4577283b4a9bSStephen M. Cameron 4578283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4579283b4a9bSStephen M. Cameron switch (cdb[0]) { 4580283b4a9bSStephen M. Cameron case WRITE_6: 4581283b4a9bSStephen M. Cameron case WRITE_12: 4582283b4a9bSStephen M. Cameron is_write = 1; 4583283b4a9bSStephen M. Cameron case READ_6: 4584283b4a9bSStephen M. Cameron case READ_12: 4585283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4586abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4587abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4588abbada71SMahesh Rajashekhara cdb[3]); 4589283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4590c8a6c9a6SDon Brace if (block_cnt == 0) 4591c8a6c9a6SDon Brace block_cnt = 256; 4592283b4a9bSStephen M. Cameron } else { 4593283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4594c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4595c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4596283b4a9bSStephen M. Cameron } 4597283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4598283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4599283b4a9bSStephen M. Cameron 4600283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4601283b4a9bSStephen M. Cameron cdb[1] = 0; 4602283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4603283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4604283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4605283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4606283b4a9bSStephen M. Cameron cdb[6] = 0; 4607283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4608283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4609283b4a9bSStephen M. Cameron cdb[9] = 0; 4610283b4a9bSStephen M. Cameron *cdb_len = 10; 4611283b4a9bSStephen M. Cameron break; 4612283b4a9bSStephen M. Cameron } 4613283b4a9bSStephen M. Cameron return 0; 4614283b4a9bSStephen M. Cameron } 4615283b4a9bSStephen M. Cameron 4616c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4617283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 461803383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4619e1f7de0cSMatt Gates { 4620e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4621e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4622e1f7de0cSMatt Gates unsigned int len; 4623e1f7de0cSMatt Gates unsigned int total_len = 0; 4624e1f7de0cSMatt Gates struct scatterlist *sg; 4625e1f7de0cSMatt Gates u64 addr64; 4626e1f7de0cSMatt Gates int use_sg, i; 4627e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4628e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4629e1f7de0cSMatt Gates 4630283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 463103383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 463203383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4633283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 463403383736SDon Brace } 4635283b4a9bSStephen M. Cameron 4636e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4637e1f7de0cSMatt Gates 463803383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 463903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4640283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 464103383736SDon Brace } 4642283b4a9bSStephen M. Cameron 4643e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4644e1f7de0cSMatt Gates 4645e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4646e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4647e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4648e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4649e1f7de0cSMatt Gates 4650e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 465103383736SDon Brace if (use_sg < 0) { 465203383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4653e1f7de0cSMatt Gates return use_sg; 465403383736SDon Brace } 4655e1f7de0cSMatt Gates 4656e1f7de0cSMatt Gates if (use_sg) { 4657e1f7de0cSMatt Gates curr_sg = cp->SG; 4658e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4659e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4660e1f7de0cSMatt Gates len = sg_dma_len(sg); 4661e1f7de0cSMatt Gates total_len += len; 466250a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 466350a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 466450a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4665e1f7de0cSMatt Gates curr_sg++; 4666e1f7de0cSMatt Gates } 466750a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4668e1f7de0cSMatt Gates 4669e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4670e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4671e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4672e1f7de0cSMatt Gates break; 4673e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4674e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4675e1f7de0cSMatt Gates break; 4676e1f7de0cSMatt Gates case DMA_NONE: 4677e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4678e1f7de0cSMatt Gates break; 4679e1f7de0cSMatt Gates default: 4680e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4681e1f7de0cSMatt Gates cmd->sc_data_direction); 4682e1f7de0cSMatt Gates BUG(); 4683e1f7de0cSMatt Gates break; 4684e1f7de0cSMatt Gates } 4685e1f7de0cSMatt Gates } else { 4686e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4687e1f7de0cSMatt Gates } 4688e1f7de0cSMatt Gates 4689c349775eSScott Teel c->Header.SGList = use_sg; 4690e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 46912b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 46922b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 46932b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 46942b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 46952b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4696283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4697283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4698c349775eSScott Teel /* Tag was already set at init time. */ 4699e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4700e1f7de0cSMatt Gates return 0; 4701e1f7de0cSMatt Gates } 4702edd16368SStephen M. Cameron 4703283b4a9bSStephen M. Cameron /* 4704283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4705283b4a9bSStephen M. Cameron * I/O accelerator path. 4706283b4a9bSStephen M. Cameron */ 4707283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4708283b4a9bSStephen M. Cameron struct CommandList *c) 4709283b4a9bSStephen M. Cameron { 4710283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4711283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4712283b4a9bSStephen M. Cameron 471345e596cdSDon Brace if (!dev) 471445e596cdSDon Brace return -1; 471545e596cdSDon Brace 471603383736SDon Brace c->phys_disk = dev; 471703383736SDon Brace 4718283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 471903383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4720283b4a9bSStephen M. Cameron } 4721283b4a9bSStephen M. Cameron 4722dd0e19f3SScott Teel /* 4723dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4724dd0e19f3SScott Teel */ 4725dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4726dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4727dd0e19f3SScott Teel { 4728dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4729dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4730dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4731dd0e19f3SScott Teel u64 first_block; 4732dd0e19f3SScott Teel 4733dd0e19f3SScott Teel /* Are we doing encryption on this device */ 47342b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4735dd0e19f3SScott Teel return; 4736dd0e19f3SScott Teel /* Set the data encryption key index. */ 4737dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4738dd0e19f3SScott Teel 4739dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4740dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4741dd0e19f3SScott Teel 4742dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4743dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4744dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4745dd0e19f3SScott Teel */ 4746dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4747dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4748dd0e19f3SScott Teel case READ_6: 4749abbada71SMahesh Rajashekhara case WRITE_6: 4750abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4751abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4752abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4753dd0e19f3SScott Teel break; 4754dd0e19f3SScott Teel case WRITE_10: 4755dd0e19f3SScott Teel case READ_10: 4756dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4757dd0e19f3SScott Teel case WRITE_12: 4758dd0e19f3SScott Teel case READ_12: 47592b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4760dd0e19f3SScott Teel break; 4761dd0e19f3SScott Teel case WRITE_16: 4762dd0e19f3SScott Teel case READ_16: 47632b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4764dd0e19f3SScott Teel break; 4765dd0e19f3SScott Teel default: 4766dd0e19f3SScott Teel dev_err(&h->pdev->dev, 47672b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 47682b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4769dd0e19f3SScott Teel BUG(); 4770dd0e19f3SScott Teel break; 4771dd0e19f3SScott Teel } 47722b08b3e9SDon Brace 47732b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47742b08b3e9SDon Brace first_block = first_block * 47752b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47762b08b3e9SDon Brace 47772b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47782b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4779dd0e19f3SScott Teel } 4780dd0e19f3SScott Teel 4781c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4782c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 478303383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4784c349775eSScott Teel { 4785c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4786c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4787c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4788c349775eSScott Teel int use_sg, i; 4789c349775eSScott Teel struct scatterlist *sg; 4790c349775eSScott Teel u64 addr64; 4791c349775eSScott Teel u32 len; 4792c349775eSScott Teel u32 total_len = 0; 4793c349775eSScott Teel 479445e596cdSDon Brace if (!cmd->device) 479545e596cdSDon Brace return -1; 479645e596cdSDon Brace 479745e596cdSDon Brace if (!cmd->device->hostdata) 479845e596cdSDon Brace return -1; 479945e596cdSDon Brace 4800d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4801c349775eSScott Teel 480203383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 480303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4804c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 480503383736SDon Brace } 480603383736SDon Brace 4807c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4808c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4809c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4810c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4811c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4812c349775eSScott Teel 4813c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4814c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4815c349775eSScott Teel 4816c349775eSScott Teel use_sg = scsi_dma_map(cmd); 481703383736SDon Brace if (use_sg < 0) { 481803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4819c349775eSScott Teel return use_sg; 482003383736SDon Brace } 4821c349775eSScott Teel 4822c349775eSScott Teel if (use_sg) { 4823c349775eSScott Teel curr_sg = cp->sg; 4824d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4825d9a729f3SWebb Scales addr64 = le64_to_cpu( 4826d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4827d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4828d9a729f3SWebb Scales curr_sg->length = 0; 4829d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4830d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4831d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4832d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4833d9a729f3SWebb Scales 4834d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4835d9a729f3SWebb Scales } 4836c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4837c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4838c349775eSScott Teel len = sg_dma_len(sg); 4839c349775eSScott Teel total_len += len; 4840c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4841c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4842c349775eSScott Teel curr_sg->reserved[0] = 0; 4843c349775eSScott Teel curr_sg->reserved[1] = 0; 4844c349775eSScott Teel curr_sg->reserved[2] = 0; 4845c349775eSScott Teel curr_sg->chain_indicator = 0; 4846c349775eSScott Teel curr_sg++; 4847c349775eSScott Teel } 4848c349775eSScott Teel 4849c349775eSScott Teel switch (cmd->sc_data_direction) { 4850c349775eSScott Teel case DMA_TO_DEVICE: 4851dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4852dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4853c349775eSScott Teel break; 4854c349775eSScott Teel case DMA_FROM_DEVICE: 4855dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4856dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4857c349775eSScott Teel break; 4858c349775eSScott Teel case DMA_NONE: 4859dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4860dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4861c349775eSScott Teel break; 4862c349775eSScott Teel default: 4863c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4864c349775eSScott Teel cmd->sc_data_direction); 4865c349775eSScott Teel BUG(); 4866c349775eSScott Teel break; 4867c349775eSScott Teel } 4868c349775eSScott Teel } else { 4869dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4870dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4871c349775eSScott Teel } 4872dd0e19f3SScott Teel 4873dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4874dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4875dd0e19f3SScott Teel 48762b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4877f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4878c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4879c349775eSScott Teel 4880c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4881c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4882c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 488350a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4884c349775eSScott Teel 4885d9a729f3SWebb Scales /* fill in sg elements */ 4886d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4887d9a729f3SWebb Scales cp->sg_count = 1; 4888a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4889d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4890d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4891d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4892d9a729f3SWebb Scales return -1; 4893d9a729f3SWebb Scales } 4894d9a729f3SWebb Scales } else 4895d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4896d9a729f3SWebb Scales 4897c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4898c349775eSScott Teel return 0; 4899c349775eSScott Teel } 4900c349775eSScott Teel 4901c349775eSScott Teel /* 4902c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4903c349775eSScott Teel */ 4904c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4905c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 490603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4907c349775eSScott Teel { 490845e596cdSDon Brace if (!c->scsi_cmd->device) 490945e596cdSDon Brace return -1; 491045e596cdSDon Brace 491145e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 491245e596cdSDon Brace return -1; 491345e596cdSDon Brace 491403383736SDon Brace /* Try to honor the device's queue depth */ 491503383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 491603383736SDon Brace phys_disk->queue_depth) { 491703383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 491803383736SDon Brace return IO_ACCEL_INELIGIBLE; 491903383736SDon Brace } 4920c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4921c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 492203383736SDon Brace cdb, cdb_len, scsi3addr, 492303383736SDon Brace phys_disk); 4924c349775eSScott Teel else 4925c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 492603383736SDon Brace cdb, cdb_len, scsi3addr, 492703383736SDon Brace phys_disk); 4928c349775eSScott Teel } 4929c349775eSScott Teel 49306b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 49316b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 49326b80b18fSScott Teel { 49336b80b18fSScott Teel if (offload_to_mirror == 0) { 49346b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 49352b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49366b80b18fSScott Teel return; 49376b80b18fSScott Teel } 49386b80b18fSScott Teel do { 49396b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 49402b08b3e9SDon Brace *current_group = *map_index / 49412b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49426b80b18fSScott Teel if (offload_to_mirror == *current_group) 49436b80b18fSScott Teel continue; 49442b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 49456b80b18fSScott Teel /* select map index from next group */ 49462b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 49476b80b18fSScott Teel (*current_group)++; 49486b80b18fSScott Teel } else { 49496b80b18fSScott Teel /* select map index from first group */ 49502b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49516b80b18fSScott Teel *current_group = 0; 49526b80b18fSScott Teel } 49536b80b18fSScott Teel } while (offload_to_mirror != *current_group); 49546b80b18fSScott Teel } 49556b80b18fSScott Teel 4956283b4a9bSStephen M. Cameron /* 4957283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4958283b4a9bSStephen M. Cameron */ 4959283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4960283b4a9bSStephen M. Cameron struct CommandList *c) 4961283b4a9bSStephen M. Cameron { 4962283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4963283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4964283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4965283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4966283b4a9bSStephen M. Cameron int is_write = 0; 4967283b4a9bSStephen M. Cameron u32 map_index; 4968283b4a9bSStephen M. Cameron u64 first_block, last_block; 4969283b4a9bSStephen M. Cameron u32 block_cnt; 4970283b4a9bSStephen M. Cameron u32 blocks_per_row; 4971283b4a9bSStephen M. Cameron u64 first_row, last_row; 4972283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4973283b4a9bSStephen M. Cameron u32 first_column, last_column; 49746b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49756b80b18fSScott Teel u32 r5or6_blocks_per_row; 49766b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49776b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49786b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 49796b80b18fSScott Teel u32 total_disks_per_row; 49806b80b18fSScott Teel u32 stripesize; 49816b80b18fSScott Teel u32 first_group, last_group, current_group; 4982283b4a9bSStephen M. Cameron u32 map_row; 4983283b4a9bSStephen M. Cameron u32 disk_handle; 4984283b4a9bSStephen M. Cameron u64 disk_block; 4985283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4986283b4a9bSStephen M. Cameron u8 cdb[16]; 4987283b4a9bSStephen M. Cameron u8 cdb_len; 49882b08b3e9SDon Brace u16 strip_size; 4989283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4990283b4a9bSStephen M. Cameron u64 tmpdiv; 4991283b4a9bSStephen M. Cameron #endif 49926b80b18fSScott Teel int offload_to_mirror; 4993283b4a9bSStephen M. Cameron 499445e596cdSDon Brace if (!dev) 499545e596cdSDon Brace return -1; 499645e596cdSDon Brace 4997283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4998283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4999283b4a9bSStephen M. Cameron case WRITE_6: 5000283b4a9bSStephen M. Cameron is_write = 1; 5001283b4a9bSStephen M. Cameron case READ_6: 5002abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5003abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5004abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5005283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 50063fa89a04SStephen M. Cameron if (block_cnt == 0) 50073fa89a04SStephen M. Cameron block_cnt = 256; 5008283b4a9bSStephen M. Cameron break; 5009283b4a9bSStephen M. Cameron case WRITE_10: 5010283b4a9bSStephen M. Cameron is_write = 1; 5011283b4a9bSStephen M. Cameron case READ_10: 5012283b4a9bSStephen M. Cameron first_block = 5013283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5014283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5015283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5016283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5017283b4a9bSStephen M. Cameron block_cnt = 5018283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5019283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5020283b4a9bSStephen M. Cameron break; 5021283b4a9bSStephen M. Cameron case WRITE_12: 5022283b4a9bSStephen M. Cameron is_write = 1; 5023283b4a9bSStephen M. Cameron case READ_12: 5024283b4a9bSStephen M. Cameron first_block = 5025283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5026283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5027283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5028283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5029283b4a9bSStephen M. Cameron block_cnt = 5030283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5031283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5032283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5033283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5034283b4a9bSStephen M. Cameron break; 5035283b4a9bSStephen M. Cameron case WRITE_16: 5036283b4a9bSStephen M. Cameron is_write = 1; 5037283b4a9bSStephen M. Cameron case READ_16: 5038283b4a9bSStephen M. Cameron first_block = 5039283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5040283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5041283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5042283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5043283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5044283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5045283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5046283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5047283b4a9bSStephen M. Cameron block_cnt = 5048283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5049283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5050283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5051283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5052283b4a9bSStephen M. Cameron break; 5053283b4a9bSStephen M. Cameron default: 5054283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5055283b4a9bSStephen M. Cameron } 5056283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5057283b4a9bSStephen M. Cameron 5058283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5059283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5060283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5061283b4a9bSStephen M. Cameron 5062283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 50632b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50642b08b3e9SDon Brace last_block < first_block) 5065283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5066283b4a9bSStephen M. Cameron 5067283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50682b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50692b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50702b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5071283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5072283b4a9bSStephen M. Cameron tmpdiv = first_block; 5073283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5074283b4a9bSStephen M. Cameron first_row = tmpdiv; 5075283b4a9bSStephen M. Cameron tmpdiv = last_block; 5076283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5077283b4a9bSStephen M. Cameron last_row = tmpdiv; 5078283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5079283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5080283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 50812b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5082283b4a9bSStephen M. Cameron first_column = tmpdiv; 5083283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 50842b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5085283b4a9bSStephen M. Cameron last_column = tmpdiv; 5086283b4a9bSStephen M. Cameron #else 5087283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5088283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5089283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5090283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 50912b08b3e9SDon Brace first_column = first_row_offset / strip_size; 50922b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5093283b4a9bSStephen M. Cameron #endif 5094283b4a9bSStephen M. Cameron 5095283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5096283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5097283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5098283b4a9bSStephen M. Cameron 5099283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 51002b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 51012b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5102283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51032b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51046b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 51056b80b18fSScott Teel 51066b80b18fSScott Teel switch (dev->raid_level) { 51076b80b18fSScott Teel case HPSA_RAID_0: 51086b80b18fSScott Teel break; /* nothing special to do */ 51096b80b18fSScott Teel case HPSA_RAID_1: 51106b80b18fSScott Teel /* Handles load balance across RAID 1 members. 51116b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 51126b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5113283b4a9bSStephen M. Cameron */ 51142b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5115283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 51162b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5117283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 51186b80b18fSScott Teel break; 51196b80b18fSScott Teel case HPSA_RAID_ADM: 51206b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 51216b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 51226b80b18fSScott Teel */ 51232b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 51246b80b18fSScott Teel 51256b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 51266b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 51276b80b18fSScott Teel &map_index, ¤t_group); 51286b80b18fSScott Teel /* set mirror group to use next time */ 51296b80b18fSScott Teel offload_to_mirror = 51302b08b3e9SDon Brace (offload_to_mirror >= 51312b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 51326b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 51336b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 51346b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 51356b80b18fSScott Teel * function since multiple threads might simultaneously 51366b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 51376b80b18fSScott Teel */ 51386b80b18fSScott Teel break; 51396b80b18fSScott Teel case HPSA_RAID_5: 51406b80b18fSScott Teel case HPSA_RAID_6: 51412b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 51426b80b18fSScott Teel break; 51436b80b18fSScott Teel 51446b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 51456b80b18fSScott Teel r5or6_blocks_per_row = 51462b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 51472b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 51486b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 51492b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 51502b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 51516b80b18fSScott Teel #if BITS_PER_LONG == 32 51526b80b18fSScott Teel tmpdiv = first_block; 51536b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 51546b80b18fSScott Teel tmpdiv = first_group; 51556b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51566b80b18fSScott Teel first_group = tmpdiv; 51576b80b18fSScott Teel tmpdiv = last_block; 51586b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 51596b80b18fSScott Teel tmpdiv = last_group; 51606b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51616b80b18fSScott Teel last_group = tmpdiv; 51626b80b18fSScott Teel #else 51636b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51646b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51656b80b18fSScott Teel #endif 5166000ff7c2SStephen M. Cameron if (first_group != last_group) 51676b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51686b80b18fSScott Teel 51696b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51706b80b18fSScott Teel #if BITS_PER_LONG == 32 51716b80b18fSScott Teel tmpdiv = first_block; 51726b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51736b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51746b80b18fSScott Teel tmpdiv = last_block; 51756b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51766b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51776b80b18fSScott Teel #else 51786b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 51796b80b18fSScott Teel first_block / stripesize; 51806b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 51816b80b18fSScott Teel #endif 51826b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 51836b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51846b80b18fSScott Teel 51856b80b18fSScott Teel 51866b80b18fSScott Teel /* Verify request is in a single column */ 51876b80b18fSScott Teel #if BITS_PER_LONG == 32 51886b80b18fSScott Teel tmpdiv = first_block; 51896b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 51906b80b18fSScott Teel tmpdiv = first_row_offset; 51916b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 51926b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 51936b80b18fSScott Teel tmpdiv = last_block; 51946b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 51956b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51966b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 51976b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 51986b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51996b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 52006b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52016b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52026b80b18fSScott Teel r5or6_last_column = tmpdiv; 52036b80b18fSScott Teel #else 52046b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 52056b80b18fSScott Teel (u32)((first_block % stripesize) % 52066b80b18fSScott Teel r5or6_blocks_per_row); 52076b80b18fSScott Teel 52086b80b18fSScott Teel r5or6_last_row_offset = 52096b80b18fSScott Teel (u32)((last_block % stripesize) % 52106b80b18fSScott Teel r5or6_blocks_per_row); 52116b80b18fSScott Teel 52126b80b18fSScott Teel first_column = r5or6_first_column = 52132b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 52146b80b18fSScott Teel r5or6_last_column = 52152b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 52166b80b18fSScott Teel #endif 52176b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 52186b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52196b80b18fSScott Teel 52206b80b18fSScott Teel /* Request is eligible */ 52216b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52222b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52236b80b18fSScott Teel 52246b80b18fSScott Teel map_index = (first_group * 52252b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 52266b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 52276b80b18fSScott Teel break; 52286b80b18fSScott Teel default: 52296b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5230283b4a9bSStephen M. Cameron } 52316b80b18fSScott Teel 523207543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 523307543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 523407543e0cSStephen Cameron 523503383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5236c3390df4SDon Brace if (!c->phys_disk) 5237c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 523803383736SDon Brace 5239283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 52402b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 52412b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 52422b08b3e9SDon Brace (first_row_offset - first_column * 52432b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5244283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5245283b4a9bSStephen M. Cameron 5246283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5247283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5248283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5249283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5250283b4a9bSStephen M. Cameron } 5251283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5252283b4a9bSStephen M. Cameron 5253283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5254283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5255283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5256283b4a9bSStephen M. Cameron cdb[1] = 0; 5257283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5258283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5259283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5260283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5261283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5262283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5263283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5264283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5265283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5266283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5267283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5268283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5269283b4a9bSStephen M. Cameron cdb[14] = 0; 5270283b4a9bSStephen M. Cameron cdb[15] = 0; 5271283b4a9bSStephen M. Cameron cdb_len = 16; 5272283b4a9bSStephen M. Cameron } else { 5273283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5274283b4a9bSStephen M. Cameron cdb[1] = 0; 5275283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5276283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5277283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5278283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5279283b4a9bSStephen M. Cameron cdb[6] = 0; 5280283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5281283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5282283b4a9bSStephen M. Cameron cdb[9] = 0; 5283283b4a9bSStephen M. Cameron cdb_len = 10; 5284283b4a9bSStephen M. Cameron } 5285283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 528603383736SDon Brace dev->scsi3addr, 528703383736SDon Brace dev->phys_disk[map_index]); 5288283b4a9bSStephen M. Cameron } 5289283b4a9bSStephen M. Cameron 529025163bd5SWebb Scales /* 529125163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 529225163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 529325163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 529425163bd5SWebb Scales */ 5295574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5296574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5297574f05d3SStephen Cameron unsigned char scsi3addr[]) 5298edd16368SStephen M. Cameron { 5299edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5300edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5301edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5302edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5303edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5304f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5305edd16368SStephen M. Cameron 5306edd16368SStephen M. Cameron /* Fill in the request block... */ 5307edd16368SStephen M. Cameron 5308edd16368SStephen M. Cameron c->Request.Timeout = 0; 5309edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5310edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5311edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5312edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5313edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5314a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5315a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5316edd16368SStephen M. Cameron break; 5317edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5318a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5319a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5320edd16368SStephen M. Cameron break; 5321edd16368SStephen M. Cameron case DMA_NONE: 5322a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5323a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5324edd16368SStephen M. Cameron break; 5325edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5326edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5327edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5328edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5329edd16368SStephen M. Cameron */ 5330edd16368SStephen M. Cameron 5331a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5332a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5333edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5334edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5335edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5336edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5337edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5338edd16368SStephen M. Cameron * our purposes here. 5339edd16368SStephen M. Cameron */ 5340edd16368SStephen M. Cameron 5341edd16368SStephen M. Cameron break; 5342edd16368SStephen M. Cameron 5343edd16368SStephen M. Cameron default: 5344edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5345edd16368SStephen M. Cameron cmd->sc_data_direction); 5346edd16368SStephen M. Cameron BUG(); 5347edd16368SStephen M. Cameron break; 5348edd16368SStephen M. Cameron } 5349edd16368SStephen M. Cameron 535033a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 535173153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5352edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5353edd16368SStephen M. Cameron } 5354edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5355edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5356edd16368SStephen M. Cameron return 0; 5357edd16368SStephen M. Cameron } 5358edd16368SStephen M. Cameron 5359360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5360360c73bdSStephen Cameron struct CommandList *c) 5361360c73bdSStephen Cameron { 5362360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5363360c73bdSStephen Cameron 5364360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5365360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5366360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5367360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5368360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5369360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5370360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5371360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5372360c73bdSStephen Cameron c->cmdindex = index; 5373360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5374360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5375360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5376360c73bdSStephen Cameron c->h = h; 5377a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5378360c73bdSStephen Cameron } 5379360c73bdSStephen Cameron 5380360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5381360c73bdSStephen Cameron { 5382360c73bdSStephen Cameron int i; 5383360c73bdSStephen Cameron 5384360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5385360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5386360c73bdSStephen Cameron 5387360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5388360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5389360c73bdSStephen Cameron } 5390360c73bdSStephen Cameron } 5391360c73bdSStephen Cameron 5392360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5393360c73bdSStephen Cameron struct CommandList *c) 5394360c73bdSStephen Cameron { 5395360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5396360c73bdSStephen Cameron 539773153fe5SWebb Scales BUG_ON(c->cmdindex != index); 539873153fe5SWebb Scales 5399360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5400360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5401360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5402360c73bdSStephen Cameron } 5403360c73bdSStephen Cameron 5404592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5405592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5406592a0ad5SWebb Scales unsigned char *scsi3addr) 5407592a0ad5SWebb Scales { 5408592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5409592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5410592a0ad5SWebb Scales 541145e596cdSDon Brace if (!dev) 541245e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 541345e596cdSDon Brace 5414592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5415592a0ad5SWebb Scales 5416592a0ad5SWebb Scales if (dev->offload_enabled) { 5417592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5418592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5419592a0ad5SWebb Scales c->scsi_cmd = cmd; 5420592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5421592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5422592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5423a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5424592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5425592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5426592a0ad5SWebb Scales c->scsi_cmd = cmd; 5427592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5428592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5429592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5430592a0ad5SWebb Scales } 5431592a0ad5SWebb Scales return rc; 5432592a0ad5SWebb Scales } 5433592a0ad5SWebb Scales 5434080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5435080ef1ccSDon Brace { 5436080ef1ccSDon Brace struct scsi_cmnd *cmd; 5437080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 54388a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5439080ef1ccSDon Brace 5440080ef1ccSDon Brace cmd = c->scsi_cmd; 5441080ef1ccSDon Brace dev = cmd->device->hostdata; 5442080ef1ccSDon Brace if (!dev) { 5443080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 54448a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5445080ef1ccSDon Brace } 5446d604f533SWebb Scales if (c->reset_pending) 5447d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5448a58e7e53SWebb Scales if (c->abort_pending) 5449a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5450592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5451592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5452592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5453592a0ad5SWebb Scales int rc; 5454592a0ad5SWebb Scales 5455592a0ad5SWebb Scales if (c2->error_data.serv_response == 5456592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5457592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5458592a0ad5SWebb Scales if (rc == 0) 5459592a0ad5SWebb Scales return; 5460592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5461592a0ad5SWebb Scales /* 5462592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5463592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5464592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5465592a0ad5SWebb Scales */ 5466592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54678a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5468592a0ad5SWebb Scales } 5469592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5470592a0ad5SWebb Scales } 5471592a0ad5SWebb Scales } 5472360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5473080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5474080ef1ccSDon Brace /* 5475080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5476080ef1ccSDon Brace * again via scsi mid layer, which will then get 5477080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5478592a0ad5SWebb Scales * 5479592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5480592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5481080ef1ccSDon Brace */ 5482080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5483080ef1ccSDon Brace cmd->scsi_done(cmd); 5484080ef1ccSDon Brace } 5485080ef1ccSDon Brace } 5486080ef1ccSDon Brace 5487574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5488574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5489574f05d3SStephen Cameron { 5490574f05d3SStephen Cameron struct ctlr_info *h; 5491574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5492574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5493574f05d3SStephen Cameron struct CommandList *c; 5494574f05d3SStephen Cameron int rc = 0; 5495574f05d3SStephen Cameron 5496574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5497574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 549873153fe5SWebb Scales 549973153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 550073153fe5SWebb Scales 5501574f05d3SStephen Cameron dev = cmd->device->hostdata; 5502574f05d3SStephen Cameron if (!dev) { 55031ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5504ba74fdc4SDon Brace cmd->scsi_done(cmd); 5505ba74fdc4SDon Brace return 0; 5506ba74fdc4SDon Brace } 5507ba74fdc4SDon Brace 5508ba74fdc4SDon Brace if (dev->removed) { 5509574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5510574f05d3SStephen Cameron cmd->scsi_done(cmd); 5511574f05d3SStephen Cameron return 0; 5512574f05d3SStephen Cameron } 551373153fe5SWebb Scales 5514574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5515574f05d3SStephen Cameron 5516574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 551725163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5518574f05d3SStephen Cameron cmd->scsi_done(cmd); 5519574f05d3SStephen Cameron return 0; 5520574f05d3SStephen Cameron } 552173153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5522574f05d3SStephen Cameron 5523407863cbSStephen Cameron /* 5524407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5525574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5526574f05d3SStephen Cameron */ 5527574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5528574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5529574f05d3SStephen Cameron h->acciopath_status)) { 5530592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5531574f05d3SStephen Cameron if (rc == 0) 5532592a0ad5SWebb Scales return 0; 5533592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 553473153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5535574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5536574f05d3SStephen Cameron } 5537574f05d3SStephen Cameron } 5538574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5539574f05d3SStephen Cameron } 5540574f05d3SStephen Cameron 55418ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 55425f389360SStephen M. Cameron { 55435f389360SStephen M. Cameron unsigned long flags; 55445f389360SStephen M. Cameron 55455f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 55465f389360SStephen M. Cameron h->scan_finished = 1; 55475f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 55485f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 55495f389360SStephen M. Cameron } 55505f389360SStephen M. Cameron 5551a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5552a08a8471SStephen M. Cameron { 5553a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5554a08a8471SStephen M. Cameron unsigned long flags; 5555a08a8471SStephen M. Cameron 55568ebc9248SWebb Scales /* 55578ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 55588ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 55598ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 55608ebc9248SWebb Scales * piling up on a locked up controller. 55618ebc9248SWebb Scales */ 55628ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55638ebc9248SWebb Scales return hpsa_scan_complete(h); 55645f389360SStephen M. Cameron 5565a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5566a08a8471SStephen M. Cameron while (1) { 5567a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5568a08a8471SStephen M. Cameron if (h->scan_finished) 5569a08a8471SStephen M. Cameron break; 5570a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5571a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5572a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5573a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5574a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5575a08a8471SStephen M. Cameron * happen if we're in here. 5576a08a8471SStephen M. Cameron */ 5577a08a8471SStephen M. Cameron } 5578a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5579a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5580a08a8471SStephen M. Cameron 55818ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55828ebc9248SWebb Scales return hpsa_scan_complete(h); 55835f389360SStephen M. Cameron 5584bfd7546cSDon Brace /* 5585bfd7546cSDon Brace * Do the scan after a reset completion 5586bfd7546cSDon Brace */ 5587bfd7546cSDon Brace if (h->reset_in_progress) { 5588bfd7546cSDon Brace h->drv_req_rescan = 1; 5589bfd7546cSDon Brace return; 5590bfd7546cSDon Brace } 5591bfd7546cSDon Brace 55928aa60681SDon Brace hpsa_update_scsi_devices(h); 5593a08a8471SStephen M. Cameron 55948ebc9248SWebb Scales hpsa_scan_complete(h); 5595a08a8471SStephen M. Cameron } 5596a08a8471SStephen M. Cameron 55977c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 55987c0a0229SDon Brace { 559903383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 560003383736SDon Brace 560103383736SDon Brace if (!logical_drive) 560203383736SDon Brace return -ENODEV; 56037c0a0229SDon Brace 56047c0a0229SDon Brace if (qdepth < 1) 56057c0a0229SDon Brace qdepth = 1; 560603383736SDon Brace else if (qdepth > logical_drive->queue_depth) 560703383736SDon Brace qdepth = logical_drive->queue_depth; 560803383736SDon Brace 560903383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 56107c0a0229SDon Brace } 56117c0a0229SDon Brace 5612a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5613a08a8471SStephen M. Cameron unsigned long elapsed_time) 5614a08a8471SStephen M. Cameron { 5615a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5616a08a8471SStephen M. Cameron unsigned long flags; 5617a08a8471SStephen M. Cameron int finished; 5618a08a8471SStephen M. Cameron 5619a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5620a08a8471SStephen M. Cameron finished = h->scan_finished; 5621a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5622a08a8471SStephen M. Cameron return finished; 5623a08a8471SStephen M. Cameron } 5624a08a8471SStephen M. Cameron 56252946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5626edd16368SStephen M. Cameron { 5627b705690dSStephen M. Cameron struct Scsi_Host *sh; 5628edd16368SStephen M. Cameron 5629b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 56302946e82bSRobert Elliott if (sh == NULL) { 56312946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 56322946e82bSRobert Elliott return -ENOMEM; 56332946e82bSRobert Elliott } 5634b705690dSStephen M. Cameron 5635b705690dSStephen M. Cameron sh->io_port = 0; 5636b705690dSStephen M. Cameron sh->n_io_port = 0; 5637b705690dSStephen M. Cameron sh->this_id = -1; 5638b705690dSStephen M. Cameron sh->max_channel = 3; 5639b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5640b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5641b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 564241ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5643d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5644b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5645d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5646b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5647bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5648b705690dSStephen M. Cameron sh->unique_id = sh->irq; 564964d513acSChristoph Hellwig 56502946e82bSRobert Elliott h->scsi_host = sh; 56512946e82bSRobert Elliott return 0; 56522946e82bSRobert Elliott } 56532946e82bSRobert Elliott 56542946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 56552946e82bSRobert Elliott { 56562946e82bSRobert Elliott int rv; 56572946e82bSRobert Elliott 56582946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 56592946e82bSRobert Elliott if (rv) { 56602946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 56612946e82bSRobert Elliott return rv; 56622946e82bSRobert Elliott } 56632946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 56642946e82bSRobert Elliott return 0; 5665edd16368SStephen M. Cameron } 5666edd16368SStephen M. Cameron 5667b69324ffSWebb Scales /* 566873153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 566973153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 567073153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 567173153fe5SWebb Scales * low-numbered entries for our own uses.) 567273153fe5SWebb Scales */ 567373153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 567473153fe5SWebb Scales { 567573153fe5SWebb Scales int idx = scmd->request->tag; 567673153fe5SWebb Scales 567773153fe5SWebb Scales if (idx < 0) 567873153fe5SWebb Scales return idx; 567973153fe5SWebb Scales 568073153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 568173153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 568273153fe5SWebb Scales } 568373153fe5SWebb Scales 568473153fe5SWebb Scales /* 5685b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5686b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5687b69324ffSWebb Scales */ 5688b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5689b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5690b69324ffSWebb Scales int reply_queue) 5691edd16368SStephen M. Cameron { 56928919358eSTomas Henzl int rc; 5693edd16368SStephen M. Cameron 5694a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5695a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5696a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5697c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 569825163bd5SWebb Scales if (rc) 5699b69324ffSWebb Scales return rc; 5700edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5701edd16368SStephen M. Cameron 5702b69324ffSWebb Scales /* Check if the unit is already ready. */ 5703edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5704b69324ffSWebb Scales return 0; 5705edd16368SStephen M. Cameron 5706b69324ffSWebb Scales /* 5707b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5708b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5709b69324ffSWebb Scales * looking for (but, success is good too). 5710b69324ffSWebb Scales */ 5711edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5712edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5713edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5714edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5715b69324ffSWebb Scales return 0; 5716b69324ffSWebb Scales 5717b69324ffSWebb Scales return 1; 5718b69324ffSWebb Scales } 5719b69324ffSWebb Scales 5720b69324ffSWebb Scales /* 5721b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5722b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5723b69324ffSWebb Scales */ 5724b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5725b69324ffSWebb Scales struct CommandList *c, 5726b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5727b69324ffSWebb Scales { 5728b69324ffSWebb Scales int rc; 5729b69324ffSWebb Scales int count = 0; 5730b69324ffSWebb Scales int waittime = 1; /* seconds */ 5731b69324ffSWebb Scales 5732b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5733b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5734b69324ffSWebb Scales 5735b69324ffSWebb Scales /* 5736b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5737b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5738b69324ffSWebb Scales */ 5739b69324ffSWebb Scales msleep(1000 * waittime); 5740b69324ffSWebb Scales 5741b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5742b69324ffSWebb Scales if (!rc) 5743edd16368SStephen M. Cameron break; 5744b69324ffSWebb Scales 5745b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5746b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5747b69324ffSWebb Scales waittime *= 2; 5748b69324ffSWebb Scales 5749b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5750b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5751b69324ffSWebb Scales waittime); 5752b69324ffSWebb Scales } 5753b69324ffSWebb Scales 5754b69324ffSWebb Scales return rc; 5755b69324ffSWebb Scales } 5756b69324ffSWebb Scales 5757b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5758b69324ffSWebb Scales unsigned char lunaddr[], 5759b69324ffSWebb Scales int reply_queue) 5760b69324ffSWebb Scales { 5761b69324ffSWebb Scales int first_queue; 5762b69324ffSWebb Scales int last_queue; 5763b69324ffSWebb Scales int rq; 5764b69324ffSWebb Scales int rc = 0; 5765b69324ffSWebb Scales struct CommandList *c; 5766b69324ffSWebb Scales 5767b69324ffSWebb Scales c = cmd_alloc(h); 5768b69324ffSWebb Scales 5769b69324ffSWebb Scales /* 5770b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5771b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5772b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5773b69324ffSWebb Scales */ 5774b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5775b69324ffSWebb Scales first_queue = 0; 5776b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5777b69324ffSWebb Scales } else { 5778b69324ffSWebb Scales first_queue = reply_queue; 5779b69324ffSWebb Scales last_queue = reply_queue; 5780b69324ffSWebb Scales } 5781b69324ffSWebb Scales 5782b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5783b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5784b69324ffSWebb Scales if (rc) 5785b69324ffSWebb Scales break; 5786edd16368SStephen M. Cameron } 5787edd16368SStephen M. Cameron 5788edd16368SStephen M. Cameron if (rc) 5789edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5790edd16368SStephen M. Cameron else 5791edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5792edd16368SStephen M. Cameron 579345fcb86eSStephen Cameron cmd_free(h, c); 5794edd16368SStephen M. Cameron return rc; 5795edd16368SStephen M. Cameron } 5796edd16368SStephen M. Cameron 5797edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5798edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5799edd16368SStephen M. Cameron */ 5800edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5801edd16368SStephen M. Cameron { 5802edd16368SStephen M. Cameron int rc; 5803edd16368SStephen M. Cameron struct ctlr_info *h; 5804edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 58050b9b7b6eSScott Teel u8 reset_type; 58062dc127bbSDan Carpenter char msg[48]; 5807edd16368SStephen M. Cameron 5808edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5809edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5810edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5811edd16368SStephen M. Cameron return FAILED; 5812e345893bSDon Brace 5813e345893bSDon Brace if (lockup_detected(h)) 5814e345893bSDon Brace return FAILED; 5815e345893bSDon Brace 5816edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5817edd16368SStephen M. Cameron if (!dev) { 5818d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5819edd16368SStephen M. Cameron return FAILED; 5820edd16368SStephen M. Cameron } 582125163bd5SWebb Scales 582225163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 582325163bd5SWebb Scales if (lockup_detected(h)) { 58242dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58252dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 582673153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 582773153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 582825163bd5SWebb Scales return FAILED; 582925163bd5SWebb Scales } 583025163bd5SWebb Scales 583125163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 583225163bd5SWebb Scales if (detect_controller_lockup(h)) { 58332dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58342dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 583573153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 583673153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 583725163bd5SWebb Scales return FAILED; 583825163bd5SWebb Scales } 583925163bd5SWebb Scales 5840d604f533SWebb Scales /* Do not attempt on controller */ 5841d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5842d604f533SWebb Scales return SUCCESS; 5843d604f533SWebb Scales 58440b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 58450b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 58460b9b7b6eSScott Teel else 58470b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 58480b9b7b6eSScott Teel 58490b9b7b6eSScott Teel sprintf(msg, "resetting %s", 58500b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 58510b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 585225163bd5SWebb Scales 5853da03ded0SDon Brace h->reset_in_progress = 1; 5854d416b0c7SStephen M. Cameron 5855edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 58560b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 585725163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 58580b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 58590b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 58602dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5861d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5862da03ded0SDon Brace h->reset_in_progress = 0; 5863d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5864edd16368SStephen M. Cameron } 5865edd16368SStephen M. Cameron 58666cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 58676cba3f19SStephen M. Cameron { 58686cba3f19SStephen M. Cameron u8 original_tag[8]; 58696cba3f19SStephen M. Cameron 58706cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 58716cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 58726cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 58736cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 58746cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 58756cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 58766cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 58776cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 58786cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 58796cba3f19SStephen M. Cameron } 58806cba3f19SStephen M. Cameron 588117eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 58822b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 588317eb87d2SScott Teel { 58842b08b3e9SDon Brace u64 tag; 588517eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 588617eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 588717eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 58882b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 58892b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 58902b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 589154b6e9e9SScott Teel return; 589254b6e9e9SScott Teel } 589354b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 589454b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 589554b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5896dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5897dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5898dd0e19f3SScott Teel *taglower = cm2->Tag; 589954b6e9e9SScott Teel return; 590054b6e9e9SScott Teel } 59012b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 59022b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59032b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 590417eb87d2SScott Teel } 590554b6e9e9SScott Teel 590675167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 59079b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 590875167d2cSStephen M. Cameron { 590975167d2cSStephen M. Cameron int rc = IO_OK; 591075167d2cSStephen M. Cameron struct CommandList *c; 591175167d2cSStephen M. Cameron struct ErrorInfo *ei; 59122b08b3e9SDon Brace __le32 tagupper, taglower; 591375167d2cSStephen M. Cameron 591445fcb86eSStephen Cameron c = cmd_alloc(h); 591575167d2cSStephen M. Cameron 5916a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 59179b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5918a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 59199b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 59206cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5921c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 592217eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 592325163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 592417eb87d2SScott Teel __func__, tagupper, taglower); 592575167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 592675167d2cSStephen M. Cameron 592775167d2cSStephen M. Cameron ei = c->err_info; 592875167d2cSStephen M. Cameron switch (ei->CommandStatus) { 592975167d2cSStephen M. Cameron case CMD_SUCCESS: 593075167d2cSStephen M. Cameron break; 59319437ac43SStephen Cameron case CMD_TMF_STATUS: 59329437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 59339437ac43SStephen Cameron break; 593475167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 593575167d2cSStephen M. Cameron rc = -1; 593675167d2cSStephen M. Cameron break; 593775167d2cSStephen M. Cameron default: 593875167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 593917eb87d2SScott Teel __func__, tagupper, taglower); 5940d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 594175167d2cSStephen M. Cameron rc = -1; 594275167d2cSStephen M. Cameron break; 594375167d2cSStephen M. Cameron } 594445fcb86eSStephen Cameron cmd_free(h, c); 5945dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5946dd0e19f3SScott Teel __func__, tagupper, taglower); 594775167d2cSStephen M. Cameron return rc; 594875167d2cSStephen M. Cameron } 594975167d2cSStephen M. Cameron 59508be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 59518be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 59528be986ccSStephen Cameron { 59538be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 59548be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 59558be986ccSStephen Cameron struct io_accel2_cmd *c2a = 59568be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5957a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 59588be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 59598be986ccSStephen Cameron 596045e596cdSDon Brace if (!dev) 596145e596cdSDon Brace return; 596245e596cdSDon Brace 59638be986ccSStephen Cameron /* 59648be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 59658be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 59668be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 59678be986ccSStephen Cameron */ 59688be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 59698be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 59708be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 59718be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 59728be986ccSStephen Cameron sizeof(ac->error_len)); 59738be986ccSStephen Cameron 59748be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5975a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5976a58e7e53SWebb Scales 59778be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 59788be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 59798be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 59808be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 59818be986ccSStephen Cameron 59828be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 59838be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 59848be986ccSStephen Cameron ac->reply_queue = reply_queue; 59858be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 59868be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 59878be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 59888be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 59898be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 59908be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 59918be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 59928be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 59938be986ccSStephen Cameron } 59948be986ccSStephen Cameron 599554b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 599654b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 599754b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 599854b6e9e9SScott Teel * Return 0 on success (IO_OK) 599954b6e9e9SScott Teel * -1 on failure 600054b6e9e9SScott Teel */ 600154b6e9e9SScott Teel 600254b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 600325163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 600454b6e9e9SScott Teel { 600554b6e9e9SScott Teel int rc = IO_OK; 600654b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 600754b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 600854b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 600954b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 601054b6e9e9SScott Teel 601154b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 60127fa3030cSStephen Cameron scmd = abort->scsi_cmd; 601354b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 601454b6e9e9SScott Teel if (dev == NULL) { 601554b6e9e9SScott Teel dev_warn(&h->pdev->dev, 601654b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 601754b6e9e9SScott Teel return -1; /* not abortable */ 601854b6e9e9SScott Teel } 601954b6e9e9SScott Teel 60202ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60212ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 60220d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 60232ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 60240d96ef5fSWebb Scales "Reset as abort", 60252ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 60262ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 60272ba8bfc8SStephen M. Cameron 602854b6e9e9SScott Teel if (!dev->offload_enabled) { 602954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 603054b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 603154b6e9e9SScott Teel return -1; /* not abortable */ 603254b6e9e9SScott Teel } 603354b6e9e9SScott Teel 603454b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 603554b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 603654b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 603754b6e9e9SScott Teel return -1; /* not abortable */ 603854b6e9e9SScott Teel } 603954b6e9e9SScott Teel 604054b6e9e9SScott Teel /* send the reset */ 60412ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60422ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 60432ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 60442ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 60452ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 6046b32ece0fSDon Brace rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 604754b6e9e9SScott Teel if (rc != 0) { 604854b6e9e9SScott Teel dev_warn(&h->pdev->dev, 604954b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 605054b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 605154b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 605254b6e9e9SScott Teel return rc; /* failed to reset */ 605354b6e9e9SScott Teel } 605454b6e9e9SScott Teel 605554b6e9e9SScott Teel /* wait for device to recover */ 6056b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 605754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 605854b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 605954b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 606054b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 606154b6e9e9SScott Teel return -1; /* failed to recover */ 606254b6e9e9SScott Teel } 606354b6e9e9SScott Teel 606454b6e9e9SScott Teel /* device recovered */ 606554b6e9e9SScott Teel dev_info(&h->pdev->dev, 606654b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 606754b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 606854b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 606954b6e9e9SScott Teel 607054b6e9e9SScott Teel return rc; /* success */ 607154b6e9e9SScott Teel } 607254b6e9e9SScott Teel 60738be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 60748be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 60758be986ccSStephen Cameron { 60768be986ccSStephen Cameron int rc = IO_OK; 60778be986ccSStephen Cameron struct CommandList *c; 60788be986ccSStephen Cameron __le32 taglower, tagupper; 60798be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 60808be986ccSStephen Cameron struct io_accel2_cmd *c2; 60818be986ccSStephen Cameron 60828be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 608345e596cdSDon Brace if (!dev) 608445e596cdSDon Brace return -1; 608545e596cdSDon Brace 60868be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 60878be986ccSStephen Cameron return -1; 60888be986ccSStephen Cameron 60898be986ccSStephen Cameron c = cmd_alloc(h); 60908be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 60918be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6092c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 60938be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 60948be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 60958be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 60968be986ccSStephen Cameron __func__, tagupper, taglower); 60978be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 60988be986ccSStephen Cameron 60998be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61008be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 61018be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 61028be986ccSStephen Cameron switch (c2->error_data.serv_response) { 61038be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 61048be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 61058be986ccSStephen Cameron rc = 0; 61068be986ccSStephen Cameron break; 61078be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 61088be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 61098be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 61108be986ccSStephen Cameron rc = -1; 61118be986ccSStephen Cameron break; 61128be986ccSStephen Cameron default: 61138be986ccSStephen Cameron dev_warn(&h->pdev->dev, 61148be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 61158be986ccSStephen Cameron __func__, tagupper, taglower, 61168be986ccSStephen Cameron c2->error_data.serv_response); 61178be986ccSStephen Cameron rc = -1; 61188be986ccSStephen Cameron } 61198be986ccSStephen Cameron cmd_free(h, c); 61208be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 61218be986ccSStephen Cameron tagupper, taglower); 61228be986ccSStephen Cameron return rc; 61238be986ccSStephen Cameron } 61248be986ccSStephen Cameron 61256cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 612639f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 61276cba3f19SStephen M. Cameron { 61288be986ccSStephen Cameron /* 61298be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 613054b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 61318be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 61328be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 613354b6e9e9SScott Teel */ 61348be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 613539f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 613639f3deb2SDon Brace dev->physical_device) 61378be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 61388be986ccSStephen Cameron reply_queue); 61398be986ccSStephen Cameron else 614039f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 614139f3deb2SDon Brace dev->scsi3addr, 614225163bd5SWebb Scales abort, reply_queue); 61438be986ccSStephen Cameron } 614439f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 614525163bd5SWebb Scales } 614625163bd5SWebb Scales 614725163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 614825163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 614925163bd5SWebb Scales struct CommandList *c) 615025163bd5SWebb Scales { 615125163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 615225163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 615325163bd5SWebb Scales return c->Header.ReplyQueue; 61546cba3f19SStephen M. Cameron } 61556cba3f19SStephen M. Cameron 61569b5c48c2SStephen Cameron /* 61579b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 61589b5c48c2SStephen Cameron * over-subscription of commands 61599b5c48c2SStephen Cameron */ 61609b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 61619b5c48c2SStephen Cameron { 61629b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 61639b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 61649b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 61659b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 61669b5c48c2SStephen Cameron } 61679b5c48c2SStephen Cameron 616875167d2cSStephen M. Cameron /* Send an abort for the specified command. 616975167d2cSStephen M. Cameron * If the device and controller support it, 617075167d2cSStephen M. Cameron * send a task abort request. 617175167d2cSStephen M. Cameron */ 617275167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 617375167d2cSStephen M. Cameron { 617475167d2cSStephen M. Cameron 6175a58e7e53SWebb Scales int rc; 617675167d2cSStephen M. Cameron struct ctlr_info *h; 617775167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 617875167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 617975167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 618075167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 618175167d2cSStephen M. Cameron int ml = 0; 61822b08b3e9SDon Brace __le32 tagupper, taglower; 618325163bd5SWebb Scales int refcount, reply_queue; 618425163bd5SWebb Scales 618525163bd5SWebb Scales if (sc == NULL) 618625163bd5SWebb Scales return FAILED; 618775167d2cSStephen M. Cameron 61889b5c48c2SStephen Cameron if (sc->device == NULL) 61899b5c48c2SStephen Cameron return FAILED; 61909b5c48c2SStephen Cameron 619175167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 619275167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 61939b5c48c2SStephen Cameron if (h == NULL) 619475167d2cSStephen M. Cameron return FAILED; 619575167d2cSStephen M. Cameron 619625163bd5SWebb Scales /* Find the device of the command to be aborted */ 619725163bd5SWebb Scales dev = sc->device->hostdata; 619825163bd5SWebb Scales if (!dev) { 619925163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 620025163bd5SWebb Scales msg); 6201e345893bSDon Brace return FAILED; 620225163bd5SWebb Scales } 620325163bd5SWebb Scales 620425163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 620525163bd5SWebb Scales if (lockup_detected(h)) { 620625163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 620725163bd5SWebb Scales "ABORT FAILED, lockup detected"); 620825163bd5SWebb Scales return FAILED; 620925163bd5SWebb Scales } 621025163bd5SWebb Scales 621125163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 621225163bd5SWebb Scales if (detect_controller_lockup(h)) { 621325163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 621425163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 621525163bd5SWebb Scales return FAILED; 621625163bd5SWebb Scales } 6217e345893bSDon Brace 621875167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 621975167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 622075167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 622175167d2cSStephen M. Cameron return FAILED; 622275167d2cSStephen M. Cameron 622375167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 62244b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 622575167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 62260d96ef5fSWebb Scales sc->device->id, sc->device->lun, 62274b761557SRobert Elliott "Aborting command", sc); 622875167d2cSStephen M. Cameron 622975167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 623075167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 623175167d2cSStephen M. Cameron if (abort == NULL) { 6232281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6233281a7fd0SWebb Scales return SUCCESS; 6234281a7fd0SWebb Scales } 6235281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6236281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6237281a7fd0SWebb Scales cmd_free(h, abort); 6238281a7fd0SWebb Scales return SUCCESS; 623975167d2cSStephen M. Cameron } 62409b5c48c2SStephen Cameron 62419b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 62429b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 62439b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 62449b5c48c2SStephen Cameron cmd_free(h, abort); 62459b5c48c2SStephen Cameron return FAILED; 62469b5c48c2SStephen Cameron } 62479b5c48c2SStephen Cameron 6248a58e7e53SWebb Scales /* 6249a58e7e53SWebb Scales * Check that we're aborting the right command. 6250a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6251a58e7e53SWebb Scales */ 6252a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6253a58e7e53SWebb Scales cmd_free(h, abort); 6254a58e7e53SWebb Scales return SUCCESS; 6255a58e7e53SWebb Scales } 6256a58e7e53SWebb Scales 6257a58e7e53SWebb Scales abort->abort_pending = true; 625817eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 625925163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 626017eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 62617fa3030cSStephen Cameron as = abort->scsi_cmd; 626275167d2cSStephen M. Cameron if (as != NULL) 62634b761557SRobert Elliott ml += sprintf(msg+ml, 62644b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 62654b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 62664b761557SRobert Elliott as->serial_number); 62674b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 62680d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 62694b761557SRobert Elliott 627075167d2cSStephen M. Cameron /* 627175167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 627275167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 627375167d2cSStephen M. Cameron * distinguish which. Send the abort down. 627475167d2cSStephen M. Cameron */ 62759b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 62769b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 62774b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 62784b761557SRobert Elliott msg); 62799b5c48c2SStephen Cameron cmd_free(h, abort); 62809b5c48c2SStephen Cameron return FAILED; 62819b5c48c2SStephen Cameron } 628239f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 62839b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 62849b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 628575167d2cSStephen M. Cameron if (rc != 0) { 62864b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 62870d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 62880d96ef5fSWebb Scales "FAILED to abort command"); 6289281a7fd0SWebb Scales cmd_free(h, abort); 629075167d2cSStephen M. Cameron return FAILED; 629175167d2cSStephen M. Cameron } 62924b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6293d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6294a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6295281a7fd0SWebb Scales cmd_free(h, abort); 6296a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 629775167d2cSStephen M. Cameron } 629875167d2cSStephen M. Cameron 6299edd16368SStephen M. Cameron /* 630073153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 630173153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 630273153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 630373153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 630473153fe5SWebb Scales */ 630573153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 630673153fe5SWebb Scales struct scsi_cmnd *scmd) 630773153fe5SWebb Scales { 630873153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 630973153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 631073153fe5SWebb Scales 631173153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 631273153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 631373153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 631473153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 631573153fe5SWebb Scales * bounds, it's probably not our bug. 631673153fe5SWebb Scales */ 631773153fe5SWebb Scales BUG(); 631873153fe5SWebb Scales } 631973153fe5SWebb Scales 632073153fe5SWebb Scales atomic_inc(&c->refcount); 632173153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 632273153fe5SWebb Scales /* 632373153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 632473153fe5SWebb Scales * value. Thus, there should never be a collision here between 632573153fe5SWebb Scales * two requests...because if the selected command isn't idle 632673153fe5SWebb Scales * then someone is going to be very disappointed. 632773153fe5SWebb Scales */ 632873153fe5SWebb Scales dev_err(&h->pdev->dev, 632973153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 633073153fe5SWebb Scales idx); 633173153fe5SWebb Scales if (c->scsi_cmd != NULL) 633273153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 633373153fe5SWebb Scales scsi_print_command(scmd); 633473153fe5SWebb Scales } 633573153fe5SWebb Scales 633673153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 633773153fe5SWebb Scales return c; 633873153fe5SWebb Scales } 633973153fe5SWebb Scales 634073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 634173153fe5SWebb Scales { 634273153fe5SWebb Scales /* 634373153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 634473153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 634573153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 634673153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 634773153fe5SWebb Scales */ 634873153fe5SWebb Scales (void)atomic_dec(&c->refcount); 634973153fe5SWebb Scales } 635073153fe5SWebb Scales 635173153fe5SWebb Scales /* 6352edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6353edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6354edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6355edd16368SStephen M. Cameron * cmd_free() is the complement. 6356bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6357bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6358edd16368SStephen M. Cameron */ 6359281a7fd0SWebb Scales 6360edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6361edd16368SStephen M. Cameron { 6362edd16368SStephen M. Cameron struct CommandList *c; 6363360c73bdSStephen Cameron int refcount, i; 636473153fe5SWebb Scales int offset = 0; 6365edd16368SStephen M. Cameron 636633811026SRobert Elliott /* 636733811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 63684c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 63694c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 63704c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 63714c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 63724c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 63734c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 63744c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 63754c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 637673153fe5SWebb Scales * 637773153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 637873153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 637973153fe5SWebb Scales * all works, since we have at least one command structure available; 638073153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 638173153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 638273153fe5SWebb Scales * layer will use the higher indexes. 63834c413128SStephen M. Cameron */ 63844c413128SStephen M. Cameron 6385281a7fd0SWebb Scales for (;;) { 638673153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 638773153fe5SWebb Scales HPSA_NRESERVED_CMDS, 638873153fe5SWebb Scales offset); 638973153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6390281a7fd0SWebb Scales offset = 0; 6391281a7fd0SWebb Scales continue; 6392281a7fd0SWebb Scales } 6393edd16368SStephen M. Cameron c = h->cmd_pool + i; 6394281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6395281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6396281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 639773153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6398281a7fd0SWebb Scales continue; 6399281a7fd0SWebb Scales } 6400281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6401281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6402281a7fd0SWebb Scales break; /* it's ours now. */ 6403281a7fd0SWebb Scales } 6404360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6405edd16368SStephen M. Cameron return c; 6406edd16368SStephen M. Cameron } 6407edd16368SStephen M. Cameron 640873153fe5SWebb Scales /* 640973153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 641073153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 641173153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 641273153fe5SWebb Scales * the clear-bit is harmless. 641373153fe5SWebb Scales */ 6414edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6415edd16368SStephen M. Cameron { 6416281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6417edd16368SStephen M. Cameron int i; 6418edd16368SStephen M. Cameron 6419edd16368SStephen M. Cameron i = c - h->cmd_pool; 6420edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6421edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6422edd16368SStephen M. Cameron } 6423281a7fd0SWebb Scales } 6424edd16368SStephen M. Cameron 6425edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6426edd16368SStephen M. Cameron 642742a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 642842a91641SDon Brace void __user *arg) 6429edd16368SStephen M. Cameron { 6430edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6431edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6432edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6433edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6434edd16368SStephen M. Cameron int err; 6435edd16368SStephen M. Cameron u32 cp; 6436edd16368SStephen M. Cameron 6437938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6438edd16368SStephen M. Cameron err = 0; 6439edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6440edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6441edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6442edd16368SStephen M. Cameron sizeof(arg64.Request)); 6443edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6444edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6445edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6446edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6447edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6448edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6449edd16368SStephen M. Cameron 6450edd16368SStephen M. Cameron if (err) 6451edd16368SStephen M. Cameron return -EFAULT; 6452edd16368SStephen M. Cameron 645342a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6454edd16368SStephen M. Cameron if (err) 6455edd16368SStephen M. Cameron return err; 6456edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6457edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6458edd16368SStephen M. Cameron if (err) 6459edd16368SStephen M. Cameron return -EFAULT; 6460edd16368SStephen M. Cameron return err; 6461edd16368SStephen M. Cameron } 6462edd16368SStephen M. Cameron 6463edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 646442a91641SDon Brace int cmd, void __user *arg) 6465edd16368SStephen M. Cameron { 6466edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6467edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6468edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6469edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6470edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6471edd16368SStephen M. Cameron int err; 6472edd16368SStephen M. Cameron u32 cp; 6473edd16368SStephen M. Cameron 6474938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6475edd16368SStephen M. Cameron err = 0; 6476edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6477edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6478edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6479edd16368SStephen M. Cameron sizeof(arg64.Request)); 6480edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6481edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6482edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6483edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6484edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6485edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6486edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6487edd16368SStephen M. Cameron 6488edd16368SStephen M. Cameron if (err) 6489edd16368SStephen M. Cameron return -EFAULT; 6490edd16368SStephen M. Cameron 649142a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6492edd16368SStephen M. Cameron if (err) 6493edd16368SStephen M. Cameron return err; 6494edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6495edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6496edd16368SStephen M. Cameron if (err) 6497edd16368SStephen M. Cameron return -EFAULT; 6498edd16368SStephen M. Cameron return err; 6499edd16368SStephen M. Cameron } 650071fe75a7SStephen M. Cameron 650142a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 650271fe75a7SStephen M. Cameron { 650371fe75a7SStephen M. Cameron switch (cmd) { 650471fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 650571fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 650671fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 650771fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 650871fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 650971fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 651071fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 651171fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 651271fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 651371fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 651471fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 651571fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 651671fe75a7SStephen M. Cameron case CCISS_REGNEWD: 651771fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 651871fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 651971fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 652071fe75a7SStephen M. Cameron 652171fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 652271fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 652371fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 652471fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 652571fe75a7SStephen M. Cameron 652671fe75a7SStephen M. Cameron default: 652771fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 652871fe75a7SStephen M. Cameron } 652971fe75a7SStephen M. Cameron } 6530edd16368SStephen M. Cameron #endif 6531edd16368SStephen M. Cameron 6532edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6533edd16368SStephen M. Cameron { 6534edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6535edd16368SStephen M. Cameron 6536edd16368SStephen M. Cameron if (!argp) 6537edd16368SStephen M. Cameron return -EINVAL; 6538edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6539edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6540edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6541edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6542edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6543edd16368SStephen M. Cameron return -EFAULT; 6544edd16368SStephen M. Cameron return 0; 6545edd16368SStephen M. Cameron } 6546edd16368SStephen M. Cameron 6547edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6548edd16368SStephen M. Cameron { 6549edd16368SStephen M. Cameron DriverVer_type DriverVer; 6550edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6551edd16368SStephen M. Cameron int rc; 6552edd16368SStephen M. Cameron 6553edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6554edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6555edd16368SStephen M. Cameron if (rc != 3) { 6556edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6557edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6558edd16368SStephen M. Cameron vmaj = 0; 6559edd16368SStephen M. Cameron vmin = 0; 6560edd16368SStephen M. Cameron vsubmin = 0; 6561edd16368SStephen M. Cameron } 6562edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6563edd16368SStephen M. Cameron if (!argp) 6564edd16368SStephen M. Cameron return -EINVAL; 6565edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6566edd16368SStephen M. Cameron return -EFAULT; 6567edd16368SStephen M. Cameron return 0; 6568edd16368SStephen M. Cameron } 6569edd16368SStephen M. Cameron 6570edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6571edd16368SStephen M. Cameron { 6572edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6573edd16368SStephen M. Cameron struct CommandList *c; 6574edd16368SStephen M. Cameron char *buff = NULL; 657550a0decfSStephen M. Cameron u64 temp64; 6576c1f63c8fSStephen M. Cameron int rc = 0; 6577edd16368SStephen M. Cameron 6578edd16368SStephen M. Cameron if (!argp) 6579edd16368SStephen M. Cameron return -EINVAL; 6580edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6581edd16368SStephen M. Cameron return -EPERM; 6582edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6583edd16368SStephen M. Cameron return -EFAULT; 6584edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6585edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6586edd16368SStephen M. Cameron return -EINVAL; 6587edd16368SStephen M. Cameron } 6588edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6589edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6590edd16368SStephen M. Cameron if (buff == NULL) 65912dd02d74SRobert Elliott return -ENOMEM; 65929233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6593edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6594b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6595b03a7771SStephen M. Cameron iocommand.buf_size)) { 6596c1f63c8fSStephen M. Cameron rc = -EFAULT; 6597c1f63c8fSStephen M. Cameron goto out_kfree; 6598edd16368SStephen M. Cameron } 6599b03a7771SStephen M. Cameron } else { 6600edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6601b03a7771SStephen M. Cameron } 6602b03a7771SStephen M. Cameron } 660345fcb86eSStephen Cameron c = cmd_alloc(h); 6604bf43caf3SRobert Elliott 6605edd16368SStephen M. Cameron /* Fill in the command type */ 6606edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6607a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6608edd16368SStephen M. Cameron /* Fill in Command Header */ 6609edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6610edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6611edd16368SStephen M. Cameron c->Header.SGList = 1; 661250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6613edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6614edd16368SStephen M. Cameron c->Header.SGList = 0; 661550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6616edd16368SStephen M. Cameron } 6617edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6618edd16368SStephen M. Cameron 6619edd16368SStephen M. Cameron /* Fill in Request block */ 6620edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6621edd16368SStephen M. Cameron sizeof(c->Request)); 6622edd16368SStephen M. Cameron 6623edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6624edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 662550a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6626edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 662750a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 662850a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 662950a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6630bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6631bcc48ffaSStephen M. Cameron goto out; 6632bcc48ffaSStephen M. Cameron } 663350a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 663450a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 663550a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6636edd16368SStephen M. Cameron } 6637c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 66383fb134cbSDon Brace NO_TIMEOUT); 6639c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6640edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6641edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 664225163bd5SWebb Scales if (rc) { 664325163bd5SWebb Scales rc = -EIO; 664425163bd5SWebb Scales goto out; 664525163bd5SWebb Scales } 6646edd16368SStephen M. Cameron 6647edd16368SStephen M. Cameron /* Copy the error information out */ 6648edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6649edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6650edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6651c1f63c8fSStephen M. Cameron rc = -EFAULT; 6652c1f63c8fSStephen M. Cameron goto out; 6653edd16368SStephen M. Cameron } 66549233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6655b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6656edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6657edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6658c1f63c8fSStephen M. Cameron rc = -EFAULT; 6659c1f63c8fSStephen M. Cameron goto out; 6660edd16368SStephen M. Cameron } 6661edd16368SStephen M. Cameron } 6662c1f63c8fSStephen M. Cameron out: 666345fcb86eSStephen Cameron cmd_free(h, c); 6664c1f63c8fSStephen M. Cameron out_kfree: 6665c1f63c8fSStephen M. Cameron kfree(buff); 6666c1f63c8fSStephen M. Cameron return rc; 6667edd16368SStephen M. Cameron } 6668edd16368SStephen M. Cameron 6669edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6670edd16368SStephen M. Cameron { 6671edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6672edd16368SStephen M. Cameron struct CommandList *c; 6673edd16368SStephen M. Cameron unsigned char **buff = NULL; 6674edd16368SStephen M. Cameron int *buff_size = NULL; 667550a0decfSStephen M. Cameron u64 temp64; 6676edd16368SStephen M. Cameron BYTE sg_used = 0; 6677edd16368SStephen M. Cameron int status = 0; 667801a02ffcSStephen M. Cameron u32 left; 667901a02ffcSStephen M. Cameron u32 sz; 6680edd16368SStephen M. Cameron BYTE __user *data_ptr; 6681edd16368SStephen M. Cameron 6682edd16368SStephen M. Cameron if (!argp) 6683edd16368SStephen M. Cameron return -EINVAL; 6684edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6685edd16368SStephen M. Cameron return -EPERM; 668619be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6687edd16368SStephen M. Cameron if (!ioc) { 6688edd16368SStephen M. Cameron status = -ENOMEM; 6689edd16368SStephen M. Cameron goto cleanup1; 6690edd16368SStephen M. Cameron } 6691edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6692edd16368SStephen M. Cameron status = -EFAULT; 6693edd16368SStephen M. Cameron goto cleanup1; 6694edd16368SStephen M. Cameron } 6695edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6696edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6697edd16368SStephen M. Cameron status = -EINVAL; 6698edd16368SStephen M. Cameron goto cleanup1; 6699edd16368SStephen M. Cameron } 6700edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6701edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6702edd16368SStephen M. Cameron status = -EINVAL; 6703edd16368SStephen M. Cameron goto cleanup1; 6704edd16368SStephen M. Cameron } 6705d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6706edd16368SStephen M. Cameron status = -EINVAL; 6707edd16368SStephen M. Cameron goto cleanup1; 6708edd16368SStephen M. Cameron } 6709d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6710edd16368SStephen M. Cameron if (!buff) { 6711edd16368SStephen M. Cameron status = -ENOMEM; 6712edd16368SStephen M. Cameron goto cleanup1; 6713edd16368SStephen M. Cameron } 6714d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6715edd16368SStephen M. Cameron if (!buff_size) { 6716edd16368SStephen M. Cameron status = -ENOMEM; 6717edd16368SStephen M. Cameron goto cleanup1; 6718edd16368SStephen M. Cameron } 6719edd16368SStephen M. Cameron left = ioc->buf_size; 6720edd16368SStephen M. Cameron data_ptr = ioc->buf; 6721edd16368SStephen M. Cameron while (left) { 6722edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6723edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6724edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6725edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6726edd16368SStephen M. Cameron status = -ENOMEM; 6727edd16368SStephen M. Cameron goto cleanup1; 6728edd16368SStephen M. Cameron } 67299233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6730edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 67310758f4f7SStephen M. Cameron status = -EFAULT; 6732edd16368SStephen M. Cameron goto cleanup1; 6733edd16368SStephen M. Cameron } 6734edd16368SStephen M. Cameron } else 6735edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6736edd16368SStephen M. Cameron left -= sz; 6737edd16368SStephen M. Cameron data_ptr += sz; 6738edd16368SStephen M. Cameron sg_used++; 6739edd16368SStephen M. Cameron } 674045fcb86eSStephen Cameron c = cmd_alloc(h); 6741bf43caf3SRobert Elliott 6742edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6743a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6744edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 674550a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 674650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6747edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6748edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6749edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6750edd16368SStephen M. Cameron int i; 6751edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 675250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6753edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 675450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 675550a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 675650a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 675750a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6758bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6759bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6760bcc48ffaSStephen M. Cameron status = -ENOMEM; 6761e2d4a1f6SStephen M. Cameron goto cleanup0; 6762bcc48ffaSStephen M. Cameron } 676350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 676450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 676550a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6766edd16368SStephen M. Cameron } 676750a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6768edd16368SStephen M. Cameron } 6769c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 67703fb134cbSDon Brace NO_TIMEOUT); 6771b03a7771SStephen M. Cameron if (sg_used) 6772edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6773edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 677425163bd5SWebb Scales if (status) { 677525163bd5SWebb Scales status = -EIO; 677625163bd5SWebb Scales goto cleanup0; 677725163bd5SWebb Scales } 677825163bd5SWebb Scales 6779edd16368SStephen M. Cameron /* Copy the error information out */ 6780edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6781edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6782edd16368SStephen M. Cameron status = -EFAULT; 6783e2d4a1f6SStephen M. Cameron goto cleanup0; 6784edd16368SStephen M. Cameron } 67859233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 67862b08b3e9SDon Brace int i; 67872b08b3e9SDon Brace 6788edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6789edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6790edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6791edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6792edd16368SStephen M. Cameron status = -EFAULT; 6793e2d4a1f6SStephen M. Cameron goto cleanup0; 6794edd16368SStephen M. Cameron } 6795edd16368SStephen M. Cameron ptr += buff_size[i]; 6796edd16368SStephen M. Cameron } 6797edd16368SStephen M. Cameron } 6798edd16368SStephen M. Cameron status = 0; 6799e2d4a1f6SStephen M. Cameron cleanup0: 680045fcb86eSStephen Cameron cmd_free(h, c); 6801edd16368SStephen M. Cameron cleanup1: 6802edd16368SStephen M. Cameron if (buff) { 68032b08b3e9SDon Brace int i; 68042b08b3e9SDon Brace 6805edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6806edd16368SStephen M. Cameron kfree(buff[i]); 6807edd16368SStephen M. Cameron kfree(buff); 6808edd16368SStephen M. Cameron } 6809edd16368SStephen M. Cameron kfree(buff_size); 6810edd16368SStephen M. Cameron kfree(ioc); 6811edd16368SStephen M. Cameron return status; 6812edd16368SStephen M. Cameron } 6813edd16368SStephen M. Cameron 6814edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6815edd16368SStephen M. Cameron struct CommandList *c) 6816edd16368SStephen M. Cameron { 6817edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6818edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6819edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6820edd16368SStephen M. Cameron } 68210390f0c0SStephen M. Cameron 6822edd16368SStephen M. Cameron /* 6823edd16368SStephen M. Cameron * ioctl 6824edd16368SStephen M. Cameron */ 682542a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6826edd16368SStephen M. Cameron { 6827edd16368SStephen M. Cameron struct ctlr_info *h; 6828edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 68290390f0c0SStephen M. Cameron int rc; 6830edd16368SStephen M. Cameron 6831edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6832edd16368SStephen M. Cameron 6833edd16368SStephen M. Cameron switch (cmd) { 6834edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6835edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6836edd16368SStephen M. Cameron case CCISS_REGNEWD: 6837a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6838edd16368SStephen M. Cameron return 0; 6839edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6840edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6841edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6842edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6843edd16368SStephen M. Cameron case CCISS_PASSTHRU: 684434f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68450390f0c0SStephen M. Cameron return -EAGAIN; 68460390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 684734f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68480390f0c0SStephen M. Cameron return rc; 6849edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 685034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68510390f0c0SStephen M. Cameron return -EAGAIN; 68520390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 685334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68540390f0c0SStephen M. Cameron return rc; 6855edd16368SStephen M. Cameron default: 6856edd16368SStephen M. Cameron return -ENOTTY; 6857edd16368SStephen M. Cameron } 6858edd16368SStephen M. Cameron } 6859edd16368SStephen M. Cameron 6860bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 68616f039790SGreg Kroah-Hartman u8 reset_type) 686264670ac8SStephen M. Cameron { 686364670ac8SStephen M. Cameron struct CommandList *c; 686464670ac8SStephen M. Cameron 686564670ac8SStephen M. Cameron c = cmd_alloc(h); 6866bf43caf3SRobert Elliott 6867a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6868a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 686964670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 687064670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 687164670ac8SStephen M. Cameron c->waiting = NULL; 687264670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 687364670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 687464670ac8SStephen M. Cameron * the command either. This is the last command we will send before 687564670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 687664670ac8SStephen M. Cameron */ 6877bf43caf3SRobert Elliott return; 687864670ac8SStephen M. Cameron } 687964670ac8SStephen M. Cameron 6880a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6881b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6882edd16368SStephen M. Cameron int cmd_type) 6883edd16368SStephen M. Cameron { 6884edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 68859b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6886edd16368SStephen M. Cameron 6887edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6888a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6889edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6890edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6891edd16368SStephen M. Cameron c->Header.SGList = 1; 689250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6893edd16368SStephen M. Cameron } else { 6894edd16368SStephen M. Cameron c->Header.SGList = 0; 689550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6896edd16368SStephen M. Cameron } 6897edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6898edd16368SStephen M. Cameron 6899edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6900edd16368SStephen M. Cameron switch (cmd) { 6901edd16368SStephen M. Cameron case HPSA_INQUIRY: 6902edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6903b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6904edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6905b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6906edd16368SStephen M. Cameron } 6907edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6908a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6909a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6910edd16368SStephen M. Cameron c->Request.Timeout = 0; 6911edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6912edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6913edd16368SStephen M. Cameron break; 6914edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6915edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6916edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6917edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6918edd16368SStephen M. Cameron */ 6919edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6920a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6921a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6922edd16368SStephen M. Cameron c->Request.Timeout = 0; 6923edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6924edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6925edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6926edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6927edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6928edd16368SStephen M. Cameron break; 6929c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6930c2adae44SScott Teel c->Request.CDBLen = 16; 6931c2adae44SScott Teel c->Request.type_attr_dir = 6932c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6933c2adae44SScott Teel c->Request.Timeout = 0; 6934c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6935c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6936c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6937c2adae44SScott Teel break; 6938c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6939c2adae44SScott Teel c->Request.CDBLen = 16; 6940c2adae44SScott Teel c->Request.type_attr_dir = 6941c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6942c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6943c2adae44SScott Teel c->Request.Timeout = 0; 6944c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6945c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6946c2adae44SScott Teel break; 6947edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6948edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6949a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6950a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6951a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6952edd16368SStephen M. Cameron c->Request.Timeout = 0; 6953edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6954edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6955bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6956bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6957edd16368SStephen M. Cameron break; 6958edd16368SStephen M. Cameron case TEST_UNIT_READY: 6959edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6960a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6961a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6962edd16368SStephen M. Cameron c->Request.Timeout = 0; 6963edd16368SStephen M. Cameron break; 6964283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6965283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6966a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6967a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6968283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6969283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6970283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6971283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6972283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6973283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6974283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6975283b4a9bSStephen M. Cameron break; 6976316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6977316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6978a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6979a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6980316b221aSStephen M. Cameron c->Request.Timeout = 0; 6981316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6982316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6983316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6984316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6985316b221aSStephen M. Cameron break; 698603383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 698703383736SDon Brace c->Request.CDBLen = 10; 698803383736SDon Brace c->Request.type_attr_dir = 698903383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 699003383736SDon Brace c->Request.Timeout = 0; 699103383736SDon Brace c->Request.CDB[0] = BMIC_READ; 699203383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 699303383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 699403383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 699503383736SDon Brace break; 6996d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6997d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6998d04e62b9SKevin Barnett c->Request.type_attr_dir = 6999d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7000d04e62b9SKevin Barnett c->Request.Timeout = 0; 7001d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 7002d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7003d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 7004d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 7005d04e62b9SKevin Barnett break; 7006cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 7007cca8f13bSDon Brace c->Request.CDBLen = 10; 7008cca8f13bSDon Brace c->Request.type_attr_dir = 7009cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7010cca8f13bSDon Brace c->Request.Timeout = 0; 7011cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 7012cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7013cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 7014cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 7015cca8f13bSDon Brace break; 701666749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 701766749d0dSScott Teel c->Request.CDBLen = 10; 701866749d0dSScott Teel c->Request.type_attr_dir = 701966749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 702066749d0dSScott Teel c->Request.Timeout = 0; 702166749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 702266749d0dSScott Teel c->Request.CDB[1] = 0; 702366749d0dSScott Teel c->Request.CDB[2] = 0; 702466749d0dSScott Teel c->Request.CDB[3] = 0; 702566749d0dSScott Teel c->Request.CDB[4] = 0; 702666749d0dSScott Teel c->Request.CDB[5] = 0; 702766749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 702866749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 702966749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 703066749d0dSScott Teel c->Request.CDB[9] = 0; 703166749d0dSScott Teel break; 7032edd16368SStephen M. Cameron default: 7033edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7034edd16368SStephen M. Cameron BUG(); 7035a2dac136SStephen M. Cameron return -1; 7036edd16368SStephen M. Cameron } 7037edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 7038edd16368SStephen M. Cameron switch (cmd) { 7039edd16368SStephen M. Cameron 70400b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 70410b9b7b6eSScott Teel c->Request.CDBLen = 16; 70420b9b7b6eSScott Teel c->Request.type_attr_dir = 70430b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 70440b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 70450b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 70460b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 70470b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 70480b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 70490b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 70500b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 70510b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 70520b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 70530b9b7b6eSScott Teel break; 7054edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 7055edd16368SStephen M. Cameron c->Request.CDBLen = 16; 7056a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7057a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7058edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 705964670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 706064670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 706121e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7062edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 7063edd16368SStephen M. Cameron /* LunID device */ 7064edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 7065edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 7066edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 7067edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 7068edd16368SStephen M. Cameron break; 706975167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 70709b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 70712b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 70729b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 70739b5c48c2SStephen Cameron tag, c->Header.tag); 707475167d2cSStephen M. Cameron c->Request.CDBLen = 16; 7075a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7076a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 7077a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 707875167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 707975167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 708075167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 708175167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 708275167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 708375167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 70849b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 708575167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 708675167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 708775167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 708875167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 708975167d2cSStephen M. Cameron break; 7090edd16368SStephen M. Cameron default: 7091edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 7092edd16368SStephen M. Cameron cmd); 7093edd16368SStephen M. Cameron BUG(); 7094edd16368SStephen M. Cameron } 7095edd16368SStephen M. Cameron } else { 7096edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7097edd16368SStephen M. Cameron BUG(); 7098edd16368SStephen M. Cameron } 7099edd16368SStephen M. Cameron 7100a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 7101edd16368SStephen M. Cameron case XFER_READ: 7102edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 7103edd16368SStephen M. Cameron break; 7104edd16368SStephen M. Cameron case XFER_WRITE: 7105edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 7106edd16368SStephen M. Cameron break; 7107edd16368SStephen M. Cameron case XFER_NONE: 7108edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 7109edd16368SStephen M. Cameron break; 7110edd16368SStephen M. Cameron default: 7111edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7112edd16368SStephen M. Cameron } 7113a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7114a2dac136SStephen M. Cameron return -1; 7115a2dac136SStephen M. Cameron return 0; 7116edd16368SStephen M. Cameron } 7117edd16368SStephen M. Cameron 7118edd16368SStephen M. Cameron /* 7119edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7120edd16368SStephen M. Cameron */ 7121edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7122edd16368SStephen M. Cameron { 7123edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7124edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7125088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7126088ba34cSStephen M. Cameron page_offs + size); 7127edd16368SStephen M. Cameron 7128edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7129edd16368SStephen M. Cameron } 7130edd16368SStephen M. Cameron 7131254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7132edd16368SStephen M. Cameron { 7133254f796bSMatt Gates return h->access.command_completed(h, q); 7134edd16368SStephen M. Cameron } 7135edd16368SStephen M. Cameron 7136900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7137edd16368SStephen M. Cameron { 7138edd16368SStephen M. Cameron return h->access.intr_pending(h); 7139edd16368SStephen M. Cameron } 7140edd16368SStephen M. Cameron 7141edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7142edd16368SStephen M. Cameron { 714310f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 714410f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7145edd16368SStephen M. Cameron } 7146edd16368SStephen M. Cameron 714701a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 714801a02ffcSStephen M. Cameron u32 raw_tag) 7149edd16368SStephen M. Cameron { 7150edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7151edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7152edd16368SStephen M. Cameron return 1; 7153edd16368SStephen M. Cameron } 7154edd16368SStephen M. Cameron return 0; 7155edd16368SStephen M. Cameron } 7156edd16368SStephen M. Cameron 71575a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7158edd16368SStephen M. Cameron { 7159e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7160c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7161c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 71621fb011fbSStephen M. Cameron complete_scsi_command(c); 71638be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7164edd16368SStephen M. Cameron complete(c->waiting); 7165a104c99fSStephen M. Cameron } 7166a104c99fSStephen M. Cameron 7167303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 71681d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7169303932fdSDon Brace u32 raw_tag) 7170303932fdSDon Brace { 7171303932fdSDon Brace u32 tag_index; 7172303932fdSDon Brace struct CommandList *c; 7173303932fdSDon Brace 7174f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 71751d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7176303932fdSDon Brace c = h->cmd_pool + tag_index; 71775a3d16f5SStephen M. Cameron finish_cmd(c); 71781d94f94dSStephen M. Cameron } 7179303932fdSDon Brace } 7180303932fdSDon Brace 718164670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 718264670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 718364670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 718464670ac8SStephen M. Cameron * functions. 718564670ac8SStephen M. Cameron */ 718664670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 718764670ac8SStephen M. Cameron { 718864670ac8SStephen M. Cameron if (likely(!reset_devices)) 718964670ac8SStephen M. Cameron return 0; 719064670ac8SStephen M. Cameron 719164670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 719264670ac8SStephen M. Cameron return 0; 719364670ac8SStephen M. Cameron 719464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 719564670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 719664670ac8SStephen M. Cameron 719764670ac8SStephen M. Cameron return 1; 719864670ac8SStephen M. Cameron } 719964670ac8SStephen M. Cameron 7200254f796bSMatt Gates /* 7201254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7202254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7203254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7204254f796bSMatt Gates */ 7205254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 720664670ac8SStephen M. Cameron { 7207254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7208254f796bSMatt Gates } 7209254f796bSMatt Gates 7210254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7211254f796bSMatt Gates { 7212254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7213254f796bSMatt Gates u8 q = *(u8 *) queue; 721464670ac8SStephen M. Cameron u32 raw_tag; 721564670ac8SStephen M. Cameron 721664670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 721764670ac8SStephen M. Cameron return IRQ_NONE; 721864670ac8SStephen M. Cameron 721964670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 722064670ac8SStephen M. Cameron return IRQ_NONE; 7221a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 722264670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7223254f796bSMatt Gates raw_tag = get_next_completion(h, q); 722464670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7225254f796bSMatt Gates raw_tag = next_command(h, q); 722664670ac8SStephen M. Cameron } 722764670ac8SStephen M. Cameron return IRQ_HANDLED; 722864670ac8SStephen M. Cameron } 722964670ac8SStephen M. Cameron 7230254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 723164670ac8SStephen M. Cameron { 7232254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 723364670ac8SStephen M. Cameron u32 raw_tag; 7234254f796bSMatt Gates u8 q = *(u8 *) queue; 723564670ac8SStephen M. Cameron 723664670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 723764670ac8SStephen M. Cameron return IRQ_NONE; 723864670ac8SStephen M. Cameron 7239a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7240254f796bSMatt Gates raw_tag = get_next_completion(h, q); 724164670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7242254f796bSMatt Gates raw_tag = next_command(h, q); 724364670ac8SStephen M. Cameron return IRQ_HANDLED; 724464670ac8SStephen M. Cameron } 724564670ac8SStephen M. Cameron 7246254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7247edd16368SStephen M. Cameron { 7248254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7249303932fdSDon Brace u32 raw_tag; 7250254f796bSMatt Gates u8 q = *(u8 *) queue; 7251edd16368SStephen M. Cameron 7252edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7253edd16368SStephen M. Cameron return IRQ_NONE; 7254a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 725510f66018SStephen M. Cameron while (interrupt_pending(h)) { 7256254f796bSMatt Gates raw_tag = get_next_completion(h, q); 725710f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 72581d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7259254f796bSMatt Gates raw_tag = next_command(h, q); 726010f66018SStephen M. Cameron } 726110f66018SStephen M. Cameron } 726210f66018SStephen M. Cameron return IRQ_HANDLED; 726310f66018SStephen M. Cameron } 726410f66018SStephen M. Cameron 7265254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 726610f66018SStephen M. Cameron { 7267254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 726810f66018SStephen M. Cameron u32 raw_tag; 7269254f796bSMatt Gates u8 q = *(u8 *) queue; 727010f66018SStephen M. Cameron 7271a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7272254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7273303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 72741d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7275254f796bSMatt Gates raw_tag = next_command(h, q); 7276edd16368SStephen M. Cameron } 7277edd16368SStephen M. Cameron return IRQ_HANDLED; 7278edd16368SStephen M. Cameron } 7279edd16368SStephen M. Cameron 7280a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7281a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7282a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7283a9a3a273SStephen M. Cameron */ 72846f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7285edd16368SStephen M. Cameron unsigned char type) 7286edd16368SStephen M. Cameron { 7287edd16368SStephen M. Cameron struct Command { 7288edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7289edd16368SStephen M. Cameron struct RequestBlock Request; 7290edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7291edd16368SStephen M. Cameron }; 7292edd16368SStephen M. Cameron struct Command *cmd; 7293edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7294edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7295edd16368SStephen M. Cameron dma_addr_t paddr64; 72962b08b3e9SDon Brace __le32 paddr32; 72972b08b3e9SDon Brace u32 tag; 7298edd16368SStephen M. Cameron void __iomem *vaddr; 7299edd16368SStephen M. Cameron int i, err; 7300edd16368SStephen M. Cameron 7301edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7302edd16368SStephen M. Cameron if (vaddr == NULL) 7303edd16368SStephen M. Cameron return -ENOMEM; 7304edd16368SStephen M. Cameron 7305edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7306edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7307edd16368SStephen M. Cameron * memory. 7308edd16368SStephen M. Cameron */ 7309edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7310edd16368SStephen M. Cameron if (err) { 7311edd16368SStephen M. Cameron iounmap(vaddr); 73121eaec8f3SRobert Elliott return err; 7313edd16368SStephen M. Cameron } 7314edd16368SStephen M. Cameron 7315edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7316edd16368SStephen M. Cameron if (cmd == NULL) { 7317edd16368SStephen M. Cameron iounmap(vaddr); 7318edd16368SStephen M. Cameron return -ENOMEM; 7319edd16368SStephen M. Cameron } 7320edd16368SStephen M. Cameron 7321edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7322edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7323edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7324edd16368SStephen M. Cameron */ 73252b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7326edd16368SStephen M. Cameron 7327edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7328edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 732950a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 73302b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7331edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7332edd16368SStephen M. Cameron 7333edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7334a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7335a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7336edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7337edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7338edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7339edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 734050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 73412b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 734250a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7343edd16368SStephen M. Cameron 73442b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7345edd16368SStephen M. Cameron 7346edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7347edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 73482b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7349edd16368SStephen M. Cameron break; 7350edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7351edd16368SStephen M. Cameron } 7352edd16368SStephen M. Cameron 7353edd16368SStephen M. Cameron iounmap(vaddr); 7354edd16368SStephen M. Cameron 7355edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7356edd16368SStephen M. Cameron * still complete the command. 7357edd16368SStephen M. Cameron */ 7358edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7359edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7360edd16368SStephen M. Cameron opcode, type); 7361edd16368SStephen M. Cameron return -ETIMEDOUT; 7362edd16368SStephen M. Cameron } 7363edd16368SStephen M. Cameron 7364edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7365edd16368SStephen M. Cameron 7366edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7367edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7368edd16368SStephen M. Cameron opcode, type); 7369edd16368SStephen M. Cameron return -EIO; 7370edd16368SStephen M. Cameron } 7371edd16368SStephen M. Cameron 7372edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7373edd16368SStephen M. Cameron opcode, type); 7374edd16368SStephen M. Cameron return 0; 7375edd16368SStephen M. Cameron } 7376edd16368SStephen M. Cameron 7377edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7378edd16368SStephen M. Cameron 73791df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 738042a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7381edd16368SStephen M. Cameron { 7382edd16368SStephen M. Cameron 73831df8552aSStephen M. Cameron if (use_doorbell) { 73841df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 73851df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 73861df8552aSStephen M. Cameron * other way using the doorbell register. 7387edd16368SStephen M. Cameron */ 73881df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7389cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 739085009239SStephen M. Cameron 739100701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 739285009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 739385009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 739485009239SStephen M. Cameron * over in some weird corner cases. 739585009239SStephen M. Cameron */ 739600701a96SJustin Lindley msleep(10000); 73971df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7398edd16368SStephen M. Cameron 7399edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7400edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7401edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7402edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 74031df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 74041df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 74051df8552aSStephen M. Cameron * controller." */ 7406edd16368SStephen M. Cameron 74072662cab8SDon Brace int rc = 0; 74082662cab8SDon Brace 74091df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 74102662cab8SDon Brace 7411edd16368SStephen M. Cameron /* enter the D3hot power management state */ 74122662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 74132662cab8SDon Brace if (rc) 74142662cab8SDon Brace return rc; 7415edd16368SStephen M. Cameron 7416edd16368SStephen M. Cameron msleep(500); 7417edd16368SStephen M. Cameron 7418edd16368SStephen M. Cameron /* enter the D0 power management state */ 74192662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 74202662cab8SDon Brace if (rc) 74212662cab8SDon Brace return rc; 7422c4853efeSMike Miller 7423c4853efeSMike Miller /* 7424c4853efeSMike Miller * The P600 requires a small delay when changing states. 7425c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7426c4853efeSMike Miller * This for kdump only and is particular to the P600. 7427c4853efeSMike Miller */ 7428c4853efeSMike Miller msleep(500); 74291df8552aSStephen M. Cameron } 74301df8552aSStephen M. Cameron return 0; 74311df8552aSStephen M. Cameron } 74321df8552aSStephen M. Cameron 74336f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7434580ada3cSStephen M. Cameron { 7435580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7436f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7437580ada3cSStephen M. Cameron } 7438580ada3cSStephen M. Cameron 74396f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7440580ada3cSStephen M. Cameron { 7441580ada3cSStephen M. Cameron char *driver_version; 7442580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7443580ada3cSStephen M. Cameron 7444580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7445580ada3cSStephen M. Cameron if (!driver_version) 7446580ada3cSStephen M. Cameron return -ENOMEM; 7447580ada3cSStephen M. Cameron 7448580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7449580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7450580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7451580ada3cSStephen M. Cameron kfree(driver_version); 7452580ada3cSStephen M. Cameron return 0; 7453580ada3cSStephen M. Cameron } 7454580ada3cSStephen M. Cameron 74556f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 74566f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7457580ada3cSStephen M. Cameron { 7458580ada3cSStephen M. Cameron int i; 7459580ada3cSStephen M. Cameron 7460580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7461580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7462580ada3cSStephen M. Cameron } 7463580ada3cSStephen M. Cameron 74646f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7465580ada3cSStephen M. Cameron { 7466580ada3cSStephen M. Cameron 7467580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7468580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7469580ada3cSStephen M. Cameron 7470580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7471580ada3cSStephen M. Cameron if (!old_driver_ver) 7472580ada3cSStephen M. Cameron return -ENOMEM; 7473580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7474580ada3cSStephen M. Cameron 7475580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7476580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7477580ada3cSStephen M. Cameron */ 7478580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7479580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7480580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7481580ada3cSStephen M. Cameron kfree(old_driver_ver); 7482580ada3cSStephen M. Cameron return rc; 7483580ada3cSStephen M. Cameron } 74841df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 74851df8552aSStephen M. Cameron * states or the using the doorbell register. 74861df8552aSStephen M. Cameron */ 74876b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 74881df8552aSStephen M. Cameron { 74891df8552aSStephen M. Cameron u64 cfg_offset; 74901df8552aSStephen M. Cameron u32 cfg_base_addr; 74911df8552aSStephen M. Cameron u64 cfg_base_addr_index; 74921df8552aSStephen M. Cameron void __iomem *vaddr; 74931df8552aSStephen M. Cameron unsigned long paddr; 7494580ada3cSStephen M. Cameron u32 misc_fw_support; 7495270d05deSStephen M. Cameron int rc; 74961df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7497cf0b08d0SStephen M. Cameron u32 use_doorbell; 7498270d05deSStephen M. Cameron u16 command_register; 74991df8552aSStephen M. Cameron 75001df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 75011df8552aSStephen M. Cameron * the same thing as 75021df8552aSStephen M. Cameron * 75031df8552aSStephen M. Cameron * pci_save_state(pci_dev); 75041df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 75051df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 75061df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 75071df8552aSStephen M. Cameron * 75081df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 75091df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 75101df8552aSStephen M. Cameron * using the doorbell register. 75111df8552aSStephen M. Cameron */ 751218867659SStephen M. Cameron 751360f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 751460f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 751525c1e56aSStephen M. Cameron return -ENODEV; 751625c1e56aSStephen M. Cameron } 751746380786SStephen M. Cameron 751846380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 751946380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 752046380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 752118867659SStephen M. Cameron 7522270d05deSStephen M. Cameron /* Save the PCI command register */ 7523270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7524270d05deSStephen M. Cameron pci_save_state(pdev); 75251df8552aSStephen M. Cameron 75261df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 75271df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 75281df8552aSStephen M. Cameron if (rc) 75291df8552aSStephen M. Cameron return rc; 75301df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 75311df8552aSStephen M. Cameron if (!vaddr) 75321df8552aSStephen M. Cameron return -ENOMEM; 75331df8552aSStephen M. Cameron 75341df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 75351df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 75361df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 75371df8552aSStephen M. Cameron if (rc) 75381df8552aSStephen M. Cameron goto unmap_vaddr; 75391df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 75401df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 75411df8552aSStephen M. Cameron if (!cfgtable) { 75421df8552aSStephen M. Cameron rc = -ENOMEM; 75431df8552aSStephen M. Cameron goto unmap_vaddr; 75441df8552aSStephen M. Cameron } 7545580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7546580ada3cSStephen M. Cameron if (rc) 754703741d95STomas Henzl goto unmap_cfgtable; 75481df8552aSStephen M. Cameron 7549cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7550cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7551cf0b08d0SStephen M. Cameron */ 75521df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7553cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7554cf0b08d0SStephen M. Cameron if (use_doorbell) { 7555cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7556cf0b08d0SStephen M. Cameron } else { 75571df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7558cf0b08d0SStephen M. Cameron if (use_doorbell) { 7559050f7147SStephen Cameron dev_warn(&pdev->dev, 7560050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 756164670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7562cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7563cf0b08d0SStephen M. Cameron } 7564cf0b08d0SStephen M. Cameron } 75651df8552aSStephen M. Cameron 75661df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 75671df8552aSStephen M. Cameron if (rc) 75681df8552aSStephen M. Cameron goto unmap_cfgtable; 7569edd16368SStephen M. Cameron 7570270d05deSStephen M. Cameron pci_restore_state(pdev); 7571270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7572edd16368SStephen M. Cameron 75731df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 75741df8552aSStephen M. Cameron need a little pause here */ 75751df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 75761df8552aSStephen M. Cameron 7577fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7578fe5389c8SStephen M. Cameron if (rc) { 7579fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7580050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7581fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7582fe5389c8SStephen M. Cameron } 7583fe5389c8SStephen M. Cameron 7584580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7585580ada3cSStephen M. Cameron if (rc < 0) 7586580ada3cSStephen M. Cameron goto unmap_cfgtable; 7587580ada3cSStephen M. Cameron if (rc) { 758864670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 758964670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 759064670ac8SStephen M. Cameron rc = -ENOTSUPP; 7591580ada3cSStephen M. Cameron } else { 759264670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 75931df8552aSStephen M. Cameron } 75941df8552aSStephen M. Cameron 75951df8552aSStephen M. Cameron unmap_cfgtable: 75961df8552aSStephen M. Cameron iounmap(cfgtable); 75971df8552aSStephen M. Cameron 75981df8552aSStephen M. Cameron unmap_vaddr: 75991df8552aSStephen M. Cameron iounmap(vaddr); 76001df8552aSStephen M. Cameron return rc; 7601edd16368SStephen M. Cameron } 7602edd16368SStephen M. Cameron 7603edd16368SStephen M. Cameron /* 7604edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7605edd16368SStephen M. Cameron * the io functions. 7606edd16368SStephen M. Cameron * This is for debug only. 7607edd16368SStephen M. Cameron */ 760842a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7609edd16368SStephen M. Cameron { 761058f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7611edd16368SStephen M. Cameron int i; 7612edd16368SStephen M. Cameron char temp_name[17]; 7613edd16368SStephen M. Cameron 7614edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7615edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7616edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7617edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7618edd16368SStephen M. Cameron temp_name[4] = '\0'; 7619edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7620edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7621edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7622edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7623edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7624edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7625edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7626edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7627edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7628edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7629edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7630edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 763169d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7632edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7633edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7634edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7635edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7636edd16368SStephen M. Cameron temp_name[16] = '\0'; 7637edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7638edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7639edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7640edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 764158f8665cSStephen M. Cameron } 7642edd16368SStephen M. Cameron 7643edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7644edd16368SStephen M. Cameron { 7645edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7646edd16368SStephen M. Cameron 7647edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7648edd16368SStephen M. Cameron return 0; 7649edd16368SStephen M. Cameron offset = 0; 7650edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7651edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7652edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7653edd16368SStephen M. Cameron offset += 4; 7654edd16368SStephen M. Cameron else { 7655edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7656edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7657edd16368SStephen M. Cameron switch (mem_type) { 7658edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7659edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7660edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7661edd16368SStephen M. Cameron break; 7662edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7663edd16368SStephen M. Cameron offset += 8; 7664edd16368SStephen M. Cameron break; 7665edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7666edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7667edd16368SStephen M. Cameron "base address is invalid\n"); 7668edd16368SStephen M. Cameron return -1; 7669edd16368SStephen M. Cameron break; 7670edd16368SStephen M. Cameron } 7671edd16368SStephen M. Cameron } 7672edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7673edd16368SStephen M. Cameron return i + 1; 7674edd16368SStephen M. Cameron } 7675edd16368SStephen M. Cameron return -1; 7676edd16368SStephen M. Cameron } 7677edd16368SStephen M. Cameron 7678cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7679cc64c817SRobert Elliott { 7680bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7681bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7682cc64c817SRobert Elliott } 7683cc64c817SRobert Elliott 7684edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7685050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7686edd16368SStephen M. Cameron */ 7687bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7688edd16368SStephen M. Cameron { 7689bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7690bc2bb154SChristoph Hellwig int ret; 7691edd16368SStephen M. Cameron 7692edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7693bc2bb154SChristoph Hellwig switch (h->board_id) { 7694bc2bb154SChristoph Hellwig case 0x40700E11: 7695bc2bb154SChristoph Hellwig case 0x40800E11: 7696bc2bb154SChristoph Hellwig case 0x40820E11: 7697bc2bb154SChristoph Hellwig case 0x40830E11: 7698bc2bb154SChristoph Hellwig break; 7699bc2bb154SChristoph Hellwig default: 7700bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7701bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7702bc2bb154SChristoph Hellwig if (ret > 0) { 7703bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7704bc2bb154SChristoph Hellwig return 0; 7705eee0f03aSHannes Reinecke } 7706bc2bb154SChristoph Hellwig 7707bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7708bc2bb154SChristoph Hellwig break; 7709edd16368SStephen M. Cameron } 7710bc2bb154SChristoph Hellwig 7711bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7712bc2bb154SChristoph Hellwig if (ret < 0) 7713bc2bb154SChristoph Hellwig return ret; 7714bc2bb154SChristoph Hellwig return 0; 7715edd16368SStephen M. Cameron } 7716edd16368SStephen M. Cameron 77176f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7718e5c880d1SStephen M. Cameron { 7719e5c880d1SStephen M. Cameron int i; 7720e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7721e5c880d1SStephen M. Cameron 7722e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7723e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7724e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7725e5c880d1SStephen M. Cameron subsystem_vendor_id; 7726e5c880d1SStephen M. Cameron 7727e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7728e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7729e5c880d1SStephen M. Cameron return i; 7730e5c880d1SStephen M. Cameron 77316798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 77326798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 77336798cc0aSStephen M. Cameron !hpsa_allow_any) { 7734e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7735e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7736e5c880d1SStephen M. Cameron return -ENODEV; 7737e5c880d1SStephen M. Cameron } 7738e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7739e5c880d1SStephen M. Cameron } 7740e5c880d1SStephen M. Cameron 77416f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 77423a7774ceSStephen M. Cameron unsigned long *memory_bar) 77433a7774ceSStephen M. Cameron { 77443a7774ceSStephen M. Cameron int i; 77453a7774ceSStephen M. Cameron 77463a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 774712d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 77483a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 774912d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 775012d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 77513a7774ceSStephen M. Cameron *memory_bar); 77523a7774ceSStephen M. Cameron return 0; 77533a7774ceSStephen M. Cameron } 775412d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 77553a7774ceSStephen M. Cameron return -ENODEV; 77563a7774ceSStephen M. Cameron } 77573a7774ceSStephen M. Cameron 77586f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 77596f039790SGreg Kroah-Hartman int wait_for_ready) 77602c4c8c8bSStephen M. Cameron { 7761fe5389c8SStephen M. Cameron int i, iterations; 77622c4c8c8bSStephen M. Cameron u32 scratchpad; 7763fe5389c8SStephen M. Cameron if (wait_for_ready) 7764fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7765fe5389c8SStephen M. Cameron else 7766fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 77672c4c8c8bSStephen M. Cameron 7768fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7769fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7770fe5389c8SStephen M. Cameron if (wait_for_ready) { 77712c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 77722c4c8c8bSStephen M. Cameron return 0; 7773fe5389c8SStephen M. Cameron } else { 7774fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7775fe5389c8SStephen M. Cameron return 0; 7776fe5389c8SStephen M. Cameron } 77772c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 77782c4c8c8bSStephen M. Cameron } 7779fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 77802c4c8c8bSStephen M. Cameron return -ENODEV; 77812c4c8c8bSStephen M. Cameron } 77822c4c8c8bSStephen M. Cameron 77836f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 77846f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7785a51fd47fSStephen M. Cameron u64 *cfg_offset) 7786a51fd47fSStephen M. Cameron { 7787a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7788a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7789a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7790a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7791a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7792a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7793a51fd47fSStephen M. Cameron return -ENODEV; 7794a51fd47fSStephen M. Cameron } 7795a51fd47fSStephen M. Cameron return 0; 7796a51fd47fSStephen M. Cameron } 7797a51fd47fSStephen M. Cameron 7798195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7799195f2c65SRobert Elliott { 7800105a3dbcSRobert Elliott if (h->transtable) { 7801195f2c65SRobert Elliott iounmap(h->transtable); 7802105a3dbcSRobert Elliott h->transtable = NULL; 7803105a3dbcSRobert Elliott } 7804105a3dbcSRobert Elliott if (h->cfgtable) { 7805195f2c65SRobert Elliott iounmap(h->cfgtable); 7806105a3dbcSRobert Elliott h->cfgtable = NULL; 7807105a3dbcSRobert Elliott } 7808195f2c65SRobert Elliott } 7809195f2c65SRobert Elliott 7810195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7811195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7812195f2c65SRobert Elliott + * */ 78136f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7814edd16368SStephen M. Cameron { 781501a02ffcSStephen M. Cameron u64 cfg_offset; 781601a02ffcSStephen M. Cameron u32 cfg_base_addr; 781701a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7818303932fdSDon Brace u32 trans_offset; 7819a51fd47fSStephen M. Cameron int rc; 782077c4495cSStephen M. Cameron 7821a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7822a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7823a51fd47fSStephen M. Cameron if (rc) 7824a51fd47fSStephen M. Cameron return rc; 782577c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7826a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7827cd3c81c4SRobert Elliott if (!h->cfgtable) { 7828cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 782977c4495cSStephen M. Cameron return -ENOMEM; 7830cd3c81c4SRobert Elliott } 7831580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7832580ada3cSStephen M. Cameron if (rc) 7833580ada3cSStephen M. Cameron return rc; 783477c4495cSStephen M. Cameron /* Find performant mode table. */ 7835a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 783677c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 783777c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 783877c4495cSStephen M. Cameron sizeof(*h->transtable)); 7839195f2c65SRobert Elliott if (!h->transtable) { 7840195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7841195f2c65SRobert Elliott hpsa_free_cfgtables(h); 784277c4495cSStephen M. Cameron return -ENOMEM; 7843195f2c65SRobert Elliott } 784477c4495cSStephen M. Cameron return 0; 784577c4495cSStephen M. Cameron } 784677c4495cSStephen M. Cameron 78476f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7848cba3d38bSStephen M. Cameron { 784941ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 785041ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 785141ce4c35SStephen Cameron 785241ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 785372ceeaecSStephen M. Cameron 785472ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 785572ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 785672ceeaecSStephen M. Cameron h->max_commands = 32; 785772ceeaecSStephen M. Cameron 785841ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 785941ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 786041ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 786141ce4c35SStephen Cameron h->max_commands, 786241ce4c35SStephen Cameron MIN_MAX_COMMANDS); 786341ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7864cba3d38bSStephen M. Cameron } 7865cba3d38bSStephen M. Cameron } 7866cba3d38bSStephen M. Cameron 7867c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7868c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7869c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7870c7ee65b3SWebb Scales */ 7871c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7872c7ee65b3SWebb Scales { 7873c7ee65b3SWebb Scales return h->maxsgentries > 512; 7874c7ee65b3SWebb Scales } 7875c7ee65b3SWebb Scales 7876b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7877b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7878b93d7536SStephen M. Cameron * SG chain block size, etc. 7879b93d7536SStephen M. Cameron */ 78806f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7881b93d7536SStephen M. Cameron { 7882cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 788345fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7884b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7885283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7886c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7887c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7888b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 78891a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7890b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7891b93d7536SStephen M. Cameron } else { 7892c7ee65b3SWebb Scales /* 7893c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7894c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7895c7ee65b3SWebb Scales * would lock up the controller) 7896c7ee65b3SWebb Scales */ 7897c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 78981a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7899c7ee65b3SWebb Scales h->chainsize = 0; 7900b93d7536SStephen M. Cameron } 790175167d2cSStephen M. Cameron 790275167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 790375167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 79040e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 79050e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 79060e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 79070e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 79088be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 79098be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7910b93d7536SStephen M. Cameron } 7911b93d7536SStephen M. Cameron 791276c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 791376c46e49SStephen M. Cameron { 79140fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7915050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 791676c46e49SStephen M. Cameron return false; 791776c46e49SStephen M. Cameron } 791876c46e49SStephen M. Cameron return true; 791976c46e49SStephen M. Cameron } 792076c46e49SStephen M. Cameron 792197a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7922f7c39101SStephen M. Cameron { 792397a5e98cSStephen M. Cameron u32 driver_support; 7924f7c39101SStephen M. Cameron 792597a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 79260b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 79270b9e7b74SArnd Bergmann #ifdef CONFIG_X86 792897a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7929f7c39101SStephen M. Cameron #endif 793028e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 793128e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7932f7c39101SStephen M. Cameron } 7933f7c39101SStephen M. Cameron 79343d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 79353d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 79363d0eab67SStephen M. Cameron */ 79373d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 79383d0eab67SStephen M. Cameron { 79393d0eab67SStephen M. Cameron u32 dma_prefetch; 79403d0eab67SStephen M. Cameron 79413d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 79423d0eab67SStephen M. Cameron return; 79433d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 79443d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 79453d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 79463d0eab67SStephen M. Cameron } 79473d0eab67SStephen M. Cameron 7948c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 794976438d08SStephen M. Cameron { 795076438d08SStephen M. Cameron int i; 795176438d08SStephen M. Cameron u32 doorbell_value; 795276438d08SStephen M. Cameron unsigned long flags; 795376438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7954007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 795576438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 795676438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 795776438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 795876438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7959c706a795SRobert Elliott goto done; 796076438d08SStephen M. Cameron /* delay and try again */ 7961007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 796276438d08SStephen M. Cameron } 7963c706a795SRobert Elliott return -ENODEV; 7964c706a795SRobert Elliott done: 7965c706a795SRobert Elliott return 0; 796676438d08SStephen M. Cameron } 796776438d08SStephen M. Cameron 7968c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7969eb6b2ae9SStephen M. Cameron { 7970eb6b2ae9SStephen M. Cameron int i; 79716eaf46fdSStephen M. Cameron u32 doorbell_value; 79726eaf46fdSStephen M. Cameron unsigned long flags; 7973eb6b2ae9SStephen M. Cameron 7974eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7975eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7976eb6b2ae9SStephen M. Cameron * as we enter this code.) 7977eb6b2ae9SStephen M. Cameron */ 7978007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 797925163bd5SWebb Scales if (h->remove_in_progress) 798025163bd5SWebb Scales goto done; 79816eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 79826eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 79836eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7984382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7985c706a795SRobert Elliott goto done; 7986eb6b2ae9SStephen M. Cameron /* delay and try again */ 7987007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7988eb6b2ae9SStephen M. Cameron } 7989c706a795SRobert Elliott return -ENODEV; 7990c706a795SRobert Elliott done: 7991c706a795SRobert Elliott return 0; 79923f4336f3SStephen M. Cameron } 79933f4336f3SStephen M. Cameron 7994c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 79956f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 79963f4336f3SStephen M. Cameron { 79973f4336f3SStephen M. Cameron u32 trans_support; 79983f4336f3SStephen M. Cameron 79993f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 80003f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 80013f4336f3SStephen M. Cameron return -ENOTSUPP; 80023f4336f3SStephen M. Cameron 80033f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8004283b4a9bSStephen M. Cameron 80053f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 80063f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8007b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 80083f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8009c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 8010c706a795SRobert Elliott goto error; 8011eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 8012283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8013283b4a9bSStephen M. Cameron goto error; 8014960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 8015eb6b2ae9SStephen M. Cameron return 0; 8016283b4a9bSStephen M. Cameron error: 8017050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8018283b4a9bSStephen M. Cameron return -ENODEV; 8019eb6b2ae9SStephen M. Cameron } 8020eb6b2ae9SStephen M. Cameron 8021195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 8022195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 8023195f2c65SRobert Elliott { 8024195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 8025195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 8026105a3dbcSRobert Elliott h->vaddr = NULL; 8027195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8028943a7021SRobert Elliott /* 8029943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8030943a7021SRobert Elliott * Documentation/PCI/pci.txt 8031943a7021SRobert Elliott */ 8032195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 8033943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 8034195f2c65SRobert Elliott } 8035195f2c65SRobert Elliott 8036195f2c65SRobert Elliott /* several items must be freed later */ 80376f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 803877c4495cSStephen M. Cameron { 8039eb6b2ae9SStephen M. Cameron int prod_index, err; 8040edd16368SStephen M. Cameron 8041e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8042e5c880d1SStephen M. Cameron if (prod_index < 0) 804360f923b9SRobert Elliott return prod_index; 8044e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 8045e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 8046e5c880d1SStephen M. Cameron 80479b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 80489b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 80499b5c48c2SStephen Cameron 8050e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8051e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8052e5a44df8SMatthew Garrett 805355c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 8054edd16368SStephen M. Cameron if (err) { 8055195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8056943a7021SRobert Elliott pci_disable_device(h->pdev); 8057edd16368SStephen M. Cameron return err; 8058edd16368SStephen M. Cameron } 8059edd16368SStephen M. Cameron 8060f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 8061edd16368SStephen M. Cameron if (err) { 806255c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 8063195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 8064943a7021SRobert Elliott pci_disable_device(h->pdev); 8065943a7021SRobert Elliott return err; 8066edd16368SStephen M. Cameron } 80674fa604e1SRobert Elliott 80684fa604e1SRobert Elliott pci_set_master(h->pdev); 80694fa604e1SRobert Elliott 8070bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 8071bc2bb154SChristoph Hellwig if (err) 8072bc2bb154SChristoph Hellwig goto clean1; 807312d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 80743a7774ceSStephen M. Cameron if (err) 8075195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8076edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 8077204892e9SStephen M. Cameron if (!h->vaddr) { 8078195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8079204892e9SStephen M. Cameron err = -ENOMEM; 8080195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8081204892e9SStephen M. Cameron } 8082fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 80832c4c8c8bSStephen M. Cameron if (err) 8084195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 808577c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 808677c4495cSStephen M. Cameron if (err) 8087195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8088b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8089edd16368SStephen M. Cameron 809076c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8091edd16368SStephen M. Cameron err = -ENODEV; 8092195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8093edd16368SStephen M. Cameron } 809497a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 80953d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8096eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8097eb6b2ae9SStephen M. Cameron if (err) 8098195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8099edd16368SStephen M. Cameron return 0; 8100edd16368SStephen M. Cameron 8101195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8102195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8103195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8104204892e9SStephen M. Cameron iounmap(h->vaddr); 8105105a3dbcSRobert Elliott h->vaddr = NULL; 8106195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8107195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8108bc2bb154SChristoph Hellwig clean1: 8109943a7021SRobert Elliott /* 8110943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8111943a7021SRobert Elliott * Documentation/PCI/pci.txt 8112943a7021SRobert Elliott */ 8113195f2c65SRobert Elliott pci_disable_device(h->pdev); 8114943a7021SRobert Elliott pci_release_regions(h->pdev); 8115edd16368SStephen M. Cameron return err; 8116edd16368SStephen M. Cameron } 8117edd16368SStephen M. Cameron 81186f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8119339b2b14SStephen M. Cameron { 8120339b2b14SStephen M. Cameron int rc; 8121339b2b14SStephen M. Cameron 8122339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8123339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8124339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8125339b2b14SStephen M. Cameron return; 8126339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8127339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8128339b2b14SStephen M. Cameron if (rc != 0) { 8129339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8130339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8131339b2b14SStephen M. Cameron } 8132339b2b14SStephen M. Cameron } 8133339b2b14SStephen M. Cameron 81346b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8135edd16368SStephen M. Cameron { 81361df8552aSStephen M. Cameron int rc, i; 81373b747298STomas Henzl void __iomem *vaddr; 8138edd16368SStephen M. Cameron 81394c2a8c40SStephen M. Cameron if (!reset_devices) 81404c2a8c40SStephen M. Cameron return 0; 81414c2a8c40SStephen M. Cameron 8142132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8143132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8144132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8145132aa220STomas Henzl */ 8146132aa220STomas Henzl rc = pci_enable_device(pdev); 8147132aa220STomas Henzl if (rc) { 8148132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8149132aa220STomas Henzl return -ENODEV; 8150132aa220STomas Henzl } 8151132aa220STomas Henzl pci_disable_device(pdev); 8152132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8153132aa220STomas Henzl rc = pci_enable_device(pdev); 8154132aa220STomas Henzl if (rc) { 8155132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8156132aa220STomas Henzl return -ENODEV; 8157132aa220STomas Henzl } 81584fa604e1SRobert Elliott 8159859c75abSTomas Henzl pci_set_master(pdev); 81604fa604e1SRobert Elliott 81613b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 81623b747298STomas Henzl if (vaddr == NULL) { 81633b747298STomas Henzl rc = -ENOMEM; 81643b747298STomas Henzl goto out_disable; 81653b747298STomas Henzl } 81663b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 81673b747298STomas Henzl iounmap(vaddr); 81683b747298STomas Henzl 81691df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 81706b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8171edd16368SStephen M. Cameron 81721df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 81731df8552aSStephen M. Cameron * but it's already (and still) up and running in 817418867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 817518867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 81761df8552aSStephen M. Cameron */ 8177adf1b3a3SRobert Elliott if (rc) 8178132aa220STomas Henzl goto out_disable; 8179edd16368SStephen M. Cameron 8180edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 81811ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8182edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8183edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8184edd16368SStephen M. Cameron break; 8185edd16368SStephen M. Cameron else 8186edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8187edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8188edd16368SStephen M. Cameron } 8189132aa220STomas Henzl 8190132aa220STomas Henzl out_disable: 8191132aa220STomas Henzl 8192132aa220STomas Henzl pci_disable_device(pdev); 8193132aa220STomas Henzl return rc; 8194edd16368SStephen M. Cameron } 8195edd16368SStephen M. Cameron 81961fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 81971fb7c98aSRobert Elliott { 81981fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8199105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8200105a3dbcSRobert Elliott if (h->cmd_pool) { 82011fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82021fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 82031fb7c98aSRobert Elliott h->cmd_pool, 82041fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8205105a3dbcSRobert Elliott h->cmd_pool = NULL; 8206105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8207105a3dbcSRobert Elliott } 8208105a3dbcSRobert Elliott if (h->errinfo_pool) { 82091fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82101fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 82111fb7c98aSRobert Elliott h->errinfo_pool, 82121fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8213105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8214105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8215105a3dbcSRobert Elliott } 82161fb7c98aSRobert Elliott } 82171fb7c98aSRobert Elliott 8218d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 82192e9d1b36SStephen M. Cameron { 82202e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 82212e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 82222e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 82232e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 82242e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 82252e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 82262e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 82272e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 82282e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 82292e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 82302e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 82312e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 82322e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 82332c143342SRobert Elliott goto clean_up; 82342e9d1b36SStephen M. Cameron } 8235360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 82362e9d1b36SStephen M. Cameron return 0; 82372c143342SRobert Elliott clean_up: 82382c143342SRobert Elliott hpsa_free_cmd_pool(h); 82392c143342SRobert Elliott return -ENOMEM; 82402e9d1b36SStephen M. Cameron } 82412e9d1b36SStephen M. Cameron 8242ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8243ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8244ec501a18SRobert Elliott { 8245ec501a18SRobert Elliott int i; 8246ec501a18SRobert Elliott 8247bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8248ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 82497dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8250bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8251ec501a18SRobert Elliott return; 8252ec501a18SRobert Elliott } 8253ec501a18SRobert Elliott 8254bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8255bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8256105a3dbcSRobert Elliott h->q[i] = 0; 8257ec501a18SRobert Elliott } 8258a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8259a4e17fc1SRobert Elliott h->q[i] = 0; 8260ec501a18SRobert Elliott } 8261ec501a18SRobert Elliott 82629ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 82639ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 82640ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 82650ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 82660ae01a32SStephen M. Cameron { 8267254f796bSMatt Gates int rc, i; 82680ae01a32SStephen M. Cameron 8269254f796bSMatt Gates /* 8270254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8271254f796bSMatt Gates * queue to process. 8272254f796bSMatt Gates */ 8273254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8274254f796bSMatt Gates h->q[i] = (u8) i; 8275254f796bSMatt Gates 8276bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8277254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8278bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 82798b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8280bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 82818b47004aSRobert Elliott 0, h->intrname[i], 8282254f796bSMatt Gates &h->q[i]); 8283a4e17fc1SRobert Elliott if (rc) { 8284a4e17fc1SRobert Elliott int j; 8285a4e17fc1SRobert Elliott 8286a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8287a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8288bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8289a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8290bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8291a4e17fc1SRobert Elliott h->q[j] = 0; 8292a4e17fc1SRobert Elliott } 8293a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8294a4e17fc1SRobert Elliott h->q[j] = 0; 8295a4e17fc1SRobert Elliott return rc; 8296a4e17fc1SRobert Elliott } 8297a4e17fc1SRobert Elliott } 8298254f796bSMatt Gates } else { 8299254f796bSMatt Gates /* Use single reply pool */ 8300bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8301bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8302bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8303bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83048b47004aSRobert Elliott msixhandler, 0, 8305bc2bb154SChristoph Hellwig h->intrname[0], 8306254f796bSMatt Gates &h->q[h->intr_mode]); 8307254f796bSMatt Gates } else { 83088b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 83098b47004aSRobert Elliott "%s-intx", h->devname); 8310bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83118b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8312bc2bb154SChristoph Hellwig h->intrname[0], 8313254f796bSMatt Gates &h->q[h->intr_mode]); 8314254f796bSMatt Gates } 8315254f796bSMatt Gates } 83160ae01a32SStephen M. Cameron if (rc) { 8317195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8318bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 8319195f2c65SRobert Elliott hpsa_free_irqs(h); 83200ae01a32SStephen M. Cameron return -ENODEV; 83210ae01a32SStephen M. Cameron } 83220ae01a32SStephen M. Cameron return 0; 83230ae01a32SStephen M. Cameron } 83240ae01a32SStephen M. Cameron 83256f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 832664670ac8SStephen M. Cameron { 832739c53f55SRobert Elliott int rc; 8328bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 832964670ac8SStephen M. Cameron 833064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 833139c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 833239c53f55SRobert Elliott if (rc) { 833364670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 833439c53f55SRobert Elliott return rc; 833564670ac8SStephen M. Cameron } 833664670ac8SStephen M. Cameron 833764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 833839c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 833939c53f55SRobert Elliott if (rc) { 834064670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 834164670ac8SStephen M. Cameron "after soft reset.\n"); 834239c53f55SRobert Elliott return rc; 834364670ac8SStephen M. Cameron } 834464670ac8SStephen M. Cameron 834564670ac8SStephen M. Cameron return 0; 834664670ac8SStephen M. Cameron } 834764670ac8SStephen M. Cameron 8348072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8349072b0518SStephen M. Cameron { 8350072b0518SStephen M. Cameron int i; 8351072b0518SStephen M. Cameron 8352072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8353072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8354072b0518SStephen M. Cameron continue; 83551fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 83561fb7c98aSRobert Elliott h->reply_queue_size, 83571fb7c98aSRobert Elliott h->reply_queue[i].head, 83581fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8359072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8360072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8361072b0518SStephen M. Cameron } 8362105a3dbcSRobert Elliott h->reply_queue_size = 0; 8363072b0518SStephen M. Cameron } 8364072b0518SStephen M. Cameron 83650097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 83660097f0f4SStephen M. Cameron { 8367105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8368105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8369105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8370105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83712946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 83722946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 83732946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 83749ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 83759ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 83769ecd953aSRobert Elliott if (h->resubmit_wq) { 83779ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 83789ecd953aSRobert Elliott h->resubmit_wq = NULL; 83799ecd953aSRobert Elliott } 83809ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 83819ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 83829ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 83839ecd953aSRobert Elliott } 8384105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 838564670ac8SStephen M. Cameron } 838664670ac8SStephen M. Cameron 8387a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8388f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8389a0c12413SStephen M. Cameron { 8390281a7fd0SWebb Scales int i, refcount; 8391281a7fd0SWebb Scales struct CommandList *c; 839225163bd5SWebb Scales int failcount = 0; 8393a0c12413SStephen M. Cameron 8394080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8395f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8396f2405db8SDon Brace c = h->cmd_pool + i; 8397281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8398281a7fd0SWebb Scales if (refcount > 1) { 839925163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 84005a3d16f5SStephen M. Cameron finish_cmd(c); 8401433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 840225163bd5SWebb Scales failcount++; 8403a0c12413SStephen M. Cameron } 8404281a7fd0SWebb Scales cmd_free(h, c); 8405281a7fd0SWebb Scales } 840625163bd5SWebb Scales dev_warn(&h->pdev->dev, 840725163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8408a0c12413SStephen M. Cameron } 8409a0c12413SStephen M. Cameron 8410094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8411094963daSStephen M. Cameron { 8412c8ed0010SRusty Russell int cpu; 8413094963daSStephen M. Cameron 8414c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8415094963daSStephen M. Cameron u32 *lockup_detected; 8416094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8417094963daSStephen M. Cameron *lockup_detected = value; 8418094963daSStephen M. Cameron } 8419094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8420094963daSStephen M. Cameron } 8421094963daSStephen M. Cameron 8422a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8423a0c12413SStephen M. Cameron { 8424a0c12413SStephen M. Cameron unsigned long flags; 8425094963daSStephen M. Cameron u32 lockup_detected; 8426a0c12413SStephen M. Cameron 8427a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8428a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8429094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8430094963daSStephen M. Cameron if (!lockup_detected) { 8431094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8432094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 843325163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 843425163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8435094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8436094963daSStephen M. Cameron } 8437094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8438a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 843925163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 844025163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8441a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8442f2405db8SDon Brace fail_all_outstanding_cmds(h); 8443a0c12413SStephen M. Cameron } 8444a0c12413SStephen M. Cameron 844525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8446a0c12413SStephen M. Cameron { 8447a0c12413SStephen M. Cameron u64 now; 8448a0c12413SStephen M. Cameron u32 heartbeat; 8449a0c12413SStephen M. Cameron unsigned long flags; 8450a0c12413SStephen M. Cameron 8451a0c12413SStephen M. Cameron now = get_jiffies_64(); 8452a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8453a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8454e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 845525163bd5SWebb Scales return false; 8456a0c12413SStephen M. Cameron 8457a0c12413SStephen M. Cameron /* 8458a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8459a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8460a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8461a0c12413SStephen M. Cameron */ 8462a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8463e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 846425163bd5SWebb Scales return false; 8465a0c12413SStephen M. Cameron 8466a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8467a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8468a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8469a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8470a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8471a0c12413SStephen M. Cameron controller_lockup_detected(h); 847225163bd5SWebb Scales return true; 8473a0c12413SStephen M. Cameron } 8474a0c12413SStephen M. Cameron 8475a0c12413SStephen M. Cameron /* We're ok. */ 8476a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8477a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 847825163bd5SWebb Scales return false; 8479a0c12413SStephen M. Cameron } 8480a0c12413SStephen M. Cameron 84819846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 848276438d08SStephen M. Cameron { 848376438d08SStephen M. Cameron int i; 848476438d08SStephen M. Cameron char *event_type; 848576438d08SStephen M. Cameron 8486e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8487e4aa3e6aSStephen Cameron return; 8488e4aa3e6aSStephen Cameron 848976438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 84901f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 84911f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 849276438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 849376438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 849476438d08SStephen M. Cameron 849576438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 849676438d08SStephen M. Cameron event_type = "state change"; 849776438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 849876438d08SStephen M. Cameron event_type = "configuration change"; 849976438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 850076438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 85015323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 850276438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 85035323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 85045323ed74SDon Brace } 850523100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 850676438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 850776438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 850876438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 850976438d08SStephen M. Cameron h->events, event_type); 851076438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 851176438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 851276438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 851376438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 851476438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 851576438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 851676438d08SStephen M. Cameron } else { 851776438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 851876438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 851976438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 852076438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 852176438d08SStephen M. Cameron #if 0 852276438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 852376438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 852476438d08SStephen M. Cameron #endif 852576438d08SStephen M. Cameron } 85269846590eSStephen M. Cameron return; 852776438d08SStephen M. Cameron } 852876438d08SStephen M. Cameron 852976438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 853076438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8531e863d68eSScott Teel * we should rescan the controller for devices. 8532e863d68eSScott Teel * Also check flag for driver-initiated rescan. 853376438d08SStephen M. Cameron */ 85349846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 853576438d08SStephen M. Cameron { 8536853633e8SDon Brace if (h->drv_req_rescan) { 8537853633e8SDon Brace h->drv_req_rescan = 0; 8538853633e8SDon Brace return 1; 8539853633e8SDon Brace } 8540853633e8SDon Brace 854176438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 85429846590eSStephen M. Cameron return 0; 854376438d08SStephen M. Cameron 854476438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 85459846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 85469846590eSStephen M. Cameron } 854776438d08SStephen M. Cameron 854876438d08SStephen M. Cameron /* 85499846590eSStephen M. Cameron * Check if any of the offline devices have become ready 855076438d08SStephen M. Cameron */ 85519846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 85529846590eSStephen M. Cameron { 85539846590eSStephen M. Cameron unsigned long flags; 85549846590eSStephen M. Cameron struct offline_device_entry *d; 85559846590eSStephen M. Cameron struct list_head *this, *tmp; 85569846590eSStephen M. Cameron 85579846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 85589846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 85599846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 85609846590eSStephen M. Cameron offline_list); 85619846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8562d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8563d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8564d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8565d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85669846590eSStephen M. Cameron return 1; 8567d1fea47cSStephen M. Cameron } 85689846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 856976438d08SStephen M. Cameron } 85709846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85719846590eSStephen M. Cameron return 0; 85729846590eSStephen M. Cameron } 85739846590eSStephen M. Cameron 857434592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 857534592254SScott Teel { 857634592254SScott Teel int rc = 1; /* assume there are changes */ 857734592254SScott Teel struct ReportLUNdata *logdev = NULL; 857834592254SScott Teel 857934592254SScott Teel /* if we can't find out if lun data has changed, 858034592254SScott Teel * assume that it has. 858134592254SScott Teel */ 858234592254SScott Teel 858334592254SScott Teel if (!h->lastlogicals) 858434592254SScott Teel goto out; 858534592254SScott Teel 858634592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 858734592254SScott Teel if (!logdev) { 858834592254SScott Teel dev_warn(&h->pdev->dev, 858934592254SScott Teel "Out of memory, can't track lun changes.\n"); 859034592254SScott Teel goto out; 859134592254SScott Teel } 859234592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 859334592254SScott Teel dev_warn(&h->pdev->dev, 859434592254SScott Teel "report luns failed, can't track lun changes.\n"); 859534592254SScott Teel goto out; 859634592254SScott Teel } 859734592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 859834592254SScott Teel dev_info(&h->pdev->dev, 859934592254SScott Teel "Lun changes detected.\n"); 860034592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 860134592254SScott Teel goto out; 860234592254SScott Teel } else 860334592254SScott Teel rc = 0; /* no changes detected. */ 860434592254SScott Teel out: 860534592254SScott Teel kfree(logdev); 860634592254SScott Teel return rc; 860734592254SScott Teel } 860834592254SScott Teel 86096636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8610a0c12413SStephen M. Cameron { 8611a0c12413SStephen M. Cameron unsigned long flags; 86128a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 86136636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 86146636e7f4SDon Brace 86156636e7f4SDon Brace 86166636e7f4SDon Brace if (h->remove_in_progress) 86178a98db73SStephen M. Cameron return; 86189846590eSStephen M. Cameron 8619bfd7546cSDon Brace /* 8620bfd7546cSDon Brace * Do the scan after the reset 8621bfd7546cSDon Brace */ 8622bfd7546cSDon Brace if (h->reset_in_progress) { 8623bfd7546cSDon Brace h->drv_req_rescan = 1; 8624bfd7546cSDon Brace return; 8625bfd7546cSDon Brace } 8626bfd7546cSDon Brace 86279846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 86289846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 86299846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 86309846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 86319846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 863234592254SScott Teel } else if (h->discovery_polling) { 8633c2adae44SScott Teel hpsa_disable_rld_caching(h); 863434592254SScott Teel if (hpsa_luns_changed(h)) { 863534592254SScott Teel struct Scsi_Host *sh = NULL; 863634592254SScott Teel 863734592254SScott Teel dev_info(&h->pdev->dev, 863834592254SScott Teel "driver discovery polling rescan.\n"); 863934592254SScott Teel sh = scsi_host_get(h->scsi_host); 864034592254SScott Teel if (sh != NULL) { 864134592254SScott Teel hpsa_scan_start(sh); 864234592254SScott Teel scsi_host_put(sh); 864334592254SScott Teel } 864434592254SScott Teel } 86459846590eSStephen M. Cameron } 86466636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86476636e7f4SDon Brace if (!h->remove_in_progress) 86486636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86496636e7f4SDon Brace h->heartbeat_sample_interval); 86506636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86516636e7f4SDon Brace } 86526636e7f4SDon Brace 86536636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86546636e7f4SDon Brace { 86556636e7f4SDon Brace unsigned long flags; 86566636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86576636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86586636e7f4SDon Brace 86596636e7f4SDon Brace detect_controller_lockup(h); 86606636e7f4SDon Brace if (lockup_detected(h)) 86616636e7f4SDon Brace return; 86629846590eSStephen M. Cameron 86638a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86646636e7f4SDon Brace if (!h->remove_in_progress) 86658a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86668a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86678a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8668a0c12413SStephen M. Cameron } 8669a0c12413SStephen M. Cameron 86706636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86716636e7f4SDon Brace char *name) 86726636e7f4SDon Brace { 86736636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86746636e7f4SDon Brace 8675397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86766636e7f4SDon Brace if (!wq) 86776636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86786636e7f4SDon Brace 86796636e7f4SDon Brace return wq; 86806636e7f4SDon Brace } 86816636e7f4SDon Brace 86826f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86834c2a8c40SStephen M. Cameron { 86844c2a8c40SStephen M. Cameron int dac, rc; 86854c2a8c40SStephen M. Cameron struct ctlr_info *h; 868664670ac8SStephen M. Cameron int try_soft_reset = 0; 868764670ac8SStephen M. Cameron unsigned long flags; 86886b6c1cd7STomas Henzl u32 board_id; 86894c2a8c40SStephen M. Cameron 86904c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86914c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86924c2a8c40SStephen M. Cameron 86936b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 86946b6c1cd7STomas Henzl if (rc < 0) { 86956b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 86966b6c1cd7STomas Henzl return rc; 86976b6c1cd7STomas Henzl } 86986b6c1cd7STomas Henzl 86996b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 870064670ac8SStephen M. Cameron if (rc) { 870164670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 87024c2a8c40SStephen M. Cameron return rc; 870364670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 870464670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 870564670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 870664670ac8SStephen M. Cameron * point that it can accept a command. 870764670ac8SStephen M. Cameron */ 870864670ac8SStephen M. Cameron try_soft_reset = 1; 870964670ac8SStephen M. Cameron rc = 0; 871064670ac8SStephen M. Cameron } 871164670ac8SStephen M. Cameron 871264670ac8SStephen M. Cameron reinit_after_soft_reset: 87134c2a8c40SStephen M. Cameron 8714303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8715303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8716303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8717303932fdSDon Brace */ 8718303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8719edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8720105a3dbcSRobert Elliott if (!h) { 8721105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8722ecd9aad4SStephen M. Cameron return -ENOMEM; 8723105a3dbcSRobert Elliott } 8724edd16368SStephen M. Cameron 872555c06c71SStephen M. Cameron h->pdev = pdev; 8726105a3dbcSRobert Elliott 8727a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 87289846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 87296eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 87309846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 87316eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 873234f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 87339b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8734094963daSStephen M. Cameron 8735094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8736094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87372a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8738105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87392a5ac326SStephen M. Cameron rc = -ENOMEM; 87402efa5929SRobert Elliott goto clean1; /* aer/h */ 87412a5ac326SStephen M. Cameron } 8742094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8743094963daSStephen M. Cameron 874455c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8745105a3dbcSRobert Elliott if (rc) 87462946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8747edd16368SStephen M. Cameron 87482946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87492946e82bSRobert Elliott * interrupt_mode h->intr */ 87502946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87512946e82bSRobert Elliott if (rc) 87522946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87532946e82bSRobert Elliott 87542946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8755edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8756edd16368SStephen M. Cameron number_of_controllers++; 8757edd16368SStephen M. Cameron 8758edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8759ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8760ecd9aad4SStephen M. Cameron if (rc == 0) { 8761edd16368SStephen M. Cameron dac = 1; 8762ecd9aad4SStephen M. Cameron } else { 8763ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8764ecd9aad4SStephen M. Cameron if (rc == 0) { 8765edd16368SStephen M. Cameron dac = 0; 8766ecd9aad4SStephen M. Cameron } else { 8767edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87682946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8769edd16368SStephen M. Cameron } 8770ecd9aad4SStephen M. Cameron } 8771edd16368SStephen M. Cameron 8772edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8773edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 877410f66018SStephen M. Cameron 8775105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8776105a3dbcSRobert Elliott if (rc) 87772946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8778d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87798947fd10SRobert Elliott if (rc) 87802946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8781105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8782105a3dbcSRobert Elliott if (rc) 87832946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8784a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 87859b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8786d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8787d604f533SWebb Scales mutex_init(&h->reset_mutex); 8788a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8789edd16368SStephen M. Cameron 8790edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87919a41338eSStephen M. Cameron h->ndevices = 0; 87922946e82bSRobert Elliott 87939a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8794105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8795105a3dbcSRobert Elliott if (rc) 87962946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 87972946e82bSRobert Elliott 87982efa5929SRobert Elliott /* create the resubmit workqueue */ 87992efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 88002efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 88012efa5929SRobert Elliott rc = -ENOMEM; 88022efa5929SRobert Elliott goto clean7; 88032efa5929SRobert Elliott } 88042efa5929SRobert Elliott 88052efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 88062efa5929SRobert Elliott if (!h->resubmit_wq) { 88072efa5929SRobert Elliott rc = -ENOMEM; 88082efa5929SRobert Elliott goto clean7; /* aer/h */ 88092efa5929SRobert Elliott } 881064670ac8SStephen M. Cameron 8811105a3dbcSRobert Elliott /* 8812105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 881364670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 881464670ac8SStephen M. Cameron * the soft reset and see if that works. 881564670ac8SStephen M. Cameron */ 881664670ac8SStephen M. Cameron if (try_soft_reset) { 881764670ac8SStephen M. Cameron 881864670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 881964670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 882064670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 882164670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 882264670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 882364670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 882464670ac8SStephen M. Cameron */ 882564670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 882664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 882764670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8828ec501a18SRobert Elliott hpsa_free_irqs(h); 88299ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 883064670ac8SStephen M. Cameron hpsa_intx_discard_completions); 883164670ac8SStephen M. Cameron if (rc) { 88329ee61794SRobert Elliott dev_warn(&h->pdev->dev, 88339ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8834d498757cSRobert Elliott /* 8835b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8836b2ef480cSRobert Elliott * again. Instead, do its work 8837b2ef480cSRobert Elliott */ 8838b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8839b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8840b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8841b2ef480cSRobert Elliott /* 8842b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8843b2ef480cSRobert Elliott * was just called before request_irqs failed 8844d498757cSRobert Elliott */ 8845d498757cSRobert Elliott goto clean3; 884664670ac8SStephen M. Cameron } 884764670ac8SStephen M. Cameron 884864670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 884964670ac8SStephen M. Cameron if (rc) 885064670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88517ef7323fSDon Brace goto clean7; 885264670ac8SStephen M. Cameron 885364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 885464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 885564670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 885664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 885764670ac8SStephen M. Cameron msleep(10000); 885864670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 885964670ac8SStephen M. Cameron 886064670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 886164670ac8SStephen M. Cameron if (rc) 886264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 886364670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 886464670ac8SStephen M. Cameron 886564670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 886664670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 886764670ac8SStephen M. Cameron * all over again. 886864670ac8SStephen M. Cameron */ 886964670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 887064670ac8SStephen M. Cameron try_soft_reset = 0; 887164670ac8SStephen M. Cameron if (rc) 8872b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 887364670ac8SStephen M. Cameron return -ENODEV; 887464670ac8SStephen M. Cameron 887564670ac8SStephen M. Cameron goto reinit_after_soft_reset; 887664670ac8SStephen M. Cameron } 8877edd16368SStephen M. Cameron 8878da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8879da0697bdSScott Teel h->acciopath_status = 1; 888034592254SScott Teel /* Disable discovery polling.*/ 888134592254SScott Teel h->discovery_polling = 0; 8882da0697bdSScott Teel 8883e863d68eSScott Teel 8884edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8885edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8886edd16368SStephen M. Cameron 8887339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88888a98db73SStephen M. Cameron 888934592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 889034592254SScott Teel if (!h->lastlogicals) 889134592254SScott Teel dev_info(&h->pdev->dev, 889234592254SScott Teel "Can't track change to report lun data\n"); 889334592254SScott Teel 8894cf477237SDon Brace /* hook into SCSI subsystem */ 8895cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8896cf477237SDon Brace if (rc) 8897cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8898cf477237SDon Brace 88998a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 89008a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 89018a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 89028a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 89038a98db73SStephen M. Cameron h->heartbeat_sample_interval); 89046636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 89056636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 89066636e7f4SDon Brace h->heartbeat_sample_interval); 890788bf6d62SStephen M. Cameron return 0; 8908edd16368SStephen M. Cameron 89092946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8910105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8911105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8912105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 891333a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 89142946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 89152e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 89162946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8917ec501a18SRobert Elliott hpsa_free_irqs(h); 89182946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 89192946e82bSRobert Elliott scsi_host_put(h->scsi_host); 89202946e82bSRobert Elliott h->scsi_host = NULL; 89212946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8922195f2c65SRobert Elliott hpsa_free_pci_init(h); 89232946e82bSRobert Elliott clean2: /* lu, aer/h */ 8924105a3dbcSRobert Elliott if (h->lockup_detected) { 8925094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8926105a3dbcSRobert Elliott h->lockup_detected = NULL; 8927105a3dbcSRobert Elliott } 8928105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8929105a3dbcSRobert Elliott if (h->resubmit_wq) { 8930105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8931105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8932105a3dbcSRobert Elliott } 8933105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8934105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8935105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8936105a3dbcSRobert Elliott } 8937edd16368SStephen M. Cameron kfree(h); 8938ecd9aad4SStephen M. Cameron return rc; 8939edd16368SStephen M. Cameron } 8940edd16368SStephen M. Cameron 8941edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8942edd16368SStephen M. Cameron { 8943edd16368SStephen M. Cameron char *flush_buf; 8944edd16368SStephen M. Cameron struct CommandList *c; 894525163bd5SWebb Scales int rc; 8946702890e3SStephen M. Cameron 8947094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8948702890e3SStephen M. Cameron return; 8949edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8950edd16368SStephen M. Cameron if (!flush_buf) 8951edd16368SStephen M. Cameron return; 8952edd16368SStephen M. Cameron 895345fcb86eSStephen Cameron c = cmd_alloc(h); 8954bf43caf3SRobert Elliott 8955a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8956a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8957a2dac136SStephen M. Cameron goto out; 8958a2dac136SStephen M. Cameron } 895925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8960c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 896125163bd5SWebb Scales if (rc) 896225163bd5SWebb Scales goto out; 8963edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8964a2dac136SStephen M. Cameron out: 8965edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8966edd16368SStephen M. Cameron "error flushing cache on controller\n"); 896745fcb86eSStephen Cameron cmd_free(h, c); 8968edd16368SStephen M. Cameron kfree(flush_buf); 8969edd16368SStephen M. Cameron } 8970edd16368SStephen M. Cameron 8971c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8972c2adae44SScott Teel * send down a report luns request 8973c2adae44SScott Teel */ 8974c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8975c2adae44SScott Teel { 8976c2adae44SScott Teel u32 *options; 8977c2adae44SScott Teel struct CommandList *c; 8978c2adae44SScott Teel int rc; 8979c2adae44SScott Teel 8980c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8981c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8982c2adae44SScott Teel return; 8983c2adae44SScott Teel 8984c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8985c2adae44SScott Teel if (!options) { 8986c2adae44SScott Teel dev_err(&h->pdev->dev, 8987c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8988c2adae44SScott Teel return; 8989c2adae44SScott Teel } 8990c2adae44SScott Teel 8991c2adae44SScott Teel c = cmd_alloc(h); 8992c2adae44SScott Teel 8993c2adae44SScott Teel /* first, get the current diag options settings */ 8994c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8995c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8996c2adae44SScott Teel goto errout; 8997c2adae44SScott Teel 8998c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8999c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9000c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9001c2adae44SScott Teel goto errout; 9002c2adae44SScott Teel 9003c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 9004c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9005c2adae44SScott Teel 9006c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9007c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9008c2adae44SScott Teel goto errout; 9009c2adae44SScott Teel 9010c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9011c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9012c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9013c2adae44SScott Teel goto errout; 9014c2adae44SScott Teel 9015c2adae44SScott Teel /* Now verify that it got set: */ 9016c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9017c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9018c2adae44SScott Teel goto errout; 9019c2adae44SScott Teel 9020c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9021c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9022c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9023c2adae44SScott Teel goto errout; 9024c2adae44SScott Teel 9025d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9026c2adae44SScott Teel goto out; 9027c2adae44SScott Teel 9028c2adae44SScott Teel errout: 9029c2adae44SScott Teel dev_err(&h->pdev->dev, 9030c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 9031c2adae44SScott Teel out: 9032c2adae44SScott Teel cmd_free(h, c); 9033c2adae44SScott Teel kfree(options); 9034c2adae44SScott Teel } 9035c2adae44SScott Teel 9036edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 9037edd16368SStephen M. Cameron { 9038edd16368SStephen M. Cameron struct ctlr_info *h; 9039edd16368SStephen M. Cameron 9040edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9041edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9042edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9043edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9044edd16368SStephen M. Cameron */ 9045edd16368SStephen M. Cameron hpsa_flush_cache(h); 9046edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9047105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9048cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9049edd16368SStephen M. Cameron } 9050edd16368SStephen M. Cameron 90516f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 905255e14e76SStephen M. Cameron { 905355e14e76SStephen M. Cameron int i; 905455e14e76SStephen M. Cameron 9055105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 905655e14e76SStephen M. Cameron kfree(h->dev[i]); 9057105a3dbcSRobert Elliott h->dev[i] = NULL; 9058105a3dbcSRobert Elliott } 905955e14e76SStephen M. Cameron } 906055e14e76SStephen M. Cameron 90616f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9062edd16368SStephen M. Cameron { 9063edd16368SStephen M. Cameron struct ctlr_info *h; 90648a98db73SStephen M. Cameron unsigned long flags; 9065edd16368SStephen M. Cameron 9066edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9067edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9068edd16368SStephen M. Cameron return; 9069edd16368SStephen M. Cameron } 9070edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90718a98db73SStephen M. Cameron 90728a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90738a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90748a98db73SStephen M. Cameron h->remove_in_progress = 1; 90758a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90766636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90776636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90786636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90796636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9080cc64c817SRobert Elliott 90812d041306SDon Brace /* 90822d041306SDon Brace * Call before disabling interrupts. 90832d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90842d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90852d041306SDon Brace * operations which cannot complete and will hang the system. 90862d041306SDon Brace */ 90872d041306SDon Brace if (h->scsi_host) 90882d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9089105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9090195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9091edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9092cc64c817SRobert Elliott 9093105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9094105a3dbcSRobert Elliott 90952946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90962946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 90972946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9098105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9099105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 91001fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 910134592254SScott Teel kfree(h->lastlogicals); 9102105a3dbcSRobert Elliott 9103105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9104195f2c65SRobert Elliott 91052946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 91062946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 91072946e82bSRobert Elliott 9108195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 91092946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9110195f2c65SRobert Elliott 9111105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9112105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9113105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9114d04e62b9SKevin Barnett 9115d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9116d04e62b9SKevin Barnett 9117105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9118edd16368SStephen M. Cameron } 9119edd16368SStephen M. Cameron 9120edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9121edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9122edd16368SStephen M. Cameron { 9123edd16368SStephen M. Cameron return -ENOSYS; 9124edd16368SStephen M. Cameron } 9125edd16368SStephen M. Cameron 9126edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9127edd16368SStephen M. Cameron { 9128edd16368SStephen M. Cameron return -ENOSYS; 9129edd16368SStephen M. Cameron } 9130edd16368SStephen M. Cameron 9131edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9132f79cfec6SStephen M. Cameron .name = HPSA, 9133edd16368SStephen M. Cameron .probe = hpsa_init_one, 91346f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9135edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9136edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9137edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9138edd16368SStephen M. Cameron .resume = hpsa_resume, 9139edd16368SStephen M. Cameron }; 9140edd16368SStephen M. Cameron 9141303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9142303932fdSDon Brace * scatter gather elements supported) and bucket[], 9143303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9144303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9145303932fdSDon Brace * byte increments) which the controller uses to fetch 9146303932fdSDon Brace * commands. This function fills in bucket_map[], which 9147303932fdSDon Brace * maps a given number of scatter gather elements to one of 9148303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9149303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9150303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9151303932fdSDon Brace * bits of the command address. 9152303932fdSDon Brace */ 9153303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91542b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9155303932fdSDon Brace { 9156303932fdSDon Brace int i, j, b, size; 9157303932fdSDon Brace 9158303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9159303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9160303932fdSDon Brace /* Compute size of a command with i SG entries */ 9161e1f7de0cSMatt Gates size = i + min_blocks; 9162303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9163303932fdSDon Brace /* Find the bucket that is just big enough */ 9164e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9165303932fdSDon Brace if (bucket[j] >= size) { 9166303932fdSDon Brace b = j; 9167303932fdSDon Brace break; 9168303932fdSDon Brace } 9169303932fdSDon Brace } 9170303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9171303932fdSDon Brace bucket_map[i] = b; 9172303932fdSDon Brace } 9173303932fdSDon Brace } 9174303932fdSDon Brace 9175105a3dbcSRobert Elliott /* 9176105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9177105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9178105a3dbcSRobert Elliott */ 9179c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9180303932fdSDon Brace { 91816c311b57SStephen M. Cameron int i; 91826c311b57SStephen M. Cameron unsigned long register_value; 9183e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9184e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9185e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9186b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9187b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9188e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9189def342bdSStephen M. Cameron 9190def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9191def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9192def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9193def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9194def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9195def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9196def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9197def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9198def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9199def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9200d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9201def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9202def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9203def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9204def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9205def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9206def342bdSStephen M. Cameron */ 9207d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9208b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9209b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9210b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9211b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9212b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9213b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9214b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9215b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9216b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9217b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9218d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9219303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9220303932fdSDon Brace * 6 = 2 s/g entry or 8k 9221303932fdSDon Brace * 8 = 4 s/g entry or 16k 9222303932fdSDon Brace * 10 = 6 s/g entry or 24k 9223303932fdSDon Brace */ 9224303932fdSDon Brace 9225b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9226b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9227b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9228b3a52e79SStephen M. Cameron */ 9229b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9230b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9231b3a52e79SStephen M. Cameron 9232303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9233072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9234072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9235303932fdSDon Brace 9236d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9237d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9238e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9239303932fdSDon Brace for (i = 0; i < 8; i++) 9240303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9241303932fdSDon Brace 9242303932fdSDon Brace /* size of controller ring buffer */ 9243303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9244254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9245303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9246303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9247254f796bSMatt Gates 9248254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9249254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9250072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9251254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9252254f796bSMatt Gates } 9253254f796bSMatt Gates 9254b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9255e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9256e1f7de0cSMatt Gates /* 9257e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9258e1f7de0cSMatt Gates */ 9259e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9260e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9261e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9262e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9263c349775eSScott Teel } else { 9264c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9265c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9266c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9267c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9268c349775eSScott Teel } 9269e1f7de0cSMatt Gates } 9270303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9271c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9272c706a795SRobert Elliott dev_err(&h->pdev->dev, 9273c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9274c706a795SRobert Elliott return -ENODEV; 9275c706a795SRobert Elliott } 9276303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9277303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9278050f7147SStephen Cameron dev_err(&h->pdev->dev, 9279050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9280c706a795SRobert Elliott return -ENODEV; 9281303932fdSDon Brace } 9282960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9283e1f7de0cSMatt Gates h->access = access; 9284e1f7de0cSMatt Gates h->transMethod = transMethod; 9285e1f7de0cSMatt Gates 9286b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9287b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9288c706a795SRobert Elliott return 0; 9289e1f7de0cSMatt Gates 9290b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9291e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9292e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9293e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9294e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9295e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9296e1f7de0cSMatt Gates } 9297283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9298283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9299e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9300e1f7de0cSMatt Gates 9301e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9302072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9303072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9304072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9305072b0518SStephen M. Cameron h->reply_queue_size); 9306e1f7de0cSMatt Gates 9307e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9308e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9309e1f7de0cSMatt Gates */ 9310e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9311e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9312e1f7de0cSMatt Gates 9313e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9314e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9315e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9316e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9317e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 93182b08b3e9SDon Brace cp->host_context_flags = 93192b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9320e1f7de0cSMatt Gates cp->timeout_sec = 0; 9321e1f7de0cSMatt Gates cp->ReplyQueue = 0; 932250a0decfSStephen M. Cameron cp->tag = 9323f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 932450a0decfSStephen M. Cameron cp->host_addr = 932550a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9326e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9327e1f7de0cSMatt Gates } 9328b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9329b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9330b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9331b9af4937SStephen M. Cameron int rc; 9332b9af4937SStephen M. Cameron 9333b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9334b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9335b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9336b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9337b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9338b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9339b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9340b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9341b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9342b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9343b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9344b9af4937SStephen M. Cameron cfg_base_addr_index) + 9345b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9346b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9347b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9348b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9349b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9350b9af4937SStephen M. Cameron } 9351b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9352c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9353c706a795SRobert Elliott dev_err(&h->pdev->dev, 9354c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9355c706a795SRobert Elliott return -ENODEV; 9356c706a795SRobert Elliott } 9357c706a795SRobert Elliott return 0; 9358e1f7de0cSMatt Gates } 9359e1f7de0cSMatt Gates 93601fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93611fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93621fb7c98aSRobert Elliott { 9363105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93641fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93651fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93661fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93671fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9368105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9369105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9370105a3dbcSRobert Elliott } 93711fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9372105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93731fb7c98aSRobert Elliott } 93741fb7c98aSRobert Elliott 9375d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9376d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9377e1f7de0cSMatt Gates { 9378283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9379283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9380283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9381283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9382283b4a9bSStephen M. Cameron 9383e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9384e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9385e1f7de0cSMatt Gates * hardware. 9386e1f7de0cSMatt Gates */ 9387e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9388e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9389e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9390e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9391e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9392e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9393e1f7de0cSMatt Gates 9394e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9395283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9396e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9397e1f7de0cSMatt Gates 9398e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9399e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9400e1f7de0cSMatt Gates goto clean_up; 9401e1f7de0cSMatt Gates 9402e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9403e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9404e1f7de0cSMatt Gates return 0; 9405e1f7de0cSMatt Gates 9406e1f7de0cSMatt Gates clean_up: 94071fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 94082dd02d74SRobert Elliott return -ENOMEM; 94096c311b57SStephen M. Cameron } 94106c311b57SStephen M. Cameron 94111fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 94121fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 94131fb7c98aSRobert Elliott { 9414d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9415d9a729f3SWebb Scales 9416105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 94171fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 94181fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94191fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 94201fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9421105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9422105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9423105a3dbcSRobert Elliott } 94241fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9425105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 94261fb7c98aSRobert Elliott } 94271fb7c98aSRobert Elliott 9428d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9429d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9430aca9012aSStephen M. Cameron { 9431d9a729f3SWebb Scales int rc; 9432d9a729f3SWebb Scales 9433aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9434aca9012aSStephen M. Cameron 9435aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9436aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9437aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9438aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9439aca9012aSStephen M. Cameron 9440aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9441aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9442aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9443aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9444aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9445aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9446aca9012aSStephen M. Cameron 9447aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9448aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9449aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9450aca9012aSStephen M. Cameron 9451aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9452d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9453d9a729f3SWebb Scales rc = -ENOMEM; 9454d9a729f3SWebb Scales goto clean_up; 9455d9a729f3SWebb Scales } 9456d9a729f3SWebb Scales 9457d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9458d9a729f3SWebb Scales if (rc) 9459aca9012aSStephen M. Cameron goto clean_up; 9460aca9012aSStephen M. Cameron 9461aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9462aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9463aca9012aSStephen M. Cameron return 0; 9464aca9012aSStephen M. Cameron 9465aca9012aSStephen M. Cameron clean_up: 94661fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9467d9a729f3SWebb Scales return rc; 9468aca9012aSStephen M. Cameron } 9469aca9012aSStephen M. Cameron 9470105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9471105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9472105a3dbcSRobert Elliott { 9473105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9474105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9475105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9476105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9477105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9478105a3dbcSRobert Elliott } 9479105a3dbcSRobert Elliott 9480105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9481105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9482105a3dbcSRobert Elliott */ 9483105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94846c311b57SStephen M. Cameron { 94856c311b57SStephen M. Cameron u32 trans_support; 9486e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9487e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9488105a3dbcSRobert Elliott int i, rc; 94896c311b57SStephen M. Cameron 949002ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9491105a3dbcSRobert Elliott return 0; 949202ec19c8SStephen M. Cameron 949367c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 949467c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9495105a3dbcSRobert Elliott return 0; 949667c99a72Sscameron@beardog.cce.hp.com 9497e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9498e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9499e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9500e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9501105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9502105a3dbcSRobert Elliott if (rc) 9503105a3dbcSRobert Elliott return rc; 9504105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9505aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9506aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9507105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9508105a3dbcSRobert Elliott if (rc) 9509105a3dbcSRobert Elliott return rc; 9510e1f7de0cSMatt Gates } 9511e1f7de0cSMatt Gates 9512bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9513cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 95146c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9515072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 95166c311b57SStephen M. Cameron 9517254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9518072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9519072b0518SStephen M. Cameron h->reply_queue_size, 9520072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9521105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9522105a3dbcSRobert Elliott rc = -ENOMEM; 9523105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9524105a3dbcSRobert Elliott } 9525254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9526254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9527254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9528254f796bSMatt Gates } 9529254f796bSMatt Gates 95306c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9531d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95326c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9533105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9534105a3dbcSRobert Elliott rc = -ENOMEM; 9535105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9536105a3dbcSRobert Elliott } 95376c311b57SStephen M. Cameron 9538105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9539105a3dbcSRobert Elliott if (rc) 9540105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9541105a3dbcSRobert Elliott return 0; 9542303932fdSDon Brace 9543105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9544303932fdSDon Brace kfree(h->blockFetchTable); 9545105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9546105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9547105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9548105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9549105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9550105a3dbcSRobert Elliott return rc; 9551303932fdSDon Brace } 9552303932fdSDon Brace 955323100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 955476438d08SStephen M. Cameron { 955523100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 955623100dd9SStephen M. Cameron } 955723100dd9SStephen M. Cameron 955823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 955923100dd9SStephen M. Cameron { 956023100dd9SStephen M. Cameron struct CommandList *c = NULL; 9561f2405db8SDon Brace int i, accel_cmds_out; 9562281a7fd0SWebb Scales int refcount; 956376438d08SStephen M. Cameron 9564f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 956523100dd9SStephen M. Cameron accel_cmds_out = 0; 9566f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9567f2405db8SDon Brace c = h->cmd_pool + i; 9568281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9569281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 957023100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9571281a7fd0SWebb Scales cmd_free(h, c); 9572f2405db8SDon Brace } 957323100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 957476438d08SStephen M. Cameron break; 957576438d08SStephen M. Cameron msleep(100); 957676438d08SStephen M. Cameron } while (1); 957776438d08SStephen M. Cameron } 957876438d08SStephen M. Cameron 9579d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9580d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9581d04e62b9SKevin Barnett { 9582d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9583d04e62b9SKevin Barnett struct sas_phy *phy; 9584d04e62b9SKevin Barnett 9585d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9586d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9587d04e62b9SKevin Barnett return NULL; 9588d04e62b9SKevin Barnett 9589d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9590d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9591d04e62b9SKevin Barnett if (!phy) { 9592d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9593d04e62b9SKevin Barnett return NULL; 9594d04e62b9SKevin Barnett } 9595d04e62b9SKevin Barnett 9596d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9597d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9598d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9599d04e62b9SKevin Barnett 9600d04e62b9SKevin Barnett return hpsa_sas_phy; 9601d04e62b9SKevin Barnett } 9602d04e62b9SKevin Barnett 9603d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9604d04e62b9SKevin Barnett { 9605d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9606d04e62b9SKevin Barnett 9607d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9608d04e62b9SKevin Barnett sas_phy_free(phy); 9609d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9610d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9611d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9612d04e62b9SKevin Barnett } 9613d04e62b9SKevin Barnett 9614d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9615d04e62b9SKevin Barnett { 9616d04e62b9SKevin Barnett int rc; 9617d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9618d04e62b9SKevin Barnett struct sas_phy *phy; 9619d04e62b9SKevin Barnett struct sas_identify *identify; 9620d04e62b9SKevin Barnett 9621d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9622d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9623d04e62b9SKevin Barnett 9624d04e62b9SKevin Barnett identify = &phy->identify; 9625d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9626d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9627d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9628d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9629d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9630d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9631d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9632d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9633d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9634d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9635d04e62b9SKevin Barnett 9636d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9637d04e62b9SKevin Barnett if (rc) 9638d04e62b9SKevin Barnett return rc; 9639d04e62b9SKevin Barnett 9640d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9641d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9642d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9643d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9644d04e62b9SKevin Barnett 9645d04e62b9SKevin Barnett return 0; 9646d04e62b9SKevin Barnett } 9647d04e62b9SKevin Barnett 9648d04e62b9SKevin Barnett static int 9649d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9650d04e62b9SKevin Barnett struct sas_rphy *rphy) 9651d04e62b9SKevin Barnett { 9652d04e62b9SKevin Barnett struct sas_identify *identify; 9653d04e62b9SKevin Barnett 9654d04e62b9SKevin Barnett identify = &rphy->identify; 9655d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9656d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9657d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9658d04e62b9SKevin Barnett 9659d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9660d04e62b9SKevin Barnett } 9661d04e62b9SKevin Barnett 9662d04e62b9SKevin Barnett static struct hpsa_sas_port 9663d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9664d04e62b9SKevin Barnett u64 sas_address) 9665d04e62b9SKevin Barnett { 9666d04e62b9SKevin Barnett int rc; 9667d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9668d04e62b9SKevin Barnett struct sas_port *port; 9669d04e62b9SKevin Barnett 9670d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9671d04e62b9SKevin Barnett if (!hpsa_sas_port) 9672d04e62b9SKevin Barnett return NULL; 9673d04e62b9SKevin Barnett 9674d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9675d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9676d04e62b9SKevin Barnett 9677d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9678d04e62b9SKevin Barnett if (!port) 9679d04e62b9SKevin Barnett goto free_hpsa_port; 9680d04e62b9SKevin Barnett 9681d04e62b9SKevin Barnett rc = sas_port_add(port); 9682d04e62b9SKevin Barnett if (rc) 9683d04e62b9SKevin Barnett goto free_sas_port; 9684d04e62b9SKevin Barnett 9685d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9686d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9687d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9688d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9689d04e62b9SKevin Barnett 9690d04e62b9SKevin Barnett return hpsa_sas_port; 9691d04e62b9SKevin Barnett 9692d04e62b9SKevin Barnett free_sas_port: 9693d04e62b9SKevin Barnett sas_port_free(port); 9694d04e62b9SKevin Barnett free_hpsa_port: 9695d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9696d04e62b9SKevin Barnett 9697d04e62b9SKevin Barnett return NULL; 9698d04e62b9SKevin Barnett } 9699d04e62b9SKevin Barnett 9700d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9701d04e62b9SKevin Barnett { 9702d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9703d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9704d04e62b9SKevin Barnett 9705d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9706d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9707d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9708d04e62b9SKevin Barnett 9709d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9710d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9711d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9712d04e62b9SKevin Barnett } 9713d04e62b9SKevin Barnett 9714d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9715d04e62b9SKevin Barnett { 9716d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9717d04e62b9SKevin Barnett 9718d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9719d04e62b9SKevin Barnett if (hpsa_sas_node) { 9720d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9721d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9722d04e62b9SKevin Barnett } 9723d04e62b9SKevin Barnett 9724d04e62b9SKevin Barnett return hpsa_sas_node; 9725d04e62b9SKevin Barnett } 9726d04e62b9SKevin Barnett 9727d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9728d04e62b9SKevin Barnett { 9729d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9730d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9731d04e62b9SKevin Barnett 9732d04e62b9SKevin Barnett if (!hpsa_sas_node) 9733d04e62b9SKevin Barnett return; 9734d04e62b9SKevin Barnett 9735d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9736d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9737d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9738d04e62b9SKevin Barnett 9739d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9740d04e62b9SKevin Barnett } 9741d04e62b9SKevin Barnett 9742d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9743d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9744d04e62b9SKevin Barnett struct sas_rphy *rphy) 9745d04e62b9SKevin Barnett { 9746d04e62b9SKevin Barnett int i; 9747d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9748d04e62b9SKevin Barnett 9749d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9750d04e62b9SKevin Barnett device = h->dev[i]; 9751d04e62b9SKevin Barnett if (!device->sas_port) 9752d04e62b9SKevin Barnett continue; 9753d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9754d04e62b9SKevin Barnett return device; 9755d04e62b9SKevin Barnett } 9756d04e62b9SKevin Barnett 9757d04e62b9SKevin Barnett return NULL; 9758d04e62b9SKevin Barnett } 9759d04e62b9SKevin Barnett 9760d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9761d04e62b9SKevin Barnett { 9762d04e62b9SKevin Barnett int rc; 9763d04e62b9SKevin Barnett struct device *parent_dev; 9764d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9765d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9766d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9767d04e62b9SKevin Barnett 9768d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9769d04e62b9SKevin Barnett 9770d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9771d04e62b9SKevin Barnett if (!hpsa_sas_node) 9772d04e62b9SKevin Barnett return -ENOMEM; 9773d04e62b9SKevin Barnett 9774d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9775d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9776d04e62b9SKevin Barnett rc = -ENODEV; 9777d04e62b9SKevin Barnett goto free_sas_node; 9778d04e62b9SKevin Barnett } 9779d04e62b9SKevin Barnett 9780d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9781d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9782d04e62b9SKevin Barnett rc = -ENODEV; 9783d04e62b9SKevin Barnett goto free_sas_port; 9784d04e62b9SKevin Barnett } 9785d04e62b9SKevin Barnett 9786d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9787d04e62b9SKevin Barnett if (rc) 9788d04e62b9SKevin Barnett goto free_sas_phy; 9789d04e62b9SKevin Barnett 9790d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9791d04e62b9SKevin Barnett 9792d04e62b9SKevin Barnett return 0; 9793d04e62b9SKevin Barnett 9794d04e62b9SKevin Barnett free_sas_phy: 9795d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9796d04e62b9SKevin Barnett free_sas_port: 9797d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9798d04e62b9SKevin Barnett free_sas_node: 9799d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9800d04e62b9SKevin Barnett 9801d04e62b9SKevin Barnett return rc; 9802d04e62b9SKevin Barnett } 9803d04e62b9SKevin Barnett 9804d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9805d04e62b9SKevin Barnett { 9806d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9807d04e62b9SKevin Barnett } 9808d04e62b9SKevin Barnett 9809d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9810d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9811d04e62b9SKevin Barnett { 9812d04e62b9SKevin Barnett int rc; 9813d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9814d04e62b9SKevin Barnett struct sas_rphy *rphy; 9815d04e62b9SKevin Barnett 9816d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9817d04e62b9SKevin Barnett if (!hpsa_sas_port) 9818d04e62b9SKevin Barnett return -ENOMEM; 9819d04e62b9SKevin Barnett 9820d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9821d04e62b9SKevin Barnett if (!rphy) { 9822d04e62b9SKevin Barnett rc = -ENODEV; 9823d04e62b9SKevin Barnett goto free_sas_port; 9824d04e62b9SKevin Barnett } 9825d04e62b9SKevin Barnett 9826d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9827d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9828d04e62b9SKevin Barnett 9829d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9830d04e62b9SKevin Barnett if (rc) 9831d04e62b9SKevin Barnett goto free_sas_port; 9832d04e62b9SKevin Barnett 9833d04e62b9SKevin Barnett return 0; 9834d04e62b9SKevin Barnett 9835d04e62b9SKevin Barnett free_sas_port: 9836d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9837d04e62b9SKevin Barnett device->sas_port = NULL; 9838d04e62b9SKevin Barnett 9839d04e62b9SKevin Barnett return rc; 9840d04e62b9SKevin Barnett } 9841d04e62b9SKevin Barnett 9842d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9843d04e62b9SKevin Barnett { 9844d04e62b9SKevin Barnett if (device->sas_port) { 9845d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9846d04e62b9SKevin Barnett device->sas_port = NULL; 9847d04e62b9SKevin Barnett } 9848d04e62b9SKevin Barnett } 9849d04e62b9SKevin Barnett 9850d04e62b9SKevin Barnett static int 9851d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9852d04e62b9SKevin Barnett { 9853d04e62b9SKevin Barnett return 0; 9854d04e62b9SKevin Barnett } 9855d04e62b9SKevin Barnett 9856d04e62b9SKevin Barnett static int 9857d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9858d04e62b9SKevin Barnett { 9859aa105695SDan Carpenter *identifier = 0; 9860d04e62b9SKevin Barnett return 0; 9861d04e62b9SKevin Barnett } 9862d04e62b9SKevin Barnett 9863d04e62b9SKevin Barnett static int 9864d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9865d04e62b9SKevin Barnett { 9866d04e62b9SKevin Barnett return -ENXIO; 9867d04e62b9SKevin Barnett } 9868d04e62b9SKevin Barnett 9869d04e62b9SKevin Barnett static int 9870d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9871d04e62b9SKevin Barnett { 9872d04e62b9SKevin Barnett return 0; 9873d04e62b9SKevin Barnett } 9874d04e62b9SKevin Barnett 9875d04e62b9SKevin Barnett static int 9876d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9877d04e62b9SKevin Barnett { 9878d04e62b9SKevin Barnett return 0; 9879d04e62b9SKevin Barnett } 9880d04e62b9SKevin Barnett 9881d04e62b9SKevin Barnett static int 9882d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9883d04e62b9SKevin Barnett { 9884d04e62b9SKevin Barnett return 0; 9885d04e62b9SKevin Barnett } 9886d04e62b9SKevin Barnett 9887d04e62b9SKevin Barnett static void 9888d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9889d04e62b9SKevin Barnett { 9890d04e62b9SKevin Barnett } 9891d04e62b9SKevin Barnett 9892d04e62b9SKevin Barnett static int 9893d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9894d04e62b9SKevin Barnett { 9895d04e62b9SKevin Barnett return -EINVAL; 9896d04e62b9SKevin Barnett } 9897d04e62b9SKevin Barnett 9898d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9899d04e62b9SKevin Barnett static int 9900d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9901d04e62b9SKevin Barnett struct request *req) 9902d04e62b9SKevin Barnett { 9903d04e62b9SKevin Barnett return -EINVAL; 9904d04e62b9SKevin Barnett } 9905d04e62b9SKevin Barnett 9906d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9907d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9908d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9909d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9910d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9911d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9912d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9913d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9914d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9915d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9916d04e62b9SKevin Barnett }; 9917d04e62b9SKevin Barnett 9918edd16368SStephen M. Cameron /* 9919edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9920edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9921edd16368SStephen M. Cameron */ 9922edd16368SStephen M. Cameron static int __init hpsa_init(void) 9923edd16368SStephen M. Cameron { 9924d04e62b9SKevin Barnett int rc; 9925d04e62b9SKevin Barnett 9926d04e62b9SKevin Barnett hpsa_sas_transport_template = 9927d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9928d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9929d04e62b9SKevin Barnett return -ENODEV; 9930d04e62b9SKevin Barnett 9931d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9932d04e62b9SKevin Barnett 9933d04e62b9SKevin Barnett if (rc) 9934d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9935d04e62b9SKevin Barnett 9936d04e62b9SKevin Barnett return rc; 9937edd16368SStephen M. Cameron } 9938edd16368SStephen M. Cameron 9939edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9940edd16368SStephen M. Cameron { 9941edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9942d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9943edd16368SStephen M. Cameron } 9944edd16368SStephen M. Cameron 9945e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9946e1f7de0cSMatt Gates { 9947e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9948dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9949dd0e19f3SScott Teel 9950dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9951dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9952dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9953dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9954dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9955dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9956dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9957dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9958dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9959dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9960dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9961dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9962dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9963dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9964dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9965dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9966dd0e19f3SScott Teel 9967dd0e19f3SScott Teel #undef VERIFY_OFFSET 9968dd0e19f3SScott Teel 9969dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9970b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9971b66cc250SMike Miller 9972b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9973b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9974b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9975b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9976b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9977b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9978b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9979b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9980b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9981b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9982b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9983b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9984b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9985b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9986b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9987b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9988b66cc250SMike Miller 9989b66cc250SMike Miller #undef VERIFY_OFFSET 9990b66cc250SMike Miller 9991b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9992e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9993e1f7de0cSMatt Gates 9994e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9995e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9996e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9997e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9998e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9999e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 10000e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 10001e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 10002e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 10003e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 10004e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 10005e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 10006e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 10007e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 10008e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 10009e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 10010e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 10011e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 10012e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 10013e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 10014e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 10015e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 1001650a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 10017e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 10018e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 10019e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 10020e1f7de0cSMatt Gates #undef VERIFY_OFFSET 10021e1f7de0cSMatt Gates } 10022e1f7de0cSMatt Gates 10023edd16368SStephen M. Cameron module_init(hpsa_init); 10024edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10025