xref: /openbmc/linux/drivers/scsi/hpsa.c (revision 10100ffd5f6584298b72f9fe26f32cf02abfb8b0)
1edd16368SStephen M. Cameron /*
2edd16368SStephen M. Cameron  *    Disk Array driver for HP Smart Array SAS controllers
394c7bc31SDon Brace  *    Copyright 2016 Microsemi Corporation
41358f6dcSDon Brace  *    Copyright 2014-2015 PMC-Sierra, Inc.
51358f6dcSDon Brace  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6edd16368SStephen M. Cameron  *
7edd16368SStephen M. Cameron  *    This program is free software; you can redistribute it and/or modify
8edd16368SStephen M. Cameron  *    it under the terms of the GNU General Public License as published by
9edd16368SStephen M. Cameron  *    the Free Software Foundation; version 2 of the License.
10edd16368SStephen M. Cameron  *
11edd16368SStephen M. Cameron  *    This program is distributed in the hope that it will be useful,
12edd16368SStephen M. Cameron  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13edd16368SStephen M. Cameron  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14edd16368SStephen M. Cameron  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
15edd16368SStephen M. Cameron  *
1694c7bc31SDon Brace  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17edd16368SStephen M. Cameron  *
18edd16368SStephen M. Cameron  */
19edd16368SStephen M. Cameron 
20edd16368SStephen M. Cameron #include <linux/module.h>
21edd16368SStephen M. Cameron #include <linux/interrupt.h>
22edd16368SStephen M. Cameron #include <linux/types.h>
23edd16368SStephen M. Cameron #include <linux/pci.h>
24edd16368SStephen M. Cameron #include <linux/kernel.h>
25edd16368SStephen M. Cameron #include <linux/slab.h>
26edd16368SStephen M. Cameron #include <linux/delay.h>
27edd16368SStephen M. Cameron #include <linux/fs.h>
28edd16368SStephen M. Cameron #include <linux/timer.h>
29edd16368SStephen M. Cameron #include <linux/init.h>
30edd16368SStephen M. Cameron #include <linux/spinlock.h>
31edd16368SStephen M. Cameron #include <linux/compat.h>
32edd16368SStephen M. Cameron #include <linux/blktrace_api.h>
33edd16368SStephen M. Cameron #include <linux/uaccess.h>
34edd16368SStephen M. Cameron #include <linux/io.h>
35edd16368SStephen M. Cameron #include <linux/dma-mapping.h>
36edd16368SStephen M. Cameron #include <linux/completion.h>
37edd16368SStephen M. Cameron #include <linux/moduleparam.h>
38edd16368SStephen M. Cameron #include <scsi/scsi.h>
39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h>
40edd16368SStephen M. Cameron #include <scsi/scsi_device.h>
41edd16368SStephen M. Cameron #include <scsi/scsi_host.h>
42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h>
439437ac43SStephen Cameron #include <scsi/scsi_eh.h>
44d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h>
4573153fe5SWebb Scales #include <scsi/scsi_dbg.h>
46edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h>
47edd16368SStephen M. Cameron #include <linux/string.h>
48edd16368SStephen M. Cameron #include <linux/bitmap.h>
4960063497SArun Sharma #include <linux/atomic.h>
50a0c12413SStephen M. Cameron #include <linux/jiffies.h>
5142a91641SDon Brace #include <linux/percpu-defs.h>
52094963daSStephen M. Cameron #include <linux/percpu.h>
532b08b3e9SDon Brace #include <asm/unaligned.h>
54283b4a9bSStephen M. Cameron #include <asm/div64.h>
55edd16368SStephen M. Cameron #include "hpsa_cmd.h"
56edd16368SStephen M. Cameron #include "hpsa.h"
57edd16368SStephen M. Cameron 
58ec2c3aa9SDon Brace /*
59ec2c3aa9SDon Brace  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
60ec2c3aa9SDon Brace  * with an optional trailing '-' followed by a byte value (0-255).
61ec2c3aa9SDon Brace  */
629a14f9b1SDon Brace #define HPSA_DRIVER_VERSION "3.4.20-170"
63edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
64f79cfec6SStephen M. Cameron #define HPSA "hpsa"
65edd16368SStephen M. Cameron 
66007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */
67007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
68007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
69007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
70007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
71edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000
72edd16368SStephen M. Cameron 
73edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */
74edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3
75b443d3eaSDon Brace /* How long to wait before giving up on a command */
76b443d3eaSDon Brace #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
77edd16368SStephen M. Cameron 
78edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */
79edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company");
80edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
81edd16368SStephen M. Cameron 	HPSA_DRIVER_VERSION);
82edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
83edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION);
84edd16368SStephen M. Cameron MODULE_LICENSE("GPL");
85253d2464SHannes Reinecke MODULE_ALIAS("cciss");
86edd16368SStephen M. Cameron 
8702ec19c8SStephen M. Cameron static int hpsa_simple_mode;
8802ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
8902ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode,
9002ec19c8SStephen M. Cameron 	"Use 'simple mode' rather than 'performant mode'");
91edd16368SStephen M. Cameron 
92edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */
93edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = {
94edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
95edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
96edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
97edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
98edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
99163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
100163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
101f8b01eb9SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
1029143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
1039143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
1049143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
1059143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
1069143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
1079143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
1089143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
1097f1974a7SDon Brace 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1920},
110fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
111fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
112fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
113fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
1147f1974a7SDon Brace 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1925},
115fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
116fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
11797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
11897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
11997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
12097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
12197b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
12297b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
12397b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
12497b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
12597b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
12697b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
1273b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
12897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
12997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
13097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
1313b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
1323b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
1333b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
1343b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
1353b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
136fdfa4b6dSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
1428e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
1438e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
1448e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
1458e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
1468e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
148edd16368SStephen M. Cameron 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149135ae6edSHannes Reinecke 	{PCI_VENDOR_ID_COMPAQ,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
150135ae6edSHannes Reinecke 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151edd16368SStephen M. Cameron 	{0,}
152edd16368SStephen M. Cameron };
153edd16368SStephen M. Cameron 
154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155edd16368SStephen M. Cameron 
156edd16368SStephen M. Cameron /*  board_id = Subsystem Device ID & Vendor ID
157edd16368SStephen M. Cameron  *  product = Marketing Name for the board
158edd16368SStephen M. Cameron  *  access = Address of the struct of function pointers
159edd16368SStephen M. Cameron  */
160edd16368SStephen M. Cameron static struct board_type products[] = {
161135ae6edSHannes Reinecke 	{0x40700E11, "Smart Array 5300", &SA5A_access},
162135ae6edSHannes Reinecke 	{0x40800E11, "Smart Array 5i", &SA5B_access},
163135ae6edSHannes Reinecke 	{0x40820E11, "Smart Array 532", &SA5B_access},
164135ae6edSHannes Reinecke 	{0x40830E11, "Smart Array 5312", &SA5B_access},
165135ae6edSHannes Reinecke 	{0x409A0E11, "Smart Array 641", &SA5A_access},
166135ae6edSHannes Reinecke 	{0x409B0E11, "Smart Array 642", &SA5A_access},
167135ae6edSHannes Reinecke 	{0x409C0E11, "Smart Array 6400", &SA5A_access},
168135ae6edSHannes Reinecke 	{0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169135ae6edSHannes Reinecke 	{0x40910E11, "Smart Array 6i", &SA5A_access},
170135ae6edSHannes Reinecke 	{0x3225103C, "Smart Array P600", &SA5A_access},
171135ae6edSHannes Reinecke 	{0x3223103C, "Smart Array P800", &SA5A_access},
172135ae6edSHannes Reinecke 	{0x3234103C, "Smart Array P400", &SA5A_access},
173135ae6edSHannes Reinecke 	{0x3235103C, "Smart Array P400i", &SA5A_access},
174135ae6edSHannes Reinecke 	{0x3211103C, "Smart Array E200i", &SA5A_access},
175135ae6edSHannes Reinecke 	{0x3212103C, "Smart Array E200", &SA5A_access},
176135ae6edSHannes Reinecke 	{0x3213103C, "Smart Array E200i", &SA5A_access},
177135ae6edSHannes Reinecke 	{0x3214103C, "Smart Array E200i", &SA5A_access},
178135ae6edSHannes Reinecke 	{0x3215103C, "Smart Array E200i", &SA5A_access},
179135ae6edSHannes Reinecke 	{0x3237103C, "Smart Array E500", &SA5A_access},
180135ae6edSHannes Reinecke 	{0x323D103C, "Smart Array P700m", &SA5A_access},
181edd16368SStephen M. Cameron 	{0x3241103C, "Smart Array P212", &SA5_access},
182edd16368SStephen M. Cameron 	{0x3243103C, "Smart Array P410", &SA5_access},
183edd16368SStephen M. Cameron 	{0x3245103C, "Smart Array P410i", &SA5_access},
184edd16368SStephen M. Cameron 	{0x3247103C, "Smart Array P411", &SA5_access},
185edd16368SStephen M. Cameron 	{0x3249103C, "Smart Array P812", &SA5_access},
186163dbcd8SMike Miller 	{0x324A103C, "Smart Array P712m", &SA5_access},
187163dbcd8SMike Miller 	{0x324B103C, "Smart Array P711m", &SA5_access},
1887d2cce58SStephen M. Cameron 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
189fe0c9610SMike Miller 	{0x3350103C, "Smart Array P222", &SA5_access},
190fe0c9610SMike Miller 	{0x3351103C, "Smart Array P420", &SA5_access},
191fe0c9610SMike Miller 	{0x3352103C, "Smart Array P421", &SA5_access},
192fe0c9610SMike Miller 	{0x3353103C, "Smart Array P822", &SA5_access},
193fe0c9610SMike Miller 	{0x3354103C, "Smart Array P420i", &SA5_access},
194fe0c9610SMike Miller 	{0x3355103C, "Smart Array P220i", &SA5_access},
195fe0c9610SMike Miller 	{0x3356103C, "Smart Array P721m", &SA5_access},
1967f1974a7SDon Brace 	{0x1920103C, "Smart Array P430i", &SA5_access},
1971fd6c8e3SMike Miller 	{0x1921103C, "Smart Array P830i", &SA5_access},
1981fd6c8e3SMike Miller 	{0x1922103C, "Smart Array P430", &SA5_access},
1991fd6c8e3SMike Miller 	{0x1923103C, "Smart Array P431", &SA5_access},
2001fd6c8e3SMike Miller 	{0x1924103C, "Smart Array P830", &SA5_access},
2017f1974a7SDon Brace 	{0x1925103C, "Smart Array P831", &SA5_access},
2021fd6c8e3SMike Miller 	{0x1926103C, "Smart Array P731m", &SA5_access},
2031fd6c8e3SMike Miller 	{0x1928103C, "Smart Array P230i", &SA5_access},
2041fd6c8e3SMike Miller 	{0x1929103C, "Smart Array P530", &SA5_access},
20527fb8137SDon Brace 	{0x21BD103C, "Smart Array P244br", &SA5_access},
20627fb8137SDon Brace 	{0x21BE103C, "Smart Array P741m", &SA5_access},
20727fb8137SDon Brace 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
20827fb8137SDon Brace 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
209c8ae0ab1SDon Brace 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
21027fb8137SDon Brace 	{0x21C2103C, "Smart Array P440", &SA5_access},
21127fb8137SDon Brace 	{0x21C3103C, "Smart Array P441", &SA5_access},
21297b9f53dSMike Miller 	{0x21C4103C, "Smart Array", &SA5_access},
21327fb8137SDon Brace 	{0x21C5103C, "Smart Array P841", &SA5_access},
21427fb8137SDon Brace 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
21527fb8137SDon Brace 	{0x21C7103C, "Smart HBA H240", &SA5_access},
21627fb8137SDon Brace 	{0x21C8103C, "Smart HBA H241", &SA5_access},
21797b9f53dSMike Miller 	{0x21C9103C, "Smart Array", &SA5_access},
21827fb8137SDon Brace 	{0x21CA103C, "Smart Array P246br", &SA5_access},
21927fb8137SDon Brace 	{0x21CB103C, "Smart Array P840", &SA5_access},
2203b7a45e5SJoe Handzik 	{0x21CC103C, "Smart Array", &SA5_access},
2213b7a45e5SJoe Handzik 	{0x21CD103C, "Smart Array", &SA5_access},
22227fb8137SDon Brace 	{0x21CE103C, "Smart HBA", &SA5_access},
223fdfa4b6dSDon Brace 	{0x05809005, "SmartHBA-SA", &SA5_access},
224cbb47dcbSDon Brace 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
225cbb47dcbSDon Brace 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226cbb47dcbSDon Brace 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
227cbb47dcbSDon Brace 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
228cbb47dcbSDon Brace 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
2298e616a5eSStephen M. Cameron 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
2308e616a5eSStephen M. Cameron 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
2318e616a5eSStephen M. Cameron 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
2328e616a5eSStephen M. Cameron 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
2338e616a5eSStephen M. Cameron 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234edd16368SStephen M. Cameron 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
235edd16368SStephen M. Cameron };
236edd16368SStephen M. Cameron 
237d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template;
238d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h);
239d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h);
240d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241d04e62b9SKevin Barnett 			struct hpsa_scsi_dev_t *device);
242d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
244d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245d04e62b9SKevin Barnett 		struct sas_rphy *rphy);
246d04e62b9SKevin Barnett 
247a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy;
249a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle;
251edd16368SStephen M. Cameron static int number_of_controllers;
252edd16368SStephen M. Cameron 
25310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
25410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
2556f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
2566f4e626fSNathan Chancellor 		      void __user *arg);
257*10100ffdSAl Viro static int hpsa_passthru_ioctl(struct ctlr_info *h,
258*10100ffdSAl Viro 			       IOCTL_Command_struct *iocommand);
259*10100ffdSAl Viro static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
260*10100ffdSAl Viro 				   BIG_IOCTL_Command_struct *ioc);
261edd16368SStephen M. Cameron 
262edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
2636f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
26442a91641SDon Brace 	void __user *arg);
265edd16368SStephen M. Cameron #endif
266edd16368SStephen M. Cameron 
267edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c);
268edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h);
26973153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
27073153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
27173153fe5SWebb Scales 					    struct scsi_cmnd *scmd);
272a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
273b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
274edd16368SStephen M. Cameron 	int cmd_type);
2752c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h);
276b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8)
277b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03
278edd16368SStephen M. Cameron 
279f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *);
281a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
282a08a8471SStephen M. Cameron 	unsigned long elapsed_time);
2837c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
284edd16368SStephen M. Cameron 
285edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
286edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev);
28741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev);
288edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev);
289edd16368SStephen M. Cameron 
2908aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h);
291edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
292edd16368SStephen M. Cameron 	struct CommandList *c);
293edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
294edd16368SStephen M. Cameron 	struct CommandList *c);
295303932fdSDon Brace /* performant mode helper functions */
296303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets,
2972b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map);
298105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h);
299105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
300254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q);
3016f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
3026f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3031df8552aSStephen M. Cameron 			       u64 *cfg_offset);
3046f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3051df8552aSStephen M. Cameron 				    unsigned long *memory_bar);
306135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
307135ae6edSHannes Reinecke 				bool *legacy_board);
308bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h,
309bfd7546cSDon Brace 					   unsigned char lunaddr[],
310bfd7546cSDon Brace 					   int reply_queue);
3116f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
3126f039790SGreg Kroah-Hartman 				     int wait_for_ready);
31375167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c);
314c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
315fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0
316fe5389c8SStephen M. Cameron #define BOARD_READY 1
31723100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h);
31876438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h);
319c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
320c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
32103383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
322080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work);
32325163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h);
32425163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h);
325c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h);
326d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
327d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *buf, int bufsize);
3288383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3298383278dSScott Teel 	unsigned char scsi3addr[], u8 page);
33034592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h);
331ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
332ba74fdc4SDon Brace 			       struct hpsa_scsi_dev_t *dev,
333ba74fdc4SDon Brace 			       unsigned char *scsi3addr);
334edd16368SStephen M. Cameron 
335edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
336edd16368SStephen M. Cameron {
337edd16368SStephen M. Cameron 	unsigned long *priv = shost_priv(sdev->host);
338edd16368SStephen M. Cameron 	return (struct ctlr_info *) *priv;
339edd16368SStephen M. Cameron }
340edd16368SStephen M. Cameron 
341a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
342a23513e8SStephen M. Cameron {
343a23513e8SStephen M. Cameron 	unsigned long *priv = shost_priv(sh);
344a23513e8SStephen M. Cameron 	return (struct ctlr_info *) *priv;
345a23513e8SStephen M. Cameron }
346a23513e8SStephen M. Cameron 
347a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c)
348a58e7e53SWebb Scales {
349a58e7e53SWebb Scales 	return c->scsi_cmd == SCSI_CMD_IDLE;
350a58e7e53SWebb Scales }
351a58e7e53SWebb Scales 
3529437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
3539437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len,
3549437ac43SStephen Cameron 			u8 *sense_key, u8 *asc, u8 *ascq)
3559437ac43SStephen Cameron {
3569437ac43SStephen Cameron 	struct scsi_sense_hdr sshdr;
3579437ac43SStephen Cameron 	bool rc;
3589437ac43SStephen Cameron 
3599437ac43SStephen Cameron 	*sense_key = -1;
3609437ac43SStephen Cameron 	*asc = -1;
3619437ac43SStephen Cameron 	*ascq = -1;
3629437ac43SStephen Cameron 
3639437ac43SStephen Cameron 	if (sense_data_len < 1)
3649437ac43SStephen Cameron 		return;
3659437ac43SStephen Cameron 
3669437ac43SStephen Cameron 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
3679437ac43SStephen Cameron 	if (rc) {
3689437ac43SStephen Cameron 		*sense_key = sshdr.sense_key;
3699437ac43SStephen Cameron 		*asc = sshdr.asc;
3709437ac43SStephen Cameron 		*ascq = sshdr.ascq;
3719437ac43SStephen Cameron 	}
3729437ac43SStephen Cameron }
3739437ac43SStephen Cameron 
374edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
375edd16368SStephen M. Cameron 	struct CommandList *c)
376edd16368SStephen M. Cameron {
3779437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
3789437ac43SStephen Cameron 	int sense_len;
3799437ac43SStephen Cameron 
3809437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3819437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
3829437ac43SStephen Cameron 	else
3839437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
3849437ac43SStephen Cameron 
3859437ac43SStephen Cameron 	decode_sense_data(c->err_info->SenseInfo, sense_len,
3869437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
38781c27557SDon Brace 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
388edd16368SStephen M. Cameron 		return 0;
389edd16368SStephen M. Cameron 
3909437ac43SStephen Cameron 	switch (asc) {
391edd16368SStephen M. Cameron 	case STATE_CHANGED:
3929437ac43SStephen Cameron 		dev_warn(&h->pdev->dev,
3932946e82bSRobert Elliott 			"%s: a state change detected, command retried\n",
3942946e82bSRobert Elliott 			h->devname);
395edd16368SStephen M. Cameron 		break;
396edd16368SStephen M. Cameron 	case LUN_FAILED:
3977f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3982946e82bSRobert Elliott 			"%s: LUN failure detected\n", h->devname);
399edd16368SStephen M. Cameron 		break;
400edd16368SStephen M. Cameron 	case REPORT_LUNS_CHANGED:
4017f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
4022946e82bSRobert Elliott 			"%s: report LUN data changed\n", h->devname);
403edd16368SStephen M. Cameron 	/*
4044f4eb9f1SScott Teel 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
4054f4eb9f1SScott Teel 	 * target (array) devices.
406edd16368SStephen M. Cameron 	 */
407edd16368SStephen M. Cameron 		break;
408edd16368SStephen M. Cameron 	case POWER_OR_RESET:
4092946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4102946e82bSRobert Elliott 			"%s: a power on or device reset detected\n",
4112946e82bSRobert Elliott 			h->devname);
412edd16368SStephen M. Cameron 		break;
413edd16368SStephen M. Cameron 	case UNIT_ATTENTION_CLEARED:
4142946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4152946e82bSRobert Elliott 			"%s: unit attention cleared by another initiator\n",
4162946e82bSRobert Elliott 			h->devname);
417edd16368SStephen M. Cameron 		break;
418edd16368SStephen M. Cameron 	default:
4192946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4202946e82bSRobert Elliott 			"%s: unknown unit attention detected\n",
4212946e82bSRobert Elliott 			h->devname);
422edd16368SStephen M. Cameron 		break;
423edd16368SStephen M. Cameron 	}
424edd16368SStephen M. Cameron 	return 1;
425edd16368SStephen M. Cameron }
426edd16368SStephen M. Cameron 
427852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
428852af20aSMatt Bondurant {
429852af20aSMatt Bondurant 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
430852af20aSMatt Bondurant 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
431852af20aSMatt Bondurant 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
432852af20aSMatt Bondurant 		return 0;
433852af20aSMatt Bondurant 	dev_warn(&h->pdev->dev, HPSA "device busy");
434852af20aSMatt Bondurant 	return 1;
435852af20aSMatt Bondurant }
436852af20aSMatt Bondurant 
437e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h);
438e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev,
439e985c58fSStephen Cameron 		struct device_attribute *attr, char *buf)
440e985c58fSStephen Cameron {
441e985c58fSStephen Cameron 	int ld;
442e985c58fSStephen Cameron 	struct ctlr_info *h;
443e985c58fSStephen Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
444e985c58fSStephen Cameron 
445e985c58fSStephen Cameron 	h = shost_to_hba(shost);
446e985c58fSStephen Cameron 	ld = lockup_detected(h);
447e985c58fSStephen Cameron 
448e985c58fSStephen Cameron 	return sprintf(buf, "ld=%d\n", ld);
449e985c58fSStephen Cameron }
450e985c58fSStephen Cameron 
451da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
452da0697bdSScott Teel 					 struct device_attribute *attr,
453da0697bdSScott Teel 					 const char *buf, size_t count)
454da0697bdSScott Teel {
455da0697bdSScott Teel 	int status, len;
456da0697bdSScott Teel 	struct ctlr_info *h;
457da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
458da0697bdSScott Teel 	char tmpbuf[10];
459da0697bdSScott Teel 
460da0697bdSScott Teel 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461da0697bdSScott Teel 		return -EACCES;
462da0697bdSScott Teel 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
463da0697bdSScott Teel 	strncpy(tmpbuf, buf, len);
464da0697bdSScott Teel 	tmpbuf[len] = '\0';
465da0697bdSScott Teel 	if (sscanf(tmpbuf, "%d", &status) != 1)
466da0697bdSScott Teel 		return -EINVAL;
467da0697bdSScott Teel 	h = shost_to_hba(shost);
468da0697bdSScott Teel 	h->acciopath_status = !!status;
469da0697bdSScott Teel 	dev_warn(&h->pdev->dev,
470da0697bdSScott Teel 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
471da0697bdSScott Teel 		h->acciopath_status ? "enabled" : "disabled");
472da0697bdSScott Teel 	return count;
473da0697bdSScott Teel }
474da0697bdSScott Teel 
4752ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev,
4762ba8bfc8SStephen M. Cameron 					 struct device_attribute *attr,
4772ba8bfc8SStephen M. Cameron 					 const char *buf, size_t count)
4782ba8bfc8SStephen M. Cameron {
4792ba8bfc8SStephen M. Cameron 	int debug_level, len;
4802ba8bfc8SStephen M. Cameron 	struct ctlr_info *h;
4812ba8bfc8SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
4822ba8bfc8SStephen M. Cameron 	char tmpbuf[10];
4832ba8bfc8SStephen M. Cameron 
4842ba8bfc8SStephen M. Cameron 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
4852ba8bfc8SStephen M. Cameron 		return -EACCES;
4862ba8bfc8SStephen M. Cameron 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
4872ba8bfc8SStephen M. Cameron 	strncpy(tmpbuf, buf, len);
4882ba8bfc8SStephen M. Cameron 	tmpbuf[len] = '\0';
4892ba8bfc8SStephen M. Cameron 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
4902ba8bfc8SStephen M. Cameron 		return -EINVAL;
4912ba8bfc8SStephen M. Cameron 	if (debug_level < 0)
4922ba8bfc8SStephen M. Cameron 		debug_level = 0;
4932ba8bfc8SStephen M. Cameron 	h = shost_to_hba(shost);
4942ba8bfc8SStephen M. Cameron 	h->raid_offload_debug = debug_level;
4952ba8bfc8SStephen M. Cameron 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
4962ba8bfc8SStephen M. Cameron 		h->raid_offload_debug);
4972ba8bfc8SStephen M. Cameron 	return count;
4982ba8bfc8SStephen M. Cameron }
4992ba8bfc8SStephen M. Cameron 
500edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev,
501edd16368SStephen M. Cameron 				 struct device_attribute *attr,
502edd16368SStephen M. Cameron 				 const char *buf, size_t count)
503edd16368SStephen M. Cameron {
504edd16368SStephen M. Cameron 	struct ctlr_info *h;
505edd16368SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
506a23513e8SStephen M. Cameron 	h = shost_to_hba(shost);
50731468401SMike Miller 	hpsa_scan_start(h->scsi_host);
508edd16368SStephen M. Cameron 	return count;
509edd16368SStephen M. Cameron }
510edd16368SStephen M. Cameron 
5113e16e83aSDon Brace static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
5123e16e83aSDon Brace {
5133e16e83aSDon Brace 	device->offload_enabled = 0;
5143e16e83aSDon Brace 	device->offload_to_be_enabled = 0;
5153e16e83aSDon Brace }
5163e16e83aSDon Brace 
517d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev,
518d28ce020SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
519d28ce020SStephen M. Cameron {
520d28ce020SStephen M. Cameron 	struct ctlr_info *h;
521d28ce020SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
522d28ce020SStephen M. Cameron 	unsigned char *fwrev;
523d28ce020SStephen M. Cameron 
524d28ce020SStephen M. Cameron 	h = shost_to_hba(shost);
525d28ce020SStephen M. Cameron 	if (!h->hba_inquiry_data)
526d28ce020SStephen M. Cameron 		return 0;
527d28ce020SStephen M. Cameron 	fwrev = &h->hba_inquiry_data[32];
528d28ce020SStephen M. Cameron 	return snprintf(buf, 20, "%c%c%c%c\n",
529d28ce020SStephen M. Cameron 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
530d28ce020SStephen M. Cameron }
531d28ce020SStephen M. Cameron 
53294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev,
53394a13649SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
53494a13649SStephen M. Cameron {
53594a13649SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
53694a13649SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(shost);
53794a13649SStephen M. Cameron 
5380cbf768eSStephen M. Cameron 	return snprintf(buf, 20, "%d\n",
5390cbf768eSStephen M. Cameron 			atomic_read(&h->commands_outstanding));
54094a13649SStephen M. Cameron }
54194a13649SStephen M. Cameron 
542745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev,
543745a7a25SStephen M. Cameron 	struct device_attribute *attr, char *buf)
544745a7a25SStephen M. Cameron {
545745a7a25SStephen M. Cameron 	struct ctlr_info *h;
546745a7a25SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
547745a7a25SStephen M. Cameron 
548745a7a25SStephen M. Cameron 	h = shost_to_hba(shost);
549745a7a25SStephen M. Cameron 	return snprintf(buf, 20, "%s\n",
550960a30e7SStephen M. Cameron 		h->transMethod & CFGTBL_Trans_Performant ?
551745a7a25SStephen M. Cameron 			"performant" : "simple");
552745a7a25SStephen M. Cameron }
553745a7a25SStephen M. Cameron 
554da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
555da0697bdSScott Teel 	struct device_attribute *attr, char *buf)
556da0697bdSScott Teel {
557da0697bdSScott Teel 	struct ctlr_info *h;
558da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
559da0697bdSScott Teel 
560da0697bdSScott Teel 	h = shost_to_hba(shost);
561da0697bdSScott Teel 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
562da0697bdSScott Teel 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
563da0697bdSScott Teel }
564da0697bdSScott Teel 
56546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */
566941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = {
567941b1cdaSStephen M. Cameron 	0x324a103C, /* Smart Array P712m */
568941b1cdaSStephen M. Cameron 	0x324b103C, /* Smart Array P711m */
569941b1cdaSStephen M. Cameron 	0x3223103C, /* Smart Array P800 */
570941b1cdaSStephen M. Cameron 	0x3234103C, /* Smart Array P400 */
571941b1cdaSStephen M. Cameron 	0x3235103C, /* Smart Array P400i */
572941b1cdaSStephen M. Cameron 	0x3211103C, /* Smart Array E200i */
573941b1cdaSStephen M. Cameron 	0x3212103C, /* Smart Array E200 */
574941b1cdaSStephen M. Cameron 	0x3213103C, /* Smart Array E200i */
575941b1cdaSStephen M. Cameron 	0x3214103C, /* Smart Array E200i */
576941b1cdaSStephen M. Cameron 	0x3215103C, /* Smart Array E200i */
577941b1cdaSStephen M. Cameron 	0x3237103C, /* Smart Array E500 */
578941b1cdaSStephen M. Cameron 	0x323D103C, /* Smart Array P700m */
5797af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
580941b1cdaSStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
581941b1cdaSStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
5825a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5835a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5845a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5855a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5865a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5875a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
588941b1cdaSStephen M. Cameron };
589941b1cdaSStephen M. Cameron 
59046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */
59146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = {
5927af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
5935a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5945a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5955a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5965a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5975a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5985a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
59946380786SStephen M. Cameron 	/* Exclude 640x boards.  These are two pci devices in one slot
60046380786SStephen M. Cameron 	 * which share a battery backed cache module.  One controls the
60146380786SStephen M. Cameron 	 * cache, the other accesses the cache through the one that controls
60246380786SStephen M. Cameron 	 * it.  If we reset the one controlling the cache, the other will
60346380786SStephen M. Cameron 	 * likely not be happy.  Just forbid resetting this conjoined mess.
60446380786SStephen M. Cameron 	 * The 640x isn't really supported by hpsa anyway.
60546380786SStephen M. Cameron 	 */
60646380786SStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
60746380786SStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
60846380786SStephen M. Cameron };
60946380786SStephen M. Cameron 
6109b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id)
611941b1cdaSStephen M. Cameron {
612941b1cdaSStephen M. Cameron 	int i;
613941b1cdaSStephen M. Cameron 
6149b5c48c2SStephen Cameron 	for (i = 0; i < nelems; i++)
6159b5c48c2SStephen Cameron 		if (a[i] == board_id)
616941b1cdaSStephen M. Cameron 			return 1;
6179b5c48c2SStephen Cameron 	return 0;
6189b5c48c2SStephen Cameron }
6199b5c48c2SStephen Cameron 
6209b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id)
6219b5c48c2SStephen Cameron {
6229b5c48c2SStephen Cameron 	return !board_id_in_array(unresettable_controller,
6239b5c48c2SStephen Cameron 			ARRAY_SIZE(unresettable_controller), board_id);
624941b1cdaSStephen M. Cameron }
625941b1cdaSStephen M. Cameron 
62646380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id)
62746380786SStephen M. Cameron {
6289b5c48c2SStephen Cameron 	return !board_id_in_array(soft_unresettable_controller,
6299b5c48c2SStephen Cameron 			ARRAY_SIZE(soft_unresettable_controller), board_id);
63046380786SStephen M. Cameron }
63146380786SStephen M. Cameron 
63246380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id)
63346380786SStephen M. Cameron {
63446380786SStephen M. Cameron 	return ctlr_is_hard_resettable(board_id) ||
63546380786SStephen M. Cameron 		ctlr_is_soft_resettable(board_id);
63646380786SStephen M. Cameron }
63746380786SStephen M. Cameron 
638941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev,
639941b1cdaSStephen M. Cameron 	struct device_attribute *attr, char *buf)
640941b1cdaSStephen M. Cameron {
641941b1cdaSStephen M. Cameron 	struct ctlr_info *h;
642941b1cdaSStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
643941b1cdaSStephen M. Cameron 
644941b1cdaSStephen M. Cameron 	h = shost_to_hba(shost);
64546380786SStephen M. Cameron 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
646941b1cdaSStephen M. Cameron }
647941b1cdaSStephen M. Cameron 
648edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
649edd16368SStephen M. Cameron {
650edd16368SStephen M. Cameron 	return (scsi3addr[3] & 0xC0) == 0x40;
651edd16368SStephen M. Cameron }
652edd16368SStephen M. Cameron 
653f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
6547c59a0d4SDon Brace 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
655edd16368SStephen M. Cameron };
6566b80b18fSScott Teel #define HPSA_RAID_0	0
6576b80b18fSScott Teel #define HPSA_RAID_4	1
6586b80b18fSScott Teel #define HPSA_RAID_1	2	/* also used for RAID 10 */
6596b80b18fSScott Teel #define HPSA_RAID_5	3	/* also used for RAID 50 */
6606b80b18fSScott Teel #define HPSA_RAID_51	4
6616b80b18fSScott Teel #define HPSA_RAID_6	5	/* also used for RAID 60 */
6626b80b18fSScott Teel #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
6637c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
6647c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
665edd16368SStephen M. Cameron 
666f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
667f3f01730SKevin Barnett {
668f3f01730SKevin Barnett 	return !device->physical_device;
669f3f01730SKevin Barnett }
670edd16368SStephen M. Cameron 
671edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev,
672edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
673edd16368SStephen M. Cameron {
674edd16368SStephen M. Cameron 	ssize_t l = 0;
67582a72c0aSStephen M. Cameron 	unsigned char rlevel;
676edd16368SStephen M. Cameron 	struct ctlr_info *h;
677edd16368SStephen M. Cameron 	struct scsi_device *sdev;
678edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
679edd16368SStephen M. Cameron 	unsigned long flags;
680edd16368SStephen M. Cameron 
681edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
682edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
683edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
684edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
685edd16368SStephen M. Cameron 	if (!hdev) {
686edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
687edd16368SStephen M. Cameron 		return -ENODEV;
688edd16368SStephen M. Cameron 	}
689edd16368SStephen M. Cameron 
690edd16368SStephen M. Cameron 	/* Is this even a logical drive? */
691f3f01730SKevin Barnett 	if (!is_logical_device(hdev)) {
692edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
693edd16368SStephen M. Cameron 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
694edd16368SStephen M. Cameron 		return l;
695edd16368SStephen M. Cameron 	}
696edd16368SStephen M. Cameron 
697edd16368SStephen M. Cameron 	rlevel = hdev->raid_level;
698edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
69982a72c0aSStephen M. Cameron 	if (rlevel > RAID_UNKNOWN)
700edd16368SStephen M. Cameron 		rlevel = RAID_UNKNOWN;
701edd16368SStephen M. Cameron 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
702edd16368SStephen M. Cameron 	return l;
703edd16368SStephen M. Cameron }
704edd16368SStephen M. Cameron 
705edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev,
706edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
707edd16368SStephen M. Cameron {
708edd16368SStephen M. Cameron 	struct ctlr_info *h;
709edd16368SStephen M. Cameron 	struct scsi_device *sdev;
710edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
711edd16368SStephen M. Cameron 	unsigned long flags;
712edd16368SStephen M. Cameron 	unsigned char lunid[8];
713edd16368SStephen M. Cameron 
714edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
715edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
716edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
717edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
718edd16368SStephen M. Cameron 	if (!hdev) {
719edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
720edd16368SStephen M. Cameron 		return -ENODEV;
721edd16368SStephen M. Cameron 	}
722edd16368SStephen M. Cameron 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
723edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
724609a70dfSRasmus Villemoes 	return snprintf(buf, 20, "0x%8phN\n", lunid);
725edd16368SStephen M. Cameron }
726edd16368SStephen M. Cameron 
727edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev,
728edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
729edd16368SStephen M. Cameron {
730edd16368SStephen M. Cameron 	struct ctlr_info *h;
731edd16368SStephen M. Cameron 	struct scsi_device *sdev;
732edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
733edd16368SStephen M. Cameron 	unsigned long flags;
734edd16368SStephen M. Cameron 	unsigned char sn[16];
735edd16368SStephen M. Cameron 
736edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
737edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
738edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
739edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
740edd16368SStephen M. Cameron 	if (!hdev) {
741edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
742edd16368SStephen M. Cameron 		return -ENODEV;
743edd16368SStephen M. Cameron 	}
744edd16368SStephen M. Cameron 	memcpy(sn, hdev->device_id, sizeof(sn));
745edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
746edd16368SStephen M. Cameron 	return snprintf(buf, 16 * 2 + 2,
747edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X"
748edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
749edd16368SStephen M. Cameron 			sn[0], sn[1], sn[2], sn[3],
750edd16368SStephen M. Cameron 			sn[4], sn[5], sn[6], sn[7],
751edd16368SStephen M. Cameron 			sn[8], sn[9], sn[10], sn[11],
752edd16368SStephen M. Cameron 			sn[12], sn[13], sn[14], sn[15]);
753edd16368SStephen M. Cameron }
754edd16368SStephen M. Cameron 
755ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev,
756ded1be4aSJoseph T Handzik 	      struct device_attribute *attr, char *buf)
757ded1be4aSJoseph T Handzik {
758ded1be4aSJoseph T Handzik 	struct ctlr_info *h;
759ded1be4aSJoseph T Handzik 	struct scsi_device *sdev;
760ded1be4aSJoseph T Handzik 	struct hpsa_scsi_dev_t *hdev;
761ded1be4aSJoseph T Handzik 	unsigned long flags;
762ded1be4aSJoseph T Handzik 	u64 sas_address;
763ded1be4aSJoseph T Handzik 
764ded1be4aSJoseph T Handzik 	sdev = to_scsi_device(dev);
765ded1be4aSJoseph T Handzik 	h = sdev_to_hba(sdev);
766ded1be4aSJoseph T Handzik 	spin_lock_irqsave(&h->lock, flags);
767ded1be4aSJoseph T Handzik 	hdev = sdev->hostdata;
768ded1be4aSJoseph T Handzik 	if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
769ded1be4aSJoseph T Handzik 		spin_unlock_irqrestore(&h->lock, flags);
770ded1be4aSJoseph T Handzik 		return -ENODEV;
771ded1be4aSJoseph T Handzik 	}
772ded1be4aSJoseph T Handzik 	sas_address = hdev->sas_address;
773ded1be4aSJoseph T Handzik 	spin_unlock_irqrestore(&h->lock, flags);
774ded1be4aSJoseph T Handzik 
775ded1be4aSJoseph T Handzik 	return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
776ded1be4aSJoseph T Handzik }
777ded1be4aSJoseph T Handzik 
778c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
779c1988684SScott Teel 	     struct device_attribute *attr, char *buf)
780c1988684SScott Teel {
781c1988684SScott Teel 	struct ctlr_info *h;
782c1988684SScott Teel 	struct scsi_device *sdev;
783c1988684SScott Teel 	struct hpsa_scsi_dev_t *hdev;
784c1988684SScott Teel 	unsigned long flags;
785c1988684SScott Teel 	int offload_enabled;
786c1988684SScott Teel 
787c1988684SScott Teel 	sdev = to_scsi_device(dev);
788c1988684SScott Teel 	h = sdev_to_hba(sdev);
789c1988684SScott Teel 	spin_lock_irqsave(&h->lock, flags);
790c1988684SScott Teel 	hdev = sdev->hostdata;
791c1988684SScott Teel 	if (!hdev) {
792c1988684SScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
793c1988684SScott Teel 		return -ENODEV;
794c1988684SScott Teel 	}
795c1988684SScott Teel 	offload_enabled = hdev->offload_enabled;
796c1988684SScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
797b2582a65SDon Brace 
798b2582a65SDon Brace 	if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
799c1988684SScott Teel 		return snprintf(buf, 20, "%d\n", offload_enabled);
800b2582a65SDon Brace 	else
801b2582a65SDon Brace 		return snprintf(buf, 40, "%s\n",
802b2582a65SDon Brace 				"Not applicable for a controller");
803c1988684SScott Teel }
804c1988684SScott Teel 
8058270b862SJoe Handzik #define MAX_PATHS 8
8068270b862SJoe Handzik static ssize_t path_info_show(struct device *dev,
8078270b862SJoe Handzik 	     struct device_attribute *attr, char *buf)
8088270b862SJoe Handzik {
8098270b862SJoe Handzik 	struct ctlr_info *h;
8108270b862SJoe Handzik 	struct scsi_device *sdev;
8118270b862SJoe Handzik 	struct hpsa_scsi_dev_t *hdev;
8128270b862SJoe Handzik 	unsigned long flags;
8138270b862SJoe Handzik 	int i;
8148270b862SJoe Handzik 	int output_len = 0;
8158270b862SJoe Handzik 	u8 box;
8168270b862SJoe Handzik 	u8 bay;
8178270b862SJoe Handzik 	u8 path_map_index = 0;
8188270b862SJoe Handzik 	char *active;
8198270b862SJoe Handzik 	unsigned char phys_connector[2];
8208270b862SJoe Handzik 
8218270b862SJoe Handzik 	sdev = to_scsi_device(dev);
8228270b862SJoe Handzik 	h = sdev_to_hba(sdev);
8238270b862SJoe Handzik 	spin_lock_irqsave(&h->devlock, flags);
8248270b862SJoe Handzik 	hdev = sdev->hostdata;
8258270b862SJoe Handzik 	if (!hdev) {
8268270b862SJoe Handzik 		spin_unlock_irqrestore(&h->devlock, flags);
8278270b862SJoe Handzik 		return -ENODEV;
8288270b862SJoe Handzik 	}
8298270b862SJoe Handzik 
8308270b862SJoe Handzik 	bay = hdev->bay;
8318270b862SJoe Handzik 	for (i = 0; i < MAX_PATHS; i++) {
8328270b862SJoe Handzik 		path_map_index = 1<<i;
8338270b862SJoe Handzik 		if (i == hdev->active_path_index)
8348270b862SJoe Handzik 			active = "Active";
8358270b862SJoe Handzik 		else if (hdev->path_map & path_map_index)
8368270b862SJoe Handzik 			active = "Inactive";
8378270b862SJoe Handzik 		else
8388270b862SJoe Handzik 			continue;
8398270b862SJoe Handzik 
8401faf072cSRasmus Villemoes 		output_len += scnprintf(buf + output_len,
8411faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8421faf072cSRasmus Villemoes 				"[%d:%d:%d:%d] %20.20s ",
8438270b862SJoe Handzik 				h->scsi_host->host_no,
8448270b862SJoe Handzik 				hdev->bus, hdev->target, hdev->lun,
8458270b862SJoe Handzik 				scsi_device_type(hdev->devtype));
8468270b862SJoe Handzik 
847cca8f13bSDon Brace 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
8482708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8491faf072cSRasmus Villemoes 						PAGE_SIZE - output_len,
8501faf072cSRasmus Villemoes 						"%s\n", active);
8518270b862SJoe Handzik 			continue;
8528270b862SJoe Handzik 		}
8538270b862SJoe Handzik 
8548270b862SJoe Handzik 		box = hdev->box[i];
8558270b862SJoe Handzik 		memcpy(&phys_connector, &hdev->phys_connector[i],
8568270b862SJoe Handzik 			sizeof(phys_connector));
8578270b862SJoe Handzik 		if (phys_connector[0] < '0')
8588270b862SJoe Handzik 			phys_connector[0] = '0';
8598270b862SJoe Handzik 		if (phys_connector[1] < '0')
8608270b862SJoe Handzik 			phys_connector[1] = '0';
8612708f295SDon Brace 		output_len += scnprintf(buf + output_len,
8621faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8638270b862SJoe Handzik 				"PORT: %.2s ",
8648270b862SJoe Handzik 				phys_connector);
865af15ed36SDon Brace 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
866af15ed36SDon Brace 			hdev->expose_device) {
8678270b862SJoe Handzik 			if (box == 0 || box == 0xFF) {
8682708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8691faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8708270b862SJoe Handzik 					"BAY: %hhu %s\n",
8718270b862SJoe Handzik 					bay, active);
8728270b862SJoe Handzik 			} else {
8732708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8741faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8758270b862SJoe Handzik 					"BOX: %hhu BAY: %hhu %s\n",
8768270b862SJoe Handzik 					box, bay, active);
8778270b862SJoe Handzik 			}
8788270b862SJoe Handzik 		} else if (box != 0 && box != 0xFF) {
8792708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8801faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8818270b862SJoe Handzik 				box, active);
8828270b862SJoe Handzik 		} else
8832708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8841faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "%s\n", active);
8858270b862SJoe Handzik 	}
8868270b862SJoe Handzik 
8878270b862SJoe Handzik 	spin_unlock_irqrestore(&h->devlock, flags);
8881faf072cSRasmus Villemoes 	return output_len;
8898270b862SJoe Handzik }
8908270b862SJoe Handzik 
89116961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev,
89216961204SHannes Reinecke 	struct device_attribute *attr, char *buf)
89316961204SHannes Reinecke {
89416961204SHannes Reinecke 	struct ctlr_info *h;
89516961204SHannes Reinecke 	struct Scsi_Host *shost = class_to_shost(dev);
89616961204SHannes Reinecke 
89716961204SHannes Reinecke 	h = shost_to_hba(shost);
89816961204SHannes Reinecke 	return snprintf(buf, 20, "%d\n", h->ctlr);
89916961204SHannes Reinecke }
90016961204SHannes Reinecke 
901135ae6edSHannes Reinecke static ssize_t host_show_legacy_board(struct device *dev,
902135ae6edSHannes Reinecke 	struct device_attribute *attr, char *buf)
903135ae6edSHannes Reinecke {
904135ae6edSHannes Reinecke 	struct ctlr_info *h;
905135ae6edSHannes Reinecke 	struct Scsi_Host *shost = class_to_shost(dev);
906135ae6edSHannes Reinecke 
907135ae6edSHannes Reinecke 	h = shost_to_hba(shost);
908135ae6edSHannes Reinecke 	return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
909135ae6edSHannes Reinecke }
910135ae6edSHannes Reinecke 
911c828a892SJoe Perches static DEVICE_ATTR_RO(raid_level);
912c828a892SJoe Perches static DEVICE_ATTR_RO(lunid);
913c828a892SJoe Perches static DEVICE_ATTR_RO(unique_id);
9143f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
915c828a892SJoe Perches static DEVICE_ATTR_RO(sas_address);
916c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
917c1988684SScott Teel 			host_show_hp_ssd_smart_path_enabled, NULL);
918c828a892SJoe Perches static DEVICE_ATTR_RO(path_info);
919da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
920da0697bdSScott Teel 		host_show_hp_ssd_smart_path_status,
921da0697bdSScott Teel 		host_store_hp_ssd_smart_path_status);
9222ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
9232ba8bfc8SStephen M. Cameron 			host_store_raid_offload_debug);
9243f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO,
9253f5eac3aSStephen M. Cameron 	host_show_firmware_revision, NULL);
9263f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO,
9273f5eac3aSStephen M. Cameron 	host_show_commands_outstanding, NULL);
9283f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO,
9293f5eac3aSStephen M. Cameron 	host_show_transport_mode, NULL);
930941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO,
931941b1cdaSStephen M. Cameron 	host_show_resettable, NULL);
932e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO,
933e985c58fSStephen Cameron 	host_show_lockup_detected, NULL);
93416961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO,
93516961204SHannes Reinecke 	host_show_ctlr_num, NULL);
936135ae6edSHannes Reinecke static DEVICE_ATTR(legacy_board, S_IRUGO,
937135ae6edSHannes Reinecke 	host_show_legacy_board, NULL);
9383f5eac3aSStephen M. Cameron 
9393f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = {
9403f5eac3aSStephen M. Cameron 	&dev_attr_raid_level,
9413f5eac3aSStephen M. Cameron 	&dev_attr_lunid,
9423f5eac3aSStephen M. Cameron 	&dev_attr_unique_id,
943c1988684SScott Teel 	&dev_attr_hp_ssd_smart_path_enabled,
9448270b862SJoe Handzik 	&dev_attr_path_info,
945ded1be4aSJoseph T Handzik 	&dev_attr_sas_address,
9463f5eac3aSStephen M. Cameron 	NULL,
9473f5eac3aSStephen M. Cameron };
9483f5eac3aSStephen M. Cameron 
9493f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = {
9503f5eac3aSStephen M. Cameron 	&dev_attr_rescan,
9513f5eac3aSStephen M. Cameron 	&dev_attr_firmware_revision,
9523f5eac3aSStephen M. Cameron 	&dev_attr_commands_outstanding,
9533f5eac3aSStephen M. Cameron 	&dev_attr_transport_mode,
954941b1cdaSStephen M. Cameron 	&dev_attr_resettable,
955da0697bdSScott Teel 	&dev_attr_hp_ssd_smart_path_status,
9562ba8bfc8SStephen M. Cameron 	&dev_attr_raid_offload_debug,
957fb53c439STomas Henzl 	&dev_attr_lockup_detected,
95816961204SHannes Reinecke 	&dev_attr_ctlr_num,
959135ae6edSHannes Reinecke 	&dev_attr_legacy_board,
9603f5eac3aSStephen M. Cameron 	NULL,
9613f5eac3aSStephen M. Cameron };
9623f5eac3aSStephen M. Cameron 
96308ec46f6SDon Brace #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_DRIVER +\
96408ec46f6SDon Brace 				 HPSA_MAX_CONCURRENT_PASSTHRUS)
96541ce4c35SStephen Cameron 
9663f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = {
9673f5eac3aSStephen M. Cameron 	.module			= THIS_MODULE,
968f79cfec6SStephen M. Cameron 	.name			= HPSA,
969f79cfec6SStephen M. Cameron 	.proc_name		= HPSA,
9703f5eac3aSStephen M. Cameron 	.queuecommand		= hpsa_scsi_queue_command,
9713f5eac3aSStephen M. Cameron 	.scan_start		= hpsa_scan_start,
9723f5eac3aSStephen M. Cameron 	.scan_finished		= hpsa_scan_finished,
9737c0a0229SDon Brace 	.change_queue_depth	= hpsa_change_queue_depth,
9743f5eac3aSStephen M. Cameron 	.this_id		= -1,
9753f5eac3aSStephen M. Cameron 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
9763f5eac3aSStephen M. Cameron 	.ioctl			= hpsa_ioctl,
9773f5eac3aSStephen M. Cameron 	.slave_alloc		= hpsa_slave_alloc,
97841ce4c35SStephen Cameron 	.slave_configure	= hpsa_slave_configure,
9793f5eac3aSStephen M. Cameron 	.slave_destroy		= hpsa_slave_destroy,
9803f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT
9813f5eac3aSStephen M. Cameron 	.compat_ioctl		= hpsa_compat_ioctl,
9823f5eac3aSStephen M. Cameron #endif
9833f5eac3aSStephen M. Cameron 	.sdev_attrs = hpsa_sdev_attrs,
9843f5eac3aSStephen M. Cameron 	.shost_attrs = hpsa_shost_attrs,
985eb53a3eaSMartin Wilck 	.max_sectors = 2048,
98654b2b50cSMartin K. Petersen 	.no_write_same = 1,
9873f5eac3aSStephen M. Cameron };
9883f5eac3aSStephen M. Cameron 
989254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q)
9903f5eac3aSStephen M. Cameron {
9913f5eac3aSStephen M. Cameron 	u32 a;
992072b0518SStephen M. Cameron 	struct reply_queue_buffer *rq = &h->reply_queue[q];
9933f5eac3aSStephen M. Cameron 
994e1f7de0cSMatt Gates 	if (h->transMethod & CFGTBL_Trans_io_accel1)
995e1f7de0cSMatt Gates 		return h->access.command_completed(h, q);
996e1f7de0cSMatt Gates 
9973f5eac3aSStephen M. Cameron 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
998254f796bSMatt Gates 		return h->access.command_completed(h, q);
9993f5eac3aSStephen M. Cameron 
1000254f796bSMatt Gates 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
1001254f796bSMatt Gates 		a = rq->head[rq->current_entry];
1002254f796bSMatt Gates 		rq->current_entry++;
10030cbf768eSStephen M. Cameron 		atomic_dec(&h->commands_outstanding);
10043f5eac3aSStephen M. Cameron 	} else {
10053f5eac3aSStephen M. Cameron 		a = FIFO_EMPTY;
10063f5eac3aSStephen M. Cameron 	}
10073f5eac3aSStephen M. Cameron 	/* Check for wraparound */
1008254f796bSMatt Gates 	if (rq->current_entry == h->max_commands) {
1009254f796bSMatt Gates 		rq->current_entry = 0;
1010254f796bSMatt Gates 		rq->wraparound ^= 1;
10113f5eac3aSStephen M. Cameron 	}
10123f5eac3aSStephen M. Cameron 	return a;
10133f5eac3aSStephen M. Cameron }
10143f5eac3aSStephen M. Cameron 
1015c349775eSScott Teel /*
1016c349775eSScott Teel  * There are some special bits in the bus address of the
1017c349775eSScott Teel  * command that we have to set for the controller to know
1018c349775eSScott Teel  * how to process the command:
1019c349775eSScott Teel  *
1020c349775eSScott Teel  * Normal performant mode:
1021c349775eSScott Teel  * bit 0: 1 means performant mode, 0 means simple mode.
1022c349775eSScott Teel  * bits 1-3 = block fetch table entry
1023c349775eSScott Teel  * bits 4-6 = command type (== 0)
1024c349775eSScott Teel  *
1025c349775eSScott Teel  * ioaccel1 mode:
1026c349775eSScott Teel  * bit 0 = "performant mode" bit.
1027c349775eSScott Teel  * bits 1-3 = block fetch table entry
1028c349775eSScott Teel  * bits 4-6 = command type (== 110)
1029c349775eSScott Teel  * (command type is needed because ioaccel1 mode
1030c349775eSScott Teel  * commands are submitted through the same register as normal
1031c349775eSScott Teel  * mode commands, so this is how the controller knows whether
1032c349775eSScott Teel  * the command is normal mode or ioaccel1 mode.)
1033c349775eSScott Teel  *
1034c349775eSScott Teel  * ioaccel2 mode:
1035c349775eSScott Teel  * bit 0 = "performant mode" bit.
1036c349775eSScott Teel  * bits 1-4 = block fetch table entry (note extra bit)
1037c349775eSScott Teel  * bits 4-6 = not needed, because ioaccel2 mode has
1038c349775eSScott Teel  * a separate special register for submitting commands.
1039c349775eSScott Teel  */
1040c349775eSScott Teel 
104125163bd5SWebb Scales /*
104225163bd5SWebb Scales  * set_performant_mode: Modify the tag for cciss performant
10433f5eac3aSStephen M. Cameron  * set bit 0 for pull model, bits 3-1 for block fetch
10443f5eac3aSStephen M. Cameron  * register number
10453f5eac3aSStephen M. Cameron  */
104625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1)
104725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
104825163bd5SWebb Scales 					int reply_queue)
10493f5eac3aSStephen M. Cameron {
1050254f796bSMatt Gates 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
10513f5eac3aSStephen M. Cameron 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1052bc2bb154SChristoph Hellwig 		if (unlikely(!h->msix_vectors))
105325163bd5SWebb Scales 			return;
10548b834bffSMing Lei 		c->Header.ReplyQueue = reply_queue;
1055254f796bSMatt Gates 	}
10563f5eac3aSStephen M. Cameron }
10573f5eac3aSStephen M. Cameron 
1058c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h,
105925163bd5SWebb Scales 						struct CommandList *c,
106025163bd5SWebb Scales 						int reply_queue)
1061c349775eSScott Teel {
1062c349775eSScott Teel 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1063c349775eSScott Teel 
106425163bd5SWebb Scales 	/*
106525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1066c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1067c349775eSScott Teel 	 */
10688b834bffSMing Lei 	cp->ReplyQueue = reply_queue;
106925163bd5SWebb Scales 	/*
107025163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1071c349775eSScott Teel 	 *  - performant mode bit (bit 0)
1072c349775eSScott Teel 	 *  - pull count (bits 1-3)
1073c349775eSScott Teel 	 *  - command type (bits 4-6)
1074c349775eSScott Teel 	 */
1075c349775eSScott Teel 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1076c349775eSScott Teel 					IOACCEL1_BUSADDR_CMDTYPE;
1077c349775eSScott Teel }
1078c349775eSScott Teel 
10798be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
10808be986ccSStephen Cameron 						struct CommandList *c,
10818be986ccSStephen Cameron 						int reply_queue)
10828be986ccSStephen Cameron {
10838be986ccSStephen Cameron 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
10848be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[c->cmdindex];
10858be986ccSStephen Cameron 
10868be986ccSStephen Cameron 	/* Tell the controller to post the reply to the queue for this
10878be986ccSStephen Cameron 	 * processor.  This seems to give the best I/O throughput.
10888be986ccSStephen Cameron 	 */
10898b834bffSMing Lei 	cp->reply_queue = reply_queue;
10908be986ccSStephen Cameron 	/* Set the bits in the address sent down to include:
10918be986ccSStephen Cameron 	 *  - performant mode bit not used in ioaccel mode 2
10928be986ccSStephen Cameron 	 *  - pull count (bits 0-3)
10938be986ccSStephen Cameron 	 *  - command type isn't needed for ioaccel2
10948be986ccSStephen Cameron 	 */
10958be986ccSStephen Cameron 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
10968be986ccSStephen Cameron }
10978be986ccSStephen Cameron 
1098c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h,
109925163bd5SWebb Scales 						struct CommandList *c,
110025163bd5SWebb Scales 						int reply_queue)
1101c349775eSScott Teel {
1102c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1103c349775eSScott Teel 
110425163bd5SWebb Scales 	/*
110525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1106c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1107c349775eSScott Teel 	 */
11088b834bffSMing Lei 	cp->reply_queue = reply_queue;
110925163bd5SWebb Scales 	/*
111025163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1111c349775eSScott Teel 	 *  - performant mode bit not used in ioaccel mode 2
1112c349775eSScott Teel 	 *  - pull count (bits 0-3)
1113c349775eSScott Teel 	 *  - command type isn't needed for ioaccel2
1114c349775eSScott Teel 	 */
1115c349775eSScott Teel 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1116c349775eSScott Teel }
1117c349775eSScott Teel 
1118e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb)
1119e85c5974SStephen M. Cameron {
1120e85c5974SStephen M. Cameron 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1121e85c5974SStephen M. Cameron }
1122e85c5974SStephen M. Cameron 
1123e85c5974SStephen M. Cameron /*
1124e85c5974SStephen M. Cameron  * During firmware flash, the heartbeat register may not update as frequently
1125e85c5974SStephen M. Cameron  * as it should.  So we dial down lockup detection during firmware flash. and
1126e85c5974SStephen M. Cameron  * dial it back up when firmware flash completes.
1127e85c5974SStephen M. Cameron  */
1128e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1129e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
11303d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1131e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1132e85c5974SStephen M. Cameron 		struct CommandList *c)
1133e85c5974SStephen M. Cameron {
1134e85c5974SStephen M. Cameron 	if (!is_firmware_flash_cmd(c->Request.CDB))
1135e85c5974SStephen M. Cameron 		return;
1136e85c5974SStephen M. Cameron 	atomic_inc(&h->firmware_flash_in_progress);
1137e85c5974SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1138e85c5974SStephen M. Cameron }
1139e85c5974SStephen M. Cameron 
1140e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1141e85c5974SStephen M. Cameron 		struct CommandList *c)
1142e85c5974SStephen M. Cameron {
1143e85c5974SStephen M. Cameron 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1144e85c5974SStephen M. Cameron 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1145e85c5974SStephen M. Cameron 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1146e85c5974SStephen M. Cameron }
1147e85c5974SStephen M. Cameron 
114825163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
114925163bd5SWebb Scales 	struct CommandList *c, int reply_queue)
11503f5eac3aSStephen M. Cameron {
1151c05e8866SStephen Cameron 	dial_down_lockup_detection_during_fw_flash(h, c);
1152c05e8866SStephen Cameron 	atomic_inc(&h->commands_outstanding);
1153c5dfd106SDon Brace 	if (c->device)
1154c5dfd106SDon Brace 		atomic_inc(&c->device->commands_outstanding);
11558b834bffSMing Lei 
11568b834bffSMing Lei 	reply_queue = h->reply_map[raw_smp_processor_id()];
1157c349775eSScott Teel 	switch (c->cmd_type) {
1158c349775eSScott Teel 	case CMD_IOACCEL1:
115925163bd5SWebb Scales 		set_ioaccel1_performant_mode(h, c, reply_queue);
1160c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1161c349775eSScott Teel 		break;
1162c349775eSScott Teel 	case CMD_IOACCEL2:
116325163bd5SWebb Scales 		set_ioaccel2_performant_mode(h, c, reply_queue);
1164c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1165c349775eSScott Teel 		break;
11668be986ccSStephen Cameron 	case IOACCEL2_TMF:
11678be986ccSStephen Cameron 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
11688be986ccSStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
11698be986ccSStephen Cameron 		break;
1170c349775eSScott Teel 	default:
117125163bd5SWebb Scales 		set_performant_mode(h, c, reply_queue);
1172f2405db8SDon Brace 		h->access.submit_command(h, c);
11733f5eac3aSStephen M. Cameron 	}
1174c05e8866SStephen Cameron }
11753f5eac3aSStephen M. Cameron 
1176a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
117725163bd5SWebb Scales {
117825163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
117925163bd5SWebb Scales }
118025163bd5SWebb Scales 
11813f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[])
11823f5eac3aSStephen M. Cameron {
11833f5eac3aSStephen M. Cameron 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
11843f5eac3aSStephen M. Cameron }
11853f5eac3aSStephen M. Cameron 
11863f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h)
11873f5eac3aSStephen M. Cameron {
11883f5eac3aSStephen M. Cameron 	if (!h->hba_inquiry_data)
11893f5eac3aSStephen M. Cameron 		return 0;
11903f5eac3aSStephen M. Cameron 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
11913f5eac3aSStephen M. Cameron 		return 1;
11923f5eac3aSStephen M. Cameron 	return 0;
11933f5eac3aSStephen M. Cameron }
11943f5eac3aSStephen M. Cameron 
1195edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h,
1196edd16368SStephen M. Cameron 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1197edd16368SStephen M. Cameron {
1198edd16368SStephen M. Cameron 	/* finds an unused bus, target, lun for a new physical device
1199edd16368SStephen M. Cameron 	 * assumes h->devlock is held
1200edd16368SStephen M. Cameron 	 */
1201edd16368SStephen M. Cameron 	int i, found = 0;
1202cfe5badcSScott Teel 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1203edd16368SStephen M. Cameron 
1204263d9401SAkinobu Mita 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1205edd16368SStephen M. Cameron 
1206edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1207edd16368SStephen M. Cameron 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1208263d9401SAkinobu Mita 			__set_bit(h->dev[i]->target, lun_taken);
1209edd16368SStephen M. Cameron 	}
1210edd16368SStephen M. Cameron 
1211263d9401SAkinobu Mita 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1212263d9401SAkinobu Mita 	if (i < HPSA_MAX_DEVICES) {
1213edd16368SStephen M. Cameron 		/* *bus = 1; */
1214edd16368SStephen M. Cameron 		*target = i;
1215edd16368SStephen M. Cameron 		*lun = 0;
1216edd16368SStephen M. Cameron 		found = 1;
1217edd16368SStephen M. Cameron 	}
1218edd16368SStephen M. Cameron 	return !found;
1219edd16368SStephen M. Cameron }
1220edd16368SStephen M. Cameron 
12211d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
12220d96ef5fSWebb Scales 	struct hpsa_scsi_dev_t *dev, char *description)
12230d96ef5fSWebb Scales {
12247c59a0d4SDon Brace #define LABEL_SIZE 25
12257c59a0d4SDon Brace 	char label[LABEL_SIZE];
12267c59a0d4SDon Brace 
12279975ec9dSDon Brace 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
12289975ec9dSDon Brace 		return;
12299975ec9dSDon Brace 
12307c59a0d4SDon Brace 	switch (dev->devtype) {
12317c59a0d4SDon Brace 	case TYPE_RAID:
12327c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "controller");
12337c59a0d4SDon Brace 		break;
12347c59a0d4SDon Brace 	case TYPE_ENCLOSURE:
12357c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "enclosure");
12367c59a0d4SDon Brace 		break;
12377c59a0d4SDon Brace 	case TYPE_DISK:
1238af15ed36SDon Brace 	case TYPE_ZBC:
12397c59a0d4SDon Brace 		if (dev->external)
12407c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "external");
12417c59a0d4SDon Brace 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
12427c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "%s",
12437c59a0d4SDon Brace 				raid_label[PHYSICAL_DRIVE]);
12447c59a0d4SDon Brace 		else
12457c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "RAID-%s",
12467c59a0d4SDon Brace 				dev->raid_level > RAID_UNKNOWN ? "?" :
12477c59a0d4SDon Brace 				raid_label[dev->raid_level]);
12487c59a0d4SDon Brace 		break;
12497c59a0d4SDon Brace 	case TYPE_ROM:
12507c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "rom");
12517c59a0d4SDon Brace 		break;
12527c59a0d4SDon Brace 	case TYPE_TAPE:
12537c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "tape");
12547c59a0d4SDon Brace 		break;
12557c59a0d4SDon Brace 	case TYPE_MEDIUM_CHANGER:
12567c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "changer");
12577c59a0d4SDon Brace 		break;
12587c59a0d4SDon Brace 	default:
12597c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "UNKNOWN");
12607c59a0d4SDon Brace 		break;
12617c59a0d4SDon Brace 	}
12627c59a0d4SDon Brace 
12630d96ef5fSWebb Scales 	dev_printk(level, &h->pdev->dev,
12647c59a0d4SDon Brace 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
12650d96ef5fSWebb Scales 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
12660d96ef5fSWebb Scales 			description,
12670d96ef5fSWebb Scales 			scsi_device_type(dev->devtype),
12680d96ef5fSWebb Scales 			dev->vendor,
12690d96ef5fSWebb Scales 			dev->model,
12707c59a0d4SDon Brace 			label,
12710d96ef5fSWebb Scales 			dev->offload_config ? '+' : '-',
1272b2582a65SDon Brace 			dev->offload_to_be_enabled ? '+' : '-',
12732a168208SKevin Barnett 			dev->expose_device);
12740d96ef5fSWebb Scales }
12750d96ef5fSWebb Scales 
1276edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */
12778aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h,
1278edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *device,
1279edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *added[], int *nadded)
1280edd16368SStephen M. Cameron {
1281edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1282edd16368SStephen M. Cameron 	int n = h->ndevices;
1283edd16368SStephen M. Cameron 	int i;
1284edd16368SStephen M. Cameron 	unsigned char addr1[8], addr2[8];
1285edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1286edd16368SStephen M. Cameron 
1287cfe5badcSScott Teel 	if (n >= HPSA_MAX_DEVICES) {
1288edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "too many devices, some will be "
1289edd16368SStephen M. Cameron 			"inaccessible.\n");
1290edd16368SStephen M. Cameron 		return -1;
1291edd16368SStephen M. Cameron 	}
1292edd16368SStephen M. Cameron 
1293edd16368SStephen M. Cameron 	/* physical devices do not have lun or target assigned until now. */
1294edd16368SStephen M. Cameron 	if (device->lun != -1)
1295edd16368SStephen M. Cameron 		/* Logical device, lun is already assigned. */
1296edd16368SStephen M. Cameron 		goto lun_assigned;
1297edd16368SStephen M. Cameron 
1298edd16368SStephen M. Cameron 	/* If this device a non-zero lun of a multi-lun device
1299edd16368SStephen M. Cameron 	 * byte 4 of the 8-byte LUN addr will contain the logical
13002b08b3e9SDon Brace 	 * unit no, zero otherwise.
1301edd16368SStephen M. Cameron 	 */
1302edd16368SStephen M. Cameron 	if (device->scsi3addr[4] == 0) {
1303edd16368SStephen M. Cameron 		/* This is not a non-zero lun of a multi-lun device */
1304edd16368SStephen M. Cameron 		if (hpsa_find_target_lun(h, device->scsi3addr,
1305edd16368SStephen M. Cameron 			device->bus, &device->target, &device->lun) != 0)
1306edd16368SStephen M. Cameron 			return -1;
1307edd16368SStephen M. Cameron 		goto lun_assigned;
1308edd16368SStephen M. Cameron 	}
1309edd16368SStephen M. Cameron 
1310edd16368SStephen M. Cameron 	/* This is a non-zero lun of a multi-lun device.
1311edd16368SStephen M. Cameron 	 * Search through our list and find the device which
13129a4178b7Sshane.seymour 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1313edd16368SStephen M. Cameron 	 * Assign the same bus and target for this new LUN.
1314edd16368SStephen M. Cameron 	 * Use the logical unit number from the firmware.
1315edd16368SStephen M. Cameron 	 */
1316edd16368SStephen M. Cameron 	memcpy(addr1, device->scsi3addr, 8);
1317edd16368SStephen M. Cameron 	addr1[4] = 0;
13189a4178b7Sshane.seymour 	addr1[5] = 0;
1319edd16368SStephen M. Cameron 	for (i = 0; i < n; i++) {
1320edd16368SStephen M. Cameron 		sd = h->dev[i];
1321edd16368SStephen M. Cameron 		memcpy(addr2, sd->scsi3addr, 8);
1322edd16368SStephen M. Cameron 		addr2[4] = 0;
13239a4178b7Sshane.seymour 		addr2[5] = 0;
13249a4178b7Sshane.seymour 		/* differ only in byte 4 and 5? */
1325edd16368SStephen M. Cameron 		if (memcmp(addr1, addr2, 8) == 0) {
1326edd16368SStephen M. Cameron 			device->bus = sd->bus;
1327edd16368SStephen M. Cameron 			device->target = sd->target;
1328edd16368SStephen M. Cameron 			device->lun = device->scsi3addr[4];
1329edd16368SStephen M. Cameron 			break;
1330edd16368SStephen M. Cameron 		}
1331edd16368SStephen M. Cameron 	}
1332edd16368SStephen M. Cameron 	if (device->lun == -1) {
1333edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1334edd16368SStephen M. Cameron 			" suspect firmware bug or unsupported hardware "
1335edd16368SStephen M. Cameron 			"configuration.\n");
1336edd16368SStephen M. Cameron 		return -1;
1337edd16368SStephen M. Cameron 	}
1338edd16368SStephen M. Cameron 
1339edd16368SStephen M. Cameron lun_assigned:
1340edd16368SStephen M. Cameron 
1341edd16368SStephen M. Cameron 	h->dev[n] = device;
1342edd16368SStephen M. Cameron 	h->ndevices++;
1343edd16368SStephen M. Cameron 	added[*nadded] = device;
1344edd16368SStephen M. Cameron 	(*nadded)++;
13450d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, device,
13462a168208SKevin Barnett 		device->expose_device ? "added" : "masked");
1347edd16368SStephen M. Cameron 	return 0;
1348edd16368SStephen M. Cameron }
1349edd16368SStephen M. Cameron 
1350b2582a65SDon Brace /*
1351b2582a65SDon Brace  * Called during a scan operation.
1352b2582a65SDon Brace  *
1353b2582a65SDon Brace  * Update an entry in h->dev[] array.
1354b2582a65SDon Brace  */
13558aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h,
1356bd9244f7SScott Teel 	int entry, struct hpsa_scsi_dev_t *new_entry)
1357bd9244f7SScott Teel {
1358bd9244f7SScott Teel 	/* assumes h->devlock is held */
1359bd9244f7SScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1360bd9244f7SScott Teel 
1361bd9244f7SScott Teel 	/* Raid level changed. */
1362bd9244f7SScott Teel 	h->dev[entry]->raid_level = new_entry->raid_level;
1363250fb125SStephen M. Cameron 
1364b2582a65SDon Brace 	/*
1365b2582a65SDon Brace 	 * ioacccel_handle may have changed for a dual domain disk
1366b2582a65SDon Brace 	 */
1367b2582a65SDon Brace 	h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1368b2582a65SDon Brace 
136903383736SDon Brace 	/* Raid offload parameters changed.  Careful about the ordering. */
1370b2582a65SDon Brace 	if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
137103383736SDon Brace 		/*
137203383736SDon Brace 		 * if drive is newly offload_enabled, we want to copy the
137303383736SDon Brace 		 * raid map data first.  If previously offload_enabled and
137403383736SDon Brace 		 * offload_config were set, raid map data had better be
1375b2582a65SDon Brace 		 * the same as it was before. If raid map data has changed
137603383736SDon Brace 		 * then it had better be the case that
137703383736SDon Brace 		 * h->dev[entry]->offload_enabled is currently 0.
137803383736SDon Brace 		 */
13799fb0de2dSStephen M. Cameron 		h->dev[entry]->raid_map = new_entry->raid_map;
138003383736SDon Brace 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
138103383736SDon Brace 	}
1382b2582a65SDon Brace 	if (new_entry->offload_to_be_enabled) {
1383a3144e0bSJoe Handzik 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1384a3144e0bSJoe Handzik 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1385a3144e0bSJoe Handzik 	}
1386a3144e0bSJoe Handzik 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
138703383736SDon Brace 	h->dev[entry]->offload_config = new_entry->offload_config;
138803383736SDon Brace 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
138903383736SDon Brace 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1390250fb125SStephen M. Cameron 
139141ce4c35SStephen Cameron 	/*
139241ce4c35SStephen Cameron 	 * We can turn off ioaccel offload now, but need to delay turning
1393b2582a65SDon Brace 	 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
139441ce4c35SStephen Cameron 	 * can't do that until all the devices are updated.
139541ce4c35SStephen Cameron 	 */
1396b2582a65SDon Brace 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1397b2582a65SDon Brace 
1398b2582a65SDon Brace 	/*
1399b2582a65SDon Brace 	 * turn ioaccel off immediately if told to do so.
1400b2582a65SDon Brace 	 */
1401b2582a65SDon Brace 	if (!new_entry->offload_to_be_enabled)
140241ce4c35SStephen Cameron 		h->dev[entry]->offload_enabled = 0;
140341ce4c35SStephen Cameron 
14040d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1405bd9244f7SScott Teel }
1406bd9244f7SScott Teel 
14072a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */
14088aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h,
14092a8ccf31SStephen M. Cameron 	int entry, struct hpsa_scsi_dev_t *new_entry,
14102a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *added[], int *nadded,
14112a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
14122a8ccf31SStephen M. Cameron {
14132a8ccf31SStephen M. Cameron 	/* assumes h->devlock is held */
1414cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
14152a8ccf31SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
14162a8ccf31SStephen M. Cameron 	(*nremoved)++;
141701350d05SStephen M. Cameron 
141801350d05SStephen M. Cameron 	/*
141901350d05SStephen M. Cameron 	 * New physical devices won't have target/lun assigned yet
142001350d05SStephen M. Cameron 	 * so we need to preserve the values in the slot we are replacing.
142101350d05SStephen M. Cameron 	 */
142201350d05SStephen M. Cameron 	if (new_entry->target == -1) {
142301350d05SStephen M. Cameron 		new_entry->target = h->dev[entry]->target;
142401350d05SStephen M. Cameron 		new_entry->lun = h->dev[entry]->lun;
142501350d05SStephen M. Cameron 	}
142601350d05SStephen M. Cameron 
14272a8ccf31SStephen M. Cameron 	h->dev[entry] = new_entry;
14282a8ccf31SStephen M. Cameron 	added[*nadded] = new_entry;
14292a8ccf31SStephen M. Cameron 	(*nadded)++;
1430b2582a65SDon Brace 
14310d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
14322a8ccf31SStephen M. Cameron }
14332a8ccf31SStephen M. Cameron 
1434edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */
14358aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1436edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1437edd16368SStephen M. Cameron {
1438edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1439edd16368SStephen M. Cameron 	int i;
1440edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1441edd16368SStephen M. Cameron 
1442cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1443edd16368SStephen M. Cameron 
1444edd16368SStephen M. Cameron 	sd = h->dev[entry];
1445edd16368SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
1446edd16368SStephen M. Cameron 	(*nremoved)++;
1447edd16368SStephen M. Cameron 
1448edd16368SStephen M. Cameron 	for (i = entry; i < h->ndevices-1; i++)
1449edd16368SStephen M. Cameron 		h->dev[i] = h->dev[i+1];
1450edd16368SStephen M. Cameron 	h->ndevices--;
14510d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1452edd16368SStephen M. Cameron }
1453edd16368SStephen M. Cameron 
1454edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \
1455edd16368SStephen M. Cameron 	(a)[7] == (b)[7] && \
1456edd16368SStephen M. Cameron 	(a)[6] == (b)[6] && \
1457edd16368SStephen M. Cameron 	(a)[5] == (b)[5] && \
1458edd16368SStephen M. Cameron 	(a)[4] == (b)[4] && \
1459edd16368SStephen M. Cameron 	(a)[3] == (b)[3] && \
1460edd16368SStephen M. Cameron 	(a)[2] == (b)[2] && \
1461edd16368SStephen M. Cameron 	(a)[1] == (b)[1] && \
1462edd16368SStephen M. Cameron 	(a)[0] == (b)[0])
1463edd16368SStephen M. Cameron 
1464edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h,
1465edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *added)
1466edd16368SStephen M. Cameron {
1467edd16368SStephen M. Cameron 	/* called when scsi_add_device fails in order to re-adjust
1468edd16368SStephen M. Cameron 	 * h->dev[] to match the mid layer's view.
1469edd16368SStephen M. Cameron 	 */
1470edd16368SStephen M. Cameron 	unsigned long flags;
1471edd16368SStephen M. Cameron 	int i, j;
1472edd16368SStephen M. Cameron 
1473edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
1474edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1475edd16368SStephen M. Cameron 		if (h->dev[i] == added) {
1476edd16368SStephen M. Cameron 			for (j = i; j < h->ndevices-1; j++)
1477edd16368SStephen M. Cameron 				h->dev[j] = h->dev[j+1];
1478edd16368SStephen M. Cameron 			h->ndevices--;
1479edd16368SStephen M. Cameron 			break;
1480edd16368SStephen M. Cameron 		}
1481edd16368SStephen M. Cameron 	}
1482edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
1483edd16368SStephen M. Cameron 	kfree(added);
1484edd16368SStephen M. Cameron }
1485edd16368SStephen M. Cameron 
1486edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1487edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev2)
1488edd16368SStephen M. Cameron {
1489edd16368SStephen M. Cameron 	/* we compare everything except lun and target as these
1490edd16368SStephen M. Cameron 	 * are not yet assigned.  Compare parts likely
1491edd16368SStephen M. Cameron 	 * to differ first
1492edd16368SStephen M. Cameron 	 */
1493edd16368SStephen M. Cameron 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1494edd16368SStephen M. Cameron 		sizeof(dev1->scsi3addr)) != 0)
1495edd16368SStephen M. Cameron 		return 0;
1496edd16368SStephen M. Cameron 	if (memcmp(dev1->device_id, dev2->device_id,
1497edd16368SStephen M. Cameron 		sizeof(dev1->device_id)) != 0)
1498edd16368SStephen M. Cameron 		return 0;
1499edd16368SStephen M. Cameron 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1500edd16368SStephen M. Cameron 		return 0;
1501edd16368SStephen M. Cameron 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1502edd16368SStephen M. Cameron 		return 0;
1503edd16368SStephen M. Cameron 	if (dev1->devtype != dev2->devtype)
1504edd16368SStephen M. Cameron 		return 0;
1505edd16368SStephen M. Cameron 	if (dev1->bus != dev2->bus)
1506edd16368SStephen M. Cameron 		return 0;
1507edd16368SStephen M. Cameron 	return 1;
1508edd16368SStephen M. Cameron }
1509edd16368SStephen M. Cameron 
1510bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1511bd9244f7SScott Teel 	struct hpsa_scsi_dev_t *dev2)
1512bd9244f7SScott Teel {
1513bd9244f7SScott Teel 	/* Device attributes that can change, but don't mean
1514bd9244f7SScott Teel 	 * that the device is a different device, nor that the OS
1515bd9244f7SScott Teel 	 * needs to be told anything about the change.
1516bd9244f7SScott Teel 	 */
1517bd9244f7SScott Teel 	if (dev1->raid_level != dev2->raid_level)
1518bd9244f7SScott Teel 		return 1;
1519250fb125SStephen M. Cameron 	if (dev1->offload_config != dev2->offload_config)
1520250fb125SStephen M. Cameron 		return 1;
1521b2582a65SDon Brace 	if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1522250fb125SStephen M. Cameron 		return 1;
152393849508SDon Brace 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
152403383736SDon Brace 		if (dev1->queue_depth != dev2->queue_depth)
152503383736SDon Brace 			return 1;
1526b2582a65SDon Brace 	/*
1527b2582a65SDon Brace 	 * This can happen for dual domain devices. An active
1528b2582a65SDon Brace 	 * path change causes the ioaccel handle to change
1529b2582a65SDon Brace 	 *
1530b2582a65SDon Brace 	 * for example note the handle differences between p0 and p1
1531b2582a65SDon Brace 	 * Device                    WWN               ,WWN hash,Handle
1532b2582a65SDon Brace 	 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1533b2582a65SDon Brace 	 *	p1                   0x5000C5005FC4DAC9,0x6798C0,0x00040004
1534b2582a65SDon Brace 	 */
1535b2582a65SDon Brace 	if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1536b2582a65SDon Brace 		return 1;
1537bd9244f7SScott Teel 	return 0;
1538bd9244f7SScott Teel }
1539bd9244f7SScott Teel 
1540edd16368SStephen M. Cameron /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1541edd16368SStephen M. Cameron  * and return needle location in *index.  If scsi3addr matches, but not
1542edd16368SStephen M. Cameron  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1543bd9244f7SScott Teel  * location in *index.
1544bd9244f7SScott Teel  * In the case of a minor device attribute change, such as RAID level, just
1545bd9244f7SScott Teel  * return DEVICE_UPDATED, along with the updated device's location in index.
1546bd9244f7SScott Teel  * If needle not found, return DEVICE_NOT_FOUND.
1547edd16368SStephen M. Cameron  */
1548edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1549edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1550edd16368SStephen M. Cameron 	int *index)
1551edd16368SStephen M. Cameron {
1552edd16368SStephen M. Cameron 	int i;
1553edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0
1554edd16368SStephen M. Cameron #define DEVICE_CHANGED 1
1555edd16368SStephen M. Cameron #define DEVICE_SAME 2
1556bd9244f7SScott Teel #define DEVICE_UPDATED 3
15571d33d85dSDon Brace 	if (needle == NULL)
15581d33d85dSDon Brace 		return DEVICE_NOT_FOUND;
15591d33d85dSDon Brace 
1560edd16368SStephen M. Cameron 	for (i = 0; i < haystack_size; i++) {
156123231048SStephen M. Cameron 		if (haystack[i] == NULL) /* previously removed. */
156223231048SStephen M. Cameron 			continue;
1563edd16368SStephen M. Cameron 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1564edd16368SStephen M. Cameron 			*index = i;
1565bd9244f7SScott Teel 			if (device_is_the_same(needle, haystack[i])) {
1566bd9244f7SScott Teel 				if (device_updated(needle, haystack[i]))
1567bd9244f7SScott Teel 					return DEVICE_UPDATED;
1568edd16368SStephen M. Cameron 				return DEVICE_SAME;
1569bd9244f7SScott Teel 			} else {
15709846590eSStephen M. Cameron 				/* Keep offline devices offline */
15719846590eSStephen M. Cameron 				if (needle->volume_offline)
15729846590eSStephen M. Cameron 					return DEVICE_NOT_FOUND;
1573edd16368SStephen M. Cameron 				return DEVICE_CHANGED;
1574edd16368SStephen M. Cameron 			}
1575edd16368SStephen M. Cameron 		}
1576bd9244f7SScott Teel 	}
1577edd16368SStephen M. Cameron 	*index = -1;
1578edd16368SStephen M. Cameron 	return DEVICE_NOT_FOUND;
1579edd16368SStephen M. Cameron }
1580edd16368SStephen M. Cameron 
15819846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h,
15829846590eSStephen M. Cameron 					unsigned char scsi3addr[])
15839846590eSStephen M. Cameron {
15849846590eSStephen M. Cameron 	struct offline_device_entry *device;
15859846590eSStephen M. Cameron 	unsigned long flags;
15869846590eSStephen M. Cameron 
15879846590eSStephen M. Cameron 	/* Check to see if device is already on the list */
15889846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15899846590eSStephen M. Cameron 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
15909846590eSStephen M. Cameron 		if (memcmp(device->scsi3addr, scsi3addr,
15919846590eSStephen M. Cameron 			sizeof(device->scsi3addr)) == 0) {
15929846590eSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
15939846590eSStephen M. Cameron 			return;
15949846590eSStephen M. Cameron 		}
15959846590eSStephen M. Cameron 	}
15969846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15979846590eSStephen M. Cameron 
15989846590eSStephen M. Cameron 	/* Device is not on the list, add it. */
15999846590eSStephen M. Cameron 	device = kmalloc(sizeof(*device), GFP_KERNEL);
16007e8a9486SAmit Kushwaha 	if (!device)
16019846590eSStephen M. Cameron 		return;
16027e8a9486SAmit Kushwaha 
16039846590eSStephen M. Cameron 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
16049846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
16059846590eSStephen M. Cameron 	list_add_tail(&device->offline_list, &h->offline_device_list);
16069846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
16079846590eSStephen M. Cameron }
16089846590eSStephen M. Cameron 
16099846590eSStephen M. Cameron /* Print a message explaining various offline volume states */
16109846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h,
16119846590eSStephen M. Cameron 	struct hpsa_scsi_dev_t *sd)
16129846590eSStephen M. Cameron {
16139846590eSStephen M. Cameron 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
16149846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16159846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
16169846590eSStephen M. Cameron 			h->scsi_host->host_no,
16179846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16189846590eSStephen M. Cameron 	switch (sd->volume_offline) {
16199846590eSStephen M. Cameron 	case HPSA_LV_OK:
16209846590eSStephen M. Cameron 		break;
16219846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
16229846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16239846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
16249846590eSStephen M. Cameron 			h->scsi_host->host_no,
16259846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16269846590eSStephen M. Cameron 		break;
16275ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
16285ca01204SScott Benesh 		dev_info(&h->pdev->dev,
16295ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
16305ca01204SScott Benesh 			h->scsi_host->host_no,
16315ca01204SScott Benesh 			sd->bus, sd->target, sd->lun);
16325ca01204SScott Benesh 		break;
16339846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
16349846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16355ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
16369846590eSStephen M. Cameron 			h->scsi_host->host_no,
16379846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16389846590eSStephen M. Cameron 		break;
16399846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
16409846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16419846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
16429846590eSStephen M. Cameron 			h->scsi_host->host_no,
16439846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16449846590eSStephen M. Cameron 		break;
16459846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
16469846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16479846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
16489846590eSStephen M. Cameron 			h->scsi_host->host_no,
16499846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16509846590eSStephen M. Cameron 		break;
16519846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
16529846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16539846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
16549846590eSStephen M. Cameron 			h->scsi_host->host_no,
16559846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16569846590eSStephen M. Cameron 		break;
16579846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
16589846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16599846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
16609846590eSStephen M. Cameron 			h->scsi_host->host_no,
16619846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16629846590eSStephen M. Cameron 		break;
16639846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
16649846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16659846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
16669846590eSStephen M. Cameron 			h->scsi_host->host_no,
16679846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16689846590eSStephen M. Cameron 		break;
16699846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
16709846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16719846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
16729846590eSStephen M. Cameron 			h->scsi_host->host_no,
16739846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16749846590eSStephen M. Cameron 		break;
16759846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION:
16769846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16779846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
16789846590eSStephen M. Cameron 			h->scsi_host->host_no,
16799846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16809846590eSStephen M. Cameron 		break;
16819846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
16829846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16839846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
16849846590eSStephen M. Cameron 			h->scsi_host->host_no,
16859846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16869846590eSStephen M. Cameron 		break;
16879846590eSStephen M. Cameron 	}
16889846590eSStephen M. Cameron }
16899846590eSStephen M. Cameron 
169003383736SDon Brace /*
169103383736SDon Brace  * Figure the list of physical drive pointers for a logical drive with
169203383736SDon Brace  * raid offload configured.
169303383736SDon Brace  */
169403383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
169503383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices,
169603383736SDon Brace 				struct hpsa_scsi_dev_t *logical_drive)
169703383736SDon Brace {
169803383736SDon Brace 	struct raid_map_data *map = &logical_drive->raid_map;
169903383736SDon Brace 	struct raid_map_disk_data *dd = &map->data[0];
170003383736SDon Brace 	int i, j;
170103383736SDon Brace 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
170203383736SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
170303383736SDon Brace 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
170403383736SDon Brace 				le16_to_cpu(map->layout_map_count) *
170503383736SDon Brace 				total_disks_per_row;
170603383736SDon Brace 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
170703383736SDon Brace 				total_disks_per_row;
170803383736SDon Brace 	int qdepth;
170903383736SDon Brace 
171003383736SDon Brace 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
171103383736SDon Brace 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
171203383736SDon Brace 
1713d604f533SWebb Scales 	logical_drive->nphysical_disks = nraid_map_entries;
1714d604f533SWebb Scales 
171503383736SDon Brace 	qdepth = 0;
171603383736SDon Brace 	for (i = 0; i < nraid_map_entries; i++) {
171703383736SDon Brace 		logical_drive->phys_disk[i] = NULL;
171803383736SDon Brace 		if (!logical_drive->offload_config)
171903383736SDon Brace 			continue;
172003383736SDon Brace 		for (j = 0; j < ndevices; j++) {
17211d33d85dSDon Brace 			if (dev[j] == NULL)
17221d33d85dSDon Brace 				continue;
1723ff615f06SPetros Koutoupis 			if (dev[j]->devtype != TYPE_DISK &&
1724ff615f06SPetros Koutoupis 			    dev[j]->devtype != TYPE_ZBC)
1725af15ed36SDon Brace 				continue;
1726f3f01730SKevin Barnett 			if (is_logical_device(dev[j]))
172703383736SDon Brace 				continue;
172803383736SDon Brace 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
172903383736SDon Brace 				continue;
173003383736SDon Brace 
173103383736SDon Brace 			logical_drive->phys_disk[i] = dev[j];
173203383736SDon Brace 			if (i < nphys_disk)
173303383736SDon Brace 				qdepth = min(h->nr_cmds, qdepth +
173403383736SDon Brace 				    logical_drive->phys_disk[i]->queue_depth);
173503383736SDon Brace 			break;
173603383736SDon Brace 		}
173703383736SDon Brace 
173803383736SDon Brace 		/*
173903383736SDon Brace 		 * This can happen if a physical drive is removed and
174003383736SDon Brace 		 * the logical drive is degraded.  In that case, the RAID
174103383736SDon Brace 		 * map data will refer to a physical disk which isn't actually
174203383736SDon Brace 		 * present.  And in that case offload_enabled should already
174303383736SDon Brace 		 * be 0, but we'll turn it off here just in case
174403383736SDon Brace 		 */
174503383736SDon Brace 		if (!logical_drive->phys_disk[i]) {
1746b2582a65SDon Brace 			dev_warn(&h->pdev->dev,
1747b2582a65SDon Brace 				"%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1748b2582a65SDon Brace 				__func__,
1749b2582a65SDon Brace 				h->scsi_host->host_no, logical_drive->bus,
1750b2582a65SDon Brace 				logical_drive->target, logical_drive->lun);
17513e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(logical_drive);
175241ce4c35SStephen Cameron 			logical_drive->queue_depth = 8;
175303383736SDon Brace 		}
175403383736SDon Brace 	}
175503383736SDon Brace 	if (nraid_map_entries)
175603383736SDon Brace 		/*
175703383736SDon Brace 		 * This is correct for reads, too high for full stripe writes,
175803383736SDon Brace 		 * way too high for partial stripe writes
175903383736SDon Brace 		 */
176003383736SDon Brace 		logical_drive->queue_depth = qdepth;
17612c5fc363SDon Brace 	else {
17622c5fc363SDon Brace 		if (logical_drive->external)
17632c5fc363SDon Brace 			logical_drive->queue_depth = EXTERNAL_QD;
176403383736SDon Brace 		else
176503383736SDon Brace 			logical_drive->queue_depth = h->nr_cmds;
176603383736SDon Brace 	}
17672c5fc363SDon Brace }
176803383736SDon Brace 
176903383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
177003383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices)
177103383736SDon Brace {
177203383736SDon Brace 	int i;
177303383736SDon Brace 
177403383736SDon Brace 	for (i = 0; i < ndevices; i++) {
17751d33d85dSDon Brace 		if (dev[i] == NULL)
17761d33d85dSDon Brace 			continue;
1777ff615f06SPetros Koutoupis 		if (dev[i]->devtype != TYPE_DISK &&
1778ff615f06SPetros Koutoupis 		    dev[i]->devtype != TYPE_ZBC)
1779af15ed36SDon Brace 			continue;
1780f3f01730SKevin Barnett 		if (!is_logical_device(dev[i]))
178103383736SDon Brace 			continue;
178241ce4c35SStephen Cameron 
178341ce4c35SStephen Cameron 		/*
178441ce4c35SStephen Cameron 		 * If offload is currently enabled, the RAID map and
178541ce4c35SStephen Cameron 		 * phys_disk[] assignment *better* not be changing
1786b2582a65SDon Brace 		 * because we would be changing ioaccel phsy_disk[] pointers
1787b2582a65SDon Brace 		 * on a ioaccel volume processing I/O requests.
1788b2582a65SDon Brace 		 *
1789b2582a65SDon Brace 		 * If an ioaccel volume status changed, initially because it was
1790b2582a65SDon Brace 		 * re-configured and thus underwent a transformation, or
1791b2582a65SDon Brace 		 * a drive failed, we would have received a state change
1792b2582a65SDon Brace 		 * request and ioaccel should have been turned off. When the
1793b2582a65SDon Brace 		 * transformation completes, we get another state change
1794b2582a65SDon Brace 		 * request to turn ioaccel back on. In this case, we need
1795b2582a65SDon Brace 		 * to update the ioaccel information.
1796b2582a65SDon Brace 		 *
1797b2582a65SDon Brace 		 * Thus: If it is not currently enabled, but will be after
1798b2582a65SDon Brace 		 * the scan completes, make sure the ioaccel pointers
1799b2582a65SDon Brace 		 * are up to date.
180041ce4c35SStephen Cameron 		 */
180141ce4c35SStephen Cameron 
1802b2582a65SDon Brace 		if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
180303383736SDon Brace 			hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
180403383736SDon Brace 	}
180503383736SDon Brace }
180603383736SDon Brace 
1807096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1808096ccff4SKevin Barnett {
1809096ccff4SKevin Barnett 	int rc = 0;
1810096ccff4SKevin Barnett 
1811096ccff4SKevin Barnett 	if (!h->scsi_host)
1812096ccff4SKevin Barnett 		return 1;
1813096ccff4SKevin Barnett 
1814d04e62b9SKevin Barnett 	if (is_logical_device(device)) /* RAID */
1815096ccff4SKevin Barnett 		rc = scsi_add_device(h->scsi_host, device->bus,
1816096ccff4SKevin Barnett 					device->target, device->lun);
1817d04e62b9SKevin Barnett 	else /* HBA */
1818d04e62b9SKevin Barnett 		rc = hpsa_add_sas_device(h->sas_host, device);
1819d04e62b9SKevin Barnett 
1820096ccff4SKevin Barnett 	return rc;
1821096ccff4SKevin Barnett }
1822096ccff4SKevin Barnett 
1823ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1824ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *dev)
1825ba74fdc4SDon Brace {
1826ba74fdc4SDon Brace 	int i;
1827ba74fdc4SDon Brace 	int count = 0;
1828ba74fdc4SDon Brace 
1829ba74fdc4SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
1830ba74fdc4SDon Brace 		struct CommandList *c = h->cmd_pool + i;
1831ba74fdc4SDon Brace 		int refcount = atomic_inc_return(&c->refcount);
1832ba74fdc4SDon Brace 
1833ba74fdc4SDon Brace 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1834ba74fdc4SDon Brace 				dev->scsi3addr)) {
1835ba74fdc4SDon Brace 			unsigned long flags;
1836ba74fdc4SDon Brace 
1837ba74fdc4SDon Brace 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
1838ba74fdc4SDon Brace 			if (!hpsa_is_cmd_idle(c))
1839ba74fdc4SDon Brace 				++count;
1840ba74fdc4SDon Brace 			spin_unlock_irqrestore(&h->lock, flags);
1841ba74fdc4SDon Brace 		}
1842ba74fdc4SDon Brace 
1843ba74fdc4SDon Brace 		cmd_free(h, c);
1844ba74fdc4SDon Brace 	}
1845ba74fdc4SDon Brace 
1846ba74fdc4SDon Brace 	return count;
1847ba74fdc4SDon Brace }
1848ba74fdc4SDon Brace 
1849b443d3eaSDon Brace #define NUM_WAIT 20
1850ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1851ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *device)
1852ba74fdc4SDon Brace {
1853ba74fdc4SDon Brace 	int cmds = 0;
1854ba74fdc4SDon Brace 	int waits = 0;
1855b443d3eaSDon Brace 	int num_wait = NUM_WAIT;
1856b443d3eaSDon Brace 
1857b443d3eaSDon Brace 	if (device->external)
1858b443d3eaSDon Brace 		num_wait = HPSA_EH_PTRAID_TIMEOUT;
1859ba74fdc4SDon Brace 
1860ba74fdc4SDon Brace 	while (1) {
1861ba74fdc4SDon Brace 		cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1862ba74fdc4SDon Brace 		if (cmds == 0)
1863ba74fdc4SDon Brace 			break;
1864b443d3eaSDon Brace 		if (++waits > num_wait)
1865ba74fdc4SDon Brace 			break;
18669211a07fSDon Brace 		msleep(1000);
18679211a07fSDon Brace 	}
18689211a07fSDon Brace 
1869b443d3eaSDon Brace 	if (waits > num_wait) {
1870ba74fdc4SDon Brace 		dev_warn(&h->pdev->dev,
1871b443d3eaSDon Brace 			"%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1872b443d3eaSDon Brace 			__func__,
1873b443d3eaSDon Brace 			h->scsi_host->host_no,
1874b443d3eaSDon Brace 			device->bus, device->target, device->lun, cmds);
1875b443d3eaSDon Brace 	}
1876ba74fdc4SDon Brace }
1877ba74fdc4SDon Brace 
1878096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h,
1879096ccff4SKevin Barnett 			struct hpsa_scsi_dev_t *device)
1880096ccff4SKevin Barnett {
1881096ccff4SKevin Barnett 	struct scsi_device *sdev = NULL;
1882096ccff4SKevin Barnett 
1883096ccff4SKevin Barnett 	if (!h->scsi_host)
1884096ccff4SKevin Barnett 		return;
1885096ccff4SKevin Barnett 
18860ff365f5SDon Brace 	/*
18870ff365f5SDon Brace 	 * Allow for commands to drain
18880ff365f5SDon Brace 	 */
18890ff365f5SDon Brace 	device->removed = 1;
18900ff365f5SDon Brace 	hpsa_wait_for_outstanding_commands_for_dev(h, device);
18910ff365f5SDon Brace 
1892d04e62b9SKevin Barnett 	if (is_logical_device(device)) { /* RAID */
1893096ccff4SKevin Barnett 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1894096ccff4SKevin Barnett 						device->target, device->lun);
1895096ccff4SKevin Barnett 		if (sdev) {
1896096ccff4SKevin Barnett 			scsi_remove_device(sdev);
1897096ccff4SKevin Barnett 			scsi_device_put(sdev);
1898096ccff4SKevin Barnett 		} else {
1899096ccff4SKevin Barnett 			/*
1900096ccff4SKevin Barnett 			 * We don't expect to get here.  Future commands
1901096ccff4SKevin Barnett 			 * to this device will get a selection timeout as
1902096ccff4SKevin Barnett 			 * if the device were gone.
1903096ccff4SKevin Barnett 			 */
1904096ccff4SKevin Barnett 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1905096ccff4SKevin Barnett 					"didn't find device for removal.");
1906096ccff4SKevin Barnett 		}
1907ba74fdc4SDon Brace 	} else { /* HBA */
1908ba74fdc4SDon Brace 
1909d04e62b9SKevin Barnett 		hpsa_remove_sas_device(device);
1910096ccff4SKevin Barnett 	}
1911ba74fdc4SDon Brace }
1912096ccff4SKevin Barnett 
19138aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1914edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd[], int nsds)
1915edd16368SStephen M. Cameron {
1916edd16368SStephen M. Cameron 	/* sd contains scsi3 addresses and devtypes, and inquiry
1917edd16368SStephen M. Cameron 	 * data.  This function takes what's in sd to be the current
1918edd16368SStephen M. Cameron 	 * reality and updates h->dev[] to reflect that reality.
1919edd16368SStephen M. Cameron 	 */
1920edd16368SStephen M. Cameron 	int i, entry, device_change, changes = 0;
1921edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *csd;
1922edd16368SStephen M. Cameron 	unsigned long flags;
1923edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **added, **removed;
1924edd16368SStephen M. Cameron 	int nadded, nremoved;
1925edd16368SStephen M. Cameron 
1926da03ded0SDon Brace 	/*
1927da03ded0SDon Brace 	 * A reset can cause a device status to change
1928da03ded0SDon Brace 	 * re-schedule the scan to see what happened.
1929da03ded0SDon Brace 	 */
1930c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
1931da03ded0SDon Brace 	if (h->reset_in_progress) {
1932da03ded0SDon Brace 		h->drv_req_rescan = 1;
1933c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
1934da03ded0SDon Brace 		return;
1935da03ded0SDon Brace 	}
1936c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
1937edd16368SStephen M. Cameron 
19386396bb22SKees Cook 	added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
19396396bb22SKees Cook 	removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1940edd16368SStephen M. Cameron 
1941edd16368SStephen M. Cameron 	if (!added || !removed) {
1942edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in "
1943edd16368SStephen M. Cameron 			"adjust_hpsa_scsi_table\n");
1944edd16368SStephen M. Cameron 		goto free_and_out;
1945edd16368SStephen M. Cameron 	}
1946edd16368SStephen M. Cameron 
1947edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1948edd16368SStephen M. Cameron 
1949edd16368SStephen M. Cameron 	/* find any devices in h->dev[] that are not in
1950edd16368SStephen M. Cameron 	 * sd[] and remove them from h->dev[], and for any
1951edd16368SStephen M. Cameron 	 * devices which have changed, remove the old device
1952edd16368SStephen M. Cameron 	 * info and add the new device info.
1953bd9244f7SScott Teel 	 * If minor device attributes change, just update
1954bd9244f7SScott Teel 	 * the existing device structure.
1955edd16368SStephen M. Cameron 	 */
1956edd16368SStephen M. Cameron 	i = 0;
1957edd16368SStephen M. Cameron 	nremoved = 0;
1958edd16368SStephen M. Cameron 	nadded = 0;
1959edd16368SStephen M. Cameron 	while (i < h->ndevices) {
1960edd16368SStephen M. Cameron 		csd = h->dev[i];
1961edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1962edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1963edd16368SStephen M. Cameron 			changes++;
19648aa60681SDon Brace 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1965edd16368SStephen M. Cameron 			continue; /* remove ^^^, hence i not incremented */
1966edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1967edd16368SStephen M. Cameron 			changes++;
19688aa60681SDon Brace 			hpsa_scsi_replace_entry(h, i, sd[entry],
19692a8ccf31SStephen M. Cameron 				added, &nadded, removed, &nremoved);
1970c7f172dcSStephen M. Cameron 			/* Set it to NULL to prevent it from being freed
1971c7f172dcSStephen M. Cameron 			 * at the bottom of hpsa_update_scsi_devices()
1972c7f172dcSStephen M. Cameron 			 */
1973c7f172dcSStephen M. Cameron 			sd[entry] = NULL;
1974bd9244f7SScott Teel 		} else if (device_change == DEVICE_UPDATED) {
19758aa60681SDon Brace 			hpsa_scsi_update_entry(h, i, sd[entry]);
1976edd16368SStephen M. Cameron 		}
1977edd16368SStephen M. Cameron 		i++;
1978edd16368SStephen M. Cameron 	}
1979edd16368SStephen M. Cameron 
1980edd16368SStephen M. Cameron 	/* Now, make sure every device listed in sd[] is also
1981edd16368SStephen M. Cameron 	 * listed in h->dev[], adding them if they aren't found
1982edd16368SStephen M. Cameron 	 */
1983edd16368SStephen M. Cameron 
1984edd16368SStephen M. Cameron 	for (i = 0; i < nsds; i++) {
1985edd16368SStephen M. Cameron 		if (!sd[i]) /* if already added above. */
1986edd16368SStephen M. Cameron 			continue;
19879846590eSStephen M. Cameron 
19889846590eSStephen M. Cameron 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
19899846590eSStephen M. Cameron 		 * as the SCSI mid-layer does not handle such devices well.
19909846590eSStephen M. Cameron 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
19919846590eSStephen M. Cameron 		 * at 160Hz, and prevents the system from coming up.
19929846590eSStephen M. Cameron 		 */
19939846590eSStephen M. Cameron 		if (sd[i]->volume_offline) {
19949846590eSStephen M. Cameron 			hpsa_show_volume_status(h, sd[i]);
19950d96ef5fSWebb Scales 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
19969846590eSStephen M. Cameron 			continue;
19979846590eSStephen M. Cameron 		}
19989846590eSStephen M. Cameron 
1999edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2000edd16368SStephen M. Cameron 					h->ndevices, &entry);
2001edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
2002edd16368SStephen M. Cameron 			changes++;
20038aa60681SDon Brace 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2004edd16368SStephen M. Cameron 				break;
2005edd16368SStephen M. Cameron 			sd[i] = NULL; /* prevent from being freed later. */
2006edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
2007edd16368SStephen M. Cameron 			/* should never happen... */
2008edd16368SStephen M. Cameron 			changes++;
2009edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev,
2010edd16368SStephen M. Cameron 				"device unexpectedly changed.\n");
2011edd16368SStephen M. Cameron 			/* but if it does happen, we just ignore that device */
2012edd16368SStephen M. Cameron 		}
2013edd16368SStephen M. Cameron 	}
201441ce4c35SStephen Cameron 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
201541ce4c35SStephen Cameron 
2016b2582a65SDon Brace 	/*
2017b2582a65SDon Brace 	 * Now that h->dev[]->phys_disk[] is coherent, we can enable
201841ce4c35SStephen Cameron 	 * any logical drives that need it enabled.
2019b2582a65SDon Brace 	 *
2020b2582a65SDon Brace 	 * The raid map should be current by now.
2021b2582a65SDon Brace 	 *
2022b2582a65SDon Brace 	 * We are updating the device list used for I/O requests.
202341ce4c35SStephen Cameron 	 */
20241d33d85dSDon Brace 	for (i = 0; i < h->ndevices; i++) {
20251d33d85dSDon Brace 		if (h->dev[i] == NULL)
20261d33d85dSDon Brace 			continue;
202741ce4c35SStephen Cameron 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
20281d33d85dSDon Brace 	}
202941ce4c35SStephen Cameron 
2030edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2031edd16368SStephen M. Cameron 
20329846590eSStephen M. Cameron 	/* Monitor devices which are in one of several NOT READY states to be
20339846590eSStephen M. Cameron 	 * brought online later. This must be done without holding h->devlock,
20349846590eSStephen M. Cameron 	 * so don't touch h->dev[]
20359846590eSStephen M. Cameron 	 */
20369846590eSStephen M. Cameron 	for (i = 0; i < nsds; i++) {
20379846590eSStephen M. Cameron 		if (!sd[i]) /* if already added above. */
20389846590eSStephen M. Cameron 			continue;
20399846590eSStephen M. Cameron 		if (sd[i]->volume_offline)
20409846590eSStephen M. Cameron 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
20419846590eSStephen M. Cameron 	}
20429846590eSStephen M. Cameron 
2043edd16368SStephen M. Cameron 	/* Don't notify scsi mid layer of any changes the first time through
2044edd16368SStephen M. Cameron 	 * (or if there are no changes) scsi_scan_host will do it later the
2045edd16368SStephen M. Cameron 	 * first time through.
2046edd16368SStephen M. Cameron 	 */
20478aa60681SDon Brace 	if (!changes)
2048edd16368SStephen M. Cameron 		goto free_and_out;
2049edd16368SStephen M. Cameron 
2050edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any removed devices */
2051edd16368SStephen M. Cameron 	for (i = 0; i < nremoved; i++) {
20521d33d85dSDon Brace 		if (removed[i] == NULL)
20531d33d85dSDon Brace 			continue;
2054096ccff4SKevin Barnett 		if (removed[i]->expose_device)
2055096ccff4SKevin Barnett 			hpsa_remove_device(h, removed[i]);
2056edd16368SStephen M. Cameron 		kfree(removed[i]);
2057edd16368SStephen M. Cameron 		removed[i] = NULL;
2058edd16368SStephen M. Cameron 	}
2059edd16368SStephen M. Cameron 
2060edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any added devices */
2061edd16368SStephen M. Cameron 	for (i = 0; i < nadded; i++) {
2062096ccff4SKevin Barnett 		int rc = 0;
2063096ccff4SKevin Barnett 
20641d33d85dSDon Brace 		if (added[i] == NULL)
206541ce4c35SStephen Cameron 			continue;
20662a168208SKevin Barnett 		if (!(added[i]->expose_device))
2067edd16368SStephen M. Cameron 			continue;
2068096ccff4SKevin Barnett 		rc = hpsa_add_device(h, added[i]);
2069096ccff4SKevin Barnett 		if (!rc)
2070edd16368SStephen M. Cameron 			continue;
2071096ccff4SKevin Barnett 		dev_warn(&h->pdev->dev,
2072096ccff4SKevin Barnett 			"addition failed %d, device not added.", rc);
2073edd16368SStephen M. Cameron 		/* now we have to remove it from h->dev,
2074edd16368SStephen M. Cameron 		 * since it didn't get added to scsi mid layer
2075edd16368SStephen M. Cameron 		 */
2076edd16368SStephen M. Cameron 		fixup_botched_add(h, added[i]);
2077853633e8SDon Brace 		h->drv_req_rescan = 1;
2078edd16368SStephen M. Cameron 	}
2079edd16368SStephen M. Cameron 
2080edd16368SStephen M. Cameron free_and_out:
2081edd16368SStephen M. Cameron 	kfree(added);
2082edd16368SStephen M. Cameron 	kfree(removed);
2083edd16368SStephen M. Cameron }
2084edd16368SStephen M. Cameron 
2085edd16368SStephen M. Cameron /*
20869e03aa2fSJoe Perches  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2087edd16368SStephen M. Cameron  * Assume's h->devlock is held.
2088edd16368SStephen M. Cameron  */
2089edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2090edd16368SStephen M. Cameron 	int bus, int target, int lun)
2091edd16368SStephen M. Cameron {
2092edd16368SStephen M. Cameron 	int i;
2093edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
2094edd16368SStephen M. Cameron 
2095edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
2096edd16368SStephen M. Cameron 		sd = h->dev[i];
2097edd16368SStephen M. Cameron 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
2098edd16368SStephen M. Cameron 			return sd;
2099edd16368SStephen M. Cameron 	}
2100edd16368SStephen M. Cameron 	return NULL;
2101edd16368SStephen M. Cameron }
2102edd16368SStephen M. Cameron 
2103edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev)
2104edd16368SStephen M. Cameron {
21057630b3a5SHannes Reinecke 	struct hpsa_scsi_dev_t *sd = NULL;
2106edd16368SStephen M. Cameron 	unsigned long flags;
2107edd16368SStephen M. Cameron 	struct ctlr_info *h;
2108edd16368SStephen M. Cameron 
2109edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
2110edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
2111d04e62b9SKevin Barnett 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2112d04e62b9SKevin Barnett 		struct scsi_target *starget;
2113d04e62b9SKevin Barnett 		struct sas_rphy *rphy;
2114d04e62b9SKevin Barnett 
2115d04e62b9SKevin Barnett 		starget = scsi_target(sdev);
2116d04e62b9SKevin Barnett 		rphy = target_to_rphy(starget);
2117d04e62b9SKevin Barnett 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
2118d04e62b9SKevin Barnett 		if (sd) {
2119d04e62b9SKevin Barnett 			sd->target = sdev_id(sdev);
2120d04e62b9SKevin Barnett 			sd->lun = sdev->lun;
2121d04e62b9SKevin Barnett 		}
21227630b3a5SHannes Reinecke 	}
21237630b3a5SHannes Reinecke 	if (!sd)
2124edd16368SStephen M. Cameron 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2125edd16368SStephen M. Cameron 					sdev_id(sdev), sdev->lun);
2126d04e62b9SKevin Barnett 
2127d04e62b9SKevin Barnett 	if (sd && sd->expose_device) {
212803383736SDon Brace 		atomic_set(&sd->ioaccel_cmds_out, 0);
2129d04e62b9SKevin Barnett 		sdev->hostdata = sd;
213041ce4c35SStephen Cameron 	} else
213141ce4c35SStephen Cameron 		sdev->hostdata = NULL;
2132edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2133edd16368SStephen M. Cameron 	return 0;
2134edd16368SStephen M. Cameron }
2135edd16368SStephen M. Cameron 
213641ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */
213741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev)
213841ce4c35SStephen Cameron {
213941ce4c35SStephen Cameron 	struct hpsa_scsi_dev_t *sd;
214041ce4c35SStephen Cameron 	int queue_depth;
214141ce4c35SStephen Cameron 
214241ce4c35SStephen Cameron 	sd = sdev->hostdata;
21432a168208SKevin Barnett 	sdev->no_uld_attach = !sd || !sd->expose_device;
214441ce4c35SStephen Cameron 
21455086435eSDon Brace 	if (sd) {
21469e33f0d5SDon Brace 		sd->was_removed = 0;
2147b443d3eaSDon Brace 		if (sd->external) {
21485086435eSDon Brace 			queue_depth = EXTERNAL_QD;
2149b443d3eaSDon Brace 			sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2150b443d3eaSDon Brace 			blk_queue_rq_timeout(sdev->request_queue,
2151b443d3eaSDon Brace 						HPSA_EH_PTRAID_TIMEOUT);
2152b443d3eaSDon Brace 		} else {
215341ce4c35SStephen Cameron 			queue_depth = sd->queue_depth != 0 ?
215441ce4c35SStephen Cameron 					sd->queue_depth : sdev->host->can_queue;
2155b443d3eaSDon Brace 		}
21565086435eSDon Brace 	} else
215741ce4c35SStephen Cameron 		queue_depth = sdev->host->can_queue;
215841ce4c35SStephen Cameron 
215941ce4c35SStephen Cameron 	scsi_change_queue_depth(sdev, queue_depth);
216041ce4c35SStephen Cameron 
216141ce4c35SStephen Cameron 	return 0;
216241ce4c35SStephen Cameron }
216341ce4c35SStephen Cameron 
2164edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev)
2165edd16368SStephen M. Cameron {
21669e33f0d5SDon Brace 	struct hpsa_scsi_dev_t *hdev = NULL;
21679e33f0d5SDon Brace 
21689e33f0d5SDon Brace 	hdev = sdev->hostdata;
21699e33f0d5SDon Brace 
21709e33f0d5SDon Brace 	if (hdev)
21719e33f0d5SDon Brace 		hdev->was_removed = 1;
2172edd16368SStephen M. Cameron }
2173edd16368SStephen M. Cameron 
2174d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2175d9a729f3SWebb Scales {
2176d9a729f3SWebb Scales 	int i;
2177d9a729f3SWebb Scales 
2178d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2179d9a729f3SWebb Scales 		return;
2180d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2181d9a729f3SWebb Scales 		kfree(h->ioaccel2_cmd_sg_list[i]);
2182d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] = NULL;
2183d9a729f3SWebb Scales 	}
2184d9a729f3SWebb Scales 	kfree(h->ioaccel2_cmd_sg_list);
2185d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list = NULL;
2186d9a729f3SWebb Scales }
2187d9a729f3SWebb Scales 
2188d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2189d9a729f3SWebb Scales {
2190d9a729f3SWebb Scales 	int i;
2191d9a729f3SWebb Scales 
2192d9a729f3SWebb Scales 	if (h->chainsize <= 0)
2193d9a729f3SWebb Scales 		return 0;
2194d9a729f3SWebb Scales 
2195d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list =
21966396bb22SKees Cook 		kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2197d9a729f3SWebb Scales 					GFP_KERNEL);
2198d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2199d9a729f3SWebb Scales 		return -ENOMEM;
2200d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2201d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] =
22026da2ec56SKees Cook 			kmalloc_array(h->maxsgentries,
22036da2ec56SKees Cook 				      sizeof(*h->ioaccel2_cmd_sg_list[i]),
22046da2ec56SKees Cook 				      GFP_KERNEL);
2205d9a729f3SWebb Scales 		if (!h->ioaccel2_cmd_sg_list[i])
2206d9a729f3SWebb Scales 			goto clean;
2207d9a729f3SWebb Scales 	}
2208d9a729f3SWebb Scales 	return 0;
2209d9a729f3SWebb Scales 
2210d9a729f3SWebb Scales clean:
2211d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2212d9a729f3SWebb Scales 	return -ENOMEM;
2213d9a729f3SWebb Scales }
2214d9a729f3SWebb Scales 
221533a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
221633a2ffceSStephen M. Cameron {
221733a2ffceSStephen M. Cameron 	int i;
221833a2ffceSStephen M. Cameron 
221933a2ffceSStephen M. Cameron 	if (!h->cmd_sg_list)
222033a2ffceSStephen M. Cameron 		return;
222133a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
222233a2ffceSStephen M. Cameron 		kfree(h->cmd_sg_list[i]);
222333a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = NULL;
222433a2ffceSStephen M. Cameron 	}
222533a2ffceSStephen M. Cameron 	kfree(h->cmd_sg_list);
222633a2ffceSStephen M. Cameron 	h->cmd_sg_list = NULL;
222733a2ffceSStephen M. Cameron }
222833a2ffceSStephen M. Cameron 
2229105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
223033a2ffceSStephen M. Cameron {
223133a2ffceSStephen M. Cameron 	int i;
223233a2ffceSStephen M. Cameron 
223333a2ffceSStephen M. Cameron 	if (h->chainsize <= 0)
223433a2ffceSStephen M. Cameron 		return 0;
223533a2ffceSStephen M. Cameron 
22366396bb22SKees Cook 	h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
223733a2ffceSStephen M. Cameron 				 GFP_KERNEL);
22387e8a9486SAmit Kushwaha 	if (!h->cmd_sg_list)
223933a2ffceSStephen M. Cameron 		return -ENOMEM;
22407e8a9486SAmit Kushwaha 
224133a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
22426da2ec56SKees Cook 		h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
22436da2ec56SKees Cook 						  sizeof(*h->cmd_sg_list[i]),
22446da2ec56SKees Cook 						  GFP_KERNEL);
22457e8a9486SAmit Kushwaha 		if (!h->cmd_sg_list[i])
224633a2ffceSStephen M. Cameron 			goto clean;
22477e8a9486SAmit Kushwaha 
22483d4e6af8SRobert Elliott 	}
224933a2ffceSStephen M. Cameron 	return 0;
225033a2ffceSStephen M. Cameron 
225133a2ffceSStephen M. Cameron clean:
225233a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
225333a2ffceSStephen M. Cameron 	return -ENOMEM;
225433a2ffceSStephen M. Cameron }
225533a2ffceSStephen M. Cameron 
2256d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2257d9a729f3SWebb Scales 	struct io_accel2_cmd *cp, struct CommandList *c)
2258d9a729f3SWebb Scales {
2259d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_block;
2260d9a729f3SWebb Scales 	u64 temp64;
2261d9a729f3SWebb Scales 	u32 chain_size;
2262d9a729f3SWebb Scales 
2263d9a729f3SWebb Scales 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2264a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
22658bc8f47eSChristoph Hellwig 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
22668bc8f47eSChristoph Hellwig 				DMA_TO_DEVICE);
2267d9a729f3SWebb Scales 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2268d9a729f3SWebb Scales 		/* prevent subsequent unmapping */
2269d9a729f3SWebb Scales 		cp->sg->address = 0;
2270d9a729f3SWebb Scales 		return -1;
2271d9a729f3SWebb Scales 	}
2272d9a729f3SWebb Scales 	cp->sg->address = cpu_to_le64(temp64);
2273d9a729f3SWebb Scales 	return 0;
2274d9a729f3SWebb Scales }
2275d9a729f3SWebb Scales 
2276d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2277d9a729f3SWebb Scales 	struct io_accel2_cmd *cp)
2278d9a729f3SWebb Scales {
2279d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_sg;
2280d9a729f3SWebb Scales 	u64 temp64;
2281d9a729f3SWebb Scales 	u32 chain_size;
2282d9a729f3SWebb Scales 
2283d9a729f3SWebb Scales 	chain_sg = cp->sg;
2284d9a729f3SWebb Scales 	temp64 = le64_to_cpu(chain_sg->address);
2285a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
22868bc8f47eSChristoph Hellwig 	dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2287d9a729f3SWebb Scales }
2288d9a729f3SWebb Scales 
2289e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h,
229033a2ffceSStephen M. Cameron 	struct CommandList *c)
229133a2ffceSStephen M. Cameron {
229233a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg, *chain_block;
229333a2ffceSStephen M. Cameron 	u64 temp64;
229450a0decfSStephen M. Cameron 	u32 chain_len;
229533a2ffceSStephen M. Cameron 
229633a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
229733a2ffceSStephen M. Cameron 	chain_block = h->cmd_sg_list[c->cmdindex];
229850a0decfSStephen M. Cameron 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
229950a0decfSStephen M. Cameron 	chain_len = sizeof(*chain_sg) *
23002b08b3e9SDon Brace 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
230150a0decfSStephen M. Cameron 	chain_sg->Len = cpu_to_le32(chain_len);
23028bc8f47eSChristoph Hellwig 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
23038bc8f47eSChristoph Hellwig 				DMA_TO_DEVICE);
2304e2bea6dfSStephen M. Cameron 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2305e2bea6dfSStephen M. Cameron 		/* prevent subsequent unmapping */
230650a0decfSStephen M. Cameron 		chain_sg->Addr = cpu_to_le64(0);
2307e2bea6dfSStephen M. Cameron 		return -1;
2308e2bea6dfSStephen M. Cameron 	}
230950a0decfSStephen M. Cameron 	chain_sg->Addr = cpu_to_le64(temp64);
2310e2bea6dfSStephen M. Cameron 	return 0;
231133a2ffceSStephen M. Cameron }
231233a2ffceSStephen M. Cameron 
231333a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
231433a2ffceSStephen M. Cameron 	struct CommandList *c)
231533a2ffceSStephen M. Cameron {
231633a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg;
231733a2ffceSStephen M. Cameron 
231850a0decfSStephen M. Cameron 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
231933a2ffceSStephen M. Cameron 		return;
232033a2ffceSStephen M. Cameron 
232133a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
23228bc8f47eSChristoph Hellwig 	dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
23238bc8f47eSChristoph Hellwig 			le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
232433a2ffceSStephen M. Cameron }
232533a2ffceSStephen M. Cameron 
2326a09c1441SScott Teel 
2327a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path.
2328a09c1441SScott Teel  * Return 1 for any error that should generate a RAID path retry.
2329a09c1441SScott Teel  * Return 0 for errors that don't require a RAID path retry.
2330a09c1441SScott Teel  */
2331a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2332c349775eSScott Teel 					struct CommandList *c,
2333c349775eSScott Teel 					struct scsi_cmnd *cmd,
2334ba74fdc4SDon Brace 					struct io_accel2_cmd *c2,
2335ba74fdc4SDon Brace 					struct hpsa_scsi_dev_t *dev)
2336c349775eSScott Teel {
2337c349775eSScott Teel 	int data_len;
2338a09c1441SScott Teel 	int retry = 0;
2339c40820d5SJoe Handzik 	u32 ioaccel2_resid = 0;
2340c349775eSScott Teel 
2341c349775eSScott Teel 	switch (c2->error_data.serv_response) {
2342c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2343c349775eSScott Teel 		switch (c2->error_data.status) {
2344c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2345eeebce18SDon Brace 			if (cmd)
2346eeebce18SDon Brace 				cmd->result = 0;
2347c349775eSScott Teel 			break;
2348c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2349ee6b1889SStephen M. Cameron 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2350c349775eSScott Teel 			if (c2->error_data.data_present !=
2351ee6b1889SStephen M. Cameron 					IOACCEL2_SENSE_DATA_PRESENT) {
2352ee6b1889SStephen M. Cameron 				memset(cmd->sense_buffer, 0,
2353ee6b1889SStephen M. Cameron 					SCSI_SENSE_BUFFERSIZE);
2354c349775eSScott Teel 				break;
2355ee6b1889SStephen M. Cameron 			}
2356c349775eSScott Teel 			/* copy the sense data */
2357c349775eSScott Teel 			data_len = c2->error_data.sense_data_len;
2358c349775eSScott Teel 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2359c349775eSScott Teel 				data_len = SCSI_SENSE_BUFFERSIZE;
2360c349775eSScott Teel 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2361c349775eSScott Teel 				data_len =
2362c349775eSScott Teel 					sizeof(c2->error_data.sense_data_buff);
2363c349775eSScott Teel 			memcpy(cmd->sense_buffer,
2364c349775eSScott Teel 				c2->error_data.sense_data_buff, data_len);
2365a09c1441SScott Teel 			retry = 1;
2366c349775eSScott Teel 			break;
2367c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2368a09c1441SScott Teel 			retry = 1;
2369c349775eSScott Teel 			break;
2370c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2371a09c1441SScott Teel 			retry = 1;
2372c349775eSScott Teel 			break;
2373c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
23744a8da22bSStephen Cameron 			retry = 1;
2375c349775eSScott Teel 			break;
2376c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2377a09c1441SScott Teel 			retry = 1;
2378c349775eSScott Teel 			break;
2379c349775eSScott Teel 		default:
2380a09c1441SScott Teel 			retry = 1;
2381c349775eSScott Teel 			break;
2382c349775eSScott Teel 		}
2383c349775eSScott Teel 		break;
2384c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2385c40820d5SJoe Handzik 		switch (c2->error_data.status) {
2386c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ERROR:
2387c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2388c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_OVERRUN:
2389c40820d5SJoe Handzik 			retry = 1;
2390c40820d5SJoe Handzik 			break;
2391c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_UNDERRUN:
2392c40820d5SJoe Handzik 			cmd->result = (DID_OK << 16);		/* host byte */
2393c40820d5SJoe Handzik 			cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2394c40820d5SJoe Handzik 			ioaccel2_resid = get_unaligned_le32(
2395c40820d5SJoe Handzik 						&c2->error_data.resid_cnt[0]);
2396c40820d5SJoe Handzik 			scsi_set_resid(cmd, ioaccel2_resid);
2397c40820d5SJoe Handzik 			break;
2398c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2399c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2400c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2401ba74fdc4SDon Brace 			/*
2402ba74fdc4SDon Brace 			 * Did an HBA disk disappear? We will eventually
2403ba74fdc4SDon Brace 			 * get a state change event from the controller but
2404ba74fdc4SDon Brace 			 * in the meantime, we need to tell the OS that the
2405ba74fdc4SDon Brace 			 * HBA disk is no longer there and stop I/O
2406ba74fdc4SDon Brace 			 * from going down. This allows the potential re-insert
2407ba74fdc4SDon Brace 			 * of the disk to get the same device node.
2408ba74fdc4SDon Brace 			 */
2409ba74fdc4SDon Brace 			if (dev->physical_device && dev->expose_device) {
2410ba74fdc4SDon Brace 				cmd->result = DID_NO_CONNECT << 16;
2411ba74fdc4SDon Brace 				dev->removed = 1;
2412ba74fdc4SDon Brace 				h->drv_req_rescan = 1;
2413ba74fdc4SDon Brace 				dev_warn(&h->pdev->dev,
2414ba74fdc4SDon Brace 					"%s: device is gone!\n", __func__);
2415ba74fdc4SDon Brace 			} else
2416ba74fdc4SDon Brace 				/*
2417ba74fdc4SDon Brace 				 * Retry by sending down the RAID path.
2418ba74fdc4SDon Brace 				 * We will get an event from ctlr to
2419ba74fdc4SDon Brace 				 * trigger rescan regardless.
2420ba74fdc4SDon Brace 				 */
2421c40820d5SJoe Handzik 				retry = 1;
2422c40820d5SJoe Handzik 			break;
2423c40820d5SJoe Handzik 		default:
2424c40820d5SJoe Handzik 			retry = 1;
2425c40820d5SJoe Handzik 		}
2426c349775eSScott Teel 		break;
2427c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2428c349775eSScott Teel 		break;
2429c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2430c349775eSScott Teel 		break;
2431c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2432a09c1441SScott Teel 		retry = 1;
2433c349775eSScott Teel 		break;
2434c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2435c349775eSScott Teel 		break;
2436c349775eSScott Teel 	default:
2437a09c1441SScott Teel 		retry = 1;
2438c349775eSScott Teel 		break;
2439c349775eSScott Teel 	}
2440a09c1441SScott Teel 
2441c5dfd106SDon Brace 	if (dev->in_reset)
2442c5dfd106SDon Brace 		retry = 0;
2443c5dfd106SDon Brace 
2444a09c1441SScott Teel 	return retry;	/* retry on raid path? */
2445c349775eSScott Teel }
2446c349775eSScott Teel 
2447a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2448a58e7e53SWebb Scales 		struct CommandList *c)
2449a58e7e53SWebb Scales {
2450c5dfd106SDon Brace 	struct hpsa_scsi_dev_t *dev = c->device;
2451d604f533SWebb Scales 
2452a58e7e53SWebb Scales 	/*
245308ec46f6SDon Brace 	 * Reset c->scsi_cmd here so that the reset handler will know
2454d604f533SWebb Scales 	 * this command has completed.  Then, check to see if the handler is
2455a58e7e53SWebb Scales 	 * waiting for this command, and, if so, wake it.
2456a58e7e53SWebb Scales 	 */
2457a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
2458d604f533SWebb Scales 	mb();	/* Declare command idle before checking for pending events. */
2459c5dfd106SDon Brace 	if (dev) {
2460c5dfd106SDon Brace 		atomic_dec(&dev->commands_outstanding);
2461c5dfd106SDon Brace 		if (dev->in_reset &&
2462c5dfd106SDon Brace 			atomic_read(&dev->commands_outstanding) <= 0)
2463d604f533SWebb Scales 			wake_up_all(&h->event_sync_wait_queue);
2464a58e7e53SWebb Scales 	}
2465c5dfd106SDon Brace }
2466a58e7e53SWebb Scales 
246773153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
246873153fe5SWebb Scales 				      struct CommandList *c)
246973153fe5SWebb Scales {
247073153fe5SWebb Scales 	hpsa_cmd_resolve_events(h, c);
247173153fe5SWebb Scales 	cmd_tagged_free(h, c);
247273153fe5SWebb Scales }
247373153fe5SWebb Scales 
24748a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h,
24758a0ff92cSWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd)
24768a0ff92cSWebb Scales {
247773153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2478d49c2077SDon Brace 	if (cmd && cmd->scsi_done)
24798a0ff92cSWebb Scales 		cmd->scsi_done(cmd);
24808a0ff92cSWebb Scales }
24818a0ff92cSWebb Scales 
24828a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
24838a0ff92cSWebb Scales {
24848a0ff92cSWebb Scales 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
24858a0ff92cSWebb Scales 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
24868a0ff92cSWebb Scales }
24878a0ff92cSWebb Scales 
2488c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h,
2489c349775eSScott Teel 		struct CommandList *c, struct scsi_cmnd *cmd,
2490c349775eSScott Teel 		struct hpsa_scsi_dev_t *dev)
2491c349775eSScott Teel {
2492c349775eSScott Teel 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2493c349775eSScott Teel 
2494c349775eSScott Teel 	/* check for good status */
2495c349775eSScott Teel 	if (likely(c2->error_data.serv_response == 0 &&
2496eeebce18SDon Brace 			c2->error_data.status == 0)) {
2497eeebce18SDon Brace 		cmd->result = 0;
24988a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, c, cmd);
2499eeebce18SDon Brace 	}
2500c349775eSScott Teel 
25018a0ff92cSWebb Scales 	/*
25028a0ff92cSWebb Scales 	 * Any RAID offload error results in retry which will use
2503b2582a65SDon Brace 	 * the normal I/O path so the controller can handle whatever is
2504c349775eSScott Teel 	 * wrong.
2505c349775eSScott Teel 	 */
2506f3f01730SKevin Barnett 	if (is_logical_device(dev) &&
2507c349775eSScott Teel 		c2->error_data.serv_response ==
2508c349775eSScott Teel 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2509080ef1ccSDon Brace 		if (c2->error_data.status ==
2510064d1b1dSDon Brace 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
25113e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
2512064d1b1dSDon Brace 		}
25138a0ff92cSWebb Scales 
2514c5dfd106SDon Brace 		if (dev->in_reset) {
2515c5dfd106SDon Brace 			cmd->result = DID_RESET << 16;
2516c5dfd106SDon Brace 			return hpsa_cmd_free_and_done(h, c, cmd);
2517c5dfd106SDon Brace 		}
2518c5dfd106SDon Brace 
25198a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2520080ef1ccSDon Brace 	}
2521080ef1ccSDon Brace 
2522ba74fdc4SDon Brace 	if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
25238a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2524080ef1ccSDon Brace 
25258a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, c, cmd);
2526c349775eSScott Teel }
2527c349775eSScott Teel 
25289437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */
25299437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
25309437ac43SStephen Cameron 					struct CommandList *cp)
25319437ac43SStephen Cameron {
25329437ac43SStephen Cameron 	u8 tmf_status = cp->err_info->ScsiStatus;
25339437ac43SStephen Cameron 
25349437ac43SStephen Cameron 	switch (tmf_status) {
25359437ac43SStephen Cameron 	case CISS_TMF_COMPLETE:
25369437ac43SStephen Cameron 		/*
25379437ac43SStephen Cameron 		 * CISS_TMF_COMPLETE never happens, instead,
25389437ac43SStephen Cameron 		 * ei->CommandStatus == 0 for this case.
25399437ac43SStephen Cameron 		 */
25409437ac43SStephen Cameron 	case CISS_TMF_SUCCESS:
25419437ac43SStephen Cameron 		return 0;
25429437ac43SStephen Cameron 	case CISS_TMF_INVALID_FRAME:
25439437ac43SStephen Cameron 	case CISS_TMF_NOT_SUPPORTED:
25449437ac43SStephen Cameron 	case CISS_TMF_FAILED:
25459437ac43SStephen Cameron 	case CISS_TMF_WRONG_LUN:
25469437ac43SStephen Cameron 	case CISS_TMF_OVERLAPPED_TAG:
25479437ac43SStephen Cameron 		break;
25489437ac43SStephen Cameron 	default:
25499437ac43SStephen Cameron 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
25509437ac43SStephen Cameron 				tmf_status);
25519437ac43SStephen Cameron 		break;
25529437ac43SStephen Cameron 	}
25539437ac43SStephen Cameron 	return -tmf_status;
25549437ac43SStephen Cameron }
25559437ac43SStephen Cameron 
25561fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp)
2557edd16368SStephen M. Cameron {
2558edd16368SStephen M. Cameron 	struct scsi_cmnd *cmd;
2559edd16368SStephen M. Cameron 	struct ctlr_info *h;
2560edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2561283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
2562d9a729f3SWebb Scales 	struct io_accel2_cmd *c2;
2563edd16368SStephen M. Cameron 
25649437ac43SStephen Cameron 	u8 sense_key;
25659437ac43SStephen Cameron 	u8 asc;      /* additional sense code */
25669437ac43SStephen Cameron 	u8 ascq;     /* additional sense code qualifier */
2567db111e18SStephen M. Cameron 	unsigned long sense_data_size;
2568edd16368SStephen M. Cameron 
2569edd16368SStephen M. Cameron 	ei = cp->err_info;
25707fa3030cSStephen Cameron 	cmd = cp->scsi_cmd;
2571edd16368SStephen M. Cameron 	h = cp->h;
2572d49c2077SDon Brace 
2573d49c2077SDon Brace 	if (!cmd->device) {
2574d49c2077SDon Brace 		cmd->result = DID_NO_CONNECT << 16;
2575d49c2077SDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
2576d49c2077SDon Brace 	}
2577d49c2077SDon Brace 
2578283b4a9bSStephen M. Cameron 	dev = cmd->device->hostdata;
257945e596cdSDon Brace 	if (!dev) {
258045e596cdSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
258145e596cdSDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
258245e596cdSDon Brace 	}
2583d9a729f3SWebb Scales 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2584edd16368SStephen M. Cameron 
2585edd16368SStephen M. Cameron 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2586e1f7de0cSMatt Gates 	if ((cp->cmd_type == CMD_SCSI) &&
25872b08b3e9SDon Brace 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
258833a2ffceSStephen M. Cameron 		hpsa_unmap_sg_chain_block(h, cp);
2589edd16368SStephen M. Cameron 
2590d9a729f3SWebb Scales 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2591d9a729f3SWebb Scales 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2592d9a729f3SWebb Scales 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2593d9a729f3SWebb Scales 
2594edd16368SStephen M. Cameron 	cmd->result = (DID_OK << 16); 		/* host byte */
2595edd16368SStephen M. Cameron 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2596c349775eSScott Teel 
25979e33f0d5SDon Brace 	/* SCSI command has already been cleaned up in SML */
25989e33f0d5SDon Brace 	if (dev->was_removed) {
25999e33f0d5SDon Brace 		hpsa_cmd_resolve_and_free(h, cp);
26009e33f0d5SDon Brace 		return;
26019e33f0d5SDon Brace 	}
26029e33f0d5SDon Brace 
2603d49c2077SDon Brace 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2604d49c2077SDon Brace 		if (dev->physical_device && dev->expose_device &&
2605d49c2077SDon Brace 			dev->removed) {
2606d49c2077SDon Brace 			cmd->result = DID_NO_CONNECT << 16;
2607d49c2077SDon Brace 			return hpsa_cmd_free_and_done(h, cp, cmd);
2608d49c2077SDon Brace 		}
2609d49c2077SDon Brace 		if (likely(cp->phys_disk != NULL))
261003383736SDon Brace 			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2611d49c2077SDon Brace 	}
261203383736SDon Brace 
261325163bd5SWebb Scales 	/*
261425163bd5SWebb Scales 	 * We check for lockup status here as it may be set for
261525163bd5SWebb Scales 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
261625163bd5SWebb Scales 	 * fail_all_oustanding_cmds()
261725163bd5SWebb Scales 	 */
261825163bd5SWebb Scales 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
261925163bd5SWebb Scales 		/* DID_NO_CONNECT will prevent a retry */
262025163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
26218a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
262225163bd5SWebb Scales 	}
262325163bd5SWebb Scales 
2624c349775eSScott Teel 	if (cp->cmd_type == CMD_IOACCEL2)
2625c349775eSScott Teel 		return process_ioaccel2_completion(h, cp, cmd, dev);
2626c349775eSScott Teel 
26276aa4c361SRobert Elliott 	scsi_set_resid(cmd, ei->ResidualCnt);
26288a0ff92cSWebb Scales 	if (ei->CommandStatus == 0)
26298a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
26306aa4c361SRobert Elliott 
2631e1f7de0cSMatt Gates 	/* For I/O accelerator commands, copy over some fields to the normal
2632e1f7de0cSMatt Gates 	 * CISS header used below for error handling.
2633e1f7de0cSMatt Gates 	 */
2634e1f7de0cSMatt Gates 	if (cp->cmd_type == CMD_IOACCEL1) {
2635e1f7de0cSMatt Gates 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
26362b08b3e9SDon Brace 		cp->Header.SGList = scsi_sg_count(cmd);
26372b08b3e9SDon Brace 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
26382b08b3e9SDon Brace 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
26392b08b3e9SDon Brace 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
264050a0decfSStephen M. Cameron 		cp->Header.tag = c->tag;
2641e1f7de0cSMatt Gates 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2642e1f7de0cSMatt Gates 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2643283b4a9bSStephen M. Cameron 
2644283b4a9bSStephen M. Cameron 		/* Any RAID offload error results in retry which will use
2645283b4a9bSStephen M. Cameron 		 * the normal I/O path so the controller can handle whatever's
2646283b4a9bSStephen M. Cameron 		 * wrong.
2647283b4a9bSStephen M. Cameron 		 */
2648f3f01730SKevin Barnett 		if (is_logical_device(dev)) {
2649283b4a9bSStephen M. Cameron 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2650283b4a9bSStephen M. Cameron 				dev->offload_enabled = 0;
26518a0ff92cSWebb Scales 			return hpsa_retry_cmd(h, cp);
2652283b4a9bSStephen M. Cameron 		}
2653e1f7de0cSMatt Gates 	}
2654e1f7de0cSMatt Gates 
2655edd16368SStephen M. Cameron 	/* an error has occurred */
2656edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2657edd16368SStephen M. Cameron 
2658edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
26599437ac43SStephen Cameron 		cmd->result |= ei->ScsiStatus;
26609437ac43SStephen Cameron 		/* copy the sense data */
26619437ac43SStephen Cameron 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
26629437ac43SStephen Cameron 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
26639437ac43SStephen Cameron 		else
26649437ac43SStephen Cameron 			sense_data_size = sizeof(ei->SenseInfo);
26659437ac43SStephen Cameron 		if (ei->SenseLen < sense_data_size)
26669437ac43SStephen Cameron 			sense_data_size = ei->SenseLen;
26679437ac43SStephen Cameron 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
26689437ac43SStephen Cameron 		if (ei->ScsiStatus)
26699437ac43SStephen Cameron 			decode_sense_data(ei->SenseInfo, sense_data_size,
26709437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
2671edd16368SStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
267249ea45cbSDon Brace 			switch (sense_key) {
267349ea45cbSDon Brace 			case ABORTED_COMMAND:
26742e311fbaSStephen M. Cameron 				cmd->result |= DID_SOFT_ERROR << 16;
26751d3b3609SMatt Gates 				break;
267649ea45cbSDon Brace 			case UNIT_ATTENTION:
267749ea45cbSDon Brace 				if (asc == 0x3F && ascq == 0x0E)
267849ea45cbSDon Brace 					h->drv_req_rescan = 1;
267949ea45cbSDon Brace 				break;
268049ea45cbSDon Brace 			case ILLEGAL_REQUEST:
268149ea45cbSDon Brace 				if (asc == 0x25 && ascq == 0x00) {
268249ea45cbSDon Brace 					dev->removed = 1;
268349ea45cbSDon Brace 					cmd->result = DID_NO_CONNECT << 16;
268449ea45cbSDon Brace 				}
268549ea45cbSDon Brace 				break;
26861d3b3609SMatt Gates 			}
2687edd16368SStephen M. Cameron 			break;
2688edd16368SStephen M. Cameron 		}
2689edd16368SStephen M. Cameron 		/* Problem was not a check condition
2690edd16368SStephen M. Cameron 		 * Pass it up to the upper layers...
2691edd16368SStephen M. Cameron 		 */
2692edd16368SStephen M. Cameron 		if (ei->ScsiStatus) {
2693edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2694edd16368SStephen M. Cameron 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2695edd16368SStephen M. Cameron 				"Returning result: 0x%x\n",
2696edd16368SStephen M. Cameron 				cp, ei->ScsiStatus,
2697edd16368SStephen M. Cameron 				sense_key, asc, ascq,
2698edd16368SStephen M. Cameron 				cmd->result);
2699edd16368SStephen M. Cameron 		} else {  /* scsi status is zero??? How??? */
2700edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2701edd16368SStephen M. Cameron 				"Returning no connection.\n", cp),
2702edd16368SStephen M. Cameron 
2703edd16368SStephen M. Cameron 			/* Ordinarily, this case should never happen,
2704edd16368SStephen M. Cameron 			 * but there is a bug in some released firmware
2705edd16368SStephen M. Cameron 			 * revisions that allows it to happen if, for
2706edd16368SStephen M. Cameron 			 * example, a 4100 backplane loses power and
2707edd16368SStephen M. Cameron 			 * the tape drive is in it.  We assume that
2708edd16368SStephen M. Cameron 			 * it's a fatal error of some kind because we
2709edd16368SStephen M. Cameron 			 * can't show that it wasn't. We will make it
2710edd16368SStephen M. Cameron 			 * look like selection timeout since that is
2711edd16368SStephen M. Cameron 			 * the most common reason for this to occur,
2712edd16368SStephen M. Cameron 			 * and it's severe enough.
2713edd16368SStephen M. Cameron 			 */
2714edd16368SStephen M. Cameron 
2715edd16368SStephen M. Cameron 			cmd->result = DID_NO_CONNECT << 16;
2716edd16368SStephen M. Cameron 		}
2717edd16368SStephen M. Cameron 		break;
2718edd16368SStephen M. Cameron 
2719edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2720edd16368SStephen M. Cameron 		break;
2721edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2722f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev,
2723f42e81e1SStephen Cameron 			"CDB %16phN data overrun\n", cp->Request.CDB);
2724edd16368SStephen M. Cameron 		break;
2725edd16368SStephen M. Cameron 	case CMD_INVALID: {
2726edd16368SStephen M. Cameron 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2727edd16368SStephen M. Cameron 		print_cmd(cp); */
2728edd16368SStephen M. Cameron 		/* We get CMD_INVALID if you address a non-existent device
2729edd16368SStephen M. Cameron 		 * instead of a selection timeout (no response).  You will
2730edd16368SStephen M. Cameron 		 * see this if you yank out a drive, then try to access it.
2731edd16368SStephen M. Cameron 		 * This is kind of a shame because it means that any other
2732edd16368SStephen M. Cameron 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2733edd16368SStephen M. Cameron 		 * missing target. */
2734edd16368SStephen M. Cameron 		cmd->result = DID_NO_CONNECT << 16;
2735edd16368SStephen M. Cameron 	}
2736edd16368SStephen M. Cameron 		break;
2737edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2738256d0eaaSStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2739f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2740f42e81e1SStephen Cameron 				cp->Request.CDB);
2741edd16368SStephen M. Cameron 		break;
2742edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2743edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2744f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2745f42e81e1SStephen Cameron 			cp->Request.CDB);
2746edd16368SStephen M. Cameron 		break;
2747edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2748edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2749f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2750f42e81e1SStephen Cameron 			cp->Request.CDB);
2751edd16368SStephen M. Cameron 		break;
2752edd16368SStephen M. Cameron 	case CMD_ABORTED:
275308ec46f6SDon Brace 		cmd->result = DID_ABORT << 16;
275408ec46f6SDon Brace 		break;
2755edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2756edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2757f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2758f42e81e1SStephen Cameron 			cp->Request.CDB);
2759edd16368SStephen M. Cameron 		break;
2760edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2761f6e76055SStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2762f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2763f42e81e1SStephen Cameron 			cp->Request.CDB);
2764edd16368SStephen M. Cameron 		break;
2765edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2766edd16368SStephen M. Cameron 		cmd->result = DID_TIME_OUT << 16;
2767f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2768f42e81e1SStephen Cameron 			cp->Request.CDB);
2769edd16368SStephen M. Cameron 		break;
27701d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
27711d5e2ed0SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
27721d5e2ed0SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Command unabortable\n");
27731d5e2ed0SStephen M. Cameron 		break;
27749437ac43SStephen Cameron 	case CMD_TMF_STATUS:
27759437ac43SStephen Cameron 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
27769437ac43SStephen Cameron 			cmd->result = DID_ERROR << 16;
27779437ac43SStephen Cameron 		break;
2778283b4a9bSStephen M. Cameron 	case CMD_IOACCEL_DISABLED:
2779283b4a9bSStephen M. Cameron 		/* This only handles the direct pass-through case since RAID
2780283b4a9bSStephen M. Cameron 		 * offload is handled above.  Just attempt a retry.
2781283b4a9bSStephen M. Cameron 		 */
2782283b4a9bSStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16;
2783283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev,
2784283b4a9bSStephen M. Cameron 				"cp %p had HP SSD Smart Path error\n", cp);
2785283b4a9bSStephen M. Cameron 		break;
2786edd16368SStephen M. Cameron 	default:
2787edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2788edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2789edd16368SStephen M. Cameron 				cp, ei->CommandStatus);
2790edd16368SStephen M. Cameron 	}
27918a0ff92cSWebb Scales 
27928a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, cp, cmd);
2793edd16368SStephen M. Cameron }
2794edd16368SStephen M. Cameron 
27958bc8f47eSChristoph Hellwig static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
27968bc8f47eSChristoph Hellwig 		int sg_used, enum dma_data_direction data_direction)
2797edd16368SStephen M. Cameron {
2798edd16368SStephen M. Cameron 	int i;
2799edd16368SStephen M. Cameron 
280050a0decfSStephen M. Cameron 	for (i = 0; i < sg_used; i++)
28018bc8f47eSChristoph Hellwig 		dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
280250a0decfSStephen M. Cameron 				le32_to_cpu(c->SG[i].Len),
2803edd16368SStephen M. Cameron 				data_direction);
2804edd16368SStephen M. Cameron }
2805edd16368SStephen M. Cameron 
2806a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev,
2807edd16368SStephen M. Cameron 		struct CommandList *cp,
2808edd16368SStephen M. Cameron 		unsigned char *buf,
2809edd16368SStephen M. Cameron 		size_t buflen,
28108bc8f47eSChristoph Hellwig 		enum dma_data_direction data_direction)
2811edd16368SStephen M. Cameron {
281201a02ffcSStephen M. Cameron 	u64 addr64;
2813edd16368SStephen M. Cameron 
28148bc8f47eSChristoph Hellwig 	if (buflen == 0 || data_direction == DMA_NONE) {
2815edd16368SStephen M. Cameron 		cp->Header.SGList = 0;
281650a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2817a2dac136SStephen M. Cameron 		return 0;
2818edd16368SStephen M. Cameron 	}
2819edd16368SStephen M. Cameron 
28208bc8f47eSChristoph Hellwig 	addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2821eceaae18SShuah Khan 	if (dma_mapping_error(&pdev->dev, addr64)) {
2822a2dac136SStephen M. Cameron 		/* Prevent subsequent unmap of something never mapped */
2823eceaae18SShuah Khan 		cp->Header.SGList = 0;
282450a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2825a2dac136SStephen M. Cameron 		return -1;
2826eceaae18SShuah Khan 	}
282750a0decfSStephen M. Cameron 	cp->SG[0].Addr = cpu_to_le64(addr64);
282850a0decfSStephen M. Cameron 	cp->SG[0].Len = cpu_to_le32(buflen);
282950a0decfSStephen M. Cameron 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
283050a0decfSStephen M. Cameron 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
283150a0decfSStephen M. Cameron 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2832a2dac136SStephen M. Cameron 	return 0;
2833edd16368SStephen M. Cameron }
2834edd16368SStephen M. Cameron 
283525163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1)
283625163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */
283725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
283825163bd5SWebb Scales 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2839edd16368SStephen M. Cameron {
2840edd16368SStephen M. Cameron 	DECLARE_COMPLETION_ONSTACK(wait);
2841edd16368SStephen M. Cameron 
2842edd16368SStephen M. Cameron 	c->waiting = &wait;
284325163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, reply_queue);
284425163bd5SWebb Scales 	if (timeout_msecs == NO_TIMEOUT) {
284525163bd5SWebb Scales 		/* TODO: get rid of this no-timeout thing */
284625163bd5SWebb Scales 		wait_for_completion_io(&wait);
284725163bd5SWebb Scales 		return IO_OK;
284825163bd5SWebb Scales 	}
284925163bd5SWebb Scales 	if (!wait_for_completion_io_timeout(&wait,
285025163bd5SWebb Scales 					msecs_to_jiffies(timeout_msecs))) {
285125163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Command timed out.\n");
285225163bd5SWebb Scales 		return -ETIMEDOUT;
285325163bd5SWebb Scales 	}
285425163bd5SWebb Scales 	return IO_OK;
285525163bd5SWebb Scales }
285625163bd5SWebb Scales 
285725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
285825163bd5SWebb Scales 				   int reply_queue, unsigned long timeout_msecs)
285925163bd5SWebb Scales {
286025163bd5SWebb Scales 	if (unlikely(lockup_detected(h))) {
286125163bd5SWebb Scales 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
286225163bd5SWebb Scales 		return IO_OK;
286325163bd5SWebb Scales 	}
286425163bd5SWebb Scales 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2865edd16368SStephen M. Cameron }
2866edd16368SStephen M. Cameron 
2867094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h)
2868094963daSStephen M. Cameron {
2869094963daSStephen M. Cameron 	int cpu;
2870094963daSStephen M. Cameron 	u32 rc, *lockup_detected;
2871094963daSStephen M. Cameron 
2872094963daSStephen M. Cameron 	cpu = get_cpu();
2873094963daSStephen M. Cameron 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2874094963daSStephen M. Cameron 	rc = *lockup_detected;
2875094963daSStephen M. Cameron 	put_cpu();
2876094963daSStephen M. Cameron 	return rc;
2877094963daSStephen M. Cameron }
2878094963daSStephen M. Cameron 
28799c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25
288025163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
28818bc8f47eSChristoph Hellwig 		struct CommandList *c, enum dma_data_direction data_direction,
28828bc8f47eSChristoph Hellwig 		unsigned long timeout_msecs)
2883edd16368SStephen M. Cameron {
28849c2fc160SStephen M. Cameron 	int backoff_time = 10, retry_count = 0;
288525163bd5SWebb Scales 	int rc;
2886edd16368SStephen M. Cameron 
2887edd16368SStephen M. Cameron 	do {
28887630abd0SJoe Perches 		memset(c->err_info, 0, sizeof(*c->err_info));
288925163bd5SWebb Scales 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
289025163bd5SWebb Scales 						  timeout_msecs);
289125163bd5SWebb Scales 		if (rc)
289225163bd5SWebb Scales 			break;
2893edd16368SStephen M. Cameron 		retry_count++;
28949c2fc160SStephen M. Cameron 		if (retry_count > 3) {
28959c2fc160SStephen M. Cameron 			msleep(backoff_time);
28969c2fc160SStephen M. Cameron 			if (backoff_time < 1000)
28979c2fc160SStephen M. Cameron 				backoff_time *= 2;
28989c2fc160SStephen M. Cameron 		}
2899852af20aSMatt Bondurant 	} while ((check_for_unit_attention(h, c) ||
29009c2fc160SStephen M. Cameron 			check_for_busy(h, c)) &&
29019c2fc160SStephen M. Cameron 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2902edd16368SStephen M. Cameron 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
290325163bd5SWebb Scales 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
290425163bd5SWebb Scales 		rc = -EIO;
290525163bd5SWebb Scales 	return rc;
2906edd16368SStephen M. Cameron }
2907edd16368SStephen M. Cameron 
2908d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2909d1e8beacSStephen M. Cameron 				struct CommandList *c)
2910edd16368SStephen M. Cameron {
2911d1e8beacSStephen M. Cameron 	const u8 *cdb = c->Request.CDB;
2912d1e8beacSStephen M. Cameron 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2913edd16368SStephen M. Cameron 
2914609a70dfSRasmus Villemoes 	dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2915609a70dfSRasmus Villemoes 		 txt, lun, cdb);
2916d1e8beacSStephen M. Cameron }
2917d1e8beacSStephen M. Cameron 
2918d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2919d1e8beacSStephen M. Cameron 			struct CommandList *cp)
2920d1e8beacSStephen M. Cameron {
2921d1e8beacSStephen M. Cameron 	const struct ErrorInfo *ei = cp->err_info;
2922d1e8beacSStephen M. Cameron 	struct device *d = &cp->h->pdev->dev;
29239437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
29249437ac43SStephen Cameron 	int sense_len;
2925d1e8beacSStephen M. Cameron 
2926edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2927edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
29289437ac43SStephen Cameron 		if (ei->SenseLen > sizeof(ei->SenseInfo))
29299437ac43SStephen Cameron 			sense_len = sizeof(ei->SenseInfo);
29309437ac43SStephen Cameron 		else
29319437ac43SStephen Cameron 			sense_len = ei->SenseLen;
29329437ac43SStephen Cameron 		decode_sense_data(ei->SenseInfo, sense_len,
29339437ac43SStephen Cameron 					&sense_key, &asc, &ascq);
2934d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "SCSI status", cp);
2935d1e8beacSStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
29369437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
29379437ac43SStephen Cameron 				sense_key, asc, ascq);
2938d1e8beacSStephen M. Cameron 		else
29399437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2940edd16368SStephen M. Cameron 		if (ei->ScsiStatus == 0)
2941edd16368SStephen M. Cameron 			dev_warn(d, "SCSI status is abnormally zero.  "
2942edd16368SStephen M. Cameron 			"(probably indicates selection timeout "
2943edd16368SStephen M. Cameron 			"reported incorrectly due to a known "
2944edd16368SStephen M. Cameron 			"firmware bug, circa July, 2001.)\n");
2945edd16368SStephen M. Cameron 		break;
2946edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2947edd16368SStephen M. Cameron 		break;
2948edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2949d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "overrun condition", cp);
2950edd16368SStephen M. Cameron 		break;
2951edd16368SStephen M. Cameron 	case CMD_INVALID: {
2952edd16368SStephen M. Cameron 		/* controller unfortunately reports SCSI passthru's
2953edd16368SStephen M. Cameron 		 * to non-existent targets as invalid commands.
2954edd16368SStephen M. Cameron 		 */
2955d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "invalid command", cp);
2956d1e8beacSStephen M. Cameron 		dev_warn(d, "probably means device no longer present\n");
2957edd16368SStephen M. Cameron 		}
2958edd16368SStephen M. Cameron 		break;
2959edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2960d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "protocol error", cp);
2961edd16368SStephen M. Cameron 		break;
2962edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2963d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "hardware error", cp);
2964edd16368SStephen M. Cameron 		break;
2965edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2966d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "connection lost", cp);
2967edd16368SStephen M. Cameron 		break;
2968edd16368SStephen M. Cameron 	case CMD_ABORTED:
2969d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "aborted", cp);
2970edd16368SStephen M. Cameron 		break;
2971edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2972d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "abort failed", cp);
2973edd16368SStephen M. Cameron 		break;
2974edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2975d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unsolicited abort", cp);
2976edd16368SStephen M. Cameron 		break;
2977edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2978d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "timed out", cp);
2979edd16368SStephen M. Cameron 		break;
29801d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
2981d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unabortable", cp);
29821d5e2ed0SStephen M. Cameron 		break;
298325163bd5SWebb Scales 	case CMD_CTLR_LOCKUP:
298425163bd5SWebb Scales 		hpsa_print_cmd(h, "controller lockup detected", cp);
298525163bd5SWebb Scales 		break;
2986edd16368SStephen M. Cameron 	default:
2987d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unknown status", cp);
2988d1e8beacSStephen M. Cameron 		dev_warn(d, "Unknown command status %x\n",
2989edd16368SStephen M. Cameron 				ei->CommandStatus);
2990edd16368SStephen M. Cameron 	}
2991edd16368SStephen M. Cameron }
2992edd16368SStephen M. Cameron 
29930a7c3bb8SDon Brace static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
29940a7c3bb8SDon Brace 					u8 page, u8 *buf, size_t bufsize)
29950a7c3bb8SDon Brace {
29960a7c3bb8SDon Brace 	int rc = IO_OK;
29970a7c3bb8SDon Brace 	struct CommandList *c;
29980a7c3bb8SDon Brace 	struct ErrorInfo *ei;
29990a7c3bb8SDon Brace 
30000a7c3bb8SDon Brace 	c = cmd_alloc(h);
30010a7c3bb8SDon Brace 	if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
30020a7c3bb8SDon Brace 			page, scsi3addr, TYPE_CMD)) {
30030a7c3bb8SDon Brace 		rc = -1;
30040a7c3bb8SDon Brace 		goto out;
30050a7c3bb8SDon Brace 	}
30068bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
30078bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
30080a7c3bb8SDon Brace 	if (rc)
30090a7c3bb8SDon Brace 		goto out;
30100a7c3bb8SDon Brace 	ei = c->err_info;
30110a7c3bb8SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
30120a7c3bb8SDon Brace 		hpsa_scsi_interpret_error(h, c);
30130a7c3bb8SDon Brace 		rc = -1;
30140a7c3bb8SDon Brace 	}
30150a7c3bb8SDon Brace out:
30160a7c3bb8SDon Brace 	cmd_free(h, c);
30170a7c3bb8SDon Brace 	return rc;
30180a7c3bb8SDon Brace }
30190a7c3bb8SDon Brace 
30200a7c3bb8SDon Brace static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
30210a7c3bb8SDon Brace 						u8 *scsi3addr)
30220a7c3bb8SDon Brace {
30230a7c3bb8SDon Brace 	u8 *buf;
30240a7c3bb8SDon Brace 	u64 sa = 0;
30250a7c3bb8SDon Brace 	int rc = 0;
30260a7c3bb8SDon Brace 
30270a7c3bb8SDon Brace 	buf = kzalloc(1024, GFP_KERNEL);
30280a7c3bb8SDon Brace 	if (!buf)
30290a7c3bb8SDon Brace 		return 0;
30300a7c3bb8SDon Brace 
30310a7c3bb8SDon Brace 	rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
30320a7c3bb8SDon Brace 					buf, 1024);
30330a7c3bb8SDon Brace 
30340a7c3bb8SDon Brace 	if (rc)
30350a7c3bb8SDon Brace 		goto out;
30360a7c3bb8SDon Brace 
30370a7c3bb8SDon Brace 	sa = get_unaligned_be64(buf+12);
30380a7c3bb8SDon Brace 
30390a7c3bb8SDon Brace out:
30400a7c3bb8SDon Brace 	kfree(buf);
30410a7c3bb8SDon Brace 	return sa;
30420a7c3bb8SDon Brace }
30430a7c3bb8SDon Brace 
3044edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3045b7bb24ebSStephen M. Cameron 			u16 page, unsigned char *buf,
3046edd16368SStephen M. Cameron 			unsigned char bufsize)
3047edd16368SStephen M. Cameron {
3048edd16368SStephen M. Cameron 	int rc = IO_OK;
3049edd16368SStephen M. Cameron 	struct CommandList *c;
3050edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3051edd16368SStephen M. Cameron 
305245fcb86eSStephen Cameron 	c = cmd_alloc(h);
3053edd16368SStephen M. Cameron 
3054a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3055a2dac136SStephen M. Cameron 			page, scsi3addr, TYPE_CMD)) {
3056a2dac136SStephen M. Cameron 		rc = -1;
3057a2dac136SStephen M. Cameron 		goto out;
3058a2dac136SStephen M. Cameron 	}
30598bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
30608bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
306125163bd5SWebb Scales 	if (rc)
306225163bd5SWebb Scales 		goto out;
3063edd16368SStephen M. Cameron 	ei = c->err_info;
3064edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3065d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3066edd16368SStephen M. Cameron 		rc = -1;
3067edd16368SStephen M. Cameron 	}
3068a2dac136SStephen M. Cameron out:
306945fcb86eSStephen Cameron 	cmd_free(h, c);
3070edd16368SStephen M. Cameron 	return rc;
3071edd16368SStephen M. Cameron }
3072edd16368SStephen M. Cameron 
3073c5dfd106SDon Brace static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
307425163bd5SWebb Scales 	u8 reset_type, int reply_queue)
3075edd16368SStephen M. Cameron {
3076edd16368SStephen M. Cameron 	int rc = IO_OK;
3077edd16368SStephen M. Cameron 	struct CommandList *c;
3078edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3079edd16368SStephen M. Cameron 
308045fcb86eSStephen Cameron 	c = cmd_alloc(h);
3081c5dfd106SDon Brace 	c->device = dev;
3082edd16368SStephen M. Cameron 
3083a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map. */
3084c5dfd106SDon Brace 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
30852ef28849SDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
308625163bd5SWebb Scales 	if (rc) {
308725163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
308825163bd5SWebb Scales 		goto out;
308925163bd5SWebb Scales 	}
3090edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
3091edd16368SStephen M. Cameron 
3092edd16368SStephen M. Cameron 	ei = c->err_info;
3093edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0) {
3094d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3095edd16368SStephen M. Cameron 		rc = -1;
3096edd16368SStephen M. Cameron 	}
309725163bd5SWebb Scales out:
309845fcb86eSStephen Cameron 	cmd_free(h, c);
3099edd16368SStephen M. Cameron 	return rc;
3100edd16368SStephen M. Cameron }
3101edd16368SStephen M. Cameron 
3102d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3103d604f533SWebb Scales 			       struct hpsa_scsi_dev_t *dev,
3104d604f533SWebb Scales 			       unsigned char *scsi3addr)
3105d604f533SWebb Scales {
3106d604f533SWebb Scales 	int i;
3107d604f533SWebb Scales 	bool match = false;
3108d604f533SWebb Scales 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3109d604f533SWebb Scales 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3110d604f533SWebb Scales 
3111d604f533SWebb Scales 	if (hpsa_is_cmd_idle(c))
3112d604f533SWebb Scales 		return false;
3113d604f533SWebb Scales 
3114d604f533SWebb Scales 	switch (c->cmd_type) {
3115d604f533SWebb Scales 	case CMD_SCSI:
3116d604f533SWebb Scales 	case CMD_IOCTL_PEND:
3117d604f533SWebb Scales 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3118d604f533SWebb Scales 				sizeof(c->Header.LUN.LunAddrBytes));
3119d604f533SWebb Scales 		break;
3120d604f533SWebb Scales 
3121d604f533SWebb Scales 	case CMD_IOACCEL1:
3122d604f533SWebb Scales 	case CMD_IOACCEL2:
3123d604f533SWebb Scales 		if (c->phys_disk == dev) {
3124d604f533SWebb Scales 			/* HBA mode match */
3125d604f533SWebb Scales 			match = true;
3126d604f533SWebb Scales 		} else {
3127d604f533SWebb Scales 			/* Possible RAID mode -- check each phys dev. */
3128d604f533SWebb Scales 			/* FIXME:  Do we need to take out a lock here?  If
3129d604f533SWebb Scales 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3130d604f533SWebb Scales 			 * instead. */
3131d604f533SWebb Scales 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
3132d604f533SWebb Scales 				/* FIXME: an alternate test might be
3133d604f533SWebb Scales 				 *
3134d604f533SWebb Scales 				 * match = dev->phys_disk[i]->ioaccel_handle
3135d604f533SWebb Scales 				 *              == c2->scsi_nexus;      */
3136d604f533SWebb Scales 				match = dev->phys_disk[i] == c->phys_disk;
3137d604f533SWebb Scales 			}
3138d604f533SWebb Scales 		}
3139d604f533SWebb Scales 		break;
3140d604f533SWebb Scales 
3141d604f533SWebb Scales 	case IOACCEL2_TMF:
3142d604f533SWebb Scales 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
3143d604f533SWebb Scales 			match = dev->phys_disk[i]->ioaccel_handle ==
3144d604f533SWebb Scales 					le32_to_cpu(ac->it_nexus);
3145d604f533SWebb Scales 		}
3146d604f533SWebb Scales 		break;
3147d604f533SWebb Scales 
3148d604f533SWebb Scales 	case 0:		/* The command is in the middle of being initialized. */
3149d604f533SWebb Scales 		match = false;
3150d604f533SWebb Scales 		break;
3151d604f533SWebb Scales 
3152d604f533SWebb Scales 	default:
3153d604f533SWebb Scales 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3154d604f533SWebb Scales 			c->cmd_type);
3155d604f533SWebb Scales 		BUG();
3156d604f533SWebb Scales 	}
3157d604f533SWebb Scales 
3158d604f533SWebb Scales 	return match;
3159d604f533SWebb Scales }
3160d604f533SWebb Scales 
3161d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3162c5dfd106SDon Brace 	u8 reset_type, int reply_queue)
3163d604f533SWebb Scales {
3164d604f533SWebb Scales 	int rc = 0;
3165d604f533SWebb Scales 
3166d604f533SWebb Scales 	/* We can really only handle one reset at a time */
3167d604f533SWebb Scales 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3168d604f533SWebb Scales 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3169d604f533SWebb Scales 		return -EINTR;
3170d604f533SWebb Scales 	}
3171d604f533SWebb Scales 
3172c5dfd106SDon Brace 	rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3173c5dfd106SDon Brace 	if (!rc) {
3174c5dfd106SDon Brace 		/* incremented by sending the reset request */
3175c5dfd106SDon Brace 		atomic_dec(&dev->commands_outstanding);
3176d604f533SWebb Scales 		wait_event(h->event_sync_wait_queue,
3177c5dfd106SDon Brace 			atomic_read(&dev->commands_outstanding) <= 0 ||
3178d604f533SWebb Scales 			lockup_detected(h));
3179c5dfd106SDon Brace 	}
3180d604f533SWebb Scales 
3181d604f533SWebb Scales 	if (unlikely(lockup_detected(h))) {
3182d604f533SWebb Scales 		dev_warn(&h->pdev->dev,
3183d604f533SWebb Scales 			 "Controller lockup detected during reset wait\n");
3184d604f533SWebb Scales 		rc = -ENODEV;
3185d604f533SWebb Scales 	}
3186d604f533SWebb Scales 
3187c5dfd106SDon Brace 	if (!rc)
3188c5dfd106SDon Brace 		rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3189d604f533SWebb Scales 
3190d604f533SWebb Scales 	mutex_unlock(&h->reset_mutex);
3191d604f533SWebb Scales 	return rc;
3192d604f533SWebb Scales }
3193d604f533SWebb Scales 
3194edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h,
3195edd16368SStephen M. Cameron 	unsigned char *scsi3addr, unsigned char *raid_level)
3196edd16368SStephen M. Cameron {
3197edd16368SStephen M. Cameron 	int rc;
3198edd16368SStephen M. Cameron 	unsigned char *buf;
3199edd16368SStephen M. Cameron 
3200edd16368SStephen M. Cameron 	*raid_level = RAID_UNKNOWN;
3201edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3202edd16368SStephen M. Cameron 	if (!buf)
3203edd16368SStephen M. Cameron 		return;
32048383278dSScott Teel 
32058383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr,
32068383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY))
32078383278dSScott Teel 		goto exit;
32088383278dSScott Teel 
32098383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
32108383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
32118383278dSScott Teel 
3212edd16368SStephen M. Cameron 	if (rc == 0)
3213edd16368SStephen M. Cameron 		*raid_level = buf[8];
3214edd16368SStephen M. Cameron 	if (*raid_level > RAID_UNKNOWN)
3215edd16368SStephen M. Cameron 		*raid_level = RAID_UNKNOWN;
32168383278dSScott Teel exit:
3217edd16368SStephen M. Cameron 	kfree(buf);
3218edd16368SStephen M. Cameron 	return;
3219edd16368SStephen M. Cameron }
3220edd16368SStephen M. Cameron 
3221283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG
3222283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG
3223283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3224283b4a9bSStephen M. Cameron 				struct raid_map_data *map_buff)
3225283b4a9bSStephen M. Cameron {
3226283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map_buff->data[0];
3227283b4a9bSStephen M. Cameron 	int map, row, col;
3228283b4a9bSStephen M. Cameron 	u16 map_cnt, row_cnt, disks_per_row;
3229283b4a9bSStephen M. Cameron 
3230283b4a9bSStephen M. Cameron 	if (rc != 0)
3231283b4a9bSStephen M. Cameron 		return;
3232283b4a9bSStephen M. Cameron 
32332ba8bfc8SStephen M. Cameron 	/* Show details only if debugging has been activated. */
32342ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug < 2)
32352ba8bfc8SStephen M. Cameron 		return;
32362ba8bfc8SStephen M. Cameron 
3237283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3238283b4a9bSStephen M. Cameron 				le32_to_cpu(map_buff->structure_size));
3239283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3240283b4a9bSStephen M. Cameron 			le32_to_cpu(map_buff->volume_blk_size));
3241283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3242283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->volume_blk_cnt));
3243283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3244283b4a9bSStephen M. Cameron 			map_buff->phys_blk_shift);
3245283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3246283b4a9bSStephen M. Cameron 			map_buff->parity_rotation_shift);
3247283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3248283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->strip_size));
3249283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3250283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_starting_blk));
3251283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3252283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_blk_cnt));
3253283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3254283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->data_disks_per_row));
3255283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3256283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->metadata_disks_per_row));
3257283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3258283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->row_cnt));
3259283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3260283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->layout_map_count));
32612b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3262dd0e19f3SScott Teel 			le16_to_cpu(map_buff->flags));
3263ba82d91bSColin Ian King 	dev_info(&h->pdev->dev, "encryption = %s\n",
32642b08b3e9SDon Brace 			le16_to_cpu(map_buff->flags) &
32652b08b3e9SDon Brace 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3266dd0e19f3SScott Teel 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3267dd0e19f3SScott Teel 			le16_to_cpu(map_buff->dekindex));
3268283b4a9bSStephen M. Cameron 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3269283b4a9bSStephen M. Cameron 	for (map = 0; map < map_cnt; map++) {
3270283b4a9bSStephen M. Cameron 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3271283b4a9bSStephen M. Cameron 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3272283b4a9bSStephen M. Cameron 		for (row = 0; row < row_cnt; row++) {
3273283b4a9bSStephen M. Cameron 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3274283b4a9bSStephen M. Cameron 			disks_per_row =
3275283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->data_disks_per_row);
3276283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3277283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3278283b4a9bSStephen M. Cameron 					"    D%02u: h=0x%04x xor=%u,%u\n",
3279283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3280283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3281283b4a9bSStephen M. Cameron 			disks_per_row =
3282283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->metadata_disks_per_row);
3283283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3284283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3285283b4a9bSStephen M. Cameron 					"    M%02u: h=0x%04x xor=%u,%u\n",
3286283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3287283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3288283b4a9bSStephen M. Cameron 		}
3289283b4a9bSStephen M. Cameron 	}
3290283b4a9bSStephen M. Cameron }
3291283b4a9bSStephen M. Cameron #else
3292283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3293283b4a9bSStephen M. Cameron 			__attribute__((unused)) int rc,
3294283b4a9bSStephen M. Cameron 			__attribute__((unused)) struct raid_map_data *map_buff)
3295283b4a9bSStephen M. Cameron {
3296283b4a9bSStephen M. Cameron }
3297283b4a9bSStephen M. Cameron #endif
3298283b4a9bSStephen M. Cameron 
3299283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h,
3300283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3301283b4a9bSStephen M. Cameron {
3302283b4a9bSStephen M. Cameron 	int rc = 0;
3303283b4a9bSStephen M. Cameron 	struct CommandList *c;
3304283b4a9bSStephen M. Cameron 	struct ErrorInfo *ei;
3305283b4a9bSStephen M. Cameron 
330645fcb86eSStephen Cameron 	c = cmd_alloc(h);
3307bf43caf3SRobert Elliott 
3308283b4a9bSStephen M. Cameron 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3309283b4a9bSStephen M. Cameron 			sizeof(this_device->raid_map), 0,
3310283b4a9bSStephen M. Cameron 			scsi3addr, TYPE_CMD)) {
33112dd02d74SRobert Elliott 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
33122dd02d74SRobert Elliott 		cmd_free(h, c);
33132dd02d74SRobert Elliott 		return -1;
3314283b4a9bSStephen M. Cameron 	}
33158bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33168bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
331725163bd5SWebb Scales 	if (rc)
331825163bd5SWebb Scales 		goto out;
3319283b4a9bSStephen M. Cameron 	ei = c->err_info;
3320283b4a9bSStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3321d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
332225163bd5SWebb Scales 		rc = -1;
332325163bd5SWebb Scales 		goto out;
3324283b4a9bSStephen M. Cameron 	}
332545fcb86eSStephen Cameron 	cmd_free(h, c);
3326283b4a9bSStephen M. Cameron 
3327283b4a9bSStephen M. Cameron 	/* @todo in the future, dynamically allocate RAID map memory */
3328283b4a9bSStephen M. Cameron 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3329283b4a9bSStephen M. Cameron 				sizeof(this_device->raid_map)) {
3330283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3331283b4a9bSStephen M. Cameron 		rc = -1;
3332283b4a9bSStephen M. Cameron 	}
3333283b4a9bSStephen M. Cameron 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3334283b4a9bSStephen M. Cameron 	return rc;
333525163bd5SWebb Scales out:
333625163bd5SWebb Scales 	cmd_free(h, c);
333725163bd5SWebb Scales 	return rc;
3338283b4a9bSStephen M. Cameron }
3339283b4a9bSStephen M. Cameron 
3340d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3341d04e62b9SKevin Barnett 		unsigned char scsi3addr[], u16 bmic_device_index,
3342d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3343d04e62b9SKevin Barnett {
3344d04e62b9SKevin Barnett 	int rc = IO_OK;
3345d04e62b9SKevin Barnett 	struct CommandList *c;
3346d04e62b9SKevin Barnett 	struct ErrorInfo *ei;
3347d04e62b9SKevin Barnett 
3348d04e62b9SKevin Barnett 	c = cmd_alloc(h);
3349d04e62b9SKevin Barnett 
3350d04e62b9SKevin Barnett 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3351d04e62b9SKevin Barnett 		0, RAID_CTLR_LUNID, TYPE_CMD);
3352d04e62b9SKevin Barnett 	if (rc)
3353d04e62b9SKevin Barnett 		goto out;
3354d04e62b9SKevin Barnett 
3355d04e62b9SKevin Barnett 	c->Request.CDB[2] = bmic_device_index & 0xff;
3356d04e62b9SKevin Barnett 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3357d04e62b9SKevin Barnett 
33588bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33598bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
3360d04e62b9SKevin Barnett 	if (rc)
3361d04e62b9SKevin Barnett 		goto out;
3362d04e62b9SKevin Barnett 	ei = c->err_info;
3363d04e62b9SKevin Barnett 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3364d04e62b9SKevin Barnett 		hpsa_scsi_interpret_error(h, c);
3365d04e62b9SKevin Barnett 		rc = -1;
3366d04e62b9SKevin Barnett 	}
3367d04e62b9SKevin Barnett out:
3368d04e62b9SKevin Barnett 	cmd_free(h, c);
3369d04e62b9SKevin Barnett 	return rc;
3370d04e62b9SKevin Barnett }
3371d04e62b9SKevin Barnett 
337266749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h,
337366749d0dSScott Teel 	struct bmic_identify_controller *buf, size_t bufsize)
337466749d0dSScott Teel {
337566749d0dSScott Teel 	int rc = IO_OK;
337666749d0dSScott Teel 	struct CommandList *c;
337766749d0dSScott Teel 	struct ErrorInfo *ei;
337866749d0dSScott Teel 
337966749d0dSScott Teel 	c = cmd_alloc(h);
338066749d0dSScott Teel 
338166749d0dSScott Teel 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
338266749d0dSScott Teel 		0, RAID_CTLR_LUNID, TYPE_CMD);
338366749d0dSScott Teel 	if (rc)
338466749d0dSScott Teel 		goto out;
338566749d0dSScott Teel 
33868bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33878bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
338866749d0dSScott Teel 	if (rc)
338966749d0dSScott Teel 		goto out;
339066749d0dSScott Teel 	ei = c->err_info;
339166749d0dSScott Teel 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
339266749d0dSScott Teel 		hpsa_scsi_interpret_error(h, c);
339366749d0dSScott Teel 		rc = -1;
339466749d0dSScott Teel 	}
339566749d0dSScott Teel out:
339666749d0dSScott Teel 	cmd_free(h, c);
339766749d0dSScott Teel 	return rc;
339866749d0dSScott Teel }
339966749d0dSScott Teel 
340003383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
340103383736SDon Brace 		unsigned char scsi3addr[], u16 bmic_device_index,
340203383736SDon Brace 		struct bmic_identify_physical_device *buf, size_t bufsize)
340303383736SDon Brace {
340403383736SDon Brace 	int rc = IO_OK;
340503383736SDon Brace 	struct CommandList *c;
340603383736SDon Brace 	struct ErrorInfo *ei;
340703383736SDon Brace 
340803383736SDon Brace 	c = cmd_alloc(h);
340903383736SDon Brace 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
341003383736SDon Brace 		0, RAID_CTLR_LUNID, TYPE_CMD);
341103383736SDon Brace 	if (rc)
341203383736SDon Brace 		goto out;
341303383736SDon Brace 
341403383736SDon Brace 	c->Request.CDB[2] = bmic_device_index & 0xff;
341503383736SDon Brace 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
341603383736SDon Brace 
34178bc8f47eSChristoph Hellwig 	hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
34183026ff9bSDon Brace 						NO_TIMEOUT);
341903383736SDon Brace 	ei = c->err_info;
342003383736SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
342103383736SDon Brace 		hpsa_scsi_interpret_error(h, c);
342203383736SDon Brace 		rc = -1;
342303383736SDon Brace 	}
342403383736SDon Brace out:
342503383736SDon Brace 	cmd_free(h, c);
3426d04e62b9SKevin Barnett 
342703383736SDon Brace 	return rc;
342803383736SDon Brace }
342903383736SDon Brace 
3430cca8f13bSDon Brace /*
3431cca8f13bSDon Brace  * get enclosure information
3432cca8f13bSDon Brace  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3433cca8f13bSDon Brace  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3434cca8f13bSDon Brace  * Uses id_physical_device to determine the box_index.
3435cca8f13bSDon Brace  */
3436cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h,
3437cca8f13bSDon Brace 			unsigned char *scsi3addr,
3438cca8f13bSDon Brace 			struct ReportExtendedLUNdata *rlep, int rle_index,
3439cca8f13bSDon Brace 			struct hpsa_scsi_dev_t *encl_dev)
3440cca8f13bSDon Brace {
3441cca8f13bSDon Brace 	int rc = -1;
3442cca8f13bSDon Brace 	struct CommandList *c = NULL;
3443cca8f13bSDon Brace 	struct ErrorInfo *ei = NULL;
3444cca8f13bSDon Brace 	struct bmic_sense_storage_box_params *bssbp = NULL;
3445cca8f13bSDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
3446cca8f13bSDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3447cca8f13bSDon Brace 	u16 bmic_device_index = 0;
3448cca8f13bSDon Brace 
344901d0e789SDon Brace 	encl_dev->eli =
34500a7c3bb8SDon Brace 		hpsa_get_enclosure_logical_identifier(h, scsi3addr);
34510a7c3bb8SDon Brace 
345201d0e789SDon Brace 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
345301d0e789SDon Brace 
34545ac517b8SDon Brace 	if (encl_dev->target == -1 || encl_dev->lun == -1) {
34555ac517b8SDon Brace 		rc = IO_OK;
34565ac517b8SDon Brace 		goto out;
34575ac517b8SDon Brace 	}
34585ac517b8SDon Brace 
345917a9e54aSDon Brace 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
346017a9e54aSDon Brace 		rc = IO_OK;
3461cca8f13bSDon Brace 		goto out;
346217a9e54aSDon Brace 	}
3463cca8f13bSDon Brace 
3464cca8f13bSDon Brace 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3465cca8f13bSDon Brace 	if (!bssbp)
3466cca8f13bSDon Brace 		goto out;
3467cca8f13bSDon Brace 
3468cca8f13bSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3469cca8f13bSDon Brace 	if (!id_phys)
3470cca8f13bSDon Brace 		goto out;
3471cca8f13bSDon Brace 
3472cca8f13bSDon Brace 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3473cca8f13bSDon Brace 						id_phys, sizeof(*id_phys));
3474cca8f13bSDon Brace 	if (rc) {
3475cca8f13bSDon Brace 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3476cca8f13bSDon Brace 			__func__, encl_dev->external, bmic_device_index);
3477cca8f13bSDon Brace 		goto out;
3478cca8f13bSDon Brace 	}
3479cca8f13bSDon Brace 
3480cca8f13bSDon Brace 	c = cmd_alloc(h);
3481cca8f13bSDon Brace 
3482cca8f13bSDon Brace 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3483cca8f13bSDon Brace 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3484cca8f13bSDon Brace 
3485cca8f13bSDon Brace 	if (rc)
3486cca8f13bSDon Brace 		goto out;
3487cca8f13bSDon Brace 
3488cca8f13bSDon Brace 	if (id_phys->phys_connector[1] == 'E')
3489cca8f13bSDon Brace 		c->Request.CDB[5] = id_phys->box_index;
3490cca8f13bSDon Brace 	else
3491cca8f13bSDon Brace 		c->Request.CDB[5] = 0;
3492cca8f13bSDon Brace 
34938bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
34943026ff9bSDon Brace 						NO_TIMEOUT);
3495cca8f13bSDon Brace 	if (rc)
3496cca8f13bSDon Brace 		goto out;
3497cca8f13bSDon Brace 
3498cca8f13bSDon Brace 	ei = c->err_info;
3499cca8f13bSDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3500cca8f13bSDon Brace 		rc = -1;
3501cca8f13bSDon Brace 		goto out;
3502cca8f13bSDon Brace 	}
3503cca8f13bSDon Brace 
3504cca8f13bSDon Brace 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3505cca8f13bSDon Brace 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3506cca8f13bSDon Brace 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3507cca8f13bSDon Brace 
3508cca8f13bSDon Brace 	rc = IO_OK;
3509cca8f13bSDon Brace out:
3510cca8f13bSDon Brace 	kfree(bssbp);
3511cca8f13bSDon Brace 	kfree(id_phys);
3512cca8f13bSDon Brace 
3513cca8f13bSDon Brace 	if (c)
3514cca8f13bSDon Brace 		cmd_free(h, c);
3515cca8f13bSDon Brace 
3516cca8f13bSDon Brace 	if (rc != IO_OK)
3517cca8f13bSDon Brace 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3518b4e9ce1cSJulia Lawall 			"Error, could not get enclosure information");
3519cca8f13bSDon Brace }
3520cca8f13bSDon Brace 
3521d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3522d04e62b9SKevin Barnett 						unsigned char *scsi3addr)
3523d04e62b9SKevin Barnett {
3524d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *physdev;
3525d04e62b9SKevin Barnett 	u32 nphysicals;
3526d04e62b9SKevin Barnett 	u64 sa = 0;
3527d04e62b9SKevin Barnett 	int i;
3528d04e62b9SKevin Barnett 
3529d04e62b9SKevin Barnett 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3530d04e62b9SKevin Barnett 	if (!physdev)
3531d04e62b9SKevin Barnett 		return 0;
3532d04e62b9SKevin Barnett 
3533d04e62b9SKevin Barnett 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3534d04e62b9SKevin Barnett 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3535d04e62b9SKevin Barnett 		kfree(physdev);
3536d04e62b9SKevin Barnett 		return 0;
3537d04e62b9SKevin Barnett 	}
3538d04e62b9SKevin Barnett 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3539d04e62b9SKevin Barnett 
3540d04e62b9SKevin Barnett 	for (i = 0; i < nphysicals; i++)
3541d04e62b9SKevin Barnett 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3542d04e62b9SKevin Barnett 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3543d04e62b9SKevin Barnett 			break;
3544d04e62b9SKevin Barnett 		}
3545d04e62b9SKevin Barnett 
3546d04e62b9SKevin Barnett 	kfree(physdev);
3547d04e62b9SKevin Barnett 
3548d04e62b9SKevin Barnett 	return sa;
3549d04e62b9SKevin Barnett }
3550d04e62b9SKevin Barnett 
3551d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3552d04e62b9SKevin Barnett 					struct hpsa_scsi_dev_t *dev)
3553d04e62b9SKevin Barnett {
3554d04e62b9SKevin Barnett 	int rc;
3555d04e62b9SKevin Barnett 	u64 sa = 0;
3556d04e62b9SKevin Barnett 
3557d04e62b9SKevin Barnett 	if (is_hba_lunid(scsi3addr)) {
3558d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *ssi;
3559d04e62b9SKevin Barnett 
3560d04e62b9SKevin Barnett 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
35617e8a9486SAmit Kushwaha 		if (!ssi)
3562d04e62b9SKevin Barnett 			return;
3563d04e62b9SKevin Barnett 
3564d04e62b9SKevin Barnett 		rc = hpsa_bmic_sense_subsystem_information(h,
3565d04e62b9SKevin Barnett 					scsi3addr, 0, ssi, sizeof(*ssi));
3566d04e62b9SKevin Barnett 		if (rc == 0) {
3567d04e62b9SKevin Barnett 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3568d04e62b9SKevin Barnett 			h->sas_address = sa;
3569d04e62b9SKevin Barnett 		}
3570d04e62b9SKevin Barnett 
3571d04e62b9SKevin Barnett 		kfree(ssi);
3572d04e62b9SKevin Barnett 	} else
3573d04e62b9SKevin Barnett 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3574d04e62b9SKevin Barnett 
3575d04e62b9SKevin Barnett 	dev->sas_address = sa;
3576d04e62b9SKevin Barnett }
3577d04e62b9SKevin Barnett 
35784e188184SBader Ali Saleh static void hpsa_ext_ctrl_present(struct ctlr_info *h,
35794e188184SBader Ali Saleh 	struct ReportExtendedLUNdata *physdev)
35804e188184SBader Ali Saleh {
35814e188184SBader Ali Saleh 	u32 nphysicals;
35824e188184SBader Ali Saleh 	int i;
35834e188184SBader Ali Saleh 
35844e188184SBader Ali Saleh 	if (h->discovery_polling)
35854e188184SBader Ali Saleh 		return;
35864e188184SBader Ali Saleh 
35874e188184SBader Ali Saleh 	nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
35884e188184SBader Ali Saleh 
35894e188184SBader Ali Saleh 	for (i = 0; i < nphysicals; i++) {
35904e188184SBader Ali Saleh 		if (physdev->LUN[i].device_type ==
35914e188184SBader Ali Saleh 			BMIC_DEVICE_TYPE_CONTROLLER
35924e188184SBader Ali Saleh 			&& !is_hba_lunid(physdev->LUN[i].lunid)) {
35934e188184SBader Ali Saleh 			dev_info(&h->pdev->dev,
35944e188184SBader Ali Saleh 				"External controller present, activate discovery polling and disable rld caching\n");
35954e188184SBader Ali Saleh 			hpsa_disable_rld_caching(h);
35964e188184SBader Ali Saleh 			h->discovery_polling = 1;
35974e188184SBader Ali Saleh 			break;
35984e188184SBader Ali Saleh 		}
35994e188184SBader Ali Saleh 	}
36004e188184SBader Ali Saleh }
36014e188184SBader Ali Saleh 
3602d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */
36038383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
36041b70150aSStephen M. Cameron 	unsigned char scsi3addr[], u8 page)
36051b70150aSStephen M. Cameron {
36061b70150aSStephen M. Cameron 	int rc;
36071b70150aSStephen M. Cameron 	int i;
36081b70150aSStephen M. Cameron 	int pages;
36091b70150aSStephen M. Cameron 	unsigned char *buf, bufsize;
36101b70150aSStephen M. Cameron 
36111b70150aSStephen M. Cameron 	buf = kzalloc(256, GFP_KERNEL);
36121b70150aSStephen M. Cameron 	if (!buf)
36138383278dSScott Teel 		return false;
36141b70150aSStephen M. Cameron 
36151b70150aSStephen M. Cameron 	/* Get the size of the page list first */
36161b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
36171b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
36181b70150aSStephen M. Cameron 				buf, HPSA_VPD_HEADER_SZ);
36191b70150aSStephen M. Cameron 	if (rc != 0)
36201b70150aSStephen M. Cameron 		goto exit_unsupported;
36211b70150aSStephen M. Cameron 	pages = buf[3];
36221b70150aSStephen M. Cameron 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
36231b70150aSStephen M. Cameron 		bufsize = pages + HPSA_VPD_HEADER_SZ;
36241b70150aSStephen M. Cameron 	else
36251b70150aSStephen M. Cameron 		bufsize = 255;
36261b70150aSStephen M. Cameron 
36271b70150aSStephen M. Cameron 	/* Get the whole VPD page list */
36281b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
36291b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
36301b70150aSStephen M. Cameron 				buf, bufsize);
36311b70150aSStephen M. Cameron 	if (rc != 0)
36321b70150aSStephen M. Cameron 		goto exit_unsupported;
36331b70150aSStephen M. Cameron 
36341b70150aSStephen M. Cameron 	pages = buf[3];
36351b70150aSStephen M. Cameron 	for (i = 1; i <= pages; i++)
36361b70150aSStephen M. Cameron 		if (buf[3 + i] == page)
36371b70150aSStephen M. Cameron 			goto exit_supported;
36381b70150aSStephen M. Cameron exit_unsupported:
36391b70150aSStephen M. Cameron 	kfree(buf);
36408383278dSScott Teel 	return false;
36411b70150aSStephen M. Cameron exit_supported:
36421b70150aSStephen M. Cameron 	kfree(buf);
36438383278dSScott Teel 	return true;
36441b70150aSStephen M. Cameron }
36451b70150aSStephen M. Cameron 
3646b2582a65SDon Brace /*
3647b2582a65SDon Brace  * Called during a scan operation.
3648b2582a65SDon Brace  * Sets ioaccel status on the new device list, not the existing device list
3649b2582a65SDon Brace  *
3650b2582a65SDon Brace  * The device list used during I/O will be updated later in
3651b2582a65SDon Brace  * adjust_hpsa_scsi_table.
3652b2582a65SDon Brace  */
3653283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3654283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3655283b4a9bSStephen M. Cameron {
3656283b4a9bSStephen M. Cameron 	int rc;
3657283b4a9bSStephen M. Cameron 	unsigned char *buf;
3658283b4a9bSStephen M. Cameron 	u8 ioaccel_status;
3659283b4a9bSStephen M. Cameron 
3660283b4a9bSStephen M. Cameron 	this_device->offload_config = 0;
3661283b4a9bSStephen M. Cameron 	this_device->offload_enabled = 0;
366241ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = 0;
3663283b4a9bSStephen M. Cameron 
3664283b4a9bSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3665283b4a9bSStephen M. Cameron 	if (!buf)
3666283b4a9bSStephen M. Cameron 		return;
36671b70150aSStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
36681b70150aSStephen M. Cameron 		goto out;
3669283b4a9bSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3670b7bb24ebSStephen M. Cameron 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3671283b4a9bSStephen M. Cameron 	if (rc != 0)
3672283b4a9bSStephen M. Cameron 		goto out;
3673283b4a9bSStephen M. Cameron 
3674283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4
3675283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01
3676283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02
3677283b4a9bSStephen M. Cameron 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3678283b4a9bSStephen M. Cameron 	this_device->offload_config =
3679283b4a9bSStephen M. Cameron 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3680283b4a9bSStephen M. Cameron 	if (this_device->offload_config) {
36813e16e83aSDon Brace 		bool offload_enabled =
3682283b4a9bSStephen M. Cameron 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
36833e16e83aSDon Brace 		/*
36843e16e83aSDon Brace 		 * Check to see if offload can be enabled.
36853e16e83aSDon Brace 		 */
36863e16e83aSDon Brace 		if (offload_enabled) {
36873e16e83aSDon Brace 			rc = hpsa_get_raid_map(h, scsi3addr, this_device);
36883e16e83aSDon Brace 			if (rc) /* could not load raid_map */
36893e16e83aSDon Brace 				goto out;
36903e16e83aSDon Brace 			this_device->offload_to_be_enabled = 1;
36913e16e83aSDon Brace 		}
3692283b4a9bSStephen M. Cameron 	}
3693b2582a65SDon Brace 
3694283b4a9bSStephen M. Cameron out:
3695283b4a9bSStephen M. Cameron 	kfree(buf);
3696283b4a9bSStephen M. Cameron 	return;
3697283b4a9bSStephen M. Cameron }
3698283b4a9bSStephen M. Cameron 
3699edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */
3700edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
370175d23d89SDon Brace 	unsigned char *device_id, int index, int buflen)
3702edd16368SStephen M. Cameron {
3703edd16368SStephen M. Cameron 	int rc;
3704edd16368SStephen M. Cameron 	unsigned char *buf;
3705edd16368SStephen M. Cameron 
37068383278dSScott Teel 	/* Does controller have VPD for device id? */
37078383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
37088383278dSScott Teel 		return 1; /* not supported */
37098383278dSScott Teel 
3710edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3711edd16368SStephen M. Cameron 	if (!buf)
3712a84d794dSStephen M. Cameron 		return -ENOMEM;
37138383278dSScott Teel 
37148383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
37158383278dSScott Teel 					HPSA_VPD_LV_DEVICE_ID, buf, 64);
37168383278dSScott Teel 	if (rc == 0) {
37178383278dSScott Teel 		if (buflen > 16)
37188383278dSScott Teel 			buflen = 16;
37198383278dSScott Teel 		memcpy(device_id, &buf[8], buflen);
37208383278dSScott Teel 	}
372175d23d89SDon Brace 
3722edd16368SStephen M. Cameron 	kfree(buf);
372375d23d89SDon Brace 
37248383278dSScott Teel 	return rc; /*0 - got id,  otherwise, didn't */
3725edd16368SStephen M. Cameron }
3726edd16368SStephen M. Cameron 
3727edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
372803383736SDon Brace 		void *buf, int bufsize,
3729edd16368SStephen M. Cameron 		int extended_response)
3730edd16368SStephen M. Cameron {
3731edd16368SStephen M. Cameron 	int rc = IO_OK;
3732edd16368SStephen M. Cameron 	struct CommandList *c;
3733edd16368SStephen M. Cameron 	unsigned char scsi3addr[8];
3734edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3735edd16368SStephen M. Cameron 
373645fcb86eSStephen Cameron 	c = cmd_alloc(h);
3737bf43caf3SRobert Elliott 
3738e89c0ae7SStephen M. Cameron 	/* address the controller */
3739e89c0ae7SStephen M. Cameron 	memset(scsi3addr, 0, sizeof(scsi3addr));
3740a2dac136SStephen M. Cameron 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3741a2dac136SStephen M. Cameron 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
374245f769b2SHannes Reinecke 		rc = -EAGAIN;
3743a2dac136SStephen M. Cameron 		goto out;
3744a2dac136SStephen M. Cameron 	}
3745edd16368SStephen M. Cameron 	if (extended_response)
3746edd16368SStephen M. Cameron 		c->Request.CDB[1] = extended_response;
37478bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
37488bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
374925163bd5SWebb Scales 	if (rc)
375025163bd5SWebb Scales 		goto out;
3751edd16368SStephen M. Cameron 	ei = c->err_info;
3752edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 &&
3753edd16368SStephen M. Cameron 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3754d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
375545f769b2SHannes Reinecke 		rc = -EIO;
3756283b4a9bSStephen M. Cameron 	} else {
375703383736SDon Brace 		struct ReportLUNdata *rld = buf;
375803383736SDon Brace 
375903383736SDon Brace 		if (rld->extended_response_flag != extended_response) {
376045f769b2SHannes Reinecke 			if (!h->legacy_board) {
3761283b4a9bSStephen M. Cameron 				dev_err(&h->pdev->dev,
3762283b4a9bSStephen M. Cameron 					"report luns requested format %u, got %u\n",
3763283b4a9bSStephen M. Cameron 					extended_response,
376403383736SDon Brace 					rld->extended_response_flag);
376545f769b2SHannes Reinecke 				rc = -EINVAL;
376645f769b2SHannes Reinecke 			} else
376745f769b2SHannes Reinecke 				rc = -EOPNOTSUPP;
3768283b4a9bSStephen M. Cameron 		}
3769edd16368SStephen M. Cameron 	}
3770a2dac136SStephen M. Cameron out:
377145fcb86eSStephen Cameron 	cmd_free(h, c);
3772edd16368SStephen M. Cameron 	return rc;
3773edd16368SStephen M. Cameron }
3774edd16368SStephen M. Cameron 
3775edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
377603383736SDon Brace 		struct ReportExtendedLUNdata *buf, int bufsize)
3777edd16368SStephen M. Cameron {
37782a80d545SHannes Reinecke 	int rc;
37792a80d545SHannes Reinecke 	struct ReportLUNdata *lbuf;
37802a80d545SHannes Reinecke 
37812a80d545SHannes Reinecke 	rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
378203383736SDon Brace 				      HPSA_REPORT_PHYS_EXTENDED);
378345f769b2SHannes Reinecke 	if (!rc || rc != -EOPNOTSUPP)
37842a80d545SHannes Reinecke 		return rc;
37852a80d545SHannes Reinecke 
37862a80d545SHannes Reinecke 	/* REPORT PHYS EXTENDED is not supported */
37872a80d545SHannes Reinecke 	lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
37882a80d545SHannes Reinecke 	if (!lbuf)
37892a80d545SHannes Reinecke 		return -ENOMEM;
37902a80d545SHannes Reinecke 
37912a80d545SHannes Reinecke 	rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
37922a80d545SHannes Reinecke 	if (!rc) {
37932a80d545SHannes Reinecke 		int i;
37942a80d545SHannes Reinecke 		u32 nphys;
37952a80d545SHannes Reinecke 
37962a80d545SHannes Reinecke 		/* Copy ReportLUNdata header */
37972a80d545SHannes Reinecke 		memcpy(buf, lbuf, 8);
37982a80d545SHannes Reinecke 		nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
37992a80d545SHannes Reinecke 		for (i = 0; i < nphys; i++)
38002a80d545SHannes Reinecke 			memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
38012a80d545SHannes Reinecke 	}
38022a80d545SHannes Reinecke 	kfree(lbuf);
38032a80d545SHannes Reinecke 	return rc;
3804edd16368SStephen M. Cameron }
3805edd16368SStephen M. Cameron 
3806edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3807edd16368SStephen M. Cameron 		struct ReportLUNdata *buf, int bufsize)
3808edd16368SStephen M. Cameron {
3809edd16368SStephen M. Cameron 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3810edd16368SStephen M. Cameron }
3811edd16368SStephen M. Cameron 
3812edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3813edd16368SStephen M. Cameron 	int bus, int target, int lun)
3814edd16368SStephen M. Cameron {
3815edd16368SStephen M. Cameron 	device->bus = bus;
3816edd16368SStephen M. Cameron 	device->target = target;
3817edd16368SStephen M. Cameron 	device->lun = lun;
3818edd16368SStephen M. Cameron }
3819edd16368SStephen M. Cameron 
38209846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */
38219846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h,
38229846590eSStephen M. Cameron 					unsigned char scsi3addr[])
38239846590eSStephen M. Cameron {
38249846590eSStephen M. Cameron 	int rc;
38259846590eSStephen M. Cameron 	int status;
38269846590eSStephen M. Cameron 	int size;
38279846590eSStephen M. Cameron 	unsigned char *buf;
38289846590eSStephen M. Cameron 
38299846590eSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
38309846590eSStephen M. Cameron 	if (!buf)
38319846590eSStephen M. Cameron 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
38329846590eSStephen M. Cameron 
38339846590eSStephen M. Cameron 	/* Does controller have VPD for logical volume status? */
383424a4b078SStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
38359846590eSStephen M. Cameron 		goto exit_failed;
38369846590eSStephen M. Cameron 
38379846590eSStephen M. Cameron 	/* Get the size of the VPD return buffer */
38389846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
38399846590eSStephen M. Cameron 					buf, HPSA_VPD_HEADER_SZ);
384024a4b078SStephen M. Cameron 	if (rc != 0)
38419846590eSStephen M. Cameron 		goto exit_failed;
38429846590eSStephen M. Cameron 	size = buf[3];
38439846590eSStephen M. Cameron 
38449846590eSStephen M. Cameron 	/* Now get the whole VPD buffer */
38459846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
38469846590eSStephen M. Cameron 					buf, size + HPSA_VPD_HEADER_SZ);
384724a4b078SStephen M. Cameron 	if (rc != 0)
38489846590eSStephen M. Cameron 		goto exit_failed;
38499846590eSStephen M. Cameron 	status = buf[4]; /* status byte */
38509846590eSStephen M. Cameron 
38519846590eSStephen M. Cameron 	kfree(buf);
38529846590eSStephen M. Cameron 	return status;
38539846590eSStephen M. Cameron exit_failed:
38549846590eSStephen M. Cameron 	kfree(buf);
38559846590eSStephen M. Cameron 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
38569846590eSStephen M. Cameron }
38579846590eSStephen M. Cameron 
38589846590eSStephen M. Cameron /* Determine offline status of a volume.
38599846590eSStephen M. Cameron  * Return either:
38609846590eSStephen M. Cameron  *  0 (not offline)
386167955ba3SStephen M. Cameron  *  0xff (offline for unknown reasons)
38629846590eSStephen M. Cameron  *  # (integer code indicating one of several NOT READY states
38639846590eSStephen M. Cameron  *     describing why a volume is to be kept offline)
38649846590eSStephen M. Cameron  */
386585b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h,
38669846590eSStephen M. Cameron 					unsigned char scsi3addr[])
38679846590eSStephen M. Cameron {
38689846590eSStephen M. Cameron 	struct CommandList *c;
38699437ac43SStephen Cameron 	unsigned char *sense;
38709437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
38719437ac43SStephen Cameron 	int sense_len;
387225163bd5SWebb Scales 	int rc, ldstat = 0;
38739846590eSStephen M. Cameron 	u16 cmd_status;
38749846590eSStephen M. Cameron 	u8 scsi_status;
38759846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04
38769846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
38779846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
38789846590eSStephen M. Cameron 
38799846590eSStephen M. Cameron 	c = cmd_alloc(h);
3880bf43caf3SRobert Elliott 
38819846590eSStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3882c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
38833026ff9bSDon Brace 					NO_TIMEOUT);
388425163bd5SWebb Scales 	if (rc) {
388525163bd5SWebb Scales 		cmd_free(h, c);
388685b29008SDon Brace 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
388725163bd5SWebb Scales 	}
38889846590eSStephen M. Cameron 	sense = c->err_info->SenseInfo;
38899437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
38909437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
38919437ac43SStephen Cameron 	else
38929437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
38939437ac43SStephen Cameron 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
38949846590eSStephen M. Cameron 	cmd_status = c->err_info->CommandStatus;
38959846590eSStephen M. Cameron 	scsi_status = c->err_info->ScsiStatus;
38969846590eSStephen M. Cameron 	cmd_free(h, c);
38979846590eSStephen M. Cameron 
38989846590eSStephen M. Cameron 	/* Determine the reason for not ready state */
38999846590eSStephen M. Cameron 	ldstat = hpsa_get_volume_status(h, scsi3addr);
39009846590eSStephen M. Cameron 
39019846590eSStephen M. Cameron 	/* Keep volume offline in certain cases: */
39029846590eSStephen M. Cameron 	switch (ldstat) {
390385b29008SDon Brace 	case HPSA_LV_FAILED:
39049846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
39055ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
39069846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
39079846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
39089846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
39099846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
39109846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
39119846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
39129846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
39139846590eSStephen M. Cameron 		return ldstat;
39149846590eSStephen M. Cameron 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
39159846590eSStephen M. Cameron 		/* If VPD status page isn't available,
39169846590eSStephen M. Cameron 		 * use ASC/ASCQ to determine state
39179846590eSStephen M. Cameron 		 */
39189846590eSStephen M. Cameron 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
39199846590eSStephen M. Cameron 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
39209846590eSStephen M. Cameron 			return ldstat;
39219846590eSStephen M. Cameron 		break;
39229846590eSStephen M. Cameron 	default:
39239846590eSStephen M. Cameron 		break;
39249846590eSStephen M. Cameron 	}
392585b29008SDon Brace 	return HPSA_LV_OK;
39269846590eSStephen M. Cameron }
39279846590eSStephen M. Cameron 
3928edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h,
39290b0e1d6cSStephen M. Cameron 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
39300b0e1d6cSStephen M. Cameron 	unsigned char *is_OBDR_device)
3931edd16368SStephen M. Cameron {
39320b0e1d6cSStephen M. Cameron 
39330b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43
39340b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10"
39350b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
39360b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
39370b0e1d6cSStephen M. Cameron 
3938ea6d3bc3SStephen M. Cameron 	unsigned char *inq_buff;
39390b0e1d6cSStephen M. Cameron 	unsigned char *obdr_sig;
3940683fc444SDon Brace 	int rc = 0;
3941edd16368SStephen M. Cameron 
3942ea6d3bc3SStephen M. Cameron 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3943683fc444SDon Brace 	if (!inq_buff) {
3944683fc444SDon Brace 		rc = -ENOMEM;
3945edd16368SStephen M. Cameron 		goto bail_out;
3946683fc444SDon Brace 	}
3947edd16368SStephen M. Cameron 
3948edd16368SStephen M. Cameron 	/* Do an inquiry to the device to see what it is. */
3949edd16368SStephen M. Cameron 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3950edd16368SStephen M. Cameron 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3951edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev,
395285b29008SDon Brace 			"%s: inquiry failed, device will be skipped.\n",
395385b29008SDon Brace 			__func__);
395485b29008SDon Brace 		rc = HPSA_INQUIRY_FAILED;
3955edd16368SStephen M. Cameron 		goto bail_out;
3956edd16368SStephen M. Cameron 	}
3957edd16368SStephen M. Cameron 
39584af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[8], 8);
39594af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[16], 16);
396075d23d89SDon Brace 
3961edd16368SStephen M. Cameron 	this_device->devtype = (inq_buff[0] & 0x1f);
3962edd16368SStephen M. Cameron 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3963edd16368SStephen M. Cameron 	memcpy(this_device->vendor, &inq_buff[8],
3964edd16368SStephen M. Cameron 		sizeof(this_device->vendor));
3965edd16368SStephen M. Cameron 	memcpy(this_device->model, &inq_buff[16],
3966edd16368SStephen M. Cameron 		sizeof(this_device->model));
39677630b3a5SHannes Reinecke 	this_device->rev = inq_buff[2];
3968edd16368SStephen M. Cameron 	memset(this_device->device_id, 0,
3969edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
39708383278dSScott Teel 	if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3971a45bcc4eSDon Brace 		sizeof(this_device->device_id)) < 0) {
39728383278dSScott Teel 		dev_err(&h->pdev->dev,
3973a45bcc4eSDon Brace 			"hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
39748383278dSScott Teel 			h->ctlr, __func__,
39758383278dSScott Teel 			h->scsi_host->host_no,
3976a45bcc4eSDon Brace 			this_device->bus, this_device->target,
3977a45bcc4eSDon Brace 			this_device->lun,
39788383278dSScott Teel 			scsi_device_type(this_device->devtype),
39798383278dSScott Teel 			this_device->model);
3980a45bcc4eSDon Brace 		rc = HPSA_LV_FAILED;
3981a45bcc4eSDon Brace 		goto bail_out;
3982a45bcc4eSDon Brace 	}
3983edd16368SStephen M. Cameron 
3984af15ed36SDon Brace 	if ((this_device->devtype == TYPE_DISK ||
3985af15ed36SDon Brace 		this_device->devtype == TYPE_ZBC) &&
3986283b4a9bSStephen M. Cameron 		is_logical_dev_addr_mode(scsi3addr)) {
398785b29008SDon Brace 		unsigned char volume_offline;
398867955ba3SStephen M. Cameron 
3989edd16368SStephen M. Cameron 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3990283b4a9bSStephen M. Cameron 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3991283b4a9bSStephen M. Cameron 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
399267955ba3SStephen M. Cameron 		volume_offline = hpsa_volume_offline(h, scsi3addr);
39934d17944aSHannes Reinecke 		if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
39944d17944aSHannes Reinecke 		    h->legacy_board) {
39954d17944aSHannes Reinecke 			/*
39964d17944aSHannes Reinecke 			 * Legacy boards might not support volume status
39974d17944aSHannes Reinecke 			 */
39984d17944aSHannes Reinecke 			dev_info(&h->pdev->dev,
39994d17944aSHannes Reinecke 				 "C0:T%d:L%d Volume status not available, assuming online.\n",
40004d17944aSHannes Reinecke 				 this_device->target, this_device->lun);
40014d17944aSHannes Reinecke 			volume_offline = 0;
40024d17944aSHannes Reinecke 		}
4003eb94588dSTomas Henzl 		this_device->volume_offline = volume_offline;
400485b29008SDon Brace 		if (volume_offline == HPSA_LV_FAILED) {
400585b29008SDon Brace 			rc = HPSA_LV_FAILED;
400685b29008SDon Brace 			dev_err(&h->pdev->dev,
400785b29008SDon Brace 				"%s: LV failed, device will be skipped.\n",
400885b29008SDon Brace 				__func__);
400985b29008SDon Brace 			goto bail_out;
401085b29008SDon Brace 		}
4011283b4a9bSStephen M. Cameron 	} else {
4012edd16368SStephen M. Cameron 		this_device->raid_level = RAID_UNKNOWN;
4013283b4a9bSStephen M. Cameron 		this_device->offload_config = 0;
40143e16e83aSDon Brace 		hpsa_turn_off_ioaccel_for_device(this_device);
4015a3144e0bSJoe Handzik 		this_device->hba_ioaccel_enabled = 0;
40169846590eSStephen M. Cameron 		this_device->volume_offline = 0;
401703383736SDon Brace 		this_device->queue_depth = h->nr_cmds;
4018283b4a9bSStephen M. Cameron 	}
4019edd16368SStephen M. Cameron 
40205086435eSDon Brace 	if (this_device->external)
40215086435eSDon Brace 		this_device->queue_depth = EXTERNAL_QD;
40225086435eSDon Brace 
40230b0e1d6cSStephen M. Cameron 	if (is_OBDR_device) {
40240b0e1d6cSStephen M. Cameron 		/* See if this is a One-Button-Disaster-Recovery device
40250b0e1d6cSStephen M. Cameron 		 * by looking for "$DR-10" at offset 43 in inquiry data.
40260b0e1d6cSStephen M. Cameron 		 */
40270b0e1d6cSStephen M. Cameron 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
40280b0e1d6cSStephen M. Cameron 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
40290b0e1d6cSStephen M. Cameron 					strncmp(obdr_sig, OBDR_TAPE_SIG,
40300b0e1d6cSStephen M. Cameron 						OBDR_SIG_LEN) == 0);
40310b0e1d6cSStephen M. Cameron 	}
4032edd16368SStephen M. Cameron 	kfree(inq_buff);
4033edd16368SStephen M. Cameron 	return 0;
4034edd16368SStephen M. Cameron 
4035edd16368SStephen M. Cameron bail_out:
4036edd16368SStephen M. Cameron 	kfree(inq_buff);
4037683fc444SDon Brace 	return rc;
4038edd16368SStephen M. Cameron }
4039edd16368SStephen M. Cameron 
4040c795505aSKevin Barnett /*
4041c795505aSKevin Barnett  * Helper function to assign bus, target, lun mapping of devices.
4042edd16368SStephen M. Cameron  * Logical drive target and lun are assigned at this time, but
4043edd16368SStephen M. Cameron  * physical device lun and target assignment are deferred (assigned
4044edd16368SStephen M. Cameron  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4045edd16368SStephen M. Cameron */
4046edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h,
40471f310bdeSStephen M. Cameron 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4048edd16368SStephen M. Cameron {
4049c795505aSKevin Barnett 	u32 lunid = get_unaligned_le32(lunaddrbytes);
4050edd16368SStephen M. Cameron 
40511f310bdeSStephen M. Cameron 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
40521f310bdeSStephen M. Cameron 		/* physical device, target and lun filled in later */
40537630b3a5SHannes Reinecke 		if (is_hba_lunid(lunaddrbytes)) {
40547630b3a5SHannes Reinecke 			int bus = HPSA_HBA_BUS;
40557630b3a5SHannes Reinecke 
40567630b3a5SHannes Reinecke 			if (!device->rev)
40577630b3a5SHannes Reinecke 				bus = HPSA_LEGACY_HBA_BUS;
4058c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
40597630b3a5SHannes Reinecke 					bus, 0, lunid & 0x3fff);
40607630b3a5SHannes Reinecke 		} else
40611f310bdeSStephen M. Cameron 			/* defer target, lun assignment for physical devices */
4062c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
4063c795505aSKevin Barnett 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
40641f310bdeSStephen M. Cameron 		return;
40651f310bdeSStephen M. Cameron 	}
40661f310bdeSStephen M. Cameron 	/* It's a logical device */
406766749d0dSScott Teel 	if (device->external) {
40681f310bdeSStephen M. Cameron 		hpsa_set_bus_target_lun(device,
4069c795505aSKevin Barnett 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4070c795505aSKevin Barnett 			lunid & 0x00ff);
40711f310bdeSStephen M. Cameron 		return;
4072339b2b14SStephen M. Cameron 	}
4073c795505aSKevin Barnett 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4074c795505aSKevin Barnett 				0, lunid & 0x3fff);
4075edd16368SStephen M. Cameron }
4076edd16368SStephen M. Cameron 
407766749d0dSScott Teel static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
407866749d0dSScott Teel 	int i, int nphysicals, int nlocal_logicals)
407966749d0dSScott Teel {
408066749d0dSScott Teel 	/* In report logicals, local logicals are listed first,
408166749d0dSScott Teel 	* then any externals.
408266749d0dSScott Teel 	*/
408366749d0dSScott Teel 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
408466749d0dSScott Teel 
408566749d0dSScott Teel 	if (i == raid_ctlr_position)
408666749d0dSScott Teel 		return 0;
408766749d0dSScott Teel 
408866749d0dSScott Teel 	if (i < logicals_start)
408966749d0dSScott Teel 		return 0;
409066749d0dSScott Teel 
409166749d0dSScott Teel 	/* i is in logicals range, but still within local logicals */
409266749d0dSScott Teel 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
409366749d0dSScott Teel 		return 0;
409466749d0dSScott Teel 
409566749d0dSScott Teel 	return 1; /* it's an external lun */
409666749d0dSScott Teel }
409766749d0dSScott Teel 
409854b6e9e9SScott Teel /*
4099edd16368SStephen M. Cameron  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
4100edd16368SStephen M. Cameron  * logdev.  The number of luns in physdev and logdev are returned in
4101edd16368SStephen M. Cameron  * *nphysicals and *nlogicals, respectively.
4102edd16368SStephen M. Cameron  * Returns 0 on success, -1 otherwise.
4103edd16368SStephen M. Cameron  */
4104edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h,
410503383736SDon Brace 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
410601a02ffcSStephen M. Cameron 	struct ReportLUNdata *logdev, u32 *nlogicals)
4107edd16368SStephen M. Cameron {
410803383736SDon Brace 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4109edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4110edd16368SStephen M. Cameron 		return -1;
4111edd16368SStephen M. Cameron 	}
411203383736SDon Brace 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4113edd16368SStephen M. Cameron 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
411403383736SDon Brace 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
411503383736SDon Brace 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4116edd16368SStephen M. Cameron 		*nphysicals = HPSA_MAX_PHYS_LUN;
4117edd16368SStephen M. Cameron 	}
411803383736SDon Brace 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4119edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4120edd16368SStephen M. Cameron 		return -1;
4121edd16368SStephen M. Cameron 	}
41226df1e954SStephen M. Cameron 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4123edd16368SStephen M. Cameron 	/* Reject Logicals in excess of our max capability. */
4124edd16368SStephen M. Cameron 	if (*nlogicals > HPSA_MAX_LUN) {
4125edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4126edd16368SStephen M. Cameron 			"maximum logical LUNs (%d) exceeded.  "
4127edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
4128edd16368SStephen M. Cameron 			*nlogicals - HPSA_MAX_LUN);
4129edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_LUN;
4130edd16368SStephen M. Cameron 	}
4131edd16368SStephen M. Cameron 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4132edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4133edd16368SStephen M. Cameron 			"maximum logical + physical LUNs (%d) exceeded. "
4134edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4135edd16368SStephen M. Cameron 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4136edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4137edd16368SStephen M. Cameron 	}
4138edd16368SStephen M. Cameron 	return 0;
4139edd16368SStephen M. Cameron }
4140edd16368SStephen M. Cameron 
414142a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
414242a91641SDon Brace 	int i, int nphysicals, int nlogicals,
4143a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list,
4144339b2b14SStephen M. Cameron 	struct ReportLUNdata *logdev_list)
4145339b2b14SStephen M. Cameron {
4146339b2b14SStephen M. Cameron 	/* Helper function, figure out where the LUN ID info is coming from
4147339b2b14SStephen M. Cameron 	 * given index i, lists of physical and logical devices, where in
4148339b2b14SStephen M. Cameron 	 * the list the raid controller is supposed to appear (first or last)
4149339b2b14SStephen M. Cameron 	 */
4150339b2b14SStephen M. Cameron 
4151339b2b14SStephen M. Cameron 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4152339b2b14SStephen M. Cameron 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4153339b2b14SStephen M. Cameron 
4154339b2b14SStephen M. Cameron 	if (i == raid_ctlr_position)
4155339b2b14SStephen M. Cameron 		return RAID_CTLR_LUNID;
4156339b2b14SStephen M. Cameron 
4157339b2b14SStephen M. Cameron 	if (i < logicals_start)
4158d5b5d964SStephen M. Cameron 		return &physdev_list->LUN[i -
4159d5b5d964SStephen M. Cameron 				(raid_ctlr_position == 0)].lunid[0];
4160339b2b14SStephen M. Cameron 
4161339b2b14SStephen M. Cameron 	if (i < last_device)
4162339b2b14SStephen M. Cameron 		return &logdev_list->LUN[i - nphysicals -
4163339b2b14SStephen M. Cameron 			(raid_ctlr_position == 0)][0];
4164339b2b14SStephen M. Cameron 	BUG();
4165339b2b14SStephen M. Cameron 	return NULL;
4166339b2b14SStephen M. Cameron }
4167339b2b14SStephen M. Cameron 
416803383736SDon Brace /* get physical drive ioaccel handle and queue depth */
416903383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
417003383736SDon Brace 		struct hpsa_scsi_dev_t *dev,
4171f2039b03SDon Brace 		struct ReportExtendedLUNdata *rlep, int rle_index,
417203383736SDon Brace 		struct bmic_identify_physical_device *id_phys)
417303383736SDon Brace {
417403383736SDon Brace 	int rc;
41754b6e5597SScott Teel 	struct ext_report_lun_entry *rle;
41764b6e5597SScott Teel 
41774b6e5597SScott Teel 	rle = &rlep->LUN[rle_index];
417803383736SDon Brace 
417903383736SDon Brace 	dev->ioaccel_handle = rle->ioaccel_handle;
4180f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4181a3144e0bSJoe Handzik 		dev->hba_ioaccel_enabled = 1;
418203383736SDon Brace 	memset(id_phys, 0, sizeof(*id_phys));
4183f2039b03SDon Brace 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4184f2039b03SDon Brace 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
418503383736SDon Brace 			sizeof(*id_phys));
418603383736SDon Brace 	if (!rc)
418703383736SDon Brace 		/* Reserve space for FW operations */
418803383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2
418903383736SDon Brace #define DRIVE_QUEUE_DEPTH 7
419003383736SDon Brace 		dev->queue_depth =
419103383736SDon Brace 			le16_to_cpu(id_phys->current_queue_depth_limit) -
419203383736SDon Brace 				DRIVE_CMDS_RESERVED_FOR_FW;
419303383736SDon Brace 	else
419403383736SDon Brace 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
419503383736SDon Brace }
419603383736SDon Brace 
41978270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4198f2039b03SDon Brace 	struct ReportExtendedLUNdata *rlep, int rle_index,
41998270b862SJoe Handzik 	struct bmic_identify_physical_device *id_phys)
42008270b862SJoe Handzik {
4201f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4202f2039b03SDon Brace 
4203f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
42048270b862SJoe Handzik 		this_device->hba_ioaccel_enabled = 1;
42058270b862SJoe Handzik 
42068270b862SJoe Handzik 	memcpy(&this_device->active_path_index,
42078270b862SJoe Handzik 		&id_phys->active_path_number,
42088270b862SJoe Handzik 		sizeof(this_device->active_path_index));
42098270b862SJoe Handzik 	memcpy(&this_device->path_map,
42108270b862SJoe Handzik 		&id_phys->redundant_path_present_map,
42118270b862SJoe Handzik 		sizeof(this_device->path_map));
42128270b862SJoe Handzik 	memcpy(&this_device->box,
42138270b862SJoe Handzik 		&id_phys->alternate_paths_phys_box_on_port,
42148270b862SJoe Handzik 		sizeof(this_device->box));
42158270b862SJoe Handzik 	memcpy(&this_device->phys_connector,
42168270b862SJoe Handzik 		&id_phys->alternate_paths_phys_connector,
42178270b862SJoe Handzik 		sizeof(this_device->phys_connector));
42188270b862SJoe Handzik 	memcpy(&this_device->bay,
42198270b862SJoe Handzik 		&id_phys->phys_bay_in_box,
42208270b862SJoe Handzik 		sizeof(this_device->bay));
42218270b862SJoe Handzik }
42228270b862SJoe Handzik 
422366749d0dSScott Teel /* get number of local logical disks. */
422466749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h,
422566749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr,
422666749d0dSScott Teel 	u32 *nlocals)
422766749d0dSScott Teel {
422866749d0dSScott Teel 	int rc;
422966749d0dSScott Teel 
423066749d0dSScott Teel 	if (!id_ctlr) {
423166749d0dSScott Teel 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
423266749d0dSScott Teel 			__func__);
423366749d0dSScott Teel 		return -ENOMEM;
423466749d0dSScott Teel 	}
423566749d0dSScott Teel 	memset(id_ctlr, 0, sizeof(*id_ctlr));
423666749d0dSScott Teel 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
423766749d0dSScott Teel 	if (!rc)
4238c99dfd20SChristos Gkekas 		if (id_ctlr->configured_logical_drive_count < 255)
423966749d0dSScott Teel 			*nlocals = id_ctlr->configured_logical_drive_count;
424066749d0dSScott Teel 		else
424166749d0dSScott Teel 			*nlocals = le16_to_cpu(
424266749d0dSScott Teel 					id_ctlr->extended_logical_unit_count);
424366749d0dSScott Teel 	else
424466749d0dSScott Teel 		*nlocals = -1;
424566749d0dSScott Teel 	return rc;
424666749d0dSScott Teel }
424766749d0dSScott Teel 
424864ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
424964ce60caSDon Brace {
425064ce60caSDon Brace 	struct bmic_identify_physical_device *id_phys;
425164ce60caSDon Brace 	bool is_spare = false;
425264ce60caSDon Brace 	int rc;
425364ce60caSDon Brace 
425464ce60caSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
425564ce60caSDon Brace 	if (!id_phys)
425664ce60caSDon Brace 		return false;
425764ce60caSDon Brace 
425864ce60caSDon Brace 	rc = hpsa_bmic_id_physical_device(h,
425964ce60caSDon Brace 					lunaddrbytes,
426064ce60caSDon Brace 					GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
426164ce60caSDon Brace 					id_phys, sizeof(*id_phys));
426264ce60caSDon Brace 	if (rc == 0)
426364ce60caSDon Brace 		is_spare = (id_phys->more_flags >> 6) & 0x01;
426464ce60caSDon Brace 
426564ce60caSDon Brace 	kfree(id_phys);
426664ce60caSDon Brace 	return is_spare;
426764ce60caSDon Brace }
426864ce60caSDon Brace 
426964ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK                           0x1
427064ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
427164ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
427264ce60caSDon Brace 
427364ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE  6
427464ce60caSDon Brace 
427564ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
427664ce60caSDon Brace 				struct ext_report_lun_entry *rle)
427764ce60caSDon Brace {
427864ce60caSDon Brace 	u8 device_flags;
427964ce60caSDon Brace 	u8 device_type;
428064ce60caSDon Brace 
428164ce60caSDon Brace 	if (!MASKED_DEVICE(lunaddrbytes))
428264ce60caSDon Brace 		return false;
428364ce60caSDon Brace 
428464ce60caSDon Brace 	device_flags = rle->device_flags;
428564ce60caSDon Brace 	device_type = rle->device_type;
428664ce60caSDon Brace 
428764ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_NON_DISK) {
428864ce60caSDon Brace 		if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
428964ce60caSDon Brace 			return false;
429064ce60caSDon Brace 		return true;
429164ce60caSDon Brace 	}
429264ce60caSDon Brace 
429364ce60caSDon Brace 	if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
429464ce60caSDon Brace 		return false;
429564ce60caSDon Brace 
429664ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
429764ce60caSDon Brace 		return false;
429864ce60caSDon Brace 
429964ce60caSDon Brace 	/*
430064ce60caSDon Brace 	 * Spares may be spun down, we do not want to
430164ce60caSDon Brace 	 * do an Inquiry to a RAID set spare drive as
430264ce60caSDon Brace 	 * that would have them spun up, that is a
430364ce60caSDon Brace 	 * performance hit because I/O to the RAID device
430464ce60caSDon Brace 	 * stops while the spin up occurs which can take
430564ce60caSDon Brace 	 * over 50 seconds.
430664ce60caSDon Brace 	 */
430764ce60caSDon Brace 	if (hpsa_is_disk_spare(h, lunaddrbytes))
430864ce60caSDon Brace 		return true;
430964ce60caSDon Brace 
431064ce60caSDon Brace 	return false;
431164ce60caSDon Brace }
431266749d0dSScott Teel 
43138aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h)
4314edd16368SStephen M. Cameron {
4315edd16368SStephen M. Cameron 	/* the idea here is we could get notified
4316edd16368SStephen M. Cameron 	 * that some devices have changed, so we do a report
4317edd16368SStephen M. Cameron 	 * physical luns and report logical luns cmd, and adjust
4318edd16368SStephen M. Cameron 	 * our list of devices accordingly.
4319edd16368SStephen M. Cameron 	 *
4320edd16368SStephen M. Cameron 	 * The scsi3addr's of devices won't change so long as the
4321edd16368SStephen M. Cameron 	 * adapter is not reset.  That means we can rescan and
4322edd16368SStephen M. Cameron 	 * tell which devices we already know about, vs. new
4323edd16368SStephen M. Cameron 	 * devices, vs.  disappearing devices.
4324edd16368SStephen M. Cameron 	 */
4325a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list = NULL;
4326edd16368SStephen M. Cameron 	struct ReportLUNdata *logdev_list = NULL;
432703383736SDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
432866749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr = NULL;
432901a02ffcSStephen M. Cameron 	u32 nphysicals = 0;
433001a02ffcSStephen M. Cameron 	u32 nlogicals = 0;
433166749d0dSScott Teel 	u32 nlocal_logicals = 0;
433201a02ffcSStephen M. Cameron 	u32 ndev_allocated = 0;
4333edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4334edd16368SStephen M. Cameron 	int ncurrent = 0;
43354f4eb9f1SScott Teel 	int i, n_ext_target_devs, ndevs_to_allocate;
4336339b2b14SStephen M. Cameron 	int raid_ctlr_position;
433704fa2f44SKevin Barnett 	bool physical_device;
4338aca4a520SScott Teel 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4339edd16368SStephen M. Cameron 
43406396bb22SKees Cook 	currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
434192084715SStephen M. Cameron 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
434292084715SStephen M. Cameron 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4343edd16368SStephen M. Cameron 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
434403383736SDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
434566749d0dSScott Teel 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4346edd16368SStephen M. Cameron 
434703383736SDon Brace 	if (!currentsd || !physdev_list || !logdev_list ||
434866749d0dSScott Teel 		!tmpdevice || !id_phys || !id_ctlr) {
4349edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory\n");
4350edd16368SStephen M. Cameron 		goto out;
4351edd16368SStephen M. Cameron 	}
4352edd16368SStephen M. Cameron 	memset(lunzerobits, 0, sizeof(lunzerobits));
4353edd16368SStephen M. Cameron 
4354853633e8SDon Brace 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4355853633e8SDon Brace 
435603383736SDon Brace 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4357853633e8SDon Brace 			logdev_list, &nlogicals)) {
4358853633e8SDon Brace 		h->drv_req_rescan = 1;
4359edd16368SStephen M. Cameron 		goto out;
4360853633e8SDon Brace 	}
4361edd16368SStephen M. Cameron 
436266749d0dSScott Teel 	/* Set number of local logicals (non PTRAID) */
436366749d0dSScott Teel 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
436466749d0dSScott Teel 		dev_warn(&h->pdev->dev,
436566749d0dSScott Teel 			"%s: Can't determine number of local logical devices.\n",
436666749d0dSScott Teel 			__func__);
436766749d0dSScott Teel 	}
4368edd16368SStephen M. Cameron 
4369aca4a520SScott Teel 	/* We might see up to the maximum number of logical and physical disks
4370aca4a520SScott Teel 	 * plus external target devices, and a device for the local RAID
4371aca4a520SScott Teel 	 * controller.
4372edd16368SStephen M. Cameron 	 */
4373aca4a520SScott Teel 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4374edd16368SStephen M. Cameron 
43754e188184SBader Ali Saleh 	hpsa_ext_ctrl_present(h, physdev_list);
43764e188184SBader Ali Saleh 
4377edd16368SStephen M. Cameron 	/* Allocate the per device structures */
4378edd16368SStephen M. Cameron 	for (i = 0; i < ndevs_to_allocate; i++) {
4379b7ec021fSScott Teel 		if (i >= HPSA_MAX_DEVICES) {
4380b7ec021fSScott Teel 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4381b7ec021fSScott Teel 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4382b7ec021fSScott Teel 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4383b7ec021fSScott Teel 			break;
4384b7ec021fSScott Teel 		}
4385b7ec021fSScott Teel 
4386edd16368SStephen M. Cameron 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4387edd16368SStephen M. Cameron 		if (!currentsd[i]) {
4388853633e8SDon Brace 			h->drv_req_rescan = 1;
4389edd16368SStephen M. Cameron 			goto out;
4390edd16368SStephen M. Cameron 		}
4391edd16368SStephen M. Cameron 		ndev_allocated++;
4392edd16368SStephen M. Cameron 	}
4393edd16368SStephen M. Cameron 
43948645291bSStephen M. Cameron 	if (is_scsi_rev_5(h))
4395339b2b14SStephen M. Cameron 		raid_ctlr_position = 0;
4396339b2b14SStephen M. Cameron 	else
4397339b2b14SStephen M. Cameron 		raid_ctlr_position = nphysicals + nlogicals;
4398339b2b14SStephen M. Cameron 
4399edd16368SStephen M. Cameron 	/* adjust our table of devices */
44004f4eb9f1SScott Teel 	n_ext_target_devs = 0;
4401edd16368SStephen M. Cameron 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
44020b0e1d6cSStephen M. Cameron 		u8 *lunaddrbytes, is_OBDR = 0;
4403683fc444SDon Brace 		int rc = 0;
4404f2039b03SDon Brace 		int phys_dev_index = i - (raid_ctlr_position == 0);
440564ce60caSDon Brace 		bool skip_device = false;
4406edd16368SStephen M. Cameron 
4407421bf80cSScott Teel 		memset(tmpdevice, 0, sizeof(*tmpdevice));
4408421bf80cSScott Teel 
440904fa2f44SKevin Barnett 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4410edd16368SStephen M. Cameron 
4411edd16368SStephen M. Cameron 		/* Figure out where the LUN ID info is coming from */
4412339b2b14SStephen M. Cameron 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4413339b2b14SStephen M. Cameron 			i, nphysicals, nlogicals, physdev_list, logdev_list);
441441ce4c35SStephen Cameron 
441586cf7130SDon Brace 		/* Determine if this is a lun from an external target array */
441686cf7130SDon Brace 		tmpdevice->external =
441786cf7130SDon Brace 			figure_external_status(h, raid_ctlr_position, i,
441886cf7130SDon Brace 						nphysicals, nlocal_logicals);
441986cf7130SDon Brace 
442064ce60caSDon Brace 		/*
442164ce60caSDon Brace 		 * Skip over some devices such as a spare.
442264ce60caSDon Brace 		 */
442364ce60caSDon Brace 		if (!tmpdevice->external && physical_device) {
442464ce60caSDon Brace 			skip_device = hpsa_skip_device(h, lunaddrbytes,
442564ce60caSDon Brace 					&physdev_list->LUN[phys_dev_index]);
442664ce60caSDon Brace 			if (skip_device)
4427edd16368SStephen M. Cameron 				continue;
442864ce60caSDon Brace 		}
4429edd16368SStephen M. Cameron 
4430b2582a65SDon Brace 		/* Get device type, vendor, model, device id, raid_map */
4431683fc444SDon Brace 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4432683fc444SDon Brace 							&is_OBDR);
4433683fc444SDon Brace 		if (rc == -ENOMEM) {
4434683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4435683fc444SDon Brace 				"Out of memory, rescan deferred.\n");
4436853633e8SDon Brace 			h->drv_req_rescan = 1;
4437683fc444SDon Brace 			goto out;
4438853633e8SDon Brace 		}
4439683fc444SDon Brace 		if (rc) {
444085b29008SDon Brace 			h->drv_req_rescan = 1;
4441683fc444SDon Brace 			continue;
4442683fc444SDon Brace 		}
4443683fc444SDon Brace 
44441f310bdeSStephen M. Cameron 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4445edd16368SStephen M. Cameron 		this_device = currentsd[ncurrent];
4446edd16368SStephen M. Cameron 
4447edd16368SStephen M. Cameron 		*this_device = *tmpdevice;
444804fa2f44SKevin Barnett 		this_device->physical_device = physical_device;
4449edd16368SStephen M. Cameron 
445004fa2f44SKevin Barnett 		/*
445104fa2f44SKevin Barnett 		 * Expose all devices except for physical devices that
445204fa2f44SKevin Barnett 		 * are masked.
445304fa2f44SKevin Barnett 		 */
445404fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
44552a168208SKevin Barnett 			this_device->expose_device = 0;
44562a168208SKevin Barnett 		else
44572a168208SKevin Barnett 			this_device->expose_device = 1;
445841ce4c35SStephen Cameron 
4459d04e62b9SKevin Barnett 
4460d04e62b9SKevin Barnett 		/*
4461d04e62b9SKevin Barnett 		 * Get the SAS address for physical devices that are exposed.
4462d04e62b9SKevin Barnett 		 */
4463d04e62b9SKevin Barnett 		if (this_device->physical_device && this_device->expose_device)
4464d04e62b9SKevin Barnett 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4465edd16368SStephen M. Cameron 
4466edd16368SStephen M. Cameron 		switch (this_device->devtype) {
44670b0e1d6cSStephen M. Cameron 		case TYPE_ROM:
4468edd16368SStephen M. Cameron 			/* We don't *really* support actual CD-ROM devices,
4469edd16368SStephen M. Cameron 			 * just "One Button Disaster Recovery" tape drive
4470edd16368SStephen M. Cameron 			 * which temporarily pretends to be a CD-ROM drive.
4471edd16368SStephen M. Cameron 			 * So we check that the device is really an OBDR tape
4472edd16368SStephen M. Cameron 			 * device by checking for "$DR-10" in bytes 43-48 of
4473edd16368SStephen M. Cameron 			 * the inquiry data.
4474edd16368SStephen M. Cameron 			 */
44750b0e1d6cSStephen M. Cameron 			if (is_OBDR)
4476edd16368SStephen M. Cameron 				ncurrent++;
4477edd16368SStephen M. Cameron 			break;
4478edd16368SStephen M. Cameron 		case TYPE_DISK:
4479af15ed36SDon Brace 		case TYPE_ZBC:
448004fa2f44SKevin Barnett 			if (this_device->physical_device) {
4481b9092b79SKevin Barnett 				/* The disk is in HBA mode. */
4482b9092b79SKevin Barnett 				/* Never use RAID mapper in HBA mode. */
4483ecf418d1SJoe Handzik 				this_device->offload_enabled = 0;
448403383736SDon Brace 				hpsa_get_ioaccel_drive_info(h, this_device,
4485f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4486f2039b03SDon Brace 				hpsa_get_path_info(this_device,
4487f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4488b9092b79SKevin Barnett 			}
4489edd16368SStephen M. Cameron 			ncurrent++;
4490edd16368SStephen M. Cameron 			break;
4491edd16368SStephen M. Cameron 		case TYPE_TAPE:
4492edd16368SStephen M. Cameron 		case TYPE_MEDIUM_CHANGER:
4493cca8f13bSDon Brace 			ncurrent++;
4494cca8f13bSDon Brace 			break;
449541ce4c35SStephen Cameron 		case TYPE_ENCLOSURE:
449617a9e54aSDon Brace 			if (!this_device->external)
4497cca8f13bSDon Brace 				hpsa_get_enclosure_info(h, lunaddrbytes,
4498cca8f13bSDon Brace 						physdev_list, phys_dev_index,
4499cca8f13bSDon Brace 						this_device);
450041ce4c35SStephen Cameron 			ncurrent++;
450141ce4c35SStephen Cameron 			break;
4502edd16368SStephen M. Cameron 		case TYPE_RAID:
4503edd16368SStephen M. Cameron 			/* Only present the Smartarray HBA as a RAID controller.
4504edd16368SStephen M. Cameron 			 * If it's a RAID controller other than the HBA itself
4505edd16368SStephen M. Cameron 			 * (an external RAID controller, MSA500 or similar)
4506edd16368SStephen M. Cameron 			 * don't present it.
4507edd16368SStephen M. Cameron 			 */
4508edd16368SStephen M. Cameron 			if (!is_hba_lunid(lunaddrbytes))
4509edd16368SStephen M. Cameron 				break;
4510edd16368SStephen M. Cameron 			ncurrent++;
4511edd16368SStephen M. Cameron 			break;
4512edd16368SStephen M. Cameron 		default:
4513edd16368SStephen M. Cameron 			break;
4514edd16368SStephen M. Cameron 		}
4515cfe5badcSScott Teel 		if (ncurrent >= HPSA_MAX_DEVICES)
4516edd16368SStephen M. Cameron 			break;
4517edd16368SStephen M. Cameron 	}
4518d04e62b9SKevin Barnett 
4519d04e62b9SKevin Barnett 	if (h->sas_host == NULL) {
4520d04e62b9SKevin Barnett 		int rc = 0;
4521d04e62b9SKevin Barnett 
4522d04e62b9SKevin Barnett 		rc = hpsa_add_sas_host(h);
4523d04e62b9SKevin Barnett 		if (rc) {
4524d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
4525d04e62b9SKevin Barnett 				"Could not add sas host %d\n", rc);
4526d04e62b9SKevin Barnett 			goto out;
4527d04e62b9SKevin Barnett 		}
4528d04e62b9SKevin Barnett 	}
4529d04e62b9SKevin Barnett 
45308aa60681SDon Brace 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4531edd16368SStephen M. Cameron out:
4532edd16368SStephen M. Cameron 	kfree(tmpdevice);
4533edd16368SStephen M. Cameron 	for (i = 0; i < ndev_allocated; i++)
4534edd16368SStephen M. Cameron 		kfree(currentsd[i]);
4535edd16368SStephen M. Cameron 	kfree(currentsd);
4536edd16368SStephen M. Cameron 	kfree(physdev_list);
4537edd16368SStephen M. Cameron 	kfree(logdev_list);
453866749d0dSScott Teel 	kfree(id_ctlr);
453903383736SDon Brace 	kfree(id_phys);
4540edd16368SStephen M. Cameron }
4541edd16368SStephen M. Cameron 
4542ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4543ec5cbf04SWebb Scales 				   struct scatterlist *sg)
4544ec5cbf04SWebb Scales {
4545ec5cbf04SWebb Scales 	u64 addr64 = (u64) sg_dma_address(sg);
4546ec5cbf04SWebb Scales 	unsigned int len = sg_dma_len(sg);
4547ec5cbf04SWebb Scales 
4548ec5cbf04SWebb Scales 	desc->Addr = cpu_to_le64(addr64);
4549ec5cbf04SWebb Scales 	desc->Len = cpu_to_le32(len);
4550ec5cbf04SWebb Scales 	desc->Ext = 0;
4551ec5cbf04SWebb Scales }
4552ec5cbf04SWebb Scales 
4553c7ee65b3SWebb Scales /*
4554c7ee65b3SWebb Scales  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4555edd16368SStephen M. Cameron  * dma mapping  and fills in the scatter gather entries of the
4556edd16368SStephen M. Cameron  * hpsa command, cp.
4557edd16368SStephen M. Cameron  */
455833a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h,
4559edd16368SStephen M. Cameron 		struct CommandList *cp,
4560edd16368SStephen M. Cameron 		struct scsi_cmnd *cmd)
4561edd16368SStephen M. Cameron {
4562edd16368SStephen M. Cameron 	struct scatterlist *sg;
4563b3a7ba7cSWebb Scales 	int use_sg, i, sg_limit, chained, last_sg;
456433a2ffceSStephen M. Cameron 	struct SGDescriptor *curr_sg;
4565edd16368SStephen M. Cameron 
456633a2ffceSStephen M. Cameron 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4567edd16368SStephen M. Cameron 
4568edd16368SStephen M. Cameron 	use_sg = scsi_dma_map(cmd);
4569edd16368SStephen M. Cameron 	if (use_sg < 0)
4570edd16368SStephen M. Cameron 		return use_sg;
4571edd16368SStephen M. Cameron 
4572edd16368SStephen M. Cameron 	if (!use_sg)
4573edd16368SStephen M. Cameron 		goto sglist_finished;
4574edd16368SStephen M. Cameron 
4575b3a7ba7cSWebb Scales 	/*
4576b3a7ba7cSWebb Scales 	 * If the number of entries is greater than the max for a single list,
4577b3a7ba7cSWebb Scales 	 * then we have a chained list; we will set up all but one entry in the
4578b3a7ba7cSWebb Scales 	 * first list (the last entry is saved for link information);
4579b3a7ba7cSWebb Scales 	 * otherwise, we don't have a chained list and we'll set up at each of
4580b3a7ba7cSWebb Scales 	 * the entries in the one list.
4581b3a7ba7cSWebb Scales 	 */
458233a2ffceSStephen M. Cameron 	curr_sg = cp->SG;
4583b3a7ba7cSWebb Scales 	chained = use_sg > h->max_cmd_sg_entries;
4584b3a7ba7cSWebb Scales 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4585b3a7ba7cSWebb Scales 	last_sg = scsi_sg_count(cmd) - 1;
4586b3a7ba7cSWebb Scales 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4587ec5cbf04SWebb Scales 		hpsa_set_sg_descriptor(curr_sg, sg);
458833a2ffceSStephen M. Cameron 		curr_sg++;
458933a2ffceSStephen M. Cameron 	}
4590ec5cbf04SWebb Scales 
4591b3a7ba7cSWebb Scales 	if (chained) {
4592b3a7ba7cSWebb Scales 		/*
4593b3a7ba7cSWebb Scales 		 * Continue with the chained list.  Set curr_sg to the chained
4594b3a7ba7cSWebb Scales 		 * list.  Modify the limit to the total count less the entries
4595b3a7ba7cSWebb Scales 		 * we've already set up.  Resume the scan at the list entry
4596b3a7ba7cSWebb Scales 		 * where the previous loop left off.
4597b3a7ba7cSWebb Scales 		 */
4598b3a7ba7cSWebb Scales 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4599b3a7ba7cSWebb Scales 		sg_limit = use_sg - sg_limit;
4600b3a7ba7cSWebb Scales 		for_each_sg(sg, sg, sg_limit, i) {
4601b3a7ba7cSWebb Scales 			hpsa_set_sg_descriptor(curr_sg, sg);
4602b3a7ba7cSWebb Scales 			curr_sg++;
4603b3a7ba7cSWebb Scales 		}
4604b3a7ba7cSWebb Scales 	}
4605b3a7ba7cSWebb Scales 
4606ec5cbf04SWebb Scales 	/* Back the pointer up to the last entry and mark it as "last". */
4607b3a7ba7cSWebb Scales 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
460833a2ffceSStephen M. Cameron 
460933a2ffceSStephen M. Cameron 	if (use_sg + chained > h->maxSG)
461033a2ffceSStephen M. Cameron 		h->maxSG = use_sg + chained;
461133a2ffceSStephen M. Cameron 
461233a2ffceSStephen M. Cameron 	if (chained) {
461333a2ffceSStephen M. Cameron 		cp->Header.SGList = h->max_cmd_sg_entries;
461450a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4615e2bea6dfSStephen M. Cameron 		if (hpsa_map_sg_chain_block(h, cp)) {
4616e2bea6dfSStephen M. Cameron 			scsi_dma_unmap(cmd);
4617e2bea6dfSStephen M. Cameron 			return -1;
4618e2bea6dfSStephen M. Cameron 		}
461933a2ffceSStephen M. Cameron 		return 0;
4620edd16368SStephen M. Cameron 	}
4621edd16368SStephen M. Cameron 
4622edd16368SStephen M. Cameron sglist_finished:
4623edd16368SStephen M. Cameron 
462401a02ffcSStephen M. Cameron 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4625c7ee65b3SWebb Scales 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4626edd16368SStephen M. Cameron 	return 0;
4627edd16368SStephen M. Cameron }
4628edd16368SStephen M. Cameron 
4629b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h,
4630b63c64acSDon Brace 						u8 *cdb, int cdb_len,
4631b63c64acSDon Brace 						const char *func)
4632b63c64acSDon Brace {
4633f4d0ad1fSAndy Shevchenko 	dev_warn(&h->pdev->dev,
4634f4d0ad1fSAndy Shevchenko 		 "%s: Blocking zero-length request: CDB:%*phN\n",
4635f4d0ad1fSAndy Shevchenko 		 func, cdb_len, cdb);
4636b63c64acSDon Brace }
4637b63c64acSDon Brace 
4638b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1
4639b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */
4640b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb)
4641b63c64acSDon Brace {
4642b63c64acSDon Brace 	u32 block_cnt;
4643b63c64acSDon Brace 
4644b63c64acSDon Brace 	/* Block zero-length transfer sizes on certain commands. */
4645b63c64acSDon Brace 	switch (cdb[0]) {
4646b63c64acSDon Brace 	case READ_10:
4647b63c64acSDon Brace 	case WRITE_10:
4648b63c64acSDon Brace 	case VERIFY:		/* 0x2F */
4649b63c64acSDon Brace 	case WRITE_VERIFY:	/* 0x2E */
4650b63c64acSDon Brace 		block_cnt = get_unaligned_be16(&cdb[7]);
4651b63c64acSDon Brace 		break;
4652b63c64acSDon Brace 	case READ_12:
4653b63c64acSDon Brace 	case WRITE_12:
4654b63c64acSDon Brace 	case VERIFY_12: /* 0xAF */
4655b63c64acSDon Brace 	case WRITE_VERIFY_12:	/* 0xAE */
4656b63c64acSDon Brace 		block_cnt = get_unaligned_be32(&cdb[6]);
4657b63c64acSDon Brace 		break;
4658b63c64acSDon Brace 	case READ_16:
4659b63c64acSDon Brace 	case WRITE_16:
4660b63c64acSDon Brace 	case VERIFY_16:		/* 0x8F */
4661b63c64acSDon Brace 		block_cnt = get_unaligned_be32(&cdb[10]);
4662b63c64acSDon Brace 		break;
4663b63c64acSDon Brace 	default:
4664b63c64acSDon Brace 		return false;
4665b63c64acSDon Brace 	}
4666b63c64acSDon Brace 
4667b63c64acSDon Brace 	return block_cnt == 0;
4668b63c64acSDon Brace }
4669b63c64acSDon Brace 
4670283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4671283b4a9bSStephen M. Cameron {
4672283b4a9bSStephen M. Cameron 	int is_write = 0;
4673283b4a9bSStephen M. Cameron 	u32 block;
4674283b4a9bSStephen M. Cameron 	u32 block_cnt;
4675283b4a9bSStephen M. Cameron 
4676283b4a9bSStephen M. Cameron 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4677283b4a9bSStephen M. Cameron 	switch (cdb[0]) {
4678283b4a9bSStephen M. Cameron 	case WRITE_6:
4679283b4a9bSStephen M. Cameron 	case WRITE_12:
4680283b4a9bSStephen M. Cameron 		is_write = 1;
46815dfdb089SGustavo A. R. Silva 		/* fall through */
4682283b4a9bSStephen M. Cameron 	case READ_6:
4683283b4a9bSStephen M. Cameron 	case READ_12:
4684283b4a9bSStephen M. Cameron 		if (*cdb_len == 6) {
4685abbada71SMahesh Rajashekhara 			block = (((cdb[1] & 0x1F) << 16) |
4686abbada71SMahesh Rajashekhara 				(cdb[2] << 8) |
4687abbada71SMahesh Rajashekhara 				cdb[3]);
4688283b4a9bSStephen M. Cameron 			block_cnt = cdb[4];
4689c8a6c9a6SDon Brace 			if (block_cnt == 0)
4690c8a6c9a6SDon Brace 				block_cnt = 256;
4691283b4a9bSStephen M. Cameron 		} else {
4692283b4a9bSStephen M. Cameron 			BUG_ON(*cdb_len != 12);
4693c8a6c9a6SDon Brace 			block = get_unaligned_be32(&cdb[2]);
4694c8a6c9a6SDon Brace 			block_cnt = get_unaligned_be32(&cdb[6]);
4695283b4a9bSStephen M. Cameron 		}
4696283b4a9bSStephen M. Cameron 		if (block_cnt > 0xffff)
4697283b4a9bSStephen M. Cameron 			return IO_ACCEL_INELIGIBLE;
4698283b4a9bSStephen M. Cameron 
4699283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
4700283b4a9bSStephen M. Cameron 		cdb[1] = 0;
4701283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (block >> 24);
4702283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (block >> 16);
4703283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (block >> 8);
4704283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (block);
4705283b4a9bSStephen M. Cameron 		cdb[6] = 0;
4706283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (block_cnt >> 8);
4707283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (block_cnt);
4708283b4a9bSStephen M. Cameron 		cdb[9] = 0;
4709283b4a9bSStephen M. Cameron 		*cdb_len = 10;
4710283b4a9bSStephen M. Cameron 		break;
4711283b4a9bSStephen M. Cameron 	}
4712283b4a9bSStephen M. Cameron 	return 0;
4713283b4a9bSStephen M. Cameron }
4714283b4a9bSStephen M. Cameron 
4715c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4716283b4a9bSStephen M. Cameron 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
471703383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4718e1f7de0cSMatt Gates {
4719e1f7de0cSMatt Gates 	struct scsi_cmnd *cmd = c->scsi_cmd;
4720e1f7de0cSMatt Gates 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4721e1f7de0cSMatt Gates 	unsigned int len;
4722e1f7de0cSMatt Gates 	unsigned int total_len = 0;
4723e1f7de0cSMatt Gates 	struct scatterlist *sg;
4724e1f7de0cSMatt Gates 	u64 addr64;
4725e1f7de0cSMatt Gates 	int use_sg, i;
4726e1f7de0cSMatt Gates 	struct SGDescriptor *curr_sg;
4727e1f7de0cSMatt Gates 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4728e1f7de0cSMatt Gates 
4729283b4a9bSStephen M. Cameron 	/* TODO: implement chaining support */
473003383736SDon Brace 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
473103383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4732283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
473303383736SDon Brace 	}
4734283b4a9bSStephen M. Cameron 
4735e1f7de0cSMatt Gates 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4736e1f7de0cSMatt Gates 
4737b63c64acSDon Brace 	if (is_zero_length_transfer(cdb)) {
4738b63c64acSDon Brace 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4739b63c64acSDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4740b63c64acSDon Brace 		return IO_ACCEL_INELIGIBLE;
4741b63c64acSDon Brace 	}
4742b63c64acSDon Brace 
474303383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
474403383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4745283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
474603383736SDon Brace 	}
4747283b4a9bSStephen M. Cameron 
4748e1f7de0cSMatt Gates 	c->cmd_type = CMD_IOACCEL1;
4749e1f7de0cSMatt Gates 
4750e1f7de0cSMatt Gates 	/* Adjust the DMA address to point to the accelerated command buffer */
4751e1f7de0cSMatt Gates 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4752e1f7de0cSMatt Gates 				(c->cmdindex * sizeof(*cp));
4753e1f7de0cSMatt Gates 	BUG_ON(c->busaddr & 0x0000007F);
4754e1f7de0cSMatt Gates 
4755e1f7de0cSMatt Gates 	use_sg = scsi_dma_map(cmd);
475603383736SDon Brace 	if (use_sg < 0) {
475703383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4758e1f7de0cSMatt Gates 		return use_sg;
475903383736SDon Brace 	}
4760e1f7de0cSMatt Gates 
4761e1f7de0cSMatt Gates 	if (use_sg) {
4762e1f7de0cSMatt Gates 		curr_sg = cp->SG;
4763e1f7de0cSMatt Gates 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4764e1f7de0cSMatt Gates 			addr64 = (u64) sg_dma_address(sg);
4765e1f7de0cSMatt Gates 			len  = sg_dma_len(sg);
4766e1f7de0cSMatt Gates 			total_len += len;
476750a0decfSStephen M. Cameron 			curr_sg->Addr = cpu_to_le64(addr64);
476850a0decfSStephen M. Cameron 			curr_sg->Len = cpu_to_le32(len);
476950a0decfSStephen M. Cameron 			curr_sg->Ext = cpu_to_le32(0);
4770e1f7de0cSMatt Gates 			curr_sg++;
4771e1f7de0cSMatt Gates 		}
477250a0decfSStephen M. Cameron 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4773e1f7de0cSMatt Gates 
4774e1f7de0cSMatt Gates 		switch (cmd->sc_data_direction) {
4775e1f7de0cSMatt Gates 		case DMA_TO_DEVICE:
4776e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_OUT;
4777e1f7de0cSMatt Gates 			break;
4778e1f7de0cSMatt Gates 		case DMA_FROM_DEVICE:
4779e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_IN;
4780e1f7de0cSMatt Gates 			break;
4781e1f7de0cSMatt Gates 		case DMA_NONE:
4782e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_NODATAXFER;
4783e1f7de0cSMatt Gates 			break;
4784e1f7de0cSMatt Gates 		default:
4785e1f7de0cSMatt Gates 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4786e1f7de0cSMatt Gates 			cmd->sc_data_direction);
4787e1f7de0cSMatt Gates 			BUG();
4788e1f7de0cSMatt Gates 			break;
4789e1f7de0cSMatt Gates 		}
4790e1f7de0cSMatt Gates 	} else {
4791e1f7de0cSMatt Gates 		control |= IOACCEL1_CONTROL_NODATAXFER;
4792e1f7de0cSMatt Gates 	}
4793e1f7de0cSMatt Gates 
4794c349775eSScott Teel 	c->Header.SGList = use_sg;
4795e1f7de0cSMatt Gates 	/* Fill out the command structure to submit */
47962b08b3e9SDon Brace 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
47972b08b3e9SDon Brace 	cp->transfer_len = cpu_to_le32(total_len);
47982b08b3e9SDon Brace 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
47992b08b3e9SDon Brace 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
48002b08b3e9SDon Brace 	cp->control = cpu_to_le32(control);
4801283b4a9bSStephen M. Cameron 	memcpy(cp->CDB, cdb, cdb_len);
4802283b4a9bSStephen M. Cameron 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4803c349775eSScott Teel 	/* Tag was already set at init time. */
4804e1f7de0cSMatt Gates 	enqueue_cmd_and_start_io(h, c);
4805e1f7de0cSMatt Gates 	return 0;
4806e1f7de0cSMatt Gates }
4807edd16368SStephen M. Cameron 
4808283b4a9bSStephen M. Cameron /*
4809283b4a9bSStephen M. Cameron  * Queue a command directly to a device behind the controller using the
4810283b4a9bSStephen M. Cameron  * I/O accelerator path.
4811283b4a9bSStephen M. Cameron  */
4812283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4813283b4a9bSStephen M. Cameron 	struct CommandList *c)
4814283b4a9bSStephen M. Cameron {
4815283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4816283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4817283b4a9bSStephen M. Cameron 
481845e596cdSDon Brace 	if (!dev)
481945e596cdSDon Brace 		return -1;
482045e596cdSDon Brace 
482103383736SDon Brace 	c->phys_disk = dev;
482203383736SDon Brace 
4823c5dfd106SDon Brace 	if (dev->in_reset)
4824c5dfd106SDon Brace 		return -1;
4825c5dfd106SDon Brace 
4826283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
482703383736SDon Brace 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4828283b4a9bSStephen M. Cameron }
4829283b4a9bSStephen M. Cameron 
4830dd0e19f3SScott Teel /*
4831dd0e19f3SScott Teel  * Set encryption parameters for the ioaccel2 request
4832dd0e19f3SScott Teel  */
4833dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h,
4834dd0e19f3SScott Teel 	struct CommandList *c, struct io_accel2_cmd *cp)
4835dd0e19f3SScott Teel {
4836dd0e19f3SScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4837dd0e19f3SScott Teel 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4838dd0e19f3SScott Teel 	struct raid_map_data *map = &dev->raid_map;
4839dd0e19f3SScott Teel 	u64 first_block;
4840dd0e19f3SScott Teel 
4841dd0e19f3SScott Teel 	/* Are we doing encryption on this device */
48422b08b3e9SDon Brace 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4843dd0e19f3SScott Teel 		return;
4844dd0e19f3SScott Teel 	/* Set the data encryption key index. */
4845dd0e19f3SScott Teel 	cp->dekindex = map->dekindex;
4846dd0e19f3SScott Teel 
4847dd0e19f3SScott Teel 	/* Set the encryption enable flag, encoded into direction field. */
4848dd0e19f3SScott Teel 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4849dd0e19f3SScott Teel 
4850dd0e19f3SScott Teel 	/* Set encryption tweak values based on logical block address
4851dd0e19f3SScott Teel 	 * If block size is 512, tweak value is LBA.
4852dd0e19f3SScott Teel 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4853dd0e19f3SScott Teel 	 */
4854dd0e19f3SScott Teel 	switch (cmd->cmnd[0]) {
4855dd0e19f3SScott Teel 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4856dd0e19f3SScott Teel 	case READ_6:
4857abbada71SMahesh Rajashekhara 	case WRITE_6:
4858abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4859abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
4860abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
4861dd0e19f3SScott Teel 		break;
4862dd0e19f3SScott Teel 	case WRITE_10:
4863dd0e19f3SScott Teel 	case READ_10:
4864dd0e19f3SScott Teel 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4865dd0e19f3SScott Teel 	case WRITE_12:
4866dd0e19f3SScott Teel 	case READ_12:
48672b08b3e9SDon Brace 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4868dd0e19f3SScott Teel 		break;
4869dd0e19f3SScott Teel 	case WRITE_16:
4870dd0e19f3SScott Teel 	case READ_16:
48712b08b3e9SDon Brace 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4872dd0e19f3SScott Teel 		break;
4873dd0e19f3SScott Teel 	default:
4874dd0e19f3SScott Teel 		dev_err(&h->pdev->dev,
48752b08b3e9SDon Brace 			"ERROR: %s: size (0x%x) not supported for encryption\n",
48762b08b3e9SDon Brace 			__func__, cmd->cmnd[0]);
4877dd0e19f3SScott Teel 		BUG();
4878dd0e19f3SScott Teel 		break;
4879dd0e19f3SScott Teel 	}
48802b08b3e9SDon Brace 
48812b08b3e9SDon Brace 	if (le32_to_cpu(map->volume_blk_size) != 512)
48822b08b3e9SDon Brace 		first_block = first_block *
48832b08b3e9SDon Brace 				le32_to_cpu(map->volume_blk_size)/512;
48842b08b3e9SDon Brace 
48852b08b3e9SDon Brace 	cp->tweak_lower = cpu_to_le32(first_block);
48862b08b3e9SDon Brace 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4887dd0e19f3SScott Teel }
4888dd0e19f3SScott Teel 
4889c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4890c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
489103383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4892c349775eSScott Teel {
4893c349775eSScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4894c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4895c349775eSScott Teel 	struct ioaccel2_sg_element *curr_sg;
4896c349775eSScott Teel 	int use_sg, i;
4897c349775eSScott Teel 	struct scatterlist *sg;
4898c349775eSScott Teel 	u64 addr64;
4899c349775eSScott Teel 	u32 len;
4900c349775eSScott Teel 	u32 total_len = 0;
4901c349775eSScott Teel 
490245e596cdSDon Brace 	if (!cmd->device)
490345e596cdSDon Brace 		return -1;
490445e596cdSDon Brace 
490545e596cdSDon Brace 	if (!cmd->device->hostdata)
490645e596cdSDon Brace 		return -1;
490745e596cdSDon Brace 
4908d9a729f3SWebb Scales 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4909c349775eSScott Teel 
4910b63c64acSDon Brace 	if (is_zero_length_transfer(cdb)) {
4911b63c64acSDon Brace 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4912b63c64acSDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4913b63c64acSDon Brace 		return IO_ACCEL_INELIGIBLE;
4914b63c64acSDon Brace 	}
4915b63c64acSDon Brace 
491603383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
491703383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4918c349775eSScott Teel 		return IO_ACCEL_INELIGIBLE;
491903383736SDon Brace 	}
492003383736SDon Brace 
4921c349775eSScott Teel 	c->cmd_type = CMD_IOACCEL2;
4922c349775eSScott Teel 	/* Adjust the DMA address to point to the accelerated command buffer */
4923c349775eSScott Teel 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4924c349775eSScott Teel 				(c->cmdindex * sizeof(*cp));
4925c349775eSScott Teel 	BUG_ON(c->busaddr & 0x0000007F);
4926c349775eSScott Teel 
4927c349775eSScott Teel 	memset(cp, 0, sizeof(*cp));
4928c349775eSScott Teel 	cp->IU_type = IOACCEL2_IU_TYPE;
4929c349775eSScott Teel 
4930c349775eSScott Teel 	use_sg = scsi_dma_map(cmd);
493103383736SDon Brace 	if (use_sg < 0) {
493203383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4933c349775eSScott Teel 		return use_sg;
493403383736SDon Brace 	}
4935c349775eSScott Teel 
4936c349775eSScott Teel 	if (use_sg) {
4937c349775eSScott Teel 		curr_sg = cp->sg;
4938d9a729f3SWebb Scales 		if (use_sg > h->ioaccel_maxsg) {
4939d9a729f3SWebb Scales 			addr64 = le64_to_cpu(
4940d9a729f3SWebb Scales 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4941d9a729f3SWebb Scales 			curr_sg->address = cpu_to_le64(addr64);
4942d9a729f3SWebb Scales 			curr_sg->length = 0;
4943d9a729f3SWebb Scales 			curr_sg->reserved[0] = 0;
4944d9a729f3SWebb Scales 			curr_sg->reserved[1] = 0;
4945d9a729f3SWebb Scales 			curr_sg->reserved[2] = 0;
4946625d7d35SDon Brace 			curr_sg->chain_indicator = IOACCEL2_CHAIN;
4947d9a729f3SWebb Scales 
4948d9a729f3SWebb Scales 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4949d9a729f3SWebb Scales 		}
4950c349775eSScott Teel 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4951c349775eSScott Teel 			addr64 = (u64) sg_dma_address(sg);
4952c349775eSScott Teel 			len  = sg_dma_len(sg);
4953c349775eSScott Teel 			total_len += len;
4954c349775eSScott Teel 			curr_sg->address = cpu_to_le64(addr64);
4955c349775eSScott Teel 			curr_sg->length = cpu_to_le32(len);
4956c349775eSScott Teel 			curr_sg->reserved[0] = 0;
4957c349775eSScott Teel 			curr_sg->reserved[1] = 0;
4958c349775eSScott Teel 			curr_sg->reserved[2] = 0;
4959c349775eSScott Teel 			curr_sg->chain_indicator = 0;
4960c349775eSScott Teel 			curr_sg++;
4961c349775eSScott Teel 		}
4962c349775eSScott Teel 
4963625d7d35SDon Brace 		/*
4964625d7d35SDon Brace 		 * Set the last s/g element bit
4965625d7d35SDon Brace 		 */
4966625d7d35SDon Brace 		(curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4967625d7d35SDon Brace 
4968c349775eSScott Teel 		switch (cmd->sc_data_direction) {
4969c349775eSScott Teel 		case DMA_TO_DEVICE:
4970dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4971dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4972c349775eSScott Teel 			break;
4973c349775eSScott Teel 		case DMA_FROM_DEVICE:
4974dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4975dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4976c349775eSScott Teel 			break;
4977c349775eSScott Teel 		case DMA_NONE:
4978dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4979dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_NO_DATA;
4980c349775eSScott Teel 			break;
4981c349775eSScott Teel 		default:
4982c349775eSScott Teel 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4983c349775eSScott Teel 				cmd->sc_data_direction);
4984c349775eSScott Teel 			BUG();
4985c349775eSScott Teel 			break;
4986c349775eSScott Teel 		}
4987c349775eSScott Teel 	} else {
4988dd0e19f3SScott Teel 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4989dd0e19f3SScott Teel 		cp->direction |= IOACCEL2_DIR_NO_DATA;
4990c349775eSScott Teel 	}
4991dd0e19f3SScott Teel 
4992dd0e19f3SScott Teel 	/* Set encryption parameters, if necessary */
4993dd0e19f3SScott Teel 	set_encrypt_ioaccel2(h, c, cp);
4994dd0e19f3SScott Teel 
49952b08b3e9SDon Brace 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4996f2405db8SDon Brace 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4997c349775eSScott Teel 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4998c349775eSScott Teel 
4999c349775eSScott Teel 	cp->data_len = cpu_to_le32(total_len);
5000c349775eSScott Teel 	cp->err_ptr = cpu_to_le64(c->busaddr +
5001c349775eSScott Teel 			offsetof(struct io_accel2_cmd, error_data));
500250a0decfSStephen M. Cameron 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5003c349775eSScott Teel 
5004d9a729f3SWebb Scales 	/* fill in sg elements */
5005d9a729f3SWebb Scales 	if (use_sg > h->ioaccel_maxsg) {
5006d9a729f3SWebb Scales 		cp->sg_count = 1;
5007a736e9b6SDon Brace 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5008d9a729f3SWebb Scales 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5009d9a729f3SWebb Scales 			atomic_dec(&phys_disk->ioaccel_cmds_out);
5010d9a729f3SWebb Scales 			scsi_dma_unmap(cmd);
5011d9a729f3SWebb Scales 			return -1;
5012d9a729f3SWebb Scales 		}
5013d9a729f3SWebb Scales 	} else
5014d9a729f3SWebb Scales 		cp->sg_count = (u8) use_sg;
5015d9a729f3SWebb Scales 
5016c5dfd106SDon Brace 	if (phys_disk->in_reset) {
5017c5dfd106SDon Brace 		cmd->result = DID_RESET << 16;
5018c5dfd106SDon Brace 		return -1;
5019c5dfd106SDon Brace 	}
5020c5dfd106SDon Brace 
5021c349775eSScott Teel 	enqueue_cmd_and_start_io(h, c);
5022c349775eSScott Teel 	return 0;
5023c349775eSScott Teel }
5024c349775eSScott Teel 
5025c349775eSScott Teel /*
5026c349775eSScott Teel  * Queue a command to the correct I/O accelerator path.
5027c349775eSScott Teel  */
5028c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5029c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
503003383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5031c349775eSScott Teel {
503245e596cdSDon Brace 	if (!c->scsi_cmd->device)
503345e596cdSDon Brace 		return -1;
503445e596cdSDon Brace 
503545e596cdSDon Brace 	if (!c->scsi_cmd->device->hostdata)
503645e596cdSDon Brace 		return -1;
503745e596cdSDon Brace 
5038c5dfd106SDon Brace 	if (phys_disk->in_reset)
5039c5dfd106SDon Brace 		return -1;
5040c5dfd106SDon Brace 
504103383736SDon Brace 	/* Try to honor the device's queue depth */
504203383736SDon Brace 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
504303383736SDon Brace 					phys_disk->queue_depth) {
504403383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
504503383736SDon Brace 		return IO_ACCEL_INELIGIBLE;
504603383736SDon Brace 	}
5047c349775eSScott Teel 	if (h->transMethod & CFGTBL_Trans_io_accel1)
5048c349775eSScott Teel 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
504903383736SDon Brace 						cdb, cdb_len, scsi3addr,
505003383736SDon Brace 						phys_disk);
5051c349775eSScott Teel 	else
5052c349775eSScott Teel 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
505303383736SDon Brace 						cdb, cdb_len, scsi3addr,
505403383736SDon Brace 						phys_disk);
5055c349775eSScott Teel }
5056c349775eSScott Teel 
50576b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map,
50586b80b18fSScott Teel 		int offload_to_mirror, u32 *map_index, u32 *current_group)
50596b80b18fSScott Teel {
50606b80b18fSScott Teel 	if (offload_to_mirror == 0)  {
50616b80b18fSScott Teel 		/* use physical disk in the first mirrored group. */
50622b08b3e9SDon Brace 		*map_index %= le16_to_cpu(map->data_disks_per_row);
50636b80b18fSScott Teel 		return;
50646b80b18fSScott Teel 	}
50656b80b18fSScott Teel 	do {
50666b80b18fSScott Teel 		/* determine mirror group that *map_index indicates */
50672b08b3e9SDon Brace 		*current_group = *map_index /
50682b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
50696b80b18fSScott Teel 		if (offload_to_mirror == *current_group)
50706b80b18fSScott Teel 			continue;
50712b08b3e9SDon Brace 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
50726b80b18fSScott Teel 			/* select map index from next group */
50732b08b3e9SDon Brace 			*map_index += le16_to_cpu(map->data_disks_per_row);
50746b80b18fSScott Teel 			(*current_group)++;
50756b80b18fSScott Teel 		} else {
50766b80b18fSScott Teel 			/* select map index from first group */
50772b08b3e9SDon Brace 			*map_index %= le16_to_cpu(map->data_disks_per_row);
50786b80b18fSScott Teel 			*current_group = 0;
50796b80b18fSScott Teel 		}
50806b80b18fSScott Teel 	} while (offload_to_mirror != *current_group);
50816b80b18fSScott Teel }
50826b80b18fSScott Teel 
5083283b4a9bSStephen M. Cameron /*
5084283b4a9bSStephen M. Cameron  * Attempt to perform offload RAID mapping for a logical volume I/O.
5085283b4a9bSStephen M. Cameron  */
5086283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5087283b4a9bSStephen M. Cameron 	struct CommandList *c)
5088283b4a9bSStephen M. Cameron {
5089283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
5090283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5091283b4a9bSStephen M. Cameron 	struct raid_map_data *map = &dev->raid_map;
5092283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map->data[0];
5093283b4a9bSStephen M. Cameron 	int is_write = 0;
5094283b4a9bSStephen M. Cameron 	u32 map_index;
5095283b4a9bSStephen M. Cameron 	u64 first_block, last_block;
5096283b4a9bSStephen M. Cameron 	u32 block_cnt;
5097283b4a9bSStephen M. Cameron 	u32 blocks_per_row;
5098283b4a9bSStephen M. Cameron 	u64 first_row, last_row;
5099283b4a9bSStephen M. Cameron 	u32 first_row_offset, last_row_offset;
5100283b4a9bSStephen M. Cameron 	u32 first_column, last_column;
51016b80b18fSScott Teel 	u64 r0_first_row, r0_last_row;
51026b80b18fSScott Teel 	u32 r5or6_blocks_per_row;
51036b80b18fSScott Teel 	u64 r5or6_first_row, r5or6_last_row;
51046b80b18fSScott Teel 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
51056b80b18fSScott Teel 	u32 r5or6_first_column, r5or6_last_column;
51066b80b18fSScott Teel 	u32 total_disks_per_row;
51076b80b18fSScott Teel 	u32 stripesize;
51086b80b18fSScott Teel 	u32 first_group, last_group, current_group;
5109283b4a9bSStephen M. Cameron 	u32 map_row;
5110283b4a9bSStephen M. Cameron 	u32 disk_handle;
5111283b4a9bSStephen M. Cameron 	u64 disk_block;
5112283b4a9bSStephen M. Cameron 	u32 disk_block_cnt;
5113283b4a9bSStephen M. Cameron 	u8 cdb[16];
5114283b4a9bSStephen M. Cameron 	u8 cdb_len;
51152b08b3e9SDon Brace 	u16 strip_size;
5116283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5117283b4a9bSStephen M. Cameron 	u64 tmpdiv;
5118283b4a9bSStephen M. Cameron #endif
51196b80b18fSScott Teel 	int offload_to_mirror;
5120283b4a9bSStephen M. Cameron 
512145e596cdSDon Brace 	if (!dev)
512245e596cdSDon Brace 		return -1;
512345e596cdSDon Brace 
5124c5dfd106SDon Brace 	if (dev->in_reset)
5125c5dfd106SDon Brace 		return -1;
5126c5dfd106SDon Brace 
5127283b4a9bSStephen M. Cameron 	/* check for valid opcode, get LBA and block count */
5128283b4a9bSStephen M. Cameron 	switch (cmd->cmnd[0]) {
5129283b4a9bSStephen M. Cameron 	case WRITE_6:
5130283b4a9bSStephen M. Cameron 		is_write = 1;
51315dfdb089SGustavo A. R. Silva 		/* fall through */
5132283b4a9bSStephen M. Cameron 	case READ_6:
5133abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5134abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
5135abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
5136283b4a9bSStephen M. Cameron 		block_cnt = cmd->cmnd[4];
51373fa89a04SStephen M. Cameron 		if (block_cnt == 0)
51383fa89a04SStephen M. Cameron 			block_cnt = 256;
5139283b4a9bSStephen M. Cameron 		break;
5140283b4a9bSStephen M. Cameron 	case WRITE_10:
5141283b4a9bSStephen M. Cameron 		is_write = 1;
51425dfdb089SGustavo A. R. Silva 		/* fall through */
5143283b4a9bSStephen M. Cameron 	case READ_10:
5144283b4a9bSStephen M. Cameron 		first_block =
5145283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5146283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5147283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5148283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5149283b4a9bSStephen M. Cameron 		block_cnt =
5150283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 8) |
5151283b4a9bSStephen M. Cameron 			cmd->cmnd[8];
5152283b4a9bSStephen M. Cameron 		break;
5153283b4a9bSStephen M. Cameron 	case WRITE_12:
5154283b4a9bSStephen M. Cameron 		is_write = 1;
51555dfdb089SGustavo A. R. Silva 		/* fall through */
5156283b4a9bSStephen M. Cameron 	case READ_12:
5157283b4a9bSStephen M. Cameron 		first_block =
5158283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5159283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5160283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5161283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5162283b4a9bSStephen M. Cameron 		block_cnt =
5163283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[6]) << 24) |
5164283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 16) |
5165283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[8]) << 8) |
5166283b4a9bSStephen M. Cameron 		cmd->cmnd[9];
5167283b4a9bSStephen M. Cameron 		break;
5168283b4a9bSStephen M. Cameron 	case WRITE_16:
5169283b4a9bSStephen M. Cameron 		is_write = 1;
51705dfdb089SGustavo A. R. Silva 		/* fall through */
5171283b4a9bSStephen M. Cameron 	case READ_16:
5172283b4a9bSStephen M. Cameron 		first_block =
5173283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 56) |
5174283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 48) |
5175283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 40) |
5176283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[5]) << 32) |
5177283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[6]) << 24) |
5178283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[7]) << 16) |
5179283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[8]) << 8) |
5180283b4a9bSStephen M. Cameron 			cmd->cmnd[9];
5181283b4a9bSStephen M. Cameron 		block_cnt =
5182283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[10]) << 24) |
5183283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[11]) << 16) |
5184283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[12]) << 8) |
5185283b4a9bSStephen M. Cameron 			cmd->cmnd[13];
5186283b4a9bSStephen M. Cameron 		break;
5187283b4a9bSStephen M. Cameron 	default:
5188283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5189283b4a9bSStephen M. Cameron 	}
5190283b4a9bSStephen M. Cameron 	last_block = first_block + block_cnt - 1;
5191283b4a9bSStephen M. Cameron 
5192283b4a9bSStephen M. Cameron 	/* check for write to non-RAID-0 */
5193283b4a9bSStephen M. Cameron 	if (is_write && dev->raid_level != 0)
5194283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5195283b4a9bSStephen M. Cameron 
5196283b4a9bSStephen M. Cameron 	/* check for invalid block or wraparound */
51972b08b3e9SDon Brace 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
51982b08b3e9SDon Brace 		last_block < first_block)
5199283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5200283b4a9bSStephen M. Cameron 
5201283b4a9bSStephen M. Cameron 	/* calculate stripe information for the request */
52022b08b3e9SDon Brace 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
52032b08b3e9SDon Brace 				le16_to_cpu(map->strip_size);
52042b08b3e9SDon Brace 	strip_size = le16_to_cpu(map->strip_size);
5205283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5206283b4a9bSStephen M. Cameron 	tmpdiv = first_block;
5207283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5208283b4a9bSStephen M. Cameron 	first_row = tmpdiv;
5209283b4a9bSStephen M. Cameron 	tmpdiv = last_block;
5210283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5211283b4a9bSStephen M. Cameron 	last_row = tmpdiv;
5212283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5213283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5214283b4a9bSStephen M. Cameron 	tmpdiv = first_row_offset;
52152b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5216283b4a9bSStephen M. Cameron 	first_column = tmpdiv;
5217283b4a9bSStephen M. Cameron 	tmpdiv = last_row_offset;
52182b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5219283b4a9bSStephen M. Cameron 	last_column = tmpdiv;
5220283b4a9bSStephen M. Cameron #else
5221283b4a9bSStephen M. Cameron 	first_row = first_block / blocks_per_row;
5222283b4a9bSStephen M. Cameron 	last_row = last_block / blocks_per_row;
5223283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5224283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
52252b08b3e9SDon Brace 	first_column = first_row_offset / strip_size;
52262b08b3e9SDon Brace 	last_column = last_row_offset / strip_size;
5227283b4a9bSStephen M. Cameron #endif
5228283b4a9bSStephen M. Cameron 
5229283b4a9bSStephen M. Cameron 	/* if this isn't a single row/column then give to the controller */
5230283b4a9bSStephen M. Cameron 	if ((first_row != last_row) || (first_column != last_column))
5231283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5232283b4a9bSStephen M. Cameron 
5233283b4a9bSStephen M. Cameron 	/* proceeding with driver mapping */
52342b08b3e9SDon Brace 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
52352b08b3e9SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
5236283b4a9bSStephen M. Cameron 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
52372b08b3e9SDon Brace 				le16_to_cpu(map->row_cnt);
52386b80b18fSScott Teel 	map_index = (map_row * total_disks_per_row) + first_column;
52396b80b18fSScott Teel 
52406b80b18fSScott Teel 	switch (dev->raid_level) {
52416b80b18fSScott Teel 	case HPSA_RAID_0:
52426b80b18fSScott Teel 		break; /* nothing special to do */
52436b80b18fSScott Teel 	case HPSA_RAID_1:
52446b80b18fSScott Teel 		/* Handles load balance across RAID 1 members.
52456b80b18fSScott Teel 		 * (2-drive R1 and R10 with even # of drives.)
52466b80b18fSScott Teel 		 * Appropriate for SSDs, not optimal for HDDs
52473e16e83aSDon Brace 		 * Ensure we have the correct raid_map.
5248283b4a9bSStephen M. Cameron 		 */
52493e16e83aSDon Brace 		if (le16_to_cpu(map->layout_map_count) != 2) {
52503e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
52513e16e83aSDon Brace 			return IO_ACCEL_INELIGIBLE;
52523e16e83aSDon Brace 		}
5253283b4a9bSStephen M. Cameron 		if (dev->offload_to_mirror)
52542b08b3e9SDon Brace 			map_index += le16_to_cpu(map->data_disks_per_row);
5255283b4a9bSStephen M. Cameron 		dev->offload_to_mirror = !dev->offload_to_mirror;
52566b80b18fSScott Teel 		break;
52576b80b18fSScott Teel 	case HPSA_RAID_ADM:
52586b80b18fSScott Teel 		/* Handles N-way mirrors  (R1-ADM)
52596b80b18fSScott Teel 		 * and R10 with # of drives divisible by 3.)
52603e16e83aSDon Brace 		 * Ensure we have the correct raid_map.
52616b80b18fSScott Teel 		 */
52623e16e83aSDon Brace 		if (le16_to_cpu(map->layout_map_count) != 3) {
52633e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
52643e16e83aSDon Brace 			return IO_ACCEL_INELIGIBLE;
52653e16e83aSDon Brace 		}
52666b80b18fSScott Teel 
52676b80b18fSScott Teel 		offload_to_mirror = dev->offload_to_mirror;
52686b80b18fSScott Teel 		raid_map_helper(map, offload_to_mirror,
52696b80b18fSScott Teel 				&map_index, &current_group);
52706b80b18fSScott Teel 		/* set mirror group to use next time */
52716b80b18fSScott Teel 		offload_to_mirror =
52722b08b3e9SDon Brace 			(offload_to_mirror >=
52732b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count) - 1)
52746b80b18fSScott Teel 			? 0 : offload_to_mirror + 1;
52756b80b18fSScott Teel 		dev->offload_to_mirror = offload_to_mirror;
52766b80b18fSScott Teel 		/* Avoid direct use of dev->offload_to_mirror within this
52776b80b18fSScott Teel 		 * function since multiple threads might simultaneously
52786b80b18fSScott Teel 		 * increment it beyond the range of dev->layout_map_count -1.
52796b80b18fSScott Teel 		 */
52806b80b18fSScott Teel 		break;
52816b80b18fSScott Teel 	case HPSA_RAID_5:
52826b80b18fSScott Teel 	case HPSA_RAID_6:
52832b08b3e9SDon Brace 		if (le16_to_cpu(map->layout_map_count) <= 1)
52846b80b18fSScott Teel 			break;
52856b80b18fSScott Teel 
52866b80b18fSScott Teel 		/* Verify first and last block are in same RAID group */
52876b80b18fSScott Teel 		r5or6_blocks_per_row =
52882b08b3e9SDon Brace 			le16_to_cpu(map->strip_size) *
52892b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
52903e16e83aSDon Brace 		if (r5or6_blocks_per_row == 0) {
52913e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
52923e16e83aSDon Brace 			return IO_ACCEL_INELIGIBLE;
52933e16e83aSDon Brace 		}
52942b08b3e9SDon Brace 		stripesize = r5or6_blocks_per_row *
52952b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count);
52966b80b18fSScott Teel #if BITS_PER_LONG == 32
52976b80b18fSScott Teel 		tmpdiv = first_block;
52986b80b18fSScott Teel 		first_group = do_div(tmpdiv, stripesize);
52996b80b18fSScott Teel 		tmpdiv = first_group;
53006b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
53016b80b18fSScott Teel 		first_group = tmpdiv;
53026b80b18fSScott Teel 		tmpdiv = last_block;
53036b80b18fSScott Teel 		last_group = do_div(tmpdiv, stripesize);
53046b80b18fSScott Teel 		tmpdiv = last_group;
53056b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
53066b80b18fSScott Teel 		last_group = tmpdiv;
53076b80b18fSScott Teel #else
53086b80b18fSScott Teel 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
53096b80b18fSScott Teel 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
53106b80b18fSScott Teel #endif
5311000ff7c2SStephen M. Cameron 		if (first_group != last_group)
53126b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53136b80b18fSScott Teel 
53146b80b18fSScott Teel 		/* Verify request is in a single row of RAID 5/6 */
53156b80b18fSScott Teel #if BITS_PER_LONG == 32
53166b80b18fSScott Teel 		tmpdiv = first_block;
53176b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
53186b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
53196b80b18fSScott Teel 		tmpdiv = last_block;
53206b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
53216b80b18fSScott Teel 		r5or6_last_row = r0_last_row = tmpdiv;
53226b80b18fSScott Teel #else
53236b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row =
53246b80b18fSScott Teel 						first_block / stripesize;
53256b80b18fSScott Teel 		r5or6_last_row = r0_last_row = last_block / stripesize;
53266b80b18fSScott Teel #endif
53276b80b18fSScott Teel 		if (r5or6_first_row != r5or6_last_row)
53286b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53296b80b18fSScott Teel 
53306b80b18fSScott Teel 
53316b80b18fSScott Teel 		/* Verify request is in a single column */
53326b80b18fSScott Teel #if BITS_PER_LONG == 32
53336b80b18fSScott Teel 		tmpdiv = first_block;
53346b80b18fSScott Teel 		first_row_offset = do_div(tmpdiv, stripesize);
53356b80b18fSScott Teel 		tmpdiv = first_row_offset;
53366b80b18fSScott Teel 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
53376b80b18fSScott Teel 		r5or6_first_row_offset = first_row_offset;
53386b80b18fSScott Teel 		tmpdiv = last_block;
53396b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
53406b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
53416b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
53426b80b18fSScott Teel 		tmpdiv = r5or6_first_row_offset;
53436b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
53446b80b18fSScott Teel 		first_column = r5or6_first_column = tmpdiv;
53456b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
53466b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
53476b80b18fSScott Teel 		r5or6_last_column = tmpdiv;
53486b80b18fSScott Teel #else
53496b80b18fSScott Teel 		first_row_offset = r5or6_first_row_offset =
53506b80b18fSScott Teel 			(u32)((first_block % stripesize) %
53516b80b18fSScott Teel 						r5or6_blocks_per_row);
53526b80b18fSScott Teel 
53536b80b18fSScott Teel 		r5or6_last_row_offset =
53546b80b18fSScott Teel 			(u32)((last_block % stripesize) %
53556b80b18fSScott Teel 						r5or6_blocks_per_row);
53566b80b18fSScott Teel 
53576b80b18fSScott Teel 		first_column = r5or6_first_column =
53582b08b3e9SDon Brace 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
53596b80b18fSScott Teel 		r5or6_last_column =
53602b08b3e9SDon Brace 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
53616b80b18fSScott Teel #endif
53626b80b18fSScott Teel 		if (r5or6_first_column != r5or6_last_column)
53636b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53646b80b18fSScott Teel 
53656b80b18fSScott Teel 		/* Request is eligible */
53666b80b18fSScott Teel 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
53672b08b3e9SDon Brace 			le16_to_cpu(map->row_cnt);
53686b80b18fSScott Teel 
53696b80b18fSScott Teel 		map_index = (first_group *
53702b08b3e9SDon Brace 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
53716b80b18fSScott Teel 			(map_row * total_disks_per_row) + first_column;
53726b80b18fSScott Teel 		break;
53736b80b18fSScott Teel 	default:
53746b80b18fSScott Teel 		return IO_ACCEL_INELIGIBLE;
5375283b4a9bSStephen M. Cameron 	}
53766b80b18fSScott Teel 
537707543e0cSStephen Cameron 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
537807543e0cSStephen Cameron 		return IO_ACCEL_INELIGIBLE;
537907543e0cSStephen Cameron 
538003383736SDon Brace 	c->phys_disk = dev->phys_disk[map_index];
5381c3390df4SDon Brace 	if (!c->phys_disk)
5382c3390df4SDon Brace 		return IO_ACCEL_INELIGIBLE;
538303383736SDon Brace 
5384283b4a9bSStephen M. Cameron 	disk_handle = dd[map_index].ioaccel_handle;
53852b08b3e9SDon Brace 	disk_block = le64_to_cpu(map->disk_starting_blk) +
53862b08b3e9SDon Brace 			first_row * le16_to_cpu(map->strip_size) +
53872b08b3e9SDon Brace 			(first_row_offset - first_column *
53882b08b3e9SDon Brace 			le16_to_cpu(map->strip_size));
5389283b4a9bSStephen M. Cameron 	disk_block_cnt = block_cnt;
5390283b4a9bSStephen M. Cameron 
5391283b4a9bSStephen M. Cameron 	/* handle differing logical/physical block sizes */
5392283b4a9bSStephen M. Cameron 	if (map->phys_blk_shift) {
5393283b4a9bSStephen M. Cameron 		disk_block <<= map->phys_blk_shift;
5394283b4a9bSStephen M. Cameron 		disk_block_cnt <<= map->phys_blk_shift;
5395283b4a9bSStephen M. Cameron 	}
5396283b4a9bSStephen M. Cameron 	BUG_ON(disk_block_cnt > 0xffff);
5397283b4a9bSStephen M. Cameron 
5398283b4a9bSStephen M. Cameron 	/* build the new CDB for the physical disk I/O */
5399283b4a9bSStephen M. Cameron 	if (disk_block > 0xffffffff) {
5400283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_16 : READ_16;
5401283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5402283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 56);
5403283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 48);
5404283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 40);
5405283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block >> 32);
5406283b4a9bSStephen M. Cameron 		cdb[6] = (u8) (disk_block >> 24);
5407283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block >> 16);
5408283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block >> 8);
5409283b4a9bSStephen M. Cameron 		cdb[9] = (u8) (disk_block);
5410283b4a9bSStephen M. Cameron 		cdb[10] = (u8) (disk_block_cnt >> 24);
5411283b4a9bSStephen M. Cameron 		cdb[11] = (u8) (disk_block_cnt >> 16);
5412283b4a9bSStephen M. Cameron 		cdb[12] = (u8) (disk_block_cnt >> 8);
5413283b4a9bSStephen M. Cameron 		cdb[13] = (u8) (disk_block_cnt);
5414283b4a9bSStephen M. Cameron 		cdb[14] = 0;
5415283b4a9bSStephen M. Cameron 		cdb[15] = 0;
5416283b4a9bSStephen M. Cameron 		cdb_len = 16;
5417283b4a9bSStephen M. Cameron 	} else {
5418283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
5419283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5420283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 24);
5421283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 16);
5422283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 8);
5423283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block);
5424283b4a9bSStephen M. Cameron 		cdb[6] = 0;
5425283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block_cnt >> 8);
5426283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block_cnt);
5427283b4a9bSStephen M. Cameron 		cdb[9] = 0;
5428283b4a9bSStephen M. Cameron 		cdb_len = 10;
5429283b4a9bSStephen M. Cameron 	}
5430283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
543103383736SDon Brace 						dev->scsi3addr,
543203383736SDon Brace 						dev->phys_disk[map_index]);
5433283b4a9bSStephen M. Cameron }
5434283b4a9bSStephen M. Cameron 
543525163bd5SWebb Scales /*
543625163bd5SWebb Scales  * Submit commands down the "normal" RAID stack path
543725163bd5SWebb Scales  * All callers to hpsa_ciss_submit must check lockup_detected
543825163bd5SWebb Scales  * beforehand, before (opt.) and after calling cmd_alloc
543925163bd5SWebb Scales  */
5440574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h,
5441574f05d3SStephen Cameron 	struct CommandList *c, struct scsi_cmnd *cmd,
5442c5dfd106SDon Brace 	struct hpsa_scsi_dev_t *dev)
5443edd16368SStephen M. Cameron {
5444edd16368SStephen M. Cameron 	cmd->host_scribble = (unsigned char *) c;
5445edd16368SStephen M. Cameron 	c->cmd_type = CMD_SCSI;
5446edd16368SStephen M. Cameron 	c->scsi_cmd = cmd;
5447edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5448c5dfd106SDon Brace 	memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5449f2405db8SDon Brace 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5450edd16368SStephen M. Cameron 
5451edd16368SStephen M. Cameron 	/* Fill in the request block... */
5452edd16368SStephen M. Cameron 
5453edd16368SStephen M. Cameron 	c->Request.Timeout = 0;
5454edd16368SStephen M. Cameron 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5455edd16368SStephen M. Cameron 	c->Request.CDBLen = cmd->cmd_len;
5456edd16368SStephen M. Cameron 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5457edd16368SStephen M. Cameron 	switch (cmd->sc_data_direction) {
5458edd16368SStephen M. Cameron 	case DMA_TO_DEVICE:
5459a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5460a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5461edd16368SStephen M. Cameron 		break;
5462edd16368SStephen M. Cameron 	case DMA_FROM_DEVICE:
5463a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5464a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5465edd16368SStephen M. Cameron 		break;
5466edd16368SStephen M. Cameron 	case DMA_NONE:
5467a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5468a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5469edd16368SStephen M. Cameron 		break;
5470edd16368SStephen M. Cameron 	case DMA_BIDIRECTIONAL:
5471edd16368SStephen M. Cameron 		/* This can happen if a buggy application does a scsi passthru
5472edd16368SStephen M. Cameron 		 * and sets both inlen and outlen to non-zero. ( see
5473edd16368SStephen M. Cameron 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5474edd16368SStephen M. Cameron 		 */
5475edd16368SStephen M. Cameron 
5476a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5477a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5478edd16368SStephen M. Cameron 		/* This is technically wrong, and hpsa controllers should
5479edd16368SStephen M. Cameron 		 * reject it with CMD_INVALID, which is the most correct
5480edd16368SStephen M. Cameron 		 * response, but non-fibre backends appear to let it
5481edd16368SStephen M. Cameron 		 * slide by, and give the same results as if this field
5482edd16368SStephen M. Cameron 		 * were set correctly.  Either way is acceptable for
5483edd16368SStephen M. Cameron 		 * our purposes here.
5484edd16368SStephen M. Cameron 		 */
5485edd16368SStephen M. Cameron 
5486edd16368SStephen M. Cameron 		break;
5487edd16368SStephen M. Cameron 
5488edd16368SStephen M. Cameron 	default:
5489edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5490edd16368SStephen M. Cameron 			cmd->sc_data_direction);
5491edd16368SStephen M. Cameron 		BUG();
5492edd16368SStephen M. Cameron 		break;
5493edd16368SStephen M. Cameron 	}
5494edd16368SStephen M. Cameron 
549533a2ffceSStephen M. Cameron 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
549673153fe5SWebb Scales 		hpsa_cmd_resolve_and_free(h, c);
5497edd16368SStephen M. Cameron 		return SCSI_MLQUEUE_HOST_BUSY;
5498edd16368SStephen M. Cameron 	}
5499c5dfd106SDon Brace 
5500c5dfd106SDon Brace 	if (dev->in_reset) {
5501c5dfd106SDon Brace 		hpsa_cmd_resolve_and_free(h, c);
5502c5dfd106SDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
5503c5dfd106SDon Brace 	}
5504c5dfd106SDon Brace 
550513499345SDon Brace 	c->device = dev;
550613499345SDon Brace 
5507edd16368SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
5508edd16368SStephen M. Cameron 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5509edd16368SStephen M. Cameron 	return 0;
5510edd16368SStephen M. Cameron }
5511edd16368SStephen M. Cameron 
5512360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index,
5513360c73bdSStephen Cameron 				struct CommandList *c)
5514360c73bdSStephen Cameron {
5515360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle, err_dma_handle;
5516360c73bdSStephen Cameron 
5517360c73bdSStephen Cameron 	/* Zero out all of commandlist except the last field, refcount */
5518360c73bdSStephen Cameron 	memset(c, 0, offsetof(struct CommandList, refcount));
5519360c73bdSStephen Cameron 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5520360c73bdSStephen Cameron 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5521360c73bdSStephen Cameron 	c->err_info = h->errinfo_pool + index;
5522360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5523360c73bdSStephen Cameron 	err_dma_handle = h->errinfo_pool_dhandle
5524360c73bdSStephen Cameron 	    + index * sizeof(*c->err_info);
5525360c73bdSStephen Cameron 	c->cmdindex = index;
5526360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5527360c73bdSStephen Cameron 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5528360c73bdSStephen Cameron 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5529360c73bdSStephen Cameron 	c->h = h;
5530a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
5531360c73bdSStephen Cameron }
5532360c73bdSStephen Cameron 
5533360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h)
5534360c73bdSStephen Cameron {
5535360c73bdSStephen Cameron 	int i;
5536360c73bdSStephen Cameron 
5537360c73bdSStephen Cameron 	for (i = 0; i < h->nr_cmds; i++) {
5538360c73bdSStephen Cameron 		struct CommandList *c = h->cmd_pool + i;
5539360c73bdSStephen Cameron 
5540360c73bdSStephen Cameron 		hpsa_cmd_init(h, i, c);
5541360c73bdSStephen Cameron 		atomic_set(&c->refcount, 0);
5542360c73bdSStephen Cameron 	}
5543360c73bdSStephen Cameron }
5544360c73bdSStephen Cameron 
5545360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5546360c73bdSStephen Cameron 				struct CommandList *c)
5547360c73bdSStephen Cameron {
5548360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5549360c73bdSStephen Cameron 
555073153fe5SWebb Scales 	BUG_ON(c->cmdindex != index);
555173153fe5SWebb Scales 
5552360c73bdSStephen Cameron 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5553360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5554360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5555360c73bdSStephen Cameron }
5556360c73bdSStephen Cameron 
5557592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h,
5558c5dfd106SDon Brace 		struct CommandList *c, struct scsi_cmnd *cmd)
5559592a0ad5SWebb Scales {
5560592a0ad5SWebb Scales 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5561592a0ad5SWebb Scales 	int rc = IO_ACCEL_INELIGIBLE;
5562592a0ad5SWebb Scales 
556345e596cdSDon Brace 	if (!dev)
556445e596cdSDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
556545e596cdSDon Brace 
5566c5dfd106SDon Brace 	if (dev->in_reset)
5567c5dfd106SDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
5568c5dfd106SDon Brace 
5569a68fdb3aSDon Brace 	if (hpsa_simple_mode)
5570a68fdb3aSDon Brace 		return IO_ACCEL_INELIGIBLE;
5571a68fdb3aSDon Brace 
5572592a0ad5SWebb Scales 	cmd->host_scribble = (unsigned char *) c;
5573592a0ad5SWebb Scales 
5574592a0ad5SWebb Scales 	if (dev->offload_enabled) {
5575592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5576592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5577592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
557813499345SDon Brace 		c->device = dev;
5579592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5580592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5581592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5582a3144e0bSJoe Handzik 	} else if (dev->hba_ioaccel_enabled) {
5583592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5584592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5585592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
558613499345SDon Brace 		c->device = dev;
5587592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5588592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5589592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5590592a0ad5SWebb Scales 	}
5591592a0ad5SWebb Scales 	return rc;
5592592a0ad5SWebb Scales }
5593592a0ad5SWebb Scales 
5594080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work)
5595080ef1ccSDon Brace {
5596080ef1ccSDon Brace 	struct scsi_cmnd *cmd;
5597080ef1ccSDon Brace 	struct hpsa_scsi_dev_t *dev;
55988a0ff92cSWebb Scales 	struct CommandList *c = container_of(work, struct CommandList, work);
5599080ef1ccSDon Brace 
5600080ef1ccSDon Brace 	cmd = c->scsi_cmd;
5601080ef1ccSDon Brace 	dev = cmd->device->hostdata;
5602080ef1ccSDon Brace 	if (!dev) {
5603080ef1ccSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
56048a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5605080ef1ccSDon Brace 	}
5606c5dfd106SDon Brace 
5607c5dfd106SDon Brace 	if (dev->in_reset) {
5608c5dfd106SDon Brace 		cmd->result = DID_RESET << 16;
5609d2315ce6SDon Brace 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5610c5dfd106SDon Brace 	}
5611c5dfd106SDon Brace 
5612592a0ad5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2) {
5613592a0ad5SWebb Scales 		struct ctlr_info *h = c->h;
5614592a0ad5SWebb Scales 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5615592a0ad5SWebb Scales 		int rc;
5616592a0ad5SWebb Scales 
5617592a0ad5SWebb Scales 		if (c2->error_data.serv_response ==
5618592a0ad5SWebb Scales 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5619c5dfd106SDon Brace 			rc = hpsa_ioaccel_submit(h, c, cmd);
5620592a0ad5SWebb Scales 			if (rc == 0)
5621592a0ad5SWebb Scales 				return;
5622592a0ad5SWebb Scales 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5623592a0ad5SWebb Scales 				/*
5624592a0ad5SWebb Scales 				 * If we get here, it means dma mapping failed.
5625592a0ad5SWebb Scales 				 * Try again via scsi mid layer, which will
5626592a0ad5SWebb Scales 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5627592a0ad5SWebb Scales 				 */
5628592a0ad5SWebb Scales 				cmd->result = DID_IMM_RETRY << 16;
56298a0ff92cSWebb Scales 				return hpsa_cmd_free_and_done(h, c, cmd);
5630592a0ad5SWebb Scales 			}
5631592a0ad5SWebb Scales 			/* else, fall thru and resubmit down CISS path */
5632592a0ad5SWebb Scales 		}
5633592a0ad5SWebb Scales 	}
5634360c73bdSStephen Cameron 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5635c5dfd106SDon Brace 	if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5636080ef1ccSDon Brace 		/*
5637080ef1ccSDon Brace 		 * If we get here, it means dma mapping failed. Try
5638080ef1ccSDon Brace 		 * again via scsi mid layer, which will then get
5639080ef1ccSDon Brace 		 * SCSI_MLQUEUE_HOST_BUSY.
5640592a0ad5SWebb Scales 		 *
5641592a0ad5SWebb Scales 		 * hpsa_ciss_submit will have already freed c
5642592a0ad5SWebb Scales 		 * if it encountered a dma mapping failure.
5643080ef1ccSDon Brace 		 */
5644080ef1ccSDon Brace 		cmd->result = DID_IMM_RETRY << 16;
5645080ef1ccSDon Brace 		cmd->scsi_done(cmd);
5646080ef1ccSDon Brace 	}
5647080ef1ccSDon Brace }
5648080ef1ccSDon Brace 
5649574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */
5650574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5651574f05d3SStephen Cameron {
5652574f05d3SStephen Cameron 	struct ctlr_info *h;
5653574f05d3SStephen Cameron 	struct hpsa_scsi_dev_t *dev;
5654574f05d3SStephen Cameron 	struct CommandList *c;
5655574f05d3SStephen Cameron 	int rc = 0;
5656574f05d3SStephen Cameron 
5657574f05d3SStephen Cameron 	/* Get the ptr to our adapter structure out of cmd->host. */
5658574f05d3SStephen Cameron 	h = sdev_to_hba(cmd->device);
565973153fe5SWebb Scales 
566073153fe5SWebb Scales 	BUG_ON(cmd->request->tag < 0);
566173153fe5SWebb Scales 
5662574f05d3SStephen Cameron 	dev = cmd->device->hostdata;
5663574f05d3SStephen Cameron 	if (!dev) {
56641ccde700SHannes Reinecke 		cmd->result = DID_NO_CONNECT << 16;
5665ba74fdc4SDon Brace 		cmd->scsi_done(cmd);
5666ba74fdc4SDon Brace 		return 0;
5667ba74fdc4SDon Brace 	}
5668ba74fdc4SDon Brace 
5669ba74fdc4SDon Brace 	if (dev->removed) {
5670574f05d3SStephen Cameron 		cmd->result = DID_NO_CONNECT << 16;
5671574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5672574f05d3SStephen Cameron 		return 0;
5673574f05d3SStephen Cameron 	}
567473153fe5SWebb Scales 
5675574f05d3SStephen Cameron 	if (unlikely(lockup_detected(h))) {
567625163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
5677574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5678574f05d3SStephen Cameron 		return 0;
5679574f05d3SStephen Cameron 	}
5680c5dfd106SDon Brace 
5681c5dfd106SDon Brace 	if (dev->in_reset)
5682c5dfd106SDon Brace 		return SCSI_MLQUEUE_DEVICE_BUSY;
5683c5dfd106SDon Brace 
568473153fe5SWebb Scales 	c = cmd_tagged_alloc(h, cmd);
56854770e68dSDon Brace 	if (c == NULL)
56864770e68dSDon Brace 		return SCSI_MLQUEUE_DEVICE_BUSY;
5687574f05d3SStephen Cameron 
5688407863cbSStephen Cameron 	/*
5689eeebce18SDon Brace 	 * This is necessary because the SML doesn't zero out this field during
5690eeebce18SDon Brace 	 * error recovery.
5691eeebce18SDon Brace 	 */
5692eeebce18SDon Brace 	cmd->result = 0;
5693eeebce18SDon Brace 
5694eeebce18SDon Brace 	/*
5695407863cbSStephen Cameron 	 * Call alternate submit routine for I/O accelerated commands.
5696574f05d3SStephen Cameron 	 * Retries always go down the normal I/O path.
5697574f05d3SStephen Cameron 	 */
5698574f05d3SStephen Cameron 	if (likely(cmd->retries == 0 &&
569957292b58SChristoph Hellwig 			!blk_rq_is_passthrough(cmd->request) &&
5700574f05d3SStephen Cameron 			h->acciopath_status)) {
5701c5dfd106SDon Brace 		rc = hpsa_ioaccel_submit(h, c, cmd);
5702574f05d3SStephen Cameron 		if (rc == 0)
5703592a0ad5SWebb Scales 			return 0;
5704592a0ad5SWebb Scales 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
570573153fe5SWebb Scales 			hpsa_cmd_resolve_and_free(h, c);
5706574f05d3SStephen Cameron 			return SCSI_MLQUEUE_HOST_BUSY;
5707574f05d3SStephen Cameron 		}
5708574f05d3SStephen Cameron 	}
5709c5dfd106SDon Brace 	return hpsa_ciss_submit(h, c, cmd, dev);
5710574f05d3SStephen Cameron }
5711574f05d3SStephen Cameron 
57128ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h)
57135f389360SStephen M. Cameron {
57145f389360SStephen M. Cameron 	unsigned long flags;
57155f389360SStephen M. Cameron 
57165f389360SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
57175f389360SStephen M. Cameron 	h->scan_finished = 1;
571887b9e6aaSDon Brace 	wake_up(&h->scan_wait_queue);
57195f389360SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
57205f389360SStephen M. Cameron }
57215f389360SStephen M. Cameron 
5722a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh)
5723a08a8471SStephen M. Cameron {
5724a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5725a08a8471SStephen M. Cameron 	unsigned long flags;
5726a08a8471SStephen M. Cameron 
57278ebc9248SWebb Scales 	/*
57288ebc9248SWebb Scales 	 * Don't let rescans be initiated on a controller known to be locked
57298ebc9248SWebb Scales 	 * up.  If the controller locks up *during* a rescan, that thread is
57308ebc9248SWebb Scales 	 * probably hosed, but at least we can prevent new rescan threads from
57318ebc9248SWebb Scales 	 * piling up on a locked up controller.
57328ebc9248SWebb Scales 	 */
57338ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
57348ebc9248SWebb Scales 		return hpsa_scan_complete(h);
57355f389360SStephen M. Cameron 
573687b9e6aaSDon Brace 	/*
573787b9e6aaSDon Brace 	 * If a scan is already waiting to run, no need to add another
573887b9e6aaSDon Brace 	 */
573987b9e6aaSDon Brace 	spin_lock_irqsave(&h->scan_lock, flags);
574087b9e6aaSDon Brace 	if (h->scan_waiting) {
574187b9e6aaSDon Brace 		spin_unlock_irqrestore(&h->scan_lock, flags);
574287b9e6aaSDon Brace 		return;
574387b9e6aaSDon Brace 	}
574487b9e6aaSDon Brace 
574587b9e6aaSDon Brace 	spin_unlock_irqrestore(&h->scan_lock, flags);
574687b9e6aaSDon Brace 
5747a08a8471SStephen M. Cameron 	/* wait until any scan already in progress is finished. */
5748a08a8471SStephen M. Cameron 	while (1) {
5749a08a8471SStephen M. Cameron 		spin_lock_irqsave(&h->scan_lock, flags);
5750a08a8471SStephen M. Cameron 		if (h->scan_finished)
5751a08a8471SStephen M. Cameron 			break;
575287b9e6aaSDon Brace 		h->scan_waiting = 1;
5753a08a8471SStephen M. Cameron 		spin_unlock_irqrestore(&h->scan_lock, flags);
5754a08a8471SStephen M. Cameron 		wait_event(h->scan_wait_queue, h->scan_finished);
5755a08a8471SStephen M. Cameron 		/* Note: We don't need to worry about a race between this
5756a08a8471SStephen M. Cameron 		 * thread and driver unload because the midlayer will
5757a08a8471SStephen M. Cameron 		 * have incremented the reference count, so unload won't
5758a08a8471SStephen M. Cameron 		 * happen if we're in here.
5759a08a8471SStephen M. Cameron 		 */
5760a08a8471SStephen M. Cameron 	}
5761a08a8471SStephen M. Cameron 	h->scan_finished = 0; /* mark scan as in progress */
576287b9e6aaSDon Brace 	h->scan_waiting = 0;
5763a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5764a08a8471SStephen M. Cameron 
57658ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
57668ebc9248SWebb Scales 		return hpsa_scan_complete(h);
57675f389360SStephen M. Cameron 
5768bfd7546cSDon Brace 	/*
5769bfd7546cSDon Brace 	 * Do the scan after a reset completion
5770bfd7546cSDon Brace 	 */
5771c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
5772bfd7546cSDon Brace 	if (h->reset_in_progress) {
5773bfd7546cSDon Brace 		h->drv_req_rescan = 1;
5774c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
57753b476aa2SDon Brace 		hpsa_scan_complete(h);
5776bfd7546cSDon Brace 		return;
5777bfd7546cSDon Brace 	}
5778c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
5779bfd7546cSDon Brace 
57808aa60681SDon Brace 	hpsa_update_scsi_devices(h);
5781a08a8471SStephen M. Cameron 
57828ebc9248SWebb Scales 	hpsa_scan_complete(h);
5783a08a8471SStephen M. Cameron }
5784a08a8471SStephen M. Cameron 
57857c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
57867c0a0229SDon Brace {
578703383736SDon Brace 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
578803383736SDon Brace 
578903383736SDon Brace 	if (!logical_drive)
579003383736SDon Brace 		return -ENODEV;
57917c0a0229SDon Brace 
57927c0a0229SDon Brace 	if (qdepth < 1)
57937c0a0229SDon Brace 		qdepth = 1;
579403383736SDon Brace 	else if (qdepth > logical_drive->queue_depth)
579503383736SDon Brace 		qdepth = logical_drive->queue_depth;
579603383736SDon Brace 
579703383736SDon Brace 	return scsi_change_queue_depth(sdev, qdepth);
57987c0a0229SDon Brace }
57997c0a0229SDon Brace 
5800a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
5801a08a8471SStephen M. Cameron 	unsigned long elapsed_time)
5802a08a8471SStephen M. Cameron {
5803a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5804a08a8471SStephen M. Cameron 	unsigned long flags;
5805a08a8471SStephen M. Cameron 	int finished;
5806a08a8471SStephen M. Cameron 
5807a08a8471SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
5808a08a8471SStephen M. Cameron 	finished = h->scan_finished;
5809a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5810a08a8471SStephen M. Cameron 	return finished;
5811a08a8471SStephen M. Cameron }
5812a08a8471SStephen M. Cameron 
58132946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5814edd16368SStephen M. Cameron {
5815b705690dSStephen M. Cameron 	struct Scsi_Host *sh;
5816edd16368SStephen M. Cameron 
5817b705690dSStephen M. Cameron 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
58182946e82bSRobert Elliott 	if (sh == NULL) {
58192946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
58202946e82bSRobert Elliott 		return -ENOMEM;
58212946e82bSRobert Elliott 	}
5822b705690dSStephen M. Cameron 
5823b705690dSStephen M. Cameron 	sh->io_port = 0;
5824b705690dSStephen M. Cameron 	sh->n_io_port = 0;
5825b705690dSStephen M. Cameron 	sh->this_id = -1;
5826b705690dSStephen M. Cameron 	sh->max_channel = 3;
5827b705690dSStephen M. Cameron 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5828b705690dSStephen M. Cameron 	sh->max_lun = HPSA_MAX_LUN;
5829b705690dSStephen M. Cameron 	sh->max_id = HPSA_MAX_LUN;
583041ce4c35SStephen Cameron 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5831d54c5c24SStephen Cameron 	sh->cmd_per_lun = sh->can_queue;
5832b705690dSStephen M. Cameron 	sh->sg_tablesize = h->maxsgentries;
5833d04e62b9SKevin Barnett 	sh->transportt = hpsa_sas_transport_template;
5834b705690dSStephen M. Cameron 	sh->hostdata[0] = (unsigned long) h;
5835bc2bb154SChristoph Hellwig 	sh->irq = pci_irq_vector(h->pdev, 0);
5836b705690dSStephen M. Cameron 	sh->unique_id = sh->irq;
583764d513acSChristoph Hellwig 
58382946e82bSRobert Elliott 	h->scsi_host = sh;
58392946e82bSRobert Elliott 	return 0;
58402946e82bSRobert Elliott }
58412946e82bSRobert Elliott 
58422946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h)
58432946e82bSRobert Elliott {
58442946e82bSRobert Elliott 	int rv;
58452946e82bSRobert Elliott 
58462946e82bSRobert Elliott 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
58472946e82bSRobert Elliott 	if (rv) {
58482946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
58492946e82bSRobert Elliott 		return rv;
58502946e82bSRobert Elliott 	}
58512946e82bSRobert Elliott 	scsi_scan_host(h->scsi_host);
58522946e82bSRobert Elliott 	return 0;
5853edd16368SStephen M. Cameron }
5854edd16368SStephen M. Cameron 
5855b69324ffSWebb Scales /*
585673153fe5SWebb Scales  * The block layer has already gone to the trouble of picking out a unique,
585773153fe5SWebb Scales  * small-integer tag for this request.  We use an offset from that value as
585873153fe5SWebb Scales  * an index to select our command block.  (The offset allows us to reserve the
585973153fe5SWebb Scales  * low-numbered entries for our own uses.)
586073153fe5SWebb Scales  */
586173153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
586273153fe5SWebb Scales {
586373153fe5SWebb Scales 	int idx = scmd->request->tag;
586473153fe5SWebb Scales 
586573153fe5SWebb Scales 	if (idx < 0)
586673153fe5SWebb Scales 		return idx;
586773153fe5SWebb Scales 
586873153fe5SWebb Scales 	/* Offset to leave space for internal cmds. */
586973153fe5SWebb Scales 	return idx += HPSA_NRESERVED_CMDS;
587073153fe5SWebb Scales }
587173153fe5SWebb Scales 
587273153fe5SWebb Scales /*
5873b69324ffSWebb Scales  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5874b69324ffSWebb Scales  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5875b69324ffSWebb Scales  */
5876b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5877b69324ffSWebb Scales 				struct CommandList *c, unsigned char lunaddr[],
5878b69324ffSWebb Scales 				int reply_queue)
5879edd16368SStephen M. Cameron {
58808919358eSTomas Henzl 	int rc;
5881edd16368SStephen M. Cameron 
5882a2dac136SStephen M. Cameron 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5883a2dac136SStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5884a2dac136SStephen M. Cameron 			NULL, 0, 0, lunaddr, TYPE_CMD);
58851edb6934SDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
588625163bd5SWebb Scales 	if (rc)
5887b69324ffSWebb Scales 		return rc;
5888edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
5889edd16368SStephen M. Cameron 
5890b69324ffSWebb Scales 	/* Check if the unit is already ready. */
5891edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5892b69324ffSWebb Scales 		return 0;
5893edd16368SStephen M. Cameron 
5894b69324ffSWebb Scales 	/*
5895b69324ffSWebb Scales 	 * The first command sent after reset will receive "unit attention" to
5896b69324ffSWebb Scales 	 * indicate that the LUN has been reset...this is actually what we're
5897b69324ffSWebb Scales 	 * looking for (but, success is good too).
5898b69324ffSWebb Scales 	 */
5899edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5900edd16368SStephen M. Cameron 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5901edd16368SStephen M. Cameron 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5902edd16368SStephen M. Cameron 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5903b69324ffSWebb Scales 		return 0;
5904b69324ffSWebb Scales 
5905b69324ffSWebb Scales 	return 1;
5906b69324ffSWebb Scales }
5907b69324ffSWebb Scales 
5908b69324ffSWebb Scales /*
5909b69324ffSWebb Scales  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5910b69324ffSWebb Scales  * returns zero when the unit is ready, and non-zero when giving up.
5911b69324ffSWebb Scales  */
5912b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5913b69324ffSWebb Scales 				struct CommandList *c,
5914b69324ffSWebb Scales 				unsigned char lunaddr[], int reply_queue)
5915b69324ffSWebb Scales {
5916b69324ffSWebb Scales 	int rc;
5917b69324ffSWebb Scales 	int count = 0;
5918b69324ffSWebb Scales 	int waittime = 1; /* seconds */
5919b69324ffSWebb Scales 
5920b69324ffSWebb Scales 	/* Send test unit ready until device ready, or give up. */
5921b69324ffSWebb Scales 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5922b69324ffSWebb Scales 
5923b69324ffSWebb Scales 		/*
5924b69324ffSWebb Scales 		 * Wait for a bit.  do this first, because if we send
5925b69324ffSWebb Scales 		 * the TUR right away, the reset will just abort it.
5926b69324ffSWebb Scales 		 */
5927b69324ffSWebb Scales 		msleep(1000 * waittime);
5928b69324ffSWebb Scales 
5929b69324ffSWebb Scales 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5930b69324ffSWebb Scales 		if (!rc)
5931edd16368SStephen M. Cameron 			break;
5932b69324ffSWebb Scales 
5933b69324ffSWebb Scales 		/* Increase wait time with each try, up to a point. */
5934b69324ffSWebb Scales 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5935b69324ffSWebb Scales 			waittime *= 2;
5936b69324ffSWebb Scales 
5937b69324ffSWebb Scales 		dev_warn(&h->pdev->dev,
5938b69324ffSWebb Scales 			 "waiting %d secs for device to become ready.\n",
5939b69324ffSWebb Scales 			 waittime);
5940b69324ffSWebb Scales 	}
5941b69324ffSWebb Scales 
5942b69324ffSWebb Scales 	return rc;
5943b69324ffSWebb Scales }
5944b69324ffSWebb Scales 
5945b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h,
5946b69324ffSWebb Scales 					   unsigned char lunaddr[],
5947b69324ffSWebb Scales 					   int reply_queue)
5948b69324ffSWebb Scales {
5949b69324ffSWebb Scales 	int first_queue;
5950b69324ffSWebb Scales 	int last_queue;
5951b69324ffSWebb Scales 	int rq;
5952b69324ffSWebb Scales 	int rc = 0;
5953b69324ffSWebb Scales 	struct CommandList *c;
5954b69324ffSWebb Scales 
5955b69324ffSWebb Scales 	c = cmd_alloc(h);
5956b69324ffSWebb Scales 
5957b69324ffSWebb Scales 	/*
5958b69324ffSWebb Scales 	 * If no specific reply queue was requested, then send the TUR
5959b69324ffSWebb Scales 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5960b69324ffSWebb Scales 	 * the loop exactly once using only the specified queue.
5961b69324ffSWebb Scales 	 */
5962b69324ffSWebb Scales 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5963b69324ffSWebb Scales 		first_queue = 0;
5964b69324ffSWebb Scales 		last_queue = h->nreply_queues - 1;
5965b69324ffSWebb Scales 	} else {
5966b69324ffSWebb Scales 		first_queue = reply_queue;
5967b69324ffSWebb Scales 		last_queue = reply_queue;
5968b69324ffSWebb Scales 	}
5969b69324ffSWebb Scales 
5970b69324ffSWebb Scales 	for (rq = first_queue; rq <= last_queue; rq++) {
5971b69324ffSWebb Scales 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5972b69324ffSWebb Scales 		if (rc)
5973b69324ffSWebb Scales 			break;
5974edd16368SStephen M. Cameron 	}
5975edd16368SStephen M. Cameron 
5976edd16368SStephen M. Cameron 	if (rc)
5977edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "giving up on device.\n");
5978edd16368SStephen M. Cameron 	else
5979edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "device is ready.\n");
5980edd16368SStephen M. Cameron 
598145fcb86eSStephen Cameron 	cmd_free(h, c);
5982edd16368SStephen M. Cameron 	return rc;
5983edd16368SStephen M. Cameron }
5984edd16368SStephen M. Cameron 
5985edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5986edd16368SStephen M. Cameron  * complaining.  Doing a host- or bus-reset can't do anything good here.
5987edd16368SStephen M. Cameron  */
5988edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5989edd16368SStephen M. Cameron {
5990c59d04f3SDon Brace 	int rc = SUCCESS;
5991c5dfd106SDon Brace 	int i;
5992edd16368SStephen M. Cameron 	struct ctlr_info *h;
599336631157SColin Ian King 	struct hpsa_scsi_dev_t *dev = NULL;
59940b9b7b6eSScott Teel 	u8 reset_type;
59952dc127bbSDan Carpenter 	char msg[48];
5996c59d04f3SDon Brace 	unsigned long flags;
5997edd16368SStephen M. Cameron 
5998edd16368SStephen M. Cameron 	/* find the controller to which the command to be aborted was sent */
5999edd16368SStephen M. Cameron 	h = sdev_to_hba(scsicmd->device);
6000edd16368SStephen M. Cameron 	if (h == NULL) /* paranoia */
6001edd16368SStephen M. Cameron 		return FAILED;
6002e345893bSDon Brace 
6003c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
6004c59d04f3SDon Brace 	h->reset_in_progress = 1;
6005c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
6006c59d04f3SDon Brace 
6007c59d04f3SDon Brace 	if (lockup_detected(h)) {
6008c59d04f3SDon Brace 		rc = FAILED;
6009c59d04f3SDon Brace 		goto return_reset_status;
6010c59d04f3SDon Brace 	}
6011e345893bSDon Brace 
6012edd16368SStephen M. Cameron 	dev = scsicmd->device->hostdata;
6013edd16368SStephen M. Cameron 	if (!dev) {
6014d604f533SWebb Scales 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6015c59d04f3SDon Brace 		rc = FAILED;
6016c59d04f3SDon Brace 		goto return_reset_status;
6017edd16368SStephen M. Cameron 	}
601825163bd5SWebb Scales 
6019c59d04f3SDon Brace 	if (dev->devtype == TYPE_ENCLOSURE) {
6020c59d04f3SDon Brace 		rc = SUCCESS;
6021c59d04f3SDon Brace 		goto return_reset_status;
6022c59d04f3SDon Brace 	}
6023ef8a5203SDon Brace 
602425163bd5SWebb Scales 	/* if controller locked up, we can guarantee command won't complete */
602525163bd5SWebb Scales 	if (lockup_detected(h)) {
60262dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
60272dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, lockup detected",
602873153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
602973153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6030c59d04f3SDon Brace 		rc = FAILED;
6031c59d04f3SDon Brace 		goto return_reset_status;
603225163bd5SWebb Scales 	}
603325163bd5SWebb Scales 
603425163bd5SWebb Scales 	/* this reset request might be the result of a lockup; check */
603525163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
60362dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
60372dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, new lockup detected",
603873153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
603973153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6040c59d04f3SDon Brace 		rc = FAILED;
6041c59d04f3SDon Brace 		goto return_reset_status;
604225163bd5SWebb Scales 	}
604325163bd5SWebb Scales 
6044d604f533SWebb Scales 	/* Do not attempt on controller */
6045c59d04f3SDon Brace 	if (is_hba_lunid(dev->scsi3addr)) {
6046c59d04f3SDon Brace 		rc = SUCCESS;
6047c59d04f3SDon Brace 		goto return_reset_status;
6048c59d04f3SDon Brace 	}
6049d604f533SWebb Scales 
60500b9b7b6eSScott Teel 	if (is_logical_dev_addr_mode(dev->scsi3addr))
60510b9b7b6eSScott Teel 		reset_type = HPSA_DEVICE_RESET_MSG;
60520b9b7b6eSScott Teel 	else
60530b9b7b6eSScott Teel 		reset_type = HPSA_PHYS_TARGET_RESET;
60540b9b7b6eSScott Teel 
60550b9b7b6eSScott Teel 	sprintf(msg, "resetting %s",
60560b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
60570b9b7b6eSScott Teel 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
605825163bd5SWebb Scales 
6059c5dfd106SDon Brace 	/*
6060c5dfd106SDon Brace 	 * wait to see if any commands will complete before sending reset
6061c5dfd106SDon Brace 	 */
6062c5dfd106SDon Brace 	dev->in_reset = true; /* block any new cmds from OS for this device */
6063c5dfd106SDon Brace 	for (i = 0; i < 10; i++) {
6064c5dfd106SDon Brace 		if (atomic_read(&dev->commands_outstanding) > 0)
6065c5dfd106SDon Brace 			msleep(1000);
6066c5dfd106SDon Brace 		else
6067c5dfd106SDon Brace 			break;
6068c5dfd106SDon Brace 	}
6069c5dfd106SDon Brace 
6070edd16368SStephen M. Cameron 	/* send a reset to the SCSI LUN which the command was sent to */
6071c5dfd106SDon Brace 	rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6072c59d04f3SDon Brace 	if (rc == 0)
6073c59d04f3SDon Brace 		rc = SUCCESS;
6074c59d04f3SDon Brace 	else
6075c59d04f3SDon Brace 		rc = FAILED;
6076c59d04f3SDon Brace 
60770b9b7b6eSScott Teel 	sprintf(msg, "reset %s %s",
60780b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6079c59d04f3SDon Brace 		rc == SUCCESS ? "completed successfully" : "failed");
6080d604f533SWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6081c59d04f3SDon Brace 
6082c59d04f3SDon Brace return_reset_status:
6083c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
6084da03ded0SDon Brace 	h->reset_in_progress = 0;
6085c5dfd106SDon Brace 	if (dev)
6086c5dfd106SDon Brace 		dev->in_reset = false;
6087c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
6088c59d04f3SDon Brace 	return rc;
6089edd16368SStephen M. Cameron }
6090edd16368SStephen M. Cameron 
6091edd16368SStephen M. Cameron /*
609273153fe5SWebb Scales  * For operations with an associated SCSI command, a command block is allocated
609373153fe5SWebb Scales  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
609473153fe5SWebb Scales  * block request tag as an index into a table of entries.  cmd_tagged_free() is
609573153fe5SWebb Scales  * the complement, although cmd_free() may be called instead.
609673153fe5SWebb Scales  */
609773153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
609873153fe5SWebb Scales 					    struct scsi_cmnd *scmd)
609973153fe5SWebb Scales {
610073153fe5SWebb Scales 	int idx = hpsa_get_cmd_index(scmd);
610173153fe5SWebb Scales 	struct CommandList *c = h->cmd_pool + idx;
610273153fe5SWebb Scales 
610373153fe5SWebb Scales 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
610473153fe5SWebb Scales 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
610573153fe5SWebb Scales 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
610673153fe5SWebb Scales 		/* The index value comes from the block layer, so if it's out of
610773153fe5SWebb Scales 		 * bounds, it's probably not our bug.
610873153fe5SWebb Scales 		 */
610973153fe5SWebb Scales 		BUG();
611073153fe5SWebb Scales 	}
611173153fe5SWebb Scales 
611273153fe5SWebb Scales 	if (unlikely(!hpsa_is_cmd_idle(c))) {
611373153fe5SWebb Scales 		/*
611473153fe5SWebb Scales 		 * We expect that the SCSI layer will hand us a unique tag
611573153fe5SWebb Scales 		 * value.  Thus, there should never be a collision here between
611673153fe5SWebb Scales 		 * two requests...because if the selected command isn't idle
611773153fe5SWebb Scales 		 * then someone is going to be very disappointed.
611873153fe5SWebb Scales 		 */
61194770e68dSDon Brace 		if (idx != h->last_collision_tag) { /* Print once per tag */
61204770e68dSDon Brace 			dev_warn(&h->pdev->dev,
61214770e68dSDon Brace 				"%s: tag collision (tag=%d)\n", __func__, idx);
61224770e68dSDon Brace 			if (scmd)
612373153fe5SWebb Scales 				scsi_print_command(scmd);
61244770e68dSDon Brace 			h->last_collision_tag = idx;
612573153fe5SWebb Scales 		}
61264770e68dSDon Brace 		return NULL;
61274770e68dSDon Brace 	}
61284770e68dSDon Brace 
61294770e68dSDon Brace 	atomic_inc(&c->refcount);
613073153fe5SWebb Scales 
613173153fe5SWebb Scales 	hpsa_cmd_partial_init(h, idx, c);
613273153fe5SWebb Scales 	return c;
613373153fe5SWebb Scales }
613473153fe5SWebb Scales 
613573153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
613673153fe5SWebb Scales {
613773153fe5SWebb Scales 	/*
613873153fe5SWebb Scales 	 * Release our reference to the block.  We don't need to do anything
613908ec46f6SDon Brace 	 * else to free it, because it is accessed by index.
614073153fe5SWebb Scales 	 */
614173153fe5SWebb Scales 	(void)atomic_dec(&c->refcount);
614273153fe5SWebb Scales }
614373153fe5SWebb Scales 
614473153fe5SWebb Scales /*
6145edd16368SStephen M. Cameron  * For operations that cannot sleep, a command block is allocated at init,
6146edd16368SStephen M. Cameron  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6147edd16368SStephen M. Cameron  * which ones are free or in use.  Lock must be held when calling this.
6148edd16368SStephen M. Cameron  * cmd_free() is the complement.
6149bf43caf3SRobert Elliott  * This function never gives up and returns NULL.  If it hangs,
6150bf43caf3SRobert Elliott  * another thread must call cmd_free() to free some tags.
6151edd16368SStephen M. Cameron  */
6152281a7fd0SWebb Scales 
6153edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h)
6154edd16368SStephen M. Cameron {
6155edd16368SStephen M. Cameron 	struct CommandList *c;
6156360c73bdSStephen Cameron 	int refcount, i;
615773153fe5SWebb Scales 	int offset = 0;
6158edd16368SStephen M. Cameron 
615933811026SRobert Elliott 	/*
616033811026SRobert Elliott 	 * There is some *extremely* small but non-zero chance that that
61614c413128SStephen M. Cameron 	 * multiple threads could get in here, and one thread could
61624c413128SStephen M. Cameron 	 * be scanning through the list of bits looking for a free
61634c413128SStephen M. Cameron 	 * one, but the free ones are always behind him, and other
61644c413128SStephen M. Cameron 	 * threads sneak in behind him and eat them before he can
61654c413128SStephen M. Cameron 	 * get to them, so that while there is always a free one, a
61664c413128SStephen M. Cameron 	 * very unlucky thread might be starved anyway, never able to
61674c413128SStephen M. Cameron 	 * beat the other threads.  In reality, this happens so
61684c413128SStephen M. Cameron 	 * infrequently as to be indistinguishable from never.
616973153fe5SWebb Scales 	 *
617073153fe5SWebb Scales 	 * Note that we start allocating commands before the SCSI host structure
617173153fe5SWebb Scales 	 * is initialized.  Since the search starts at bit zero, this
617273153fe5SWebb Scales 	 * all works, since we have at least one command structure available;
617373153fe5SWebb Scales 	 * however, it means that the structures with the low indexes have to be
617473153fe5SWebb Scales 	 * reserved for driver-initiated requests, while requests from the block
617573153fe5SWebb Scales 	 * layer will use the higher indexes.
61764c413128SStephen M. Cameron 	 */
61774c413128SStephen M. Cameron 
6178281a7fd0SWebb Scales 	for (;;) {
617973153fe5SWebb Scales 		i = find_next_zero_bit(h->cmd_pool_bits,
618073153fe5SWebb Scales 					HPSA_NRESERVED_CMDS,
618173153fe5SWebb Scales 					offset);
618273153fe5SWebb Scales 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6183281a7fd0SWebb Scales 			offset = 0;
6184281a7fd0SWebb Scales 			continue;
6185281a7fd0SWebb Scales 		}
6186edd16368SStephen M. Cameron 		c = h->cmd_pool + i;
6187281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
6188281a7fd0SWebb Scales 		if (unlikely(refcount > 1)) {
6189281a7fd0SWebb Scales 			cmd_free(h, c); /* already in use */
619073153fe5SWebb Scales 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6191281a7fd0SWebb Scales 			continue;
6192281a7fd0SWebb Scales 		}
6193281a7fd0SWebb Scales 		set_bit(i & (BITS_PER_LONG - 1),
6194281a7fd0SWebb Scales 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6195281a7fd0SWebb Scales 		break; /* it's ours now. */
6196281a7fd0SWebb Scales 	}
6197360c73bdSStephen Cameron 	hpsa_cmd_partial_init(h, i, c);
6198c5dfd106SDon Brace 	c->device = NULL;
6199edd16368SStephen M. Cameron 	return c;
6200edd16368SStephen M. Cameron }
6201edd16368SStephen M. Cameron 
620273153fe5SWebb Scales /*
620373153fe5SWebb Scales  * This is the complementary operation to cmd_alloc().  Note, however, in some
620473153fe5SWebb Scales  * corner cases it may also be used to free blocks allocated by
620573153fe5SWebb Scales  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
620673153fe5SWebb Scales  * the clear-bit is harmless.
620773153fe5SWebb Scales  */
6208edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6209edd16368SStephen M. Cameron {
6210281a7fd0SWebb Scales 	if (atomic_dec_and_test(&c->refcount)) {
6211edd16368SStephen M. Cameron 		int i;
6212edd16368SStephen M. Cameron 
6213edd16368SStephen M. Cameron 		i = c - h->cmd_pool;
6214edd16368SStephen M. Cameron 		clear_bit(i & (BITS_PER_LONG - 1),
6215edd16368SStephen M. Cameron 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6216edd16368SStephen M. Cameron 	}
6217281a7fd0SWebb Scales }
6218edd16368SStephen M. Cameron 
6219edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
6220edd16368SStephen M. Cameron 
62216f4e626fSNathan Chancellor static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
622242a91641SDon Brace 	void __user *arg)
6223edd16368SStephen M. Cameron {
6224*10100ffdSAl Viro 	struct ctlr_info *h = sdev_to_hba(dev);
6225*10100ffdSAl Viro 	IOCTL32_Command_struct __user *arg32 = arg;
6226edd16368SStephen M. Cameron 	IOCTL_Command_struct arg64;
6227edd16368SStephen M. Cameron 	int err;
6228edd16368SStephen M. Cameron 	u32 cp;
6229edd16368SStephen M. Cameron 
6230*10100ffdSAl Viro 	if (!arg)
6231*10100ffdSAl Viro 		return -EINVAL;
6232*10100ffdSAl Viro 
6233938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6234*10100ffdSAl Viro 	if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6235*10100ffdSAl Viro 		return -EFAULT;
6236*10100ffdSAl Viro 	if (get_user(cp, &arg32->buf))
6237*10100ffdSAl Viro 		return -EFAULT;
6238edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6239edd16368SStephen M. Cameron 
6240*10100ffdSAl Viro 	if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6241*10100ffdSAl Viro 		return -EAGAIN;
6242*10100ffdSAl Viro 	err = hpsa_passthru_ioctl(h, &arg64);
6243*10100ffdSAl Viro 	atomic_inc(&h->passthru_cmds_avail);
6244edd16368SStephen M. Cameron 	if (err)
6245edd16368SStephen M. Cameron 		return err;
6246*10100ffdSAl Viro 	if (copy_to_user(&arg32->error_info, &arg64.error_info,
6247*10100ffdSAl Viro 			 sizeof(arg32->error_info)))
6248edd16368SStephen M. Cameron 		return -EFAULT;
6249*10100ffdSAl Viro 	return 0;
6250edd16368SStephen M. Cameron }
6251edd16368SStephen M. Cameron 
6252edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
62536f4e626fSNathan Chancellor 	unsigned int cmd, void __user *arg)
6254edd16368SStephen M. Cameron {
6255*10100ffdSAl Viro 	struct ctlr_info *h = sdev_to_hba(dev);
6256*10100ffdSAl Viro 	BIG_IOCTL32_Command_struct __user *arg32 = arg;
6257edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct arg64;
6258edd16368SStephen M. Cameron 	int err;
6259edd16368SStephen M. Cameron 	u32 cp;
6260edd16368SStephen M. Cameron 
6261*10100ffdSAl Viro 	if (!arg)
6262*10100ffdSAl Viro 		return -EINVAL;
6263938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6264*10100ffdSAl Viro 	if (copy_from_user(&arg64, arg32,
6265*10100ffdSAl Viro 			   offsetof(BIG_IOCTL32_Command_struct, buf)))
6266*10100ffdSAl Viro 		return -EFAULT;
6267*10100ffdSAl Viro 	if (get_user(cp, &arg32->buf))
6268*10100ffdSAl Viro 		return -EFAULT;
6269edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6270edd16368SStephen M. Cameron 
6271*10100ffdSAl Viro 	if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6272*10100ffdSAl Viro 		return -EAGAIN;
6273*10100ffdSAl Viro 	err = hpsa_big_passthru_ioctl(h, &arg64);
6274*10100ffdSAl Viro 	atomic_inc(&h->passthru_cmds_avail);
6275edd16368SStephen M. Cameron 	if (err)
6276edd16368SStephen M. Cameron 		return err;
6277*10100ffdSAl Viro 	if (copy_to_user(&arg32->error_info, &arg64.error_info,
6278*10100ffdSAl Viro 			 sizeof(arg32->error_info)))
6279edd16368SStephen M. Cameron 		return -EFAULT;
6280*10100ffdSAl Viro 	return 0;
6281edd16368SStephen M. Cameron }
628271fe75a7SStephen M. Cameron 
62836f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
62846f4e626fSNathan Chancellor 			     void __user *arg)
628571fe75a7SStephen M. Cameron {
628671fe75a7SStephen M. Cameron 	switch (cmd) {
628771fe75a7SStephen M. Cameron 	case CCISS_GETPCIINFO:
628871fe75a7SStephen M. Cameron 	case CCISS_GETINTINFO:
628971fe75a7SStephen M. Cameron 	case CCISS_SETINTINFO:
629071fe75a7SStephen M. Cameron 	case CCISS_GETNODENAME:
629171fe75a7SStephen M. Cameron 	case CCISS_SETNODENAME:
629271fe75a7SStephen M. Cameron 	case CCISS_GETHEARTBEAT:
629371fe75a7SStephen M. Cameron 	case CCISS_GETBUSTYPES:
629471fe75a7SStephen M. Cameron 	case CCISS_GETFIRMVER:
629571fe75a7SStephen M. Cameron 	case CCISS_GETDRIVVER:
629671fe75a7SStephen M. Cameron 	case CCISS_REVALIDVOLS:
629771fe75a7SStephen M. Cameron 	case CCISS_DEREGDISK:
629871fe75a7SStephen M. Cameron 	case CCISS_REGNEWDISK:
629971fe75a7SStephen M. Cameron 	case CCISS_REGNEWD:
630071fe75a7SStephen M. Cameron 	case CCISS_RESCANDISK:
630171fe75a7SStephen M. Cameron 	case CCISS_GETLUNINFO:
630271fe75a7SStephen M. Cameron 		return hpsa_ioctl(dev, cmd, arg);
630371fe75a7SStephen M. Cameron 
630471fe75a7SStephen M. Cameron 	case CCISS_PASSTHRU32:
630571fe75a7SStephen M. Cameron 		return hpsa_ioctl32_passthru(dev, cmd, arg);
630671fe75a7SStephen M. Cameron 	case CCISS_BIG_PASSTHRU32:
630771fe75a7SStephen M. Cameron 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
630871fe75a7SStephen M. Cameron 
630971fe75a7SStephen M. Cameron 	default:
631071fe75a7SStephen M. Cameron 		return -ENOIOCTLCMD;
631171fe75a7SStephen M. Cameron 	}
631271fe75a7SStephen M. Cameron }
6313edd16368SStephen M. Cameron #endif
6314edd16368SStephen M. Cameron 
6315edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6316edd16368SStephen M. Cameron {
6317edd16368SStephen M. Cameron 	struct hpsa_pci_info pciinfo;
6318edd16368SStephen M. Cameron 
6319edd16368SStephen M. Cameron 	if (!argp)
6320edd16368SStephen M. Cameron 		return -EINVAL;
6321edd16368SStephen M. Cameron 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6322edd16368SStephen M. Cameron 	pciinfo.bus = h->pdev->bus->number;
6323edd16368SStephen M. Cameron 	pciinfo.dev_fn = h->pdev->devfn;
6324edd16368SStephen M. Cameron 	pciinfo.board_id = h->board_id;
6325edd16368SStephen M. Cameron 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6326edd16368SStephen M. Cameron 		return -EFAULT;
6327edd16368SStephen M. Cameron 	return 0;
6328edd16368SStephen M. Cameron }
6329edd16368SStephen M. Cameron 
6330edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6331edd16368SStephen M. Cameron {
6332edd16368SStephen M. Cameron 	DriverVer_type DriverVer;
6333edd16368SStephen M. Cameron 	unsigned char vmaj, vmin, vsubmin;
6334edd16368SStephen M. Cameron 	int rc;
6335edd16368SStephen M. Cameron 
6336edd16368SStephen M. Cameron 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6337edd16368SStephen M. Cameron 		&vmaj, &vmin, &vsubmin);
6338edd16368SStephen M. Cameron 	if (rc != 3) {
6339edd16368SStephen M. Cameron 		dev_info(&h->pdev->dev, "driver version string '%s' "
6340edd16368SStephen M. Cameron 			"unrecognized.", HPSA_DRIVER_VERSION);
6341edd16368SStephen M. Cameron 		vmaj = 0;
6342edd16368SStephen M. Cameron 		vmin = 0;
6343edd16368SStephen M. Cameron 		vsubmin = 0;
6344edd16368SStephen M. Cameron 	}
6345edd16368SStephen M. Cameron 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6346edd16368SStephen M. Cameron 	if (!argp)
6347edd16368SStephen M. Cameron 		return -EINVAL;
6348edd16368SStephen M. Cameron 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6349edd16368SStephen M. Cameron 		return -EFAULT;
6350edd16368SStephen M. Cameron 	return 0;
6351edd16368SStephen M. Cameron }
6352edd16368SStephen M. Cameron 
6353138125f7SAl Viro static int hpsa_passthru_ioctl(struct ctlr_info *h,
6354138125f7SAl Viro 			       IOCTL_Command_struct *iocommand)
6355edd16368SStephen M. Cameron {
6356edd16368SStephen M. Cameron 	struct CommandList *c;
6357edd16368SStephen M. Cameron 	char *buff = NULL;
635850a0decfSStephen M. Cameron 	u64 temp64;
6359c1f63c8fSStephen M. Cameron 	int rc = 0;
6360edd16368SStephen M. Cameron 
6361edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6362edd16368SStephen M. Cameron 		return -EPERM;
6363138125f7SAl Viro 	if ((iocommand->buf_size < 1) &&
6364138125f7SAl Viro 	    (iocommand->Request.Type.Direction != XFER_NONE)) {
6365edd16368SStephen M. Cameron 		return -EINVAL;
6366edd16368SStephen M. Cameron 	}
6367138125f7SAl Viro 	if (iocommand->buf_size > 0) {
6368138125f7SAl Viro 		buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6369edd16368SStephen M. Cameron 		if (buff == NULL)
63702dd02d74SRobert Elliott 			return -ENOMEM;
6371138125f7SAl Viro 		if (iocommand->Request.Type.Direction & XFER_WRITE) {
6372edd16368SStephen M. Cameron 			/* Copy the data into the buffer we created */
6373138125f7SAl Viro 			if (copy_from_user(buff, iocommand->buf,
6374138125f7SAl Viro 				iocommand->buf_size)) {
6375c1f63c8fSStephen M. Cameron 				rc = -EFAULT;
6376c1f63c8fSStephen M. Cameron 				goto out_kfree;
6377edd16368SStephen M. Cameron 			}
6378b03a7771SStephen M. Cameron 		} else {
6379138125f7SAl Viro 			memset(buff, 0, iocommand->buf_size);
6380b03a7771SStephen M. Cameron 		}
6381b03a7771SStephen M. Cameron 	}
638245fcb86eSStephen Cameron 	c = cmd_alloc(h);
6383bf43caf3SRobert Elliott 
6384edd16368SStephen M. Cameron 	/* Fill in the command type */
6385edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6386a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6387edd16368SStephen M. Cameron 	/* Fill in Command Header */
6388edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6389138125f7SAl Viro 	if (iocommand->buf_size > 0) {	/* buffer to fill */
6390edd16368SStephen M. Cameron 		c->Header.SGList = 1;
639150a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6392edd16368SStephen M. Cameron 	} else	{ /* no buffers to fill */
6393edd16368SStephen M. Cameron 		c->Header.SGList = 0;
639450a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6395edd16368SStephen M. Cameron 	}
6396138125f7SAl Viro 	memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6397edd16368SStephen M. Cameron 
6398edd16368SStephen M. Cameron 	/* Fill in Request block */
6399138125f7SAl Viro 	memcpy(&c->Request, &iocommand->Request,
6400edd16368SStephen M. Cameron 		sizeof(c->Request));
6401edd16368SStephen M. Cameron 
6402edd16368SStephen M. Cameron 	/* Fill in the scatter gather information */
6403138125f7SAl Viro 	if (iocommand->buf_size > 0) {
64048bc8f47eSChristoph Hellwig 		temp64 = dma_map_single(&h->pdev->dev, buff,
6405138125f7SAl Viro 			iocommand->buf_size, DMA_BIDIRECTIONAL);
640650a0decfSStephen M. Cameron 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
640750a0decfSStephen M. Cameron 			c->SG[0].Addr = cpu_to_le64(0);
640850a0decfSStephen M. Cameron 			c->SG[0].Len = cpu_to_le32(0);
6409bcc48ffaSStephen M. Cameron 			rc = -ENOMEM;
6410bcc48ffaSStephen M. Cameron 			goto out;
6411bcc48ffaSStephen M. Cameron 		}
641250a0decfSStephen M. Cameron 		c->SG[0].Addr = cpu_to_le64(temp64);
6413138125f7SAl Viro 		c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
641450a0decfSStephen M. Cameron 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6415edd16368SStephen M. Cameron 	}
6416c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
64173fb134cbSDon Brace 					NO_TIMEOUT);
6418138125f7SAl Viro 	if (iocommand->buf_size > 0)
64198bc8f47eSChristoph Hellwig 		hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6420edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
642125163bd5SWebb Scales 	if (rc) {
642225163bd5SWebb Scales 		rc = -EIO;
642325163bd5SWebb Scales 		goto out;
642425163bd5SWebb Scales 	}
6425edd16368SStephen M. Cameron 
6426edd16368SStephen M. Cameron 	/* Copy the error information out */
6427138125f7SAl Viro 	memcpy(&iocommand->error_info, c->err_info,
6428138125f7SAl Viro 		sizeof(iocommand->error_info));
6429138125f7SAl Viro 	if ((iocommand->Request.Type.Direction & XFER_READ) &&
6430138125f7SAl Viro 		iocommand->buf_size > 0) {
6431edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6432138125f7SAl Viro 		if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6433c1f63c8fSStephen M. Cameron 			rc = -EFAULT;
6434c1f63c8fSStephen M. Cameron 			goto out;
6435edd16368SStephen M. Cameron 		}
6436edd16368SStephen M. Cameron 	}
6437c1f63c8fSStephen M. Cameron out:
643845fcb86eSStephen Cameron 	cmd_free(h, c);
6439c1f63c8fSStephen M. Cameron out_kfree:
6440c1f63c8fSStephen M. Cameron 	kfree(buff);
6441c1f63c8fSStephen M. Cameron 	return rc;
6442edd16368SStephen M. Cameron }
6443edd16368SStephen M. Cameron 
6444138125f7SAl Viro static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6445138125f7SAl Viro 				   BIG_IOCTL_Command_struct *ioc)
6446edd16368SStephen M. Cameron {
6447edd16368SStephen M. Cameron 	struct CommandList *c;
6448edd16368SStephen M. Cameron 	unsigned char **buff = NULL;
6449edd16368SStephen M. Cameron 	int *buff_size = NULL;
645050a0decfSStephen M. Cameron 	u64 temp64;
6451edd16368SStephen M. Cameron 	BYTE sg_used = 0;
6452edd16368SStephen M. Cameron 	int status = 0;
645301a02ffcSStephen M. Cameron 	u32 left;
645401a02ffcSStephen M. Cameron 	u32 sz;
6455edd16368SStephen M. Cameron 	BYTE __user *data_ptr;
6456edd16368SStephen M. Cameron 
6457edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6458edd16368SStephen M. Cameron 		return -EPERM;
6459138125f7SAl Viro 
6460edd16368SStephen M. Cameron 	if ((ioc->buf_size < 1) &&
6461138125f7SAl Viro 	    (ioc->Request.Type.Direction != XFER_NONE))
6462138125f7SAl Viro 		return -EINVAL;
6463edd16368SStephen M. Cameron 	/* Check kmalloc limits  using all SGs */
6464138125f7SAl Viro 	if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6465138125f7SAl Viro 		return -EINVAL;
6466138125f7SAl Viro 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6467138125f7SAl Viro 		return -EINVAL;
64686396bb22SKees Cook 	buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6469edd16368SStephen M. Cameron 	if (!buff) {
6470edd16368SStephen M. Cameron 		status = -ENOMEM;
6471edd16368SStephen M. Cameron 		goto cleanup1;
6472edd16368SStephen M. Cameron 	}
64736da2ec56SKees Cook 	buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6474edd16368SStephen M. Cameron 	if (!buff_size) {
6475edd16368SStephen M. Cameron 		status = -ENOMEM;
6476edd16368SStephen M. Cameron 		goto cleanup1;
6477edd16368SStephen M. Cameron 	}
6478edd16368SStephen M. Cameron 	left = ioc->buf_size;
6479edd16368SStephen M. Cameron 	data_ptr = ioc->buf;
6480edd16368SStephen M. Cameron 	while (left) {
6481edd16368SStephen M. Cameron 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6482edd16368SStephen M. Cameron 		buff_size[sg_used] = sz;
6483edd16368SStephen M. Cameron 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6484edd16368SStephen M. Cameron 		if (buff[sg_used] == NULL) {
6485edd16368SStephen M. Cameron 			status = -ENOMEM;
6486edd16368SStephen M. Cameron 			goto cleanup1;
6487edd16368SStephen M. Cameron 		}
64889233fb10SStephen M. Cameron 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6489edd16368SStephen M. Cameron 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
64900758f4f7SStephen M. Cameron 				status = -EFAULT;
6491edd16368SStephen M. Cameron 				goto cleanup1;
6492edd16368SStephen M. Cameron 			}
6493edd16368SStephen M. Cameron 		} else
6494edd16368SStephen M. Cameron 			memset(buff[sg_used], 0, sz);
6495edd16368SStephen M. Cameron 		left -= sz;
6496edd16368SStephen M. Cameron 		data_ptr += sz;
6497edd16368SStephen M. Cameron 		sg_used++;
6498edd16368SStephen M. Cameron 	}
649945fcb86eSStephen Cameron 	c = cmd_alloc(h);
6500bf43caf3SRobert Elliott 
6501edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6502a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6503edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
650450a0decfSStephen M. Cameron 	c->Header.SGList = (u8) sg_used;
650550a0decfSStephen M. Cameron 	c->Header.SGTotal = cpu_to_le16(sg_used);
6506edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6507edd16368SStephen M. Cameron 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6508edd16368SStephen M. Cameron 	if (ioc->buf_size > 0) {
6509edd16368SStephen M. Cameron 		int i;
6510edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
65118bc8f47eSChristoph Hellwig 			temp64 = dma_map_single(&h->pdev->dev, buff[i],
65128bc8f47eSChristoph Hellwig 				    buff_size[i], DMA_BIDIRECTIONAL);
651350a0decfSStephen M. Cameron 			if (dma_mapping_error(&h->pdev->dev,
651450a0decfSStephen M. Cameron 							(dma_addr_t) temp64)) {
651550a0decfSStephen M. Cameron 				c->SG[i].Addr = cpu_to_le64(0);
651650a0decfSStephen M. Cameron 				c->SG[i].Len = cpu_to_le32(0);
6517bcc48ffaSStephen M. Cameron 				hpsa_pci_unmap(h->pdev, c, i,
65188bc8f47eSChristoph Hellwig 					DMA_BIDIRECTIONAL);
6519bcc48ffaSStephen M. Cameron 				status = -ENOMEM;
6520e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6521bcc48ffaSStephen M. Cameron 			}
652250a0decfSStephen M. Cameron 			c->SG[i].Addr = cpu_to_le64(temp64);
652350a0decfSStephen M. Cameron 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
652450a0decfSStephen M. Cameron 			c->SG[i].Ext = cpu_to_le32(0);
6525edd16368SStephen M. Cameron 		}
652650a0decfSStephen M. Cameron 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6527edd16368SStephen M. Cameron 	}
6528c448ecfaSDon Brace 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
65293fb134cbSDon Brace 						NO_TIMEOUT);
6530b03a7771SStephen M. Cameron 	if (sg_used)
65318bc8f47eSChristoph Hellwig 		hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6532edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
653325163bd5SWebb Scales 	if (status) {
653425163bd5SWebb Scales 		status = -EIO;
653525163bd5SWebb Scales 		goto cleanup0;
653625163bd5SWebb Scales 	}
653725163bd5SWebb Scales 
6538edd16368SStephen M. Cameron 	/* Copy the error information out */
6539edd16368SStephen M. Cameron 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
65409233fb10SStephen M. Cameron 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
65412b08b3e9SDon Brace 		int i;
65422b08b3e9SDon Brace 
6543edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6544edd16368SStephen M. Cameron 		BYTE __user *ptr = ioc->buf;
6545edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
6546edd16368SStephen M. Cameron 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6547edd16368SStephen M. Cameron 				status = -EFAULT;
6548e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6549edd16368SStephen M. Cameron 			}
6550edd16368SStephen M. Cameron 			ptr += buff_size[i];
6551edd16368SStephen M. Cameron 		}
6552edd16368SStephen M. Cameron 	}
6553edd16368SStephen M. Cameron 	status = 0;
6554e2d4a1f6SStephen M. Cameron cleanup0:
655545fcb86eSStephen Cameron 	cmd_free(h, c);
6556edd16368SStephen M. Cameron cleanup1:
6557edd16368SStephen M. Cameron 	if (buff) {
65582b08b3e9SDon Brace 		int i;
65592b08b3e9SDon Brace 
6560edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++)
6561edd16368SStephen M. Cameron 			kfree(buff[i]);
6562edd16368SStephen M. Cameron 		kfree(buff);
6563edd16368SStephen M. Cameron 	}
6564edd16368SStephen M. Cameron 	kfree(buff_size);
6565edd16368SStephen M. Cameron 	return status;
6566edd16368SStephen M. Cameron }
6567edd16368SStephen M. Cameron 
6568edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
6569edd16368SStephen M. Cameron 	struct CommandList *c)
6570edd16368SStephen M. Cameron {
6571edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6572edd16368SStephen M. Cameron 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6573edd16368SStephen M. Cameron 		(void) check_for_unit_attention(h, c);
6574edd16368SStephen M. Cameron }
65750390f0c0SStephen M. Cameron 
6576edd16368SStephen M. Cameron /*
6577edd16368SStephen M. Cameron  * ioctl
6578edd16368SStephen M. Cameron  */
65796f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
65806f4e626fSNathan Chancellor 		      void __user *arg)
6581edd16368SStephen M. Cameron {
6582edd16368SStephen M. Cameron 	struct ctlr_info *h;
6583edd16368SStephen M. Cameron 	void __user *argp = (void __user *)arg;
65840390f0c0SStephen M. Cameron 	int rc;
6585edd16368SStephen M. Cameron 
6586edd16368SStephen M. Cameron 	h = sdev_to_hba(dev);
6587edd16368SStephen M. Cameron 
6588edd16368SStephen M. Cameron 	switch (cmd) {
6589edd16368SStephen M. Cameron 	case CCISS_DEREGDISK:
6590edd16368SStephen M. Cameron 	case CCISS_REGNEWDISK:
6591edd16368SStephen M. Cameron 	case CCISS_REGNEWD:
6592a08a8471SStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
6593edd16368SStephen M. Cameron 		return 0;
6594edd16368SStephen M. Cameron 	case CCISS_GETPCIINFO:
6595edd16368SStephen M. Cameron 		return hpsa_getpciinfo_ioctl(h, argp);
6596edd16368SStephen M. Cameron 	case CCISS_GETDRIVVER:
6597edd16368SStephen M. Cameron 		return hpsa_getdrivver_ioctl(h, argp);
6598138125f7SAl Viro 	case CCISS_PASSTHRU: {
6599138125f7SAl Viro 		IOCTL_Command_struct iocommand;
6600138125f7SAl Viro 
6601138125f7SAl Viro 		if (!argp)
6602138125f7SAl Viro 			return -EINVAL;
6603138125f7SAl Viro 		if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6604138125f7SAl Viro 			return -EFAULT;
660534f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
66060390f0c0SStephen M. Cameron 			return -EAGAIN;
6607138125f7SAl Viro 		rc = hpsa_passthru_ioctl(h, &iocommand);
660834f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
6609138125f7SAl Viro 		if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6610138125f7SAl Viro 			rc = -EFAULT;
66110390f0c0SStephen M. Cameron 		return rc;
6612138125f7SAl Viro 	}
6613138125f7SAl Viro 	case CCISS_BIG_PASSTHRU: {
6614cb17c1b6SAl Viro 		BIG_IOCTL_Command_struct ioc;
6615138125f7SAl Viro 		if (!argp)
6616138125f7SAl Viro 			return -EINVAL;
6617cb17c1b6SAl Viro 		if (copy_from_user(&ioc, argp, sizeof(ioc)))
6618cb17c1b6SAl Viro 			return -EFAULT;
661934f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
66200390f0c0SStephen M. Cameron 			return -EAGAIN;
6621cb17c1b6SAl Viro 		rc = hpsa_big_passthru_ioctl(h, &ioc);
662234f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
6623cb17c1b6SAl Viro 		if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6624138125f7SAl Viro 			rc = -EFAULT;
66250390f0c0SStephen M. Cameron 		return rc;
6626138125f7SAl Viro 	}
6627edd16368SStephen M. Cameron 	default:
6628edd16368SStephen M. Cameron 		return -ENOTTY;
6629edd16368SStephen M. Cameron 	}
6630edd16368SStephen M. Cameron }
6631edd16368SStephen M. Cameron 
6632c5dfd106SDon Brace static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
663364670ac8SStephen M. Cameron {
663464670ac8SStephen M. Cameron 	struct CommandList *c;
663564670ac8SStephen M. Cameron 
663664670ac8SStephen M. Cameron 	c = cmd_alloc(h);
6637bf43caf3SRobert Elliott 
6638a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map */
6639a2dac136SStephen M. Cameron 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
664064670ac8SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_MSG);
664164670ac8SStephen M. Cameron 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
664264670ac8SStephen M. Cameron 	c->waiting = NULL;
664364670ac8SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
664464670ac8SStephen M. Cameron 	/* Don't wait for completion, the reset won't complete.  Don't free
664564670ac8SStephen M. Cameron 	 * the command either.  This is the last command we will send before
664664670ac8SStephen M. Cameron 	 * re-initializing everything, so it doesn't matter and won't leak.
664764670ac8SStephen M. Cameron 	 */
6648bf43caf3SRobert Elliott 	return;
664964670ac8SStephen M. Cameron }
665064670ac8SStephen M. Cameron 
6651a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6652b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6653edd16368SStephen M. Cameron 	int cmd_type)
6654edd16368SStephen M. Cameron {
66558bc8f47eSChristoph Hellwig 	enum dma_data_direction dir = DMA_NONE;
6656edd16368SStephen M. Cameron 
6657edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6658a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6659edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
6660edd16368SStephen M. Cameron 	if (buff != NULL && size > 0) {
6661edd16368SStephen M. Cameron 		c->Header.SGList = 1;
666250a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6663edd16368SStephen M. Cameron 	} else {
6664edd16368SStephen M. Cameron 		c->Header.SGList = 0;
666550a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6666edd16368SStephen M. Cameron 	}
6667edd16368SStephen M. Cameron 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6668edd16368SStephen M. Cameron 
6669edd16368SStephen M. Cameron 	if (cmd_type == TYPE_CMD) {
6670edd16368SStephen M. Cameron 		switch (cmd) {
6671edd16368SStephen M. Cameron 		case HPSA_INQUIRY:
6672edd16368SStephen M. Cameron 			/* are we trying to read a vital product page */
6673b7bb24ebSStephen M. Cameron 			if (page_code & VPD_PAGE) {
6674edd16368SStephen M. Cameron 				c->Request.CDB[1] = 0x01;
6675b7bb24ebSStephen M. Cameron 				c->Request.CDB[2] = (page_code & 0xff);
6676edd16368SStephen M. Cameron 			}
6677edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6678a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6679a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6680edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6681edd16368SStephen M. Cameron 			c->Request.CDB[0] = HPSA_INQUIRY;
6682edd16368SStephen M. Cameron 			c->Request.CDB[4] = size & 0xFF;
6683edd16368SStephen M. Cameron 			break;
66840a7c3bb8SDon Brace 		case RECEIVE_DIAGNOSTIC:
66850a7c3bb8SDon Brace 			c->Request.CDBLen = 6;
66860a7c3bb8SDon Brace 			c->Request.type_attr_dir =
66870a7c3bb8SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
66880a7c3bb8SDon Brace 			c->Request.Timeout = 0;
66890a7c3bb8SDon Brace 			c->Request.CDB[0] = cmd;
66900a7c3bb8SDon Brace 			c->Request.CDB[1] = 1;
66910a7c3bb8SDon Brace 			c->Request.CDB[2] = 1;
66920a7c3bb8SDon Brace 			c->Request.CDB[3] = (size >> 8) & 0xFF;
66930a7c3bb8SDon Brace 			c->Request.CDB[4] = size & 0xFF;
66940a7c3bb8SDon Brace 			break;
6695edd16368SStephen M. Cameron 		case HPSA_REPORT_LOG:
6696edd16368SStephen M. Cameron 		case HPSA_REPORT_PHYS:
6697edd16368SStephen M. Cameron 			/* Talking to controller so It's a physical command
6698edd16368SStephen M. Cameron 			   mode = 00 target = 0.  Nothing to write.
6699edd16368SStephen M. Cameron 			 */
6700edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6701a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6702a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6703edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6704edd16368SStephen M. Cameron 			c->Request.CDB[0] = cmd;
6705edd16368SStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6706edd16368SStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6707edd16368SStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6708edd16368SStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6709edd16368SStephen M. Cameron 			break;
6710c2adae44SScott Teel 		case BMIC_SENSE_DIAG_OPTIONS:
6711c2adae44SScott Teel 			c->Request.CDBLen = 16;
6712c2adae44SScott Teel 			c->Request.type_attr_dir =
6713c2adae44SScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6714c2adae44SScott Teel 			c->Request.Timeout = 0;
6715c2adae44SScott Teel 			/* Spec says this should be BMIC_WRITE */
6716c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_READ;
6717c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6718c2adae44SScott Teel 			break;
6719c2adae44SScott Teel 		case BMIC_SET_DIAG_OPTIONS:
6720c2adae44SScott Teel 			c->Request.CDBLen = 16;
6721c2adae44SScott Teel 			c->Request.type_attr_dir =
6722c2adae44SScott Teel 					TYPE_ATTR_DIR(cmd_type,
6723c2adae44SScott Teel 						ATTR_SIMPLE, XFER_WRITE);
6724c2adae44SScott Teel 			c->Request.Timeout = 0;
6725c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_WRITE;
6726c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6727c2adae44SScott Teel 			break;
6728edd16368SStephen M. Cameron 		case HPSA_CACHE_FLUSH:
6729edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6730a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6731a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6732a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
6733edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6734edd16368SStephen M. Cameron 			c->Request.CDB[0] = BMIC_WRITE;
6735edd16368SStephen M. Cameron 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6736bb158eabSStephen M. Cameron 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6737bb158eabSStephen M. Cameron 			c->Request.CDB[8] = size & 0xFF;
6738edd16368SStephen M. Cameron 			break;
6739edd16368SStephen M. Cameron 		case TEST_UNIT_READY:
6740edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6741a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6742a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6743edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6744edd16368SStephen M. Cameron 			break;
6745283b4a9bSStephen M. Cameron 		case HPSA_GET_RAID_MAP:
6746283b4a9bSStephen M. Cameron 			c->Request.CDBLen = 12;
6747a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6748a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6749283b4a9bSStephen M. Cameron 			c->Request.Timeout = 0;
6750283b4a9bSStephen M. Cameron 			c->Request.CDB[0] = HPSA_CISS_READ;
6751283b4a9bSStephen M. Cameron 			c->Request.CDB[1] = cmd;
6752283b4a9bSStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6753283b4a9bSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6754283b4a9bSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6755283b4a9bSStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6756283b4a9bSStephen M. Cameron 			break;
6757316b221aSStephen M. Cameron 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6758316b221aSStephen M. Cameron 			c->Request.CDBLen = 10;
6759a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6760a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6761316b221aSStephen M. Cameron 			c->Request.Timeout = 0;
6762316b221aSStephen M. Cameron 			c->Request.CDB[0] = BMIC_READ;
6763316b221aSStephen M. Cameron 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6764316b221aSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6765316b221aSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6766316b221aSStephen M. Cameron 			break;
676703383736SDon Brace 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
676803383736SDon Brace 			c->Request.CDBLen = 10;
676903383736SDon Brace 			c->Request.type_attr_dir =
677003383736SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
677103383736SDon Brace 			c->Request.Timeout = 0;
677203383736SDon Brace 			c->Request.CDB[0] = BMIC_READ;
677303383736SDon Brace 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
677403383736SDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
677503383736SDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
677603383736SDon Brace 			break;
6777d04e62b9SKevin Barnett 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6778d04e62b9SKevin Barnett 			c->Request.CDBLen = 10;
6779d04e62b9SKevin Barnett 			c->Request.type_attr_dir =
6780d04e62b9SKevin Barnett 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6781d04e62b9SKevin Barnett 			c->Request.Timeout = 0;
6782d04e62b9SKevin Barnett 			c->Request.CDB[0] = BMIC_READ;
6783d04e62b9SKevin Barnett 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6784d04e62b9SKevin Barnett 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6785d04e62b9SKevin Barnett 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6786d04e62b9SKevin Barnett 			break;
6787cca8f13bSDon Brace 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6788cca8f13bSDon Brace 			c->Request.CDBLen = 10;
6789cca8f13bSDon Brace 			c->Request.type_attr_dir =
6790cca8f13bSDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6791cca8f13bSDon Brace 			c->Request.Timeout = 0;
6792cca8f13bSDon Brace 			c->Request.CDB[0] = BMIC_READ;
6793cca8f13bSDon Brace 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6794cca8f13bSDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6795cca8f13bSDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6796cca8f13bSDon Brace 			break;
679766749d0dSScott Teel 		case BMIC_IDENTIFY_CONTROLLER:
679866749d0dSScott Teel 			c->Request.CDBLen = 10;
679966749d0dSScott Teel 			c->Request.type_attr_dir =
680066749d0dSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
680166749d0dSScott Teel 			c->Request.Timeout = 0;
680266749d0dSScott Teel 			c->Request.CDB[0] = BMIC_READ;
680366749d0dSScott Teel 			c->Request.CDB[1] = 0;
680466749d0dSScott Teel 			c->Request.CDB[2] = 0;
680566749d0dSScott Teel 			c->Request.CDB[3] = 0;
680666749d0dSScott Teel 			c->Request.CDB[4] = 0;
680766749d0dSScott Teel 			c->Request.CDB[5] = 0;
680866749d0dSScott Teel 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
680966749d0dSScott Teel 			c->Request.CDB[7] = (size >> 16) & 0xFF;
681066749d0dSScott Teel 			c->Request.CDB[8] = (size >> 8) & 0XFF;
681166749d0dSScott Teel 			c->Request.CDB[9] = 0;
681266749d0dSScott Teel 			break;
6813edd16368SStephen M. Cameron 		default:
6814edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6815edd16368SStephen M. Cameron 			BUG();
6816edd16368SStephen M. Cameron 		}
6817edd16368SStephen M. Cameron 	} else if (cmd_type == TYPE_MSG) {
6818edd16368SStephen M. Cameron 		switch (cmd) {
6819edd16368SStephen M. Cameron 
68200b9b7b6eSScott Teel 		case  HPSA_PHYS_TARGET_RESET:
68210b9b7b6eSScott Teel 			c->Request.CDBLen = 16;
68220b9b7b6eSScott Teel 			c->Request.type_attr_dir =
68230b9b7b6eSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
68240b9b7b6eSScott Teel 			c->Request.Timeout = 0; /* Don't time out */
68250b9b7b6eSScott Teel 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
68260b9b7b6eSScott Teel 			c->Request.CDB[0] = HPSA_RESET;
68270b9b7b6eSScott Teel 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
68280b9b7b6eSScott Teel 			/* Physical target reset needs no control bytes 4-7*/
68290b9b7b6eSScott Teel 			c->Request.CDB[4] = 0x00;
68300b9b7b6eSScott Teel 			c->Request.CDB[5] = 0x00;
68310b9b7b6eSScott Teel 			c->Request.CDB[6] = 0x00;
68320b9b7b6eSScott Teel 			c->Request.CDB[7] = 0x00;
68330b9b7b6eSScott Teel 			break;
6834edd16368SStephen M. Cameron 		case  HPSA_DEVICE_RESET_MSG:
6835edd16368SStephen M. Cameron 			c->Request.CDBLen = 16;
6836a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6837a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6838edd16368SStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
683964670ac8SStephen M. Cameron 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
684064670ac8SStephen M. Cameron 			c->Request.CDB[0] =  cmd;
684121e89afdSStephen M. Cameron 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6842edd16368SStephen M. Cameron 			/* If bytes 4-7 are zero, it means reset the */
6843edd16368SStephen M. Cameron 			/* LunID device */
6844edd16368SStephen M. Cameron 			c->Request.CDB[4] = 0x00;
6845edd16368SStephen M. Cameron 			c->Request.CDB[5] = 0x00;
6846edd16368SStephen M. Cameron 			c->Request.CDB[6] = 0x00;
6847edd16368SStephen M. Cameron 			c->Request.CDB[7] = 0x00;
6848edd16368SStephen M. Cameron 			break;
6849edd16368SStephen M. Cameron 		default:
6850edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
6851edd16368SStephen M. Cameron 				cmd);
6852edd16368SStephen M. Cameron 			BUG();
6853edd16368SStephen M. Cameron 		}
6854edd16368SStephen M. Cameron 	} else {
6855edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6856edd16368SStephen M. Cameron 		BUG();
6857edd16368SStephen M. Cameron 	}
6858edd16368SStephen M. Cameron 
6859a505b86fSStephen M. Cameron 	switch (GET_DIR(c->Request.type_attr_dir)) {
6860edd16368SStephen M. Cameron 	case XFER_READ:
68618bc8f47eSChristoph Hellwig 		dir = DMA_FROM_DEVICE;
6862edd16368SStephen M. Cameron 		break;
6863edd16368SStephen M. Cameron 	case XFER_WRITE:
68648bc8f47eSChristoph Hellwig 		dir = DMA_TO_DEVICE;
6865edd16368SStephen M. Cameron 		break;
6866edd16368SStephen M. Cameron 	case XFER_NONE:
68678bc8f47eSChristoph Hellwig 		dir = DMA_NONE;
6868edd16368SStephen M. Cameron 		break;
6869edd16368SStephen M. Cameron 	default:
68708bc8f47eSChristoph Hellwig 		dir = DMA_BIDIRECTIONAL;
6871edd16368SStephen M. Cameron 	}
68728bc8f47eSChristoph Hellwig 	if (hpsa_map_one(h->pdev, c, buff, size, dir))
6873a2dac136SStephen M. Cameron 		return -1;
6874a2dac136SStephen M. Cameron 	return 0;
6875edd16368SStephen M. Cameron }
6876edd16368SStephen M. Cameron 
6877edd16368SStephen M. Cameron /*
6878edd16368SStephen M. Cameron  * Map (physical) PCI mem into (virtual) kernel space
6879edd16368SStephen M. Cameron  */
6880edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size)
6881edd16368SStephen M. Cameron {
6882edd16368SStephen M. Cameron 	ulong page_base = ((ulong) base) & PAGE_MASK;
6883edd16368SStephen M. Cameron 	ulong page_offs = ((ulong) base) - page_base;
68844bdc0d67SChristoph Hellwig 	void __iomem *page_remapped = ioremap(page_base,
6885088ba34cSStephen M. Cameron 		page_offs + size);
6886edd16368SStephen M. Cameron 
6887edd16368SStephen M. Cameron 	return page_remapped ? (page_remapped + page_offs) : NULL;
6888edd16368SStephen M. Cameron }
6889edd16368SStephen M. Cameron 
6890254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6891edd16368SStephen M. Cameron {
6892254f796bSMatt Gates 	return h->access.command_completed(h, q);
6893edd16368SStephen M. Cameron }
6894edd16368SStephen M. Cameron 
6895900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h)
6896edd16368SStephen M. Cameron {
6897edd16368SStephen M. Cameron 	return h->access.intr_pending(h);
6898edd16368SStephen M. Cameron }
6899edd16368SStephen M. Cameron 
6900edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h)
6901edd16368SStephen M. Cameron {
690210f66018SStephen M. Cameron 	return (h->access.intr_pending(h) == 0) ||
690310f66018SStephen M. Cameron 		(h->interrupts_enabled == 0);
6904edd16368SStephen M. Cameron }
6905edd16368SStephen M. Cameron 
690601a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
690701a02ffcSStephen M. Cameron 	u32 raw_tag)
6908edd16368SStephen M. Cameron {
6909edd16368SStephen M. Cameron 	if (unlikely(tag_index >= h->nr_cmds)) {
6910edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6911edd16368SStephen M. Cameron 		return 1;
6912edd16368SStephen M. Cameron 	}
6913edd16368SStephen M. Cameron 	return 0;
6914edd16368SStephen M. Cameron }
6915edd16368SStephen M. Cameron 
69165a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c)
6917edd16368SStephen M. Cameron {
6918e85c5974SStephen M. Cameron 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6919c349775eSScott Teel 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6920c349775eSScott Teel 			|| c->cmd_type == CMD_IOACCEL2))
69211fb011fbSStephen M. Cameron 		complete_scsi_command(c);
69228be986ccSStephen Cameron 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6923edd16368SStephen M. Cameron 		complete(c->waiting);
6924a104c99fSStephen M. Cameron }
6925a104c99fSStephen M. Cameron 
6926303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */
69271d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h,
6928303932fdSDon Brace 	u32 raw_tag)
6929303932fdSDon Brace {
6930303932fdSDon Brace 	u32 tag_index;
6931303932fdSDon Brace 	struct CommandList *c;
6932303932fdSDon Brace 
6933f2405db8SDon Brace 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
69341d94f94dSStephen M. Cameron 	if (!bad_tag(h, tag_index, raw_tag)) {
6935303932fdSDon Brace 		c = h->cmd_pool + tag_index;
69365a3d16f5SStephen M. Cameron 		finish_cmd(c);
69371d94f94dSStephen M. Cameron 	}
6938303932fdSDon Brace }
6939303932fdSDon Brace 
694064670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt
694164670ac8SStephen M. Cameron  * after a soft reset, even if we turned interrupts off.
694264670ac8SStephen M. Cameron  * Only need to check for this in the hpsa_xxx_discard_completions
694364670ac8SStephen M. Cameron  * functions.
694464670ac8SStephen M. Cameron  */
694564670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h)
694664670ac8SStephen M. Cameron {
694764670ac8SStephen M. Cameron 	if (likely(!reset_devices))
694864670ac8SStephen M. Cameron 		return 0;
694964670ac8SStephen M. Cameron 
695064670ac8SStephen M. Cameron 	if (likely(h->interrupts_enabled))
695164670ac8SStephen M. Cameron 		return 0;
695264670ac8SStephen M. Cameron 
695364670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
695464670ac8SStephen M. Cameron 		"(known firmware bug.)  Ignoring.\n");
695564670ac8SStephen M. Cameron 
695664670ac8SStephen M. Cameron 	return 1;
695764670ac8SStephen M. Cameron }
695864670ac8SStephen M. Cameron 
6959254f796bSMatt Gates /*
6960254f796bSMatt Gates  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6961254f796bSMatt Gates  * Relies on (h-q[x] == x) being true for x such that
6962254f796bSMatt Gates  * 0 <= x < MAX_REPLY_QUEUES.
6963254f796bSMatt Gates  */
6964254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue)
696564670ac8SStephen M. Cameron {
6966254f796bSMatt Gates 	return container_of((queue - *queue), struct ctlr_info, q[0]);
6967254f796bSMatt Gates }
6968254f796bSMatt Gates 
6969254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6970254f796bSMatt Gates {
6971254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
6972254f796bSMatt Gates 	u8 q = *(u8 *) queue;
697364670ac8SStephen M. Cameron 	u32 raw_tag;
697464670ac8SStephen M. Cameron 
697564670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
697664670ac8SStephen M. Cameron 		return IRQ_NONE;
697764670ac8SStephen M. Cameron 
697864670ac8SStephen M. Cameron 	if (interrupt_not_for_us(h))
697964670ac8SStephen M. Cameron 		return IRQ_NONE;
6980a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
698164670ac8SStephen M. Cameron 	while (interrupt_pending(h)) {
6982254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
698364670ac8SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY)
6984254f796bSMatt Gates 			raw_tag = next_command(h, q);
698564670ac8SStephen M. Cameron 	}
698664670ac8SStephen M. Cameron 	return IRQ_HANDLED;
698764670ac8SStephen M. Cameron }
698864670ac8SStephen M. Cameron 
6989254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
699064670ac8SStephen M. Cameron {
6991254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
699264670ac8SStephen M. Cameron 	u32 raw_tag;
6993254f796bSMatt Gates 	u8 q = *(u8 *) queue;
699464670ac8SStephen M. Cameron 
699564670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
699664670ac8SStephen M. Cameron 		return IRQ_NONE;
699764670ac8SStephen M. Cameron 
6998a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
6999254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
700064670ac8SStephen M. Cameron 	while (raw_tag != FIFO_EMPTY)
7001254f796bSMatt Gates 		raw_tag = next_command(h, q);
700264670ac8SStephen M. Cameron 	return IRQ_HANDLED;
700364670ac8SStephen M. Cameron }
700464670ac8SStephen M. Cameron 
7005254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7006edd16368SStephen M. Cameron {
7007254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
7008303932fdSDon Brace 	u32 raw_tag;
7009254f796bSMatt Gates 	u8 q = *(u8 *) queue;
7010edd16368SStephen M. Cameron 
7011edd16368SStephen M. Cameron 	if (interrupt_not_for_us(h))
7012edd16368SStephen M. Cameron 		return IRQ_NONE;
7013a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
701410f66018SStephen M. Cameron 	while (interrupt_pending(h)) {
7015254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
701610f66018SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY) {
70171d94f94dSStephen M. Cameron 			process_indexed_cmd(h, raw_tag);
7018254f796bSMatt Gates 			raw_tag = next_command(h, q);
701910f66018SStephen M. Cameron 		}
702010f66018SStephen M. Cameron 	}
702110f66018SStephen M. Cameron 	return IRQ_HANDLED;
702210f66018SStephen M. Cameron }
702310f66018SStephen M. Cameron 
7024254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
702510f66018SStephen M. Cameron {
7026254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
702710f66018SStephen M. Cameron 	u32 raw_tag;
7028254f796bSMatt Gates 	u8 q = *(u8 *) queue;
702910f66018SStephen M. Cameron 
7030a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7031254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
7032303932fdSDon Brace 	while (raw_tag != FIFO_EMPTY) {
70331d94f94dSStephen M. Cameron 		process_indexed_cmd(h, raw_tag);
7034254f796bSMatt Gates 		raw_tag = next_command(h, q);
7035edd16368SStephen M. Cameron 	}
7036edd16368SStephen M. Cameron 	return IRQ_HANDLED;
7037edd16368SStephen M. Cameron }
7038edd16368SStephen M. Cameron 
7039a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works
7040a9a3a273SStephen M. Cameron  * in simple mode, not performant mode due to the tag lookup.
7041a9a3a273SStephen M. Cameron  * We only ever use this immediately after a controller reset.
7042a9a3a273SStephen M. Cameron  */
70436f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7044edd16368SStephen M. Cameron 			unsigned char type)
7045edd16368SStephen M. Cameron {
7046edd16368SStephen M. Cameron 	struct Command {
7047edd16368SStephen M. Cameron 		struct CommandListHeader CommandHeader;
7048edd16368SStephen M. Cameron 		struct RequestBlock Request;
7049edd16368SStephen M. Cameron 		struct ErrDescriptor ErrorDescriptor;
7050edd16368SStephen M. Cameron 	};
7051edd16368SStephen M. Cameron 	struct Command *cmd;
7052edd16368SStephen M. Cameron 	static const size_t cmd_sz = sizeof(*cmd) +
7053edd16368SStephen M. Cameron 					sizeof(cmd->ErrorDescriptor);
7054edd16368SStephen M. Cameron 	dma_addr_t paddr64;
70552b08b3e9SDon Brace 	__le32 paddr32;
70562b08b3e9SDon Brace 	u32 tag;
7057edd16368SStephen M. Cameron 	void __iomem *vaddr;
7058edd16368SStephen M. Cameron 	int i, err;
7059edd16368SStephen M. Cameron 
7060edd16368SStephen M. Cameron 	vaddr = pci_ioremap_bar(pdev, 0);
7061edd16368SStephen M. Cameron 	if (vaddr == NULL)
7062edd16368SStephen M. Cameron 		return -ENOMEM;
7063edd16368SStephen M. Cameron 
7064edd16368SStephen M. Cameron 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7065edd16368SStephen M. Cameron 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7066edd16368SStephen M. Cameron 	 * memory.
7067edd16368SStephen M. Cameron 	 */
70688bc8f47eSChristoph Hellwig 	err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7069edd16368SStephen M. Cameron 	if (err) {
7070edd16368SStephen M. Cameron 		iounmap(vaddr);
70711eaec8f3SRobert Elliott 		return err;
7072edd16368SStephen M. Cameron 	}
7073edd16368SStephen M. Cameron 
70748bc8f47eSChristoph Hellwig 	cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7075edd16368SStephen M. Cameron 	if (cmd == NULL) {
7076edd16368SStephen M. Cameron 		iounmap(vaddr);
7077edd16368SStephen M. Cameron 		return -ENOMEM;
7078edd16368SStephen M. Cameron 	}
7079edd16368SStephen M. Cameron 
7080edd16368SStephen M. Cameron 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7081edd16368SStephen M. Cameron 	 * although there's no guarantee, we assume that the address is at
7082edd16368SStephen M. Cameron 	 * least 4-byte aligned (most likely, it's page-aligned).
7083edd16368SStephen M. Cameron 	 */
70842b08b3e9SDon Brace 	paddr32 = cpu_to_le32(paddr64);
7085edd16368SStephen M. Cameron 
7086edd16368SStephen M. Cameron 	cmd->CommandHeader.ReplyQueue = 0;
7087edd16368SStephen M. Cameron 	cmd->CommandHeader.SGList = 0;
708850a0decfSStephen M. Cameron 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
70892b08b3e9SDon Brace 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7090edd16368SStephen M. Cameron 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7091edd16368SStephen M. Cameron 
7092edd16368SStephen M. Cameron 	cmd->Request.CDBLen = 16;
7093a505b86fSStephen M. Cameron 	cmd->Request.type_attr_dir =
7094a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7095edd16368SStephen M. Cameron 	cmd->Request.Timeout = 0; /* Don't time out */
7096edd16368SStephen M. Cameron 	cmd->Request.CDB[0] = opcode;
7097edd16368SStephen M. Cameron 	cmd->Request.CDB[1] = type;
7098edd16368SStephen M. Cameron 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
709950a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Addr =
71002b08b3e9SDon Brace 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
710150a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7102edd16368SStephen M. Cameron 
71032b08b3e9SDon Brace 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7104edd16368SStephen M. Cameron 
7105edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7106edd16368SStephen M. Cameron 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
71072b08b3e9SDon Brace 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7108edd16368SStephen M. Cameron 			break;
7109edd16368SStephen M. Cameron 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7110edd16368SStephen M. Cameron 	}
7111edd16368SStephen M. Cameron 
7112edd16368SStephen M. Cameron 	iounmap(vaddr);
7113edd16368SStephen M. Cameron 
7114edd16368SStephen M. Cameron 	/* we leak the DMA buffer here ... no choice since the controller could
7115edd16368SStephen M. Cameron 	 *  still complete the command.
7116edd16368SStephen M. Cameron 	 */
7117edd16368SStephen M. Cameron 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7118edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7119edd16368SStephen M. Cameron 			opcode, type);
7120edd16368SStephen M. Cameron 		return -ETIMEDOUT;
7121edd16368SStephen M. Cameron 	}
7122edd16368SStephen M. Cameron 
71238bc8f47eSChristoph Hellwig 	dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7124edd16368SStephen M. Cameron 
7125edd16368SStephen M. Cameron 	if (tag & HPSA_ERROR_BIT) {
7126edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7127edd16368SStephen M. Cameron 			opcode, type);
7128edd16368SStephen M. Cameron 		return -EIO;
7129edd16368SStephen M. Cameron 	}
7130edd16368SStephen M. Cameron 
7131edd16368SStephen M. Cameron 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7132edd16368SStephen M. Cameron 		opcode, type);
7133edd16368SStephen M. Cameron 	return 0;
7134edd16368SStephen M. Cameron }
7135edd16368SStephen M. Cameron 
7136edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0)
7137edd16368SStephen M. Cameron 
71381df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev,
713942a91641SDon Brace 	void __iomem *vaddr, u32 use_doorbell)
7140edd16368SStephen M. Cameron {
7141edd16368SStephen M. Cameron 
71421df8552aSStephen M. Cameron 	if (use_doorbell) {
71431df8552aSStephen M. Cameron 		/* For everything after the P600, the PCI power state method
71441df8552aSStephen M. Cameron 		 * of resetting the controller doesn't work, so we have this
71451df8552aSStephen M. Cameron 		 * other way using the doorbell register.
7146edd16368SStephen M. Cameron 		 */
71471df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7148cf0b08d0SStephen M. Cameron 		writel(use_doorbell, vaddr + SA5_DOORBELL);
714985009239SStephen M. Cameron 
715000701a96SJustin Lindley 		/* PMC hardware guys tell us we need a 10 second delay after
715185009239SStephen M. Cameron 		 * doorbell reset and before any attempt to talk to the board
715285009239SStephen M. Cameron 		 * at all to ensure that this actually works and doesn't fall
715385009239SStephen M. Cameron 		 * over in some weird corner cases.
715485009239SStephen M. Cameron 		 */
715500701a96SJustin Lindley 		msleep(10000);
71561df8552aSStephen M. Cameron 	} else { /* Try to do it the PCI power state way */
7157edd16368SStephen M. Cameron 
7158edd16368SStephen M. Cameron 		/* Quoting from the Open CISS Specification: "The Power
7159edd16368SStephen M. Cameron 		 * Management Control/Status Register (CSR) controls the power
7160edd16368SStephen M. Cameron 		 * state of the device.  The normal operating state is D0,
7161edd16368SStephen M. Cameron 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
71621df8552aSStephen M. Cameron 		 * the controller, place the interface device in D3 then to D0,
71631df8552aSStephen M. Cameron 		 * this causes a secondary PCI reset which will reset the
71641df8552aSStephen M. Cameron 		 * controller." */
7165edd16368SStephen M. Cameron 
71662662cab8SDon Brace 		int rc = 0;
71672662cab8SDon Brace 
71681df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
71692662cab8SDon Brace 
7170edd16368SStephen M. Cameron 		/* enter the D3hot power management state */
71712662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D3hot);
71722662cab8SDon Brace 		if (rc)
71732662cab8SDon Brace 			return rc;
7174edd16368SStephen M. Cameron 
7175edd16368SStephen M. Cameron 		msleep(500);
7176edd16368SStephen M. Cameron 
7177edd16368SStephen M. Cameron 		/* enter the D0 power management state */
71782662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D0);
71792662cab8SDon Brace 		if (rc)
71802662cab8SDon Brace 			return rc;
7181c4853efeSMike Miller 
7182c4853efeSMike Miller 		/*
7183c4853efeSMike Miller 		 * The P600 requires a small delay when changing states.
7184c4853efeSMike Miller 		 * Otherwise we may think the board did not reset and we bail.
7185c4853efeSMike Miller 		 * This for kdump only and is particular to the P600.
7186c4853efeSMike Miller 		 */
7187c4853efeSMike Miller 		msleep(500);
71881df8552aSStephen M. Cameron 	}
71891df8552aSStephen M. Cameron 	return 0;
71901df8552aSStephen M. Cameron }
71911df8552aSStephen M. Cameron 
71926f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len)
7193580ada3cSStephen M. Cameron {
7194580ada3cSStephen M. Cameron 	memset(driver_version, 0, len);
7195f79cfec6SStephen M. Cameron 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7196580ada3cSStephen M. Cameron }
7197580ada3cSStephen M. Cameron 
71986f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7199580ada3cSStephen M. Cameron {
7200580ada3cSStephen M. Cameron 	char *driver_version;
7201580ada3cSStephen M. Cameron 	int i, size = sizeof(cfgtable->driver_version);
7202580ada3cSStephen M. Cameron 
7203580ada3cSStephen M. Cameron 	driver_version = kmalloc(size, GFP_KERNEL);
7204580ada3cSStephen M. Cameron 	if (!driver_version)
7205580ada3cSStephen M. Cameron 		return -ENOMEM;
7206580ada3cSStephen M. Cameron 
7207580ada3cSStephen M. Cameron 	init_driver_version(driver_version, size);
7208580ada3cSStephen M. Cameron 	for (i = 0; i < size; i++)
7209580ada3cSStephen M. Cameron 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7210580ada3cSStephen M. Cameron 	kfree(driver_version);
7211580ada3cSStephen M. Cameron 	return 0;
7212580ada3cSStephen M. Cameron }
7213580ada3cSStephen M. Cameron 
72146f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
72156f039790SGreg Kroah-Hartman 					  unsigned char *driver_ver)
7216580ada3cSStephen M. Cameron {
7217580ada3cSStephen M. Cameron 	int i;
7218580ada3cSStephen M. Cameron 
7219580ada3cSStephen M. Cameron 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7220580ada3cSStephen M. Cameron 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7221580ada3cSStephen M. Cameron }
7222580ada3cSStephen M. Cameron 
72236f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7224580ada3cSStephen M. Cameron {
7225580ada3cSStephen M. Cameron 
7226580ada3cSStephen M. Cameron 	char *driver_ver, *old_driver_ver;
7227580ada3cSStephen M. Cameron 	int rc, size = sizeof(cfgtable->driver_version);
7228580ada3cSStephen M. Cameron 
72296da2ec56SKees Cook 	old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7230580ada3cSStephen M. Cameron 	if (!old_driver_ver)
7231580ada3cSStephen M. Cameron 		return -ENOMEM;
7232580ada3cSStephen M. Cameron 	driver_ver = old_driver_ver + size;
7233580ada3cSStephen M. Cameron 
7234580ada3cSStephen M. Cameron 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7235580ada3cSStephen M. Cameron 	 * should have been changed, otherwise we know the reset failed.
7236580ada3cSStephen M. Cameron 	 */
7237580ada3cSStephen M. Cameron 	init_driver_version(old_driver_ver, size);
7238580ada3cSStephen M. Cameron 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7239580ada3cSStephen M. Cameron 	rc = !memcmp(driver_ver, old_driver_ver, size);
7240580ada3cSStephen M. Cameron 	kfree(old_driver_ver);
7241580ada3cSStephen M. Cameron 	return rc;
7242580ada3cSStephen M. Cameron }
72431df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management
72441df8552aSStephen M. Cameron  * states or the using the doorbell register.
72451df8552aSStephen M. Cameron  */
72466b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
72471df8552aSStephen M. Cameron {
72481df8552aSStephen M. Cameron 	u64 cfg_offset;
72491df8552aSStephen M. Cameron 	u32 cfg_base_addr;
72501df8552aSStephen M. Cameron 	u64 cfg_base_addr_index;
72511df8552aSStephen M. Cameron 	void __iomem *vaddr;
72521df8552aSStephen M. Cameron 	unsigned long paddr;
7253580ada3cSStephen M. Cameron 	u32 misc_fw_support;
7254270d05deSStephen M. Cameron 	int rc;
72551df8552aSStephen M. Cameron 	struct CfgTable __iomem *cfgtable;
7256cf0b08d0SStephen M. Cameron 	u32 use_doorbell;
7257270d05deSStephen M. Cameron 	u16 command_register;
72581df8552aSStephen M. Cameron 
72591df8552aSStephen M. Cameron 	/* For controllers as old as the P600, this is very nearly
72601df8552aSStephen M. Cameron 	 * the same thing as
72611df8552aSStephen M. Cameron 	 *
72621df8552aSStephen M. Cameron 	 * pci_save_state(pci_dev);
72631df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D3hot);
72641df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D0);
72651df8552aSStephen M. Cameron 	 * pci_restore_state(pci_dev);
72661df8552aSStephen M. Cameron 	 *
72671df8552aSStephen M. Cameron 	 * For controllers newer than the P600, the pci power state
72681df8552aSStephen M. Cameron 	 * method of resetting doesn't work so we have another way
72691df8552aSStephen M. Cameron 	 * using the doorbell register.
72701df8552aSStephen M. Cameron 	 */
727118867659SStephen M. Cameron 
727260f923b9SRobert Elliott 	if (!ctlr_is_resettable(board_id)) {
727360f923b9SRobert Elliott 		dev_warn(&pdev->dev, "Controller not resettable\n");
727425c1e56aSStephen M. Cameron 		return -ENODEV;
727525c1e56aSStephen M. Cameron 	}
727646380786SStephen M. Cameron 
727746380786SStephen M. Cameron 	/* if controller is soft- but not hard resettable... */
727846380786SStephen M. Cameron 	if (!ctlr_is_hard_resettable(board_id))
727946380786SStephen M. Cameron 		return -ENOTSUPP; /* try soft reset later. */
728018867659SStephen M. Cameron 
7281270d05deSStephen M. Cameron 	/* Save the PCI command register */
7282270d05deSStephen M. Cameron 	pci_read_config_word(pdev, 4, &command_register);
7283270d05deSStephen M. Cameron 	pci_save_state(pdev);
72841df8552aSStephen M. Cameron 
72851df8552aSStephen M. Cameron 	/* find the first memory BAR, so we can find the cfg table */
72861df8552aSStephen M. Cameron 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
72871df8552aSStephen M. Cameron 	if (rc)
72881df8552aSStephen M. Cameron 		return rc;
72891df8552aSStephen M. Cameron 	vaddr = remap_pci_mem(paddr, 0x250);
72901df8552aSStephen M. Cameron 	if (!vaddr)
72911df8552aSStephen M. Cameron 		return -ENOMEM;
72921df8552aSStephen M. Cameron 
72931df8552aSStephen M. Cameron 	/* find cfgtable in order to check if reset via doorbell is supported */
72941df8552aSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
72951df8552aSStephen M. Cameron 					&cfg_base_addr_index, &cfg_offset);
72961df8552aSStephen M. Cameron 	if (rc)
72971df8552aSStephen M. Cameron 		goto unmap_vaddr;
72981df8552aSStephen M. Cameron 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
72991df8552aSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
73001df8552aSStephen M. Cameron 	if (!cfgtable) {
73011df8552aSStephen M. Cameron 		rc = -ENOMEM;
73021df8552aSStephen M. Cameron 		goto unmap_vaddr;
73031df8552aSStephen M. Cameron 	}
7304580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(cfgtable);
7305580ada3cSStephen M. Cameron 	if (rc)
730603741d95STomas Henzl 		goto unmap_cfgtable;
73071df8552aSStephen M. Cameron 
7308cf0b08d0SStephen M. Cameron 	/* If reset via doorbell register is supported, use that.
7309cf0b08d0SStephen M. Cameron 	 * There are two such methods.  Favor the newest method.
7310cf0b08d0SStephen M. Cameron 	 */
73111df8552aSStephen M. Cameron 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7312cf0b08d0SStephen M. Cameron 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7313cf0b08d0SStephen M. Cameron 	if (use_doorbell) {
7314cf0b08d0SStephen M. Cameron 		use_doorbell = DOORBELL_CTLR_RESET2;
7315cf0b08d0SStephen M. Cameron 	} else {
73161df8552aSStephen M. Cameron 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7317cf0b08d0SStephen M. Cameron 		if (use_doorbell) {
7318050f7147SStephen Cameron 			dev_warn(&pdev->dev,
7319050f7147SStephen Cameron 				"Soft reset not supported. Firmware update is required.\n");
732064670ac8SStephen M. Cameron 			rc = -ENOTSUPP; /* try soft reset */
7321cf0b08d0SStephen M. Cameron 			goto unmap_cfgtable;
7322cf0b08d0SStephen M. Cameron 		}
7323cf0b08d0SStephen M. Cameron 	}
73241df8552aSStephen M. Cameron 
73251df8552aSStephen M. Cameron 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
73261df8552aSStephen M. Cameron 	if (rc)
73271df8552aSStephen M. Cameron 		goto unmap_cfgtable;
7328edd16368SStephen M. Cameron 
7329270d05deSStephen M. Cameron 	pci_restore_state(pdev);
7330270d05deSStephen M. Cameron 	pci_write_config_word(pdev, 4, command_register);
7331edd16368SStephen M. Cameron 
73321df8552aSStephen M. Cameron 	/* Some devices (notably the HP Smart Array 5i Controller)
73331df8552aSStephen M. Cameron 	   need a little pause here */
73341df8552aSStephen M. Cameron 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
73351df8552aSStephen M. Cameron 
7336fe5389c8SStephen M. Cameron 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7337fe5389c8SStephen M. Cameron 	if (rc) {
7338fe5389c8SStephen M. Cameron 		dev_warn(&pdev->dev,
7339050f7147SStephen Cameron 			"Failed waiting for board to become ready after hard reset\n");
7340fe5389c8SStephen M. Cameron 		goto unmap_cfgtable;
7341fe5389c8SStephen M. Cameron 	}
7342fe5389c8SStephen M. Cameron 
7343580ada3cSStephen M. Cameron 	rc = controller_reset_failed(vaddr);
7344580ada3cSStephen M. Cameron 	if (rc < 0)
7345580ada3cSStephen M. Cameron 		goto unmap_cfgtable;
7346580ada3cSStephen M. Cameron 	if (rc) {
734764670ac8SStephen M. Cameron 		dev_warn(&pdev->dev, "Unable to successfully reset "
734864670ac8SStephen M. Cameron 			"controller. Will try soft reset.\n");
734964670ac8SStephen M. Cameron 		rc = -ENOTSUPP;
7350580ada3cSStephen M. Cameron 	} else {
735164670ac8SStephen M. Cameron 		dev_info(&pdev->dev, "board ready after hard reset.\n");
73521df8552aSStephen M. Cameron 	}
73531df8552aSStephen M. Cameron 
73541df8552aSStephen M. Cameron unmap_cfgtable:
73551df8552aSStephen M. Cameron 	iounmap(cfgtable);
73561df8552aSStephen M. Cameron 
73571df8552aSStephen M. Cameron unmap_vaddr:
73581df8552aSStephen M. Cameron 	iounmap(vaddr);
73591df8552aSStephen M. Cameron 	return rc;
7360edd16368SStephen M. Cameron }
7361edd16368SStephen M. Cameron 
7362edd16368SStephen M. Cameron /*
7363edd16368SStephen M. Cameron  *  We cannot read the structure directly, for portability we must use
7364edd16368SStephen M. Cameron  *   the io functions.
7365edd16368SStephen M. Cameron  *   This is for debug only.
7366edd16368SStephen M. Cameron  */
736742a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7368edd16368SStephen M. Cameron {
736958f8665cSStephen M. Cameron #ifdef HPSA_DEBUG
7370edd16368SStephen M. Cameron 	int i;
7371edd16368SStephen M. Cameron 	char temp_name[17];
7372edd16368SStephen M. Cameron 
7373edd16368SStephen M. Cameron 	dev_info(dev, "Controller Configuration information\n");
7374edd16368SStephen M. Cameron 	dev_info(dev, "------------------------------------\n");
7375edd16368SStephen M. Cameron 	for (i = 0; i < 4; i++)
7376edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->Signature[i]));
7377edd16368SStephen M. Cameron 	temp_name[4] = '\0';
7378edd16368SStephen M. Cameron 	dev_info(dev, "   Signature = %s\n", temp_name);
7379edd16368SStephen M. Cameron 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7380edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7381edd16368SStephen M. Cameron 	       readl(&(tb->TransportSupport)));
7382edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods active = 0x%x\n",
7383edd16368SStephen M. Cameron 	       readl(&(tb->TransportActive)));
7384edd16368SStephen M. Cameron 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7385edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.TransportRequest)));
7386edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7387edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntDelay)));
7388edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7389edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntCount)));
739069d6e33dSRobert Elliott 	dev_info(dev, "   Max outstanding commands = %d\n",
7391edd16368SStephen M. Cameron 	       readl(&(tb->CmdsOutMax)));
7392edd16368SStephen M. Cameron 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7393edd16368SStephen M. Cameron 	for (i = 0; i < 16; i++)
7394edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->ServerName[i]));
7395edd16368SStephen M. Cameron 	temp_name[16] = '\0';
7396edd16368SStephen M. Cameron 	dev_info(dev, "   Server Name = %s\n", temp_name);
7397edd16368SStephen M. Cameron 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7398edd16368SStephen M. Cameron 		readl(&(tb->HeartBeat)));
7399edd16368SStephen M. Cameron #endif				/* HPSA_DEBUG */
740058f8665cSStephen M. Cameron }
7401edd16368SStephen M. Cameron 
7402edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7403edd16368SStephen M. Cameron {
7404edd16368SStephen M. Cameron 	int i, offset, mem_type, bar_type;
7405edd16368SStephen M. Cameron 
7406edd16368SStephen M. Cameron 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7407edd16368SStephen M. Cameron 		return 0;
7408edd16368SStephen M. Cameron 	offset = 0;
7409edd16368SStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7410edd16368SStephen M. Cameron 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7411edd16368SStephen M. Cameron 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7412edd16368SStephen M. Cameron 			offset += 4;
7413edd16368SStephen M. Cameron 		else {
7414edd16368SStephen M. Cameron 			mem_type = pci_resource_flags(pdev, i) &
7415edd16368SStephen M. Cameron 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7416edd16368SStephen M. Cameron 			switch (mem_type) {
7417edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7418edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7419edd16368SStephen M. Cameron 				offset += 4;	/* 32 bit */
7420edd16368SStephen M. Cameron 				break;
7421edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7422edd16368SStephen M. Cameron 				offset += 8;
7423edd16368SStephen M. Cameron 				break;
7424edd16368SStephen M. Cameron 			default:	/* reserved in PCI 2.2 */
7425edd16368SStephen M. Cameron 				dev_warn(&pdev->dev,
7426edd16368SStephen M. Cameron 				       "base address is invalid\n");
7427edd16368SStephen M. Cameron 				return -1;
7428edd16368SStephen M. Cameron 				break;
7429edd16368SStephen M. Cameron 			}
7430edd16368SStephen M. Cameron 		}
7431edd16368SStephen M. Cameron 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7432edd16368SStephen M. Cameron 			return i + 1;
7433edd16368SStephen M. Cameron 	}
7434edd16368SStephen M. Cameron 	return -1;
7435edd16368SStephen M. Cameron }
7436edd16368SStephen M. Cameron 
7437cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7438cc64c817SRobert Elliott {
7439bc2bb154SChristoph Hellwig 	pci_free_irq_vectors(h->pdev);
7440bc2bb154SChristoph Hellwig 	h->msix_vectors = 0;
7441cc64c817SRobert Elliott }
7442cc64c817SRobert Elliott 
74438b834bffSMing Lei static void hpsa_setup_reply_map(struct ctlr_info *h)
74448b834bffSMing Lei {
74458b834bffSMing Lei 	const struct cpumask *mask;
74468b834bffSMing Lei 	unsigned int queue, cpu;
74478b834bffSMing Lei 
74488b834bffSMing Lei 	for (queue = 0; queue < h->msix_vectors; queue++) {
74498b834bffSMing Lei 		mask = pci_irq_get_affinity(h->pdev, queue);
74508b834bffSMing Lei 		if (!mask)
74518b834bffSMing Lei 			goto fallback;
74528b834bffSMing Lei 
74538b834bffSMing Lei 		for_each_cpu(cpu, mask)
74548b834bffSMing Lei 			h->reply_map[cpu] = queue;
74558b834bffSMing Lei 	}
74568b834bffSMing Lei 	return;
74578b834bffSMing Lei 
74588b834bffSMing Lei fallback:
74598b834bffSMing Lei 	for_each_possible_cpu(cpu)
74608b834bffSMing Lei 		h->reply_map[cpu] = 0;
74618b834bffSMing Lei }
74628b834bffSMing Lei 
7463edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7464050f7147SStephen Cameron  * controllers that are capable. If not, we use legacy INTx mode.
7465edd16368SStephen M. Cameron  */
7466bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h)
7467edd16368SStephen M. Cameron {
7468bc2bb154SChristoph Hellwig 	unsigned int flags = PCI_IRQ_LEGACY;
7469bc2bb154SChristoph Hellwig 	int ret;
7470edd16368SStephen M. Cameron 
7471edd16368SStephen M. Cameron 	/* Some boards advertise MSI but don't really support it */
7472bc2bb154SChristoph Hellwig 	switch (h->board_id) {
7473bc2bb154SChristoph Hellwig 	case 0x40700E11:
7474bc2bb154SChristoph Hellwig 	case 0x40800E11:
7475bc2bb154SChristoph Hellwig 	case 0x40820E11:
7476bc2bb154SChristoph Hellwig 	case 0x40830E11:
7477bc2bb154SChristoph Hellwig 		break;
7478bc2bb154SChristoph Hellwig 	default:
7479bc2bb154SChristoph Hellwig 		ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7480bc2bb154SChristoph Hellwig 				PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7481bc2bb154SChristoph Hellwig 		if (ret > 0) {
7482bc2bb154SChristoph Hellwig 			h->msix_vectors = ret;
7483bc2bb154SChristoph Hellwig 			return 0;
7484eee0f03aSHannes Reinecke 		}
7485bc2bb154SChristoph Hellwig 
7486bc2bb154SChristoph Hellwig 		flags |= PCI_IRQ_MSI;
7487bc2bb154SChristoph Hellwig 		break;
7488edd16368SStephen M. Cameron 	}
7489bc2bb154SChristoph Hellwig 
7490bc2bb154SChristoph Hellwig 	ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7491bc2bb154SChristoph Hellwig 	if (ret < 0)
7492bc2bb154SChristoph Hellwig 		return ret;
7493bc2bb154SChristoph Hellwig 	return 0;
7494edd16368SStephen M. Cameron }
7495edd16368SStephen M. Cameron 
7496135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7497135ae6edSHannes Reinecke 				bool *legacy_board)
7498e5c880d1SStephen M. Cameron {
7499e5c880d1SStephen M. Cameron 	int i;
7500e5c880d1SStephen M. Cameron 	u32 subsystem_vendor_id, subsystem_device_id;
7501e5c880d1SStephen M. Cameron 
7502e5c880d1SStephen M. Cameron 	subsystem_vendor_id = pdev->subsystem_vendor;
7503e5c880d1SStephen M. Cameron 	subsystem_device_id = pdev->subsystem_device;
7504e5c880d1SStephen M. Cameron 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7505e5c880d1SStephen M. Cameron 		    subsystem_vendor_id;
7506e5c880d1SStephen M. Cameron 
7507135ae6edSHannes Reinecke 	if (legacy_board)
7508135ae6edSHannes Reinecke 		*legacy_board = false;
7509e5c880d1SStephen M. Cameron 	for (i = 0; i < ARRAY_SIZE(products); i++)
7510135ae6edSHannes Reinecke 		if (*board_id == products[i].board_id) {
7511135ae6edSHannes Reinecke 			if (products[i].access != &SA5A_access &&
7512135ae6edSHannes Reinecke 			    products[i].access != &SA5B_access)
7513e5c880d1SStephen M. Cameron 				return i;
7514135ae6edSHannes Reinecke 			dev_warn(&pdev->dev,
7515135ae6edSHannes Reinecke 				 "legacy board ID: 0x%08x\n",
7516135ae6edSHannes Reinecke 				 *board_id);
7517135ae6edSHannes Reinecke 			if (legacy_board)
7518135ae6edSHannes Reinecke 			    *legacy_board = true;
7519135ae6edSHannes Reinecke 			return i;
7520135ae6edSHannes Reinecke 		}
7521e5c880d1SStephen M. Cameron 
7522c8cd71f1SHannes Reinecke 	dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7523135ae6edSHannes Reinecke 	if (legacy_board)
7524135ae6edSHannes Reinecke 		*legacy_board = true;
7525e5c880d1SStephen M. Cameron 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7526e5c880d1SStephen M. Cameron }
7527e5c880d1SStephen M. Cameron 
75286f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
75293a7774ceSStephen M. Cameron 				    unsigned long *memory_bar)
75303a7774ceSStephen M. Cameron {
75313a7774ceSStephen M. Cameron 	int i;
75323a7774ceSStephen M. Cameron 
75333a7774ceSStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
753412d2cd47SStephen M. Cameron 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
75353a7774ceSStephen M. Cameron 			/* addressing mode bits already removed */
753612d2cd47SStephen M. Cameron 			*memory_bar = pci_resource_start(pdev, i);
753712d2cd47SStephen M. Cameron 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
75383a7774ceSStephen M. Cameron 				*memory_bar);
75393a7774ceSStephen M. Cameron 			return 0;
75403a7774ceSStephen M. Cameron 		}
754112d2cd47SStephen M. Cameron 	dev_warn(&pdev->dev, "no memory BAR found\n");
75423a7774ceSStephen M. Cameron 	return -ENODEV;
75433a7774ceSStephen M. Cameron }
75443a7774ceSStephen M. Cameron 
75456f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
75466f039790SGreg Kroah-Hartman 				     int wait_for_ready)
75472c4c8c8bSStephen M. Cameron {
7548fe5389c8SStephen M. Cameron 	int i, iterations;
75492c4c8c8bSStephen M. Cameron 	u32 scratchpad;
7550fe5389c8SStephen M. Cameron 	if (wait_for_ready)
7551fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_READY_ITERATIONS;
7552fe5389c8SStephen M. Cameron 	else
7553fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
75542c4c8c8bSStephen M. Cameron 
7555fe5389c8SStephen M. Cameron 	for (i = 0; i < iterations; i++) {
7556fe5389c8SStephen M. Cameron 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7557fe5389c8SStephen M. Cameron 		if (wait_for_ready) {
75582c4c8c8bSStephen M. Cameron 			if (scratchpad == HPSA_FIRMWARE_READY)
75592c4c8c8bSStephen M. Cameron 				return 0;
7560fe5389c8SStephen M. Cameron 		} else {
7561fe5389c8SStephen M. Cameron 			if (scratchpad != HPSA_FIRMWARE_READY)
7562fe5389c8SStephen M. Cameron 				return 0;
7563fe5389c8SStephen M. Cameron 		}
75642c4c8c8bSStephen M. Cameron 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
75652c4c8c8bSStephen M. Cameron 	}
7566fe5389c8SStephen M. Cameron 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
75672c4c8c8bSStephen M. Cameron 	return -ENODEV;
75682c4c8c8bSStephen M. Cameron }
75692c4c8c8bSStephen M. Cameron 
75706f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
75716f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7572a51fd47fSStephen M. Cameron 			       u64 *cfg_offset)
7573a51fd47fSStephen M. Cameron {
7574a51fd47fSStephen M. Cameron 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7575a51fd47fSStephen M. Cameron 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7576a51fd47fSStephen M. Cameron 	*cfg_base_addr &= (u32) 0x0000ffff;
7577a51fd47fSStephen M. Cameron 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7578a51fd47fSStephen M. Cameron 	if (*cfg_base_addr_index == -1) {
7579a51fd47fSStephen M. Cameron 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7580a51fd47fSStephen M. Cameron 		return -ENODEV;
7581a51fd47fSStephen M. Cameron 	}
7582a51fd47fSStephen M. Cameron 	return 0;
7583a51fd47fSStephen M. Cameron }
7584a51fd47fSStephen M. Cameron 
7585195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h)
7586195f2c65SRobert Elliott {
7587105a3dbcSRobert Elliott 	if (h->transtable) {
7588195f2c65SRobert Elliott 		iounmap(h->transtable);
7589105a3dbcSRobert Elliott 		h->transtable = NULL;
7590105a3dbcSRobert Elliott 	}
7591105a3dbcSRobert Elliott 	if (h->cfgtable) {
7592195f2c65SRobert Elliott 		iounmap(h->cfgtable);
7593105a3dbcSRobert Elliott 		h->cfgtable = NULL;
7594105a3dbcSRobert Elliott 	}
7595195f2c65SRobert Elliott }
7596195f2c65SRobert Elliott 
7597195f2c65SRobert Elliott /* Find and map CISS config table and transfer table
7598195f2c65SRobert Elliott + * several items must be unmapped (freed) later
7599195f2c65SRobert Elliott + * */
76006f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h)
7601edd16368SStephen M. Cameron {
760201a02ffcSStephen M. Cameron 	u64 cfg_offset;
760301a02ffcSStephen M. Cameron 	u32 cfg_base_addr;
760401a02ffcSStephen M. Cameron 	u64 cfg_base_addr_index;
7605303932fdSDon Brace 	u32 trans_offset;
7606a51fd47fSStephen M. Cameron 	int rc;
760777c4495cSStephen M. Cameron 
7608a51fd47fSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7609a51fd47fSStephen M. Cameron 		&cfg_base_addr_index, &cfg_offset);
7610a51fd47fSStephen M. Cameron 	if (rc)
7611a51fd47fSStephen M. Cameron 		return rc;
761277c4495cSStephen M. Cameron 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7613a51fd47fSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7614cd3c81c4SRobert Elliott 	if (!h->cfgtable) {
7615cd3c81c4SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
761677c4495cSStephen M. Cameron 		return -ENOMEM;
7617cd3c81c4SRobert Elliott 	}
7618580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7619580ada3cSStephen M. Cameron 	if (rc)
7620580ada3cSStephen M. Cameron 		return rc;
762177c4495cSStephen M. Cameron 	/* Find performant mode table. */
7622a51fd47fSStephen M. Cameron 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
762377c4495cSStephen M. Cameron 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
762477c4495cSStephen M. Cameron 				cfg_base_addr_index)+cfg_offset+trans_offset,
762577c4495cSStephen M. Cameron 				sizeof(*h->transtable));
7626195f2c65SRobert Elliott 	if (!h->transtable) {
7627195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7628195f2c65SRobert Elliott 		hpsa_free_cfgtables(h);
762977c4495cSStephen M. Cameron 		return -ENOMEM;
7630195f2c65SRobert Elliott 	}
763177c4495cSStephen M. Cameron 	return 0;
763277c4495cSStephen M. Cameron }
763377c4495cSStephen M. Cameron 
76346f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7635cba3d38bSStephen M. Cameron {
763641ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16
763741ce4c35SStephen Cameron 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
763841ce4c35SStephen Cameron 
763941ce4c35SStephen Cameron 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
764072ceeaecSStephen M. Cameron 
764172ceeaecSStephen M. Cameron 	/* Limit commands in memory limited kdump scenario. */
764272ceeaecSStephen M. Cameron 	if (reset_devices && h->max_commands > 32)
764372ceeaecSStephen M. Cameron 		h->max_commands = 32;
764472ceeaecSStephen M. Cameron 
764541ce4c35SStephen Cameron 	if (h->max_commands < MIN_MAX_COMMANDS) {
764641ce4c35SStephen Cameron 		dev_warn(&h->pdev->dev,
764741ce4c35SStephen Cameron 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
764841ce4c35SStephen Cameron 			h->max_commands,
764941ce4c35SStephen Cameron 			MIN_MAX_COMMANDS);
765041ce4c35SStephen Cameron 		h->max_commands = MIN_MAX_COMMANDS;
7651cba3d38bSStephen M. Cameron 	}
7652cba3d38bSStephen M. Cameron }
7653cba3d38bSStephen M. Cameron 
7654c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512,
7655c7ee65b3SWebb Scales  * then we know that chained SG blocks work.  (Original smart arrays did not
7656c7ee65b3SWebb Scales  * support chained SG blocks and would return zero for max sg entries.)
7657c7ee65b3SWebb Scales  */
7658c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7659c7ee65b3SWebb Scales {
7660c7ee65b3SWebb Scales 	return h->maxsgentries > 512;
7661c7ee65b3SWebb Scales }
7662c7ee65b3SWebb Scales 
7663b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits:
7664b93d7536SStephen M. Cameron  * max commands, max SG elements without chaining, and with chaining,
7665b93d7536SStephen M. Cameron  * SG chain block size, etc.
7666b93d7536SStephen M. Cameron  */
76676f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h)
7668b93d7536SStephen M. Cameron {
7669cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
767045fcb86eSStephen Cameron 	h->nr_cmds = h->max_commands;
7671b93d7536SStephen M. Cameron 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7672283b4a9bSStephen M. Cameron 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7673c7ee65b3SWebb Scales 	if (hpsa_supports_chained_sg_blocks(h)) {
7674c7ee65b3SWebb Scales 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7675b93d7536SStephen M. Cameron 		h->max_cmd_sg_entries = 32;
76761a63ea6fSWebb Scales 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7677b93d7536SStephen M. Cameron 		h->maxsgentries--; /* save one for chain pointer */
7678b93d7536SStephen M. Cameron 	} else {
7679c7ee65b3SWebb Scales 		/*
7680c7ee65b3SWebb Scales 		 * Original smart arrays supported at most 31 s/g entries
7681c7ee65b3SWebb Scales 		 * embedded inline in the command (trying to use more
7682c7ee65b3SWebb Scales 		 * would lock up the controller)
7683c7ee65b3SWebb Scales 		 */
7684c7ee65b3SWebb Scales 		h->max_cmd_sg_entries = 31;
76851a63ea6fSWebb Scales 		h->maxsgentries = 31; /* default to traditional values */
7686c7ee65b3SWebb Scales 		h->chainsize = 0;
7687b93d7536SStephen M. Cameron 	}
768875167d2cSStephen M. Cameron 
768975167d2cSStephen M. Cameron 	/* Find out what task management functions are supported and cache */
769075167d2cSStephen M. Cameron 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
76910e7a7fceSScott Teel 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
76920e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
76930e7a7fceSScott Teel 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
76940e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
76958be986ccSStephen Cameron 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
76968be986ccSStephen Cameron 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7697b93d7536SStephen M. Cameron }
7698b93d7536SStephen M. Cameron 
769976c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
770076c46e49SStephen M. Cameron {
77010fc9fd40SAkinobu Mita 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7702050f7147SStephen Cameron 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
770376c46e49SStephen M. Cameron 		return false;
770476c46e49SStephen M. Cameron 	}
770576c46e49SStephen M. Cameron 	return true;
770676c46e49SStephen M. Cameron }
770776c46e49SStephen M. Cameron 
770897a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7709f7c39101SStephen M. Cameron {
771097a5e98cSStephen M. Cameron 	u32 driver_support;
7711f7c39101SStephen M. Cameron 
771297a5e98cSStephen M. Cameron 	driver_support = readl(&(h->cfgtable->driver_support));
77130b9e7b74SArnd Bergmann 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
77140b9e7b74SArnd Bergmann #ifdef CONFIG_X86
771597a5e98cSStephen M. Cameron 	driver_support |= ENABLE_SCSI_PREFETCH;
7716f7c39101SStephen M. Cameron #endif
771728e13446SStephen M. Cameron 	driver_support |= ENABLE_UNIT_ATTN;
771828e13446SStephen M. Cameron 	writel(driver_support, &(h->cfgtable->driver_support));
7719f7c39101SStephen M. Cameron }
7720f7c39101SStephen M. Cameron 
77213d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
77223d0eab67SStephen M. Cameron  * in a prefetch beyond physical memory.
77233d0eab67SStephen M. Cameron  */
77243d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
77253d0eab67SStephen M. Cameron {
77263d0eab67SStephen M. Cameron 	u32 dma_prefetch;
77273d0eab67SStephen M. Cameron 
77283d0eab67SStephen M. Cameron 	if (h->board_id != 0x3225103C)
77293d0eab67SStephen M. Cameron 		return;
77303d0eab67SStephen M. Cameron 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
77313d0eab67SStephen M. Cameron 	dma_prefetch |= 0x8000;
77323d0eab67SStephen M. Cameron 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
77333d0eab67SStephen M. Cameron }
77343d0eab67SStephen M. Cameron 
7735c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
773676438d08SStephen M. Cameron {
773776438d08SStephen M. Cameron 	int i;
773876438d08SStephen M. Cameron 	u32 doorbell_value;
773976438d08SStephen M. Cameron 	unsigned long flags;
774076438d08SStephen M. Cameron 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7741007e7aa9SRobert Elliott 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
774276438d08SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
774376438d08SStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
774476438d08SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
774576438d08SStephen M. Cameron 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7746c706a795SRobert Elliott 			goto done;
774776438d08SStephen M. Cameron 		/* delay and try again */
7748007e7aa9SRobert Elliott 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
774976438d08SStephen M. Cameron 	}
7750c706a795SRobert Elliott 	return -ENODEV;
7751c706a795SRobert Elliott done:
7752c706a795SRobert Elliott 	return 0;
775376438d08SStephen M. Cameron }
775476438d08SStephen M. Cameron 
7755c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7756eb6b2ae9SStephen M. Cameron {
7757eb6b2ae9SStephen M. Cameron 	int i;
77586eaf46fdSStephen M. Cameron 	u32 doorbell_value;
77596eaf46fdSStephen M. Cameron 	unsigned long flags;
7760eb6b2ae9SStephen M. Cameron 
7761eb6b2ae9SStephen M. Cameron 	/* under certain very rare conditions, this can take awhile.
7762eb6b2ae9SStephen M. Cameron 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7763eb6b2ae9SStephen M. Cameron 	 * as we enter this code.)
7764eb6b2ae9SStephen M. Cameron 	 */
7765007e7aa9SRobert Elliott 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
776625163bd5SWebb Scales 		if (h->remove_in_progress)
776725163bd5SWebb Scales 			goto done;
77686eaf46fdSStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
77696eaf46fdSStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
77706eaf46fdSStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
7771382be668SDan Carpenter 		if (!(doorbell_value & CFGTBL_ChangeReq))
7772c706a795SRobert Elliott 			goto done;
7773eb6b2ae9SStephen M. Cameron 		/* delay and try again */
7774007e7aa9SRobert Elliott 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7775eb6b2ae9SStephen M. Cameron 	}
7776c706a795SRobert Elliott 	return -ENODEV;
7777c706a795SRobert Elliott done:
7778c706a795SRobert Elliott 	return 0;
77793f4336f3SStephen M. Cameron }
77803f4336f3SStephen M. Cameron 
7781c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */
77826f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h)
77833f4336f3SStephen M. Cameron {
77843f4336f3SStephen M. Cameron 	u32 trans_support;
77853f4336f3SStephen M. Cameron 
77863f4336f3SStephen M. Cameron 	trans_support = readl(&(h->cfgtable->TransportSupport));
77873f4336f3SStephen M. Cameron 	if (!(trans_support & SIMPLE_MODE))
77883f4336f3SStephen M. Cameron 		return -ENOTSUPP;
77893f4336f3SStephen M. Cameron 
77903f4336f3SStephen M. Cameron 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7791283b4a9bSStephen M. Cameron 
77923f4336f3SStephen M. Cameron 	/* Update the field, and then ring the doorbell */
77933f4336f3SStephen M. Cameron 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7794b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
77953f4336f3SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7796c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h))
7797c706a795SRobert Elliott 		goto error;
7798eb6b2ae9SStephen M. Cameron 	print_cfg_table(&h->pdev->dev, h->cfgtable);
7799283b4a9bSStephen M. Cameron 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7800283b4a9bSStephen M. Cameron 		goto error;
7801960a30e7SStephen M. Cameron 	h->transMethod = CFGTBL_Trans_Simple;
7802eb6b2ae9SStephen M. Cameron 	return 0;
7803283b4a9bSStephen M. Cameron error:
7804050f7147SStephen Cameron 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7805283b4a9bSStephen M. Cameron 	return -ENODEV;
7806eb6b2ae9SStephen M. Cameron }
7807eb6b2ae9SStephen M. Cameron 
7808195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */
7809195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h)
7810195f2c65SRobert Elliott {
7811195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);			/* pci_init 4 */
7812195f2c65SRobert Elliott 	iounmap(h->vaddr);			/* pci_init 3 */
7813105a3dbcSRobert Elliott 	h->vaddr = NULL;
7814195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7815943a7021SRobert Elliott 	/*
7816943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7817bff9e34cSMauro Carvalho Chehab 	 * Documentation/driver-api/pci/pci.rst
7818943a7021SRobert Elliott 	 */
7819195f2c65SRobert Elliott 	pci_disable_device(h->pdev);		/* pci_init 1 */
7820943a7021SRobert Elliott 	pci_release_regions(h->pdev);		/* pci_init 2 */
7821195f2c65SRobert Elliott }
7822195f2c65SRobert Elliott 
7823195f2c65SRobert Elliott /* several items must be freed later */
78246f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h)
782577c4495cSStephen M. Cameron {
7826eb6b2ae9SStephen M. Cameron 	int prod_index, err;
7827135ae6edSHannes Reinecke 	bool legacy_board;
7828edd16368SStephen M. Cameron 
7829135ae6edSHannes Reinecke 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7830e5c880d1SStephen M. Cameron 	if (prod_index < 0)
783160f923b9SRobert Elliott 		return prod_index;
7832e5c880d1SStephen M. Cameron 	h->product_name = products[prod_index].product_name;
7833e5c880d1SStephen M. Cameron 	h->access = *(products[prod_index].access);
7834135ae6edSHannes Reinecke 	h->legacy_board = legacy_board;
7835e5a44df8SMatthew Garrett 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7836e5a44df8SMatthew Garrett 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7837e5a44df8SMatthew Garrett 
783855c06c71SStephen M. Cameron 	err = pci_enable_device(h->pdev);
7839edd16368SStephen M. Cameron 	if (err) {
7840195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7841943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7842edd16368SStephen M. Cameron 		return err;
7843edd16368SStephen M. Cameron 	}
7844edd16368SStephen M. Cameron 
7845f79cfec6SStephen M. Cameron 	err = pci_request_regions(h->pdev, HPSA);
7846edd16368SStephen M. Cameron 	if (err) {
784755c06c71SStephen M. Cameron 		dev_err(&h->pdev->dev,
7848195f2c65SRobert Elliott 			"failed to obtain PCI resources\n");
7849943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7850943a7021SRobert Elliott 		return err;
7851edd16368SStephen M. Cameron 	}
78524fa604e1SRobert Elliott 
78534fa604e1SRobert Elliott 	pci_set_master(h->pdev);
78544fa604e1SRobert Elliott 
7855bc2bb154SChristoph Hellwig 	err = hpsa_interrupt_mode(h);
7856bc2bb154SChristoph Hellwig 	if (err)
7857bc2bb154SChristoph Hellwig 		goto clean1;
78588b834bffSMing Lei 
78598b834bffSMing Lei 	/* setup mapping between CPU and reply queue */
78608b834bffSMing Lei 	hpsa_setup_reply_map(h);
78618b834bffSMing Lei 
786212d2cd47SStephen M. Cameron 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
78633a7774ceSStephen M. Cameron 	if (err)
7864195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7865edd16368SStephen M. Cameron 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
7866204892e9SStephen M. Cameron 	if (!h->vaddr) {
7867195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7868204892e9SStephen M. Cameron 		err = -ENOMEM;
7869195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7870204892e9SStephen M. Cameron 	}
7871fe5389c8SStephen M. Cameron 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
78722c4c8c8bSStephen M. Cameron 	if (err)
7873195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
787477c4495cSStephen M. Cameron 	err = hpsa_find_cfgtables(h);
787577c4495cSStephen M. Cameron 	if (err)
7876195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
7877b93d7536SStephen M. Cameron 	hpsa_find_board_params(h);
7878edd16368SStephen M. Cameron 
787976c46e49SStephen M. Cameron 	if (!hpsa_CISS_signature_present(h)) {
7880edd16368SStephen M. Cameron 		err = -ENODEV;
7881195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7882edd16368SStephen M. Cameron 	}
788397a5e98cSStephen M. Cameron 	hpsa_set_driver_support_bits(h);
78843d0eab67SStephen M. Cameron 	hpsa_p600_dma_prefetch_quirk(h);
7885eb6b2ae9SStephen M. Cameron 	err = hpsa_enter_simple_mode(h);
7886eb6b2ae9SStephen M. Cameron 	if (err)
7887195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7888edd16368SStephen M. Cameron 	return 0;
7889edd16368SStephen M. Cameron 
7890195f2c65SRobert Elliott clean4:	/* cfgtables, vaddr, intmode+region, pci */
7891195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);
7892195f2c65SRobert Elliott clean3:	/* vaddr, intmode+region, pci */
7893204892e9SStephen M. Cameron 	iounmap(h->vaddr);
7894105a3dbcSRobert Elliott 	h->vaddr = NULL;
7895195f2c65SRobert Elliott clean2:	/* intmode+region, pci */
7896195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);
7897bc2bb154SChristoph Hellwig clean1:
7898943a7021SRobert Elliott 	/*
7899943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7900bff9e34cSMauro Carvalho Chehab 	 * Documentation/driver-api/pci/pci.rst
7901943a7021SRobert Elliott 	 */
7902195f2c65SRobert Elliott 	pci_disable_device(h->pdev);
7903943a7021SRobert Elliott 	pci_release_regions(h->pdev);
7904edd16368SStephen M. Cameron 	return err;
7905edd16368SStephen M. Cameron }
7906edd16368SStephen M. Cameron 
79076f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h)
7908339b2b14SStephen M. Cameron {
7909339b2b14SStephen M. Cameron 	int rc;
7910339b2b14SStephen M. Cameron 
7911339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64
7912339b2b14SStephen M. Cameron 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7913339b2b14SStephen M. Cameron 	if (!h->hba_inquiry_data)
7914339b2b14SStephen M. Cameron 		return;
7915339b2b14SStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7916339b2b14SStephen M. Cameron 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7917339b2b14SStephen M. Cameron 	if (rc != 0) {
7918339b2b14SStephen M. Cameron 		kfree(h->hba_inquiry_data);
7919339b2b14SStephen M. Cameron 		h->hba_inquiry_data = NULL;
7920339b2b14SStephen M. Cameron 	}
7921339b2b14SStephen M. Cameron }
7922339b2b14SStephen M. Cameron 
79236b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7924edd16368SStephen M. Cameron {
79251df8552aSStephen M. Cameron 	int rc, i;
79263b747298STomas Henzl 	void __iomem *vaddr;
7927edd16368SStephen M. Cameron 
79284c2a8c40SStephen M. Cameron 	if (!reset_devices)
79294c2a8c40SStephen M. Cameron 		return 0;
79304c2a8c40SStephen M. Cameron 
7931132aa220STomas Henzl 	/* kdump kernel is loading, we don't know in which state is
7932132aa220STomas Henzl 	 * the pci interface. The dev->enable_cnt is equal zero
7933132aa220STomas Henzl 	 * so we call enable+disable, wait a while and switch it on.
7934132aa220STomas Henzl 	 */
7935132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7936132aa220STomas Henzl 	if (rc) {
7937132aa220STomas Henzl 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7938132aa220STomas Henzl 		return -ENODEV;
7939132aa220STomas Henzl 	}
7940132aa220STomas Henzl 	pci_disable_device(pdev);
7941132aa220STomas Henzl 	msleep(260);			/* a randomly chosen number */
7942132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7943132aa220STomas Henzl 	if (rc) {
7944132aa220STomas Henzl 		dev_warn(&pdev->dev, "failed to enable device.\n");
7945132aa220STomas Henzl 		return -ENODEV;
7946132aa220STomas Henzl 	}
79474fa604e1SRobert Elliott 
7948859c75abSTomas Henzl 	pci_set_master(pdev);
79494fa604e1SRobert Elliott 
79503b747298STomas Henzl 	vaddr = pci_ioremap_bar(pdev, 0);
79513b747298STomas Henzl 	if (vaddr == NULL) {
79523b747298STomas Henzl 		rc = -ENOMEM;
79533b747298STomas Henzl 		goto out_disable;
79543b747298STomas Henzl 	}
79553b747298STomas Henzl 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
79563b747298STomas Henzl 	iounmap(vaddr);
79573b747298STomas Henzl 
79581df8552aSStephen M. Cameron 	/* Reset the controller with a PCI power-cycle or via doorbell */
79596b6c1cd7STomas Henzl 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7960edd16368SStephen M. Cameron 
79611df8552aSStephen M. Cameron 	/* -ENOTSUPP here means we cannot reset the controller
79621df8552aSStephen M. Cameron 	 * but it's already (and still) up and running in
796318867659SStephen M. Cameron 	 * "performant mode".  Or, it might be 640x, which can't reset
796418867659SStephen M. Cameron 	 * due to concerns about shared bbwc between 6402/6404 pair.
79651df8552aSStephen M. Cameron 	 */
7966adf1b3a3SRobert Elliott 	if (rc)
7967132aa220STomas Henzl 		goto out_disable;
7968edd16368SStephen M. Cameron 
7969edd16368SStephen M. Cameron 	/* Now try to get the controller to respond to a no-op */
79701ba66c9cSRobert Elliott 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7971edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7972edd16368SStephen M. Cameron 		if (hpsa_noop(pdev) == 0)
7973edd16368SStephen M. Cameron 			break;
7974edd16368SStephen M. Cameron 		else
7975edd16368SStephen M. Cameron 			dev_warn(&pdev->dev, "no-op failed%s\n",
7976edd16368SStephen M. Cameron 					(i < 11 ? "; re-trying" : ""));
7977edd16368SStephen M. Cameron 	}
7978132aa220STomas Henzl 
7979132aa220STomas Henzl out_disable:
7980132aa220STomas Henzl 
7981132aa220STomas Henzl 	pci_disable_device(pdev);
7982132aa220STomas Henzl 	return rc;
7983edd16368SStephen M. Cameron }
7984edd16368SStephen M. Cameron 
79851fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h)
79861fb7c98aSRobert Elliott {
79871fb7c98aSRobert Elliott 	kfree(h->cmd_pool_bits);
7988105a3dbcSRobert Elliott 	h->cmd_pool_bits = NULL;
7989105a3dbcSRobert Elliott 	if (h->cmd_pool) {
79908bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
79911fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct CommandList),
79921fb7c98aSRobert Elliott 				h->cmd_pool,
79931fb7c98aSRobert Elliott 				h->cmd_pool_dhandle);
7994105a3dbcSRobert Elliott 		h->cmd_pool = NULL;
7995105a3dbcSRobert Elliott 		h->cmd_pool_dhandle = 0;
7996105a3dbcSRobert Elliott 	}
7997105a3dbcSRobert Elliott 	if (h->errinfo_pool) {
79988bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
79991fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct ErrorInfo),
80001fb7c98aSRobert Elliott 				h->errinfo_pool,
80011fb7c98aSRobert Elliott 				h->errinfo_pool_dhandle);
8002105a3dbcSRobert Elliott 		h->errinfo_pool = NULL;
8003105a3dbcSRobert Elliott 		h->errinfo_pool_dhandle = 0;
8004105a3dbcSRobert Elliott 	}
80051fb7c98aSRobert Elliott }
80061fb7c98aSRobert Elliott 
8007d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
80082e9d1b36SStephen M. Cameron {
80096396bb22SKees Cook 	h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
80106396bb22SKees Cook 				   sizeof(unsigned long),
80116396bb22SKees Cook 				   GFP_KERNEL);
80128bc8f47eSChristoph Hellwig 	h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
80132e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->cmd_pool),
80148bc8f47eSChristoph Hellwig 		    &h->cmd_pool_dhandle, GFP_KERNEL);
80158bc8f47eSChristoph Hellwig 	h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
80162e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->errinfo_pool),
80178bc8f47eSChristoph Hellwig 		    &h->errinfo_pool_dhandle, GFP_KERNEL);
80182e9d1b36SStephen M. Cameron 	if ((h->cmd_pool_bits == NULL)
80192e9d1b36SStephen M. Cameron 	    || (h->cmd_pool == NULL)
80202e9d1b36SStephen M. Cameron 	    || (h->errinfo_pool == NULL)) {
80212e9d1b36SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
80222c143342SRobert Elliott 		goto clean_up;
80232e9d1b36SStephen M. Cameron 	}
8024360c73bdSStephen Cameron 	hpsa_preinitialize_commands(h);
80252e9d1b36SStephen M. Cameron 	return 0;
80262c143342SRobert Elliott clean_up:
80272c143342SRobert Elliott 	hpsa_free_cmd_pool(h);
80282c143342SRobert Elliott 	return -ENOMEM;
80292e9d1b36SStephen M. Cameron }
80302e9d1b36SStephen M. Cameron 
8031ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8032ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h)
8033ec501a18SRobert Elliott {
8034ec501a18SRobert Elliott 	int i;
8035a68fdb3aSDon Brace 	int irq_vector = 0;
8036a68fdb3aSDon Brace 
8037a68fdb3aSDon Brace 	if (hpsa_simple_mode)
8038a68fdb3aSDon Brace 		irq_vector = h->intr_mode;
8039ec501a18SRobert Elliott 
8040bc2bb154SChristoph Hellwig 	if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8041ec501a18SRobert Elliott 		/* Single reply queue, only one irq to free */
8042a68fdb3aSDon Brace 		free_irq(pci_irq_vector(h->pdev, irq_vector),
8043a68fdb3aSDon Brace 				&h->q[h->intr_mode]);
8044bc2bb154SChristoph Hellwig 		h->q[h->intr_mode] = 0;
8045ec501a18SRobert Elliott 		return;
8046ec501a18SRobert Elliott 	}
8047ec501a18SRobert Elliott 
8048bc2bb154SChristoph Hellwig 	for (i = 0; i < h->msix_vectors; i++) {
8049bc2bb154SChristoph Hellwig 		free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8050105a3dbcSRobert Elliott 		h->q[i] = 0;
8051ec501a18SRobert Elliott 	}
8052a4e17fc1SRobert Elliott 	for (; i < MAX_REPLY_QUEUES; i++)
8053a4e17fc1SRobert Elliott 		h->q[i] = 0;
8054ec501a18SRobert Elliott }
8055ec501a18SRobert Elliott 
80569ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */
80579ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h,
80580ae01a32SStephen M. Cameron 	irqreturn_t (*msixhandler)(int, void *),
80590ae01a32SStephen M. Cameron 	irqreturn_t (*intxhandler)(int, void *))
80600ae01a32SStephen M. Cameron {
8061254f796bSMatt Gates 	int rc, i;
8062a68fdb3aSDon Brace 	int irq_vector = 0;
8063a68fdb3aSDon Brace 
8064a68fdb3aSDon Brace 	if (hpsa_simple_mode)
8065a68fdb3aSDon Brace 		irq_vector = h->intr_mode;
80660ae01a32SStephen M. Cameron 
8067254f796bSMatt Gates 	/*
8068254f796bSMatt Gates 	 * initialize h->q[x] = x so that interrupt handlers know which
8069254f796bSMatt Gates 	 * queue to process.
8070254f796bSMatt Gates 	 */
8071254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8072254f796bSMatt Gates 		h->q[i] = (u8) i;
8073254f796bSMatt Gates 
8074bc2bb154SChristoph Hellwig 	if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8075254f796bSMatt Gates 		/* If performant mode and MSI-X, use multiple reply queues */
8076bc2bb154SChristoph Hellwig 		for (i = 0; i < h->msix_vectors; i++) {
80778b47004aSRobert Elliott 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8078bc2bb154SChristoph Hellwig 			rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
80798b47004aSRobert Elliott 					0, h->intrname[i],
8080254f796bSMatt Gates 					&h->q[i]);
8081a4e17fc1SRobert Elliott 			if (rc) {
8082a4e17fc1SRobert Elliott 				int j;
8083a4e17fc1SRobert Elliott 
8084a4e17fc1SRobert Elliott 				dev_err(&h->pdev->dev,
8085a4e17fc1SRobert Elliott 					"failed to get irq %d for %s\n",
8086bc2bb154SChristoph Hellwig 				       pci_irq_vector(h->pdev, i), h->devname);
8087a4e17fc1SRobert Elliott 				for (j = 0; j < i; j++) {
8088bc2bb154SChristoph Hellwig 					free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8089a4e17fc1SRobert Elliott 					h->q[j] = 0;
8090a4e17fc1SRobert Elliott 				}
8091a4e17fc1SRobert Elliott 				for (; j < MAX_REPLY_QUEUES; j++)
8092a4e17fc1SRobert Elliott 					h->q[j] = 0;
8093a4e17fc1SRobert Elliott 				return rc;
8094a4e17fc1SRobert Elliott 			}
8095a4e17fc1SRobert Elliott 		}
8096254f796bSMatt Gates 	} else {
8097254f796bSMatt Gates 		/* Use single reply pool */
8098bc2bb154SChristoph Hellwig 		if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8099bc2bb154SChristoph Hellwig 			sprintf(h->intrname[0], "%s-msi%s", h->devname,
8100bc2bb154SChristoph Hellwig 				h->msix_vectors ? "x" : "");
8101a68fdb3aSDon Brace 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
81028b47004aSRobert Elliott 				msixhandler, 0,
8103bc2bb154SChristoph Hellwig 				h->intrname[0],
8104254f796bSMatt Gates 				&h->q[h->intr_mode]);
8105254f796bSMatt Gates 		} else {
81068b47004aSRobert Elliott 			sprintf(h->intrname[h->intr_mode],
81078b47004aSRobert Elliott 				"%s-intx", h->devname);
8108a68fdb3aSDon Brace 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
81098b47004aSRobert Elliott 				intxhandler, IRQF_SHARED,
8110bc2bb154SChristoph Hellwig 				h->intrname[0],
8111254f796bSMatt Gates 				&h->q[h->intr_mode]);
8112254f796bSMatt Gates 		}
8113254f796bSMatt Gates 	}
81140ae01a32SStephen M. Cameron 	if (rc) {
8115195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8116a68fdb3aSDon Brace 		       pci_irq_vector(h->pdev, irq_vector), h->devname);
8117195f2c65SRobert Elliott 		hpsa_free_irqs(h);
81180ae01a32SStephen M. Cameron 		return -ENODEV;
81190ae01a32SStephen M. Cameron 	}
81200ae01a32SStephen M. Cameron 	return 0;
81210ae01a32SStephen M. Cameron }
81220ae01a32SStephen M. Cameron 
81236f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h)
812464670ac8SStephen M. Cameron {
812539c53f55SRobert Elliott 	int rc;
8126c5dfd106SDon Brace 	hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
812764670ac8SStephen M. Cameron 
812864670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
812939c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
813039c53f55SRobert Elliott 	if (rc) {
813164670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
813239c53f55SRobert Elliott 		return rc;
813364670ac8SStephen M. Cameron 	}
813464670ac8SStephen M. Cameron 
813564670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
813639c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
813739c53f55SRobert Elliott 	if (rc) {
813864670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Board failed to become ready "
813964670ac8SStephen M. Cameron 			"after soft reset.\n");
814039c53f55SRobert Elliott 		return rc;
814164670ac8SStephen M. Cameron 	}
814264670ac8SStephen M. Cameron 
814364670ac8SStephen M. Cameron 	return 0;
814464670ac8SStephen M. Cameron }
814564670ac8SStephen M. Cameron 
8146072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h)
8147072b0518SStephen M. Cameron {
8148072b0518SStephen M. Cameron 	int i;
8149072b0518SStephen M. Cameron 
8150072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++) {
8151072b0518SStephen M. Cameron 		if (!h->reply_queue[i].head)
8152072b0518SStephen M. Cameron 			continue;
81538bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
81541fb7c98aSRobert Elliott 					h->reply_queue_size,
81551fb7c98aSRobert Elliott 					h->reply_queue[i].head,
81561fb7c98aSRobert Elliott 					h->reply_queue[i].busaddr);
8157072b0518SStephen M. Cameron 		h->reply_queue[i].head = NULL;
8158072b0518SStephen M. Cameron 		h->reply_queue[i].busaddr = 0;
8159072b0518SStephen M. Cameron 	}
8160105a3dbcSRobert Elliott 	h->reply_queue_size = 0;
8161072b0518SStephen M. Cameron }
8162072b0518SStephen M. Cameron 
81630097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
81640097f0f4SStephen M. Cameron {
8165105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);		/* init_one 7 */
8166105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8167105a3dbcSRobert Elliott 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8168105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
81692946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);		/* init_one 3 */
81702946e82bSRobert Elliott 	h->scsi_host = NULL;			/* init_one 3 */
81712946e82bSRobert Elliott 	hpsa_free_pci_init(h);			/* init_one 2_5 */
81729ecd953aSRobert Elliott 	free_percpu(h->lockup_detected);	/* init_one 2 */
81739ecd953aSRobert Elliott 	h->lockup_detected = NULL;		/* init_one 2 */
81749ecd953aSRobert Elliott 	if (h->resubmit_wq) {
81759ecd953aSRobert Elliott 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
81769ecd953aSRobert Elliott 		h->resubmit_wq = NULL;
81779ecd953aSRobert Elliott 	}
81789ecd953aSRobert Elliott 	if (h->rescan_ctlr_wq) {
81799ecd953aSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
81809ecd953aSRobert Elliott 		h->rescan_ctlr_wq = NULL;
81819ecd953aSRobert Elliott 	}
818201192088SDon Brace 	if (h->monitor_ctlr_wq) {
818301192088SDon Brace 		destroy_workqueue(h->monitor_ctlr_wq);
818401192088SDon Brace 		h->monitor_ctlr_wq = NULL;
818501192088SDon Brace 	}
818601192088SDon Brace 
8187105a3dbcSRobert Elliott 	kfree(h);				/* init_one 1 */
818864670ac8SStephen M. Cameron }
818964670ac8SStephen M. Cameron 
8190a0c12413SStephen M. Cameron /* Called when controller lockup detected. */
8191f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h)
8192a0c12413SStephen M. Cameron {
8193281a7fd0SWebb Scales 	int i, refcount;
8194281a7fd0SWebb Scales 	struct CommandList *c;
819525163bd5SWebb Scales 	int failcount = 0;
8196a0c12413SStephen M. Cameron 
8197080ef1ccSDon Brace 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8198f2405db8SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
8199f2405db8SDon Brace 		c = h->cmd_pool + i;
8200281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
8201281a7fd0SWebb Scales 		if (refcount > 1) {
820225163bd5SWebb Scales 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
82035a3d16f5SStephen M. Cameron 			finish_cmd(c);
8204433b5f4dSStephen Cameron 			atomic_dec(&h->commands_outstanding);
820525163bd5SWebb Scales 			failcount++;
8206a0c12413SStephen M. Cameron 		}
8207281a7fd0SWebb Scales 		cmd_free(h, c);
8208281a7fd0SWebb Scales 	}
820925163bd5SWebb Scales 	dev_warn(&h->pdev->dev,
821025163bd5SWebb Scales 		"failed %d commands in fail_all\n", failcount);
8211a0c12413SStephen M. Cameron }
8212a0c12413SStephen M. Cameron 
8213094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8214094963daSStephen M. Cameron {
8215c8ed0010SRusty Russell 	int cpu;
8216094963daSStephen M. Cameron 
8217c8ed0010SRusty Russell 	for_each_online_cpu(cpu) {
8218094963daSStephen M. Cameron 		u32 *lockup_detected;
8219094963daSStephen M. Cameron 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8220094963daSStephen M. Cameron 		*lockup_detected = value;
8221094963daSStephen M. Cameron 	}
8222094963daSStephen M. Cameron 	wmb(); /* be sure the per-cpu variables are out to memory */
8223094963daSStephen M. Cameron }
8224094963daSStephen M. Cameron 
8225a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h)
8226a0c12413SStephen M. Cameron {
8227a0c12413SStephen M. Cameron 	unsigned long flags;
8228094963daSStephen M. Cameron 	u32 lockup_detected;
8229a0c12413SStephen M. Cameron 
8230a0c12413SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8231a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8232094963daSStephen M. Cameron 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8233094963daSStephen M. Cameron 	if (!lockup_detected) {
8234094963daSStephen M. Cameron 		/* no heartbeat, but controller gave us a zero. */
8235094963daSStephen M. Cameron 		dev_warn(&h->pdev->dev,
823625163bd5SWebb Scales 			"lockup detected after %d but scratchpad register is zero\n",
823725163bd5SWebb Scales 			h->heartbeat_sample_interval / HZ);
8238094963daSStephen M. Cameron 		lockup_detected = 0xffffffff;
8239094963daSStephen M. Cameron 	}
8240094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8241a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
824225163bd5SWebb Scales 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
824325163bd5SWebb Scales 			lockup_detected, h->heartbeat_sample_interval / HZ);
8244b9b08cadSDon Brace 	if (lockup_detected == 0xffff0000) {
8245b9b08cadSDon Brace 		dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8246b9b08cadSDon Brace 		writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8247b9b08cadSDon Brace 	}
8248a0c12413SStephen M. Cameron 	pci_disable_device(h->pdev);
8249f2405db8SDon Brace 	fail_all_outstanding_cmds(h);
8250a0c12413SStephen M. Cameron }
8251a0c12413SStephen M. Cameron 
825225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h)
8253a0c12413SStephen M. Cameron {
8254a0c12413SStephen M. Cameron 	u64 now;
8255a0c12413SStephen M. Cameron 	u32 heartbeat;
8256a0c12413SStephen M. Cameron 	unsigned long flags;
8257a0c12413SStephen M. Cameron 
8258a0c12413SStephen M. Cameron 	now = get_jiffies_64();
8259a0c12413SStephen M. Cameron 	/* If we've received an interrupt recently, we're ok. */
8260a0c12413SStephen M. Cameron 	if (time_after64(h->last_intr_timestamp +
8261e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
826225163bd5SWebb Scales 		return false;
8263a0c12413SStephen M. Cameron 
8264a0c12413SStephen M. Cameron 	/*
8265a0c12413SStephen M. Cameron 	 * If we've already checked the heartbeat recently, we're ok.
8266a0c12413SStephen M. Cameron 	 * This could happen if someone sends us a signal. We
8267a0c12413SStephen M. Cameron 	 * otherwise don't care about signals in this thread.
8268a0c12413SStephen M. Cameron 	 */
8269a0c12413SStephen M. Cameron 	if (time_after64(h->last_heartbeat_timestamp +
8270e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
827125163bd5SWebb Scales 		return false;
8272a0c12413SStephen M. Cameron 
8273a0c12413SStephen M. Cameron 	/* If heartbeat has not changed since we last looked, we're not ok. */
8274a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8275a0c12413SStephen M. Cameron 	heartbeat = readl(&h->cfgtable->HeartBeat);
8276a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8277a0c12413SStephen M. Cameron 	if (h->last_heartbeat == heartbeat) {
8278a0c12413SStephen M. Cameron 		controller_lockup_detected(h);
827925163bd5SWebb Scales 		return true;
8280a0c12413SStephen M. Cameron 	}
8281a0c12413SStephen M. Cameron 
8282a0c12413SStephen M. Cameron 	/* We're ok. */
8283a0c12413SStephen M. Cameron 	h->last_heartbeat = heartbeat;
8284a0c12413SStephen M. Cameron 	h->last_heartbeat_timestamp = now;
828525163bd5SWebb Scales 	return false;
8286a0c12413SStephen M. Cameron }
8287a0c12413SStephen M. Cameron 
8288b2582a65SDon Brace /*
8289b2582a65SDon Brace  * Set ioaccel status for all ioaccel volumes.
8290b2582a65SDon Brace  *
8291b2582a65SDon Brace  * Called from monitor controller worker (hpsa_event_monitor_worker)
8292b2582a65SDon Brace  *
82933e16e83aSDon Brace  * A Volume (or Volumes that comprise an Array set) may be undergoing a
8294b2582a65SDon Brace  * transformation, so we will be turning off ioaccel for all volumes that
8295b2582a65SDon Brace  * make up the Array.
8296b2582a65SDon Brace  */
8297b2582a65SDon Brace static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8298b2582a65SDon Brace {
8299b2582a65SDon Brace 	int rc;
8300b2582a65SDon Brace 	int i;
8301b2582a65SDon Brace 	u8 ioaccel_status;
8302b2582a65SDon Brace 	unsigned char *buf;
8303b2582a65SDon Brace 	struct hpsa_scsi_dev_t *device;
8304b2582a65SDon Brace 
8305b2582a65SDon Brace 	if (!h)
8306b2582a65SDon Brace 		return;
8307b2582a65SDon Brace 
8308b2582a65SDon Brace 	buf = kmalloc(64, GFP_KERNEL);
8309b2582a65SDon Brace 	if (!buf)
8310b2582a65SDon Brace 		return;
8311b2582a65SDon Brace 
8312b2582a65SDon Brace 	/*
8313b2582a65SDon Brace 	 * Run through current device list used during I/O requests.
8314b2582a65SDon Brace 	 */
8315b2582a65SDon Brace 	for (i = 0; i < h->ndevices; i++) {
83163e16e83aSDon Brace 		int offload_to_be_enabled = 0;
83173e16e83aSDon Brace 		int offload_config = 0;
83183e16e83aSDon Brace 
8319b2582a65SDon Brace 		device = h->dev[i];
8320b2582a65SDon Brace 
8321b2582a65SDon Brace 		if (!device)
8322b2582a65SDon Brace 			continue;
8323b2582a65SDon Brace 		if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8324b2582a65SDon Brace 						HPSA_VPD_LV_IOACCEL_STATUS))
8325b2582a65SDon Brace 			continue;
8326b2582a65SDon Brace 
8327b2582a65SDon Brace 		memset(buf, 0, 64);
8328b2582a65SDon Brace 
8329b2582a65SDon Brace 		rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8330b2582a65SDon Brace 					VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8331b2582a65SDon Brace 					buf, 64);
8332b2582a65SDon Brace 		if (rc != 0)
8333b2582a65SDon Brace 			continue;
8334b2582a65SDon Brace 
8335b2582a65SDon Brace 		ioaccel_status = buf[IOACCEL_STATUS_BYTE];
83363e16e83aSDon Brace 
83373e16e83aSDon Brace 		/*
83383e16e83aSDon Brace 		 * Check if offload is still configured on
83393e16e83aSDon Brace 		 */
83403e16e83aSDon Brace 		offload_config =
8341b2582a65SDon Brace 				!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
83423e16e83aSDon Brace 		/*
83433e16e83aSDon Brace 		 * If offload is configured on, check to see if ioaccel
83443e16e83aSDon Brace 		 * needs to be enabled.
83453e16e83aSDon Brace 		 */
83463e16e83aSDon Brace 		if (offload_config)
83473e16e83aSDon Brace 			offload_to_be_enabled =
8348b2582a65SDon Brace 				!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8349b2582a65SDon Brace 
8350b2582a65SDon Brace 		/*
83513e16e83aSDon Brace 		 * If ioaccel is to be re-enabled, re-enable later during the
83523e16e83aSDon Brace 		 * scan operation so the driver can get a fresh raidmap
83533e16e83aSDon Brace 		 * before turning ioaccel back on.
83543e16e83aSDon Brace 		 */
83553e16e83aSDon Brace 		if (offload_to_be_enabled)
83563e16e83aSDon Brace 			continue;
83573e16e83aSDon Brace 
83583e16e83aSDon Brace 		/*
8359b2582a65SDon Brace 		 * Immediately turn off ioaccel for any volume the
8360b2582a65SDon Brace 		 * controller tells us to. Some of the reasons could be:
8361b2582a65SDon Brace 		 *    transformation - change to the LVs of an Array.
8362b2582a65SDon Brace 		 *    degraded volume - component failure
8363b2582a65SDon Brace 		 */
83643e16e83aSDon Brace 		hpsa_turn_off_ioaccel_for_device(device);
8365b2582a65SDon Brace 	}
8366b2582a65SDon Brace 
8367b2582a65SDon Brace 	kfree(buf);
8368b2582a65SDon Brace }
8369b2582a65SDon Brace 
83709846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h)
837176438d08SStephen M. Cameron {
837276438d08SStephen M. Cameron 	char *event_type;
837376438d08SStephen M. Cameron 
8374e4aa3e6aSStephen Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8375e4aa3e6aSStephen Cameron 		return;
8376e4aa3e6aSStephen Cameron 
837776438d08SStephen M. Cameron 	/* Ask the controller to clear the events we're handling. */
83781f7cee8cSStephen M. Cameron 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
83791f7cee8cSStephen M. Cameron 			| CFGTBL_Trans_io_accel2)) &&
838076438d08SStephen M. Cameron 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
838176438d08SStephen M. Cameron 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
838276438d08SStephen M. Cameron 
838376438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
838476438d08SStephen M. Cameron 			event_type = "state change";
838576438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
838676438d08SStephen M. Cameron 			event_type = "configuration change";
838776438d08SStephen M. Cameron 		/* Stop sending new RAID offload reqs via the IO accelerator */
838876438d08SStephen M. Cameron 		scsi_block_requests(h->scsi_host);
8389b2582a65SDon Brace 		hpsa_set_ioaccel_status(h);
839023100dd9SStephen M. Cameron 		hpsa_drain_accel_commands(h);
839176438d08SStephen M. Cameron 		/* Set 'accelerator path config change' bit */
839276438d08SStephen M. Cameron 		dev_warn(&h->pdev->dev,
839376438d08SStephen M. Cameron 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
839476438d08SStephen M. Cameron 			h->events, event_type);
839576438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
839676438d08SStephen M. Cameron 		/* Set the "clear event notify field update" bit 6 */
839776438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
839876438d08SStephen M. Cameron 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
839976438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
840076438d08SStephen M. Cameron 		scsi_unblock_requests(h->scsi_host);
840176438d08SStephen M. Cameron 	} else {
840276438d08SStephen M. Cameron 		/* Acknowledge controller notification events. */
840376438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
840476438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
840576438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
840676438d08SStephen M. Cameron 	}
84079846590eSStephen M. Cameron 	return;
840876438d08SStephen M. Cameron }
840976438d08SStephen M. Cameron 
841076438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration
841176438d08SStephen M. Cameron  * changes (added/changed/removed logical drives, etc.) which mean that
8412e863d68eSScott Teel  * we should rescan the controller for devices.
8413e863d68eSScott Teel  * Also check flag for driver-initiated rescan.
841476438d08SStephen M. Cameron  */
84159846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
841676438d08SStephen M. Cameron {
8417853633e8SDon Brace 	if (h->drv_req_rescan) {
8418853633e8SDon Brace 		h->drv_req_rescan = 0;
8419853633e8SDon Brace 		return 1;
8420853633e8SDon Brace 	}
8421853633e8SDon Brace 
842276438d08SStephen M. Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
84239846590eSStephen M. Cameron 		return 0;
842476438d08SStephen M. Cameron 
842576438d08SStephen M. Cameron 	h->events = readl(&(h->cfgtable->event_notify));
84269846590eSStephen M. Cameron 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
84279846590eSStephen M. Cameron }
842876438d08SStephen M. Cameron 
842976438d08SStephen M. Cameron /*
84309846590eSStephen M. Cameron  * Check if any of the offline devices have become ready
843176438d08SStephen M. Cameron  */
84329846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h)
84339846590eSStephen M. Cameron {
84349846590eSStephen M. Cameron 	unsigned long flags;
84359846590eSStephen M. Cameron 	struct offline_device_entry *d;
84369846590eSStephen M. Cameron 	struct list_head *this, *tmp;
84379846590eSStephen M. Cameron 
84389846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
84399846590eSStephen M. Cameron 	list_for_each_safe(this, tmp, &h->offline_device_list) {
84409846590eSStephen M. Cameron 		d = list_entry(this, struct offline_device_entry,
84419846590eSStephen M. Cameron 				offline_list);
84429846590eSStephen M. Cameron 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8443d1fea47cSStephen M. Cameron 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8444d1fea47cSStephen M. Cameron 			spin_lock_irqsave(&h->offline_device_lock, flags);
8445d1fea47cSStephen M. Cameron 			list_del(&d->offline_list);
8446d1fea47cSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
84479846590eSStephen M. Cameron 			return 1;
8448d1fea47cSStephen M. Cameron 		}
84499846590eSStephen M. Cameron 		spin_lock_irqsave(&h->offline_device_lock, flags);
845076438d08SStephen M. Cameron 	}
84519846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
84529846590eSStephen M. Cameron 	return 0;
84539846590eSStephen M. Cameron }
84549846590eSStephen M. Cameron 
845534592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h)
845634592254SScott Teel {
845734592254SScott Teel 	int rc = 1; /* assume there are changes */
845834592254SScott Teel 	struct ReportLUNdata *logdev = NULL;
845934592254SScott Teel 
846034592254SScott Teel 	/* if we can't find out if lun data has changed,
846134592254SScott Teel 	 * assume that it has.
846234592254SScott Teel 	 */
846334592254SScott Teel 
846434592254SScott Teel 	if (!h->lastlogicals)
84657e8a9486SAmit Kushwaha 		return rc;
846634592254SScott Teel 
846734592254SScott Teel 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
84687e8a9486SAmit Kushwaha 	if (!logdev)
84697e8a9486SAmit Kushwaha 		return rc;
84707e8a9486SAmit Kushwaha 
847134592254SScott Teel 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
847234592254SScott Teel 		dev_warn(&h->pdev->dev,
847334592254SScott Teel 			"report luns failed, can't track lun changes.\n");
847434592254SScott Teel 		goto out;
847534592254SScott Teel 	}
847634592254SScott Teel 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
847734592254SScott Teel 		dev_info(&h->pdev->dev,
847834592254SScott Teel 			"Lun changes detected.\n");
847934592254SScott Teel 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
848034592254SScott Teel 		goto out;
848134592254SScott Teel 	} else
848234592254SScott Teel 		rc = 0; /* no changes detected. */
848334592254SScott Teel out:
848434592254SScott Teel 	kfree(logdev);
848534592254SScott Teel 	return rc;
848634592254SScott Teel }
848734592254SScott Teel 
84883d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h)
8489a0c12413SStephen M. Cameron {
84903d38f00cSScott Teel 	struct Scsi_Host *sh = NULL;
8491a0c12413SStephen M. Cameron 	unsigned long flags;
84929846590eSStephen M. Cameron 
8493bfd7546cSDon Brace 	/*
8494bfd7546cSDon Brace 	 * Do the scan after the reset
8495bfd7546cSDon Brace 	 */
8496c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
8497bfd7546cSDon Brace 	if (h->reset_in_progress) {
8498bfd7546cSDon Brace 		h->drv_req_rescan = 1;
8499c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
8500bfd7546cSDon Brace 		return;
8501bfd7546cSDon Brace 	}
8502c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
8503bfd7546cSDon Brace 
850434592254SScott Teel 	sh = scsi_host_get(h->scsi_host);
850534592254SScott Teel 	if (sh != NULL) {
850634592254SScott Teel 		hpsa_scan_start(sh);
850734592254SScott Teel 		scsi_host_put(sh);
85083d38f00cSScott Teel 		h->drv_req_rescan = 0;
850934592254SScott Teel 	}
851034592254SScott Teel }
85113d38f00cSScott Teel 
85123d38f00cSScott Teel /*
85133d38f00cSScott Teel  * watch for controller events
85143d38f00cSScott Teel  */
85153d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work)
85163d38f00cSScott Teel {
85173d38f00cSScott Teel 	struct ctlr_info *h = container_of(to_delayed_work(work),
85183d38f00cSScott Teel 					struct ctlr_info, event_monitor_work);
85193d38f00cSScott Teel 	unsigned long flags;
85203d38f00cSScott Teel 
85213d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85223d38f00cSScott Teel 	if (h->remove_in_progress) {
85233d38f00cSScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
85243d38f00cSScott Teel 		return;
85253d38f00cSScott Teel 	}
85263d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85273d38f00cSScott Teel 
85283d38f00cSScott Teel 	if (hpsa_ctlr_needs_rescan(h)) {
85293d38f00cSScott Teel 		hpsa_ack_ctlr_events(h);
85303d38f00cSScott Teel 		hpsa_perform_rescan(h);
85313d38f00cSScott Teel 	}
85323d38f00cSScott Teel 
85333d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85343d38f00cSScott Teel 	if (!h->remove_in_progress)
853501192088SDon Brace 		queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
85363d38f00cSScott Teel 				HPSA_EVENT_MONITOR_INTERVAL);
85373d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85383d38f00cSScott Teel }
85393d38f00cSScott Teel 
85403d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work)
85413d38f00cSScott Teel {
85423d38f00cSScott Teel 	unsigned long flags;
85433d38f00cSScott Teel 	struct ctlr_info *h = container_of(to_delayed_work(work),
85443d38f00cSScott Teel 					struct ctlr_info, rescan_ctlr_work);
85453d38f00cSScott Teel 
85463d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85473d38f00cSScott Teel 	if (h->remove_in_progress) {
85483d38f00cSScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
85493d38f00cSScott Teel 		return;
85503d38f00cSScott Teel 	}
85513d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85523d38f00cSScott Teel 
85533d38f00cSScott Teel 	if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
85543d38f00cSScott Teel 		hpsa_perform_rescan(h);
85553d38f00cSScott Teel 	} else if (h->discovery_polling) {
85563d38f00cSScott Teel 		if (hpsa_luns_changed(h)) {
85573d38f00cSScott Teel 			dev_info(&h->pdev->dev,
85583d38f00cSScott Teel 				"driver discovery polling rescan.\n");
85593d38f00cSScott Teel 			hpsa_perform_rescan(h);
85603d38f00cSScott Teel 		}
85619846590eSStephen M. Cameron 	}
85626636e7f4SDon Brace 	spin_lock_irqsave(&h->lock, flags);
85636636e7f4SDon Brace 	if (!h->remove_in_progress)
85646636e7f4SDon Brace 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
85656636e7f4SDon Brace 				h->heartbeat_sample_interval);
85666636e7f4SDon Brace 	spin_unlock_irqrestore(&h->lock, flags);
85676636e7f4SDon Brace }
85686636e7f4SDon Brace 
85696636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work)
85706636e7f4SDon Brace {
85716636e7f4SDon Brace 	unsigned long flags;
85726636e7f4SDon Brace 	struct ctlr_info *h = container_of(to_delayed_work(work),
85736636e7f4SDon Brace 					struct ctlr_info, monitor_ctlr_work);
85746636e7f4SDon Brace 
85756636e7f4SDon Brace 	detect_controller_lockup(h);
85766636e7f4SDon Brace 	if (lockup_detected(h))
85776636e7f4SDon Brace 		return;
85789846590eSStephen M. Cameron 
85798a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
85806636e7f4SDon Brace 	if (!h->remove_in_progress)
858101192088SDon Brace 		queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
85828a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
85838a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8584a0c12413SStephen M. Cameron }
8585a0c12413SStephen M. Cameron 
85866636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
85876636e7f4SDon Brace 						char *name)
85886636e7f4SDon Brace {
85896636e7f4SDon Brace 	struct workqueue_struct *wq = NULL;
85906636e7f4SDon Brace 
8591397ea9cbSDon Brace 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
85926636e7f4SDon Brace 	if (!wq)
85936636e7f4SDon Brace 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
85946636e7f4SDon Brace 
85956636e7f4SDon Brace 	return wq;
85966636e7f4SDon Brace }
85976636e7f4SDon Brace 
85988b834bffSMing Lei static void hpda_free_ctlr_info(struct ctlr_info *h)
85998b834bffSMing Lei {
86008b834bffSMing Lei 	kfree(h->reply_map);
86018b834bffSMing Lei 	kfree(h);
86028b834bffSMing Lei }
86038b834bffSMing Lei 
86048b834bffSMing Lei static struct ctlr_info *hpda_alloc_ctlr_info(void)
86058b834bffSMing Lei {
86068b834bffSMing Lei 	struct ctlr_info *h;
86078b834bffSMing Lei 
86088b834bffSMing Lei 	h = kzalloc(sizeof(*h), GFP_KERNEL);
86098b834bffSMing Lei 	if (!h)
86108b834bffSMing Lei 		return NULL;
86118b834bffSMing Lei 
86126396bb22SKees Cook 	h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
86138b834bffSMing Lei 	if (!h->reply_map) {
86148b834bffSMing Lei 		kfree(h);
86158b834bffSMing Lei 		return NULL;
86168b834bffSMing Lei 	}
86178b834bffSMing Lei 	return h;
86188b834bffSMing Lei }
86198b834bffSMing Lei 
86206f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
86214c2a8c40SStephen M. Cameron {
86224c2a8c40SStephen M. Cameron 	int dac, rc;
86234c2a8c40SStephen M. Cameron 	struct ctlr_info *h;
862464670ac8SStephen M. Cameron 	int try_soft_reset = 0;
862564670ac8SStephen M. Cameron 	unsigned long flags;
86266b6c1cd7STomas Henzl 	u32 board_id;
86274c2a8c40SStephen M. Cameron 
86284c2a8c40SStephen M. Cameron 	if (number_of_controllers == 0)
86294c2a8c40SStephen M. Cameron 		printk(KERN_INFO DRIVER_NAME "\n");
86304c2a8c40SStephen M. Cameron 
8631135ae6edSHannes Reinecke 	rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
86326b6c1cd7STomas Henzl 	if (rc < 0) {
86336b6c1cd7STomas Henzl 		dev_warn(&pdev->dev, "Board ID not found\n");
86346b6c1cd7STomas Henzl 		return rc;
86356b6c1cd7STomas Henzl 	}
86366b6c1cd7STomas Henzl 
86376b6c1cd7STomas Henzl 	rc = hpsa_init_reset_devices(pdev, board_id);
863864670ac8SStephen M. Cameron 	if (rc) {
863964670ac8SStephen M. Cameron 		if (rc != -ENOTSUPP)
86404c2a8c40SStephen M. Cameron 			return rc;
864164670ac8SStephen M. Cameron 		/* If the reset fails in a particular way (it has no way to do
864264670ac8SStephen M. Cameron 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
864364670ac8SStephen M. Cameron 		 * a soft reset once we get the controller configured up to the
864464670ac8SStephen M. Cameron 		 * point that it can accept a command.
864564670ac8SStephen M. Cameron 		 */
864664670ac8SStephen M. Cameron 		try_soft_reset = 1;
864764670ac8SStephen M. Cameron 		rc = 0;
864864670ac8SStephen M. Cameron 	}
864964670ac8SStephen M. Cameron 
865064670ac8SStephen M. Cameron reinit_after_soft_reset:
86514c2a8c40SStephen M. Cameron 
8652303932fdSDon Brace 	/* Command structures must be aligned on a 32-byte boundary because
8653303932fdSDon Brace 	 * the 5 lower bits of the address are used by the hardware. and by
8654303932fdSDon Brace 	 * the driver.  See comments in hpsa.h for more info.
8655303932fdSDon Brace 	 */
8656303932fdSDon Brace 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
86578b834bffSMing Lei 	h = hpda_alloc_ctlr_info();
8658105a3dbcSRobert Elliott 	if (!h) {
8659105a3dbcSRobert Elliott 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8660ecd9aad4SStephen M. Cameron 		return -ENOMEM;
8661105a3dbcSRobert Elliott 	}
8662edd16368SStephen M. Cameron 
866355c06c71SStephen M. Cameron 	h->pdev = pdev;
8664105a3dbcSRobert Elliott 
8665a9a3a273SStephen M. Cameron 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
86669846590eSStephen M. Cameron 	INIT_LIST_HEAD(&h->offline_device_list);
86676eaf46fdSStephen M. Cameron 	spin_lock_init(&h->lock);
86689846590eSStephen M. Cameron 	spin_lock_init(&h->offline_device_lock);
86696eaf46fdSStephen M. Cameron 	spin_lock_init(&h->scan_lock);
8670c59d04f3SDon Brace 	spin_lock_init(&h->reset_lock);
867134f0c627SDon Brace 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8672094963daSStephen M. Cameron 
8673094963daSStephen M. Cameron 	/* Allocate and clear per-cpu variable lockup_detected */
8674094963daSStephen M. Cameron 	h->lockup_detected = alloc_percpu(u32);
86752a5ac326SStephen M. Cameron 	if (!h->lockup_detected) {
8676105a3dbcSRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
86772a5ac326SStephen M. Cameron 		rc = -ENOMEM;
86782efa5929SRobert Elliott 		goto clean1;	/* aer/h */
86792a5ac326SStephen M. Cameron 	}
8680094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, 0);
8681094963daSStephen M. Cameron 
868255c06c71SStephen M. Cameron 	rc = hpsa_pci_init(h);
8683105a3dbcSRobert Elliott 	if (rc)
86842946e82bSRobert Elliott 		goto clean2;	/* lu, aer/h */
8685edd16368SStephen M. Cameron 
86862946e82bSRobert Elliott 	/* relies on h-> settings made by hpsa_pci_init, including
86872946e82bSRobert Elliott 	 * interrupt_mode h->intr */
86882946e82bSRobert Elliott 	rc = hpsa_scsi_host_alloc(h);
86892946e82bSRobert Elliott 	if (rc)
86902946e82bSRobert Elliott 		goto clean2_5;	/* pci, lu, aer/h */
86912946e82bSRobert Elliott 
86922946e82bSRobert Elliott 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8693edd16368SStephen M. Cameron 	h->ctlr = number_of_controllers;
8694edd16368SStephen M. Cameron 	number_of_controllers++;
8695edd16368SStephen M. Cameron 
8696edd16368SStephen M. Cameron 	/* configure PCI DMA stuff */
86978bc8f47eSChristoph Hellwig 	rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8698ecd9aad4SStephen M. Cameron 	if (rc == 0) {
8699edd16368SStephen M. Cameron 		dac = 1;
8700ecd9aad4SStephen M. Cameron 	} else {
87018bc8f47eSChristoph Hellwig 		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8702ecd9aad4SStephen M. Cameron 		if (rc == 0) {
8703edd16368SStephen M. Cameron 			dac = 0;
8704ecd9aad4SStephen M. Cameron 		} else {
8705edd16368SStephen M. Cameron 			dev_err(&pdev->dev, "no suitable DMA available\n");
87062946e82bSRobert Elliott 			goto clean3;	/* shost, pci, lu, aer/h */
8707edd16368SStephen M. Cameron 		}
8708ecd9aad4SStephen M. Cameron 	}
8709edd16368SStephen M. Cameron 
8710edd16368SStephen M. Cameron 	/* make sure the board interrupts are off */
8711edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
871210f66018SStephen M. Cameron 
8713105a3dbcSRobert Elliott 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8714105a3dbcSRobert Elliott 	if (rc)
87152946e82bSRobert Elliott 		goto clean3;	/* shost, pci, lu, aer/h */
8716d37ffbe4SRobert Elliott 	rc = hpsa_alloc_cmd_pool(h);
87178947fd10SRobert Elliott 	if (rc)
87182946e82bSRobert Elliott 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8719105a3dbcSRobert Elliott 	rc = hpsa_alloc_sg_chain_blocks(h);
8720105a3dbcSRobert Elliott 	if (rc)
87212946e82bSRobert Elliott 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8722a08a8471SStephen M. Cameron 	init_waitqueue_head(&h->scan_wait_queue);
8723d604f533SWebb Scales 	init_waitqueue_head(&h->event_sync_wait_queue);
8724d604f533SWebb Scales 	mutex_init(&h->reset_mutex);
8725a08a8471SStephen M. Cameron 	h->scan_finished = 1; /* no scan currently in progress */
872687b9e6aaSDon Brace 	h->scan_waiting = 0;
8727edd16368SStephen M. Cameron 
8728edd16368SStephen M. Cameron 	pci_set_drvdata(pdev, h);
87299a41338eSStephen M. Cameron 	h->ndevices = 0;
87302946e82bSRobert Elliott 
87319a41338eSStephen M. Cameron 	spin_lock_init(&h->devlock);
8732105a3dbcSRobert Elliott 	rc = hpsa_put_ctlr_into_performant_mode(h);
8733105a3dbcSRobert Elliott 	if (rc)
87342946e82bSRobert Elliott 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
87352946e82bSRobert Elliott 
87362efa5929SRobert Elliott 	/* create the resubmit workqueue */
87372efa5929SRobert Elliott 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
87382efa5929SRobert Elliott 	if (!h->rescan_ctlr_wq) {
87392efa5929SRobert Elliott 		rc = -ENOMEM;
87402efa5929SRobert Elliott 		goto clean7;
87412efa5929SRobert Elliott 	}
87422efa5929SRobert Elliott 
87432efa5929SRobert Elliott 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
87442efa5929SRobert Elliott 	if (!h->resubmit_wq) {
87452efa5929SRobert Elliott 		rc = -ENOMEM;
87462efa5929SRobert Elliott 		goto clean7;	/* aer/h */
87472efa5929SRobert Elliott 	}
874864670ac8SStephen M. Cameron 
874901192088SDon Brace 	h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
875001192088SDon Brace 	if (!h->monitor_ctlr_wq) {
875101192088SDon Brace 		rc = -ENOMEM;
875201192088SDon Brace 		goto clean7;
875301192088SDon Brace 	}
875401192088SDon Brace 
8755105a3dbcSRobert Elliott 	/*
8756105a3dbcSRobert Elliott 	 * At this point, the controller is ready to take commands.
875764670ac8SStephen M. Cameron 	 * Now, if reset_devices and the hard reset didn't work, try
875864670ac8SStephen M. Cameron 	 * the soft reset and see if that works.
875964670ac8SStephen M. Cameron 	 */
876064670ac8SStephen M. Cameron 	if (try_soft_reset) {
876164670ac8SStephen M. Cameron 
876264670ac8SStephen M. Cameron 		/* This is kind of gross.  We may or may not get a completion
876364670ac8SStephen M. Cameron 		 * from the soft reset command, and if we do, then the value
876464670ac8SStephen M. Cameron 		 * from the fifo may or may not be valid.  So, we wait 10 secs
876564670ac8SStephen M. Cameron 		 * after the reset throwing away any completions we get during
876664670ac8SStephen M. Cameron 		 * that time.  Unregister the interrupt handler and register
876764670ac8SStephen M. Cameron 		 * fake ones to scoop up any residual completions.
876864670ac8SStephen M. Cameron 		 */
876964670ac8SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
877064670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
877164670ac8SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
8772ec501a18SRobert Elliott 		hpsa_free_irqs(h);
87739ee61794SRobert Elliott 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
877464670ac8SStephen M. Cameron 					hpsa_intx_discard_completions);
877564670ac8SStephen M. Cameron 		if (rc) {
87769ee61794SRobert Elliott 			dev_warn(&h->pdev->dev,
87779ee61794SRobert Elliott 				"Failed to request_irq after soft reset.\n");
8778d498757cSRobert Elliott 			/*
8779b2ef480cSRobert Elliott 			 * cannot goto clean7 or free_irqs will be called
8780b2ef480cSRobert Elliott 			 * again. Instead, do its work
8781b2ef480cSRobert Elliott 			 */
8782b2ef480cSRobert Elliott 			hpsa_free_performant_mode(h);	/* clean7 */
8783b2ef480cSRobert Elliott 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8784b2ef480cSRobert Elliott 			hpsa_free_cmd_pool(h);		/* clean5 */
8785b2ef480cSRobert Elliott 			/*
8786b2ef480cSRobert Elliott 			 * skip hpsa_free_irqs(h) clean4 since that
8787b2ef480cSRobert Elliott 			 * was just called before request_irqs failed
8788d498757cSRobert Elliott 			 */
8789d498757cSRobert Elliott 			goto clean3;
879064670ac8SStephen M. Cameron 		}
879164670ac8SStephen M. Cameron 
879264670ac8SStephen M. Cameron 		rc = hpsa_kdump_soft_reset(h);
879364670ac8SStephen M. Cameron 		if (rc)
879464670ac8SStephen M. Cameron 			/* Neither hard nor soft reset worked, we're hosed. */
87957ef7323fSDon Brace 			goto clean7;
879664670ac8SStephen M. Cameron 
879764670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev, "Board READY.\n");
879864670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev,
879964670ac8SStephen M. Cameron 			"Waiting for stale completions to drain.\n");
880064670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_ON);
880164670ac8SStephen M. Cameron 		msleep(10000);
880264670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
880364670ac8SStephen M. Cameron 
880464670ac8SStephen M. Cameron 		rc = controller_reset_failed(h->cfgtable);
880564670ac8SStephen M. Cameron 		if (rc)
880664670ac8SStephen M. Cameron 			dev_info(&h->pdev->dev,
880764670ac8SStephen M. Cameron 				"Soft reset appears to have failed.\n");
880864670ac8SStephen M. Cameron 
880964670ac8SStephen M. Cameron 		/* since the controller's reset, we have to go back and re-init
881064670ac8SStephen M. Cameron 		 * everything.  Easiest to just forget what we've done and do it
881164670ac8SStephen M. Cameron 		 * all over again.
881264670ac8SStephen M. Cameron 		 */
881364670ac8SStephen M. Cameron 		hpsa_undo_allocations_after_kdump_soft_reset(h);
881464670ac8SStephen M. Cameron 		try_soft_reset = 0;
881564670ac8SStephen M. Cameron 		if (rc)
8816b2ef480cSRobert Elliott 			/* don't goto clean, we already unallocated */
881764670ac8SStephen M. Cameron 			return -ENODEV;
881864670ac8SStephen M. Cameron 
881964670ac8SStephen M. Cameron 		goto reinit_after_soft_reset;
882064670ac8SStephen M. Cameron 	}
8821edd16368SStephen M. Cameron 
8822da0697bdSScott Teel 	/* Enable Accelerated IO path at driver layer */
8823da0697bdSScott Teel 	h->acciopath_status = 1;
882434592254SScott Teel 	/* Disable discovery polling.*/
882534592254SScott Teel 	h->discovery_polling = 0;
8826da0697bdSScott Teel 
8827e863d68eSScott Teel 
8828edd16368SStephen M. Cameron 	/* Turn the interrupts on so we can service requests */
8829edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8830edd16368SStephen M. Cameron 
8831339b2b14SStephen M. Cameron 	hpsa_hba_inquiry(h);
88328a98db73SStephen M. Cameron 
883334592254SScott Teel 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
883434592254SScott Teel 	if (!h->lastlogicals)
883534592254SScott Teel 		dev_info(&h->pdev->dev,
883634592254SScott Teel 			"Can't track change to report lun data\n");
883734592254SScott Teel 
8838cf477237SDon Brace 	/* hook into SCSI subsystem */
8839cf477237SDon Brace 	rc = hpsa_scsi_add_host(h);
8840cf477237SDon Brace 	if (rc)
8841cf477237SDon Brace 		goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8842cf477237SDon Brace 
88438a98db73SStephen M. Cameron 	/* Monitor the controller for firmware lockups */
88448a98db73SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
88458a98db73SStephen M. Cameron 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
88468a98db73SStephen M. Cameron 	schedule_delayed_work(&h->monitor_ctlr_work,
88478a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
88486636e7f4SDon Brace 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
88496636e7f4SDon Brace 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
88506636e7f4SDon Brace 				h->heartbeat_sample_interval);
88513d38f00cSScott Teel 	INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
88523d38f00cSScott Teel 	schedule_delayed_work(&h->event_monitor_work,
88533d38f00cSScott Teel 				HPSA_EVENT_MONITOR_INTERVAL);
885488bf6d62SStephen M. Cameron 	return 0;
8855edd16368SStephen M. Cameron 
88562946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8857105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);
8858105a3dbcSRobert Elliott 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8859105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
886033a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
88612946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */
88622e9d1b36SStephen M. Cameron 	hpsa_free_cmd_pool(h);
88632946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */
8864ec501a18SRobert Elliott 	hpsa_free_irqs(h);
88652946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */
88662946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);
88672946e82bSRobert Elliott 	h->scsi_host = NULL;
88682946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */
8869195f2c65SRobert Elliott 	hpsa_free_pci_init(h);
88702946e82bSRobert Elliott clean2: /* lu, aer/h */
8871105a3dbcSRobert Elliott 	if (h->lockup_detected) {
8872094963daSStephen M. Cameron 		free_percpu(h->lockup_detected);
8873105a3dbcSRobert Elliott 		h->lockup_detected = NULL;
8874105a3dbcSRobert Elliott 	}
8875105a3dbcSRobert Elliott clean1:	/* wq/aer/h */
8876105a3dbcSRobert Elliott 	if (h->resubmit_wq) {
8877105a3dbcSRobert Elliott 		destroy_workqueue(h->resubmit_wq);
8878105a3dbcSRobert Elliott 		h->resubmit_wq = NULL;
8879105a3dbcSRobert Elliott 	}
8880105a3dbcSRobert Elliott 	if (h->rescan_ctlr_wq) {
8881105a3dbcSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
8882105a3dbcSRobert Elliott 		h->rescan_ctlr_wq = NULL;
8883105a3dbcSRobert Elliott 	}
888401192088SDon Brace 	if (h->monitor_ctlr_wq) {
888501192088SDon Brace 		destroy_workqueue(h->monitor_ctlr_wq);
888601192088SDon Brace 		h->monitor_ctlr_wq = NULL;
888701192088SDon Brace 	}
8888edd16368SStephen M. Cameron 	kfree(h);
8889ecd9aad4SStephen M. Cameron 	return rc;
8890edd16368SStephen M. Cameron }
8891edd16368SStephen M. Cameron 
8892edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h)
8893edd16368SStephen M. Cameron {
8894edd16368SStephen M. Cameron 	char *flush_buf;
8895edd16368SStephen M. Cameron 	struct CommandList *c;
889625163bd5SWebb Scales 	int rc;
8897702890e3SStephen M. Cameron 
8898094963daSStephen M. Cameron 	if (unlikely(lockup_detected(h)))
8899702890e3SStephen M. Cameron 		return;
8900edd16368SStephen M. Cameron 	flush_buf = kzalloc(4, GFP_KERNEL);
8901edd16368SStephen M. Cameron 	if (!flush_buf)
8902edd16368SStephen M. Cameron 		return;
8903edd16368SStephen M. Cameron 
890445fcb86eSStephen Cameron 	c = cmd_alloc(h);
8905bf43caf3SRobert Elliott 
8906a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8907a2dac136SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_CMD)) {
8908a2dac136SStephen M. Cameron 		goto out;
8909a2dac136SStephen M. Cameron 	}
89108bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
89118bc8f47eSChristoph Hellwig 			DEFAULT_TIMEOUT);
891225163bd5SWebb Scales 	if (rc)
891325163bd5SWebb Scales 		goto out;
8914edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus != 0)
8915a2dac136SStephen M. Cameron out:
8916edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
8917edd16368SStephen M. Cameron 			"error flushing cache on controller\n");
891845fcb86eSStephen Cameron 	cmd_free(h, c);
8919edd16368SStephen M. Cameron 	kfree(flush_buf);
8920edd16368SStephen M. Cameron }
8921edd16368SStephen M. Cameron 
8922c2adae44SScott Teel /* Make controller gather fresh report lun data each time we
8923c2adae44SScott Teel  * send down a report luns request
8924c2adae44SScott Teel  */
8925c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h)
8926c2adae44SScott Teel {
8927c2adae44SScott Teel 	u32 *options;
8928c2adae44SScott Teel 	struct CommandList *c;
8929c2adae44SScott Teel 	int rc;
8930c2adae44SScott Teel 
8931c2adae44SScott Teel 	/* Don't bother trying to set diag options if locked up */
8932c2adae44SScott Teel 	if (unlikely(h->lockup_detected))
8933c2adae44SScott Teel 		return;
8934c2adae44SScott Teel 
8935c2adae44SScott Teel 	options = kzalloc(sizeof(*options), GFP_KERNEL);
89367e8a9486SAmit Kushwaha 	if (!options)
8937c2adae44SScott Teel 		return;
8938c2adae44SScott Teel 
8939c2adae44SScott Teel 	c = cmd_alloc(h);
8940c2adae44SScott Teel 
8941c2adae44SScott Teel 	/* first, get the current diag options settings */
8942c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8943c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8944c2adae44SScott Teel 		goto errout;
8945c2adae44SScott Teel 
89468bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
89478bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8948c2adae44SScott Teel 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
8949c2adae44SScott Teel 		goto errout;
8950c2adae44SScott Teel 
8951c2adae44SScott Teel 	/* Now, set the bit for disabling the RLD caching */
8952c2adae44SScott Teel 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8953c2adae44SScott Teel 
8954c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8955c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8956c2adae44SScott Teel 		goto errout;
8957c2adae44SScott Teel 
89588bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
89598bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8960c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8961c2adae44SScott Teel 		goto errout;
8962c2adae44SScott Teel 
8963c2adae44SScott Teel 	/* Now verify that it got set: */
8964c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8965c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8966c2adae44SScott Teel 		goto errout;
8967c2adae44SScott Teel 
89688bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
89698bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8970c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8971c2adae44SScott Teel 		goto errout;
8972c2adae44SScott Teel 
8973d8a080c3SDan Carpenter 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8974c2adae44SScott Teel 		goto out;
8975c2adae44SScott Teel 
8976c2adae44SScott Teel errout:
8977c2adae44SScott Teel 	dev_err(&h->pdev->dev,
8978c2adae44SScott Teel 			"Error: failed to disable report lun data caching.\n");
8979c2adae44SScott Teel out:
8980c2adae44SScott Teel 	cmd_free(h, c);
8981c2adae44SScott Teel 	kfree(options);
8982c2adae44SScott Teel }
8983c2adae44SScott Teel 
89840d98ba8dSSinan Kaya static void __hpsa_shutdown(struct pci_dev *pdev)
8985edd16368SStephen M. Cameron {
8986edd16368SStephen M. Cameron 	struct ctlr_info *h;
8987edd16368SStephen M. Cameron 
8988edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
8989edd16368SStephen M. Cameron 	/* Turn board interrupts off  and send the flush cache command
8990edd16368SStephen M. Cameron 	 * sendcmd will turn off interrupt, and send the flush...
8991edd16368SStephen M. Cameron 	 * To write all data in the battery backed cache to disks
8992edd16368SStephen M. Cameron 	 */
8993edd16368SStephen M. Cameron 	hpsa_flush_cache(h);
8994edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8995105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
8996cc64c817SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
8997edd16368SStephen M. Cameron }
8998edd16368SStephen M. Cameron 
89990d98ba8dSSinan Kaya static void hpsa_shutdown(struct pci_dev *pdev)
90000d98ba8dSSinan Kaya {
90010d98ba8dSSinan Kaya 	__hpsa_shutdown(pdev);
90020d98ba8dSSinan Kaya 	pci_disable_device(pdev);
90030d98ba8dSSinan Kaya }
90040d98ba8dSSinan Kaya 
90056f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h)
900655e14e76SStephen M. Cameron {
900755e14e76SStephen M. Cameron 	int i;
900855e14e76SStephen M. Cameron 
9009105a3dbcSRobert Elliott 	for (i = 0; i < h->ndevices; i++) {
901055e14e76SStephen M. Cameron 		kfree(h->dev[i]);
9011105a3dbcSRobert Elliott 		h->dev[i] = NULL;
9012105a3dbcSRobert Elliott 	}
901355e14e76SStephen M. Cameron }
901455e14e76SStephen M. Cameron 
90156f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev)
9016edd16368SStephen M. Cameron {
9017edd16368SStephen M. Cameron 	struct ctlr_info *h;
90188a98db73SStephen M. Cameron 	unsigned long flags;
9019edd16368SStephen M. Cameron 
9020edd16368SStephen M. Cameron 	if (pci_get_drvdata(pdev) == NULL) {
9021edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "unable to remove device\n");
9022edd16368SStephen M. Cameron 		return;
9023edd16368SStephen M. Cameron 	}
9024edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
90258a98db73SStephen M. Cameron 
90268a98db73SStephen M. Cameron 	/* Get rid of any controller monitoring work items */
90278a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
90288a98db73SStephen M. Cameron 	h->remove_in_progress = 1;
90298a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
90306636e7f4SDon Brace 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
90316636e7f4SDon Brace 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
90323d38f00cSScott Teel 	cancel_delayed_work_sync(&h->event_monitor_work);
90336636e7f4SDon Brace 	destroy_workqueue(h->rescan_ctlr_wq);
90346636e7f4SDon Brace 	destroy_workqueue(h->resubmit_wq);
903501192088SDon Brace 	destroy_workqueue(h->monitor_ctlr_wq);
9036cc64c817SRobert Elliott 
9037dfb2e6f4SMartin Wilck 	hpsa_delete_sas_host(h);
9038dfb2e6f4SMartin Wilck 
90392d041306SDon Brace 	/*
90402d041306SDon Brace 	 * Call before disabling interrupts.
90412d041306SDon Brace 	 * scsi_remove_host can trigger I/O operations especially
90422d041306SDon Brace 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
90432d041306SDon Brace 	 * operations which cannot complete and will hang the system.
90442d041306SDon Brace 	 */
90452d041306SDon Brace 	if (h->scsi_host)
90462d041306SDon Brace 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
9047105a3dbcSRobert Elliott 	/* includes hpsa_free_irqs - init_one 4 */
9048195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
90490d98ba8dSSinan Kaya 	__hpsa_shutdown(pdev);
9050cc64c817SRobert Elliott 
9051105a3dbcSRobert Elliott 	hpsa_free_device_info(h);		/* scan */
9052105a3dbcSRobert Elliott 
90532946e82bSRobert Elliott 	kfree(h->hba_inquiry_data);			/* init_one 10 */
90542946e82bSRobert Elliott 	h->hba_inquiry_data = NULL;			/* init_one 10 */
90552946e82bSRobert Elliott 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9056105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);			/* init_one 7 */
9057105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
90581fb7c98aSRobert Elliott 	hpsa_free_cmd_pool(h);				/* init_one 5 */
905934592254SScott Teel 	kfree(h->lastlogicals);
9060105a3dbcSRobert Elliott 
9061105a3dbcSRobert Elliott 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9062195f2c65SRobert Elliott 
90632946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);			/* init_one 3 */
90642946e82bSRobert Elliott 	h->scsi_host = NULL;				/* init_one 3 */
90652946e82bSRobert Elliott 
9066195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
90672946e82bSRobert Elliott 	hpsa_free_pci_init(h);				/* init_one 2.5 */
9068195f2c65SRobert Elliott 
9069105a3dbcSRobert Elliott 	free_percpu(h->lockup_detected);		/* init_one 2 */
9070105a3dbcSRobert Elliott 	h->lockup_detected = NULL;			/* init_one 2 */
9071105a3dbcSRobert Elliott 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
9072d04e62b9SKevin Barnett 
90738b834bffSMing Lei 	hpda_free_ctlr_info(h);				/* init_one 1 */
9074edd16368SStephen M. Cameron }
9075edd16368SStephen M. Cameron 
9076edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9077edd16368SStephen M. Cameron 	__attribute__((unused)) pm_message_t state)
9078edd16368SStephen M. Cameron {
9079edd16368SStephen M. Cameron 	return -ENOSYS;
9080edd16368SStephen M. Cameron }
9081edd16368SStephen M. Cameron 
9082edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9083edd16368SStephen M. Cameron {
9084edd16368SStephen M. Cameron 	return -ENOSYS;
9085edd16368SStephen M. Cameron }
9086edd16368SStephen M. Cameron 
9087edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = {
9088f79cfec6SStephen M. Cameron 	.name = HPSA,
9089edd16368SStephen M. Cameron 	.probe = hpsa_init_one,
90906f039790SGreg Kroah-Hartman 	.remove = hpsa_remove_one,
9091edd16368SStephen M. Cameron 	.id_table = hpsa_pci_device_id,	/* id_table */
9092edd16368SStephen M. Cameron 	.shutdown = hpsa_shutdown,
9093edd16368SStephen M. Cameron 	.suspend = hpsa_suspend,
9094edd16368SStephen M. Cameron 	.resume = hpsa_resume,
9095edd16368SStephen M. Cameron };
9096edd16368SStephen M. Cameron 
9097303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of
9098303932fdSDon Brace  * scatter gather elements supported) and bucket[],
9099303932fdSDon Brace  * which is an array of 8 integers.  The bucket[] array
9100303932fdSDon Brace  * contains 8 different DMA transfer sizes (in 16
9101303932fdSDon Brace  * byte increments) which the controller uses to fetch
9102303932fdSDon Brace  * commands.  This function fills in bucket_map[], which
9103303932fdSDon Brace  * maps a given number of scatter gather elements to one of
9104303932fdSDon Brace  * the 8 DMA transfer sizes.  The point of it is to allow the
9105303932fdSDon Brace  * controller to only do as much DMA as needed to fetch the
9106303932fdSDon Brace  * command, with the DMA transfer size encoded in the lower
9107303932fdSDon Brace  * bits of the command address.
9108303932fdSDon Brace  */
9109303932fdSDon Brace static void  calc_bucket_map(int bucket[], int num_buckets,
91102b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map)
9111303932fdSDon Brace {
9112303932fdSDon Brace 	int i, j, b, size;
9113303932fdSDon Brace 
9114303932fdSDon Brace 	/* Note, bucket_map must have nsgs+1 entries. */
9115303932fdSDon Brace 	for (i = 0; i <= nsgs; i++) {
9116303932fdSDon Brace 		/* Compute size of a command with i SG entries */
9117e1f7de0cSMatt Gates 		size = i + min_blocks;
9118303932fdSDon Brace 		b = num_buckets; /* Assume the biggest bucket */
9119303932fdSDon Brace 		/* Find the bucket that is just big enough */
9120e1f7de0cSMatt Gates 		for (j = 0; j < num_buckets; j++) {
9121303932fdSDon Brace 			if (bucket[j] >= size) {
9122303932fdSDon Brace 				b = j;
9123303932fdSDon Brace 				break;
9124303932fdSDon Brace 			}
9125303932fdSDon Brace 		}
9126303932fdSDon Brace 		/* for a command with i SG entries, use bucket b. */
9127303932fdSDon Brace 		bucket_map[i] = b;
9128303932fdSDon Brace 	}
9129303932fdSDon Brace }
9130303932fdSDon Brace 
9131105a3dbcSRobert Elliott /*
9132105a3dbcSRobert Elliott  * return -ENODEV on err, 0 on success (or no action)
9133105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9134105a3dbcSRobert Elliott  */
9135c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9136303932fdSDon Brace {
91376c311b57SStephen M. Cameron 	int i;
91386c311b57SStephen M. Cameron 	unsigned long register_value;
9139e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9140e1f7de0cSMatt Gates 			(trans_support & CFGTBL_Trans_use_short_tags) |
9141e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix |
9142b9af4937SStephen M. Cameron 			(trans_support & (CFGTBL_Trans_io_accel1 |
9143b9af4937SStephen M. Cameron 				CFGTBL_Trans_io_accel2));
9144e1f7de0cSMatt Gates 	struct access_method access = SA5_performant_access;
9145def342bdSStephen M. Cameron 
9146def342bdSStephen M. Cameron 	/* This is a bit complicated.  There are 8 registers on
9147def342bdSStephen M. Cameron 	 * the controller which we write to to tell it 8 different
9148def342bdSStephen M. Cameron 	 * sizes of commands which there may be.  It's a way of
9149def342bdSStephen M. Cameron 	 * reducing the DMA done to fetch each command.  Encoded into
9150def342bdSStephen M. Cameron 	 * each command's tag are 3 bits which communicate to the controller
9151def342bdSStephen M. Cameron 	 * which of the eight sizes that command fits within.  The size of
9152def342bdSStephen M. Cameron 	 * each command depends on how many scatter gather entries there are.
9153def342bdSStephen M. Cameron 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
9154def342bdSStephen M. Cameron 	 * with the number of 16-byte blocks a command of that size requires.
9155def342bdSStephen M. Cameron 	 * The smallest command possible requires 5 such 16 byte blocks.
9156d66ae08bSStephen M. Cameron 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9157def342bdSStephen M. Cameron 	 * blocks.  Note, this only extends to the SG entries contained
9158def342bdSStephen M. Cameron 	 * within the command block, and does not extend to chained blocks
9159def342bdSStephen M. Cameron 	 * of SG elements.   bft[] contains the eight values we write to
9160def342bdSStephen M. Cameron 	 * the registers.  They are not evenly distributed, but have more
9161def342bdSStephen M. Cameron 	 * sizes for small commands, and fewer sizes for larger commands.
9162def342bdSStephen M. Cameron 	 */
9163d66ae08bSStephen M. Cameron 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9164b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5
9165b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4
9166b9af4937SStephen M. Cameron 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9167b9af4937SStephen M. Cameron 			13, 14, 15, 16, 17, 18, 19,
9168b9af4937SStephen M. Cameron 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9169b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9170b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9171b9af4937SStephen M. Cameron 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9172b9af4937SStephen M. Cameron 				 16 * MIN_IOACCEL2_BFT_ENTRY);
9173b9af4937SStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9174d66ae08bSStephen M. Cameron 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9175303932fdSDon Brace 	/*  5 = 1 s/g entry or 4k
9176303932fdSDon Brace 	 *  6 = 2 s/g entry or 8k
9177303932fdSDon Brace 	 *  8 = 4 s/g entry or 16k
9178303932fdSDon Brace 	 * 10 = 6 s/g entry or 24k
9179303932fdSDon Brace 	 */
9180303932fdSDon Brace 
9181b3a52e79SStephen M. Cameron 	/* If the controller supports either ioaccel method then
9182b3a52e79SStephen M. Cameron 	 * we can also use the RAID stack submit path that does not
9183b3a52e79SStephen M. Cameron 	 * perform the superfluous readl() after each command submission.
9184b3a52e79SStephen M. Cameron 	 */
9185b3a52e79SStephen M. Cameron 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9186b3a52e79SStephen M. Cameron 		access = SA5_performant_access_no_read;
9187b3a52e79SStephen M. Cameron 
9188303932fdSDon Brace 	/* Controller spec: zero out this buffer. */
9189072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++)
9190072b0518SStephen M. Cameron 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9191303932fdSDon Brace 
9192d66ae08bSStephen M. Cameron 	bft[7] = SG_ENTRIES_IN_CMD + 4;
9193d66ae08bSStephen M. Cameron 	calc_bucket_map(bft, ARRAY_SIZE(bft),
9194e1f7de0cSMatt Gates 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9195303932fdSDon Brace 	for (i = 0; i < 8; i++)
9196303932fdSDon Brace 		writel(bft[i], &h->transtable->BlockFetch[i]);
9197303932fdSDon Brace 
9198303932fdSDon Brace 	/* size of controller ring buffer */
9199303932fdSDon Brace 	writel(h->max_commands, &h->transtable->RepQSize);
9200254f796bSMatt Gates 	writel(h->nreply_queues, &h->transtable->RepQCount);
9201303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrLow32);
9202303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9203254f796bSMatt Gates 
9204254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9205254f796bSMatt Gates 		writel(0, &h->transtable->RepQAddr[i].upper);
9206072b0518SStephen M. Cameron 		writel(h->reply_queue[i].busaddr,
9207254f796bSMatt Gates 			&h->transtable->RepQAddr[i].lower);
9208254f796bSMatt Gates 	}
9209254f796bSMatt Gates 
9210b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9211e1f7de0cSMatt Gates 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9212e1f7de0cSMatt Gates 	/*
9213e1f7de0cSMatt Gates 	 * enable outbound interrupt coalescing in accelerator mode;
9214e1f7de0cSMatt Gates 	 */
9215e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9216e1f7de0cSMatt Gates 		access = SA5_ioaccel_mode1_access;
9217e1f7de0cSMatt Gates 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9218e1f7de0cSMatt Gates 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
921996b6ce4eSDon Brace 	} else
922096b6ce4eSDon Brace 		if (trans_support & CFGTBL_Trans_io_accel2)
9221c349775eSScott Teel 			access = SA5_ioaccel_mode2_access;
9222303932fdSDon Brace 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9223c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9224c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9225c706a795SRobert Elliott 			"performant mode problem - doorbell timeout\n");
9226c706a795SRobert Elliott 		return -ENODEV;
9227c706a795SRobert Elliott 	}
9228303932fdSDon Brace 	register_value = readl(&(h->cfgtable->TransportActive));
9229303932fdSDon Brace 	if (!(register_value & CFGTBL_Trans_Performant)) {
9230050f7147SStephen Cameron 		dev_err(&h->pdev->dev,
9231050f7147SStephen Cameron 			"performant mode problem - transport not active\n");
9232c706a795SRobert Elliott 		return -ENODEV;
9233303932fdSDon Brace 	}
9234960a30e7SStephen M. Cameron 	/* Change the access methods to the performant access methods */
9235e1f7de0cSMatt Gates 	h->access = access;
9236e1f7de0cSMatt Gates 	h->transMethod = transMethod;
9237e1f7de0cSMatt Gates 
9238b9af4937SStephen M. Cameron 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9239b9af4937SStephen M. Cameron 		(trans_support & CFGTBL_Trans_io_accel2)))
9240c706a795SRobert Elliott 		return 0;
9241e1f7de0cSMatt Gates 
9242b9af4937SStephen M. Cameron 	if (trans_support & CFGTBL_Trans_io_accel1) {
9243e1f7de0cSMatt Gates 		/* Set up I/O accelerator mode */
9244e1f7de0cSMatt Gates 		for (i = 0; i < h->nreply_queues; i++) {
9245e1f7de0cSMatt Gates 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9246e1f7de0cSMatt Gates 			h->reply_queue[i].current_entry =
9247e1f7de0cSMatt Gates 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9248e1f7de0cSMatt Gates 		}
9249283b4a9bSStephen M. Cameron 		bft[7] = h->ioaccel_maxsg + 8;
9250283b4a9bSStephen M. Cameron 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9251e1f7de0cSMatt Gates 				h->ioaccel1_blockFetchTable);
9252e1f7de0cSMatt Gates 
9253e1f7de0cSMatt Gates 		/* initialize all reply queue entries to unused */
9254072b0518SStephen M. Cameron 		for (i = 0; i < h->nreply_queues; i++)
9255072b0518SStephen M. Cameron 			memset(h->reply_queue[i].head,
9256072b0518SStephen M. Cameron 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9257072b0518SStephen M. Cameron 				h->reply_queue_size);
9258e1f7de0cSMatt Gates 
9259e1f7de0cSMatt Gates 		/* set all the constant fields in the accelerator command
9260e1f7de0cSMatt Gates 		 * frames once at init time to save CPU cycles later.
9261e1f7de0cSMatt Gates 		 */
9262e1f7de0cSMatt Gates 		for (i = 0; i < h->nr_cmds; i++) {
9263e1f7de0cSMatt Gates 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9264e1f7de0cSMatt Gates 
9265e1f7de0cSMatt Gates 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9266e1f7de0cSMatt Gates 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9267e1f7de0cSMatt Gates 					(i * sizeof(struct ErrorInfo)));
9268e1f7de0cSMatt Gates 			cp->err_info_len = sizeof(struct ErrorInfo);
9269e1f7de0cSMatt Gates 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
92702b08b3e9SDon Brace 			cp->host_context_flags =
92712b08b3e9SDon Brace 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9272e1f7de0cSMatt Gates 			cp->timeout_sec = 0;
9273e1f7de0cSMatt Gates 			cp->ReplyQueue = 0;
927450a0decfSStephen M. Cameron 			cp->tag =
9275f2405db8SDon Brace 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
927650a0decfSStephen M. Cameron 			cp->host_addr =
927750a0decfSStephen M. Cameron 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9278e1f7de0cSMatt Gates 					(i * sizeof(struct io_accel1_cmd)));
9279e1f7de0cSMatt Gates 		}
9280b9af4937SStephen M. Cameron 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9281b9af4937SStephen M. Cameron 		u64 cfg_offset, cfg_base_addr_index;
9282b9af4937SStephen M. Cameron 		u32 bft2_offset, cfg_base_addr;
9283b9af4937SStephen M. Cameron 		int rc;
9284b9af4937SStephen M. Cameron 
9285b9af4937SStephen M. Cameron 		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9286b9af4937SStephen M. Cameron 			&cfg_base_addr_index, &cfg_offset);
9287b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9288b9af4937SStephen M. Cameron 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9289b9af4937SStephen M. Cameron 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9290b9af4937SStephen M. Cameron 				4, h->ioaccel2_blockFetchTable);
9291b9af4937SStephen M. Cameron 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9292b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct CfgTable,
9293b9af4937SStephen M. Cameron 				io_accel_request_size_offset) != 0xb8);
9294b9af4937SStephen M. Cameron 		h->ioaccel2_bft2_regs =
9295b9af4937SStephen M. Cameron 			remap_pci_mem(pci_resource_start(h->pdev,
9296b9af4937SStephen M. Cameron 					cfg_base_addr_index) +
9297b9af4937SStephen M. Cameron 					cfg_offset + bft2_offset,
9298b9af4937SStephen M. Cameron 					ARRAY_SIZE(bft2) *
9299b9af4937SStephen M. Cameron 					sizeof(*h->ioaccel2_bft2_regs));
9300b9af4937SStephen M. Cameron 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9301b9af4937SStephen M. Cameron 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9302b9af4937SStephen M. Cameron 	}
9303b9af4937SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9304c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9305c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9306c706a795SRobert Elliott 			"performant mode problem - enabling ioaccel mode\n");
9307c706a795SRobert Elliott 		return -ENODEV;
9308c706a795SRobert Elliott 	}
9309c706a795SRobert Elliott 	return 0;
9310e1f7de0cSMatt Gates }
9311e1f7de0cSMatt Gates 
93121fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */
93131fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
93141fb7c98aSRobert Elliott {
9315105a3dbcSRobert Elliott 	if (h->ioaccel_cmd_pool) {
93161fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
93171fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93181fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool,
93191fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool_dhandle);
9320105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool = NULL;
9321105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool_dhandle = 0;
9322105a3dbcSRobert Elliott 	}
93231fb7c98aSRobert Elliott 	kfree(h->ioaccel1_blockFetchTable);
9324105a3dbcSRobert Elliott 	h->ioaccel1_blockFetchTable = NULL;
93251fb7c98aSRobert Elliott }
93261fb7c98aSRobert Elliott 
9327d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */
9328d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9329e1f7de0cSMatt Gates {
9330283b4a9bSStephen M. Cameron 	h->ioaccel_maxsg =
9331283b4a9bSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9332283b4a9bSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9333283b4a9bSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9334283b4a9bSStephen M. Cameron 
9335e1f7de0cSMatt Gates 	/* Command structures must be aligned on a 128-byte boundary
9336e1f7de0cSMatt Gates 	 * because the 7 lower bits of the address are used by the
9337e1f7de0cSMatt Gates 	 * hardware.
9338e1f7de0cSMatt Gates 	 */
9339e1f7de0cSMatt Gates 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9340e1f7de0cSMatt Gates 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9341e1f7de0cSMatt Gates 	h->ioaccel_cmd_pool =
93428bc8f47eSChristoph Hellwig 		dma_alloc_coherent(&h->pdev->dev,
9343e1f7de0cSMatt Gates 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93448bc8f47eSChristoph Hellwig 			&h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9345e1f7de0cSMatt Gates 
9346e1f7de0cSMatt Gates 	h->ioaccel1_blockFetchTable =
9347283b4a9bSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9348e1f7de0cSMatt Gates 				sizeof(u32)), GFP_KERNEL);
9349e1f7de0cSMatt Gates 
9350e1f7de0cSMatt Gates 	if ((h->ioaccel_cmd_pool == NULL) ||
9351e1f7de0cSMatt Gates 		(h->ioaccel1_blockFetchTable == NULL))
9352e1f7de0cSMatt Gates 		goto clean_up;
9353e1f7de0cSMatt Gates 
9354e1f7de0cSMatt Gates 	memset(h->ioaccel_cmd_pool, 0,
9355e1f7de0cSMatt Gates 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9356e1f7de0cSMatt Gates 	return 0;
9357e1f7de0cSMatt Gates 
9358e1f7de0cSMatt Gates clean_up:
93591fb7c98aSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
93602dd02d74SRobert Elliott 	return -ENOMEM;
93616c311b57SStephen M. Cameron }
93626c311b57SStephen M. Cameron 
93631fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */
93641fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
93651fb7c98aSRobert Elliott {
9366d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9367d9a729f3SWebb Scales 
9368105a3dbcSRobert Elliott 	if (h->ioaccel2_cmd_pool) {
93691fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
93701fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
93711fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool,
93721fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool_dhandle);
9373105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool = NULL;
9374105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool_dhandle = 0;
9375105a3dbcSRobert Elliott 	}
93761fb7c98aSRobert Elliott 	kfree(h->ioaccel2_blockFetchTable);
9377105a3dbcSRobert Elliott 	h->ioaccel2_blockFetchTable = NULL;
93781fb7c98aSRobert Elliott }
93791fb7c98aSRobert Elliott 
9380d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */
9381d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9382aca9012aSStephen M. Cameron {
9383d9a729f3SWebb Scales 	int rc;
9384d9a729f3SWebb Scales 
9385aca9012aSStephen M. Cameron 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9386aca9012aSStephen M. Cameron 
9387aca9012aSStephen M. Cameron 	h->ioaccel_maxsg =
9388aca9012aSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9389aca9012aSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9390aca9012aSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9391aca9012aSStephen M. Cameron 
9392aca9012aSStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9393aca9012aSStephen M. Cameron 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9394aca9012aSStephen M. Cameron 	h->ioaccel2_cmd_pool =
93958bc8f47eSChristoph Hellwig 		dma_alloc_coherent(&h->pdev->dev,
9396aca9012aSStephen M. Cameron 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
93978bc8f47eSChristoph Hellwig 			&h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9398aca9012aSStephen M. Cameron 
9399aca9012aSStephen M. Cameron 	h->ioaccel2_blockFetchTable =
9400aca9012aSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9401aca9012aSStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9402aca9012aSStephen M. Cameron 
9403aca9012aSStephen M. Cameron 	if ((h->ioaccel2_cmd_pool == NULL) ||
9404d9a729f3SWebb Scales 		(h->ioaccel2_blockFetchTable == NULL)) {
9405d9a729f3SWebb Scales 		rc = -ENOMEM;
9406d9a729f3SWebb Scales 		goto clean_up;
9407d9a729f3SWebb Scales 	}
9408d9a729f3SWebb Scales 
9409d9a729f3SWebb Scales 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9410d9a729f3SWebb Scales 	if (rc)
9411aca9012aSStephen M. Cameron 		goto clean_up;
9412aca9012aSStephen M. Cameron 
9413aca9012aSStephen M. Cameron 	memset(h->ioaccel2_cmd_pool, 0,
9414aca9012aSStephen M. Cameron 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9415aca9012aSStephen M. Cameron 	return 0;
9416aca9012aSStephen M. Cameron 
9417aca9012aSStephen M. Cameron clean_up:
94181fb7c98aSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9419d9a729f3SWebb Scales 	return rc;
9420aca9012aSStephen M. Cameron }
9421aca9012aSStephen M. Cameron 
9422105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9423105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h)
9424105a3dbcSRobert Elliott {
9425105a3dbcSRobert Elliott 	kfree(h->blockFetchTable);
9426105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9427105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9428105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9429105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9430105a3dbcSRobert Elliott }
9431105a3dbcSRobert Elliott 
9432105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action)
9433105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9434105a3dbcSRobert Elliott  */
9435105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
94366c311b57SStephen M. Cameron {
94376c311b57SStephen M. Cameron 	u32 trans_support;
9438e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9439e1f7de0cSMatt Gates 					CFGTBL_Trans_use_short_tags;
9440105a3dbcSRobert Elliott 	int i, rc;
94416c311b57SStephen M. Cameron 
944202ec19c8SStephen M. Cameron 	if (hpsa_simple_mode)
9443105a3dbcSRobert Elliott 		return 0;
944402ec19c8SStephen M. Cameron 
944567c99a72Sscameron@beardog.cce.hp.com 	trans_support = readl(&(h->cfgtable->TransportSupport));
944667c99a72Sscameron@beardog.cce.hp.com 	if (!(trans_support & PERFORMANT_MODE))
9447105a3dbcSRobert Elliott 		return 0;
944867c99a72Sscameron@beardog.cce.hp.com 
9449e1f7de0cSMatt Gates 	/* Check for I/O accelerator mode support */
9450e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9451e1f7de0cSMatt Gates 		transMethod |= CFGTBL_Trans_io_accel1 |
9452e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix;
9453105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9454105a3dbcSRobert Elliott 		if (rc)
9455105a3dbcSRobert Elliott 			return rc;
9456105a3dbcSRobert Elliott 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9457aca9012aSStephen M. Cameron 		transMethod |= CFGTBL_Trans_io_accel2 |
9458aca9012aSStephen M. Cameron 				CFGTBL_Trans_enable_directed_msix;
9459105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9460105a3dbcSRobert Elliott 		if (rc)
9461105a3dbcSRobert Elliott 			return rc;
9462e1f7de0cSMatt Gates 	}
9463e1f7de0cSMatt Gates 
9464bc2bb154SChristoph Hellwig 	h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9465cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
94666c311b57SStephen M. Cameron 	/* Performant mode ring buffer and supporting data structures */
9467072b0518SStephen M. Cameron 	h->reply_queue_size = h->max_commands * sizeof(u64);
94686c311b57SStephen M. Cameron 
9469254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
94708bc8f47eSChristoph Hellwig 		h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9471072b0518SStephen M. Cameron 						h->reply_queue_size,
94728bc8f47eSChristoph Hellwig 						&h->reply_queue[i].busaddr,
94738bc8f47eSChristoph Hellwig 						GFP_KERNEL);
9474105a3dbcSRobert Elliott 		if (!h->reply_queue[i].head) {
9475105a3dbcSRobert Elliott 			rc = -ENOMEM;
9476105a3dbcSRobert Elliott 			goto clean1;	/* rq, ioaccel */
9477105a3dbcSRobert Elliott 		}
9478254f796bSMatt Gates 		h->reply_queue[i].size = h->max_commands;
9479254f796bSMatt Gates 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9480254f796bSMatt Gates 		h->reply_queue[i].current_entry = 0;
9481254f796bSMatt Gates 	}
9482254f796bSMatt Gates 
94836c311b57SStephen M. Cameron 	/* Need a block fetch table for performant mode */
9484d66ae08bSStephen M. Cameron 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
94856c311b57SStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9486105a3dbcSRobert Elliott 	if (!h->blockFetchTable) {
9487105a3dbcSRobert Elliott 		rc = -ENOMEM;
9488105a3dbcSRobert Elliott 		goto clean1;	/* rq, ioaccel */
9489105a3dbcSRobert Elliott 	}
94906c311b57SStephen M. Cameron 
9491105a3dbcSRobert Elliott 	rc = hpsa_enter_performant_mode(h, trans_support);
9492105a3dbcSRobert Elliott 	if (rc)
9493105a3dbcSRobert Elliott 		goto clean2;	/* bft, rq, ioaccel */
9494105a3dbcSRobert Elliott 	return 0;
9495303932fdSDon Brace 
9496105a3dbcSRobert Elliott clean2:	/* bft, rq, ioaccel */
9497303932fdSDon Brace 	kfree(h->blockFetchTable);
9498105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9499105a3dbcSRobert Elliott clean1:	/* rq, ioaccel */
9500105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9501105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9502105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9503105a3dbcSRobert Elliott 	return rc;
9504303932fdSDon Brace }
9505303932fdSDon Brace 
950623100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c)
950776438d08SStephen M. Cameron {
950823100dd9SStephen M. Cameron 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
950923100dd9SStephen M. Cameron }
951023100dd9SStephen M. Cameron 
951123100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h)
951223100dd9SStephen M. Cameron {
951323100dd9SStephen M. Cameron 	struct CommandList *c = NULL;
9514f2405db8SDon Brace 	int i, accel_cmds_out;
9515281a7fd0SWebb Scales 	int refcount;
951676438d08SStephen M. Cameron 
9517f2405db8SDon Brace 	do { /* wait for all outstanding ioaccel commands to drain out */
951823100dd9SStephen M. Cameron 		accel_cmds_out = 0;
9519f2405db8SDon Brace 		for (i = 0; i < h->nr_cmds; i++) {
9520f2405db8SDon Brace 			c = h->cmd_pool + i;
9521281a7fd0SWebb Scales 			refcount = atomic_inc_return(&c->refcount);
9522281a7fd0SWebb Scales 			if (refcount > 1) /* Command is allocated */
952323100dd9SStephen M. Cameron 				accel_cmds_out += is_accelerated_cmd(c);
9524281a7fd0SWebb Scales 			cmd_free(h, c);
9525f2405db8SDon Brace 		}
952623100dd9SStephen M. Cameron 		if (accel_cmds_out <= 0)
952776438d08SStephen M. Cameron 			break;
952876438d08SStephen M. Cameron 		msleep(100);
952976438d08SStephen M. Cameron 	} while (1);
953076438d08SStephen M. Cameron }
953176438d08SStephen M. Cameron 
9532d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9533d04e62b9SKevin Barnett 				struct hpsa_sas_port *hpsa_sas_port)
9534d04e62b9SKevin Barnett {
9535d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9536d04e62b9SKevin Barnett 	struct sas_phy *phy;
9537d04e62b9SKevin Barnett 
9538d04e62b9SKevin Barnett 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9539d04e62b9SKevin Barnett 	if (!hpsa_sas_phy)
9540d04e62b9SKevin Barnett 		return NULL;
9541d04e62b9SKevin Barnett 
9542d04e62b9SKevin Barnett 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9543d04e62b9SKevin Barnett 		hpsa_sas_port->next_phy_index);
9544d04e62b9SKevin Barnett 	if (!phy) {
9545d04e62b9SKevin Barnett 		kfree(hpsa_sas_phy);
9546d04e62b9SKevin Barnett 		return NULL;
9547d04e62b9SKevin Barnett 	}
9548d04e62b9SKevin Barnett 
9549d04e62b9SKevin Barnett 	hpsa_sas_port->next_phy_index++;
9550d04e62b9SKevin Barnett 	hpsa_sas_phy->phy = phy;
9551d04e62b9SKevin Barnett 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9552d04e62b9SKevin Barnett 
9553d04e62b9SKevin Barnett 	return hpsa_sas_phy;
9554d04e62b9SKevin Barnett }
9555d04e62b9SKevin Barnett 
9556d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9557d04e62b9SKevin Barnett {
9558d04e62b9SKevin Barnett 	struct sas_phy *phy = hpsa_sas_phy->phy;
9559d04e62b9SKevin Barnett 
9560d04e62b9SKevin Barnett 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9561d04e62b9SKevin Barnett 	if (hpsa_sas_phy->added_to_port)
9562d04e62b9SKevin Barnett 		list_del(&hpsa_sas_phy->phy_list_entry);
956355ca38b4SMartin Wilck 	sas_phy_delete(phy);
9564d04e62b9SKevin Barnett 	kfree(hpsa_sas_phy);
9565d04e62b9SKevin Barnett }
9566d04e62b9SKevin Barnett 
9567d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9568d04e62b9SKevin Barnett {
9569d04e62b9SKevin Barnett 	int rc;
9570d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9571d04e62b9SKevin Barnett 	struct sas_phy *phy;
9572d04e62b9SKevin Barnett 	struct sas_identify *identify;
9573d04e62b9SKevin Barnett 
9574d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9575d04e62b9SKevin Barnett 	phy = hpsa_sas_phy->phy;
9576d04e62b9SKevin Barnett 
9577d04e62b9SKevin Barnett 	identify = &phy->identify;
9578d04e62b9SKevin Barnett 	memset(identify, 0, sizeof(*identify));
9579d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9580d04e62b9SKevin Barnett 	identify->device_type = SAS_END_DEVICE;
9581d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9582d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9583d04e62b9SKevin Barnett 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9584d04e62b9SKevin Barnett 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9585d04e62b9SKevin Barnett 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9586d04e62b9SKevin Barnett 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9587d04e62b9SKevin Barnett 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9588d04e62b9SKevin Barnett 
9589d04e62b9SKevin Barnett 	rc = sas_phy_add(hpsa_sas_phy->phy);
9590d04e62b9SKevin Barnett 	if (rc)
9591d04e62b9SKevin Barnett 		return rc;
9592d04e62b9SKevin Barnett 
9593d04e62b9SKevin Barnett 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9594d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9595d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head);
9596d04e62b9SKevin Barnett 	hpsa_sas_phy->added_to_port = true;
9597d04e62b9SKevin Barnett 
9598d04e62b9SKevin Barnett 	return 0;
9599d04e62b9SKevin Barnett }
9600d04e62b9SKevin Barnett 
9601d04e62b9SKevin Barnett static int
9602d04e62b9SKevin Barnett 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9603d04e62b9SKevin Barnett 				struct sas_rphy *rphy)
9604d04e62b9SKevin Barnett {
9605d04e62b9SKevin Barnett 	struct sas_identify *identify;
9606d04e62b9SKevin Barnett 
9607d04e62b9SKevin Barnett 	identify = &rphy->identify;
9608d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9609d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9610d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9611d04e62b9SKevin Barnett 
9612d04e62b9SKevin Barnett 	return sas_rphy_add(rphy);
9613d04e62b9SKevin Barnett }
9614d04e62b9SKevin Barnett 
9615d04e62b9SKevin Barnett static struct hpsa_sas_port
9616d04e62b9SKevin Barnett 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9617d04e62b9SKevin Barnett 				u64 sas_address)
9618d04e62b9SKevin Barnett {
9619d04e62b9SKevin Barnett 	int rc;
9620d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9621d04e62b9SKevin Barnett 	struct sas_port *port;
9622d04e62b9SKevin Barnett 
9623d04e62b9SKevin Barnett 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9624d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9625d04e62b9SKevin Barnett 		return NULL;
9626d04e62b9SKevin Barnett 
9627d04e62b9SKevin Barnett 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9628d04e62b9SKevin Barnett 	hpsa_sas_port->parent_node = hpsa_sas_node;
9629d04e62b9SKevin Barnett 
9630d04e62b9SKevin Barnett 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9631d04e62b9SKevin Barnett 	if (!port)
9632d04e62b9SKevin Barnett 		goto free_hpsa_port;
9633d04e62b9SKevin Barnett 
9634d04e62b9SKevin Barnett 	rc = sas_port_add(port);
9635d04e62b9SKevin Barnett 	if (rc)
9636d04e62b9SKevin Barnett 		goto free_sas_port;
9637d04e62b9SKevin Barnett 
9638d04e62b9SKevin Barnett 	hpsa_sas_port->port = port;
9639d04e62b9SKevin Barnett 	hpsa_sas_port->sas_address = sas_address;
9640d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_port->port_list_entry,
9641d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head);
9642d04e62b9SKevin Barnett 
9643d04e62b9SKevin Barnett 	return hpsa_sas_port;
9644d04e62b9SKevin Barnett 
9645d04e62b9SKevin Barnett free_sas_port:
9646d04e62b9SKevin Barnett 	sas_port_free(port);
9647d04e62b9SKevin Barnett free_hpsa_port:
9648d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9649d04e62b9SKevin Barnett 
9650d04e62b9SKevin Barnett 	return NULL;
9651d04e62b9SKevin Barnett }
9652d04e62b9SKevin Barnett 
9653d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9654d04e62b9SKevin Barnett {
9655d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9656d04e62b9SKevin Barnett 	struct hpsa_sas_phy *next;
9657d04e62b9SKevin Barnett 
9658d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_phy, next,
9659d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9660d04e62b9SKevin Barnett 		hpsa_free_sas_phy(hpsa_sas_phy);
9661d04e62b9SKevin Barnett 
9662d04e62b9SKevin Barnett 	sas_port_delete(hpsa_sas_port->port);
9663d04e62b9SKevin Barnett 	list_del(&hpsa_sas_port->port_list_entry);
9664d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9665d04e62b9SKevin Barnett }
9666d04e62b9SKevin Barnett 
9667d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9668d04e62b9SKevin Barnett {
9669d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9670d04e62b9SKevin Barnett 
9671d04e62b9SKevin Barnett 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9672d04e62b9SKevin Barnett 	if (hpsa_sas_node) {
9673d04e62b9SKevin Barnett 		hpsa_sas_node->parent_dev = parent_dev;
9674d04e62b9SKevin Barnett 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9675d04e62b9SKevin Barnett 	}
9676d04e62b9SKevin Barnett 
9677d04e62b9SKevin Barnett 	return hpsa_sas_node;
9678d04e62b9SKevin Barnett }
9679d04e62b9SKevin Barnett 
9680d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9681d04e62b9SKevin Barnett {
9682d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9683d04e62b9SKevin Barnett 	struct hpsa_sas_port *next;
9684d04e62b9SKevin Barnett 
9685d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9686d04e62b9SKevin Barnett 		return;
9687d04e62b9SKevin Barnett 
9688d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_port, next,
9689d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head, port_list_entry)
9690d04e62b9SKevin Barnett 		hpsa_free_sas_port(hpsa_sas_port);
9691d04e62b9SKevin Barnett 
9692d04e62b9SKevin Barnett 	kfree(hpsa_sas_node);
9693d04e62b9SKevin Barnett }
9694d04e62b9SKevin Barnett 
9695d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
9696d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9697d04e62b9SKevin Barnett 					struct sas_rphy *rphy)
9698d04e62b9SKevin Barnett {
9699d04e62b9SKevin Barnett 	int i;
9700d04e62b9SKevin Barnett 	struct hpsa_scsi_dev_t *device;
9701d04e62b9SKevin Barnett 
9702d04e62b9SKevin Barnett 	for (i = 0; i < h->ndevices; i++) {
9703d04e62b9SKevin Barnett 		device = h->dev[i];
9704d04e62b9SKevin Barnett 		if (!device->sas_port)
9705d04e62b9SKevin Barnett 			continue;
9706d04e62b9SKevin Barnett 		if (device->sas_port->rphy == rphy)
9707d04e62b9SKevin Barnett 			return device;
9708d04e62b9SKevin Barnett 	}
9709d04e62b9SKevin Barnett 
9710d04e62b9SKevin Barnett 	return NULL;
9711d04e62b9SKevin Barnett }
9712d04e62b9SKevin Barnett 
9713d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h)
9714d04e62b9SKevin Barnett {
9715d04e62b9SKevin Barnett 	int rc;
9716d04e62b9SKevin Barnett 	struct device *parent_dev;
9717d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9718d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9719d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9720d04e62b9SKevin Barnett 
97210a7c3bb8SDon Brace 	parent_dev = &h->scsi_host->shost_dev;
9722d04e62b9SKevin Barnett 
9723d04e62b9SKevin Barnett 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9724d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9725d04e62b9SKevin Barnett 		return -ENOMEM;
9726d04e62b9SKevin Barnett 
9727d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9728d04e62b9SKevin Barnett 	if (!hpsa_sas_port) {
9729d04e62b9SKevin Barnett 		rc = -ENODEV;
9730d04e62b9SKevin Barnett 		goto free_sas_node;
9731d04e62b9SKevin Barnett 	}
9732d04e62b9SKevin Barnett 
9733d04e62b9SKevin Barnett 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9734d04e62b9SKevin Barnett 	if (!hpsa_sas_phy) {
9735d04e62b9SKevin Barnett 		rc = -ENODEV;
9736d04e62b9SKevin Barnett 		goto free_sas_port;
9737d04e62b9SKevin Barnett 	}
9738d04e62b9SKevin Barnett 
9739d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9740d04e62b9SKevin Barnett 	if (rc)
9741d04e62b9SKevin Barnett 		goto free_sas_phy;
9742d04e62b9SKevin Barnett 
9743d04e62b9SKevin Barnett 	h->sas_host = hpsa_sas_node;
9744d04e62b9SKevin Barnett 
9745d04e62b9SKevin Barnett 	return 0;
9746d04e62b9SKevin Barnett 
9747d04e62b9SKevin Barnett free_sas_phy:
9748d04e62b9SKevin Barnett 	hpsa_free_sas_phy(hpsa_sas_phy);
9749d04e62b9SKevin Barnett free_sas_port:
9750d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9751d04e62b9SKevin Barnett free_sas_node:
9752d04e62b9SKevin Barnett 	hpsa_free_sas_node(hpsa_sas_node);
9753d04e62b9SKevin Barnett 
9754d04e62b9SKevin Barnett 	return rc;
9755d04e62b9SKevin Barnett }
9756d04e62b9SKevin Barnett 
9757d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h)
9758d04e62b9SKevin Barnett {
9759d04e62b9SKevin Barnett 	hpsa_free_sas_node(h->sas_host);
9760d04e62b9SKevin Barnett }
9761d04e62b9SKevin Barnett 
9762d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9763d04e62b9SKevin Barnett 				struct hpsa_scsi_dev_t *device)
9764d04e62b9SKevin Barnett {
9765d04e62b9SKevin Barnett 	int rc;
9766d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9767d04e62b9SKevin Barnett 	struct sas_rphy *rphy;
9768d04e62b9SKevin Barnett 
9769d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9770d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9771d04e62b9SKevin Barnett 		return -ENOMEM;
9772d04e62b9SKevin Barnett 
9773d04e62b9SKevin Barnett 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9774d04e62b9SKevin Barnett 	if (!rphy) {
9775d04e62b9SKevin Barnett 		rc = -ENODEV;
9776d04e62b9SKevin Barnett 		goto free_sas_port;
9777d04e62b9SKevin Barnett 	}
9778d04e62b9SKevin Barnett 
9779d04e62b9SKevin Barnett 	hpsa_sas_port->rphy = rphy;
9780d04e62b9SKevin Barnett 	device->sas_port = hpsa_sas_port;
9781d04e62b9SKevin Barnett 
9782d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9783d04e62b9SKevin Barnett 	if (rc)
9784d04e62b9SKevin Barnett 		goto free_sas_port;
9785d04e62b9SKevin Barnett 
9786d04e62b9SKevin Barnett 	return 0;
9787d04e62b9SKevin Barnett 
9788d04e62b9SKevin Barnett free_sas_port:
9789d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9790d04e62b9SKevin Barnett 	device->sas_port = NULL;
9791d04e62b9SKevin Barnett 
9792d04e62b9SKevin Barnett 	return rc;
9793d04e62b9SKevin Barnett }
9794d04e62b9SKevin Barnett 
9795d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9796d04e62b9SKevin Barnett {
9797d04e62b9SKevin Barnett 	if (device->sas_port) {
9798d04e62b9SKevin Barnett 		hpsa_free_sas_port(device->sas_port);
9799d04e62b9SKevin Barnett 		device->sas_port = NULL;
9800d04e62b9SKevin Barnett 	}
9801d04e62b9SKevin Barnett }
9802d04e62b9SKevin Barnett 
9803d04e62b9SKevin Barnett static int
9804d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy)
9805d04e62b9SKevin Barnett {
9806d04e62b9SKevin Barnett 	return 0;
9807d04e62b9SKevin Barnett }
9808d04e62b9SKevin Barnett 
9809d04e62b9SKevin Barnett static int
9810d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9811d04e62b9SKevin Barnett {
981201d0e789SDon Brace 	struct Scsi_Host *shost = phy_to_shost(rphy);
981301d0e789SDon Brace 	struct ctlr_info *h;
981401d0e789SDon Brace 	struct hpsa_scsi_dev_t *sd;
981501d0e789SDon Brace 
981601d0e789SDon Brace 	if (!shost)
981701d0e789SDon Brace 		return -ENXIO;
981801d0e789SDon Brace 
981901d0e789SDon Brace 	h = shost_to_hba(shost);
982001d0e789SDon Brace 
982101d0e789SDon Brace 	if (!h)
982201d0e789SDon Brace 		return -ENXIO;
982301d0e789SDon Brace 
982401d0e789SDon Brace 	sd = hpsa_find_device_by_sas_rphy(h, rphy);
982501d0e789SDon Brace 	if (!sd)
982601d0e789SDon Brace 		return -ENXIO;
982701d0e789SDon Brace 
982801d0e789SDon Brace 	*identifier = sd->eli;
982901d0e789SDon Brace 
9830d04e62b9SKevin Barnett 	return 0;
9831d04e62b9SKevin Barnett }
9832d04e62b9SKevin Barnett 
9833d04e62b9SKevin Barnett static int
9834d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9835d04e62b9SKevin Barnett {
9836d04e62b9SKevin Barnett 	return -ENXIO;
9837d04e62b9SKevin Barnett }
9838d04e62b9SKevin Barnett 
9839d04e62b9SKevin Barnett static int
9840d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9841d04e62b9SKevin Barnett {
9842d04e62b9SKevin Barnett 	return 0;
9843d04e62b9SKevin Barnett }
9844d04e62b9SKevin Barnett 
9845d04e62b9SKevin Barnett static int
9846d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9847d04e62b9SKevin Barnett {
9848d04e62b9SKevin Barnett 	return 0;
9849d04e62b9SKevin Barnett }
9850d04e62b9SKevin Barnett 
9851d04e62b9SKevin Barnett static int
9852d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy)
9853d04e62b9SKevin Barnett {
9854d04e62b9SKevin Barnett 	return 0;
9855d04e62b9SKevin Barnett }
9856d04e62b9SKevin Barnett 
9857d04e62b9SKevin Barnett static void
9858d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy)
9859d04e62b9SKevin Barnett {
9860d04e62b9SKevin Barnett }
9861d04e62b9SKevin Barnett 
9862d04e62b9SKevin Barnett static int
9863d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9864d04e62b9SKevin Barnett {
9865d04e62b9SKevin Barnett 	return -EINVAL;
9866d04e62b9SKevin Barnett }
9867d04e62b9SKevin Barnett 
9868d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = {
9869d04e62b9SKevin Barnett 	.get_linkerrors = hpsa_sas_get_linkerrors,
9870d04e62b9SKevin Barnett 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9871d04e62b9SKevin Barnett 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9872d04e62b9SKevin Barnett 	.phy_reset = hpsa_sas_phy_reset,
9873d04e62b9SKevin Barnett 	.phy_enable = hpsa_sas_phy_enable,
9874d04e62b9SKevin Barnett 	.phy_setup = hpsa_sas_phy_setup,
9875d04e62b9SKevin Barnett 	.phy_release = hpsa_sas_phy_release,
9876d04e62b9SKevin Barnett 	.set_phy_speed = hpsa_sas_phy_speed,
9877d04e62b9SKevin Barnett };
9878d04e62b9SKevin Barnett 
9879edd16368SStephen M. Cameron /*
9880edd16368SStephen M. Cameron  *  This is it.  Register the PCI driver information for the cards we control
9881edd16368SStephen M. Cameron  *  the OS will call our registered routines when it finds one of our cards.
9882edd16368SStephen M. Cameron  */
9883edd16368SStephen M. Cameron static int __init hpsa_init(void)
9884edd16368SStephen M. Cameron {
9885d04e62b9SKevin Barnett 	int rc;
9886d04e62b9SKevin Barnett 
9887d04e62b9SKevin Barnett 	hpsa_sas_transport_template =
9888d04e62b9SKevin Barnett 		sas_attach_transport(&hpsa_sas_transport_functions);
9889d04e62b9SKevin Barnett 	if (!hpsa_sas_transport_template)
9890d04e62b9SKevin Barnett 		return -ENODEV;
9891d04e62b9SKevin Barnett 
9892d04e62b9SKevin Barnett 	rc = pci_register_driver(&hpsa_pci_driver);
9893d04e62b9SKevin Barnett 
9894d04e62b9SKevin Barnett 	if (rc)
9895d04e62b9SKevin Barnett 		sas_release_transport(hpsa_sas_transport_template);
9896d04e62b9SKevin Barnett 
9897d04e62b9SKevin Barnett 	return rc;
9898edd16368SStephen M. Cameron }
9899edd16368SStephen M. Cameron 
9900edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void)
9901edd16368SStephen M. Cameron {
9902edd16368SStephen M. Cameron 	pci_unregister_driver(&hpsa_pci_driver);
9903d04e62b9SKevin Barnett 	sas_release_transport(hpsa_sas_transport_template);
9904edd16368SStephen M. Cameron }
9905edd16368SStephen M. Cameron 
9906e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void)
9907e1f7de0cSMatt Gates {
9908e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \
9909dd0e19f3SScott Teel 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9910dd0e19f3SScott Teel 
9911dd0e19f3SScott Teel 	VERIFY_OFFSET(structure_size, 0);
9912dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_size, 4);
9913dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_cnt, 8);
9914dd0e19f3SScott Teel 	VERIFY_OFFSET(phys_blk_shift, 16);
9915dd0e19f3SScott Teel 	VERIFY_OFFSET(parity_rotation_shift, 17);
9916dd0e19f3SScott Teel 	VERIFY_OFFSET(strip_size, 18);
9917dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_starting_blk, 20);
9918dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_blk_cnt, 28);
9919dd0e19f3SScott Teel 	VERIFY_OFFSET(data_disks_per_row, 36);
9920dd0e19f3SScott Teel 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9921dd0e19f3SScott Teel 	VERIFY_OFFSET(row_cnt, 40);
9922dd0e19f3SScott Teel 	VERIFY_OFFSET(layout_map_count, 42);
9923dd0e19f3SScott Teel 	VERIFY_OFFSET(flags, 44);
9924dd0e19f3SScott Teel 	VERIFY_OFFSET(dekindex, 46);
9925dd0e19f3SScott Teel 	/* VERIFY_OFFSET(reserved, 48 */
9926dd0e19f3SScott Teel 	VERIFY_OFFSET(data, 64);
9927dd0e19f3SScott Teel 
9928dd0e19f3SScott Teel #undef VERIFY_OFFSET
9929dd0e19f3SScott Teel 
9930dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \
9931b66cc250SMike Miller 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9932b66cc250SMike Miller 
9933b66cc250SMike Miller 	VERIFY_OFFSET(IU_type, 0);
9934b66cc250SMike Miller 	VERIFY_OFFSET(direction, 1);
9935b66cc250SMike Miller 	VERIFY_OFFSET(reply_queue, 2);
9936b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved1, 3);  */
9937b66cc250SMike Miller 	VERIFY_OFFSET(scsi_nexus, 4);
9938b66cc250SMike Miller 	VERIFY_OFFSET(Tag, 8);
9939b66cc250SMike Miller 	VERIFY_OFFSET(cdb, 16);
9940b66cc250SMike Miller 	VERIFY_OFFSET(cciss_lun, 32);
9941b66cc250SMike Miller 	VERIFY_OFFSET(data_len, 40);
9942b66cc250SMike Miller 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9943b66cc250SMike Miller 	VERIFY_OFFSET(sg_count, 45);
9944b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved3 */
9945b66cc250SMike Miller 	VERIFY_OFFSET(err_ptr, 48);
9946b66cc250SMike Miller 	VERIFY_OFFSET(err_len, 56);
9947b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved4  */
9948b66cc250SMike Miller 	VERIFY_OFFSET(sg, 64);
9949b66cc250SMike Miller 
9950b66cc250SMike Miller #undef VERIFY_OFFSET
9951b66cc250SMike Miller 
9952b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \
9953e1f7de0cSMatt Gates 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9954e1f7de0cSMatt Gates 
9955e1f7de0cSMatt Gates 	VERIFY_OFFSET(dev_handle, 0x00);
9956e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved1, 0x02);
9957e1f7de0cSMatt Gates 	VERIFY_OFFSET(function, 0x03);
9958e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved2, 0x04);
9959e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info, 0x0C);
9960e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved3, 0x10);
9961e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info_len, 0x12);
9962e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved4, 0x13);
9963e1f7de0cSMatt Gates 	VERIFY_OFFSET(sgl_offset, 0x14);
9964e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved5, 0x15);
9965e1f7de0cSMatt Gates 	VERIFY_OFFSET(transfer_len, 0x1C);
9966e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved6, 0x20);
9967e1f7de0cSMatt Gates 	VERIFY_OFFSET(io_flags, 0x24);
9968e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved7, 0x26);
9969e1f7de0cSMatt Gates 	VERIFY_OFFSET(LUN, 0x34);
9970e1f7de0cSMatt Gates 	VERIFY_OFFSET(control, 0x3C);
9971e1f7de0cSMatt Gates 	VERIFY_OFFSET(CDB, 0x40);
9972e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved8, 0x50);
9973e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_context_flags, 0x60);
9974e1f7de0cSMatt Gates 	VERIFY_OFFSET(timeout_sec, 0x62);
9975e1f7de0cSMatt Gates 	VERIFY_OFFSET(ReplyQueue, 0x64);
9976e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved9, 0x65);
997750a0decfSStephen M. Cameron 	VERIFY_OFFSET(tag, 0x68);
9978e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_addr, 0x70);
9979e1f7de0cSMatt Gates 	VERIFY_OFFSET(CISS_LUN, 0x78);
9980e1f7de0cSMatt Gates 	VERIFY_OFFSET(SG, 0x78 + 8);
9981e1f7de0cSMatt Gates #undef VERIFY_OFFSET
9982e1f7de0cSMatt Gates }
9983e1f7de0cSMatt Gates 
9984edd16368SStephen M. Cameron module_init(hpsa_init);
9985edd16368SStephen M. Cameron module_exit(hpsa_cleanup);
9986