1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 6330c0061cSDon Brace #define HPSA_DRIVER_VERSION "3.4.20-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84253d2464SHannes Reinecke MODULE_ALIAS("cciss"); 85edd16368SStephen M. Cameron 8602ec19c8SStephen M. Cameron static int hpsa_simple_mode; 8702ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 8802ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 8902ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 90edd16368SStephen M. Cameron 91edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 92edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 93edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 94edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 95edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 98163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 99163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 100f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1019143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1029143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1039143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 1087f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 109fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 110fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 1137f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1263b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1303b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 135fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 136cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1418e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 146edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 147edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 148135ae6edSHannes Reinecke {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 149135ae6edSHannes Reinecke PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 150edd16368SStephen M. Cameron {0,} 151edd16368SStephen M. Cameron }; 152edd16368SStephen M. Cameron 153edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 154edd16368SStephen M. Cameron 155edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 156edd16368SStephen M. Cameron * product = Marketing Name for the board 157edd16368SStephen M. Cameron * access = Address of the struct of function pointers 158edd16368SStephen M. Cameron */ 159edd16368SStephen M. Cameron static struct board_type products[] = { 160135ae6edSHannes Reinecke {0x40700E11, "Smart Array 5300", &SA5A_access}, 161135ae6edSHannes Reinecke {0x40800E11, "Smart Array 5i", &SA5B_access}, 162135ae6edSHannes Reinecke {0x40820E11, "Smart Array 532", &SA5B_access}, 163135ae6edSHannes Reinecke {0x40830E11, "Smart Array 5312", &SA5B_access}, 164135ae6edSHannes Reinecke {0x409A0E11, "Smart Array 641", &SA5A_access}, 165135ae6edSHannes Reinecke {0x409B0E11, "Smart Array 642", &SA5A_access}, 166135ae6edSHannes Reinecke {0x409C0E11, "Smart Array 6400", &SA5A_access}, 167135ae6edSHannes Reinecke {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 168135ae6edSHannes Reinecke {0x40910E11, "Smart Array 6i", &SA5A_access}, 169135ae6edSHannes Reinecke {0x3225103C, "Smart Array P600", &SA5A_access}, 170135ae6edSHannes Reinecke {0x3223103C, "Smart Array P800", &SA5A_access}, 171135ae6edSHannes Reinecke {0x3234103C, "Smart Array P400", &SA5A_access}, 172135ae6edSHannes Reinecke {0x3235103C, "Smart Array P400i", &SA5A_access}, 173135ae6edSHannes Reinecke {0x3211103C, "Smart Array E200i", &SA5A_access}, 174135ae6edSHannes Reinecke {0x3212103C, "Smart Array E200", &SA5A_access}, 175135ae6edSHannes Reinecke {0x3213103C, "Smart Array E200i", &SA5A_access}, 176135ae6edSHannes Reinecke {0x3214103C, "Smart Array E200i", &SA5A_access}, 177135ae6edSHannes Reinecke {0x3215103C, "Smart Array E200i", &SA5A_access}, 178135ae6edSHannes Reinecke {0x3237103C, "Smart Array E500", &SA5A_access}, 179135ae6edSHannes Reinecke {0x323D103C, "Smart Array P700m", &SA5A_access}, 180edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 181edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 182edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 183edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 184edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 185163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 186163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1877d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 188fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 189fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 190fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 191fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 192fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 193fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 194fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1957f1974a7SDon Brace {0x1920103C, "Smart Array P430i", &SA5_access}, 1961fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1971fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1981fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1991fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 2007f1974a7SDon Brace {0x1925103C, "Smart Array P831", &SA5_access}, 2011fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 2021fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 2031fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 20427fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 20527fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 20627fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 20727fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 208c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 20927fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 21027fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 21197b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 21227fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 21327fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 21427fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 21527fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 21697b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 21727fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 21827fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 2193b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 2203b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 22127fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 222fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 223cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 224cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 225cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 226cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 227cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2288e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2298e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2308e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2318e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2328e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 233edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 234edd16368SStephen M. Cameron }; 235edd16368SStephen M. Cameron 236d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 237d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 238d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 239d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 240d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 241d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 242d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 243d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 244d04e62b9SKevin Barnett struct sas_rphy *rphy); 245d04e62b9SKevin Barnett 246a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 247a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 248a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 249a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 250edd16368SStephen M. Cameron static int number_of_controllers; 251edd16368SStephen M. Cameron 25210f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 25310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 25442a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 25742a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 25842a91641SDon Brace void __user *arg); 259edd16368SStephen M. Cameron #endif 260edd16368SStephen M. Cameron 261edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 262edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 26373153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 26473153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 26573153fe5SWebb Scales struct scsi_cmnd *scmd); 266a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 267b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 268edd16368SStephen M. Cameron int cmd_type); 2692c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 270b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 271b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 272edd16368SStephen M. Cameron 273f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 274a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 275a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 276a08a8471SStephen M. Cameron unsigned long elapsed_time); 2777c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 278edd16368SStephen M. Cameron 279edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 280edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 28141ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 282edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 283edd16368SStephen M. Cameron 2848aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 285edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 286edd16368SStephen M. Cameron struct CommandList *c); 287edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 288edd16368SStephen M. Cameron struct CommandList *c); 289303932fdSDon Brace /* performant mode helper functions */ 290303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2912b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 292105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 293105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 294254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2956f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2966f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2971df8552aSStephen M. Cameron u64 *cfg_offset); 2986f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2991df8552aSStephen M. Cameron unsigned long *memory_bar); 300135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 301135ae6edSHannes Reinecke bool *legacy_board); 302bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 303bfd7546cSDon Brace unsigned char lunaddr[], 304bfd7546cSDon Brace int reply_queue); 3056f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 3066f039790SGreg Kroah-Hartman int wait_for_ready); 30775167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 308c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 309fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 310fe5389c8SStephen M. Cameron #define BOARD_READY 1 31123100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 31276438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 313c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 314c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 31503383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 316080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 31725163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 31825163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 319c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 320d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 321d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 3228383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3238383278dSScott Teel unsigned char scsi3addr[], u8 page); 32434592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 325ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 326ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 327ba74fdc4SDon Brace unsigned char *scsi3addr); 328edd16368SStephen M. Cameron 329edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 330edd16368SStephen M. Cameron { 331edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 332edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 333edd16368SStephen M. Cameron } 334edd16368SStephen M. Cameron 335a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 336a23513e8SStephen M. Cameron { 337a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 338a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 339a23513e8SStephen M. Cameron } 340a23513e8SStephen M. Cameron 341a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 342a58e7e53SWebb Scales { 343a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 344a58e7e53SWebb Scales } 345a58e7e53SWebb Scales 346d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 347d604f533SWebb Scales { 34808ec46f6SDon Brace return c->reset_pending; 349d604f533SWebb Scales } 350d604f533SWebb Scales 3519437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3529437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3539437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3549437ac43SStephen Cameron { 3559437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3569437ac43SStephen Cameron bool rc; 3579437ac43SStephen Cameron 3589437ac43SStephen Cameron *sense_key = -1; 3599437ac43SStephen Cameron *asc = -1; 3609437ac43SStephen Cameron *ascq = -1; 3619437ac43SStephen Cameron 3629437ac43SStephen Cameron if (sense_data_len < 1) 3639437ac43SStephen Cameron return; 3649437ac43SStephen Cameron 3659437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3669437ac43SStephen Cameron if (rc) { 3679437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3689437ac43SStephen Cameron *asc = sshdr.asc; 3699437ac43SStephen Cameron *ascq = sshdr.ascq; 3709437ac43SStephen Cameron } 3719437ac43SStephen Cameron } 3729437ac43SStephen Cameron 373edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 374edd16368SStephen M. Cameron struct CommandList *c) 375edd16368SStephen M. Cameron { 3769437ac43SStephen Cameron u8 sense_key, asc, ascq; 3779437ac43SStephen Cameron int sense_len; 3789437ac43SStephen Cameron 3799437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3809437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3819437ac43SStephen Cameron else 3829437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3839437ac43SStephen Cameron 3849437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3859437ac43SStephen Cameron &sense_key, &asc, &ascq); 38681c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 387edd16368SStephen M. Cameron return 0; 388edd16368SStephen M. Cameron 3899437ac43SStephen Cameron switch (asc) { 390edd16368SStephen M. Cameron case STATE_CHANGED: 3919437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3922946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3932946e82bSRobert Elliott h->devname); 394edd16368SStephen M. Cameron break; 395edd16368SStephen M. Cameron case LUN_FAILED: 3967f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3972946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 398edd16368SStephen M. Cameron break; 399edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 4007f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 4012946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 402edd16368SStephen M. Cameron /* 4034f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 4044f4eb9f1SScott Teel * target (array) devices. 405edd16368SStephen M. Cameron */ 406edd16368SStephen M. Cameron break; 407edd16368SStephen M. Cameron case POWER_OR_RESET: 4082946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4092946e82bSRobert Elliott "%s: a power on or device reset detected\n", 4102946e82bSRobert Elliott h->devname); 411edd16368SStephen M. Cameron break; 412edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 4132946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4142946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 4152946e82bSRobert Elliott h->devname); 416edd16368SStephen M. Cameron break; 417edd16368SStephen M. Cameron default: 4182946e82bSRobert Elliott dev_warn(&h->pdev->dev, 4192946e82bSRobert Elliott "%s: unknown unit attention detected\n", 4202946e82bSRobert Elliott h->devname); 421edd16368SStephen M. Cameron break; 422edd16368SStephen M. Cameron } 423edd16368SStephen M. Cameron return 1; 424edd16368SStephen M. Cameron } 425edd16368SStephen M. Cameron 426852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 427852af20aSMatt Bondurant { 428852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 429852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 430852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 431852af20aSMatt Bondurant return 0; 432852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 433852af20aSMatt Bondurant return 1; 434852af20aSMatt Bondurant } 435852af20aSMatt Bondurant 436e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 437e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 438e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 439e985c58fSStephen Cameron { 440e985c58fSStephen Cameron int ld; 441e985c58fSStephen Cameron struct ctlr_info *h; 442e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 443e985c58fSStephen Cameron 444e985c58fSStephen Cameron h = shost_to_hba(shost); 445e985c58fSStephen Cameron ld = lockup_detected(h); 446e985c58fSStephen Cameron 447e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 448e985c58fSStephen Cameron } 449e985c58fSStephen Cameron 450da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 451da0697bdSScott Teel struct device_attribute *attr, 452da0697bdSScott Teel const char *buf, size_t count) 453da0697bdSScott Teel { 454da0697bdSScott Teel int status, len; 455da0697bdSScott Teel struct ctlr_info *h; 456da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 457da0697bdSScott Teel char tmpbuf[10]; 458da0697bdSScott Teel 459da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 460da0697bdSScott Teel return -EACCES; 461da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 462da0697bdSScott Teel strncpy(tmpbuf, buf, len); 463da0697bdSScott Teel tmpbuf[len] = '\0'; 464da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 465da0697bdSScott Teel return -EINVAL; 466da0697bdSScott Teel h = shost_to_hba(shost); 467da0697bdSScott Teel h->acciopath_status = !!status; 468da0697bdSScott Teel dev_warn(&h->pdev->dev, 469da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 470da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 471da0697bdSScott Teel return count; 472da0697bdSScott Teel } 473da0697bdSScott Teel 4742ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4752ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4762ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4772ba8bfc8SStephen M. Cameron { 4782ba8bfc8SStephen M. Cameron int debug_level, len; 4792ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4802ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4812ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4822ba8bfc8SStephen M. Cameron 4832ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4842ba8bfc8SStephen M. Cameron return -EACCES; 4852ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4862ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4872ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4882ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4892ba8bfc8SStephen M. Cameron return -EINVAL; 4902ba8bfc8SStephen M. Cameron if (debug_level < 0) 4912ba8bfc8SStephen M. Cameron debug_level = 0; 4922ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4932ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4942ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4952ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4962ba8bfc8SStephen M. Cameron return count; 4972ba8bfc8SStephen M. Cameron } 4982ba8bfc8SStephen M. Cameron 499edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 500edd16368SStephen M. Cameron struct device_attribute *attr, 501edd16368SStephen M. Cameron const char *buf, size_t count) 502edd16368SStephen M. Cameron { 503edd16368SStephen M. Cameron struct ctlr_info *h; 504edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 505a23513e8SStephen M. Cameron h = shost_to_hba(shost); 50631468401SMike Miller hpsa_scan_start(h->scsi_host); 507edd16368SStephen M. Cameron return count; 508edd16368SStephen M. Cameron } 509edd16368SStephen M. Cameron 510d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 511d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 512d28ce020SStephen M. Cameron { 513d28ce020SStephen M. Cameron struct ctlr_info *h; 514d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 515d28ce020SStephen M. Cameron unsigned char *fwrev; 516d28ce020SStephen M. Cameron 517d28ce020SStephen M. Cameron h = shost_to_hba(shost); 518d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 519d28ce020SStephen M. Cameron return 0; 520d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 521d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 522d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 523d28ce020SStephen M. Cameron } 524d28ce020SStephen M. Cameron 52594a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 52694a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 52794a13649SStephen M. Cameron { 52894a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 52994a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 53094a13649SStephen M. Cameron 5310cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5320cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 53394a13649SStephen M. Cameron } 53494a13649SStephen M. Cameron 535745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 536745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 537745a7a25SStephen M. Cameron { 538745a7a25SStephen M. Cameron struct ctlr_info *h; 539745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 540745a7a25SStephen M. Cameron 541745a7a25SStephen M. Cameron h = shost_to_hba(shost); 542745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 543960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 544745a7a25SStephen M. Cameron "performant" : "simple"); 545745a7a25SStephen M. Cameron } 546745a7a25SStephen M. Cameron 547da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 548da0697bdSScott Teel struct device_attribute *attr, char *buf) 549da0697bdSScott Teel { 550da0697bdSScott Teel struct ctlr_info *h; 551da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 552da0697bdSScott Teel 553da0697bdSScott Teel h = shost_to_hba(shost); 554da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 555da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 556da0697bdSScott Teel } 557da0697bdSScott Teel 55846380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 559941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 560941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 561941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 562941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 563941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 564941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 565941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 566941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 567941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 568941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 569941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 570941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 571941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5727af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 573941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 574941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5755a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5765a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5775a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5785a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5795a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5805a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 581941b1cdaSStephen M. Cameron }; 582941b1cdaSStephen M. Cameron 58346380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 58446380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5857af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5865a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5875a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5885a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5895a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5905a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5915a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 59246380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 59346380786SStephen M. Cameron * which share a battery backed cache module. One controls the 59446380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 59546380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 59646380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 59746380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 59846380786SStephen M. Cameron */ 59946380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 60046380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 60146380786SStephen M. Cameron }; 60246380786SStephen M. Cameron 6039b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 604941b1cdaSStephen M. Cameron { 605941b1cdaSStephen M. Cameron int i; 606941b1cdaSStephen M. Cameron 6079b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 6089b5c48c2SStephen Cameron if (a[i] == board_id) 609941b1cdaSStephen M. Cameron return 1; 6109b5c48c2SStephen Cameron return 0; 6119b5c48c2SStephen Cameron } 6129b5c48c2SStephen Cameron 6139b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 6149b5c48c2SStephen Cameron { 6159b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 6169b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 617941b1cdaSStephen M. Cameron } 618941b1cdaSStephen M. Cameron 61946380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 62046380786SStephen M. Cameron { 6219b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6229b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 62346380786SStephen M. Cameron } 62446380786SStephen M. Cameron 62546380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 62646380786SStephen M. Cameron { 62746380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 62846380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 62946380786SStephen M. Cameron } 63046380786SStephen M. Cameron 631941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 632941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 633941b1cdaSStephen M. Cameron { 634941b1cdaSStephen M. Cameron struct ctlr_info *h; 635941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 636941b1cdaSStephen M. Cameron 637941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 63846380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 639941b1cdaSStephen M. Cameron } 640941b1cdaSStephen M. Cameron 641edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 642edd16368SStephen M. Cameron { 643edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 644edd16368SStephen M. Cameron } 645edd16368SStephen M. Cameron 646f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6477c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 648edd16368SStephen M. Cameron }; 6496b80b18fSScott Teel #define HPSA_RAID_0 0 6506b80b18fSScott Teel #define HPSA_RAID_4 1 6516b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6526b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6536b80b18fSScott Teel #define HPSA_RAID_51 4 6546b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6556b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6567c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6577c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 658edd16368SStephen M. Cameron 659f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 660f3f01730SKevin Barnett { 661f3f01730SKevin Barnett return !device->physical_device; 662f3f01730SKevin Barnett } 663edd16368SStephen M. Cameron 664edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 665edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 666edd16368SStephen M. Cameron { 667edd16368SStephen M. Cameron ssize_t l = 0; 66882a72c0aSStephen M. Cameron unsigned char rlevel; 669edd16368SStephen M. Cameron struct ctlr_info *h; 670edd16368SStephen M. Cameron struct scsi_device *sdev; 671edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 672edd16368SStephen M. Cameron unsigned long flags; 673edd16368SStephen M. Cameron 674edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 675edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 676edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 677edd16368SStephen M. Cameron hdev = sdev->hostdata; 678edd16368SStephen M. Cameron if (!hdev) { 679edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 680edd16368SStephen M. Cameron return -ENODEV; 681edd16368SStephen M. Cameron } 682edd16368SStephen M. Cameron 683edd16368SStephen M. Cameron /* Is this even a logical drive? */ 684f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 685edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 686edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 687edd16368SStephen M. Cameron return l; 688edd16368SStephen M. Cameron } 689edd16368SStephen M. Cameron 690edd16368SStephen M. Cameron rlevel = hdev->raid_level; 691edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 69282a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 693edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 694edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 695edd16368SStephen M. Cameron return l; 696edd16368SStephen M. Cameron } 697edd16368SStephen M. Cameron 698edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 699edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 700edd16368SStephen M. Cameron { 701edd16368SStephen M. Cameron struct ctlr_info *h; 702edd16368SStephen M. Cameron struct scsi_device *sdev; 703edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 704edd16368SStephen M. Cameron unsigned long flags; 705edd16368SStephen M. Cameron unsigned char lunid[8]; 706edd16368SStephen M. Cameron 707edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 708edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 709edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 710edd16368SStephen M. Cameron hdev = sdev->hostdata; 711edd16368SStephen M. Cameron if (!hdev) { 712edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 713edd16368SStephen M. Cameron return -ENODEV; 714edd16368SStephen M. Cameron } 715edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 716edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 717609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 718edd16368SStephen M. Cameron } 719edd16368SStephen M. Cameron 720edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 721edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 722edd16368SStephen M. Cameron { 723edd16368SStephen M. Cameron struct ctlr_info *h; 724edd16368SStephen M. Cameron struct scsi_device *sdev; 725edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 726edd16368SStephen M. Cameron unsigned long flags; 727edd16368SStephen M. Cameron unsigned char sn[16]; 728edd16368SStephen M. Cameron 729edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 730edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 731edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 732edd16368SStephen M. Cameron hdev = sdev->hostdata; 733edd16368SStephen M. Cameron if (!hdev) { 734edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 735edd16368SStephen M. Cameron return -ENODEV; 736edd16368SStephen M. Cameron } 737edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 738edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 739edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 740edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 741edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 742edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 743edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 744edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 745edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 746edd16368SStephen M. Cameron } 747edd16368SStephen M. Cameron 748ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 749ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 750ded1be4aSJoseph T Handzik { 751ded1be4aSJoseph T Handzik struct ctlr_info *h; 752ded1be4aSJoseph T Handzik struct scsi_device *sdev; 753ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 754ded1be4aSJoseph T Handzik unsigned long flags; 755ded1be4aSJoseph T Handzik u64 sas_address; 756ded1be4aSJoseph T Handzik 757ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 758ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 759ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 760ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 761ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 762ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 763ded1be4aSJoseph T Handzik return -ENODEV; 764ded1be4aSJoseph T Handzik } 765ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 766ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 767ded1be4aSJoseph T Handzik 768ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 769ded1be4aSJoseph T Handzik } 770ded1be4aSJoseph T Handzik 771c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 772c1988684SScott Teel struct device_attribute *attr, char *buf) 773c1988684SScott Teel { 774c1988684SScott Teel struct ctlr_info *h; 775c1988684SScott Teel struct scsi_device *sdev; 776c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 777c1988684SScott Teel unsigned long flags; 778c1988684SScott Teel int offload_enabled; 779c1988684SScott Teel 780c1988684SScott Teel sdev = to_scsi_device(dev); 781c1988684SScott Teel h = sdev_to_hba(sdev); 782c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 783c1988684SScott Teel hdev = sdev->hostdata; 784c1988684SScott Teel if (!hdev) { 785c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 786c1988684SScott Teel return -ENODEV; 787c1988684SScott Teel } 788c1988684SScott Teel offload_enabled = hdev->offload_enabled; 789c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 790b2582a65SDon Brace 791b2582a65SDon Brace if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 792c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 793b2582a65SDon Brace else 794b2582a65SDon Brace return snprintf(buf, 40, "%s\n", 795b2582a65SDon Brace "Not applicable for a controller"); 796c1988684SScott Teel } 797c1988684SScott Teel 7988270b862SJoe Handzik #define MAX_PATHS 8 7998270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 8008270b862SJoe Handzik struct device_attribute *attr, char *buf) 8018270b862SJoe Handzik { 8028270b862SJoe Handzik struct ctlr_info *h; 8038270b862SJoe Handzik struct scsi_device *sdev; 8048270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 8058270b862SJoe Handzik unsigned long flags; 8068270b862SJoe Handzik int i; 8078270b862SJoe Handzik int output_len = 0; 8088270b862SJoe Handzik u8 box; 8098270b862SJoe Handzik u8 bay; 8108270b862SJoe Handzik u8 path_map_index = 0; 8118270b862SJoe Handzik char *active; 8128270b862SJoe Handzik unsigned char phys_connector[2]; 8138270b862SJoe Handzik 8148270b862SJoe Handzik sdev = to_scsi_device(dev); 8158270b862SJoe Handzik h = sdev_to_hba(sdev); 8168270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8178270b862SJoe Handzik hdev = sdev->hostdata; 8188270b862SJoe Handzik if (!hdev) { 8198270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8208270b862SJoe Handzik return -ENODEV; 8218270b862SJoe Handzik } 8228270b862SJoe Handzik 8238270b862SJoe Handzik bay = hdev->bay; 8248270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8258270b862SJoe Handzik path_map_index = 1<<i; 8268270b862SJoe Handzik if (i == hdev->active_path_index) 8278270b862SJoe Handzik active = "Active"; 8288270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8298270b862SJoe Handzik active = "Inactive"; 8308270b862SJoe Handzik else 8318270b862SJoe Handzik continue; 8328270b862SJoe Handzik 8331faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8341faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8351faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8368270b862SJoe Handzik h->scsi_host->host_no, 8378270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8388270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8398270b862SJoe Handzik 840cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8412708f295SDon Brace output_len += scnprintf(buf + output_len, 8421faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8431faf072cSRasmus Villemoes "%s\n", active); 8448270b862SJoe Handzik continue; 8458270b862SJoe Handzik } 8468270b862SJoe Handzik 8478270b862SJoe Handzik box = hdev->box[i]; 8488270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8498270b862SJoe Handzik sizeof(phys_connector)); 8508270b862SJoe Handzik if (phys_connector[0] < '0') 8518270b862SJoe Handzik phys_connector[0] = '0'; 8528270b862SJoe Handzik if (phys_connector[1] < '0') 8538270b862SJoe Handzik phys_connector[1] = '0'; 8542708f295SDon Brace output_len += scnprintf(buf + output_len, 8551faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8568270b862SJoe Handzik "PORT: %.2s ", 8578270b862SJoe Handzik phys_connector); 858af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 859af15ed36SDon Brace hdev->expose_device) { 8608270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8612708f295SDon Brace output_len += scnprintf(buf + output_len, 8621faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8638270b862SJoe Handzik "BAY: %hhu %s\n", 8648270b862SJoe Handzik bay, active); 8658270b862SJoe Handzik } else { 8662708f295SDon Brace output_len += scnprintf(buf + output_len, 8671faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8688270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8698270b862SJoe Handzik box, bay, active); 8708270b862SJoe Handzik } 8718270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8722708f295SDon Brace output_len += scnprintf(buf + output_len, 8731faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8748270b862SJoe Handzik box, active); 8758270b862SJoe Handzik } else 8762708f295SDon Brace output_len += scnprintf(buf + output_len, 8771faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8788270b862SJoe Handzik } 8798270b862SJoe Handzik 8808270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8811faf072cSRasmus Villemoes return output_len; 8828270b862SJoe Handzik } 8838270b862SJoe Handzik 88416961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 88516961204SHannes Reinecke struct device_attribute *attr, char *buf) 88616961204SHannes Reinecke { 88716961204SHannes Reinecke struct ctlr_info *h; 88816961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 88916961204SHannes Reinecke 89016961204SHannes Reinecke h = shost_to_hba(shost); 89116961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 89216961204SHannes Reinecke } 89316961204SHannes Reinecke 894135ae6edSHannes Reinecke static ssize_t host_show_legacy_board(struct device *dev, 895135ae6edSHannes Reinecke struct device_attribute *attr, char *buf) 896135ae6edSHannes Reinecke { 897135ae6edSHannes Reinecke struct ctlr_info *h; 898135ae6edSHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 899135ae6edSHannes Reinecke 900135ae6edSHannes Reinecke h = shost_to_hba(shost); 901135ae6edSHannes Reinecke return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 902135ae6edSHannes Reinecke } 903135ae6edSHannes Reinecke 9043f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 9053f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 9063f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 9073f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 908ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 909c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 910c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 9118270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 912da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 913da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 914da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 9152ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 9162ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 9173f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 9183f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 9193f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 9203f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 9213f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 9223f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 923941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 924941b1cdaSStephen M. Cameron host_show_resettable, NULL); 925e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 926e985c58fSStephen Cameron host_show_lockup_detected, NULL); 92716961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 92816961204SHannes Reinecke host_show_ctlr_num, NULL); 929135ae6edSHannes Reinecke static DEVICE_ATTR(legacy_board, S_IRUGO, 930135ae6edSHannes Reinecke host_show_legacy_board, NULL); 9313f5eac3aSStephen M. Cameron 9323f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 9333f5eac3aSStephen M. Cameron &dev_attr_raid_level, 9343f5eac3aSStephen M. Cameron &dev_attr_lunid, 9353f5eac3aSStephen M. Cameron &dev_attr_unique_id, 936c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9378270b862SJoe Handzik &dev_attr_path_info, 938ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9393f5eac3aSStephen M. Cameron NULL, 9403f5eac3aSStephen M. Cameron }; 9413f5eac3aSStephen M. Cameron 9423f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9433f5eac3aSStephen M. Cameron &dev_attr_rescan, 9443f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9453f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9463f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 947941b1cdaSStephen M. Cameron &dev_attr_resettable, 948da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9492ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 950fb53c439STomas Henzl &dev_attr_lockup_detected, 95116961204SHannes Reinecke &dev_attr_ctlr_num, 952135ae6edSHannes Reinecke &dev_attr_legacy_board, 9533f5eac3aSStephen M. Cameron NULL, 9543f5eac3aSStephen M. Cameron }; 9553f5eac3aSStephen M. Cameron 95608ec46f6SDon Brace #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 95708ec46f6SDon Brace HPSA_MAX_CONCURRENT_PASSTHRUS) 95841ce4c35SStephen Cameron 9593f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9603f5eac3aSStephen M. Cameron .module = THIS_MODULE, 961f79cfec6SStephen M. Cameron .name = HPSA, 962f79cfec6SStephen M. Cameron .proc_name = HPSA, 9633f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9643f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9653f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9667c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9673f5eac3aSStephen M. Cameron .this_id = -1, 9683f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 9693f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9703f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9713f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 97241ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9733f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9743f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9753f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9763f5eac3aSStephen M. Cameron #endif 9773f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9783f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 979e2c7b433SYadan Fan .max_sectors = 1024, 98054b2b50cSMartin K. Petersen .no_write_same = 1, 9813f5eac3aSStephen M. Cameron }; 9823f5eac3aSStephen M. Cameron 983254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9843f5eac3aSStephen M. Cameron { 9853f5eac3aSStephen M. Cameron u32 a; 986072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9873f5eac3aSStephen M. Cameron 988e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 989e1f7de0cSMatt Gates return h->access.command_completed(h, q); 990e1f7de0cSMatt Gates 9913f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 992254f796bSMatt Gates return h->access.command_completed(h, q); 9933f5eac3aSStephen M. Cameron 994254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 995254f796bSMatt Gates a = rq->head[rq->current_entry]; 996254f796bSMatt Gates rq->current_entry++; 9970cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9983f5eac3aSStephen M. Cameron } else { 9993f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 10003f5eac3aSStephen M. Cameron } 10013f5eac3aSStephen M. Cameron /* Check for wraparound */ 1002254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 1003254f796bSMatt Gates rq->current_entry = 0; 1004254f796bSMatt Gates rq->wraparound ^= 1; 10053f5eac3aSStephen M. Cameron } 10063f5eac3aSStephen M. Cameron return a; 10073f5eac3aSStephen M. Cameron } 10083f5eac3aSStephen M. Cameron 1009c349775eSScott Teel /* 1010c349775eSScott Teel * There are some special bits in the bus address of the 1011c349775eSScott Teel * command that we have to set for the controller to know 1012c349775eSScott Teel * how to process the command: 1013c349775eSScott Teel * 1014c349775eSScott Teel * Normal performant mode: 1015c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 1016c349775eSScott Teel * bits 1-3 = block fetch table entry 1017c349775eSScott Teel * bits 4-6 = command type (== 0) 1018c349775eSScott Teel * 1019c349775eSScott Teel * ioaccel1 mode: 1020c349775eSScott Teel * bit 0 = "performant mode" bit. 1021c349775eSScott Teel * bits 1-3 = block fetch table entry 1022c349775eSScott Teel * bits 4-6 = command type (== 110) 1023c349775eSScott Teel * (command type is needed because ioaccel1 mode 1024c349775eSScott Teel * commands are submitted through the same register as normal 1025c349775eSScott Teel * mode commands, so this is how the controller knows whether 1026c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 1027c349775eSScott Teel * 1028c349775eSScott Teel * ioaccel2 mode: 1029c349775eSScott Teel * bit 0 = "performant mode" bit. 1030c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1031c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1032c349775eSScott Teel * a separate special register for submitting commands. 1033c349775eSScott Teel */ 1034c349775eSScott Teel 103525163bd5SWebb Scales /* 103625163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10373f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10383f5eac3aSStephen M. Cameron * register number 10393f5eac3aSStephen M. Cameron */ 104025163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 104125163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 104225163bd5SWebb Scales int reply_queue) 10433f5eac3aSStephen M. Cameron { 1044254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10453f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1046bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 104725163bd5SWebb Scales return; 104825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1049254f796bSMatt Gates c->Header.ReplyQueue = 1050804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 105125163bd5SWebb Scales else 105225163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1053254f796bSMatt Gates } 10543f5eac3aSStephen M. Cameron } 10553f5eac3aSStephen M. Cameron 1056c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 105725163bd5SWebb Scales struct CommandList *c, 105825163bd5SWebb Scales int reply_queue) 1059c349775eSScott Teel { 1060c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1061c349775eSScott Teel 106225163bd5SWebb Scales /* 106325163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1064c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1065c349775eSScott Teel */ 106625163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1067c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 106825163bd5SWebb Scales else 106925163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 107025163bd5SWebb Scales /* 107125163bd5SWebb Scales * Set the bits in the address sent down to include: 1072c349775eSScott Teel * - performant mode bit (bit 0) 1073c349775eSScott Teel * - pull count (bits 1-3) 1074c349775eSScott Teel * - command type (bits 4-6) 1075c349775eSScott Teel */ 1076c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1077c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1078c349775eSScott Teel } 1079c349775eSScott Teel 10808be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10818be986ccSStephen Cameron struct CommandList *c, 10828be986ccSStephen Cameron int reply_queue) 10838be986ccSStephen Cameron { 10848be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10858be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10868be986ccSStephen Cameron 10878be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10888be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10898be986ccSStephen Cameron */ 10908be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10918be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10928be986ccSStephen Cameron else 10938be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10948be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10958be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10968be986ccSStephen Cameron * - pull count (bits 0-3) 10978be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10988be986ccSStephen Cameron */ 10998be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 11008be986ccSStephen Cameron } 11018be986ccSStephen Cameron 1102c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 110325163bd5SWebb Scales struct CommandList *c, 110425163bd5SWebb Scales int reply_queue) 1105c349775eSScott Teel { 1106c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1107c349775eSScott Teel 110825163bd5SWebb Scales /* 110925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1110c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1111c349775eSScott Teel */ 111225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1113c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 111425163bd5SWebb Scales else 111525163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 111625163bd5SWebb Scales /* 111725163bd5SWebb Scales * Set the bits in the address sent down to include: 1118c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1119c349775eSScott Teel * - pull count (bits 0-3) 1120c349775eSScott Teel * - command type isn't needed for ioaccel2 1121c349775eSScott Teel */ 1122c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1123c349775eSScott Teel } 1124c349775eSScott Teel 1125e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1126e85c5974SStephen M. Cameron { 1127e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1128e85c5974SStephen M. Cameron } 1129e85c5974SStephen M. Cameron 1130e85c5974SStephen M. Cameron /* 1131e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1132e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1133e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1134e85c5974SStephen M. Cameron */ 1135e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1136e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 11373d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1138e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1139e85c5974SStephen M. Cameron struct CommandList *c) 1140e85c5974SStephen M. Cameron { 1141e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1142e85c5974SStephen M. Cameron return; 1143e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1144e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1145e85c5974SStephen M. Cameron } 1146e85c5974SStephen M. Cameron 1147e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1148e85c5974SStephen M. Cameron struct CommandList *c) 1149e85c5974SStephen M. Cameron { 1150e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1151e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1152e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1153e85c5974SStephen M. Cameron } 1154e85c5974SStephen M. Cameron 115525163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 115625163bd5SWebb Scales struct CommandList *c, int reply_queue) 11573f5eac3aSStephen M. Cameron { 1158c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1159c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1160c349775eSScott Teel switch (c->cmd_type) { 1161c349775eSScott Teel case CMD_IOACCEL1: 116225163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1163c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1164c349775eSScott Teel break; 1165c349775eSScott Teel case CMD_IOACCEL2: 116625163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1167c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1168c349775eSScott Teel break; 11698be986ccSStephen Cameron case IOACCEL2_TMF: 11708be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11718be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11728be986ccSStephen Cameron break; 1173c349775eSScott Teel default: 117425163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1175f2405db8SDon Brace h->access.submit_command(h, c); 11763f5eac3aSStephen M. Cameron } 1177c05e8866SStephen Cameron } 11783f5eac3aSStephen M. Cameron 1179a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 118025163bd5SWebb Scales { 1181d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1182a58e7e53SWebb Scales return finish_cmd(c); 1183a58e7e53SWebb Scales 118425163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 118525163bd5SWebb Scales } 118625163bd5SWebb Scales 11873f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11883f5eac3aSStephen M. Cameron { 11893f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11903f5eac3aSStephen M. Cameron } 11913f5eac3aSStephen M. Cameron 11923f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11933f5eac3aSStephen M. Cameron { 11943f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11953f5eac3aSStephen M. Cameron return 0; 11963f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11973f5eac3aSStephen M. Cameron return 1; 11983f5eac3aSStephen M. Cameron return 0; 11993f5eac3aSStephen M. Cameron } 12003f5eac3aSStephen M. Cameron 1201edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1202edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1203edd16368SStephen M. Cameron { 1204edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1205edd16368SStephen M. Cameron * assumes h->devlock is held 1206edd16368SStephen M. Cameron */ 1207edd16368SStephen M. Cameron int i, found = 0; 1208cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1209edd16368SStephen M. Cameron 1210263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1211edd16368SStephen M. Cameron 1212edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1213edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1214263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1215edd16368SStephen M. Cameron } 1216edd16368SStephen M. Cameron 1217263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1218263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1219edd16368SStephen M. Cameron /* *bus = 1; */ 1220edd16368SStephen M. Cameron *target = i; 1221edd16368SStephen M. Cameron *lun = 0; 1222edd16368SStephen M. Cameron found = 1; 1223edd16368SStephen M. Cameron } 1224edd16368SStephen M. Cameron return !found; 1225edd16368SStephen M. Cameron } 1226edd16368SStephen M. Cameron 12271d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 12280d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12290d96ef5fSWebb Scales { 12307c59a0d4SDon Brace #define LABEL_SIZE 25 12317c59a0d4SDon Brace char label[LABEL_SIZE]; 12327c59a0d4SDon Brace 12339975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12349975ec9dSDon Brace return; 12359975ec9dSDon Brace 12367c59a0d4SDon Brace switch (dev->devtype) { 12377c59a0d4SDon Brace case TYPE_RAID: 12387c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12397c59a0d4SDon Brace break; 12407c59a0d4SDon Brace case TYPE_ENCLOSURE: 12417c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12427c59a0d4SDon Brace break; 12437c59a0d4SDon Brace case TYPE_DISK: 1244af15ed36SDon Brace case TYPE_ZBC: 12457c59a0d4SDon Brace if (dev->external) 12467c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12477c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12487c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12497c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12507c59a0d4SDon Brace else 12517c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12527c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12537c59a0d4SDon Brace raid_label[dev->raid_level]); 12547c59a0d4SDon Brace break; 12557c59a0d4SDon Brace case TYPE_ROM: 12567c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12577c59a0d4SDon Brace break; 12587c59a0d4SDon Brace case TYPE_TAPE: 12597c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12607c59a0d4SDon Brace break; 12617c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12627c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12637c59a0d4SDon Brace break; 12647c59a0d4SDon Brace default: 12657c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12667c59a0d4SDon Brace break; 12677c59a0d4SDon Brace } 12687c59a0d4SDon Brace 12690d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12707c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12710d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12720d96ef5fSWebb Scales description, 12730d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12740d96ef5fSWebb Scales dev->vendor, 12750d96ef5fSWebb Scales dev->model, 12767c59a0d4SDon Brace label, 12770d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 1278b2582a65SDon Brace dev->offload_to_be_enabled ? '+' : '-', 12792a168208SKevin Barnett dev->expose_device); 12800d96ef5fSWebb Scales } 12810d96ef5fSWebb Scales 1282edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12838aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1284edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1285edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1286edd16368SStephen M. Cameron { 1287edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1288edd16368SStephen M. Cameron int n = h->ndevices; 1289edd16368SStephen M. Cameron int i; 1290edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1291edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1292edd16368SStephen M. Cameron 1293cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1294edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1295edd16368SStephen M. Cameron "inaccessible.\n"); 1296edd16368SStephen M. Cameron return -1; 1297edd16368SStephen M. Cameron } 1298edd16368SStephen M. Cameron 1299edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1300edd16368SStephen M. Cameron if (device->lun != -1) 1301edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1302edd16368SStephen M. Cameron goto lun_assigned; 1303edd16368SStephen M. Cameron 1304edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1305edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 13062b08b3e9SDon Brace * unit no, zero otherwise. 1307edd16368SStephen M. Cameron */ 1308edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1309edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1310edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1311edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1312edd16368SStephen M. Cameron return -1; 1313edd16368SStephen M. Cameron goto lun_assigned; 1314edd16368SStephen M. Cameron } 1315edd16368SStephen M. Cameron 1316edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1317edd16368SStephen M. Cameron * Search through our list and find the device which 13189a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1319edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1320edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1321edd16368SStephen M. Cameron */ 1322edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1323edd16368SStephen M. Cameron addr1[4] = 0; 13249a4178b7Sshane.seymour addr1[5] = 0; 1325edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1326edd16368SStephen M. Cameron sd = h->dev[i]; 1327edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1328edd16368SStephen M. Cameron addr2[4] = 0; 13299a4178b7Sshane.seymour addr2[5] = 0; 13309a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1331edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1332edd16368SStephen M. Cameron device->bus = sd->bus; 1333edd16368SStephen M. Cameron device->target = sd->target; 1334edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1335edd16368SStephen M. Cameron break; 1336edd16368SStephen M. Cameron } 1337edd16368SStephen M. Cameron } 1338edd16368SStephen M. Cameron if (device->lun == -1) { 1339edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1340edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1341edd16368SStephen M. Cameron "configuration.\n"); 1342edd16368SStephen M. Cameron return -1; 1343edd16368SStephen M. Cameron } 1344edd16368SStephen M. Cameron 1345edd16368SStephen M. Cameron lun_assigned: 1346edd16368SStephen M. Cameron 1347edd16368SStephen M. Cameron h->dev[n] = device; 1348edd16368SStephen M. Cameron h->ndevices++; 1349edd16368SStephen M. Cameron added[*nadded] = device; 1350edd16368SStephen M. Cameron (*nadded)++; 13510d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13522a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1353edd16368SStephen M. Cameron return 0; 1354edd16368SStephen M. Cameron } 1355edd16368SStephen M. Cameron 1356b2582a65SDon Brace /* 1357b2582a65SDon Brace * Called during a scan operation. 1358b2582a65SDon Brace * 1359b2582a65SDon Brace * Update an entry in h->dev[] array. 1360b2582a65SDon Brace */ 13618aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1362bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1363bd9244f7SScott Teel { 1364bd9244f7SScott Teel /* assumes h->devlock is held */ 1365bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1366bd9244f7SScott Teel 1367bd9244f7SScott Teel /* Raid level changed. */ 1368bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1369250fb125SStephen M. Cameron 1370b2582a65SDon Brace /* 1371b2582a65SDon Brace * ioacccel_handle may have changed for a dual domain disk 1372b2582a65SDon Brace */ 1373b2582a65SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1374b2582a65SDon Brace 137503383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 1376b2582a65SDon Brace if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 137703383736SDon Brace /* 137803383736SDon Brace * if drive is newly offload_enabled, we want to copy the 137903383736SDon Brace * raid map data first. If previously offload_enabled and 138003383736SDon Brace * offload_config were set, raid map data had better be 1381b2582a65SDon Brace * the same as it was before. If raid map data has changed 138203383736SDon Brace * then it had better be the case that 138303383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 138403383736SDon Brace */ 13859fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 138603383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 138703383736SDon Brace } 1388b2582a65SDon Brace if (new_entry->offload_to_be_enabled) { 1389a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1390a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1391a3144e0bSJoe Handzik } 1392a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 139303383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 139403383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 139503383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1396250fb125SStephen M. Cameron 139741ce4c35SStephen Cameron /* 139841ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 1399b2582a65SDon Brace * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 140041ce4c35SStephen Cameron * can't do that until all the devices are updated. 140141ce4c35SStephen Cameron */ 1402b2582a65SDon Brace h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1403b2582a65SDon Brace 1404b2582a65SDon Brace /* 1405b2582a65SDon Brace * turn ioaccel off immediately if told to do so. 1406b2582a65SDon Brace */ 1407b2582a65SDon Brace if (!new_entry->offload_to_be_enabled) 140841ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 140941ce4c35SStephen Cameron 14100d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1411bd9244f7SScott Teel } 1412bd9244f7SScott Teel 14132a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 14148aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 14152a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 14162a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 14172a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 14182a8ccf31SStephen M. Cameron { 14192a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1420cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 14212a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 14222a8ccf31SStephen M. Cameron (*nremoved)++; 142301350d05SStephen M. Cameron 142401350d05SStephen M. Cameron /* 142501350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 142601350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 142701350d05SStephen M. Cameron */ 142801350d05SStephen M. Cameron if (new_entry->target == -1) { 142901350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 143001350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 143101350d05SStephen M. Cameron } 143201350d05SStephen M. Cameron 14332a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 14342a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 14352a8ccf31SStephen M. Cameron (*nadded)++; 1436b2582a65SDon Brace 14370d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 14382a8ccf31SStephen M. Cameron } 14392a8ccf31SStephen M. Cameron 1440edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14418aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1442edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1443edd16368SStephen M. Cameron { 1444edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1445edd16368SStephen M. Cameron int i; 1446edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1447edd16368SStephen M. Cameron 1448cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1449edd16368SStephen M. Cameron 1450edd16368SStephen M. Cameron sd = h->dev[entry]; 1451edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1452edd16368SStephen M. Cameron (*nremoved)++; 1453edd16368SStephen M. Cameron 1454edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1455edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1456edd16368SStephen M. Cameron h->ndevices--; 14570d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1458edd16368SStephen M. Cameron } 1459edd16368SStephen M. Cameron 1460edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1461edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1462edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1463edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1464edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1465edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1466edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1467edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1468edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1469edd16368SStephen M. Cameron 1470edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1471edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1472edd16368SStephen M. Cameron { 1473edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1474edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1475edd16368SStephen M. Cameron */ 1476edd16368SStephen M. Cameron unsigned long flags; 1477edd16368SStephen M. Cameron int i, j; 1478edd16368SStephen M. Cameron 1479edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1480edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1481edd16368SStephen M. Cameron if (h->dev[i] == added) { 1482edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1483edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1484edd16368SStephen M. Cameron h->ndevices--; 1485edd16368SStephen M. Cameron break; 1486edd16368SStephen M. Cameron } 1487edd16368SStephen M. Cameron } 1488edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1489edd16368SStephen M. Cameron kfree(added); 1490edd16368SStephen M. Cameron } 1491edd16368SStephen M. Cameron 1492edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1493edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1494edd16368SStephen M. Cameron { 1495edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1496edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1497edd16368SStephen M. Cameron * to differ first 1498edd16368SStephen M. Cameron */ 1499edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1500edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1501edd16368SStephen M. Cameron return 0; 1502edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1503edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1504edd16368SStephen M. Cameron return 0; 1505edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1506edd16368SStephen M. Cameron return 0; 1507edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1508edd16368SStephen M. Cameron return 0; 1509edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1510edd16368SStephen M. Cameron return 0; 1511edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1512edd16368SStephen M. Cameron return 0; 1513edd16368SStephen M. Cameron return 1; 1514edd16368SStephen M. Cameron } 1515edd16368SStephen M. Cameron 1516bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1517bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1518bd9244f7SScott Teel { 1519bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1520bd9244f7SScott Teel * that the device is a different device, nor that the OS 1521bd9244f7SScott Teel * needs to be told anything about the change. 1522bd9244f7SScott Teel */ 1523bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1524bd9244f7SScott Teel return 1; 1525250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1526250fb125SStephen M. Cameron return 1; 1527b2582a65SDon Brace if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1528250fb125SStephen M. Cameron return 1; 152993849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 153003383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 153103383736SDon Brace return 1; 1532b2582a65SDon Brace /* 1533b2582a65SDon Brace * This can happen for dual domain devices. An active 1534b2582a65SDon Brace * path change causes the ioaccel handle to change 1535b2582a65SDon Brace * 1536b2582a65SDon Brace * for example note the handle differences between p0 and p1 1537b2582a65SDon Brace * Device WWN ,WWN hash,Handle 1538b2582a65SDon Brace * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1539b2582a65SDon Brace * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1540b2582a65SDon Brace */ 1541b2582a65SDon Brace if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1542b2582a65SDon Brace return 1; 1543bd9244f7SScott Teel return 0; 1544bd9244f7SScott Teel } 1545bd9244f7SScott Teel 1546edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1547edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1548edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1549bd9244f7SScott Teel * location in *index. 1550bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1551bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1552bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1553edd16368SStephen M. Cameron */ 1554edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1555edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1556edd16368SStephen M. Cameron int *index) 1557edd16368SStephen M. Cameron { 1558edd16368SStephen M. Cameron int i; 1559edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1560edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1561edd16368SStephen M. Cameron #define DEVICE_SAME 2 1562bd9244f7SScott Teel #define DEVICE_UPDATED 3 15631d33d85dSDon Brace if (needle == NULL) 15641d33d85dSDon Brace return DEVICE_NOT_FOUND; 15651d33d85dSDon Brace 1566edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 156723231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 156823231048SStephen M. Cameron continue; 1569edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1570edd16368SStephen M. Cameron *index = i; 1571bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1572bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1573bd9244f7SScott Teel return DEVICE_UPDATED; 1574edd16368SStephen M. Cameron return DEVICE_SAME; 1575bd9244f7SScott Teel } else { 15769846590eSStephen M. Cameron /* Keep offline devices offline */ 15779846590eSStephen M. Cameron if (needle->volume_offline) 15789846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1579edd16368SStephen M. Cameron return DEVICE_CHANGED; 1580edd16368SStephen M. Cameron } 1581edd16368SStephen M. Cameron } 1582bd9244f7SScott Teel } 1583edd16368SStephen M. Cameron *index = -1; 1584edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1585edd16368SStephen M. Cameron } 1586edd16368SStephen M. Cameron 15879846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15889846590eSStephen M. Cameron unsigned char scsi3addr[]) 15899846590eSStephen M. Cameron { 15909846590eSStephen M. Cameron struct offline_device_entry *device; 15919846590eSStephen M. Cameron unsigned long flags; 15929846590eSStephen M. Cameron 15939846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15949846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15959846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15969846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15979846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15989846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15999846590eSStephen M. Cameron return; 16009846590eSStephen M. Cameron } 16019846590eSStephen M. Cameron } 16029846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 16039846590eSStephen M. Cameron 16049846590eSStephen M. Cameron /* Device is not on the list, add it. */ 16059846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 16067e8a9486SAmit Kushwaha if (!device) 16079846590eSStephen M. Cameron return; 16087e8a9486SAmit Kushwaha 16099846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 16109846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 16119846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 16129846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 16139846590eSStephen M. Cameron } 16149846590eSStephen M. Cameron 16159846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 16169846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 16179846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 16189846590eSStephen M. Cameron { 16199846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 16209846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16219846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 16229846590eSStephen M. Cameron h->scsi_host->host_no, 16239846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16249846590eSStephen M. Cameron switch (sd->volume_offline) { 16259846590eSStephen M. Cameron case HPSA_LV_OK: 16269846590eSStephen M. Cameron break; 16279846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 16289846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16299846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 16309846590eSStephen M. Cameron h->scsi_host->host_no, 16319846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16329846590eSStephen M. Cameron break; 16335ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 16345ca01204SScott Benesh dev_info(&h->pdev->dev, 16355ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 16365ca01204SScott Benesh h->scsi_host->host_no, 16375ca01204SScott Benesh sd->bus, sd->target, sd->lun); 16385ca01204SScott Benesh break; 16399846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 16409846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16415ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 16429846590eSStephen M. Cameron h->scsi_host->host_no, 16439846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16449846590eSStephen M. Cameron break; 16459846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16469846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16479846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16489846590eSStephen M. Cameron h->scsi_host->host_no, 16499846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16509846590eSStephen M. Cameron break; 16519846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16529846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16539846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16549846590eSStephen M. Cameron h->scsi_host->host_no, 16559846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16569846590eSStephen M. Cameron break; 16579846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16589846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16599846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16609846590eSStephen M. Cameron h->scsi_host->host_no, 16619846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16629846590eSStephen M. Cameron break; 16639846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16649846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16659846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16669846590eSStephen M. Cameron h->scsi_host->host_no, 16679846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16689846590eSStephen M. Cameron break; 16699846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16709846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16719846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16729846590eSStephen M. Cameron h->scsi_host->host_no, 16739846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16749846590eSStephen M. Cameron break; 16759846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16769846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16779846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16789846590eSStephen M. Cameron h->scsi_host->host_no, 16799846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16809846590eSStephen M. Cameron break; 16819846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16829846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16839846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16849846590eSStephen M. Cameron h->scsi_host->host_no, 16859846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16869846590eSStephen M. Cameron break; 16879846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16889846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16899846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16909846590eSStephen M. Cameron h->scsi_host->host_no, 16919846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16929846590eSStephen M. Cameron break; 16939846590eSStephen M. Cameron } 16949846590eSStephen M. Cameron } 16959846590eSStephen M. Cameron 169603383736SDon Brace /* 169703383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 169803383736SDon Brace * raid offload configured. 169903383736SDon Brace */ 170003383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 170103383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 170203383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 170303383736SDon Brace { 170403383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 170503383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 170603383736SDon Brace int i, j; 170703383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 170803383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 170903383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 171003383736SDon Brace le16_to_cpu(map->layout_map_count) * 171103383736SDon Brace total_disks_per_row; 171203383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 171303383736SDon Brace total_disks_per_row; 171403383736SDon Brace int qdepth; 171503383736SDon Brace 171603383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 171703383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 171803383736SDon Brace 1719d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1720d604f533SWebb Scales 172103383736SDon Brace qdepth = 0; 172203383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 172303383736SDon Brace logical_drive->phys_disk[i] = NULL; 172403383736SDon Brace if (!logical_drive->offload_config) 172503383736SDon Brace continue; 172603383736SDon Brace for (j = 0; j < ndevices; j++) { 17271d33d85dSDon Brace if (dev[j] == NULL) 17281d33d85dSDon Brace continue; 1729ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1730ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1731af15ed36SDon Brace continue; 1732f3f01730SKevin Barnett if (is_logical_device(dev[j])) 173303383736SDon Brace continue; 173403383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 173503383736SDon Brace continue; 173603383736SDon Brace 173703383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 173803383736SDon Brace if (i < nphys_disk) 173903383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 174003383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 174103383736SDon Brace break; 174203383736SDon Brace } 174303383736SDon Brace 174403383736SDon Brace /* 174503383736SDon Brace * This can happen if a physical drive is removed and 174603383736SDon Brace * the logical drive is degraded. In that case, the RAID 174703383736SDon Brace * map data will refer to a physical disk which isn't actually 174803383736SDon Brace * present. And in that case offload_enabled should already 174903383736SDon Brace * be 0, but we'll turn it off here just in case 175003383736SDon Brace */ 175103383736SDon Brace if (!logical_drive->phys_disk[i]) { 1752b2582a65SDon Brace dev_warn(&h->pdev->dev, 1753b2582a65SDon Brace "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1754b2582a65SDon Brace __func__, 1755b2582a65SDon Brace h->scsi_host->host_no, logical_drive->bus, 1756b2582a65SDon Brace logical_drive->target, logical_drive->lun); 175703383736SDon Brace logical_drive->offload_enabled = 0; 175841ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 175941ce4c35SStephen Cameron logical_drive->queue_depth = 8; 176003383736SDon Brace } 176103383736SDon Brace } 176203383736SDon Brace if (nraid_map_entries) 176303383736SDon Brace /* 176403383736SDon Brace * This is correct for reads, too high for full stripe writes, 176503383736SDon Brace * way too high for partial stripe writes 176603383736SDon Brace */ 176703383736SDon Brace logical_drive->queue_depth = qdepth; 17682c5fc363SDon Brace else { 17692c5fc363SDon Brace if (logical_drive->external) 17702c5fc363SDon Brace logical_drive->queue_depth = EXTERNAL_QD; 177103383736SDon Brace else 177203383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 177303383736SDon Brace } 17742c5fc363SDon Brace } 177503383736SDon Brace 177603383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 177703383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 177803383736SDon Brace { 177903383736SDon Brace int i; 178003383736SDon Brace 178103383736SDon Brace for (i = 0; i < ndevices; i++) { 17821d33d85dSDon Brace if (dev[i] == NULL) 17831d33d85dSDon Brace continue; 1784ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1785ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1786af15ed36SDon Brace continue; 1787f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 178803383736SDon Brace continue; 178941ce4c35SStephen Cameron 179041ce4c35SStephen Cameron /* 179141ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 179241ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 1793b2582a65SDon Brace * because we would be changing ioaccel phsy_disk[] pointers 1794b2582a65SDon Brace * on a ioaccel volume processing I/O requests. 1795b2582a65SDon Brace * 1796b2582a65SDon Brace * If an ioaccel volume status changed, initially because it was 1797b2582a65SDon Brace * re-configured and thus underwent a transformation, or 1798b2582a65SDon Brace * a drive failed, we would have received a state change 1799b2582a65SDon Brace * request and ioaccel should have been turned off. When the 1800b2582a65SDon Brace * transformation completes, we get another state change 1801b2582a65SDon Brace * request to turn ioaccel back on. In this case, we need 1802b2582a65SDon Brace * to update the ioaccel information. 1803b2582a65SDon Brace * 1804b2582a65SDon Brace * Thus: If it is not currently enabled, but will be after 1805b2582a65SDon Brace * the scan completes, make sure the ioaccel pointers 1806b2582a65SDon Brace * are up to date. 180741ce4c35SStephen Cameron */ 180841ce4c35SStephen Cameron 1809b2582a65SDon Brace if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 181003383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 181103383736SDon Brace } 181203383736SDon Brace } 181303383736SDon Brace 1814096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1815096ccff4SKevin Barnett { 1816096ccff4SKevin Barnett int rc = 0; 1817096ccff4SKevin Barnett 1818096ccff4SKevin Barnett if (!h->scsi_host) 1819096ccff4SKevin Barnett return 1; 1820096ccff4SKevin Barnett 1821d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1822096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1823096ccff4SKevin Barnett device->target, device->lun); 1824d04e62b9SKevin Barnett else /* HBA */ 1825d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1826d04e62b9SKevin Barnett 1827096ccff4SKevin Barnett return rc; 1828096ccff4SKevin Barnett } 1829096ccff4SKevin Barnett 1830ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1831ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1832ba74fdc4SDon Brace { 1833ba74fdc4SDon Brace int i; 1834ba74fdc4SDon Brace int count = 0; 1835ba74fdc4SDon Brace 1836ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1837ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1838ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1839ba74fdc4SDon Brace 1840ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1841ba74fdc4SDon Brace dev->scsi3addr)) { 1842ba74fdc4SDon Brace unsigned long flags; 1843ba74fdc4SDon Brace 1844ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1845ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1846ba74fdc4SDon Brace ++count; 1847ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1848ba74fdc4SDon Brace } 1849ba74fdc4SDon Brace 1850ba74fdc4SDon Brace cmd_free(h, c); 1851ba74fdc4SDon Brace } 1852ba74fdc4SDon Brace 1853ba74fdc4SDon Brace return count; 1854ba74fdc4SDon Brace } 1855ba74fdc4SDon Brace 1856ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1857ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1858ba74fdc4SDon Brace { 1859ba74fdc4SDon Brace int cmds = 0; 1860ba74fdc4SDon Brace int waits = 0; 1861ba74fdc4SDon Brace 1862ba74fdc4SDon Brace while (1) { 1863ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1864ba74fdc4SDon Brace if (cmds == 0) 1865ba74fdc4SDon Brace break; 1866ba74fdc4SDon Brace if (++waits > 20) 1867ba74fdc4SDon Brace break; 18689211a07fSDon Brace msleep(1000); 18699211a07fSDon Brace } 18709211a07fSDon Brace 18719211a07fSDon Brace if (waits > 20) 1872ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1873ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1874ba74fdc4SDon Brace __func__, cmds); 1875ba74fdc4SDon Brace } 1876ba74fdc4SDon Brace 1877096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1878096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1879096ccff4SKevin Barnett { 1880096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1881096ccff4SKevin Barnett 1882096ccff4SKevin Barnett if (!h->scsi_host) 1883096ccff4SKevin Barnett return; 1884096ccff4SKevin Barnett 18850ff365f5SDon Brace /* 18860ff365f5SDon Brace * Allow for commands to drain 18870ff365f5SDon Brace */ 18880ff365f5SDon Brace device->removed = 1; 18890ff365f5SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 18900ff365f5SDon Brace 1891d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1892096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1893096ccff4SKevin Barnett device->target, device->lun); 1894096ccff4SKevin Barnett if (sdev) { 1895096ccff4SKevin Barnett scsi_remove_device(sdev); 1896096ccff4SKevin Barnett scsi_device_put(sdev); 1897096ccff4SKevin Barnett } else { 1898096ccff4SKevin Barnett /* 1899096ccff4SKevin Barnett * We don't expect to get here. Future commands 1900096ccff4SKevin Barnett * to this device will get a selection timeout as 1901096ccff4SKevin Barnett * if the device were gone. 1902096ccff4SKevin Barnett */ 1903096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1904096ccff4SKevin Barnett "didn't find device for removal."); 1905096ccff4SKevin Barnett } 1906ba74fdc4SDon Brace } else { /* HBA */ 1907ba74fdc4SDon Brace 1908d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1909096ccff4SKevin Barnett } 1910ba74fdc4SDon Brace } 1911096ccff4SKevin Barnett 19128aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1913edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1914edd16368SStephen M. Cameron { 1915edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1916edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1917edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1918edd16368SStephen M. Cameron */ 1919edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1920edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1921edd16368SStephen M. Cameron unsigned long flags; 1922edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1923edd16368SStephen M. Cameron int nadded, nremoved; 1924edd16368SStephen M. Cameron 1925da03ded0SDon Brace /* 1926da03ded0SDon Brace * A reset can cause a device status to change 1927da03ded0SDon Brace * re-schedule the scan to see what happened. 1928da03ded0SDon Brace */ 1929c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 1930da03ded0SDon Brace if (h->reset_in_progress) { 1931da03ded0SDon Brace h->drv_req_rescan = 1; 1932c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1933da03ded0SDon Brace return; 1934da03ded0SDon Brace } 1935c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1936edd16368SStephen M. Cameron 1937cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1938cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1939edd16368SStephen M. Cameron 1940edd16368SStephen M. Cameron if (!added || !removed) { 1941edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1942edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1943edd16368SStephen M. Cameron goto free_and_out; 1944edd16368SStephen M. Cameron } 1945edd16368SStephen M. Cameron 1946edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1947edd16368SStephen M. Cameron 1948edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1949edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1950edd16368SStephen M. Cameron * devices which have changed, remove the old device 1951edd16368SStephen M. Cameron * info and add the new device info. 1952bd9244f7SScott Teel * If minor device attributes change, just update 1953bd9244f7SScott Teel * the existing device structure. 1954edd16368SStephen M. Cameron */ 1955edd16368SStephen M. Cameron i = 0; 1956edd16368SStephen M. Cameron nremoved = 0; 1957edd16368SStephen M. Cameron nadded = 0; 1958edd16368SStephen M. Cameron while (i < h->ndevices) { 1959edd16368SStephen M. Cameron csd = h->dev[i]; 1960edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1961edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1962edd16368SStephen M. Cameron changes++; 19638aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1964edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1965edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1966edd16368SStephen M. Cameron changes++; 19678aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 19682a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1969c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1970c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1971c7f172dcSStephen M. Cameron */ 1972c7f172dcSStephen M. Cameron sd[entry] = NULL; 1973bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19748aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1975edd16368SStephen M. Cameron } 1976edd16368SStephen M. Cameron i++; 1977edd16368SStephen M. Cameron } 1978edd16368SStephen M. Cameron 1979edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1980edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1981edd16368SStephen M. Cameron */ 1982edd16368SStephen M. Cameron 1983edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1984edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1985edd16368SStephen M. Cameron continue; 19869846590eSStephen M. Cameron 19879846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19889846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19899846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19909846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19919846590eSStephen M. Cameron */ 19929846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19939846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19940d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19959846590eSStephen M. Cameron continue; 19969846590eSStephen M. Cameron } 19979846590eSStephen M. Cameron 1998edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1999edd16368SStephen M. Cameron h->ndevices, &entry); 2000edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 2001edd16368SStephen M. Cameron changes++; 20028aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 2003edd16368SStephen M. Cameron break; 2004edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 2005edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 2006edd16368SStephen M. Cameron /* should never happen... */ 2007edd16368SStephen M. Cameron changes++; 2008edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 2009edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 2010edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 2011edd16368SStephen M. Cameron } 2012edd16368SStephen M. Cameron } 201341ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 201441ce4c35SStephen Cameron 2015b2582a65SDon Brace /* 2016b2582a65SDon Brace * Now that h->dev[]->phys_disk[] is coherent, we can enable 201741ce4c35SStephen Cameron * any logical drives that need it enabled. 2018b2582a65SDon Brace * 2019b2582a65SDon Brace * The raid map should be current by now. 2020b2582a65SDon Brace * 2021b2582a65SDon Brace * We are updating the device list used for I/O requests. 202241ce4c35SStephen Cameron */ 20231d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 20241d33d85dSDon Brace if (h->dev[i] == NULL) 20251d33d85dSDon Brace continue; 202641ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 20271d33d85dSDon Brace } 202841ce4c35SStephen Cameron 2029edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2030edd16368SStephen M. Cameron 20319846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 20329846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 20339846590eSStephen M. Cameron * so don't touch h->dev[] 20349846590eSStephen M. Cameron */ 20359846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 20369846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 20379846590eSStephen M. Cameron continue; 20389846590eSStephen M. Cameron if (sd[i]->volume_offline) 20399846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 20409846590eSStephen M. Cameron } 20419846590eSStephen M. Cameron 2042edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 2043edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 2044edd16368SStephen M. Cameron * first time through. 2045edd16368SStephen M. Cameron */ 20468aa60681SDon Brace if (!changes) 2047edd16368SStephen M. Cameron goto free_and_out; 2048edd16368SStephen M. Cameron 2049edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 2050edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 20511d33d85dSDon Brace if (removed[i] == NULL) 20521d33d85dSDon Brace continue; 2053096ccff4SKevin Barnett if (removed[i]->expose_device) 2054096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 2055edd16368SStephen M. Cameron kfree(removed[i]); 2056edd16368SStephen M. Cameron removed[i] = NULL; 2057edd16368SStephen M. Cameron } 2058edd16368SStephen M. Cameron 2059edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 2060edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 2061096ccff4SKevin Barnett int rc = 0; 2062096ccff4SKevin Barnett 20631d33d85dSDon Brace if (added[i] == NULL) 206441ce4c35SStephen Cameron continue; 20652a168208SKevin Barnett if (!(added[i]->expose_device)) 2066edd16368SStephen M. Cameron continue; 2067096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 2068096ccff4SKevin Barnett if (!rc) 2069edd16368SStephen M. Cameron continue; 2070096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 2071096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 2072edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 2073edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 2074edd16368SStephen M. Cameron */ 2075edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 2076853633e8SDon Brace h->drv_req_rescan = 1; 2077edd16368SStephen M. Cameron } 2078edd16368SStephen M. Cameron 2079edd16368SStephen M. Cameron free_and_out: 2080edd16368SStephen M. Cameron kfree(added); 2081edd16368SStephen M. Cameron kfree(removed); 2082edd16368SStephen M. Cameron } 2083edd16368SStephen M. Cameron 2084edd16368SStephen M. Cameron /* 20859e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2086edd16368SStephen M. Cameron * Assume's h->devlock is held. 2087edd16368SStephen M. Cameron */ 2088edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2089edd16368SStephen M. Cameron int bus, int target, int lun) 2090edd16368SStephen M. Cameron { 2091edd16368SStephen M. Cameron int i; 2092edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2093edd16368SStephen M. Cameron 2094edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2095edd16368SStephen M. Cameron sd = h->dev[i]; 2096edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2097edd16368SStephen M. Cameron return sd; 2098edd16368SStephen M. Cameron } 2099edd16368SStephen M. Cameron return NULL; 2100edd16368SStephen M. Cameron } 2101edd16368SStephen M. Cameron 2102edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2103edd16368SStephen M. Cameron { 21047630b3a5SHannes Reinecke struct hpsa_scsi_dev_t *sd = NULL; 2105edd16368SStephen M. Cameron unsigned long flags; 2106edd16368SStephen M. Cameron struct ctlr_info *h; 2107edd16368SStephen M. Cameron 2108edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2109edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2110d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2111d04e62b9SKevin Barnett struct scsi_target *starget; 2112d04e62b9SKevin Barnett struct sas_rphy *rphy; 2113d04e62b9SKevin Barnett 2114d04e62b9SKevin Barnett starget = scsi_target(sdev); 2115d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2116d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2117d04e62b9SKevin Barnett if (sd) { 2118d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2119d04e62b9SKevin Barnett sd->lun = sdev->lun; 2120d04e62b9SKevin Barnett } 21217630b3a5SHannes Reinecke } 21227630b3a5SHannes Reinecke if (!sd) 2123edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2124edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2125d04e62b9SKevin Barnett 2126d04e62b9SKevin Barnett if (sd && sd->expose_device) { 212703383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2128d04e62b9SKevin Barnett sdev->hostdata = sd; 212941ce4c35SStephen Cameron } else 213041ce4c35SStephen Cameron sdev->hostdata = NULL; 2131edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2132edd16368SStephen M. Cameron return 0; 2133edd16368SStephen M. Cameron } 2134edd16368SStephen M. Cameron 213541ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 213641ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 213741ce4c35SStephen Cameron { 213841ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 213941ce4c35SStephen Cameron int queue_depth; 214041ce4c35SStephen Cameron 214141ce4c35SStephen Cameron sd = sdev->hostdata; 21422a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 214341ce4c35SStephen Cameron 21445086435eSDon Brace if (sd) { 21455086435eSDon Brace if (sd->external) 21465086435eSDon Brace queue_depth = EXTERNAL_QD; 21475086435eSDon Brace else 214841ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 214941ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 21505086435eSDon Brace } else 215141ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 215241ce4c35SStephen Cameron 215341ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 215441ce4c35SStephen Cameron 215541ce4c35SStephen Cameron return 0; 215641ce4c35SStephen Cameron } 215741ce4c35SStephen Cameron 2158edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2159edd16368SStephen M. Cameron { 2160bcc44255SStephen M. Cameron /* nothing to do. */ 2161edd16368SStephen M. Cameron } 2162edd16368SStephen M. Cameron 2163d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2164d9a729f3SWebb Scales { 2165d9a729f3SWebb Scales int i; 2166d9a729f3SWebb Scales 2167d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2168d9a729f3SWebb Scales return; 2169d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2170d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2171d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2172d9a729f3SWebb Scales } 2173d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2174d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2175d9a729f3SWebb Scales } 2176d9a729f3SWebb Scales 2177d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2178d9a729f3SWebb Scales { 2179d9a729f3SWebb Scales int i; 2180d9a729f3SWebb Scales 2181d9a729f3SWebb Scales if (h->chainsize <= 0) 2182d9a729f3SWebb Scales return 0; 2183d9a729f3SWebb Scales 2184d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2185d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2186d9a729f3SWebb Scales GFP_KERNEL); 2187d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2188d9a729f3SWebb Scales return -ENOMEM; 2189d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2190d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2191d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2192d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2193d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2194d9a729f3SWebb Scales goto clean; 2195d9a729f3SWebb Scales } 2196d9a729f3SWebb Scales return 0; 2197d9a729f3SWebb Scales 2198d9a729f3SWebb Scales clean: 2199d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2200d9a729f3SWebb Scales return -ENOMEM; 2201d9a729f3SWebb Scales } 2202d9a729f3SWebb Scales 220333a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 220433a2ffceSStephen M. Cameron { 220533a2ffceSStephen M. Cameron int i; 220633a2ffceSStephen M. Cameron 220733a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 220833a2ffceSStephen M. Cameron return; 220933a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 221033a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 221133a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 221233a2ffceSStephen M. Cameron } 221333a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 221433a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 221533a2ffceSStephen M. Cameron } 221633a2ffceSStephen M. Cameron 2217105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 221833a2ffceSStephen M. Cameron { 221933a2ffceSStephen M. Cameron int i; 222033a2ffceSStephen M. Cameron 222133a2ffceSStephen M. Cameron if (h->chainsize <= 0) 222233a2ffceSStephen M. Cameron return 0; 222333a2ffceSStephen M. Cameron 222433a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 222533a2ffceSStephen M. Cameron GFP_KERNEL); 22267e8a9486SAmit Kushwaha if (!h->cmd_sg_list) 222733a2ffceSStephen M. Cameron return -ENOMEM; 22287e8a9486SAmit Kushwaha 222933a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 223033a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 223133a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 22327e8a9486SAmit Kushwaha if (!h->cmd_sg_list[i]) 223333a2ffceSStephen M. Cameron goto clean; 22347e8a9486SAmit Kushwaha 22353d4e6af8SRobert Elliott } 223633a2ffceSStephen M. Cameron return 0; 223733a2ffceSStephen M. Cameron 223833a2ffceSStephen M. Cameron clean: 223933a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 224033a2ffceSStephen M. Cameron return -ENOMEM; 224133a2ffceSStephen M. Cameron } 224233a2ffceSStephen M. Cameron 2243d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2244d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2245d9a729f3SWebb Scales { 2246d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2247d9a729f3SWebb Scales u64 temp64; 2248d9a729f3SWebb Scales u32 chain_size; 2249d9a729f3SWebb Scales 2250d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2251a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2252d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2253d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2254d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2255d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2256d9a729f3SWebb Scales cp->sg->address = 0; 2257d9a729f3SWebb Scales return -1; 2258d9a729f3SWebb Scales } 2259d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2260d9a729f3SWebb Scales return 0; 2261d9a729f3SWebb Scales } 2262d9a729f3SWebb Scales 2263d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2264d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2265d9a729f3SWebb Scales { 2266d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2267d9a729f3SWebb Scales u64 temp64; 2268d9a729f3SWebb Scales u32 chain_size; 2269d9a729f3SWebb Scales 2270d9a729f3SWebb Scales chain_sg = cp->sg; 2271d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2272a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2273d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2274d9a729f3SWebb Scales } 2275d9a729f3SWebb Scales 2276e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 227733a2ffceSStephen M. Cameron struct CommandList *c) 227833a2ffceSStephen M. Cameron { 227933a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 228033a2ffceSStephen M. Cameron u64 temp64; 228150a0decfSStephen M. Cameron u32 chain_len; 228233a2ffceSStephen M. Cameron 228333a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 228433a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 228550a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 228650a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22872b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 228850a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 228950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 229033a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2291e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2292e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 229350a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2294e2bea6dfSStephen M. Cameron return -1; 2295e2bea6dfSStephen M. Cameron } 229650a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2297e2bea6dfSStephen M. Cameron return 0; 229833a2ffceSStephen M. Cameron } 229933a2ffceSStephen M. Cameron 230033a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 230133a2ffceSStephen M. Cameron struct CommandList *c) 230233a2ffceSStephen M. Cameron { 230333a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 230433a2ffceSStephen M. Cameron 230550a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 230633a2ffceSStephen M. Cameron return; 230733a2ffceSStephen M. Cameron 230833a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 230950a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 231050a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 231133a2ffceSStephen M. Cameron } 231233a2ffceSStephen M. Cameron 2313a09c1441SScott Teel 2314a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2315a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2316a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2317a09c1441SScott Teel */ 2318a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2319c349775eSScott Teel struct CommandList *c, 2320c349775eSScott Teel struct scsi_cmnd *cmd, 2321ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2322ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2323c349775eSScott Teel { 2324c349775eSScott Teel int data_len; 2325a09c1441SScott Teel int retry = 0; 2326c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2327c349775eSScott Teel 2328c349775eSScott Teel switch (c2->error_data.serv_response) { 2329c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2330c349775eSScott Teel switch (c2->error_data.status) { 2331c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2332c349775eSScott Teel break; 2333c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2334ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2335c349775eSScott Teel if (c2->error_data.data_present != 2336ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2337ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2338ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2339c349775eSScott Teel break; 2340ee6b1889SStephen M. Cameron } 2341c349775eSScott Teel /* copy the sense data */ 2342c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2343c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2344c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2345c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2346c349775eSScott Teel data_len = 2347c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2348c349775eSScott Teel memcpy(cmd->sense_buffer, 2349c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2350a09c1441SScott Teel retry = 1; 2351c349775eSScott Teel break; 2352c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2353a09c1441SScott Teel retry = 1; 2354c349775eSScott Teel break; 2355c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2356a09c1441SScott Teel retry = 1; 2357c349775eSScott Teel break; 2358c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 23594a8da22bSStephen Cameron retry = 1; 2360c349775eSScott Teel break; 2361c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2362a09c1441SScott Teel retry = 1; 2363c349775eSScott Teel break; 2364c349775eSScott Teel default: 2365a09c1441SScott Teel retry = 1; 2366c349775eSScott Teel break; 2367c349775eSScott Teel } 2368c349775eSScott Teel break; 2369c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2370c40820d5SJoe Handzik switch (c2->error_data.status) { 2371c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2372c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2373c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2374c40820d5SJoe Handzik retry = 1; 2375c40820d5SJoe Handzik break; 2376c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2377c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2378c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2379c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2380c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2381c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2382c40820d5SJoe Handzik break; 2383c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2384c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2385c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2386ba74fdc4SDon Brace /* 2387ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2388ba74fdc4SDon Brace * get a state change event from the controller but 2389ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2390ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2391ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2392ba74fdc4SDon Brace * of the disk to get the same device node. 2393ba74fdc4SDon Brace */ 2394ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2395ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2396ba74fdc4SDon Brace dev->removed = 1; 2397ba74fdc4SDon Brace h->drv_req_rescan = 1; 2398ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2399ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2400ba74fdc4SDon Brace } else 2401ba74fdc4SDon Brace /* 2402ba74fdc4SDon Brace * Retry by sending down the RAID path. 2403ba74fdc4SDon Brace * We will get an event from ctlr to 2404ba74fdc4SDon Brace * trigger rescan regardless. 2405ba74fdc4SDon Brace */ 2406c40820d5SJoe Handzik retry = 1; 2407c40820d5SJoe Handzik break; 2408c40820d5SJoe Handzik default: 2409c40820d5SJoe Handzik retry = 1; 2410c40820d5SJoe Handzik } 2411c349775eSScott Teel break; 2412c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2413c349775eSScott Teel break; 2414c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2415c349775eSScott Teel break; 2416c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2417a09c1441SScott Teel retry = 1; 2418c349775eSScott Teel break; 2419c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2420c349775eSScott Teel break; 2421c349775eSScott Teel default: 2422a09c1441SScott Teel retry = 1; 2423c349775eSScott Teel break; 2424c349775eSScott Teel } 2425a09c1441SScott Teel 2426a09c1441SScott Teel return retry; /* retry on raid path? */ 2427c349775eSScott Teel } 2428c349775eSScott Teel 2429a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2430a58e7e53SWebb Scales struct CommandList *c) 2431a58e7e53SWebb Scales { 2432d604f533SWebb Scales bool do_wake = false; 2433d604f533SWebb Scales 2434a58e7e53SWebb Scales /* 243508ec46f6SDon Brace * Reset c->scsi_cmd here so that the reset handler will know 2436d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2437a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2438a58e7e53SWebb Scales */ 2439a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2440d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2441d604f533SWebb Scales if (c->reset_pending) { 2442d604f533SWebb Scales unsigned long flags; 2443d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2444d604f533SWebb Scales 2445d604f533SWebb Scales /* 2446d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2447d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2448d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2449d604f533SWebb Scales */ 2450d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2451d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2452d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2453d604f533SWebb Scales do_wake = true; 2454d604f533SWebb Scales c->reset_pending = NULL; 2455d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2456d604f533SWebb Scales } 2457d604f533SWebb Scales 2458d604f533SWebb Scales if (do_wake) 2459d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2460a58e7e53SWebb Scales } 2461a58e7e53SWebb Scales 246273153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 246373153fe5SWebb Scales struct CommandList *c) 246473153fe5SWebb Scales { 246573153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 246673153fe5SWebb Scales cmd_tagged_free(h, c); 246773153fe5SWebb Scales } 246873153fe5SWebb Scales 24698a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24708a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24718a0ff92cSWebb Scales { 247273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2473d49c2077SDon Brace if (cmd && cmd->scsi_done) 24748a0ff92cSWebb Scales cmd->scsi_done(cmd); 24758a0ff92cSWebb Scales } 24768a0ff92cSWebb Scales 24778a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24788a0ff92cSWebb Scales { 24798a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24808a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24818a0ff92cSWebb Scales } 24828a0ff92cSWebb Scales 2483c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2484c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2485c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2486c349775eSScott Teel { 2487c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2488c349775eSScott Teel 2489c349775eSScott Teel /* check for good status */ 2490c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24918a0ff92cSWebb Scales c2->error_data.status == 0)) 24928a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2493c349775eSScott Teel 24948a0ff92cSWebb Scales /* 24958a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2496b2582a65SDon Brace * the normal I/O path so the controller can handle whatever is 2497c349775eSScott Teel * wrong. 2498c349775eSScott Teel */ 2499f3f01730SKevin Barnett if (is_logical_device(dev) && 2500c349775eSScott Teel c2->error_data.serv_response == 2501c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2502080ef1ccSDon Brace if (c2->error_data.status == 2503064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2504c349775eSScott Teel dev->offload_enabled = 0; 2505064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2506064d1b1dSDon Brace } 25078a0ff92cSWebb Scales 25088a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2509080ef1ccSDon Brace } 2510080ef1ccSDon Brace 2511ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 25128a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2513080ef1ccSDon Brace 25148a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2515c349775eSScott Teel } 2516c349775eSScott Teel 25179437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 25189437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 25199437ac43SStephen Cameron struct CommandList *cp) 25209437ac43SStephen Cameron { 25219437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 25229437ac43SStephen Cameron 25239437ac43SStephen Cameron switch (tmf_status) { 25249437ac43SStephen Cameron case CISS_TMF_COMPLETE: 25259437ac43SStephen Cameron /* 25269437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 25279437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 25289437ac43SStephen Cameron */ 25299437ac43SStephen Cameron case CISS_TMF_SUCCESS: 25309437ac43SStephen Cameron return 0; 25319437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 25329437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 25339437ac43SStephen Cameron case CISS_TMF_FAILED: 25349437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 25359437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 25369437ac43SStephen Cameron break; 25379437ac43SStephen Cameron default: 25389437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 25399437ac43SStephen Cameron tmf_status); 25409437ac43SStephen Cameron break; 25419437ac43SStephen Cameron } 25429437ac43SStephen Cameron return -tmf_status; 25439437ac43SStephen Cameron } 25449437ac43SStephen Cameron 25451fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2546edd16368SStephen M. Cameron { 2547edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2548edd16368SStephen M. Cameron struct ctlr_info *h; 2549edd16368SStephen M. Cameron struct ErrorInfo *ei; 2550283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2551d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2552edd16368SStephen M. Cameron 25539437ac43SStephen Cameron u8 sense_key; 25549437ac43SStephen Cameron u8 asc; /* additional sense code */ 25559437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2556db111e18SStephen M. Cameron unsigned long sense_data_size; 2557edd16368SStephen M. Cameron 2558edd16368SStephen M. Cameron ei = cp->err_info; 25597fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2560edd16368SStephen M. Cameron h = cp->h; 2561d49c2077SDon Brace 2562d49c2077SDon Brace if (!cmd->device) { 2563d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2564d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2565d49c2077SDon Brace } 2566d49c2077SDon Brace 2567283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 256845e596cdSDon Brace if (!dev) { 256945e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 257045e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 257145e596cdSDon Brace } 2572d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2573edd16368SStephen M. Cameron 2574edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2575e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25762b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 257733a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2578edd16368SStephen M. Cameron 2579d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2580d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2581d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2582d9a729f3SWebb Scales 2583edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2584edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2585c349775eSScott Teel 2586d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2587d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2588d49c2077SDon Brace dev->removed) { 2589d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2590d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2591d49c2077SDon Brace } 2592d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 259303383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2594d49c2077SDon Brace } 259503383736SDon Brace 259625163bd5SWebb Scales /* 259725163bd5SWebb Scales * We check for lockup status here as it may be set for 259825163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 259925163bd5SWebb Scales * fail_all_oustanding_cmds() 260025163bd5SWebb Scales */ 260125163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 260225163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 260325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 26048a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 260525163bd5SWebb Scales } 260625163bd5SWebb Scales 260708ec46f6SDon Brace if ((unlikely(hpsa_is_pending_event(cp)))) 2608d604f533SWebb Scales if (cp->reset_pending) 2609bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2610d604f533SWebb Scales 2611c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2612c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2613c349775eSScott Teel 26146aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 26158a0ff92cSWebb Scales if (ei->CommandStatus == 0) 26168a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 26176aa4c361SRobert Elliott 2618e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2619e1f7de0cSMatt Gates * CISS header used below for error handling. 2620e1f7de0cSMatt Gates */ 2621e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2622e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 26232b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 26242b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 26252b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 26262b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 262750a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2628e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2629e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2630283b4a9bSStephen M. Cameron 2631283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2632283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2633283b4a9bSStephen M. Cameron * wrong. 2634283b4a9bSStephen M. Cameron */ 2635f3f01730SKevin Barnett if (is_logical_device(dev)) { 2636283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2637283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 26388a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2639283b4a9bSStephen M. Cameron } 2640e1f7de0cSMatt Gates } 2641e1f7de0cSMatt Gates 2642edd16368SStephen M. Cameron /* an error has occurred */ 2643edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2644edd16368SStephen M. Cameron 2645edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 26469437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 26479437ac43SStephen Cameron /* copy the sense data */ 26489437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 26499437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 26509437ac43SStephen Cameron else 26519437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26529437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26539437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26549437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26559437ac43SStephen Cameron if (ei->ScsiStatus) 26569437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26579437ac43SStephen Cameron &sense_key, &asc, &ascq); 2658edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 26591d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 26602e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26611d3b3609SMatt Gates break; 26621d3b3609SMatt Gates } 2663edd16368SStephen M. Cameron break; 2664edd16368SStephen M. Cameron } 2665edd16368SStephen M. Cameron /* Problem was not a check condition 2666edd16368SStephen M. Cameron * Pass it up to the upper layers... 2667edd16368SStephen M. Cameron */ 2668edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2669edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2670edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2671edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2672edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2673edd16368SStephen M. Cameron sense_key, asc, ascq, 2674edd16368SStephen M. Cameron cmd->result); 2675edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2676edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2677edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2678edd16368SStephen M. Cameron 2679edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2680edd16368SStephen M. Cameron * but there is a bug in some released firmware 2681edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2682edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2683edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2684edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2685edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2686edd16368SStephen M. Cameron * look like selection timeout since that is 2687edd16368SStephen M. Cameron * the most common reason for this to occur, 2688edd16368SStephen M. Cameron * and it's severe enough. 2689edd16368SStephen M. Cameron */ 2690edd16368SStephen M. Cameron 2691edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2692edd16368SStephen M. Cameron } 2693edd16368SStephen M. Cameron break; 2694edd16368SStephen M. Cameron 2695edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2696edd16368SStephen M. Cameron break; 2697edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2698f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2699f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2700edd16368SStephen M. Cameron break; 2701edd16368SStephen M. Cameron case CMD_INVALID: { 2702edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2703edd16368SStephen M. Cameron print_cmd(cp); */ 2704edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2705edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2706edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2707edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2708edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2709edd16368SStephen M. Cameron * missing target. */ 2710edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2711edd16368SStephen M. Cameron } 2712edd16368SStephen M. Cameron break; 2713edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2714256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2715f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2716f42e81e1SStephen Cameron cp->Request.CDB); 2717edd16368SStephen M. Cameron break; 2718edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2719edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2720f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2721f42e81e1SStephen Cameron cp->Request.CDB); 2722edd16368SStephen M. Cameron break; 2723edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2724edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2725f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2726f42e81e1SStephen Cameron cp->Request.CDB); 2727edd16368SStephen M. Cameron break; 2728edd16368SStephen M. Cameron case CMD_ABORTED: 272908ec46f6SDon Brace cmd->result = DID_ABORT << 16; 273008ec46f6SDon Brace break; 2731edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2732edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2733f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2734f42e81e1SStephen Cameron cp->Request.CDB); 2735edd16368SStephen M. Cameron break; 2736edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2737f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2738f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2739f42e81e1SStephen Cameron cp->Request.CDB); 2740edd16368SStephen M. Cameron break; 2741edd16368SStephen M. Cameron case CMD_TIMEOUT: 2742edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2743f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2744f42e81e1SStephen Cameron cp->Request.CDB); 2745edd16368SStephen M. Cameron break; 27461d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 27471d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 27481d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 27491d5e2ed0SStephen M. Cameron break; 27509437ac43SStephen Cameron case CMD_TMF_STATUS: 27519437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27529437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27539437ac43SStephen Cameron break; 2754283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2755283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2756283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2757283b4a9bSStephen M. Cameron */ 2758283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2759283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2760283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2761283b4a9bSStephen M. Cameron break; 2762edd16368SStephen M. Cameron default: 2763edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2764edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2765edd16368SStephen M. Cameron cp, ei->CommandStatus); 2766edd16368SStephen M. Cameron } 27678a0ff92cSWebb Scales 27688a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2769edd16368SStephen M. Cameron } 2770edd16368SStephen M. Cameron 2771edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2772edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2773edd16368SStephen M. Cameron { 2774edd16368SStephen M. Cameron int i; 2775edd16368SStephen M. Cameron 277650a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 277750a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 277850a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2779edd16368SStephen M. Cameron data_direction); 2780edd16368SStephen M. Cameron } 2781edd16368SStephen M. Cameron 2782a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2783edd16368SStephen M. Cameron struct CommandList *cp, 2784edd16368SStephen M. Cameron unsigned char *buf, 2785edd16368SStephen M. Cameron size_t buflen, 2786edd16368SStephen M. Cameron int data_direction) 2787edd16368SStephen M. Cameron { 278801a02ffcSStephen M. Cameron u64 addr64; 2789edd16368SStephen M. Cameron 2790edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2791edd16368SStephen M. Cameron cp->Header.SGList = 0; 279250a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2793a2dac136SStephen M. Cameron return 0; 2794edd16368SStephen M. Cameron } 2795edd16368SStephen M. Cameron 279650a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2797eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2798a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2799eceaae18SShuah Khan cp->Header.SGList = 0; 280050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2801a2dac136SStephen M. Cameron return -1; 2802eceaae18SShuah Khan } 280350a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 280450a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 280550a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 280650a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 280750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2808a2dac136SStephen M. Cameron return 0; 2809edd16368SStephen M. Cameron } 2810edd16368SStephen M. Cameron 281125163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 281225163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 281325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 281425163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2815edd16368SStephen M. Cameron { 2816edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2817edd16368SStephen M. Cameron 2818edd16368SStephen M. Cameron c->waiting = &wait; 281925163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 282025163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 282125163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 282225163bd5SWebb Scales wait_for_completion_io(&wait); 282325163bd5SWebb Scales return IO_OK; 282425163bd5SWebb Scales } 282525163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 282625163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 282725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 282825163bd5SWebb Scales return -ETIMEDOUT; 282925163bd5SWebb Scales } 283025163bd5SWebb Scales return IO_OK; 283125163bd5SWebb Scales } 283225163bd5SWebb Scales 283325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 283425163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 283525163bd5SWebb Scales { 283625163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 283725163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 283825163bd5SWebb Scales return IO_OK; 283925163bd5SWebb Scales } 284025163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2841edd16368SStephen M. Cameron } 2842edd16368SStephen M. Cameron 2843094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2844094963daSStephen M. Cameron { 2845094963daSStephen M. Cameron int cpu; 2846094963daSStephen M. Cameron u32 rc, *lockup_detected; 2847094963daSStephen M. Cameron 2848094963daSStephen M. Cameron cpu = get_cpu(); 2849094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2850094963daSStephen M. Cameron rc = *lockup_detected; 2851094963daSStephen M. Cameron put_cpu(); 2852094963daSStephen M. Cameron return rc; 2853094963daSStephen M. Cameron } 2854094963daSStephen M. Cameron 28559c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 285625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 285725163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2858edd16368SStephen M. Cameron { 28599c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 286025163bd5SWebb Scales int rc; 2861edd16368SStephen M. Cameron 2862edd16368SStephen M. Cameron do { 28637630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 286425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 286525163bd5SWebb Scales timeout_msecs); 286625163bd5SWebb Scales if (rc) 286725163bd5SWebb Scales break; 2868edd16368SStephen M. Cameron retry_count++; 28699c2fc160SStephen M. Cameron if (retry_count > 3) { 28709c2fc160SStephen M. Cameron msleep(backoff_time); 28719c2fc160SStephen M. Cameron if (backoff_time < 1000) 28729c2fc160SStephen M. Cameron backoff_time *= 2; 28739c2fc160SStephen M. Cameron } 2874852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28759c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28769c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2877edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 287825163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 287925163bd5SWebb Scales rc = -EIO; 288025163bd5SWebb Scales return rc; 2881edd16368SStephen M. Cameron } 2882edd16368SStephen M. Cameron 2883d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2884d1e8beacSStephen M. Cameron struct CommandList *c) 2885edd16368SStephen M. Cameron { 2886d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2887d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2888edd16368SStephen M. Cameron 2889609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2890609a70dfSRasmus Villemoes txt, lun, cdb); 2891d1e8beacSStephen M. Cameron } 2892d1e8beacSStephen M. Cameron 2893d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2894d1e8beacSStephen M. Cameron struct CommandList *cp) 2895d1e8beacSStephen M. Cameron { 2896d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2897d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28989437ac43SStephen Cameron u8 sense_key, asc, ascq; 28999437ac43SStephen Cameron int sense_len; 2900d1e8beacSStephen M. Cameron 2901edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2902edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 29039437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 29049437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 29059437ac43SStephen Cameron else 29069437ac43SStephen Cameron sense_len = ei->SenseLen; 29079437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 29089437ac43SStephen Cameron &sense_key, &asc, &ascq); 2909d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2910d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 29119437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 29129437ac43SStephen Cameron sense_key, asc, ascq); 2913d1e8beacSStephen M. Cameron else 29149437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2915edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2916edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2917edd16368SStephen M. Cameron "(probably indicates selection timeout " 2918edd16368SStephen M. Cameron "reported incorrectly due to a known " 2919edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2920edd16368SStephen M. Cameron break; 2921edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2922edd16368SStephen M. Cameron break; 2923edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2924d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2925edd16368SStephen M. Cameron break; 2926edd16368SStephen M. Cameron case CMD_INVALID: { 2927edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2928edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2929edd16368SStephen M. Cameron */ 2930d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2931d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2932edd16368SStephen M. Cameron } 2933edd16368SStephen M. Cameron break; 2934edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2935d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2936edd16368SStephen M. Cameron break; 2937edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2938d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2939edd16368SStephen M. Cameron break; 2940edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2941d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2942edd16368SStephen M. Cameron break; 2943edd16368SStephen M. Cameron case CMD_ABORTED: 2944d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2945edd16368SStephen M. Cameron break; 2946edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2947d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2948edd16368SStephen M. Cameron break; 2949edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2950d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2951edd16368SStephen M. Cameron break; 2952edd16368SStephen M. Cameron case CMD_TIMEOUT: 2953d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2954edd16368SStephen M. Cameron break; 29551d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2956d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29571d5e2ed0SStephen M. Cameron break; 295825163bd5SWebb Scales case CMD_CTLR_LOCKUP: 295925163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 296025163bd5SWebb Scales break; 2961edd16368SStephen M. Cameron default: 2962d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2963d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2964edd16368SStephen M. Cameron ei->CommandStatus); 2965edd16368SStephen M. Cameron } 2966edd16368SStephen M. Cameron } 2967edd16368SStephen M. Cameron 2968*0a7c3bb8SDon Brace static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2969*0a7c3bb8SDon Brace u8 page, u8 *buf, size_t bufsize) 2970*0a7c3bb8SDon Brace { 2971*0a7c3bb8SDon Brace int rc = IO_OK; 2972*0a7c3bb8SDon Brace struct CommandList *c; 2973*0a7c3bb8SDon Brace struct ErrorInfo *ei; 2974*0a7c3bb8SDon Brace 2975*0a7c3bb8SDon Brace c = cmd_alloc(h); 2976*0a7c3bb8SDon Brace if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 2977*0a7c3bb8SDon Brace page, scsi3addr, TYPE_CMD)) { 2978*0a7c3bb8SDon Brace rc = -1; 2979*0a7c3bb8SDon Brace goto out; 2980*0a7c3bb8SDon Brace } 2981*0a7c3bb8SDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2982*0a7c3bb8SDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 2983*0a7c3bb8SDon Brace if (rc) 2984*0a7c3bb8SDon Brace goto out; 2985*0a7c3bb8SDon Brace ei = c->err_info; 2986*0a7c3bb8SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2987*0a7c3bb8SDon Brace hpsa_scsi_interpret_error(h, c); 2988*0a7c3bb8SDon Brace rc = -1; 2989*0a7c3bb8SDon Brace } 2990*0a7c3bb8SDon Brace out: 2991*0a7c3bb8SDon Brace cmd_free(h, c); 2992*0a7c3bb8SDon Brace return rc; 2993*0a7c3bb8SDon Brace } 2994*0a7c3bb8SDon Brace 2995*0a7c3bb8SDon Brace static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 2996*0a7c3bb8SDon Brace u8 *scsi3addr) 2997*0a7c3bb8SDon Brace { 2998*0a7c3bb8SDon Brace u8 *buf; 2999*0a7c3bb8SDon Brace u64 sa = 0; 3000*0a7c3bb8SDon Brace int rc = 0; 3001*0a7c3bb8SDon Brace 3002*0a7c3bb8SDon Brace buf = kzalloc(1024, GFP_KERNEL); 3003*0a7c3bb8SDon Brace if (!buf) 3004*0a7c3bb8SDon Brace return 0; 3005*0a7c3bb8SDon Brace 3006*0a7c3bb8SDon Brace rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 3007*0a7c3bb8SDon Brace buf, 1024); 3008*0a7c3bb8SDon Brace 3009*0a7c3bb8SDon Brace if (rc) 3010*0a7c3bb8SDon Brace goto out; 3011*0a7c3bb8SDon Brace 3012*0a7c3bb8SDon Brace sa = get_unaligned_be64(buf+12); 3013*0a7c3bb8SDon Brace 3014*0a7c3bb8SDon Brace out: 3015*0a7c3bb8SDon Brace kfree(buf); 3016*0a7c3bb8SDon Brace return sa; 3017*0a7c3bb8SDon Brace } 3018*0a7c3bb8SDon Brace 3019edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3020b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 3021edd16368SStephen M. Cameron unsigned char bufsize) 3022edd16368SStephen M. Cameron { 3023edd16368SStephen M. Cameron int rc = IO_OK; 3024edd16368SStephen M. Cameron struct CommandList *c; 3025edd16368SStephen M. Cameron struct ErrorInfo *ei; 3026edd16368SStephen M. Cameron 302745fcb86eSStephen Cameron c = cmd_alloc(h); 3028edd16368SStephen M. Cameron 3029a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3030a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 3031a2dac136SStephen M. Cameron rc = -1; 3032a2dac136SStephen M. Cameron goto out; 3033a2dac136SStephen M. Cameron } 303425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 30353026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 303625163bd5SWebb Scales if (rc) 303725163bd5SWebb Scales goto out; 3038edd16368SStephen M. Cameron ei = c->err_info; 3039edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3040d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3041edd16368SStephen M. Cameron rc = -1; 3042edd16368SStephen M. Cameron } 3043a2dac136SStephen M. Cameron out: 304445fcb86eSStephen Cameron cmd_free(h, c); 3045edd16368SStephen M. Cameron return rc; 3046edd16368SStephen M. Cameron } 3047edd16368SStephen M. Cameron 3048bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 304925163bd5SWebb Scales u8 reset_type, int reply_queue) 3050edd16368SStephen M. Cameron { 3051edd16368SStephen M. Cameron int rc = IO_OK; 3052edd16368SStephen M. Cameron struct CommandList *c; 3053edd16368SStephen M. Cameron struct ErrorInfo *ei; 3054edd16368SStephen M. Cameron 305545fcb86eSStephen Cameron c = cmd_alloc(h); 3056edd16368SStephen M. Cameron 3057edd16368SStephen M. Cameron 3058a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 30590b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 3060bf711ac6SScott Teel scsi3addr, TYPE_MSG); 30612ef28849SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 306225163bd5SWebb Scales if (rc) { 306325163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 306425163bd5SWebb Scales goto out; 306525163bd5SWebb Scales } 3066edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 3067edd16368SStephen M. Cameron 3068edd16368SStephen M. Cameron ei = c->err_info; 3069edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 3070d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3071edd16368SStephen M. Cameron rc = -1; 3072edd16368SStephen M. Cameron } 307325163bd5SWebb Scales out: 307445fcb86eSStephen Cameron cmd_free(h, c); 3075edd16368SStephen M. Cameron return rc; 3076edd16368SStephen M. Cameron } 3077edd16368SStephen M. Cameron 3078d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3079d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 3080d604f533SWebb Scales unsigned char *scsi3addr) 3081d604f533SWebb Scales { 3082d604f533SWebb Scales int i; 3083d604f533SWebb Scales bool match = false; 3084d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3085d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3086d604f533SWebb Scales 3087d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 3088d604f533SWebb Scales return false; 3089d604f533SWebb Scales 3090d604f533SWebb Scales switch (c->cmd_type) { 3091d604f533SWebb Scales case CMD_SCSI: 3092d604f533SWebb Scales case CMD_IOCTL_PEND: 3093d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3094d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 3095d604f533SWebb Scales break; 3096d604f533SWebb Scales 3097d604f533SWebb Scales case CMD_IOACCEL1: 3098d604f533SWebb Scales case CMD_IOACCEL2: 3099d604f533SWebb Scales if (c->phys_disk == dev) { 3100d604f533SWebb Scales /* HBA mode match */ 3101d604f533SWebb Scales match = true; 3102d604f533SWebb Scales } else { 3103d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3104d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3105d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3106d604f533SWebb Scales * instead. */ 3107d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3108d604f533SWebb Scales /* FIXME: an alternate test might be 3109d604f533SWebb Scales * 3110d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3111d604f533SWebb Scales * == c2->scsi_nexus; */ 3112d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3113d604f533SWebb Scales } 3114d604f533SWebb Scales } 3115d604f533SWebb Scales break; 3116d604f533SWebb Scales 3117d604f533SWebb Scales case IOACCEL2_TMF: 3118d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3119d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3120d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3121d604f533SWebb Scales } 3122d604f533SWebb Scales break; 3123d604f533SWebb Scales 3124d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3125d604f533SWebb Scales match = false; 3126d604f533SWebb Scales break; 3127d604f533SWebb Scales 3128d604f533SWebb Scales default: 3129d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3130d604f533SWebb Scales c->cmd_type); 3131d604f533SWebb Scales BUG(); 3132d604f533SWebb Scales } 3133d604f533SWebb Scales 3134d604f533SWebb Scales return match; 3135d604f533SWebb Scales } 3136d604f533SWebb Scales 3137d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3138d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3139d604f533SWebb Scales { 3140d604f533SWebb Scales int i; 3141d604f533SWebb Scales int rc = 0; 3142d604f533SWebb Scales 3143d604f533SWebb Scales /* We can really only handle one reset at a time */ 3144d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3145d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3146d604f533SWebb Scales return -EINTR; 3147d604f533SWebb Scales } 3148d604f533SWebb Scales 3149d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3150d604f533SWebb Scales 3151d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3152d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3153d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3154d604f533SWebb Scales 3155d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3156d604f533SWebb Scales unsigned long flags; 3157d604f533SWebb Scales 3158d604f533SWebb Scales /* 3159d604f533SWebb Scales * Mark the target command as having a reset pending, 3160d604f533SWebb Scales * then lock a lock so that the command cannot complete 3161d604f533SWebb Scales * while we're considering it. If the command is not 3162d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3163d604f533SWebb Scales */ 3164d604f533SWebb Scales c->reset_pending = dev; 3165d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3166d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3167d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3168d604f533SWebb Scales else 3169d604f533SWebb Scales c->reset_pending = NULL; 3170d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3171d604f533SWebb Scales } 3172d604f533SWebb Scales 3173d604f533SWebb Scales cmd_free(h, c); 3174d604f533SWebb Scales } 3175d604f533SWebb Scales 3176d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3177d604f533SWebb Scales if (!rc) 3178d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3179d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3180d604f533SWebb Scales lockup_detected(h)); 3181d604f533SWebb Scales 3182d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3183d604f533SWebb Scales dev_warn(&h->pdev->dev, 3184d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3185d604f533SWebb Scales rc = -ENODEV; 3186d604f533SWebb Scales } 3187d604f533SWebb Scales 3188d604f533SWebb Scales if (unlikely(rc)) 3189d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3190bfd7546cSDon Brace else 31918516a2dbSDon Brace rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3192d604f533SWebb Scales 3193d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3194d604f533SWebb Scales return rc; 3195d604f533SWebb Scales } 3196d604f533SWebb Scales 3197edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3198edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3199edd16368SStephen M. Cameron { 3200edd16368SStephen M. Cameron int rc; 3201edd16368SStephen M. Cameron unsigned char *buf; 3202edd16368SStephen M. Cameron 3203edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3204edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3205edd16368SStephen M. Cameron if (!buf) 3206edd16368SStephen M. Cameron return; 32078383278dSScott Teel 32088383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 32098383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 32108383278dSScott Teel goto exit; 32118383278dSScott Teel 32128383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 32138383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 32148383278dSScott Teel 3215edd16368SStephen M. Cameron if (rc == 0) 3216edd16368SStephen M. Cameron *raid_level = buf[8]; 3217edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3218edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 32198383278dSScott Teel exit: 3220edd16368SStephen M. Cameron kfree(buf); 3221edd16368SStephen M. Cameron return; 3222edd16368SStephen M. Cameron } 3223edd16368SStephen M. Cameron 3224283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3225283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3226283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3227283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3228283b4a9bSStephen M. Cameron { 3229283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3230283b4a9bSStephen M. Cameron int map, row, col; 3231283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3232283b4a9bSStephen M. Cameron 3233283b4a9bSStephen M. Cameron if (rc != 0) 3234283b4a9bSStephen M. Cameron return; 3235283b4a9bSStephen M. Cameron 32362ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 32372ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 32382ba8bfc8SStephen M. Cameron return; 32392ba8bfc8SStephen M. Cameron 3240283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3241283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3242283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3243283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3244283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3245283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3246283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3247283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3248283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3249283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3250283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3251283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3252283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3253283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3254283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3255283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3256283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3257283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3258283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3259283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3260283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3261283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3262283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3263283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 32642b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3265dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 3266ba82d91bSColin Ian King dev_info(&h->pdev->dev, "encryption = %s\n", 32672b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 32682b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3269dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3270dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3271283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3272283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3273283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3274283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3275283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3276283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3277283b4a9bSStephen M. Cameron disks_per_row = 3278283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3279283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3280283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3281283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3282283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3283283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3284283b4a9bSStephen M. Cameron disks_per_row = 3285283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3286283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3287283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3288283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3289283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3290283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3291283b4a9bSStephen M. Cameron } 3292283b4a9bSStephen M. Cameron } 3293283b4a9bSStephen M. Cameron } 3294283b4a9bSStephen M. Cameron #else 3295283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3296283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3297283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3298283b4a9bSStephen M. Cameron { 3299283b4a9bSStephen M. Cameron } 3300283b4a9bSStephen M. Cameron #endif 3301283b4a9bSStephen M. Cameron 3302283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3303283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3304283b4a9bSStephen M. Cameron { 3305283b4a9bSStephen M. Cameron int rc = 0; 3306283b4a9bSStephen M. Cameron struct CommandList *c; 3307283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3308283b4a9bSStephen M. Cameron 330945fcb86eSStephen Cameron c = cmd_alloc(h); 3310bf43caf3SRobert Elliott 3311283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3312283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3313283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 33142dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 33152dd02d74SRobert Elliott cmd_free(h, c); 33162dd02d74SRobert Elliott return -1; 3317283b4a9bSStephen M. Cameron } 331825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 33193026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 332025163bd5SWebb Scales if (rc) 332125163bd5SWebb Scales goto out; 3322283b4a9bSStephen M. Cameron ei = c->err_info; 3323283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3324d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 332525163bd5SWebb Scales rc = -1; 332625163bd5SWebb Scales goto out; 3327283b4a9bSStephen M. Cameron } 332845fcb86eSStephen Cameron cmd_free(h, c); 3329283b4a9bSStephen M. Cameron 3330283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3331283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3332283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3333283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3334283b4a9bSStephen M. Cameron rc = -1; 3335283b4a9bSStephen M. Cameron } 3336283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3337283b4a9bSStephen M. Cameron return rc; 333825163bd5SWebb Scales out: 333925163bd5SWebb Scales cmd_free(h, c); 334025163bd5SWebb Scales return rc; 3341283b4a9bSStephen M. Cameron } 3342283b4a9bSStephen M. Cameron 3343d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3344d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3345d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3346d04e62b9SKevin Barnett { 3347d04e62b9SKevin Barnett int rc = IO_OK; 3348d04e62b9SKevin Barnett struct CommandList *c; 3349d04e62b9SKevin Barnett struct ErrorInfo *ei; 3350d04e62b9SKevin Barnett 3351d04e62b9SKevin Barnett c = cmd_alloc(h); 3352d04e62b9SKevin Barnett 3353d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3354d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3355d04e62b9SKevin Barnett if (rc) 3356d04e62b9SKevin Barnett goto out; 3357d04e62b9SKevin Barnett 3358d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3359d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3360d04e62b9SKevin Barnett 3361d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 33623026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3363d04e62b9SKevin Barnett if (rc) 3364d04e62b9SKevin Barnett goto out; 3365d04e62b9SKevin Barnett ei = c->err_info; 3366d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3367d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3368d04e62b9SKevin Barnett rc = -1; 3369d04e62b9SKevin Barnett } 3370d04e62b9SKevin Barnett out: 3371d04e62b9SKevin Barnett cmd_free(h, c); 3372d04e62b9SKevin Barnett return rc; 3373d04e62b9SKevin Barnett } 3374d04e62b9SKevin Barnett 337566749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 337666749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 337766749d0dSScott Teel { 337866749d0dSScott Teel int rc = IO_OK; 337966749d0dSScott Teel struct CommandList *c; 338066749d0dSScott Teel struct ErrorInfo *ei; 338166749d0dSScott Teel 338266749d0dSScott Teel c = cmd_alloc(h); 338366749d0dSScott Teel 338466749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 338566749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 338666749d0dSScott Teel if (rc) 338766749d0dSScott Teel goto out; 338866749d0dSScott Teel 338966749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 33903026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 339166749d0dSScott Teel if (rc) 339266749d0dSScott Teel goto out; 339366749d0dSScott Teel ei = c->err_info; 339466749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 339566749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 339666749d0dSScott Teel rc = -1; 339766749d0dSScott Teel } 339866749d0dSScott Teel out: 339966749d0dSScott Teel cmd_free(h, c); 340066749d0dSScott Teel return rc; 340166749d0dSScott Teel } 340266749d0dSScott Teel 340303383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 340403383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 340503383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 340603383736SDon Brace { 340703383736SDon Brace int rc = IO_OK; 340803383736SDon Brace struct CommandList *c; 340903383736SDon Brace struct ErrorInfo *ei; 341003383736SDon Brace 341103383736SDon Brace c = cmd_alloc(h); 341203383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 341303383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 341403383736SDon Brace if (rc) 341503383736SDon Brace goto out; 341603383736SDon Brace 341703383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 341803383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 341903383736SDon Brace 342025163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 34213026ff9bSDon Brace NO_TIMEOUT); 342203383736SDon Brace ei = c->err_info; 342303383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 342403383736SDon Brace hpsa_scsi_interpret_error(h, c); 342503383736SDon Brace rc = -1; 342603383736SDon Brace } 342703383736SDon Brace out: 342803383736SDon Brace cmd_free(h, c); 3429d04e62b9SKevin Barnett 343003383736SDon Brace return rc; 343103383736SDon Brace } 343203383736SDon Brace 3433cca8f13bSDon Brace /* 3434cca8f13bSDon Brace * get enclosure information 3435cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3436cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3437cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3438cca8f13bSDon Brace */ 3439cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3440cca8f13bSDon Brace unsigned char *scsi3addr, 3441cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3442cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3443cca8f13bSDon Brace { 3444cca8f13bSDon Brace int rc = -1; 3445cca8f13bSDon Brace struct CommandList *c = NULL; 3446cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3447cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3448cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3449cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3450cca8f13bSDon Brace u16 bmic_device_index = 0; 3451cca8f13bSDon Brace 3452cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3453cca8f13bSDon Brace 3454*0a7c3bb8SDon Brace encl_dev->sas_address = 3455*0a7c3bb8SDon Brace hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3456*0a7c3bb8SDon Brace 34575ac517b8SDon Brace if (encl_dev->target == -1 || encl_dev->lun == -1) { 34585ac517b8SDon Brace rc = IO_OK; 34595ac517b8SDon Brace goto out; 34605ac517b8SDon Brace } 34615ac517b8SDon Brace 346217a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 346317a9e54aSDon Brace rc = IO_OK; 3464cca8f13bSDon Brace goto out; 346517a9e54aSDon Brace } 3466cca8f13bSDon Brace 3467cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3468cca8f13bSDon Brace if (!bssbp) 3469cca8f13bSDon Brace goto out; 3470cca8f13bSDon Brace 3471cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3472cca8f13bSDon Brace if (!id_phys) 3473cca8f13bSDon Brace goto out; 3474cca8f13bSDon Brace 3475cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3476cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3477cca8f13bSDon Brace if (rc) { 3478cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3479cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3480cca8f13bSDon Brace goto out; 3481cca8f13bSDon Brace } 3482cca8f13bSDon Brace 3483cca8f13bSDon Brace c = cmd_alloc(h); 3484cca8f13bSDon Brace 3485cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3486cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3487cca8f13bSDon Brace 3488cca8f13bSDon Brace if (rc) 3489cca8f13bSDon Brace goto out; 3490cca8f13bSDon Brace 3491cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3492cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3493cca8f13bSDon Brace else 3494cca8f13bSDon Brace c->Request.CDB[5] = 0; 3495cca8f13bSDon Brace 3496cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 34973026ff9bSDon Brace NO_TIMEOUT); 3498cca8f13bSDon Brace if (rc) 3499cca8f13bSDon Brace goto out; 3500cca8f13bSDon Brace 3501cca8f13bSDon Brace ei = c->err_info; 3502cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3503cca8f13bSDon Brace rc = -1; 3504cca8f13bSDon Brace goto out; 3505cca8f13bSDon Brace } 3506cca8f13bSDon Brace 3507cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3508cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3509cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3510cca8f13bSDon Brace 3511cca8f13bSDon Brace rc = IO_OK; 3512cca8f13bSDon Brace out: 3513cca8f13bSDon Brace kfree(bssbp); 3514cca8f13bSDon Brace kfree(id_phys); 3515cca8f13bSDon Brace 3516cca8f13bSDon Brace if (c) 3517cca8f13bSDon Brace cmd_free(h, c); 3518cca8f13bSDon Brace 3519cca8f13bSDon Brace if (rc != IO_OK) 3520cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3521cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3522cca8f13bSDon Brace } 3523cca8f13bSDon Brace 3524d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3525d04e62b9SKevin Barnett unsigned char *scsi3addr) 3526d04e62b9SKevin Barnett { 3527d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3528d04e62b9SKevin Barnett u32 nphysicals; 3529d04e62b9SKevin Barnett u64 sa = 0; 3530d04e62b9SKevin Barnett int i; 3531d04e62b9SKevin Barnett 3532d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3533d04e62b9SKevin Barnett if (!physdev) 3534d04e62b9SKevin Barnett return 0; 3535d04e62b9SKevin Barnett 3536d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3537d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3538d04e62b9SKevin Barnett kfree(physdev); 3539d04e62b9SKevin Barnett return 0; 3540d04e62b9SKevin Barnett } 3541d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3542d04e62b9SKevin Barnett 3543d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3544d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3545d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3546d04e62b9SKevin Barnett break; 3547d04e62b9SKevin Barnett } 3548d04e62b9SKevin Barnett 3549d04e62b9SKevin Barnett kfree(physdev); 3550d04e62b9SKevin Barnett 3551d04e62b9SKevin Barnett return sa; 3552d04e62b9SKevin Barnett } 3553d04e62b9SKevin Barnett 3554d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3555d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3556d04e62b9SKevin Barnett { 3557d04e62b9SKevin Barnett int rc; 3558d04e62b9SKevin Barnett u64 sa = 0; 3559d04e62b9SKevin Barnett 3560d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3561d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3562d04e62b9SKevin Barnett 3563d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 35647e8a9486SAmit Kushwaha if (!ssi) 3565d04e62b9SKevin Barnett return; 3566d04e62b9SKevin Barnett 3567d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3568d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3569d04e62b9SKevin Barnett if (rc == 0) { 3570d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3571d04e62b9SKevin Barnett h->sas_address = sa; 3572d04e62b9SKevin Barnett } 3573d04e62b9SKevin Barnett 3574d04e62b9SKevin Barnett kfree(ssi); 3575d04e62b9SKevin Barnett } else 3576d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3577d04e62b9SKevin Barnett 3578d04e62b9SKevin Barnett dev->sas_address = sa; 3579d04e62b9SKevin Barnett } 3580d04e62b9SKevin Barnett 35814e188184SBader Ali Saleh static void hpsa_ext_ctrl_present(struct ctlr_info *h, 35824e188184SBader Ali Saleh struct ReportExtendedLUNdata *physdev) 35834e188184SBader Ali Saleh { 35844e188184SBader Ali Saleh u32 nphysicals; 35854e188184SBader Ali Saleh int i; 35864e188184SBader Ali Saleh 35874e188184SBader Ali Saleh if (h->discovery_polling) 35884e188184SBader Ali Saleh return; 35894e188184SBader Ali Saleh 35904e188184SBader Ali Saleh nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 35914e188184SBader Ali Saleh 35924e188184SBader Ali Saleh for (i = 0; i < nphysicals; i++) { 35934e188184SBader Ali Saleh if (physdev->LUN[i].device_type == 35944e188184SBader Ali Saleh BMIC_DEVICE_TYPE_CONTROLLER 35954e188184SBader Ali Saleh && !is_hba_lunid(physdev->LUN[i].lunid)) { 35964e188184SBader Ali Saleh dev_info(&h->pdev->dev, 35974e188184SBader Ali Saleh "External controller present, activate discovery polling and disable rld caching\n"); 35984e188184SBader Ali Saleh hpsa_disable_rld_caching(h); 35994e188184SBader Ali Saleh h->discovery_polling = 1; 36004e188184SBader Ali Saleh break; 36014e188184SBader Ali Saleh } 36024e188184SBader Ali Saleh } 36034e188184SBader Ali Saleh } 36044e188184SBader Ali Saleh 3605d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 36068383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 36071b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 36081b70150aSStephen M. Cameron { 36091b70150aSStephen M. Cameron int rc; 36101b70150aSStephen M. Cameron int i; 36111b70150aSStephen M. Cameron int pages; 36121b70150aSStephen M. Cameron unsigned char *buf, bufsize; 36131b70150aSStephen M. Cameron 36141b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 36151b70150aSStephen M. Cameron if (!buf) 36168383278dSScott Teel return false; 36171b70150aSStephen M. Cameron 36181b70150aSStephen M. Cameron /* Get the size of the page list first */ 36191b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 36201b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 36211b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 36221b70150aSStephen M. Cameron if (rc != 0) 36231b70150aSStephen M. Cameron goto exit_unsupported; 36241b70150aSStephen M. Cameron pages = buf[3]; 36251b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 36261b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 36271b70150aSStephen M. Cameron else 36281b70150aSStephen M. Cameron bufsize = 255; 36291b70150aSStephen M. Cameron 36301b70150aSStephen M. Cameron /* Get the whole VPD page list */ 36311b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 36321b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 36331b70150aSStephen M. Cameron buf, bufsize); 36341b70150aSStephen M. Cameron if (rc != 0) 36351b70150aSStephen M. Cameron goto exit_unsupported; 36361b70150aSStephen M. Cameron 36371b70150aSStephen M. Cameron pages = buf[3]; 36381b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 36391b70150aSStephen M. Cameron if (buf[3 + i] == page) 36401b70150aSStephen M. Cameron goto exit_supported; 36411b70150aSStephen M. Cameron exit_unsupported: 36421b70150aSStephen M. Cameron kfree(buf); 36438383278dSScott Teel return false; 36441b70150aSStephen M. Cameron exit_supported: 36451b70150aSStephen M. Cameron kfree(buf); 36468383278dSScott Teel return true; 36471b70150aSStephen M. Cameron } 36481b70150aSStephen M. Cameron 3649b2582a65SDon Brace /* 3650b2582a65SDon Brace * Called during a scan operation. 3651b2582a65SDon Brace * Sets ioaccel status on the new device list, not the existing device list 3652b2582a65SDon Brace * 3653b2582a65SDon Brace * The device list used during I/O will be updated later in 3654b2582a65SDon Brace * adjust_hpsa_scsi_table. 3655b2582a65SDon Brace */ 3656283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3657283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3658283b4a9bSStephen M. Cameron { 3659283b4a9bSStephen M. Cameron int rc; 3660283b4a9bSStephen M. Cameron unsigned char *buf; 3661283b4a9bSStephen M. Cameron u8 ioaccel_status; 3662283b4a9bSStephen M. Cameron 3663283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3664283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 366541ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3666283b4a9bSStephen M. Cameron 3667283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3668283b4a9bSStephen M. Cameron if (!buf) 3669283b4a9bSStephen M. Cameron return; 36701b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 36711b70150aSStephen M. Cameron goto out; 3672283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3673b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3674283b4a9bSStephen M. Cameron if (rc != 0) 3675283b4a9bSStephen M. Cameron goto out; 3676283b4a9bSStephen M. Cameron 3677283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3678283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3679283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3680283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3681283b4a9bSStephen M. Cameron this_device->offload_config = 3682283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3683283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3684b2582a65SDon Brace this_device->offload_to_be_enabled = 3685283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3686283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3687b2582a65SDon Brace this_device->offload_to_be_enabled = 0; 3688283b4a9bSStephen M. Cameron } 3689b2582a65SDon Brace 3690283b4a9bSStephen M. Cameron out: 3691283b4a9bSStephen M. Cameron kfree(buf); 3692283b4a9bSStephen M. Cameron return; 3693283b4a9bSStephen M. Cameron } 3694283b4a9bSStephen M. Cameron 3695edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3696edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 369775d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3698edd16368SStephen M. Cameron { 3699edd16368SStephen M. Cameron int rc; 3700edd16368SStephen M. Cameron unsigned char *buf; 3701edd16368SStephen M. Cameron 37028383278dSScott Teel /* Does controller have VPD for device id? */ 37038383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 37048383278dSScott Teel return 1; /* not supported */ 37058383278dSScott Teel 3706edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3707edd16368SStephen M. Cameron if (!buf) 3708a84d794dSStephen M. Cameron return -ENOMEM; 37098383278dSScott Teel 37108383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 37118383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 37128383278dSScott Teel if (rc == 0) { 37138383278dSScott Teel if (buflen > 16) 37148383278dSScott Teel buflen = 16; 37158383278dSScott Teel memcpy(device_id, &buf[8], buflen); 37168383278dSScott Teel } 371775d23d89SDon Brace 3718edd16368SStephen M. Cameron kfree(buf); 371975d23d89SDon Brace 37208383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3721edd16368SStephen M. Cameron } 3722edd16368SStephen M. Cameron 3723edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 372403383736SDon Brace void *buf, int bufsize, 3725edd16368SStephen M. Cameron int extended_response) 3726edd16368SStephen M. Cameron { 3727edd16368SStephen M. Cameron int rc = IO_OK; 3728edd16368SStephen M. Cameron struct CommandList *c; 3729edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3730edd16368SStephen M. Cameron struct ErrorInfo *ei; 3731edd16368SStephen M. Cameron 373245fcb86eSStephen Cameron c = cmd_alloc(h); 3733bf43caf3SRobert Elliott 3734e89c0ae7SStephen M. Cameron /* address the controller */ 3735e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3736a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3737a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 373845f769b2SHannes Reinecke rc = -EAGAIN; 3739a2dac136SStephen M. Cameron goto out; 3740a2dac136SStephen M. Cameron } 3741edd16368SStephen M. Cameron if (extended_response) 3742edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 374325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 37443026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 374525163bd5SWebb Scales if (rc) 374625163bd5SWebb Scales goto out; 3747edd16368SStephen M. Cameron ei = c->err_info; 3748edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3749edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3750d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 375145f769b2SHannes Reinecke rc = -EIO; 3752283b4a9bSStephen M. Cameron } else { 375303383736SDon Brace struct ReportLUNdata *rld = buf; 375403383736SDon Brace 375503383736SDon Brace if (rld->extended_response_flag != extended_response) { 375645f769b2SHannes Reinecke if (!h->legacy_board) { 3757283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3758283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3759283b4a9bSStephen M. Cameron extended_response, 376003383736SDon Brace rld->extended_response_flag); 376145f769b2SHannes Reinecke rc = -EINVAL; 376245f769b2SHannes Reinecke } else 376345f769b2SHannes Reinecke rc = -EOPNOTSUPP; 3764283b4a9bSStephen M. Cameron } 3765edd16368SStephen M. Cameron } 3766a2dac136SStephen M. Cameron out: 376745fcb86eSStephen Cameron cmd_free(h, c); 3768edd16368SStephen M. Cameron return rc; 3769edd16368SStephen M. Cameron } 3770edd16368SStephen M. Cameron 3771edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 377203383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3773edd16368SStephen M. Cameron { 37742a80d545SHannes Reinecke int rc; 37752a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 37762a80d545SHannes Reinecke 37772a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 377803383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 377945f769b2SHannes Reinecke if (!rc || rc != -EOPNOTSUPP) 37802a80d545SHannes Reinecke return rc; 37812a80d545SHannes Reinecke 37822a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 37832a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 37842a80d545SHannes Reinecke if (!lbuf) 37852a80d545SHannes Reinecke return -ENOMEM; 37862a80d545SHannes Reinecke 37872a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 37882a80d545SHannes Reinecke if (!rc) { 37892a80d545SHannes Reinecke int i; 37902a80d545SHannes Reinecke u32 nphys; 37912a80d545SHannes Reinecke 37922a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 37932a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 37942a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 37952a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 37962a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 37972a80d545SHannes Reinecke } 37982a80d545SHannes Reinecke kfree(lbuf); 37992a80d545SHannes Reinecke return rc; 3800edd16368SStephen M. Cameron } 3801edd16368SStephen M. Cameron 3802edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3803edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3804edd16368SStephen M. Cameron { 3805edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3806edd16368SStephen M. Cameron } 3807edd16368SStephen M. Cameron 3808edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3809edd16368SStephen M. Cameron int bus, int target, int lun) 3810edd16368SStephen M. Cameron { 3811edd16368SStephen M. Cameron device->bus = bus; 3812edd16368SStephen M. Cameron device->target = target; 3813edd16368SStephen M. Cameron device->lun = lun; 3814edd16368SStephen M. Cameron } 3815edd16368SStephen M. Cameron 38169846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 38179846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 38189846590eSStephen M. Cameron unsigned char scsi3addr[]) 38199846590eSStephen M. Cameron { 38209846590eSStephen M. Cameron int rc; 38219846590eSStephen M. Cameron int status; 38229846590eSStephen M. Cameron int size; 38239846590eSStephen M. Cameron unsigned char *buf; 38249846590eSStephen M. Cameron 38259846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 38269846590eSStephen M. Cameron if (!buf) 38279846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 38289846590eSStephen M. Cameron 38299846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 383024a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 38319846590eSStephen M. Cameron goto exit_failed; 38329846590eSStephen M. Cameron 38339846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 38349846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 38359846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 383624a4b078SStephen M. Cameron if (rc != 0) 38379846590eSStephen M. Cameron goto exit_failed; 38389846590eSStephen M. Cameron size = buf[3]; 38399846590eSStephen M. Cameron 38409846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 38419846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 38429846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 384324a4b078SStephen M. Cameron if (rc != 0) 38449846590eSStephen M. Cameron goto exit_failed; 38459846590eSStephen M. Cameron status = buf[4]; /* status byte */ 38469846590eSStephen M. Cameron 38479846590eSStephen M. Cameron kfree(buf); 38489846590eSStephen M. Cameron return status; 38499846590eSStephen M. Cameron exit_failed: 38509846590eSStephen M. Cameron kfree(buf); 38519846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 38529846590eSStephen M. Cameron } 38539846590eSStephen M. Cameron 38549846590eSStephen M. Cameron /* Determine offline status of a volume. 38559846590eSStephen M. Cameron * Return either: 38569846590eSStephen M. Cameron * 0 (not offline) 385767955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 38589846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 38599846590eSStephen M. Cameron * describing why a volume is to be kept offline) 38609846590eSStephen M. Cameron */ 386185b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h, 38629846590eSStephen M. Cameron unsigned char scsi3addr[]) 38639846590eSStephen M. Cameron { 38649846590eSStephen M. Cameron struct CommandList *c; 38659437ac43SStephen Cameron unsigned char *sense; 38669437ac43SStephen Cameron u8 sense_key, asc, ascq; 38679437ac43SStephen Cameron int sense_len; 386825163bd5SWebb Scales int rc, ldstat = 0; 38699846590eSStephen M. Cameron u16 cmd_status; 38709846590eSStephen M. Cameron u8 scsi_status; 38719846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 38729846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 38739846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 38749846590eSStephen M. Cameron 38759846590eSStephen M. Cameron c = cmd_alloc(h); 3876bf43caf3SRobert Elliott 38779846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3878c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 38793026ff9bSDon Brace NO_TIMEOUT); 388025163bd5SWebb Scales if (rc) { 388125163bd5SWebb Scales cmd_free(h, c); 388285b29008SDon Brace return HPSA_VPD_LV_STATUS_UNSUPPORTED; 388325163bd5SWebb Scales } 38849846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 38859437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 38869437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 38879437ac43SStephen Cameron else 38889437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 38899437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 38909846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 38919846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 38929846590eSStephen M. Cameron cmd_free(h, c); 38939846590eSStephen M. Cameron 38949846590eSStephen M. Cameron /* Determine the reason for not ready state */ 38959846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 38969846590eSStephen M. Cameron 38979846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 38989846590eSStephen M. Cameron switch (ldstat) { 389985b29008SDon Brace case HPSA_LV_FAILED: 39009846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 39015ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 39029846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 39039846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 39049846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 39059846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 39069846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 39079846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 39089846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 39099846590eSStephen M. Cameron return ldstat; 39109846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 39119846590eSStephen M. Cameron /* If VPD status page isn't available, 39129846590eSStephen M. Cameron * use ASC/ASCQ to determine state 39139846590eSStephen M. Cameron */ 39149846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 39159846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 39169846590eSStephen M. Cameron return ldstat; 39179846590eSStephen M. Cameron break; 39189846590eSStephen M. Cameron default: 39199846590eSStephen M. Cameron break; 39209846590eSStephen M. Cameron } 392185b29008SDon Brace return HPSA_LV_OK; 39229846590eSStephen M. Cameron } 39239846590eSStephen M. Cameron 3924edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 39250b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 39260b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3927edd16368SStephen M. Cameron { 39280b0e1d6cSStephen M. Cameron 39290b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 39300b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 39310b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 39320b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 39330b0e1d6cSStephen M. Cameron 3934ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 39350b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3936683fc444SDon Brace int rc = 0; 3937edd16368SStephen M. Cameron 3938ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3939683fc444SDon Brace if (!inq_buff) { 3940683fc444SDon Brace rc = -ENOMEM; 3941edd16368SStephen M. Cameron goto bail_out; 3942683fc444SDon Brace } 3943edd16368SStephen M. Cameron 3944edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3945edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3946edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3947edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 394885b29008SDon Brace "%s: inquiry failed, device will be skipped.\n", 394985b29008SDon Brace __func__); 395085b29008SDon Brace rc = HPSA_INQUIRY_FAILED; 3951edd16368SStephen M. Cameron goto bail_out; 3952edd16368SStephen M. Cameron } 3953edd16368SStephen M. Cameron 39544af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 39554af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 395675d23d89SDon Brace 3957edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3958edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3959edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3960edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3961edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3962edd16368SStephen M. Cameron sizeof(this_device->model)); 39637630b3a5SHannes Reinecke this_device->rev = inq_buff[2]; 3964edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3965edd16368SStephen M. Cameron sizeof(this_device->device_id)); 39668383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 396755e1f9f0SDan Carpenter sizeof(this_device->device_id)) < 0) 39688383278dSScott Teel dev_err(&h->pdev->dev, 39698383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 39708383278dSScott Teel h->ctlr, __func__, 39718383278dSScott Teel h->scsi_host->host_no, 39728383278dSScott Teel this_device->target, this_device->lun, 39738383278dSScott Teel scsi_device_type(this_device->devtype), 39748383278dSScott Teel this_device->model); 3975edd16368SStephen M. Cameron 3976af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3977af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3978283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 397985b29008SDon Brace unsigned char volume_offline; 398067955ba3SStephen M. Cameron 3981edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3982283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3983283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 398467955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 39854d17944aSHannes Reinecke if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 39864d17944aSHannes Reinecke h->legacy_board) { 39874d17944aSHannes Reinecke /* 39884d17944aSHannes Reinecke * Legacy boards might not support volume status 39894d17944aSHannes Reinecke */ 39904d17944aSHannes Reinecke dev_info(&h->pdev->dev, 39914d17944aSHannes Reinecke "C0:T%d:L%d Volume status not available, assuming online.\n", 39924d17944aSHannes Reinecke this_device->target, this_device->lun); 39934d17944aSHannes Reinecke volume_offline = 0; 39944d17944aSHannes Reinecke } 3995eb94588dSTomas Henzl this_device->volume_offline = volume_offline; 399685b29008SDon Brace if (volume_offline == HPSA_LV_FAILED) { 399785b29008SDon Brace rc = HPSA_LV_FAILED; 399885b29008SDon Brace dev_err(&h->pdev->dev, 399985b29008SDon Brace "%s: LV failed, device will be skipped.\n", 400085b29008SDon Brace __func__); 400185b29008SDon Brace goto bail_out; 400285b29008SDon Brace } 4003283b4a9bSStephen M. Cameron } else { 4004edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 4005283b4a9bSStephen M. Cameron this_device->offload_config = 0; 4006283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 400741ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 4008a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 40099846590eSStephen M. Cameron this_device->volume_offline = 0; 401003383736SDon Brace this_device->queue_depth = h->nr_cmds; 4011283b4a9bSStephen M. Cameron } 4012edd16368SStephen M. Cameron 40135086435eSDon Brace if (this_device->external) 40145086435eSDon Brace this_device->queue_depth = EXTERNAL_QD; 40155086435eSDon Brace 40160b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 40170b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 40180b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 40190b0e1d6cSStephen M. Cameron */ 40200b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 40210b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 40220b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 40230b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 40240b0e1d6cSStephen M. Cameron } 4025edd16368SStephen M. Cameron kfree(inq_buff); 4026edd16368SStephen M. Cameron return 0; 4027edd16368SStephen M. Cameron 4028edd16368SStephen M. Cameron bail_out: 4029edd16368SStephen M. Cameron kfree(inq_buff); 4030683fc444SDon Brace return rc; 4031edd16368SStephen M. Cameron } 4032edd16368SStephen M. Cameron 4033c795505aSKevin Barnett /* 4034c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 4035edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 4036edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 4037edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4038edd16368SStephen M. Cameron */ 4039edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 40401f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4041edd16368SStephen M. Cameron { 4042c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 4043edd16368SStephen M. Cameron 40441f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 40451f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 40467630b3a5SHannes Reinecke if (is_hba_lunid(lunaddrbytes)) { 40477630b3a5SHannes Reinecke int bus = HPSA_HBA_BUS; 40487630b3a5SHannes Reinecke 40497630b3a5SHannes Reinecke if (!device->rev) 40507630b3a5SHannes Reinecke bus = HPSA_LEGACY_HBA_BUS; 4051c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 40527630b3a5SHannes Reinecke bus, 0, lunid & 0x3fff); 40537630b3a5SHannes Reinecke } else 40541f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 4055c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 4056c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 40571f310bdeSStephen M. Cameron return; 40581f310bdeSStephen M. Cameron } 40591f310bdeSStephen M. Cameron /* It's a logical device */ 406066749d0dSScott Teel if (device->external) { 40611f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 4062c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4063c795505aSKevin Barnett lunid & 0x00ff); 40641f310bdeSStephen M. Cameron return; 4065339b2b14SStephen M. Cameron } 4066c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4067c795505aSKevin Barnett 0, lunid & 0x3fff); 4068edd16368SStephen M. Cameron } 4069edd16368SStephen M. Cameron 407066749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 407166749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 407266749d0dSScott Teel { 407366749d0dSScott Teel /* In report logicals, local logicals are listed first, 407466749d0dSScott Teel * then any externals. 407566749d0dSScott Teel */ 407666749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 407766749d0dSScott Teel 407866749d0dSScott Teel if (i == raid_ctlr_position) 407966749d0dSScott Teel return 0; 408066749d0dSScott Teel 408166749d0dSScott Teel if (i < logicals_start) 408266749d0dSScott Teel return 0; 408366749d0dSScott Teel 408466749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 408566749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 408666749d0dSScott Teel return 0; 408766749d0dSScott Teel 408866749d0dSScott Teel return 1; /* it's an external lun */ 408966749d0dSScott Teel } 409066749d0dSScott Teel 409154b6e9e9SScott Teel /* 4092edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4093edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4094edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4095edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4096edd16368SStephen M. Cameron */ 4097edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 409803383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 409901a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4100edd16368SStephen M. Cameron { 410103383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4102edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4103edd16368SStephen M. Cameron return -1; 4104edd16368SStephen M. Cameron } 410503383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4106edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 410703383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 410803383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4109edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4110edd16368SStephen M. Cameron } 411103383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4112edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4113edd16368SStephen M. Cameron return -1; 4114edd16368SStephen M. Cameron } 41156df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4116edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4117edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4118edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4119edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4120edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4121edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4122edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4123edd16368SStephen M. Cameron } 4124edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4125edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4126edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4127edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4128edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4129edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4130edd16368SStephen M. Cameron } 4131edd16368SStephen M. Cameron return 0; 4132edd16368SStephen M. Cameron } 4133edd16368SStephen M. Cameron 413442a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 413542a91641SDon Brace int i, int nphysicals, int nlogicals, 4136a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4137339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4138339b2b14SStephen M. Cameron { 4139339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4140339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4141339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4142339b2b14SStephen M. Cameron */ 4143339b2b14SStephen M. Cameron 4144339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4145339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4146339b2b14SStephen M. Cameron 4147339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4148339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4149339b2b14SStephen M. Cameron 4150339b2b14SStephen M. Cameron if (i < logicals_start) 4151d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4152d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4153339b2b14SStephen M. Cameron 4154339b2b14SStephen M. Cameron if (i < last_device) 4155339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4156339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4157339b2b14SStephen M. Cameron BUG(); 4158339b2b14SStephen M. Cameron return NULL; 4159339b2b14SStephen M. Cameron } 4160339b2b14SStephen M. Cameron 416103383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 416203383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 416303383736SDon Brace struct hpsa_scsi_dev_t *dev, 4164f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 416503383736SDon Brace struct bmic_identify_physical_device *id_phys) 416603383736SDon Brace { 416703383736SDon Brace int rc; 41684b6e5597SScott Teel struct ext_report_lun_entry *rle; 41694b6e5597SScott Teel 41704b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 417103383736SDon Brace 417203383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4173f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4174a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 417503383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4176f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4177f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 417803383736SDon Brace sizeof(*id_phys)); 417903383736SDon Brace if (!rc) 418003383736SDon Brace /* Reserve space for FW operations */ 418103383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 418203383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 418303383736SDon Brace dev->queue_depth = 418403383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 418503383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 418603383736SDon Brace else 418703383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 418803383736SDon Brace } 418903383736SDon Brace 41908270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4191f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41928270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41938270b862SJoe Handzik { 4194f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4195f2039b03SDon Brace 4196f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41978270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41988270b862SJoe Handzik 41998270b862SJoe Handzik memcpy(&this_device->active_path_index, 42008270b862SJoe Handzik &id_phys->active_path_number, 42018270b862SJoe Handzik sizeof(this_device->active_path_index)); 42028270b862SJoe Handzik memcpy(&this_device->path_map, 42038270b862SJoe Handzik &id_phys->redundant_path_present_map, 42048270b862SJoe Handzik sizeof(this_device->path_map)); 42058270b862SJoe Handzik memcpy(&this_device->box, 42068270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 42078270b862SJoe Handzik sizeof(this_device->box)); 42088270b862SJoe Handzik memcpy(&this_device->phys_connector, 42098270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 42108270b862SJoe Handzik sizeof(this_device->phys_connector)); 42118270b862SJoe Handzik memcpy(&this_device->bay, 42128270b862SJoe Handzik &id_phys->phys_bay_in_box, 42138270b862SJoe Handzik sizeof(this_device->bay)); 42148270b862SJoe Handzik } 42158270b862SJoe Handzik 421666749d0dSScott Teel /* get number of local logical disks. */ 421766749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 421866749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 421966749d0dSScott Teel u32 *nlocals) 422066749d0dSScott Teel { 422166749d0dSScott Teel int rc; 422266749d0dSScott Teel 422366749d0dSScott Teel if (!id_ctlr) { 422466749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 422566749d0dSScott Teel __func__); 422666749d0dSScott Teel return -ENOMEM; 422766749d0dSScott Teel } 422866749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 422966749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 423066749d0dSScott Teel if (!rc) 423166749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 423266749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 423366749d0dSScott Teel else 423466749d0dSScott Teel *nlocals = le16_to_cpu( 423566749d0dSScott Teel id_ctlr->extended_logical_unit_count); 423666749d0dSScott Teel else 423766749d0dSScott Teel *nlocals = -1; 423866749d0dSScott Teel return rc; 423966749d0dSScott Teel } 424066749d0dSScott Teel 424164ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 424264ce60caSDon Brace { 424364ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 424464ce60caSDon Brace bool is_spare = false; 424564ce60caSDon Brace int rc; 424664ce60caSDon Brace 424764ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 424864ce60caSDon Brace if (!id_phys) 424964ce60caSDon Brace return false; 425064ce60caSDon Brace 425164ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 425264ce60caSDon Brace lunaddrbytes, 425364ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 425464ce60caSDon Brace id_phys, sizeof(*id_phys)); 425564ce60caSDon Brace if (rc == 0) 425664ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 425764ce60caSDon Brace 425864ce60caSDon Brace kfree(id_phys); 425964ce60caSDon Brace return is_spare; 426064ce60caSDon Brace } 426164ce60caSDon Brace 426264ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 426364ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 426464ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 426564ce60caSDon Brace 426664ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 426764ce60caSDon Brace 426864ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 426964ce60caSDon Brace struct ext_report_lun_entry *rle) 427064ce60caSDon Brace { 427164ce60caSDon Brace u8 device_flags; 427264ce60caSDon Brace u8 device_type; 427364ce60caSDon Brace 427464ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 427564ce60caSDon Brace return false; 427664ce60caSDon Brace 427764ce60caSDon Brace device_flags = rle->device_flags; 427864ce60caSDon Brace device_type = rle->device_type; 427964ce60caSDon Brace 428064ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 428164ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 428264ce60caSDon Brace return false; 428364ce60caSDon Brace return true; 428464ce60caSDon Brace } 428564ce60caSDon Brace 428664ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 428764ce60caSDon Brace return false; 428864ce60caSDon Brace 428964ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 429064ce60caSDon Brace return false; 429164ce60caSDon Brace 429264ce60caSDon Brace /* 429364ce60caSDon Brace * Spares may be spun down, we do not want to 429464ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 429564ce60caSDon Brace * that would have them spun up, that is a 429664ce60caSDon Brace * performance hit because I/O to the RAID device 429764ce60caSDon Brace * stops while the spin up occurs which can take 429864ce60caSDon Brace * over 50 seconds. 429964ce60caSDon Brace */ 430064ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 430164ce60caSDon Brace return true; 430264ce60caSDon Brace 430364ce60caSDon Brace return false; 430464ce60caSDon Brace } 430566749d0dSScott Teel 43068aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4307edd16368SStephen M. Cameron { 4308edd16368SStephen M. Cameron /* the idea here is we could get notified 4309edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4310edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4311edd16368SStephen M. Cameron * our list of devices accordingly. 4312edd16368SStephen M. Cameron * 4313edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4314edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4315edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4316edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4317edd16368SStephen M. Cameron */ 4318a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4319edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 432003383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 432166749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 432201a02ffcSStephen M. Cameron u32 nphysicals = 0; 432301a02ffcSStephen M. Cameron u32 nlogicals = 0; 432466749d0dSScott Teel u32 nlocal_logicals = 0; 432501a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4326edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4327edd16368SStephen M. Cameron int ncurrent = 0; 43284f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4329339b2b14SStephen M. Cameron int raid_ctlr_position; 433004fa2f44SKevin Barnett bool physical_device; 4331aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4332edd16368SStephen M. Cameron 4333cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 433492084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 433592084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4336edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 433703383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 433866749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4339edd16368SStephen M. Cameron 434003383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 434166749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4342edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4343edd16368SStephen M. Cameron goto out; 4344edd16368SStephen M. Cameron } 4345edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4346edd16368SStephen M. Cameron 4347853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4348853633e8SDon Brace 434903383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4350853633e8SDon Brace logdev_list, &nlogicals)) { 4351853633e8SDon Brace h->drv_req_rescan = 1; 4352edd16368SStephen M. Cameron goto out; 4353853633e8SDon Brace } 4354edd16368SStephen M. Cameron 435566749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 435666749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 435766749d0dSScott Teel dev_warn(&h->pdev->dev, 435866749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 435966749d0dSScott Teel __func__); 436066749d0dSScott Teel } 4361edd16368SStephen M. Cameron 4362aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4363aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4364aca4a520SScott Teel * controller. 4365edd16368SStephen M. Cameron */ 4366aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4367edd16368SStephen M. Cameron 43684e188184SBader Ali Saleh hpsa_ext_ctrl_present(h, physdev_list); 43694e188184SBader Ali Saleh 4370edd16368SStephen M. Cameron /* Allocate the per device structures */ 4371edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4372b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4373b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4374b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4375b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4376b7ec021fSScott Teel break; 4377b7ec021fSScott Teel } 4378b7ec021fSScott Teel 4379edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4380edd16368SStephen M. Cameron if (!currentsd[i]) { 4381853633e8SDon Brace h->drv_req_rescan = 1; 4382edd16368SStephen M. Cameron goto out; 4383edd16368SStephen M. Cameron } 4384edd16368SStephen M. Cameron ndev_allocated++; 4385edd16368SStephen M. Cameron } 4386edd16368SStephen M. Cameron 43878645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4388339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4389339b2b14SStephen M. Cameron else 4390339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4391339b2b14SStephen M. Cameron 4392edd16368SStephen M. Cameron /* adjust our table of devices */ 43934f4eb9f1SScott Teel n_ext_target_devs = 0; 4394edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43950b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4396683fc444SDon Brace int rc = 0; 4397f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 439864ce60caSDon Brace bool skip_device = false; 4399edd16368SStephen M. Cameron 4400421bf80cSScott Teel memset(tmpdevice, 0, sizeof(*tmpdevice)); 4401421bf80cSScott Teel 440204fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4403edd16368SStephen M. Cameron 4404edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4405339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4406339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 440741ce4c35SStephen Cameron 440886cf7130SDon Brace /* Determine if this is a lun from an external target array */ 440986cf7130SDon Brace tmpdevice->external = 441086cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 441186cf7130SDon Brace nphysicals, nlocal_logicals); 441286cf7130SDon Brace 441364ce60caSDon Brace /* 441464ce60caSDon Brace * Skip over some devices such as a spare. 441564ce60caSDon Brace */ 441664ce60caSDon Brace if (!tmpdevice->external && physical_device) { 441764ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 441864ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 441964ce60caSDon Brace if (skip_device) 4420edd16368SStephen M. Cameron continue; 442164ce60caSDon Brace } 4422edd16368SStephen M. Cameron 4423b2582a65SDon Brace /* Get device type, vendor, model, device id, raid_map */ 4424683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4425683fc444SDon Brace &is_OBDR); 4426683fc444SDon Brace if (rc == -ENOMEM) { 4427683fc444SDon Brace dev_warn(&h->pdev->dev, 4428683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4429853633e8SDon Brace h->drv_req_rescan = 1; 4430683fc444SDon Brace goto out; 4431853633e8SDon Brace } 4432683fc444SDon Brace if (rc) { 443385b29008SDon Brace h->drv_req_rescan = 1; 4434683fc444SDon Brace continue; 4435683fc444SDon Brace } 4436683fc444SDon Brace 44371f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4438edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4439edd16368SStephen M. Cameron 4440edd16368SStephen M. Cameron *this_device = *tmpdevice; 444104fa2f44SKevin Barnett this_device->physical_device = physical_device; 4442edd16368SStephen M. Cameron 444304fa2f44SKevin Barnett /* 444404fa2f44SKevin Barnett * Expose all devices except for physical devices that 444504fa2f44SKevin Barnett * are masked. 444604fa2f44SKevin Barnett */ 444704fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 44482a168208SKevin Barnett this_device->expose_device = 0; 44492a168208SKevin Barnett else 44502a168208SKevin Barnett this_device->expose_device = 1; 445141ce4c35SStephen Cameron 4452d04e62b9SKevin Barnett 4453d04e62b9SKevin Barnett /* 4454d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4455d04e62b9SKevin Barnett */ 4456d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4457d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4458edd16368SStephen M. Cameron 4459edd16368SStephen M. Cameron switch (this_device->devtype) { 44600b0e1d6cSStephen M. Cameron case TYPE_ROM: 4461edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4462edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4463edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4464edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4465edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4466edd16368SStephen M. Cameron * the inquiry data. 4467edd16368SStephen M. Cameron */ 44680b0e1d6cSStephen M. Cameron if (is_OBDR) 4469edd16368SStephen M. Cameron ncurrent++; 4470edd16368SStephen M. Cameron break; 4471edd16368SStephen M. Cameron case TYPE_DISK: 4472af15ed36SDon Brace case TYPE_ZBC: 447304fa2f44SKevin Barnett if (this_device->physical_device) { 4474b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4475b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4476ecf418d1SJoe Handzik this_device->offload_enabled = 0; 447703383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4478f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4479f2039b03SDon Brace hpsa_get_path_info(this_device, 4480f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4481b9092b79SKevin Barnett } 4482edd16368SStephen M. Cameron ncurrent++; 4483edd16368SStephen M. Cameron break; 4484edd16368SStephen M. Cameron case TYPE_TAPE: 4485edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4486cca8f13bSDon Brace ncurrent++; 4487cca8f13bSDon Brace break; 448841ce4c35SStephen Cameron case TYPE_ENCLOSURE: 448917a9e54aSDon Brace if (!this_device->external) 4490cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4491cca8f13bSDon Brace physdev_list, phys_dev_index, 4492cca8f13bSDon Brace this_device); 449341ce4c35SStephen Cameron ncurrent++; 449441ce4c35SStephen Cameron break; 4495edd16368SStephen M. Cameron case TYPE_RAID: 4496edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4497edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4498edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4499edd16368SStephen M. Cameron * don't present it. 4500edd16368SStephen M. Cameron */ 4501edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4502edd16368SStephen M. Cameron break; 4503edd16368SStephen M. Cameron ncurrent++; 4504edd16368SStephen M. Cameron break; 4505edd16368SStephen M. Cameron default: 4506edd16368SStephen M. Cameron break; 4507edd16368SStephen M. Cameron } 4508cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4509edd16368SStephen M. Cameron break; 4510edd16368SStephen M. Cameron } 4511d04e62b9SKevin Barnett 4512d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4513d04e62b9SKevin Barnett int rc = 0; 4514d04e62b9SKevin Barnett 4515d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4516d04e62b9SKevin Barnett if (rc) { 4517d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4518d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4519d04e62b9SKevin Barnett goto out; 4520d04e62b9SKevin Barnett } 4521d04e62b9SKevin Barnett } 4522d04e62b9SKevin Barnett 45238aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4524edd16368SStephen M. Cameron out: 4525edd16368SStephen M. Cameron kfree(tmpdevice); 4526edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4527edd16368SStephen M. Cameron kfree(currentsd[i]); 4528edd16368SStephen M. Cameron kfree(currentsd); 4529edd16368SStephen M. Cameron kfree(physdev_list); 4530edd16368SStephen M. Cameron kfree(logdev_list); 453166749d0dSScott Teel kfree(id_ctlr); 453203383736SDon Brace kfree(id_phys); 4533edd16368SStephen M. Cameron } 4534edd16368SStephen M. Cameron 4535ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4536ec5cbf04SWebb Scales struct scatterlist *sg) 4537ec5cbf04SWebb Scales { 4538ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4539ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4540ec5cbf04SWebb Scales 4541ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4542ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4543ec5cbf04SWebb Scales desc->Ext = 0; 4544ec5cbf04SWebb Scales } 4545ec5cbf04SWebb Scales 4546c7ee65b3SWebb Scales /* 4547c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4548edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4549edd16368SStephen M. Cameron * hpsa command, cp. 4550edd16368SStephen M. Cameron */ 455133a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4552edd16368SStephen M. Cameron struct CommandList *cp, 4553edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4554edd16368SStephen M. Cameron { 4555edd16368SStephen M. Cameron struct scatterlist *sg; 4556b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 455733a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4558edd16368SStephen M. Cameron 455933a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4560edd16368SStephen M. Cameron 4561edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4562edd16368SStephen M. Cameron if (use_sg < 0) 4563edd16368SStephen M. Cameron return use_sg; 4564edd16368SStephen M. Cameron 4565edd16368SStephen M. Cameron if (!use_sg) 4566edd16368SStephen M. Cameron goto sglist_finished; 4567edd16368SStephen M. Cameron 4568b3a7ba7cSWebb Scales /* 4569b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4570b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4571b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4572b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4573b3a7ba7cSWebb Scales * the entries in the one list. 4574b3a7ba7cSWebb Scales */ 457533a2ffceSStephen M. Cameron curr_sg = cp->SG; 4576b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4577b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4578b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4579b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4580ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 458133a2ffceSStephen M. Cameron curr_sg++; 458233a2ffceSStephen M. Cameron } 4583ec5cbf04SWebb Scales 4584b3a7ba7cSWebb Scales if (chained) { 4585b3a7ba7cSWebb Scales /* 4586b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4587b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4588b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4589b3a7ba7cSWebb Scales * where the previous loop left off. 4590b3a7ba7cSWebb Scales */ 4591b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4592b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4593b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4594b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4595b3a7ba7cSWebb Scales curr_sg++; 4596b3a7ba7cSWebb Scales } 4597b3a7ba7cSWebb Scales } 4598b3a7ba7cSWebb Scales 4599ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4600b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 460133a2ffceSStephen M. Cameron 460233a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 460333a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 460433a2ffceSStephen M. Cameron 460533a2ffceSStephen M. Cameron if (chained) { 460633a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 460750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4608e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4609e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4610e2bea6dfSStephen M. Cameron return -1; 4611e2bea6dfSStephen M. Cameron } 461233a2ffceSStephen M. Cameron return 0; 4613edd16368SStephen M. Cameron } 4614edd16368SStephen M. Cameron 4615edd16368SStephen M. Cameron sglist_finished: 4616edd16368SStephen M. Cameron 461701a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4618c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4619edd16368SStephen M. Cameron return 0; 4620edd16368SStephen M. Cameron } 4621edd16368SStephen M. Cameron 4622b63c64acSDon Brace #define BUFLEN 128 4623b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h, 4624b63c64acSDon Brace u8 *cdb, int cdb_len, 4625b63c64acSDon Brace const char *func) 4626b63c64acSDon Brace { 4627b63c64acSDon Brace char buf[BUFLEN]; 4628b63c64acSDon Brace int outlen; 4629b63c64acSDon Brace int i; 4630b63c64acSDon Brace 4631b63c64acSDon Brace outlen = scnprintf(buf, BUFLEN, 4632b63c64acSDon Brace "%s: Blocking zero-length request: CDB:", func); 4633b63c64acSDon Brace for (i = 0; i < cdb_len; i++) 4634b63c64acSDon Brace outlen += scnprintf(buf+outlen, BUFLEN - outlen, 4635b63c64acSDon Brace "%02hhx", cdb[i]); 4636b63c64acSDon Brace dev_warn(&h->pdev->dev, "%s\n", buf); 4637b63c64acSDon Brace } 4638b63c64acSDon Brace 4639b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1 4640b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */ 4641b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb) 4642b63c64acSDon Brace { 4643b63c64acSDon Brace u32 block_cnt; 4644b63c64acSDon Brace 4645b63c64acSDon Brace /* Block zero-length transfer sizes on certain commands. */ 4646b63c64acSDon Brace switch (cdb[0]) { 4647b63c64acSDon Brace case READ_10: 4648b63c64acSDon Brace case WRITE_10: 4649b63c64acSDon Brace case VERIFY: /* 0x2F */ 4650b63c64acSDon Brace case WRITE_VERIFY: /* 0x2E */ 4651b63c64acSDon Brace block_cnt = get_unaligned_be16(&cdb[7]); 4652b63c64acSDon Brace break; 4653b63c64acSDon Brace case READ_12: 4654b63c64acSDon Brace case WRITE_12: 4655b63c64acSDon Brace case VERIFY_12: /* 0xAF */ 4656b63c64acSDon Brace case WRITE_VERIFY_12: /* 0xAE */ 4657b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4658b63c64acSDon Brace break; 4659b63c64acSDon Brace case READ_16: 4660b63c64acSDon Brace case WRITE_16: 4661b63c64acSDon Brace case VERIFY_16: /* 0x8F */ 4662b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[10]); 4663b63c64acSDon Brace break; 4664b63c64acSDon Brace default: 4665b63c64acSDon Brace return false; 4666b63c64acSDon Brace } 4667b63c64acSDon Brace 4668b63c64acSDon Brace return block_cnt == 0; 4669b63c64acSDon Brace } 4670b63c64acSDon Brace 4671283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4672283b4a9bSStephen M. Cameron { 4673283b4a9bSStephen M. Cameron int is_write = 0; 4674283b4a9bSStephen M. Cameron u32 block; 4675283b4a9bSStephen M. Cameron u32 block_cnt; 4676283b4a9bSStephen M. Cameron 4677283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4678283b4a9bSStephen M. Cameron switch (cdb[0]) { 4679283b4a9bSStephen M. Cameron case WRITE_6: 4680283b4a9bSStephen M. Cameron case WRITE_12: 4681283b4a9bSStephen M. Cameron is_write = 1; 4682283b4a9bSStephen M. Cameron case READ_6: 4683283b4a9bSStephen M. Cameron case READ_12: 4684283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4685abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4686abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4687abbada71SMahesh Rajashekhara cdb[3]); 4688283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4689c8a6c9a6SDon Brace if (block_cnt == 0) 4690c8a6c9a6SDon Brace block_cnt = 256; 4691283b4a9bSStephen M. Cameron } else { 4692283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4693c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4694c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4695283b4a9bSStephen M. Cameron } 4696283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4697283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4698283b4a9bSStephen M. Cameron 4699283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4700283b4a9bSStephen M. Cameron cdb[1] = 0; 4701283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4702283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4703283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4704283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4705283b4a9bSStephen M. Cameron cdb[6] = 0; 4706283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4707283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4708283b4a9bSStephen M. Cameron cdb[9] = 0; 4709283b4a9bSStephen M. Cameron *cdb_len = 10; 4710283b4a9bSStephen M. Cameron break; 4711283b4a9bSStephen M. Cameron } 4712283b4a9bSStephen M. Cameron return 0; 4713283b4a9bSStephen M. Cameron } 4714283b4a9bSStephen M. Cameron 4715c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4716283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 471703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4718e1f7de0cSMatt Gates { 4719e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4720e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4721e1f7de0cSMatt Gates unsigned int len; 4722e1f7de0cSMatt Gates unsigned int total_len = 0; 4723e1f7de0cSMatt Gates struct scatterlist *sg; 4724e1f7de0cSMatt Gates u64 addr64; 4725e1f7de0cSMatt Gates int use_sg, i; 4726e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4727e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4728e1f7de0cSMatt Gates 4729283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 473003383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 473103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4732283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 473303383736SDon Brace } 4734283b4a9bSStephen M. Cameron 4735e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4736e1f7de0cSMatt Gates 4737b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4738b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4739b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4740b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4741b63c64acSDon Brace } 4742b63c64acSDon Brace 474303383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 474403383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4745283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 474603383736SDon Brace } 4747283b4a9bSStephen M. Cameron 4748e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4749e1f7de0cSMatt Gates 4750e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4751e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4752e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4753e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4754e1f7de0cSMatt Gates 4755e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 475603383736SDon Brace if (use_sg < 0) { 475703383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4758e1f7de0cSMatt Gates return use_sg; 475903383736SDon Brace } 4760e1f7de0cSMatt Gates 4761e1f7de0cSMatt Gates if (use_sg) { 4762e1f7de0cSMatt Gates curr_sg = cp->SG; 4763e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4764e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4765e1f7de0cSMatt Gates len = sg_dma_len(sg); 4766e1f7de0cSMatt Gates total_len += len; 476750a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 476850a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 476950a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4770e1f7de0cSMatt Gates curr_sg++; 4771e1f7de0cSMatt Gates } 477250a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4773e1f7de0cSMatt Gates 4774e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4775e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4776e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4777e1f7de0cSMatt Gates break; 4778e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4779e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4780e1f7de0cSMatt Gates break; 4781e1f7de0cSMatt Gates case DMA_NONE: 4782e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4783e1f7de0cSMatt Gates break; 4784e1f7de0cSMatt Gates default: 4785e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4786e1f7de0cSMatt Gates cmd->sc_data_direction); 4787e1f7de0cSMatt Gates BUG(); 4788e1f7de0cSMatt Gates break; 4789e1f7de0cSMatt Gates } 4790e1f7de0cSMatt Gates } else { 4791e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4792e1f7de0cSMatt Gates } 4793e1f7de0cSMatt Gates 4794c349775eSScott Teel c->Header.SGList = use_sg; 4795e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 47962b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 47972b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 47982b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 47992b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 48002b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4801283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4802283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4803c349775eSScott Teel /* Tag was already set at init time. */ 4804e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4805e1f7de0cSMatt Gates return 0; 4806e1f7de0cSMatt Gates } 4807edd16368SStephen M. Cameron 4808283b4a9bSStephen M. Cameron /* 4809283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4810283b4a9bSStephen M. Cameron * I/O accelerator path. 4811283b4a9bSStephen M. Cameron */ 4812283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4813283b4a9bSStephen M. Cameron struct CommandList *c) 4814283b4a9bSStephen M. Cameron { 4815283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4816283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4817283b4a9bSStephen M. Cameron 481845e596cdSDon Brace if (!dev) 481945e596cdSDon Brace return -1; 482045e596cdSDon Brace 482103383736SDon Brace c->phys_disk = dev; 482203383736SDon Brace 4823283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 482403383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4825283b4a9bSStephen M. Cameron } 4826283b4a9bSStephen M. Cameron 4827dd0e19f3SScott Teel /* 4828dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4829dd0e19f3SScott Teel */ 4830dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4831dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4832dd0e19f3SScott Teel { 4833dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4834dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4835dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4836dd0e19f3SScott Teel u64 first_block; 4837dd0e19f3SScott Teel 4838dd0e19f3SScott Teel /* Are we doing encryption on this device */ 48392b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4840dd0e19f3SScott Teel return; 4841dd0e19f3SScott Teel /* Set the data encryption key index. */ 4842dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4843dd0e19f3SScott Teel 4844dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4845dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4846dd0e19f3SScott Teel 4847dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4848dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4849dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4850dd0e19f3SScott Teel */ 4851dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4852dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4853dd0e19f3SScott Teel case READ_6: 4854abbada71SMahesh Rajashekhara case WRITE_6: 4855abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4856abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4857abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4858dd0e19f3SScott Teel break; 4859dd0e19f3SScott Teel case WRITE_10: 4860dd0e19f3SScott Teel case READ_10: 4861dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4862dd0e19f3SScott Teel case WRITE_12: 4863dd0e19f3SScott Teel case READ_12: 48642b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4865dd0e19f3SScott Teel break; 4866dd0e19f3SScott Teel case WRITE_16: 4867dd0e19f3SScott Teel case READ_16: 48682b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4869dd0e19f3SScott Teel break; 4870dd0e19f3SScott Teel default: 4871dd0e19f3SScott Teel dev_err(&h->pdev->dev, 48722b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 48732b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4874dd0e19f3SScott Teel BUG(); 4875dd0e19f3SScott Teel break; 4876dd0e19f3SScott Teel } 48772b08b3e9SDon Brace 48782b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 48792b08b3e9SDon Brace first_block = first_block * 48802b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 48812b08b3e9SDon Brace 48822b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 48832b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4884dd0e19f3SScott Teel } 4885dd0e19f3SScott Teel 4886c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4887c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 488803383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4889c349775eSScott Teel { 4890c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4891c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4892c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4893c349775eSScott Teel int use_sg, i; 4894c349775eSScott Teel struct scatterlist *sg; 4895c349775eSScott Teel u64 addr64; 4896c349775eSScott Teel u32 len; 4897c349775eSScott Teel u32 total_len = 0; 4898c349775eSScott Teel 489945e596cdSDon Brace if (!cmd->device) 490045e596cdSDon Brace return -1; 490145e596cdSDon Brace 490245e596cdSDon Brace if (!cmd->device->hostdata) 490345e596cdSDon Brace return -1; 490445e596cdSDon Brace 4905d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4906c349775eSScott Teel 4907b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4908b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4909b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4910b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4911b63c64acSDon Brace } 4912b63c64acSDon Brace 491303383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 491403383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4915c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 491603383736SDon Brace } 491703383736SDon Brace 4918c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4919c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4920c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4921c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4922c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4923c349775eSScott Teel 4924c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4925c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4926c349775eSScott Teel 4927c349775eSScott Teel use_sg = scsi_dma_map(cmd); 492803383736SDon Brace if (use_sg < 0) { 492903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4930c349775eSScott Teel return use_sg; 493103383736SDon Brace } 4932c349775eSScott Teel 4933c349775eSScott Teel if (use_sg) { 4934c349775eSScott Teel curr_sg = cp->sg; 4935d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4936d9a729f3SWebb Scales addr64 = le64_to_cpu( 4937d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4938d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4939d9a729f3SWebb Scales curr_sg->length = 0; 4940d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4941d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4942d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4943d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4944d9a729f3SWebb Scales 4945d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4946d9a729f3SWebb Scales } 4947c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4948c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4949c349775eSScott Teel len = sg_dma_len(sg); 4950c349775eSScott Teel total_len += len; 4951c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4952c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4953c349775eSScott Teel curr_sg->reserved[0] = 0; 4954c349775eSScott Teel curr_sg->reserved[1] = 0; 4955c349775eSScott Teel curr_sg->reserved[2] = 0; 4956c349775eSScott Teel curr_sg->chain_indicator = 0; 4957c349775eSScott Teel curr_sg++; 4958c349775eSScott Teel } 4959c349775eSScott Teel 4960c349775eSScott Teel switch (cmd->sc_data_direction) { 4961c349775eSScott Teel case DMA_TO_DEVICE: 4962dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4963dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4964c349775eSScott Teel break; 4965c349775eSScott Teel case DMA_FROM_DEVICE: 4966dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4967dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4968c349775eSScott Teel break; 4969c349775eSScott Teel case DMA_NONE: 4970dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4971dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4972c349775eSScott Teel break; 4973c349775eSScott Teel default: 4974c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4975c349775eSScott Teel cmd->sc_data_direction); 4976c349775eSScott Teel BUG(); 4977c349775eSScott Teel break; 4978c349775eSScott Teel } 4979c349775eSScott Teel } else { 4980dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4981dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4982c349775eSScott Teel } 4983dd0e19f3SScott Teel 4984dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4985dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4986dd0e19f3SScott Teel 49872b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4988f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4989c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4990c349775eSScott Teel 4991c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4992c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4993c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 499450a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4995c349775eSScott Teel 4996d9a729f3SWebb Scales /* fill in sg elements */ 4997d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4998d9a729f3SWebb Scales cp->sg_count = 1; 4999a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 5000d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 5001d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 5002d9a729f3SWebb Scales scsi_dma_unmap(cmd); 5003d9a729f3SWebb Scales return -1; 5004d9a729f3SWebb Scales } 5005d9a729f3SWebb Scales } else 5006d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 5007d9a729f3SWebb Scales 5008c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 5009c349775eSScott Teel return 0; 5010c349775eSScott Teel } 5011c349775eSScott Teel 5012c349775eSScott Teel /* 5013c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 5014c349775eSScott Teel */ 5015c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5016c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 501703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5018c349775eSScott Teel { 501945e596cdSDon Brace if (!c->scsi_cmd->device) 502045e596cdSDon Brace return -1; 502145e596cdSDon Brace 502245e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 502345e596cdSDon Brace return -1; 502445e596cdSDon Brace 502503383736SDon Brace /* Try to honor the device's queue depth */ 502603383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 502703383736SDon Brace phys_disk->queue_depth) { 502803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 502903383736SDon Brace return IO_ACCEL_INELIGIBLE; 503003383736SDon Brace } 5031c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 5032c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 503303383736SDon Brace cdb, cdb_len, scsi3addr, 503403383736SDon Brace phys_disk); 5035c349775eSScott Teel else 5036c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 503703383736SDon Brace cdb, cdb_len, scsi3addr, 503803383736SDon Brace phys_disk); 5039c349775eSScott Teel } 5040c349775eSScott Teel 50416b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 50426b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 50436b80b18fSScott Teel { 50446b80b18fSScott Teel if (offload_to_mirror == 0) { 50456b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 50462b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 50476b80b18fSScott Teel return; 50486b80b18fSScott Teel } 50496b80b18fSScott Teel do { 50506b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 50512b08b3e9SDon Brace *current_group = *map_index / 50522b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 50536b80b18fSScott Teel if (offload_to_mirror == *current_group) 50546b80b18fSScott Teel continue; 50552b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 50566b80b18fSScott Teel /* select map index from next group */ 50572b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 50586b80b18fSScott Teel (*current_group)++; 50596b80b18fSScott Teel } else { 50606b80b18fSScott Teel /* select map index from first group */ 50612b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 50626b80b18fSScott Teel *current_group = 0; 50636b80b18fSScott Teel } 50646b80b18fSScott Teel } while (offload_to_mirror != *current_group); 50656b80b18fSScott Teel } 50666b80b18fSScott Teel 5067283b4a9bSStephen M. Cameron /* 5068283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 5069283b4a9bSStephen M. Cameron */ 5070283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5071283b4a9bSStephen M. Cameron struct CommandList *c) 5072283b4a9bSStephen M. Cameron { 5073283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 5074283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5075283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 5076283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 5077283b4a9bSStephen M. Cameron int is_write = 0; 5078283b4a9bSStephen M. Cameron u32 map_index; 5079283b4a9bSStephen M. Cameron u64 first_block, last_block; 5080283b4a9bSStephen M. Cameron u32 block_cnt; 5081283b4a9bSStephen M. Cameron u32 blocks_per_row; 5082283b4a9bSStephen M. Cameron u64 first_row, last_row; 5083283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 5084283b4a9bSStephen M. Cameron u32 first_column, last_column; 50856b80b18fSScott Teel u64 r0_first_row, r0_last_row; 50866b80b18fSScott Teel u32 r5or6_blocks_per_row; 50876b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 50886b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 50896b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 50906b80b18fSScott Teel u32 total_disks_per_row; 50916b80b18fSScott Teel u32 stripesize; 50926b80b18fSScott Teel u32 first_group, last_group, current_group; 5093283b4a9bSStephen M. Cameron u32 map_row; 5094283b4a9bSStephen M. Cameron u32 disk_handle; 5095283b4a9bSStephen M. Cameron u64 disk_block; 5096283b4a9bSStephen M. Cameron u32 disk_block_cnt; 5097283b4a9bSStephen M. Cameron u8 cdb[16]; 5098283b4a9bSStephen M. Cameron u8 cdb_len; 50992b08b3e9SDon Brace u16 strip_size; 5100283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5101283b4a9bSStephen M. Cameron u64 tmpdiv; 5102283b4a9bSStephen M. Cameron #endif 51036b80b18fSScott Teel int offload_to_mirror; 5104283b4a9bSStephen M. Cameron 510545e596cdSDon Brace if (!dev) 510645e596cdSDon Brace return -1; 510745e596cdSDon Brace 5108283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 5109283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 5110283b4a9bSStephen M. Cameron case WRITE_6: 5111283b4a9bSStephen M. Cameron is_write = 1; 5112283b4a9bSStephen M. Cameron case READ_6: 5113abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5114abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5115abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5116283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 51173fa89a04SStephen M. Cameron if (block_cnt == 0) 51183fa89a04SStephen M. Cameron block_cnt = 256; 5119283b4a9bSStephen M. Cameron break; 5120283b4a9bSStephen M. Cameron case WRITE_10: 5121283b4a9bSStephen M. Cameron is_write = 1; 5122283b4a9bSStephen M. Cameron case READ_10: 5123283b4a9bSStephen M. Cameron first_block = 5124283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5125283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5126283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5127283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5128283b4a9bSStephen M. Cameron block_cnt = 5129283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5130283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5131283b4a9bSStephen M. Cameron break; 5132283b4a9bSStephen M. Cameron case WRITE_12: 5133283b4a9bSStephen M. Cameron is_write = 1; 5134283b4a9bSStephen M. Cameron case READ_12: 5135283b4a9bSStephen M. Cameron first_block = 5136283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5137283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5138283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5139283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5140283b4a9bSStephen M. Cameron block_cnt = 5141283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5142283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5143283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5144283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5145283b4a9bSStephen M. Cameron break; 5146283b4a9bSStephen M. Cameron case WRITE_16: 5147283b4a9bSStephen M. Cameron is_write = 1; 5148283b4a9bSStephen M. Cameron case READ_16: 5149283b4a9bSStephen M. Cameron first_block = 5150283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5151283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5152283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5153283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5154283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5155283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5156283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5157283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5158283b4a9bSStephen M. Cameron block_cnt = 5159283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5160283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5161283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5162283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5163283b4a9bSStephen M. Cameron break; 5164283b4a9bSStephen M. Cameron default: 5165283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5166283b4a9bSStephen M. Cameron } 5167283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5168283b4a9bSStephen M. Cameron 5169283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5170283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5171283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5172283b4a9bSStephen M. Cameron 5173283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 51742b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 51752b08b3e9SDon Brace last_block < first_block) 5176283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5177283b4a9bSStephen M. Cameron 5178283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 51792b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 51802b08b3e9SDon Brace le16_to_cpu(map->strip_size); 51812b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5182283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5183283b4a9bSStephen M. Cameron tmpdiv = first_block; 5184283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5185283b4a9bSStephen M. Cameron first_row = tmpdiv; 5186283b4a9bSStephen M. Cameron tmpdiv = last_block; 5187283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5188283b4a9bSStephen M. Cameron last_row = tmpdiv; 5189283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5190283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5191283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 51922b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5193283b4a9bSStephen M. Cameron first_column = tmpdiv; 5194283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 51952b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5196283b4a9bSStephen M. Cameron last_column = tmpdiv; 5197283b4a9bSStephen M. Cameron #else 5198283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5199283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5200283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5201283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 52022b08b3e9SDon Brace first_column = first_row_offset / strip_size; 52032b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5204283b4a9bSStephen M. Cameron #endif 5205283b4a9bSStephen M. Cameron 5206283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5207283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5208283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5209283b4a9bSStephen M. Cameron 5210283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 52112b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 52122b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5213283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52142b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52156b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 52166b80b18fSScott Teel 52176b80b18fSScott Teel switch (dev->raid_level) { 52186b80b18fSScott Teel case HPSA_RAID_0: 52196b80b18fSScott Teel break; /* nothing special to do */ 52206b80b18fSScott Teel case HPSA_RAID_1: 52216b80b18fSScott Teel /* Handles load balance across RAID 1 members. 52226b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 52236b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5224283b4a9bSStephen M. Cameron */ 52252b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5226283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 52272b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5228283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 52296b80b18fSScott Teel break; 52306b80b18fSScott Teel case HPSA_RAID_ADM: 52316b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 52326b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 52336b80b18fSScott Teel */ 52342b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 52356b80b18fSScott Teel 52366b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 52376b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 52386b80b18fSScott Teel &map_index, ¤t_group); 52396b80b18fSScott Teel /* set mirror group to use next time */ 52406b80b18fSScott Teel offload_to_mirror = 52412b08b3e9SDon Brace (offload_to_mirror >= 52422b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 52436b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 52446b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 52456b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 52466b80b18fSScott Teel * function since multiple threads might simultaneously 52476b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 52486b80b18fSScott Teel */ 52496b80b18fSScott Teel break; 52506b80b18fSScott Teel case HPSA_RAID_5: 52516b80b18fSScott Teel case HPSA_RAID_6: 52522b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 52536b80b18fSScott Teel break; 52546b80b18fSScott Teel 52556b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 52566b80b18fSScott Teel r5or6_blocks_per_row = 52572b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 52582b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 52596b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 52602b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 52612b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 52626b80b18fSScott Teel #if BITS_PER_LONG == 32 52636b80b18fSScott Teel tmpdiv = first_block; 52646b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 52656b80b18fSScott Teel tmpdiv = first_group; 52666b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 52676b80b18fSScott Teel first_group = tmpdiv; 52686b80b18fSScott Teel tmpdiv = last_block; 52696b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 52706b80b18fSScott Teel tmpdiv = last_group; 52716b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 52726b80b18fSScott Teel last_group = tmpdiv; 52736b80b18fSScott Teel #else 52746b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 52756b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 52766b80b18fSScott Teel #endif 5277000ff7c2SStephen M. Cameron if (first_group != last_group) 52786b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52796b80b18fSScott Teel 52806b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 52816b80b18fSScott Teel #if BITS_PER_LONG == 32 52826b80b18fSScott Teel tmpdiv = first_block; 52836b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 52846b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 52856b80b18fSScott Teel tmpdiv = last_block; 52866b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 52876b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 52886b80b18fSScott Teel #else 52896b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 52906b80b18fSScott Teel first_block / stripesize; 52916b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 52926b80b18fSScott Teel #endif 52936b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 52946b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52956b80b18fSScott Teel 52966b80b18fSScott Teel 52976b80b18fSScott Teel /* Verify request is in a single column */ 52986b80b18fSScott Teel #if BITS_PER_LONG == 32 52996b80b18fSScott Teel tmpdiv = first_block; 53006b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 53016b80b18fSScott Teel tmpdiv = first_row_offset; 53026b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 53036b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 53046b80b18fSScott Teel tmpdiv = last_block; 53056b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 53066b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 53076b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 53086b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 53096b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 53106b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 53116b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 53126b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 53136b80b18fSScott Teel r5or6_last_column = tmpdiv; 53146b80b18fSScott Teel #else 53156b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 53166b80b18fSScott Teel (u32)((first_block % stripesize) % 53176b80b18fSScott Teel r5or6_blocks_per_row); 53186b80b18fSScott Teel 53196b80b18fSScott Teel r5or6_last_row_offset = 53206b80b18fSScott Teel (u32)((last_block % stripesize) % 53216b80b18fSScott Teel r5or6_blocks_per_row); 53226b80b18fSScott Teel 53236b80b18fSScott Teel first_column = r5or6_first_column = 53242b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 53256b80b18fSScott Teel r5or6_last_column = 53262b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 53276b80b18fSScott Teel #endif 53286b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 53296b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 53306b80b18fSScott Teel 53316b80b18fSScott Teel /* Request is eligible */ 53326b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 53332b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 53346b80b18fSScott Teel 53356b80b18fSScott Teel map_index = (first_group * 53362b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 53376b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 53386b80b18fSScott Teel break; 53396b80b18fSScott Teel default: 53406b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5341283b4a9bSStephen M. Cameron } 53426b80b18fSScott Teel 534307543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 534407543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 534507543e0cSStephen Cameron 534603383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5347c3390df4SDon Brace if (!c->phys_disk) 5348c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 534903383736SDon Brace 5350283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 53512b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 53522b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 53532b08b3e9SDon Brace (first_row_offset - first_column * 53542b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5355283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5356283b4a9bSStephen M. Cameron 5357283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5358283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5359283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5360283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5361283b4a9bSStephen M. Cameron } 5362283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5363283b4a9bSStephen M. Cameron 5364283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5365283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5366283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5367283b4a9bSStephen M. Cameron cdb[1] = 0; 5368283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5369283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5370283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5371283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5372283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5373283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5374283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5375283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5376283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5377283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5378283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5379283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5380283b4a9bSStephen M. Cameron cdb[14] = 0; 5381283b4a9bSStephen M. Cameron cdb[15] = 0; 5382283b4a9bSStephen M. Cameron cdb_len = 16; 5383283b4a9bSStephen M. Cameron } else { 5384283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5385283b4a9bSStephen M. Cameron cdb[1] = 0; 5386283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5387283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5388283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5389283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5390283b4a9bSStephen M. Cameron cdb[6] = 0; 5391283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5392283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5393283b4a9bSStephen M. Cameron cdb[9] = 0; 5394283b4a9bSStephen M. Cameron cdb_len = 10; 5395283b4a9bSStephen M. Cameron } 5396283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 539703383736SDon Brace dev->scsi3addr, 539803383736SDon Brace dev->phys_disk[map_index]); 5399283b4a9bSStephen M. Cameron } 5400283b4a9bSStephen M. Cameron 540125163bd5SWebb Scales /* 540225163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 540325163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 540425163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 540525163bd5SWebb Scales */ 5406574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5407574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5408574f05d3SStephen Cameron unsigned char scsi3addr[]) 5409edd16368SStephen M. Cameron { 5410edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5411edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5412edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5413edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5414edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5415f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5416edd16368SStephen M. Cameron 5417edd16368SStephen M. Cameron /* Fill in the request block... */ 5418edd16368SStephen M. Cameron 5419edd16368SStephen M. Cameron c->Request.Timeout = 0; 5420edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5421edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5422edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5423edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5424edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5425a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5426a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5427edd16368SStephen M. Cameron break; 5428edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5429a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5430a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5431edd16368SStephen M. Cameron break; 5432edd16368SStephen M. Cameron case DMA_NONE: 5433a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5434a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5435edd16368SStephen M. Cameron break; 5436edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5437edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5438edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5439edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5440edd16368SStephen M. Cameron */ 5441edd16368SStephen M. Cameron 5442a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5443a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5444edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5445edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5446edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5447edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5448edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5449edd16368SStephen M. Cameron * our purposes here. 5450edd16368SStephen M. Cameron */ 5451edd16368SStephen M. Cameron 5452edd16368SStephen M. Cameron break; 5453edd16368SStephen M. Cameron 5454edd16368SStephen M. Cameron default: 5455edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5456edd16368SStephen M. Cameron cmd->sc_data_direction); 5457edd16368SStephen M. Cameron BUG(); 5458edd16368SStephen M. Cameron break; 5459edd16368SStephen M. Cameron } 5460edd16368SStephen M. Cameron 546133a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 546273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5463edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5464edd16368SStephen M. Cameron } 5465edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5466edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5467edd16368SStephen M. Cameron return 0; 5468edd16368SStephen M. Cameron } 5469edd16368SStephen M. Cameron 5470360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5471360c73bdSStephen Cameron struct CommandList *c) 5472360c73bdSStephen Cameron { 5473360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5474360c73bdSStephen Cameron 5475360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5476360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5477360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5478360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5479360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5480360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5481360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5482360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5483360c73bdSStephen Cameron c->cmdindex = index; 5484360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5485360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5486360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5487360c73bdSStephen Cameron c->h = h; 5488a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5489360c73bdSStephen Cameron } 5490360c73bdSStephen Cameron 5491360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5492360c73bdSStephen Cameron { 5493360c73bdSStephen Cameron int i; 5494360c73bdSStephen Cameron 5495360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5496360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5497360c73bdSStephen Cameron 5498360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5499360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5500360c73bdSStephen Cameron } 5501360c73bdSStephen Cameron } 5502360c73bdSStephen Cameron 5503360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5504360c73bdSStephen Cameron struct CommandList *c) 5505360c73bdSStephen Cameron { 5506360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5507360c73bdSStephen Cameron 550873153fe5SWebb Scales BUG_ON(c->cmdindex != index); 550973153fe5SWebb Scales 5510360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5511360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5512360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5513360c73bdSStephen Cameron } 5514360c73bdSStephen Cameron 5515592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5516592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5517592a0ad5SWebb Scales unsigned char *scsi3addr) 5518592a0ad5SWebb Scales { 5519592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5520592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5521592a0ad5SWebb Scales 552245e596cdSDon Brace if (!dev) 552345e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 552445e596cdSDon Brace 5525592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5526592a0ad5SWebb Scales 5527592a0ad5SWebb Scales if (dev->offload_enabled) { 5528592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5529592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5530592a0ad5SWebb Scales c->scsi_cmd = cmd; 5531592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5532592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5533592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5534a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5535592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5536592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5537592a0ad5SWebb Scales c->scsi_cmd = cmd; 5538592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5539592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5540592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5541592a0ad5SWebb Scales } 5542592a0ad5SWebb Scales return rc; 5543592a0ad5SWebb Scales } 5544592a0ad5SWebb Scales 5545080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5546080ef1ccSDon Brace { 5547080ef1ccSDon Brace struct scsi_cmnd *cmd; 5548080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 55498a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5550080ef1ccSDon Brace 5551080ef1ccSDon Brace cmd = c->scsi_cmd; 5552080ef1ccSDon Brace dev = cmd->device->hostdata; 5553080ef1ccSDon Brace if (!dev) { 5554080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 55558a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5556080ef1ccSDon Brace } 5557d604f533SWebb Scales if (c->reset_pending) 5558d2315ce6SDon Brace return hpsa_cmd_free_and_done(c->h, c, cmd); 5559592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5560592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5561592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5562592a0ad5SWebb Scales int rc; 5563592a0ad5SWebb Scales 5564592a0ad5SWebb Scales if (c2->error_data.serv_response == 5565592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5566592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5567592a0ad5SWebb Scales if (rc == 0) 5568592a0ad5SWebb Scales return; 5569592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5570592a0ad5SWebb Scales /* 5571592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5572592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5573592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5574592a0ad5SWebb Scales */ 5575592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 55768a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5577592a0ad5SWebb Scales } 5578592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5579592a0ad5SWebb Scales } 5580592a0ad5SWebb Scales } 5581360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5582080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5583080ef1ccSDon Brace /* 5584080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5585080ef1ccSDon Brace * again via scsi mid layer, which will then get 5586080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5587592a0ad5SWebb Scales * 5588592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5589592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5590080ef1ccSDon Brace */ 5591080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5592080ef1ccSDon Brace cmd->scsi_done(cmd); 5593080ef1ccSDon Brace } 5594080ef1ccSDon Brace } 5595080ef1ccSDon Brace 5596574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5597574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5598574f05d3SStephen Cameron { 5599574f05d3SStephen Cameron struct ctlr_info *h; 5600574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5601574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5602574f05d3SStephen Cameron struct CommandList *c; 5603574f05d3SStephen Cameron int rc = 0; 5604574f05d3SStephen Cameron 5605574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5606574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 560773153fe5SWebb Scales 560873153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 560973153fe5SWebb Scales 5610574f05d3SStephen Cameron dev = cmd->device->hostdata; 5611574f05d3SStephen Cameron if (!dev) { 56121ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5613ba74fdc4SDon Brace cmd->scsi_done(cmd); 5614ba74fdc4SDon Brace return 0; 5615ba74fdc4SDon Brace } 5616ba74fdc4SDon Brace 5617ba74fdc4SDon Brace if (dev->removed) { 5618574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5619574f05d3SStephen Cameron cmd->scsi_done(cmd); 5620574f05d3SStephen Cameron return 0; 5621574f05d3SStephen Cameron } 562273153fe5SWebb Scales 5623574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5624574f05d3SStephen Cameron 5625574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 562625163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5627574f05d3SStephen Cameron cmd->scsi_done(cmd); 5628574f05d3SStephen Cameron return 0; 5629574f05d3SStephen Cameron } 563073153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5631574f05d3SStephen Cameron 5632407863cbSStephen Cameron /* 5633407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5634574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5635574f05d3SStephen Cameron */ 5636574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 563757292b58SChristoph Hellwig !blk_rq_is_passthrough(cmd->request) && 5638574f05d3SStephen Cameron h->acciopath_status)) { 5639592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5640574f05d3SStephen Cameron if (rc == 0) 5641592a0ad5SWebb Scales return 0; 5642592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 564373153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5644574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5645574f05d3SStephen Cameron } 5646574f05d3SStephen Cameron } 5647574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5648574f05d3SStephen Cameron } 5649574f05d3SStephen Cameron 56508ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 56515f389360SStephen M. Cameron { 56525f389360SStephen M. Cameron unsigned long flags; 56535f389360SStephen M. Cameron 56545f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 56555f389360SStephen M. Cameron h->scan_finished = 1; 565687b9e6aaSDon Brace wake_up(&h->scan_wait_queue); 56575f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 56585f389360SStephen M. Cameron } 56595f389360SStephen M. Cameron 5660a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5661a08a8471SStephen M. Cameron { 5662a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5663a08a8471SStephen M. Cameron unsigned long flags; 5664a08a8471SStephen M. Cameron 56658ebc9248SWebb Scales /* 56668ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 56678ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 56688ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 56698ebc9248SWebb Scales * piling up on a locked up controller. 56708ebc9248SWebb Scales */ 56718ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 56728ebc9248SWebb Scales return hpsa_scan_complete(h); 56735f389360SStephen M. Cameron 567487b9e6aaSDon Brace /* 567587b9e6aaSDon Brace * If a scan is already waiting to run, no need to add another 567687b9e6aaSDon Brace */ 567787b9e6aaSDon Brace spin_lock_irqsave(&h->scan_lock, flags); 567887b9e6aaSDon Brace if (h->scan_waiting) { 567987b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 568087b9e6aaSDon Brace return; 568187b9e6aaSDon Brace } 568287b9e6aaSDon Brace 568387b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 568487b9e6aaSDon Brace 5685a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5686a08a8471SStephen M. Cameron while (1) { 5687a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5688a08a8471SStephen M. Cameron if (h->scan_finished) 5689a08a8471SStephen M. Cameron break; 569087b9e6aaSDon Brace h->scan_waiting = 1; 5691a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5692a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5693a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5694a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5695a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5696a08a8471SStephen M. Cameron * happen if we're in here. 5697a08a8471SStephen M. Cameron */ 5698a08a8471SStephen M. Cameron } 5699a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 570087b9e6aaSDon Brace h->scan_waiting = 0; 5701a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5702a08a8471SStephen M. Cameron 57038ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 57048ebc9248SWebb Scales return hpsa_scan_complete(h); 57055f389360SStephen M. Cameron 5706bfd7546cSDon Brace /* 5707bfd7546cSDon Brace * Do the scan after a reset completion 5708bfd7546cSDon Brace */ 5709c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5710bfd7546cSDon Brace if (h->reset_in_progress) { 5711bfd7546cSDon Brace h->drv_req_rescan = 1; 5712c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 57133b476aa2SDon Brace hpsa_scan_complete(h); 5714bfd7546cSDon Brace return; 5715bfd7546cSDon Brace } 5716c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5717bfd7546cSDon Brace 57188aa60681SDon Brace hpsa_update_scsi_devices(h); 5719a08a8471SStephen M. Cameron 57208ebc9248SWebb Scales hpsa_scan_complete(h); 5721a08a8471SStephen M. Cameron } 5722a08a8471SStephen M. Cameron 57237c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 57247c0a0229SDon Brace { 572503383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 572603383736SDon Brace 572703383736SDon Brace if (!logical_drive) 572803383736SDon Brace return -ENODEV; 57297c0a0229SDon Brace 57307c0a0229SDon Brace if (qdepth < 1) 57317c0a0229SDon Brace qdepth = 1; 573203383736SDon Brace else if (qdepth > logical_drive->queue_depth) 573303383736SDon Brace qdepth = logical_drive->queue_depth; 573403383736SDon Brace 573503383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 57367c0a0229SDon Brace } 57377c0a0229SDon Brace 5738a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5739a08a8471SStephen M. Cameron unsigned long elapsed_time) 5740a08a8471SStephen M. Cameron { 5741a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5742a08a8471SStephen M. Cameron unsigned long flags; 5743a08a8471SStephen M. Cameron int finished; 5744a08a8471SStephen M. Cameron 5745a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5746a08a8471SStephen M. Cameron finished = h->scan_finished; 5747a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5748a08a8471SStephen M. Cameron return finished; 5749a08a8471SStephen M. Cameron } 5750a08a8471SStephen M. Cameron 57512946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5752edd16368SStephen M. Cameron { 5753b705690dSStephen M. Cameron struct Scsi_Host *sh; 5754edd16368SStephen M. Cameron 5755b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 57562946e82bSRobert Elliott if (sh == NULL) { 57572946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 57582946e82bSRobert Elliott return -ENOMEM; 57592946e82bSRobert Elliott } 5760b705690dSStephen M. Cameron 5761b705690dSStephen M. Cameron sh->io_port = 0; 5762b705690dSStephen M. Cameron sh->n_io_port = 0; 5763b705690dSStephen M. Cameron sh->this_id = -1; 5764b705690dSStephen M. Cameron sh->max_channel = 3; 5765b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5766b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5767b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 576841ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5769d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5770b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5771d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5772b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5773bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5774b705690dSStephen M. Cameron sh->unique_id = sh->irq; 577564d513acSChristoph Hellwig 57762946e82bSRobert Elliott h->scsi_host = sh; 57772946e82bSRobert Elliott return 0; 57782946e82bSRobert Elliott } 57792946e82bSRobert Elliott 57802946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 57812946e82bSRobert Elliott { 57822946e82bSRobert Elliott int rv; 57832946e82bSRobert Elliott 57842946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 57852946e82bSRobert Elliott if (rv) { 57862946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 57872946e82bSRobert Elliott return rv; 57882946e82bSRobert Elliott } 57892946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 57902946e82bSRobert Elliott return 0; 5791edd16368SStephen M. Cameron } 5792edd16368SStephen M. Cameron 5793b69324ffSWebb Scales /* 579473153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 579573153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 579673153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 579773153fe5SWebb Scales * low-numbered entries for our own uses.) 579873153fe5SWebb Scales */ 579973153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 580073153fe5SWebb Scales { 580173153fe5SWebb Scales int idx = scmd->request->tag; 580273153fe5SWebb Scales 580373153fe5SWebb Scales if (idx < 0) 580473153fe5SWebb Scales return idx; 580573153fe5SWebb Scales 580673153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 580773153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 580873153fe5SWebb Scales } 580973153fe5SWebb Scales 581073153fe5SWebb Scales /* 5811b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5812b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5813b69324ffSWebb Scales */ 5814b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5815b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5816b69324ffSWebb Scales int reply_queue) 5817edd16368SStephen M. Cameron { 58188919358eSTomas Henzl int rc; 5819edd16368SStephen M. Cameron 5820a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5821a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5822a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5823c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 582425163bd5SWebb Scales if (rc) 5825b69324ffSWebb Scales return rc; 5826edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5827edd16368SStephen M. Cameron 5828b69324ffSWebb Scales /* Check if the unit is already ready. */ 5829edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5830b69324ffSWebb Scales return 0; 5831edd16368SStephen M. Cameron 5832b69324ffSWebb Scales /* 5833b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5834b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5835b69324ffSWebb Scales * looking for (but, success is good too). 5836b69324ffSWebb Scales */ 5837edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5838edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5839edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5840edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5841b69324ffSWebb Scales return 0; 5842b69324ffSWebb Scales 5843b69324ffSWebb Scales return 1; 5844b69324ffSWebb Scales } 5845b69324ffSWebb Scales 5846b69324ffSWebb Scales /* 5847b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5848b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5849b69324ffSWebb Scales */ 5850b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5851b69324ffSWebb Scales struct CommandList *c, 5852b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5853b69324ffSWebb Scales { 5854b69324ffSWebb Scales int rc; 5855b69324ffSWebb Scales int count = 0; 5856b69324ffSWebb Scales int waittime = 1; /* seconds */ 5857b69324ffSWebb Scales 5858b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5859b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5860b69324ffSWebb Scales 5861b69324ffSWebb Scales /* 5862b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5863b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5864b69324ffSWebb Scales */ 5865b69324ffSWebb Scales msleep(1000 * waittime); 5866b69324ffSWebb Scales 5867b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5868b69324ffSWebb Scales if (!rc) 5869edd16368SStephen M. Cameron break; 5870b69324ffSWebb Scales 5871b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5872b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5873b69324ffSWebb Scales waittime *= 2; 5874b69324ffSWebb Scales 5875b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5876b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5877b69324ffSWebb Scales waittime); 5878b69324ffSWebb Scales } 5879b69324ffSWebb Scales 5880b69324ffSWebb Scales return rc; 5881b69324ffSWebb Scales } 5882b69324ffSWebb Scales 5883b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5884b69324ffSWebb Scales unsigned char lunaddr[], 5885b69324ffSWebb Scales int reply_queue) 5886b69324ffSWebb Scales { 5887b69324ffSWebb Scales int first_queue; 5888b69324ffSWebb Scales int last_queue; 5889b69324ffSWebb Scales int rq; 5890b69324ffSWebb Scales int rc = 0; 5891b69324ffSWebb Scales struct CommandList *c; 5892b69324ffSWebb Scales 5893b69324ffSWebb Scales c = cmd_alloc(h); 5894b69324ffSWebb Scales 5895b69324ffSWebb Scales /* 5896b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5897b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5898b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5899b69324ffSWebb Scales */ 5900b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5901b69324ffSWebb Scales first_queue = 0; 5902b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5903b69324ffSWebb Scales } else { 5904b69324ffSWebb Scales first_queue = reply_queue; 5905b69324ffSWebb Scales last_queue = reply_queue; 5906b69324ffSWebb Scales } 5907b69324ffSWebb Scales 5908b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5909b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5910b69324ffSWebb Scales if (rc) 5911b69324ffSWebb Scales break; 5912edd16368SStephen M. Cameron } 5913edd16368SStephen M. Cameron 5914edd16368SStephen M. Cameron if (rc) 5915edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5916edd16368SStephen M. Cameron else 5917edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5918edd16368SStephen M. Cameron 591945fcb86eSStephen Cameron cmd_free(h, c); 5920edd16368SStephen M. Cameron return rc; 5921edd16368SStephen M. Cameron } 5922edd16368SStephen M. Cameron 5923edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5924edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5925edd16368SStephen M. Cameron */ 5926edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5927edd16368SStephen M. Cameron { 5928c59d04f3SDon Brace int rc = SUCCESS; 5929edd16368SStephen M. Cameron struct ctlr_info *h; 5930edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 59310b9b7b6eSScott Teel u8 reset_type; 59322dc127bbSDan Carpenter char msg[48]; 5933c59d04f3SDon Brace unsigned long flags; 5934edd16368SStephen M. Cameron 5935edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5936edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5937edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5938edd16368SStephen M. Cameron return FAILED; 5939e345893bSDon Brace 5940c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5941c59d04f3SDon Brace h->reset_in_progress = 1; 5942c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5943c59d04f3SDon Brace 5944c59d04f3SDon Brace if (lockup_detected(h)) { 5945c59d04f3SDon Brace rc = FAILED; 5946c59d04f3SDon Brace goto return_reset_status; 5947c59d04f3SDon Brace } 5948e345893bSDon Brace 5949edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5950edd16368SStephen M. Cameron if (!dev) { 5951d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5952c59d04f3SDon Brace rc = FAILED; 5953c59d04f3SDon Brace goto return_reset_status; 5954edd16368SStephen M. Cameron } 595525163bd5SWebb Scales 5956c59d04f3SDon Brace if (dev->devtype == TYPE_ENCLOSURE) { 5957c59d04f3SDon Brace rc = SUCCESS; 5958c59d04f3SDon Brace goto return_reset_status; 5959c59d04f3SDon Brace } 5960ef8a5203SDon Brace 596125163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 596225163bd5SWebb Scales if (lockup_detected(h)) { 59632dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 59642dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 596573153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 596673153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5967c59d04f3SDon Brace rc = FAILED; 5968c59d04f3SDon Brace goto return_reset_status; 596925163bd5SWebb Scales } 597025163bd5SWebb Scales 597125163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 597225163bd5SWebb Scales if (detect_controller_lockup(h)) { 59732dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 59742dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 597573153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 597673153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5977c59d04f3SDon Brace rc = FAILED; 5978c59d04f3SDon Brace goto return_reset_status; 597925163bd5SWebb Scales } 598025163bd5SWebb Scales 5981d604f533SWebb Scales /* Do not attempt on controller */ 5982c59d04f3SDon Brace if (is_hba_lunid(dev->scsi3addr)) { 5983c59d04f3SDon Brace rc = SUCCESS; 5984c59d04f3SDon Brace goto return_reset_status; 5985c59d04f3SDon Brace } 5986d604f533SWebb Scales 59870b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 59880b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 59890b9b7b6eSScott Teel else 59900b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 59910b9b7b6eSScott Teel 59920b9b7b6eSScott Teel sprintf(msg, "resetting %s", 59930b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 59940b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 599525163bd5SWebb Scales 5996edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 59970b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 599825163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 5999c59d04f3SDon Brace if (rc == 0) 6000c59d04f3SDon Brace rc = SUCCESS; 6001c59d04f3SDon Brace else 6002c59d04f3SDon Brace rc = FAILED; 6003c59d04f3SDon Brace 60040b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 60050b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 6006c59d04f3SDon Brace rc == SUCCESS ? "completed successfully" : "failed"); 6007d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6008c59d04f3SDon Brace 6009c59d04f3SDon Brace return_reset_status: 6010c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 6011da03ded0SDon Brace h->reset_in_progress = 0; 6012c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 6013c59d04f3SDon Brace return rc; 6014edd16368SStephen M. Cameron } 6015edd16368SStephen M. Cameron 6016edd16368SStephen M. Cameron /* 601773153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 601873153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 601973153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 602073153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 602173153fe5SWebb Scales */ 602273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 602373153fe5SWebb Scales struct scsi_cmnd *scmd) 602473153fe5SWebb Scales { 602573153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 602673153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 602773153fe5SWebb Scales 602873153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 602973153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 603073153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 603173153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 603273153fe5SWebb Scales * bounds, it's probably not our bug. 603373153fe5SWebb Scales */ 603473153fe5SWebb Scales BUG(); 603573153fe5SWebb Scales } 603673153fe5SWebb Scales 603773153fe5SWebb Scales atomic_inc(&c->refcount); 603873153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 603973153fe5SWebb Scales /* 604073153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 604173153fe5SWebb Scales * value. Thus, there should never be a collision here between 604273153fe5SWebb Scales * two requests...because if the selected command isn't idle 604373153fe5SWebb Scales * then someone is going to be very disappointed. 604473153fe5SWebb Scales */ 604573153fe5SWebb Scales dev_err(&h->pdev->dev, 604673153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 604773153fe5SWebb Scales idx); 604873153fe5SWebb Scales if (c->scsi_cmd != NULL) 604973153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 605073153fe5SWebb Scales scsi_print_command(scmd); 605173153fe5SWebb Scales } 605273153fe5SWebb Scales 605373153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 605473153fe5SWebb Scales return c; 605573153fe5SWebb Scales } 605673153fe5SWebb Scales 605773153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 605873153fe5SWebb Scales { 605973153fe5SWebb Scales /* 606073153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 606108ec46f6SDon Brace * else to free it, because it is accessed by index. 606273153fe5SWebb Scales */ 606373153fe5SWebb Scales (void)atomic_dec(&c->refcount); 606473153fe5SWebb Scales } 606573153fe5SWebb Scales 606673153fe5SWebb Scales /* 6067edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6068edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6069edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6070edd16368SStephen M. Cameron * cmd_free() is the complement. 6071bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6072bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6073edd16368SStephen M. Cameron */ 6074281a7fd0SWebb Scales 6075edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6076edd16368SStephen M. Cameron { 6077edd16368SStephen M. Cameron struct CommandList *c; 6078360c73bdSStephen Cameron int refcount, i; 607973153fe5SWebb Scales int offset = 0; 6080edd16368SStephen M. Cameron 608133811026SRobert Elliott /* 608233811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 60834c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 60844c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 60854c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 60864c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 60874c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 60884c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 60894c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 60904c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 609173153fe5SWebb Scales * 609273153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 609373153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 609473153fe5SWebb Scales * all works, since we have at least one command structure available; 609573153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 609673153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 609773153fe5SWebb Scales * layer will use the higher indexes. 60984c413128SStephen M. Cameron */ 60994c413128SStephen M. Cameron 6100281a7fd0SWebb Scales for (;;) { 610173153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 610273153fe5SWebb Scales HPSA_NRESERVED_CMDS, 610373153fe5SWebb Scales offset); 610473153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6105281a7fd0SWebb Scales offset = 0; 6106281a7fd0SWebb Scales continue; 6107281a7fd0SWebb Scales } 6108edd16368SStephen M. Cameron c = h->cmd_pool + i; 6109281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6110281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6111281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 611273153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6113281a7fd0SWebb Scales continue; 6114281a7fd0SWebb Scales } 6115281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6116281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6117281a7fd0SWebb Scales break; /* it's ours now. */ 6118281a7fd0SWebb Scales } 6119360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6120edd16368SStephen M. Cameron return c; 6121edd16368SStephen M. Cameron } 6122edd16368SStephen M. Cameron 612373153fe5SWebb Scales /* 612473153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 612573153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 612673153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 612773153fe5SWebb Scales * the clear-bit is harmless. 612873153fe5SWebb Scales */ 6129edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6130edd16368SStephen M. Cameron { 6131281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6132edd16368SStephen M. Cameron int i; 6133edd16368SStephen M. Cameron 6134edd16368SStephen M. Cameron i = c - h->cmd_pool; 6135edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6136edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6137edd16368SStephen M. Cameron } 6138281a7fd0SWebb Scales } 6139edd16368SStephen M. Cameron 6140edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6141edd16368SStephen M. Cameron 614242a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 614342a91641SDon Brace void __user *arg) 6144edd16368SStephen M. Cameron { 6145edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6146edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6147edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6148edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6149edd16368SStephen M. Cameron int err; 6150edd16368SStephen M. Cameron u32 cp; 6151edd16368SStephen M. Cameron 6152938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6153edd16368SStephen M. Cameron err = 0; 6154edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6155edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6156edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6157edd16368SStephen M. Cameron sizeof(arg64.Request)); 6158edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6159edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6160edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6161edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6162edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6163edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6164edd16368SStephen M. Cameron 6165edd16368SStephen M. Cameron if (err) 6166edd16368SStephen M. Cameron return -EFAULT; 6167edd16368SStephen M. Cameron 616842a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6169edd16368SStephen M. Cameron if (err) 6170edd16368SStephen M. Cameron return err; 6171edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6172edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6173edd16368SStephen M. Cameron if (err) 6174edd16368SStephen M. Cameron return -EFAULT; 6175edd16368SStephen M. Cameron return err; 6176edd16368SStephen M. Cameron } 6177edd16368SStephen M. Cameron 6178edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 617942a91641SDon Brace int cmd, void __user *arg) 6180edd16368SStephen M. Cameron { 6181edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6182edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6183edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6184edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6185edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6186edd16368SStephen M. Cameron int err; 6187edd16368SStephen M. Cameron u32 cp; 6188edd16368SStephen M. Cameron 6189938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6190edd16368SStephen M. Cameron err = 0; 6191edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6192edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6193edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6194edd16368SStephen M. Cameron sizeof(arg64.Request)); 6195edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6196edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6197edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6198edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6199edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6200edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6201edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6202edd16368SStephen M. Cameron 6203edd16368SStephen M. Cameron if (err) 6204edd16368SStephen M. Cameron return -EFAULT; 6205edd16368SStephen M. Cameron 620642a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6207edd16368SStephen M. Cameron if (err) 6208edd16368SStephen M. Cameron return err; 6209edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6210edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6211edd16368SStephen M. Cameron if (err) 6212edd16368SStephen M. Cameron return -EFAULT; 6213edd16368SStephen M. Cameron return err; 6214edd16368SStephen M. Cameron } 621571fe75a7SStephen M. Cameron 621642a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 621771fe75a7SStephen M. Cameron { 621871fe75a7SStephen M. Cameron switch (cmd) { 621971fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 622071fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 622171fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 622271fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 622371fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 622471fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 622571fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 622671fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 622771fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 622871fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 622971fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 623071fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 623171fe75a7SStephen M. Cameron case CCISS_REGNEWD: 623271fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 623371fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 623471fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 623571fe75a7SStephen M. Cameron 623671fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 623771fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 623871fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 623971fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 624071fe75a7SStephen M. Cameron 624171fe75a7SStephen M. Cameron default: 624271fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 624371fe75a7SStephen M. Cameron } 624471fe75a7SStephen M. Cameron } 6245edd16368SStephen M. Cameron #endif 6246edd16368SStephen M. Cameron 6247edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6248edd16368SStephen M. Cameron { 6249edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6250edd16368SStephen M. Cameron 6251edd16368SStephen M. Cameron if (!argp) 6252edd16368SStephen M. Cameron return -EINVAL; 6253edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6254edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6255edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6256edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6257edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6258edd16368SStephen M. Cameron return -EFAULT; 6259edd16368SStephen M. Cameron return 0; 6260edd16368SStephen M. Cameron } 6261edd16368SStephen M. Cameron 6262edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6263edd16368SStephen M. Cameron { 6264edd16368SStephen M. Cameron DriverVer_type DriverVer; 6265edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6266edd16368SStephen M. Cameron int rc; 6267edd16368SStephen M. Cameron 6268edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6269edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6270edd16368SStephen M. Cameron if (rc != 3) { 6271edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6272edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6273edd16368SStephen M. Cameron vmaj = 0; 6274edd16368SStephen M. Cameron vmin = 0; 6275edd16368SStephen M. Cameron vsubmin = 0; 6276edd16368SStephen M. Cameron } 6277edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6278edd16368SStephen M. Cameron if (!argp) 6279edd16368SStephen M. Cameron return -EINVAL; 6280edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6281edd16368SStephen M. Cameron return -EFAULT; 6282edd16368SStephen M. Cameron return 0; 6283edd16368SStephen M. Cameron } 6284edd16368SStephen M. Cameron 6285edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6286edd16368SStephen M. Cameron { 6287edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6288edd16368SStephen M. Cameron struct CommandList *c; 6289edd16368SStephen M. Cameron char *buff = NULL; 629050a0decfSStephen M. Cameron u64 temp64; 6291c1f63c8fSStephen M. Cameron int rc = 0; 6292edd16368SStephen M. Cameron 6293edd16368SStephen M. Cameron if (!argp) 6294edd16368SStephen M. Cameron return -EINVAL; 6295edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6296edd16368SStephen M. Cameron return -EPERM; 6297edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6298edd16368SStephen M. Cameron return -EFAULT; 6299edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6300edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6301edd16368SStephen M. Cameron return -EINVAL; 6302edd16368SStephen M. Cameron } 6303edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6304edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6305edd16368SStephen M. Cameron if (buff == NULL) 63062dd02d74SRobert Elliott return -ENOMEM; 63079233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6308edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6309b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6310b03a7771SStephen M. Cameron iocommand.buf_size)) { 6311c1f63c8fSStephen M. Cameron rc = -EFAULT; 6312c1f63c8fSStephen M. Cameron goto out_kfree; 6313edd16368SStephen M. Cameron } 6314b03a7771SStephen M. Cameron } else { 6315edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6316b03a7771SStephen M. Cameron } 6317b03a7771SStephen M. Cameron } 631845fcb86eSStephen Cameron c = cmd_alloc(h); 6319bf43caf3SRobert Elliott 6320edd16368SStephen M. Cameron /* Fill in the command type */ 6321edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6322a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6323edd16368SStephen M. Cameron /* Fill in Command Header */ 6324edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6325edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6326edd16368SStephen M. Cameron c->Header.SGList = 1; 632750a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6328edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6329edd16368SStephen M. Cameron c->Header.SGList = 0; 633050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6331edd16368SStephen M. Cameron } 6332edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6333edd16368SStephen M. Cameron 6334edd16368SStephen M. Cameron /* Fill in Request block */ 6335edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6336edd16368SStephen M. Cameron sizeof(c->Request)); 6337edd16368SStephen M. Cameron 6338edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6339edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 634050a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6341edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 634250a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 634350a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 634450a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6345bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6346bcc48ffaSStephen M. Cameron goto out; 6347bcc48ffaSStephen M. Cameron } 634850a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 634950a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 635050a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6351edd16368SStephen M. Cameron } 6352c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 63533fb134cbSDon Brace NO_TIMEOUT); 6354c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6355edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6356edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 635725163bd5SWebb Scales if (rc) { 635825163bd5SWebb Scales rc = -EIO; 635925163bd5SWebb Scales goto out; 636025163bd5SWebb Scales } 6361edd16368SStephen M. Cameron 6362edd16368SStephen M. Cameron /* Copy the error information out */ 6363edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6364edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6365edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6366c1f63c8fSStephen M. Cameron rc = -EFAULT; 6367c1f63c8fSStephen M. Cameron goto out; 6368edd16368SStephen M. Cameron } 63699233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6370b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6371edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6372edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6373c1f63c8fSStephen M. Cameron rc = -EFAULT; 6374c1f63c8fSStephen M. Cameron goto out; 6375edd16368SStephen M. Cameron } 6376edd16368SStephen M. Cameron } 6377c1f63c8fSStephen M. Cameron out: 637845fcb86eSStephen Cameron cmd_free(h, c); 6379c1f63c8fSStephen M. Cameron out_kfree: 6380c1f63c8fSStephen M. Cameron kfree(buff); 6381c1f63c8fSStephen M. Cameron return rc; 6382edd16368SStephen M. Cameron } 6383edd16368SStephen M. Cameron 6384edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6385edd16368SStephen M. Cameron { 6386edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6387edd16368SStephen M. Cameron struct CommandList *c; 6388edd16368SStephen M. Cameron unsigned char **buff = NULL; 6389edd16368SStephen M. Cameron int *buff_size = NULL; 639050a0decfSStephen M. Cameron u64 temp64; 6391edd16368SStephen M. Cameron BYTE sg_used = 0; 6392edd16368SStephen M. Cameron int status = 0; 639301a02ffcSStephen M. Cameron u32 left; 639401a02ffcSStephen M. Cameron u32 sz; 6395edd16368SStephen M. Cameron BYTE __user *data_ptr; 6396edd16368SStephen M. Cameron 6397edd16368SStephen M. Cameron if (!argp) 6398edd16368SStephen M. Cameron return -EINVAL; 6399edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6400edd16368SStephen M. Cameron return -EPERM; 640119be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6402edd16368SStephen M. Cameron if (!ioc) { 6403edd16368SStephen M. Cameron status = -ENOMEM; 6404edd16368SStephen M. Cameron goto cleanup1; 6405edd16368SStephen M. Cameron } 6406edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6407edd16368SStephen M. Cameron status = -EFAULT; 6408edd16368SStephen M. Cameron goto cleanup1; 6409edd16368SStephen M. Cameron } 6410edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6411edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6412edd16368SStephen M. Cameron status = -EINVAL; 6413edd16368SStephen M. Cameron goto cleanup1; 6414edd16368SStephen M. Cameron } 6415edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6416edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6417edd16368SStephen M. Cameron status = -EINVAL; 6418edd16368SStephen M. Cameron goto cleanup1; 6419edd16368SStephen M. Cameron } 6420d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6421edd16368SStephen M. Cameron status = -EINVAL; 6422edd16368SStephen M. Cameron goto cleanup1; 6423edd16368SStephen M. Cameron } 6424d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6425edd16368SStephen M. Cameron if (!buff) { 6426edd16368SStephen M. Cameron status = -ENOMEM; 6427edd16368SStephen M. Cameron goto cleanup1; 6428edd16368SStephen M. Cameron } 6429d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6430edd16368SStephen M. Cameron if (!buff_size) { 6431edd16368SStephen M. Cameron status = -ENOMEM; 6432edd16368SStephen M. Cameron goto cleanup1; 6433edd16368SStephen M. Cameron } 6434edd16368SStephen M. Cameron left = ioc->buf_size; 6435edd16368SStephen M. Cameron data_ptr = ioc->buf; 6436edd16368SStephen M. Cameron while (left) { 6437edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6438edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6439edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6440edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6441edd16368SStephen M. Cameron status = -ENOMEM; 6442edd16368SStephen M. Cameron goto cleanup1; 6443edd16368SStephen M. Cameron } 64449233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6445edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 64460758f4f7SStephen M. Cameron status = -EFAULT; 6447edd16368SStephen M. Cameron goto cleanup1; 6448edd16368SStephen M. Cameron } 6449edd16368SStephen M. Cameron } else 6450edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6451edd16368SStephen M. Cameron left -= sz; 6452edd16368SStephen M. Cameron data_ptr += sz; 6453edd16368SStephen M. Cameron sg_used++; 6454edd16368SStephen M. Cameron } 645545fcb86eSStephen Cameron c = cmd_alloc(h); 6456bf43caf3SRobert Elliott 6457edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6458a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6459edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 646050a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 646150a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6462edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6463edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6464edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6465edd16368SStephen M. Cameron int i; 6466edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 646750a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6468edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 646950a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 647050a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 647150a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 647250a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6473bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6474bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6475bcc48ffaSStephen M. Cameron status = -ENOMEM; 6476e2d4a1f6SStephen M. Cameron goto cleanup0; 6477bcc48ffaSStephen M. Cameron } 647850a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 647950a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 648050a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6481edd16368SStephen M. Cameron } 648250a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6483edd16368SStephen M. Cameron } 6484c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 64853fb134cbSDon Brace NO_TIMEOUT); 6486b03a7771SStephen M. Cameron if (sg_used) 6487edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6488edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 648925163bd5SWebb Scales if (status) { 649025163bd5SWebb Scales status = -EIO; 649125163bd5SWebb Scales goto cleanup0; 649225163bd5SWebb Scales } 649325163bd5SWebb Scales 6494edd16368SStephen M. Cameron /* Copy the error information out */ 6495edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6496edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6497edd16368SStephen M. Cameron status = -EFAULT; 6498e2d4a1f6SStephen M. Cameron goto cleanup0; 6499edd16368SStephen M. Cameron } 65009233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 65012b08b3e9SDon Brace int i; 65022b08b3e9SDon Brace 6503edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6504edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6505edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6506edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6507edd16368SStephen M. Cameron status = -EFAULT; 6508e2d4a1f6SStephen M. Cameron goto cleanup0; 6509edd16368SStephen M. Cameron } 6510edd16368SStephen M. Cameron ptr += buff_size[i]; 6511edd16368SStephen M. Cameron } 6512edd16368SStephen M. Cameron } 6513edd16368SStephen M. Cameron status = 0; 6514e2d4a1f6SStephen M. Cameron cleanup0: 651545fcb86eSStephen Cameron cmd_free(h, c); 6516edd16368SStephen M. Cameron cleanup1: 6517edd16368SStephen M. Cameron if (buff) { 65182b08b3e9SDon Brace int i; 65192b08b3e9SDon Brace 6520edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6521edd16368SStephen M. Cameron kfree(buff[i]); 6522edd16368SStephen M. Cameron kfree(buff); 6523edd16368SStephen M. Cameron } 6524edd16368SStephen M. Cameron kfree(buff_size); 6525edd16368SStephen M. Cameron kfree(ioc); 6526edd16368SStephen M. Cameron return status; 6527edd16368SStephen M. Cameron } 6528edd16368SStephen M. Cameron 6529edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6530edd16368SStephen M. Cameron struct CommandList *c) 6531edd16368SStephen M. Cameron { 6532edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6533edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6534edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6535edd16368SStephen M. Cameron } 65360390f0c0SStephen M. Cameron 6537edd16368SStephen M. Cameron /* 6538edd16368SStephen M. Cameron * ioctl 6539edd16368SStephen M. Cameron */ 654042a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6541edd16368SStephen M. Cameron { 6542edd16368SStephen M. Cameron struct ctlr_info *h; 6543edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 65440390f0c0SStephen M. Cameron int rc; 6545edd16368SStephen M. Cameron 6546edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6547edd16368SStephen M. Cameron 6548edd16368SStephen M. Cameron switch (cmd) { 6549edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6550edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6551edd16368SStephen M. Cameron case CCISS_REGNEWD: 6552a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6553edd16368SStephen M. Cameron return 0; 6554edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6555edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6556edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6557edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6558edd16368SStephen M. Cameron case CCISS_PASSTHRU: 655934f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 65600390f0c0SStephen M. Cameron return -EAGAIN; 65610390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 656234f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 65630390f0c0SStephen M. Cameron return rc; 6564edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 656534f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 65660390f0c0SStephen M. Cameron return -EAGAIN; 65670390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 656834f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 65690390f0c0SStephen M. Cameron return rc; 6570edd16368SStephen M. Cameron default: 6571edd16368SStephen M. Cameron return -ENOTTY; 6572edd16368SStephen M. Cameron } 6573edd16368SStephen M. Cameron } 6574edd16368SStephen M. Cameron 6575bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 65766f039790SGreg Kroah-Hartman u8 reset_type) 657764670ac8SStephen M. Cameron { 657864670ac8SStephen M. Cameron struct CommandList *c; 657964670ac8SStephen M. Cameron 658064670ac8SStephen M. Cameron c = cmd_alloc(h); 6581bf43caf3SRobert Elliott 6582a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6583a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 658464670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 658564670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 658664670ac8SStephen M. Cameron c->waiting = NULL; 658764670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 658864670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 658964670ac8SStephen M. Cameron * the command either. This is the last command we will send before 659064670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 659164670ac8SStephen M. Cameron */ 6592bf43caf3SRobert Elliott return; 659364670ac8SStephen M. Cameron } 659464670ac8SStephen M. Cameron 6595a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6596b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6597edd16368SStephen M. Cameron int cmd_type) 6598edd16368SStephen M. Cameron { 6599edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 6600edd16368SStephen M. Cameron 6601edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6602a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6603edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6604edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6605edd16368SStephen M. Cameron c->Header.SGList = 1; 660650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6607edd16368SStephen M. Cameron } else { 6608edd16368SStephen M. Cameron c->Header.SGList = 0; 660950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6610edd16368SStephen M. Cameron } 6611edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6612edd16368SStephen M. Cameron 6613edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6614edd16368SStephen M. Cameron switch (cmd) { 6615edd16368SStephen M. Cameron case HPSA_INQUIRY: 6616edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6617b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6618edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6619b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6620edd16368SStephen M. Cameron } 6621edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6622a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6623a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6624edd16368SStephen M. Cameron c->Request.Timeout = 0; 6625edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6626edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6627edd16368SStephen M. Cameron break; 6628*0a7c3bb8SDon Brace case RECEIVE_DIAGNOSTIC: 6629*0a7c3bb8SDon Brace c->Request.CDBLen = 6; 6630*0a7c3bb8SDon Brace c->Request.type_attr_dir = 6631*0a7c3bb8SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6632*0a7c3bb8SDon Brace c->Request.Timeout = 0; 6633*0a7c3bb8SDon Brace c->Request.CDB[0] = cmd; 6634*0a7c3bb8SDon Brace c->Request.CDB[1] = 1; 6635*0a7c3bb8SDon Brace c->Request.CDB[2] = 1; 6636*0a7c3bb8SDon Brace c->Request.CDB[3] = (size >> 8) & 0xFF; 6637*0a7c3bb8SDon Brace c->Request.CDB[4] = size & 0xFF; 6638*0a7c3bb8SDon Brace break; 6639edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6640edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6641edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6642edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6643edd16368SStephen M. Cameron */ 6644edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6645a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6646a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6647edd16368SStephen M. Cameron c->Request.Timeout = 0; 6648edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6649edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6650edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6651edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6652edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6653edd16368SStephen M. Cameron break; 6654c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6655c2adae44SScott Teel c->Request.CDBLen = 16; 6656c2adae44SScott Teel c->Request.type_attr_dir = 6657c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6658c2adae44SScott Teel c->Request.Timeout = 0; 6659c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6660c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6661c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6662c2adae44SScott Teel break; 6663c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6664c2adae44SScott Teel c->Request.CDBLen = 16; 6665c2adae44SScott Teel c->Request.type_attr_dir = 6666c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6667c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6668c2adae44SScott Teel c->Request.Timeout = 0; 6669c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6670c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6671c2adae44SScott Teel break; 6672edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6673edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6674a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6675a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6676a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6677edd16368SStephen M. Cameron c->Request.Timeout = 0; 6678edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6679edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6680bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6681bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6682edd16368SStephen M. Cameron break; 6683edd16368SStephen M. Cameron case TEST_UNIT_READY: 6684edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6685a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6686a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6687edd16368SStephen M. Cameron c->Request.Timeout = 0; 6688edd16368SStephen M. Cameron break; 6689283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6690283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6691a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6692a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6693283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6694283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6695283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6696283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6697283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6698283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6699283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6700283b4a9bSStephen M. Cameron break; 6701316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6702316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6703a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6704a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6705316b221aSStephen M. Cameron c->Request.Timeout = 0; 6706316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6707316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6708316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6709316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6710316b221aSStephen M. Cameron break; 671103383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 671203383736SDon Brace c->Request.CDBLen = 10; 671303383736SDon Brace c->Request.type_attr_dir = 671403383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 671503383736SDon Brace c->Request.Timeout = 0; 671603383736SDon Brace c->Request.CDB[0] = BMIC_READ; 671703383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 671803383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 671903383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 672003383736SDon Brace break; 6721d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6722d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6723d04e62b9SKevin Barnett c->Request.type_attr_dir = 6724d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6725d04e62b9SKevin Barnett c->Request.Timeout = 0; 6726d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6727d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6728d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6729d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6730d04e62b9SKevin Barnett break; 6731cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6732cca8f13bSDon Brace c->Request.CDBLen = 10; 6733cca8f13bSDon Brace c->Request.type_attr_dir = 6734cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6735cca8f13bSDon Brace c->Request.Timeout = 0; 6736cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6737cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6738cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6739cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6740cca8f13bSDon Brace break; 674166749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 674266749d0dSScott Teel c->Request.CDBLen = 10; 674366749d0dSScott Teel c->Request.type_attr_dir = 674466749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 674566749d0dSScott Teel c->Request.Timeout = 0; 674666749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 674766749d0dSScott Teel c->Request.CDB[1] = 0; 674866749d0dSScott Teel c->Request.CDB[2] = 0; 674966749d0dSScott Teel c->Request.CDB[3] = 0; 675066749d0dSScott Teel c->Request.CDB[4] = 0; 675166749d0dSScott Teel c->Request.CDB[5] = 0; 675266749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 675366749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 675466749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 675566749d0dSScott Teel c->Request.CDB[9] = 0; 675666749d0dSScott Teel break; 6757edd16368SStephen M. Cameron default: 6758edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6759edd16368SStephen M. Cameron BUG(); 6760edd16368SStephen M. Cameron } 6761edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6762edd16368SStephen M. Cameron switch (cmd) { 6763edd16368SStephen M. Cameron 67640b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 67650b9b7b6eSScott Teel c->Request.CDBLen = 16; 67660b9b7b6eSScott Teel c->Request.type_attr_dir = 67670b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 67680b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 67690b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 67700b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 67710b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 67720b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 67730b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 67740b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 67750b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 67760b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 67770b9b7b6eSScott Teel break; 6778edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6779edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6780a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6781a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6782edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 678364670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 678464670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 678521e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6786edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6787edd16368SStephen M. Cameron /* LunID device */ 6788edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6789edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6790edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6791edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6792edd16368SStephen M. Cameron break; 6793edd16368SStephen M. Cameron default: 6794edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6795edd16368SStephen M. Cameron cmd); 6796edd16368SStephen M. Cameron BUG(); 6797edd16368SStephen M. Cameron } 6798edd16368SStephen M. Cameron } else { 6799edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6800edd16368SStephen M. Cameron BUG(); 6801edd16368SStephen M. Cameron } 6802edd16368SStephen M. Cameron 6803a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6804edd16368SStephen M. Cameron case XFER_READ: 6805edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6806edd16368SStephen M. Cameron break; 6807edd16368SStephen M. Cameron case XFER_WRITE: 6808edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6809edd16368SStephen M. Cameron break; 6810edd16368SStephen M. Cameron case XFER_NONE: 6811edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6812edd16368SStephen M. Cameron break; 6813edd16368SStephen M. Cameron default: 6814edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6815edd16368SStephen M. Cameron } 6816a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6817a2dac136SStephen M. Cameron return -1; 6818a2dac136SStephen M. Cameron return 0; 6819edd16368SStephen M. Cameron } 6820edd16368SStephen M. Cameron 6821edd16368SStephen M. Cameron /* 6822edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6823edd16368SStephen M. Cameron */ 6824edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6825edd16368SStephen M. Cameron { 6826edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6827edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6828088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6829088ba34cSStephen M. Cameron page_offs + size); 6830edd16368SStephen M. Cameron 6831edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6832edd16368SStephen M. Cameron } 6833edd16368SStephen M. Cameron 6834254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6835edd16368SStephen M. Cameron { 6836254f796bSMatt Gates return h->access.command_completed(h, q); 6837edd16368SStephen M. Cameron } 6838edd16368SStephen M. Cameron 6839900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6840edd16368SStephen M. Cameron { 6841edd16368SStephen M. Cameron return h->access.intr_pending(h); 6842edd16368SStephen M. Cameron } 6843edd16368SStephen M. Cameron 6844edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6845edd16368SStephen M. Cameron { 684610f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 684710f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6848edd16368SStephen M. Cameron } 6849edd16368SStephen M. Cameron 685001a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 685101a02ffcSStephen M. Cameron u32 raw_tag) 6852edd16368SStephen M. Cameron { 6853edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6854edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6855edd16368SStephen M. Cameron return 1; 6856edd16368SStephen M. Cameron } 6857edd16368SStephen M. Cameron return 0; 6858edd16368SStephen M. Cameron } 6859edd16368SStephen M. Cameron 68605a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6861edd16368SStephen M. Cameron { 6862e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6863c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6864c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 68651fb011fbSStephen M. Cameron complete_scsi_command(c); 68668be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6867edd16368SStephen M. Cameron complete(c->waiting); 6868a104c99fSStephen M. Cameron } 6869a104c99fSStephen M. Cameron 6870303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 68711d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6872303932fdSDon Brace u32 raw_tag) 6873303932fdSDon Brace { 6874303932fdSDon Brace u32 tag_index; 6875303932fdSDon Brace struct CommandList *c; 6876303932fdSDon Brace 6877f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 68781d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6879303932fdSDon Brace c = h->cmd_pool + tag_index; 68805a3d16f5SStephen M. Cameron finish_cmd(c); 68811d94f94dSStephen M. Cameron } 6882303932fdSDon Brace } 6883303932fdSDon Brace 688464670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 688564670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 688664670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 688764670ac8SStephen M. Cameron * functions. 688864670ac8SStephen M. Cameron */ 688964670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 689064670ac8SStephen M. Cameron { 689164670ac8SStephen M. Cameron if (likely(!reset_devices)) 689264670ac8SStephen M. Cameron return 0; 689364670ac8SStephen M. Cameron 689464670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 689564670ac8SStephen M. Cameron return 0; 689664670ac8SStephen M. Cameron 689764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 689864670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 689964670ac8SStephen M. Cameron 690064670ac8SStephen M. Cameron return 1; 690164670ac8SStephen M. Cameron } 690264670ac8SStephen M. Cameron 6903254f796bSMatt Gates /* 6904254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6905254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6906254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6907254f796bSMatt Gates */ 6908254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 690964670ac8SStephen M. Cameron { 6910254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6911254f796bSMatt Gates } 6912254f796bSMatt Gates 6913254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6914254f796bSMatt Gates { 6915254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6916254f796bSMatt Gates u8 q = *(u8 *) queue; 691764670ac8SStephen M. Cameron u32 raw_tag; 691864670ac8SStephen M. Cameron 691964670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 692064670ac8SStephen M. Cameron return IRQ_NONE; 692164670ac8SStephen M. Cameron 692264670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 692364670ac8SStephen M. Cameron return IRQ_NONE; 6924a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 692564670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6926254f796bSMatt Gates raw_tag = get_next_completion(h, q); 692764670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6928254f796bSMatt Gates raw_tag = next_command(h, q); 692964670ac8SStephen M. Cameron } 693064670ac8SStephen M. Cameron return IRQ_HANDLED; 693164670ac8SStephen M. Cameron } 693264670ac8SStephen M. Cameron 6933254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 693464670ac8SStephen M. Cameron { 6935254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 693664670ac8SStephen M. Cameron u32 raw_tag; 6937254f796bSMatt Gates u8 q = *(u8 *) queue; 693864670ac8SStephen M. Cameron 693964670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 694064670ac8SStephen M. Cameron return IRQ_NONE; 694164670ac8SStephen M. Cameron 6942a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6943254f796bSMatt Gates raw_tag = get_next_completion(h, q); 694464670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6945254f796bSMatt Gates raw_tag = next_command(h, q); 694664670ac8SStephen M. Cameron return IRQ_HANDLED; 694764670ac8SStephen M. Cameron } 694864670ac8SStephen M. Cameron 6949254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6950edd16368SStephen M. Cameron { 6951254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6952303932fdSDon Brace u32 raw_tag; 6953254f796bSMatt Gates u8 q = *(u8 *) queue; 6954edd16368SStephen M. Cameron 6955edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6956edd16368SStephen M. Cameron return IRQ_NONE; 6957a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 695810f66018SStephen M. Cameron while (interrupt_pending(h)) { 6959254f796bSMatt Gates raw_tag = get_next_completion(h, q); 696010f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 69611d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6962254f796bSMatt Gates raw_tag = next_command(h, q); 696310f66018SStephen M. Cameron } 696410f66018SStephen M. Cameron } 696510f66018SStephen M. Cameron return IRQ_HANDLED; 696610f66018SStephen M. Cameron } 696710f66018SStephen M. Cameron 6968254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 696910f66018SStephen M. Cameron { 6970254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 697110f66018SStephen M. Cameron u32 raw_tag; 6972254f796bSMatt Gates u8 q = *(u8 *) queue; 697310f66018SStephen M. Cameron 6974a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6975254f796bSMatt Gates raw_tag = get_next_completion(h, q); 6976303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 69771d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6978254f796bSMatt Gates raw_tag = next_command(h, q); 6979edd16368SStephen M. Cameron } 6980edd16368SStephen M. Cameron return IRQ_HANDLED; 6981edd16368SStephen M. Cameron } 6982edd16368SStephen M. Cameron 6983a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 6984a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 6985a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 6986a9a3a273SStephen M. Cameron */ 69876f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6988edd16368SStephen M. Cameron unsigned char type) 6989edd16368SStephen M. Cameron { 6990edd16368SStephen M. Cameron struct Command { 6991edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 6992edd16368SStephen M. Cameron struct RequestBlock Request; 6993edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 6994edd16368SStephen M. Cameron }; 6995edd16368SStephen M. Cameron struct Command *cmd; 6996edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 6997edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 6998edd16368SStephen M. Cameron dma_addr_t paddr64; 69992b08b3e9SDon Brace __le32 paddr32; 70002b08b3e9SDon Brace u32 tag; 7001edd16368SStephen M. Cameron void __iomem *vaddr; 7002edd16368SStephen M. Cameron int i, err; 7003edd16368SStephen M. Cameron 7004edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7005edd16368SStephen M. Cameron if (vaddr == NULL) 7006edd16368SStephen M. Cameron return -ENOMEM; 7007edd16368SStephen M. Cameron 7008edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7009edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7010edd16368SStephen M. Cameron * memory. 7011edd16368SStephen M. Cameron */ 7012edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7013edd16368SStephen M. Cameron if (err) { 7014edd16368SStephen M. Cameron iounmap(vaddr); 70151eaec8f3SRobert Elliott return err; 7016edd16368SStephen M. Cameron } 7017edd16368SStephen M. Cameron 7018edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7019edd16368SStephen M. Cameron if (cmd == NULL) { 7020edd16368SStephen M. Cameron iounmap(vaddr); 7021edd16368SStephen M. Cameron return -ENOMEM; 7022edd16368SStephen M. Cameron } 7023edd16368SStephen M. Cameron 7024edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7025edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7026edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7027edd16368SStephen M. Cameron */ 70282b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7029edd16368SStephen M. Cameron 7030edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7031edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 703250a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 70332b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7034edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7035edd16368SStephen M. Cameron 7036edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7037a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7038a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7039edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7040edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7041edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7042edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 704350a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 70442b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 704550a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7046edd16368SStephen M. Cameron 70472b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7048edd16368SStephen M. Cameron 7049edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7050edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 70512b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7052edd16368SStephen M. Cameron break; 7053edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7054edd16368SStephen M. Cameron } 7055edd16368SStephen M. Cameron 7056edd16368SStephen M. Cameron iounmap(vaddr); 7057edd16368SStephen M. Cameron 7058edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7059edd16368SStephen M. Cameron * still complete the command. 7060edd16368SStephen M. Cameron */ 7061edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7062edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7063edd16368SStephen M. Cameron opcode, type); 7064edd16368SStephen M. Cameron return -ETIMEDOUT; 7065edd16368SStephen M. Cameron } 7066edd16368SStephen M. Cameron 7067edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7068edd16368SStephen M. Cameron 7069edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7070edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7071edd16368SStephen M. Cameron opcode, type); 7072edd16368SStephen M. Cameron return -EIO; 7073edd16368SStephen M. Cameron } 7074edd16368SStephen M. Cameron 7075edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7076edd16368SStephen M. Cameron opcode, type); 7077edd16368SStephen M. Cameron return 0; 7078edd16368SStephen M. Cameron } 7079edd16368SStephen M. Cameron 7080edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7081edd16368SStephen M. Cameron 70821df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 708342a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7084edd16368SStephen M. Cameron { 7085edd16368SStephen M. Cameron 70861df8552aSStephen M. Cameron if (use_doorbell) { 70871df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 70881df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 70891df8552aSStephen M. Cameron * other way using the doorbell register. 7090edd16368SStephen M. Cameron */ 70911df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7092cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 709385009239SStephen M. Cameron 709400701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 709585009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 709685009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 709785009239SStephen M. Cameron * over in some weird corner cases. 709885009239SStephen M. Cameron */ 709900701a96SJustin Lindley msleep(10000); 71001df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7101edd16368SStephen M. Cameron 7102edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7103edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7104edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7105edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 71061df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 71071df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 71081df8552aSStephen M. Cameron * controller." */ 7109edd16368SStephen M. Cameron 71102662cab8SDon Brace int rc = 0; 71112662cab8SDon Brace 71121df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 71132662cab8SDon Brace 7114edd16368SStephen M. Cameron /* enter the D3hot power management state */ 71152662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 71162662cab8SDon Brace if (rc) 71172662cab8SDon Brace return rc; 7118edd16368SStephen M. Cameron 7119edd16368SStephen M. Cameron msleep(500); 7120edd16368SStephen M. Cameron 7121edd16368SStephen M. Cameron /* enter the D0 power management state */ 71222662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 71232662cab8SDon Brace if (rc) 71242662cab8SDon Brace return rc; 7125c4853efeSMike Miller 7126c4853efeSMike Miller /* 7127c4853efeSMike Miller * The P600 requires a small delay when changing states. 7128c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7129c4853efeSMike Miller * This for kdump only and is particular to the P600. 7130c4853efeSMike Miller */ 7131c4853efeSMike Miller msleep(500); 71321df8552aSStephen M. Cameron } 71331df8552aSStephen M. Cameron return 0; 71341df8552aSStephen M. Cameron } 71351df8552aSStephen M. Cameron 71366f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7137580ada3cSStephen M. Cameron { 7138580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7139f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7140580ada3cSStephen M. Cameron } 7141580ada3cSStephen M. Cameron 71426f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7143580ada3cSStephen M. Cameron { 7144580ada3cSStephen M. Cameron char *driver_version; 7145580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7146580ada3cSStephen M. Cameron 7147580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7148580ada3cSStephen M. Cameron if (!driver_version) 7149580ada3cSStephen M. Cameron return -ENOMEM; 7150580ada3cSStephen M. Cameron 7151580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7152580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7153580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7154580ada3cSStephen M. Cameron kfree(driver_version); 7155580ada3cSStephen M. Cameron return 0; 7156580ada3cSStephen M. Cameron } 7157580ada3cSStephen M. Cameron 71586f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 71596f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7160580ada3cSStephen M. Cameron { 7161580ada3cSStephen M. Cameron int i; 7162580ada3cSStephen M. Cameron 7163580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7164580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7165580ada3cSStephen M. Cameron } 7166580ada3cSStephen M. Cameron 71676f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7168580ada3cSStephen M. Cameron { 7169580ada3cSStephen M. Cameron 7170580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7171580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7172580ada3cSStephen M. Cameron 7173580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7174580ada3cSStephen M. Cameron if (!old_driver_ver) 7175580ada3cSStephen M. Cameron return -ENOMEM; 7176580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7177580ada3cSStephen M. Cameron 7178580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7179580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7180580ada3cSStephen M. Cameron */ 7181580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7182580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7183580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7184580ada3cSStephen M. Cameron kfree(old_driver_ver); 7185580ada3cSStephen M. Cameron return rc; 7186580ada3cSStephen M. Cameron } 71871df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 71881df8552aSStephen M. Cameron * states or the using the doorbell register. 71891df8552aSStephen M. Cameron */ 71906b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 71911df8552aSStephen M. Cameron { 71921df8552aSStephen M. Cameron u64 cfg_offset; 71931df8552aSStephen M. Cameron u32 cfg_base_addr; 71941df8552aSStephen M. Cameron u64 cfg_base_addr_index; 71951df8552aSStephen M. Cameron void __iomem *vaddr; 71961df8552aSStephen M. Cameron unsigned long paddr; 7197580ada3cSStephen M. Cameron u32 misc_fw_support; 7198270d05deSStephen M. Cameron int rc; 71991df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7200cf0b08d0SStephen M. Cameron u32 use_doorbell; 7201270d05deSStephen M. Cameron u16 command_register; 72021df8552aSStephen M. Cameron 72031df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 72041df8552aSStephen M. Cameron * the same thing as 72051df8552aSStephen M. Cameron * 72061df8552aSStephen M. Cameron * pci_save_state(pci_dev); 72071df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 72081df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 72091df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 72101df8552aSStephen M. Cameron * 72111df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 72121df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 72131df8552aSStephen M. Cameron * using the doorbell register. 72141df8552aSStephen M. Cameron */ 721518867659SStephen M. Cameron 721660f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 721760f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 721825c1e56aSStephen M. Cameron return -ENODEV; 721925c1e56aSStephen M. Cameron } 722046380786SStephen M. Cameron 722146380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 722246380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 722346380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 722418867659SStephen M. Cameron 7225270d05deSStephen M. Cameron /* Save the PCI command register */ 7226270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7227270d05deSStephen M. Cameron pci_save_state(pdev); 72281df8552aSStephen M. Cameron 72291df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 72301df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 72311df8552aSStephen M. Cameron if (rc) 72321df8552aSStephen M. Cameron return rc; 72331df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 72341df8552aSStephen M. Cameron if (!vaddr) 72351df8552aSStephen M. Cameron return -ENOMEM; 72361df8552aSStephen M. Cameron 72371df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 72381df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 72391df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 72401df8552aSStephen M. Cameron if (rc) 72411df8552aSStephen M. Cameron goto unmap_vaddr; 72421df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 72431df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 72441df8552aSStephen M. Cameron if (!cfgtable) { 72451df8552aSStephen M. Cameron rc = -ENOMEM; 72461df8552aSStephen M. Cameron goto unmap_vaddr; 72471df8552aSStephen M. Cameron } 7248580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7249580ada3cSStephen M. Cameron if (rc) 725003741d95STomas Henzl goto unmap_cfgtable; 72511df8552aSStephen M. Cameron 7252cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7253cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7254cf0b08d0SStephen M. Cameron */ 72551df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7256cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7257cf0b08d0SStephen M. Cameron if (use_doorbell) { 7258cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7259cf0b08d0SStephen M. Cameron } else { 72601df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7261cf0b08d0SStephen M. Cameron if (use_doorbell) { 7262050f7147SStephen Cameron dev_warn(&pdev->dev, 7263050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 726464670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7265cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7266cf0b08d0SStephen M. Cameron } 7267cf0b08d0SStephen M. Cameron } 72681df8552aSStephen M. Cameron 72691df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 72701df8552aSStephen M. Cameron if (rc) 72711df8552aSStephen M. Cameron goto unmap_cfgtable; 7272edd16368SStephen M. Cameron 7273270d05deSStephen M. Cameron pci_restore_state(pdev); 7274270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7275edd16368SStephen M. Cameron 72761df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 72771df8552aSStephen M. Cameron need a little pause here */ 72781df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 72791df8552aSStephen M. Cameron 7280fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7281fe5389c8SStephen M. Cameron if (rc) { 7282fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7283050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7284fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7285fe5389c8SStephen M. Cameron } 7286fe5389c8SStephen M. Cameron 7287580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7288580ada3cSStephen M. Cameron if (rc < 0) 7289580ada3cSStephen M. Cameron goto unmap_cfgtable; 7290580ada3cSStephen M. Cameron if (rc) { 729164670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 729264670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 729364670ac8SStephen M. Cameron rc = -ENOTSUPP; 7294580ada3cSStephen M. Cameron } else { 729564670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 72961df8552aSStephen M. Cameron } 72971df8552aSStephen M. Cameron 72981df8552aSStephen M. Cameron unmap_cfgtable: 72991df8552aSStephen M. Cameron iounmap(cfgtable); 73001df8552aSStephen M. Cameron 73011df8552aSStephen M. Cameron unmap_vaddr: 73021df8552aSStephen M. Cameron iounmap(vaddr); 73031df8552aSStephen M. Cameron return rc; 7304edd16368SStephen M. Cameron } 7305edd16368SStephen M. Cameron 7306edd16368SStephen M. Cameron /* 7307edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7308edd16368SStephen M. Cameron * the io functions. 7309edd16368SStephen M. Cameron * This is for debug only. 7310edd16368SStephen M. Cameron */ 731142a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7312edd16368SStephen M. Cameron { 731358f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7314edd16368SStephen M. Cameron int i; 7315edd16368SStephen M. Cameron char temp_name[17]; 7316edd16368SStephen M. Cameron 7317edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7318edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7319edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7320edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7321edd16368SStephen M. Cameron temp_name[4] = '\0'; 7322edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7323edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7324edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7325edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7326edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7327edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7328edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7329edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7330edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7331edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7332edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7333edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 733469d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7335edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7336edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7337edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7338edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7339edd16368SStephen M. Cameron temp_name[16] = '\0'; 7340edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7341edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7342edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7343edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 734458f8665cSStephen M. Cameron } 7345edd16368SStephen M. Cameron 7346edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7347edd16368SStephen M. Cameron { 7348edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7349edd16368SStephen M. Cameron 7350edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7351edd16368SStephen M. Cameron return 0; 7352edd16368SStephen M. Cameron offset = 0; 7353edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7354edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7355edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7356edd16368SStephen M. Cameron offset += 4; 7357edd16368SStephen M. Cameron else { 7358edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7359edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7360edd16368SStephen M. Cameron switch (mem_type) { 7361edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7362edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7363edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7364edd16368SStephen M. Cameron break; 7365edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7366edd16368SStephen M. Cameron offset += 8; 7367edd16368SStephen M. Cameron break; 7368edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7369edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7370edd16368SStephen M. Cameron "base address is invalid\n"); 7371edd16368SStephen M. Cameron return -1; 7372edd16368SStephen M. Cameron break; 7373edd16368SStephen M. Cameron } 7374edd16368SStephen M. Cameron } 7375edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7376edd16368SStephen M. Cameron return i + 1; 7377edd16368SStephen M. Cameron } 7378edd16368SStephen M. Cameron return -1; 7379edd16368SStephen M. Cameron } 7380edd16368SStephen M. Cameron 7381cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7382cc64c817SRobert Elliott { 7383bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7384bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7385cc64c817SRobert Elliott } 7386cc64c817SRobert Elliott 7387edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7388050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7389edd16368SStephen M. Cameron */ 7390bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7391edd16368SStephen M. Cameron { 7392bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7393bc2bb154SChristoph Hellwig int ret; 7394edd16368SStephen M. Cameron 7395edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7396bc2bb154SChristoph Hellwig switch (h->board_id) { 7397bc2bb154SChristoph Hellwig case 0x40700E11: 7398bc2bb154SChristoph Hellwig case 0x40800E11: 7399bc2bb154SChristoph Hellwig case 0x40820E11: 7400bc2bb154SChristoph Hellwig case 0x40830E11: 7401bc2bb154SChristoph Hellwig break; 7402bc2bb154SChristoph Hellwig default: 7403bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7404bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7405bc2bb154SChristoph Hellwig if (ret > 0) { 7406bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7407bc2bb154SChristoph Hellwig return 0; 7408eee0f03aSHannes Reinecke } 7409bc2bb154SChristoph Hellwig 7410bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7411bc2bb154SChristoph Hellwig break; 7412edd16368SStephen M. Cameron } 7413bc2bb154SChristoph Hellwig 7414bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7415bc2bb154SChristoph Hellwig if (ret < 0) 7416bc2bb154SChristoph Hellwig return ret; 7417bc2bb154SChristoph Hellwig return 0; 7418edd16368SStephen M. Cameron } 7419edd16368SStephen M. Cameron 7420135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7421135ae6edSHannes Reinecke bool *legacy_board) 7422e5c880d1SStephen M. Cameron { 7423e5c880d1SStephen M. Cameron int i; 7424e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7425e5c880d1SStephen M. Cameron 7426e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7427e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7428e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7429e5c880d1SStephen M. Cameron subsystem_vendor_id; 7430e5c880d1SStephen M. Cameron 7431135ae6edSHannes Reinecke if (legacy_board) 7432135ae6edSHannes Reinecke *legacy_board = false; 7433e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7434135ae6edSHannes Reinecke if (*board_id == products[i].board_id) { 7435135ae6edSHannes Reinecke if (products[i].access != &SA5A_access && 7436135ae6edSHannes Reinecke products[i].access != &SA5B_access) 7437e5c880d1SStephen M. Cameron return i; 7438135ae6edSHannes Reinecke dev_warn(&pdev->dev, 7439135ae6edSHannes Reinecke "legacy board ID: 0x%08x\n", 7440135ae6edSHannes Reinecke *board_id); 7441135ae6edSHannes Reinecke if (legacy_board) 7442135ae6edSHannes Reinecke *legacy_board = true; 7443135ae6edSHannes Reinecke return i; 7444135ae6edSHannes Reinecke } 7445e5c880d1SStephen M. Cameron 7446c8cd71f1SHannes Reinecke dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7447135ae6edSHannes Reinecke if (legacy_board) 7448135ae6edSHannes Reinecke *legacy_board = true; 7449e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7450e5c880d1SStephen M. Cameron } 7451e5c880d1SStephen M. Cameron 74526f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 74533a7774ceSStephen M. Cameron unsigned long *memory_bar) 74543a7774ceSStephen M. Cameron { 74553a7774ceSStephen M. Cameron int i; 74563a7774ceSStephen M. Cameron 74573a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 745812d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 74593a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 746012d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 746112d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 74623a7774ceSStephen M. Cameron *memory_bar); 74633a7774ceSStephen M. Cameron return 0; 74643a7774ceSStephen M. Cameron } 746512d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 74663a7774ceSStephen M. Cameron return -ENODEV; 74673a7774ceSStephen M. Cameron } 74683a7774ceSStephen M. Cameron 74696f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 74706f039790SGreg Kroah-Hartman int wait_for_ready) 74712c4c8c8bSStephen M. Cameron { 7472fe5389c8SStephen M. Cameron int i, iterations; 74732c4c8c8bSStephen M. Cameron u32 scratchpad; 7474fe5389c8SStephen M. Cameron if (wait_for_ready) 7475fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7476fe5389c8SStephen M. Cameron else 7477fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 74782c4c8c8bSStephen M. Cameron 7479fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7480fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7481fe5389c8SStephen M. Cameron if (wait_for_ready) { 74822c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 74832c4c8c8bSStephen M. Cameron return 0; 7484fe5389c8SStephen M. Cameron } else { 7485fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7486fe5389c8SStephen M. Cameron return 0; 7487fe5389c8SStephen M. Cameron } 74882c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 74892c4c8c8bSStephen M. Cameron } 7490fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 74912c4c8c8bSStephen M. Cameron return -ENODEV; 74922c4c8c8bSStephen M. Cameron } 74932c4c8c8bSStephen M. Cameron 74946f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 74956f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7496a51fd47fSStephen M. Cameron u64 *cfg_offset) 7497a51fd47fSStephen M. Cameron { 7498a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7499a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7500a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7501a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7502a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7503a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7504a51fd47fSStephen M. Cameron return -ENODEV; 7505a51fd47fSStephen M. Cameron } 7506a51fd47fSStephen M. Cameron return 0; 7507a51fd47fSStephen M. Cameron } 7508a51fd47fSStephen M. Cameron 7509195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7510195f2c65SRobert Elliott { 7511105a3dbcSRobert Elliott if (h->transtable) { 7512195f2c65SRobert Elliott iounmap(h->transtable); 7513105a3dbcSRobert Elliott h->transtable = NULL; 7514105a3dbcSRobert Elliott } 7515105a3dbcSRobert Elliott if (h->cfgtable) { 7516195f2c65SRobert Elliott iounmap(h->cfgtable); 7517105a3dbcSRobert Elliott h->cfgtable = NULL; 7518105a3dbcSRobert Elliott } 7519195f2c65SRobert Elliott } 7520195f2c65SRobert Elliott 7521195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7522195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7523195f2c65SRobert Elliott + * */ 75246f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7525edd16368SStephen M. Cameron { 752601a02ffcSStephen M. Cameron u64 cfg_offset; 752701a02ffcSStephen M. Cameron u32 cfg_base_addr; 752801a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7529303932fdSDon Brace u32 trans_offset; 7530a51fd47fSStephen M. Cameron int rc; 753177c4495cSStephen M. Cameron 7532a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7533a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7534a51fd47fSStephen M. Cameron if (rc) 7535a51fd47fSStephen M. Cameron return rc; 753677c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7537a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7538cd3c81c4SRobert Elliott if (!h->cfgtable) { 7539cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 754077c4495cSStephen M. Cameron return -ENOMEM; 7541cd3c81c4SRobert Elliott } 7542580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7543580ada3cSStephen M. Cameron if (rc) 7544580ada3cSStephen M. Cameron return rc; 754577c4495cSStephen M. Cameron /* Find performant mode table. */ 7546a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 754777c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 754877c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 754977c4495cSStephen M. Cameron sizeof(*h->transtable)); 7550195f2c65SRobert Elliott if (!h->transtable) { 7551195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7552195f2c65SRobert Elliott hpsa_free_cfgtables(h); 755377c4495cSStephen M. Cameron return -ENOMEM; 7554195f2c65SRobert Elliott } 755577c4495cSStephen M. Cameron return 0; 755677c4495cSStephen M. Cameron } 755777c4495cSStephen M. Cameron 75586f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7559cba3d38bSStephen M. Cameron { 756041ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 756141ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 756241ce4c35SStephen Cameron 756341ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 756472ceeaecSStephen M. Cameron 756572ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 756672ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 756772ceeaecSStephen M. Cameron h->max_commands = 32; 756872ceeaecSStephen M. Cameron 756941ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 757041ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 757141ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 757241ce4c35SStephen Cameron h->max_commands, 757341ce4c35SStephen Cameron MIN_MAX_COMMANDS); 757441ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7575cba3d38bSStephen M. Cameron } 7576cba3d38bSStephen M. Cameron } 7577cba3d38bSStephen M. Cameron 7578c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7579c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7580c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7581c7ee65b3SWebb Scales */ 7582c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7583c7ee65b3SWebb Scales { 7584c7ee65b3SWebb Scales return h->maxsgentries > 512; 7585c7ee65b3SWebb Scales } 7586c7ee65b3SWebb Scales 7587b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7588b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7589b93d7536SStephen M. Cameron * SG chain block size, etc. 7590b93d7536SStephen M. Cameron */ 75916f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7592b93d7536SStephen M. Cameron { 7593cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 759445fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7595b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7596283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7597c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7598c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7599b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 76001a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7601b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7602b93d7536SStephen M. Cameron } else { 7603c7ee65b3SWebb Scales /* 7604c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7605c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7606c7ee65b3SWebb Scales * would lock up the controller) 7607c7ee65b3SWebb Scales */ 7608c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 76091a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7610c7ee65b3SWebb Scales h->chainsize = 0; 7611b93d7536SStephen M. Cameron } 761275167d2cSStephen M. Cameron 761375167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 761475167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 76150e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 76160e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 76170e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 76180e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 76198be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 76208be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7621b93d7536SStephen M. Cameron } 7622b93d7536SStephen M. Cameron 762376c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 762476c46e49SStephen M. Cameron { 76250fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7626050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 762776c46e49SStephen M. Cameron return false; 762876c46e49SStephen M. Cameron } 762976c46e49SStephen M. Cameron return true; 763076c46e49SStephen M. Cameron } 763176c46e49SStephen M. Cameron 763297a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7633f7c39101SStephen M. Cameron { 763497a5e98cSStephen M. Cameron u32 driver_support; 7635f7c39101SStephen M. Cameron 763697a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 76370b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 76380b9e7b74SArnd Bergmann #ifdef CONFIG_X86 763997a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7640f7c39101SStephen M. Cameron #endif 764128e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 764228e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7643f7c39101SStephen M. Cameron } 7644f7c39101SStephen M. Cameron 76453d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 76463d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 76473d0eab67SStephen M. Cameron */ 76483d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 76493d0eab67SStephen M. Cameron { 76503d0eab67SStephen M. Cameron u32 dma_prefetch; 76513d0eab67SStephen M. Cameron 76523d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 76533d0eab67SStephen M. Cameron return; 76543d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 76553d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 76563d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 76573d0eab67SStephen M. Cameron } 76583d0eab67SStephen M. Cameron 7659c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 766076438d08SStephen M. Cameron { 766176438d08SStephen M. Cameron int i; 766276438d08SStephen M. Cameron u32 doorbell_value; 766376438d08SStephen M. Cameron unsigned long flags; 766476438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7665007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 766676438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 766776438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 766876438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 766976438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7670c706a795SRobert Elliott goto done; 767176438d08SStephen M. Cameron /* delay and try again */ 7672007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 767376438d08SStephen M. Cameron } 7674c706a795SRobert Elliott return -ENODEV; 7675c706a795SRobert Elliott done: 7676c706a795SRobert Elliott return 0; 767776438d08SStephen M. Cameron } 767876438d08SStephen M. Cameron 7679c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7680eb6b2ae9SStephen M. Cameron { 7681eb6b2ae9SStephen M. Cameron int i; 76826eaf46fdSStephen M. Cameron u32 doorbell_value; 76836eaf46fdSStephen M. Cameron unsigned long flags; 7684eb6b2ae9SStephen M. Cameron 7685eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7686eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7687eb6b2ae9SStephen M. Cameron * as we enter this code.) 7688eb6b2ae9SStephen M. Cameron */ 7689007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 769025163bd5SWebb Scales if (h->remove_in_progress) 769125163bd5SWebb Scales goto done; 76926eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 76936eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 76946eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7695382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7696c706a795SRobert Elliott goto done; 7697eb6b2ae9SStephen M. Cameron /* delay and try again */ 7698007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7699eb6b2ae9SStephen M. Cameron } 7700c706a795SRobert Elliott return -ENODEV; 7701c706a795SRobert Elliott done: 7702c706a795SRobert Elliott return 0; 77033f4336f3SStephen M. Cameron } 77043f4336f3SStephen M. Cameron 7705c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 77066f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 77073f4336f3SStephen M. Cameron { 77083f4336f3SStephen M. Cameron u32 trans_support; 77093f4336f3SStephen M. Cameron 77103f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 77113f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 77123f4336f3SStephen M. Cameron return -ENOTSUPP; 77133f4336f3SStephen M. Cameron 77143f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7715283b4a9bSStephen M. Cameron 77163f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 77173f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7718b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 77193f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7720c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7721c706a795SRobert Elliott goto error; 7722eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7723283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7724283b4a9bSStephen M. Cameron goto error; 7725960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7726eb6b2ae9SStephen M. Cameron return 0; 7727283b4a9bSStephen M. Cameron error: 7728050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7729283b4a9bSStephen M. Cameron return -ENODEV; 7730eb6b2ae9SStephen M. Cameron } 7731eb6b2ae9SStephen M. Cameron 7732195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7733195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7734195f2c65SRobert Elliott { 7735195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7736195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7737105a3dbcSRobert Elliott h->vaddr = NULL; 7738195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7739943a7021SRobert Elliott /* 7740943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7741943a7021SRobert Elliott * Documentation/PCI/pci.txt 7742943a7021SRobert Elliott */ 7743195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7744943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7745195f2c65SRobert Elliott } 7746195f2c65SRobert Elliott 7747195f2c65SRobert Elliott /* several items must be freed later */ 77486f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 774977c4495cSStephen M. Cameron { 7750eb6b2ae9SStephen M. Cameron int prod_index, err; 7751135ae6edSHannes Reinecke bool legacy_board; 7752edd16368SStephen M. Cameron 7753135ae6edSHannes Reinecke prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7754e5c880d1SStephen M. Cameron if (prod_index < 0) 775560f923b9SRobert Elliott return prod_index; 7756e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7757e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7758135ae6edSHannes Reinecke h->legacy_board = legacy_board; 7759e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7760e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7761e5a44df8SMatthew Garrett 776255c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7763edd16368SStephen M. Cameron if (err) { 7764195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7765943a7021SRobert Elliott pci_disable_device(h->pdev); 7766edd16368SStephen M. Cameron return err; 7767edd16368SStephen M. Cameron } 7768edd16368SStephen M. Cameron 7769f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7770edd16368SStephen M. Cameron if (err) { 777155c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7772195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7773943a7021SRobert Elliott pci_disable_device(h->pdev); 7774943a7021SRobert Elliott return err; 7775edd16368SStephen M. Cameron } 77764fa604e1SRobert Elliott 77774fa604e1SRobert Elliott pci_set_master(h->pdev); 77784fa604e1SRobert Elliott 7779bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 7780bc2bb154SChristoph Hellwig if (err) 7781bc2bb154SChristoph Hellwig goto clean1; 778212d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 77833a7774ceSStephen M. Cameron if (err) 7784195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7785edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7786204892e9SStephen M. Cameron if (!h->vaddr) { 7787195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7788204892e9SStephen M. Cameron err = -ENOMEM; 7789195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7790204892e9SStephen M. Cameron } 7791fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 77922c4c8c8bSStephen M. Cameron if (err) 7793195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 779477c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 779577c4495cSStephen M. Cameron if (err) 7796195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7797b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7798edd16368SStephen M. Cameron 779976c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7800edd16368SStephen M. Cameron err = -ENODEV; 7801195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7802edd16368SStephen M. Cameron } 780397a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 78043d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7805eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7806eb6b2ae9SStephen M. Cameron if (err) 7807195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7808edd16368SStephen M. Cameron return 0; 7809edd16368SStephen M. Cameron 7810195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7811195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7812195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7813204892e9SStephen M. Cameron iounmap(h->vaddr); 7814105a3dbcSRobert Elliott h->vaddr = NULL; 7815195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7816195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7817bc2bb154SChristoph Hellwig clean1: 7818943a7021SRobert Elliott /* 7819943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7820943a7021SRobert Elliott * Documentation/PCI/pci.txt 7821943a7021SRobert Elliott */ 7822195f2c65SRobert Elliott pci_disable_device(h->pdev); 7823943a7021SRobert Elliott pci_release_regions(h->pdev); 7824edd16368SStephen M. Cameron return err; 7825edd16368SStephen M. Cameron } 7826edd16368SStephen M. Cameron 78276f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7828339b2b14SStephen M. Cameron { 7829339b2b14SStephen M. Cameron int rc; 7830339b2b14SStephen M. Cameron 7831339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7832339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7833339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7834339b2b14SStephen M. Cameron return; 7835339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7836339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7837339b2b14SStephen M. Cameron if (rc != 0) { 7838339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7839339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7840339b2b14SStephen M. Cameron } 7841339b2b14SStephen M. Cameron } 7842339b2b14SStephen M. Cameron 78436b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7844edd16368SStephen M. Cameron { 78451df8552aSStephen M. Cameron int rc, i; 78463b747298STomas Henzl void __iomem *vaddr; 7847edd16368SStephen M. Cameron 78484c2a8c40SStephen M. Cameron if (!reset_devices) 78494c2a8c40SStephen M. Cameron return 0; 78504c2a8c40SStephen M. Cameron 7851132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7852132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7853132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7854132aa220STomas Henzl */ 7855132aa220STomas Henzl rc = pci_enable_device(pdev); 7856132aa220STomas Henzl if (rc) { 7857132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7858132aa220STomas Henzl return -ENODEV; 7859132aa220STomas Henzl } 7860132aa220STomas Henzl pci_disable_device(pdev); 7861132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7862132aa220STomas Henzl rc = pci_enable_device(pdev); 7863132aa220STomas Henzl if (rc) { 7864132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7865132aa220STomas Henzl return -ENODEV; 7866132aa220STomas Henzl } 78674fa604e1SRobert Elliott 7868859c75abSTomas Henzl pci_set_master(pdev); 78694fa604e1SRobert Elliott 78703b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 78713b747298STomas Henzl if (vaddr == NULL) { 78723b747298STomas Henzl rc = -ENOMEM; 78733b747298STomas Henzl goto out_disable; 78743b747298STomas Henzl } 78753b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 78763b747298STomas Henzl iounmap(vaddr); 78773b747298STomas Henzl 78781df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 78796b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7880edd16368SStephen M. Cameron 78811df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 78821df8552aSStephen M. Cameron * but it's already (and still) up and running in 788318867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 788418867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 78851df8552aSStephen M. Cameron */ 7886adf1b3a3SRobert Elliott if (rc) 7887132aa220STomas Henzl goto out_disable; 7888edd16368SStephen M. Cameron 7889edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 78901ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7891edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7892edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7893edd16368SStephen M. Cameron break; 7894edd16368SStephen M. Cameron else 7895edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7896edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7897edd16368SStephen M. Cameron } 7898132aa220STomas Henzl 7899132aa220STomas Henzl out_disable: 7900132aa220STomas Henzl 7901132aa220STomas Henzl pci_disable_device(pdev); 7902132aa220STomas Henzl return rc; 7903edd16368SStephen M. Cameron } 7904edd16368SStephen M. Cameron 79051fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 79061fb7c98aSRobert Elliott { 79071fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7908105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7909105a3dbcSRobert Elliott if (h->cmd_pool) { 79101fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 79111fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 79121fb7c98aSRobert Elliott h->cmd_pool, 79131fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7914105a3dbcSRobert Elliott h->cmd_pool = NULL; 7915105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7916105a3dbcSRobert Elliott } 7917105a3dbcSRobert Elliott if (h->errinfo_pool) { 79181fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 79191fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 79201fb7c98aSRobert Elliott h->errinfo_pool, 79211fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7922105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7923105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7924105a3dbcSRobert Elliott } 79251fb7c98aSRobert Elliott } 79261fb7c98aSRobert Elliott 7927d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 79282e9d1b36SStephen M. Cameron { 79292e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 79302e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 79312e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 79322e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 79332e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 79342e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 79352e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 79362e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 79372e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 79382e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 79392e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 79402e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 79412e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 79422c143342SRobert Elliott goto clean_up; 79432e9d1b36SStephen M. Cameron } 7944360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 79452e9d1b36SStephen M. Cameron return 0; 79462c143342SRobert Elliott clean_up: 79472c143342SRobert Elliott hpsa_free_cmd_pool(h); 79482c143342SRobert Elliott return -ENOMEM; 79492e9d1b36SStephen M. Cameron } 79502e9d1b36SStephen M. Cameron 7951ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7952ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 7953ec501a18SRobert Elliott { 7954ec501a18SRobert Elliott int i; 7955ec501a18SRobert Elliott 7956bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7957ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 79587dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7959bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 7960ec501a18SRobert Elliott return; 7961ec501a18SRobert Elliott } 7962ec501a18SRobert Elliott 7963bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 7964bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7965105a3dbcSRobert Elliott h->q[i] = 0; 7966ec501a18SRobert Elliott } 7967a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 7968a4e17fc1SRobert Elliott h->q[i] = 0; 7969ec501a18SRobert Elliott } 7970ec501a18SRobert Elliott 79719ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 79729ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 79730ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 79740ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 79750ae01a32SStephen M. Cameron { 7976254f796bSMatt Gates int rc, i; 79770ae01a32SStephen M. Cameron 7978254f796bSMatt Gates /* 7979254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 7980254f796bSMatt Gates * queue to process. 7981254f796bSMatt Gates */ 7982254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 7983254f796bSMatt Gates h->q[i] = (u8) i; 7984254f796bSMatt Gates 7985bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7986254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 7987bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 79888b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7989bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 79908b47004aSRobert Elliott 0, h->intrname[i], 7991254f796bSMatt Gates &h->q[i]); 7992a4e17fc1SRobert Elliott if (rc) { 7993a4e17fc1SRobert Elliott int j; 7994a4e17fc1SRobert Elliott 7995a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 7996a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 7997bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 7998a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 7999bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8000a4e17fc1SRobert Elliott h->q[j] = 0; 8001a4e17fc1SRobert Elliott } 8002a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8003a4e17fc1SRobert Elliott h->q[j] = 0; 8004a4e17fc1SRobert Elliott return rc; 8005a4e17fc1SRobert Elliott } 8006a4e17fc1SRobert Elliott } 8007254f796bSMatt Gates } else { 8008254f796bSMatt Gates /* Use single reply pool */ 8009bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8010bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8011bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8012bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 80138b47004aSRobert Elliott msixhandler, 0, 8014bc2bb154SChristoph Hellwig h->intrname[0], 8015254f796bSMatt Gates &h->q[h->intr_mode]); 8016254f796bSMatt Gates } else { 80178b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80188b47004aSRobert Elliott "%s-intx", h->devname); 8019bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 80208b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8021bc2bb154SChristoph Hellwig h->intrname[0], 8022254f796bSMatt Gates &h->q[h->intr_mode]); 8023254f796bSMatt Gates } 8024254f796bSMatt Gates } 80250ae01a32SStephen M. Cameron if (rc) { 8026195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8027bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 8028195f2c65SRobert Elliott hpsa_free_irqs(h); 80290ae01a32SStephen M. Cameron return -ENODEV; 80300ae01a32SStephen M. Cameron } 80310ae01a32SStephen M. Cameron return 0; 80320ae01a32SStephen M. Cameron } 80330ae01a32SStephen M. Cameron 80346f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 803564670ac8SStephen M. Cameron { 803639c53f55SRobert Elliott int rc; 8037bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 803864670ac8SStephen M. Cameron 803964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 804039c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 804139c53f55SRobert Elliott if (rc) { 804264670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 804339c53f55SRobert Elliott return rc; 804464670ac8SStephen M. Cameron } 804564670ac8SStephen M. Cameron 804664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 804739c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 804839c53f55SRobert Elliott if (rc) { 804964670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 805064670ac8SStephen M. Cameron "after soft reset.\n"); 805139c53f55SRobert Elliott return rc; 805264670ac8SStephen M. Cameron } 805364670ac8SStephen M. Cameron 805464670ac8SStephen M. Cameron return 0; 805564670ac8SStephen M. Cameron } 805664670ac8SStephen M. Cameron 8057072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8058072b0518SStephen M. Cameron { 8059072b0518SStephen M. Cameron int i; 8060072b0518SStephen M. Cameron 8061072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8062072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8063072b0518SStephen M. Cameron continue; 80641fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 80651fb7c98aSRobert Elliott h->reply_queue_size, 80661fb7c98aSRobert Elliott h->reply_queue[i].head, 80671fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8068072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8069072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8070072b0518SStephen M. Cameron } 8071105a3dbcSRobert Elliott h->reply_queue_size = 0; 8072072b0518SStephen M. Cameron } 8073072b0518SStephen M. Cameron 80740097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 80750097f0f4SStephen M. Cameron { 8076105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8077105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8078105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8079105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 80802946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 80812946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 80822946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 80839ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 80849ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 80859ecd953aSRobert Elliott if (h->resubmit_wq) { 80869ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 80879ecd953aSRobert Elliott h->resubmit_wq = NULL; 80889ecd953aSRobert Elliott } 80899ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 80909ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 80919ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 80929ecd953aSRobert Elliott } 8093105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 809464670ac8SStephen M. Cameron } 809564670ac8SStephen M. Cameron 8096a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8097f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8098a0c12413SStephen M. Cameron { 8099281a7fd0SWebb Scales int i, refcount; 8100281a7fd0SWebb Scales struct CommandList *c; 810125163bd5SWebb Scales int failcount = 0; 8102a0c12413SStephen M. Cameron 8103080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8104f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8105f2405db8SDon Brace c = h->cmd_pool + i; 8106281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8107281a7fd0SWebb Scales if (refcount > 1) { 810825163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 81095a3d16f5SStephen M. Cameron finish_cmd(c); 8110433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 811125163bd5SWebb Scales failcount++; 8112a0c12413SStephen M. Cameron } 8113281a7fd0SWebb Scales cmd_free(h, c); 8114281a7fd0SWebb Scales } 811525163bd5SWebb Scales dev_warn(&h->pdev->dev, 811625163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8117a0c12413SStephen M. Cameron } 8118a0c12413SStephen M. Cameron 8119094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8120094963daSStephen M. Cameron { 8121c8ed0010SRusty Russell int cpu; 8122094963daSStephen M. Cameron 8123c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8124094963daSStephen M. Cameron u32 *lockup_detected; 8125094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8126094963daSStephen M. Cameron *lockup_detected = value; 8127094963daSStephen M. Cameron } 8128094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8129094963daSStephen M. Cameron } 8130094963daSStephen M. Cameron 8131a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8132a0c12413SStephen M. Cameron { 8133a0c12413SStephen M. Cameron unsigned long flags; 8134094963daSStephen M. Cameron u32 lockup_detected; 8135a0c12413SStephen M. Cameron 8136a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8137a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8138094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8139094963daSStephen M. Cameron if (!lockup_detected) { 8140094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8141094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 814225163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 814325163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8144094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8145094963daSStephen M. Cameron } 8146094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8147a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 814825163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 814925163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8150b9b08cadSDon Brace if (lockup_detected == 0xffff0000) { 8151b9b08cadSDon Brace dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8152b9b08cadSDon Brace writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8153b9b08cadSDon Brace } 8154a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8155f2405db8SDon Brace fail_all_outstanding_cmds(h); 8156a0c12413SStephen M. Cameron } 8157a0c12413SStephen M. Cameron 815825163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8159a0c12413SStephen M. Cameron { 8160a0c12413SStephen M. Cameron u64 now; 8161a0c12413SStephen M. Cameron u32 heartbeat; 8162a0c12413SStephen M. Cameron unsigned long flags; 8163a0c12413SStephen M. Cameron 8164a0c12413SStephen M. Cameron now = get_jiffies_64(); 8165a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8166a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8167e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 816825163bd5SWebb Scales return false; 8169a0c12413SStephen M. Cameron 8170a0c12413SStephen M. Cameron /* 8171a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8172a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8173a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8174a0c12413SStephen M. Cameron */ 8175a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8176e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 817725163bd5SWebb Scales return false; 8178a0c12413SStephen M. Cameron 8179a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8180a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8181a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8182a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8183a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8184a0c12413SStephen M. Cameron controller_lockup_detected(h); 818525163bd5SWebb Scales return true; 8186a0c12413SStephen M. Cameron } 8187a0c12413SStephen M. Cameron 8188a0c12413SStephen M. Cameron /* We're ok. */ 8189a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8190a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 819125163bd5SWebb Scales return false; 8192a0c12413SStephen M. Cameron } 8193a0c12413SStephen M. Cameron 8194b2582a65SDon Brace /* 8195b2582a65SDon Brace * Set ioaccel status for all ioaccel volumes. 8196b2582a65SDon Brace * 8197b2582a65SDon Brace * Called from monitor controller worker (hpsa_event_monitor_worker) 8198b2582a65SDon Brace * 8199b2582a65SDon Brace * A Volume (or Volumes that comprise an Array set may be undergoing a 8200b2582a65SDon Brace * transformation, so we will be turning off ioaccel for all volumes that 8201b2582a65SDon Brace * make up the Array. 8202b2582a65SDon Brace */ 8203b2582a65SDon Brace static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8204b2582a65SDon Brace { 8205b2582a65SDon Brace int rc; 8206b2582a65SDon Brace int i; 8207b2582a65SDon Brace u8 ioaccel_status; 8208b2582a65SDon Brace unsigned char *buf; 8209b2582a65SDon Brace struct hpsa_scsi_dev_t *device; 8210b2582a65SDon Brace 8211b2582a65SDon Brace if (!h) 8212b2582a65SDon Brace return; 8213b2582a65SDon Brace 8214b2582a65SDon Brace buf = kmalloc(64, GFP_KERNEL); 8215b2582a65SDon Brace if (!buf) 8216b2582a65SDon Brace return; 8217b2582a65SDon Brace 8218b2582a65SDon Brace /* 8219b2582a65SDon Brace * Run through current device list used during I/O requests. 8220b2582a65SDon Brace */ 8221b2582a65SDon Brace for (i = 0; i < h->ndevices; i++) { 8222b2582a65SDon Brace device = h->dev[i]; 8223b2582a65SDon Brace 8224b2582a65SDon Brace if (!device) 8225b2582a65SDon Brace continue; 8226b2582a65SDon Brace if (!device->scsi3addr) 8227b2582a65SDon Brace continue; 8228b2582a65SDon Brace if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8229b2582a65SDon Brace HPSA_VPD_LV_IOACCEL_STATUS)) 8230b2582a65SDon Brace continue; 8231b2582a65SDon Brace 8232b2582a65SDon Brace memset(buf, 0, 64); 8233b2582a65SDon Brace 8234b2582a65SDon Brace rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8235b2582a65SDon Brace VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8236b2582a65SDon Brace buf, 64); 8237b2582a65SDon Brace if (rc != 0) 8238b2582a65SDon Brace continue; 8239b2582a65SDon Brace 8240b2582a65SDon Brace ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8241b2582a65SDon Brace device->offload_config = 8242b2582a65SDon Brace !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8243b2582a65SDon Brace if (device->offload_config) 8244b2582a65SDon Brace device->offload_to_be_enabled = 8245b2582a65SDon Brace !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8246b2582a65SDon Brace 8247b2582a65SDon Brace /* 8248b2582a65SDon Brace * Immediately turn off ioaccel for any volume the 8249b2582a65SDon Brace * controller tells us to. Some of the reasons could be: 8250b2582a65SDon Brace * transformation - change to the LVs of an Array. 8251b2582a65SDon Brace * degraded volume - component failure 8252b2582a65SDon Brace * 8253b2582a65SDon Brace * If ioaccel is to be re-enabled, re-enable later during the 8254b2582a65SDon Brace * scan operation so the driver can get a fresh raidmap 8255b2582a65SDon Brace * before turning ioaccel back on. 8256b2582a65SDon Brace * 8257b2582a65SDon Brace */ 8258b2582a65SDon Brace if (!device->offload_to_be_enabled) 8259b2582a65SDon Brace device->offload_enabled = 0; 8260b2582a65SDon Brace } 8261b2582a65SDon Brace 8262b2582a65SDon Brace kfree(buf); 8263b2582a65SDon Brace } 8264b2582a65SDon Brace 82659846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 826676438d08SStephen M. Cameron { 826776438d08SStephen M. Cameron char *event_type; 826876438d08SStephen M. Cameron 8269e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8270e4aa3e6aSStephen Cameron return; 8271e4aa3e6aSStephen Cameron 827276438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 82731f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 82741f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 827576438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 827676438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 827776438d08SStephen M. Cameron 827876438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 827976438d08SStephen M. Cameron event_type = "state change"; 828076438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 828176438d08SStephen M. Cameron event_type = "configuration change"; 828276438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 828376438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 8284b2582a65SDon Brace hpsa_set_ioaccel_status(h); 828523100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 828676438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 828776438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 828876438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 828976438d08SStephen M. Cameron h->events, event_type); 829076438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 829176438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 829276438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 829376438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 829476438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 829576438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 829676438d08SStephen M. Cameron } else { 829776438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 829876438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 829976438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 830076438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 830176438d08SStephen M. Cameron } 83029846590eSStephen M. Cameron return; 830376438d08SStephen M. Cameron } 830476438d08SStephen M. Cameron 830576438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 830676438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8307e863d68eSScott Teel * we should rescan the controller for devices. 8308e863d68eSScott Teel * Also check flag for driver-initiated rescan. 830976438d08SStephen M. Cameron */ 83109846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 831176438d08SStephen M. Cameron { 8312853633e8SDon Brace if (h->drv_req_rescan) { 8313853633e8SDon Brace h->drv_req_rescan = 0; 8314853633e8SDon Brace return 1; 8315853633e8SDon Brace } 8316853633e8SDon Brace 831776438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 83189846590eSStephen M. Cameron return 0; 831976438d08SStephen M. Cameron 832076438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 83219846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 83229846590eSStephen M. Cameron } 832376438d08SStephen M. Cameron 832476438d08SStephen M. Cameron /* 83259846590eSStephen M. Cameron * Check if any of the offline devices have become ready 832676438d08SStephen M. Cameron */ 83279846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 83289846590eSStephen M. Cameron { 83299846590eSStephen M. Cameron unsigned long flags; 83309846590eSStephen M. Cameron struct offline_device_entry *d; 83319846590eSStephen M. Cameron struct list_head *this, *tmp; 83329846590eSStephen M. Cameron 83339846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 83349846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 83359846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 83369846590eSStephen M. Cameron offline_list); 83379846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8338d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8339d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8340d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8341d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 83429846590eSStephen M. Cameron return 1; 8343d1fea47cSStephen M. Cameron } 83449846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 834576438d08SStephen M. Cameron } 83469846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 83479846590eSStephen M. Cameron return 0; 83489846590eSStephen M. Cameron } 83499846590eSStephen M. Cameron 835034592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 835134592254SScott Teel { 835234592254SScott Teel int rc = 1; /* assume there are changes */ 835334592254SScott Teel struct ReportLUNdata *logdev = NULL; 835434592254SScott Teel 835534592254SScott Teel /* if we can't find out if lun data has changed, 835634592254SScott Teel * assume that it has. 835734592254SScott Teel */ 835834592254SScott Teel 835934592254SScott Teel if (!h->lastlogicals) 83607e8a9486SAmit Kushwaha return rc; 836134592254SScott Teel 836234592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 83637e8a9486SAmit Kushwaha if (!logdev) 83647e8a9486SAmit Kushwaha return rc; 83657e8a9486SAmit Kushwaha 836634592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 836734592254SScott Teel dev_warn(&h->pdev->dev, 836834592254SScott Teel "report luns failed, can't track lun changes.\n"); 836934592254SScott Teel goto out; 837034592254SScott Teel } 837134592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 837234592254SScott Teel dev_info(&h->pdev->dev, 837334592254SScott Teel "Lun changes detected.\n"); 837434592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 837534592254SScott Teel goto out; 837634592254SScott Teel } else 837734592254SScott Teel rc = 0; /* no changes detected. */ 837834592254SScott Teel out: 837934592254SScott Teel kfree(logdev); 838034592254SScott Teel return rc; 838134592254SScott Teel } 838234592254SScott Teel 83833d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h) 8384a0c12413SStephen M. Cameron { 83853d38f00cSScott Teel struct Scsi_Host *sh = NULL; 8386a0c12413SStephen M. Cameron unsigned long flags; 83879846590eSStephen M. Cameron 8388bfd7546cSDon Brace /* 8389bfd7546cSDon Brace * Do the scan after the reset 8390bfd7546cSDon Brace */ 8391c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 8392bfd7546cSDon Brace if (h->reset_in_progress) { 8393bfd7546cSDon Brace h->drv_req_rescan = 1; 8394c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8395bfd7546cSDon Brace return; 8396bfd7546cSDon Brace } 8397c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8398bfd7546cSDon Brace 839934592254SScott Teel sh = scsi_host_get(h->scsi_host); 840034592254SScott Teel if (sh != NULL) { 840134592254SScott Teel hpsa_scan_start(sh); 840234592254SScott Teel scsi_host_put(sh); 84033d38f00cSScott Teel h->drv_req_rescan = 0; 840434592254SScott Teel } 840534592254SScott Teel } 84063d38f00cSScott Teel 84073d38f00cSScott Teel /* 84083d38f00cSScott Teel * watch for controller events 84093d38f00cSScott Teel */ 84103d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work) 84113d38f00cSScott Teel { 84123d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 84133d38f00cSScott Teel struct ctlr_info, event_monitor_work); 84143d38f00cSScott Teel unsigned long flags; 84153d38f00cSScott Teel 84163d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 84173d38f00cSScott Teel if (h->remove_in_progress) { 84183d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 84193d38f00cSScott Teel return; 84203d38f00cSScott Teel } 84213d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 84223d38f00cSScott Teel 84233d38f00cSScott Teel if (hpsa_ctlr_needs_rescan(h)) { 84243d38f00cSScott Teel hpsa_ack_ctlr_events(h); 84253d38f00cSScott Teel hpsa_perform_rescan(h); 84263d38f00cSScott Teel } 84273d38f00cSScott Teel 84283d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 84293d38f00cSScott Teel if (!h->remove_in_progress) 84303d38f00cSScott Teel schedule_delayed_work(&h->event_monitor_work, 84313d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 84323d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 84333d38f00cSScott Teel } 84343d38f00cSScott Teel 84353d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work) 84363d38f00cSScott Teel { 84373d38f00cSScott Teel unsigned long flags; 84383d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 84393d38f00cSScott Teel struct ctlr_info, rescan_ctlr_work); 84403d38f00cSScott Teel 84413d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 84423d38f00cSScott Teel if (h->remove_in_progress) { 84433d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 84443d38f00cSScott Teel return; 84453d38f00cSScott Teel } 84463d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 84473d38f00cSScott Teel 84483d38f00cSScott Teel if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 84493d38f00cSScott Teel hpsa_perform_rescan(h); 84503d38f00cSScott Teel } else if (h->discovery_polling) { 84513d38f00cSScott Teel if (hpsa_luns_changed(h)) { 84523d38f00cSScott Teel dev_info(&h->pdev->dev, 84533d38f00cSScott Teel "driver discovery polling rescan.\n"); 84543d38f00cSScott Teel hpsa_perform_rescan(h); 84553d38f00cSScott Teel } 84569846590eSStephen M. Cameron } 84576636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 84586636e7f4SDon Brace if (!h->remove_in_progress) 84596636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 84606636e7f4SDon Brace h->heartbeat_sample_interval); 84616636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 84626636e7f4SDon Brace } 84636636e7f4SDon Brace 84646636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 84656636e7f4SDon Brace { 84666636e7f4SDon Brace unsigned long flags; 84676636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 84686636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 84696636e7f4SDon Brace 84706636e7f4SDon Brace detect_controller_lockup(h); 84716636e7f4SDon Brace if (lockup_detected(h)) 84726636e7f4SDon Brace return; 84739846590eSStephen M. Cameron 84748a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 84756636e7f4SDon Brace if (!h->remove_in_progress) 84768a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 84778a98db73SStephen M. Cameron h->heartbeat_sample_interval); 84788a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8479a0c12413SStephen M. Cameron } 8480a0c12413SStephen M. Cameron 84816636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 84826636e7f4SDon Brace char *name) 84836636e7f4SDon Brace { 84846636e7f4SDon Brace struct workqueue_struct *wq = NULL; 84856636e7f4SDon Brace 8486397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 84876636e7f4SDon Brace if (!wq) 84886636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 84896636e7f4SDon Brace 84906636e7f4SDon Brace return wq; 84916636e7f4SDon Brace } 84926636e7f4SDon Brace 84936f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 84944c2a8c40SStephen M. Cameron { 84954c2a8c40SStephen M. Cameron int dac, rc; 84964c2a8c40SStephen M. Cameron struct ctlr_info *h; 849764670ac8SStephen M. Cameron int try_soft_reset = 0; 849864670ac8SStephen M. Cameron unsigned long flags; 84996b6c1cd7STomas Henzl u32 board_id; 85004c2a8c40SStephen M. Cameron 85014c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 85024c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 85034c2a8c40SStephen M. Cameron 8504135ae6edSHannes Reinecke rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 85056b6c1cd7STomas Henzl if (rc < 0) { 85066b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 85076b6c1cd7STomas Henzl return rc; 85086b6c1cd7STomas Henzl } 85096b6c1cd7STomas Henzl 85106b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 851164670ac8SStephen M. Cameron if (rc) { 851264670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 85134c2a8c40SStephen M. Cameron return rc; 851464670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 851564670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 851664670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 851764670ac8SStephen M. Cameron * point that it can accept a command. 851864670ac8SStephen M. Cameron */ 851964670ac8SStephen M. Cameron try_soft_reset = 1; 852064670ac8SStephen M. Cameron rc = 0; 852164670ac8SStephen M. Cameron } 852264670ac8SStephen M. Cameron 852364670ac8SStephen M. Cameron reinit_after_soft_reset: 85244c2a8c40SStephen M. Cameron 8525303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8526303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8527303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8528303932fdSDon Brace */ 8529303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8530edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8531105a3dbcSRobert Elliott if (!h) { 8532105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8533ecd9aad4SStephen M. Cameron return -ENOMEM; 8534105a3dbcSRobert Elliott } 8535edd16368SStephen M. Cameron 853655c06c71SStephen M. Cameron h->pdev = pdev; 8537105a3dbcSRobert Elliott 8538a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 85399846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 85406eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 85419846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 85426eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 8543c59d04f3SDon Brace spin_lock_init(&h->reset_lock); 854434f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8545094963daSStephen M. Cameron 8546094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8547094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 85482a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8549105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 85502a5ac326SStephen M. Cameron rc = -ENOMEM; 85512efa5929SRobert Elliott goto clean1; /* aer/h */ 85522a5ac326SStephen M. Cameron } 8553094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8554094963daSStephen M. Cameron 855555c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8556105a3dbcSRobert Elliott if (rc) 85572946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8558edd16368SStephen M. Cameron 85592946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 85602946e82bSRobert Elliott * interrupt_mode h->intr */ 85612946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 85622946e82bSRobert Elliott if (rc) 85632946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 85642946e82bSRobert Elliott 85652946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8566edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8567edd16368SStephen M. Cameron number_of_controllers++; 8568edd16368SStephen M. Cameron 8569edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8570ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8571ecd9aad4SStephen M. Cameron if (rc == 0) { 8572edd16368SStephen M. Cameron dac = 1; 8573ecd9aad4SStephen M. Cameron } else { 8574ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8575ecd9aad4SStephen M. Cameron if (rc == 0) { 8576edd16368SStephen M. Cameron dac = 0; 8577ecd9aad4SStephen M. Cameron } else { 8578edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 85792946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8580edd16368SStephen M. Cameron } 8581ecd9aad4SStephen M. Cameron } 8582edd16368SStephen M. Cameron 8583edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8584edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 858510f66018SStephen M. Cameron 8586105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8587105a3dbcSRobert Elliott if (rc) 85882946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8589d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 85908947fd10SRobert Elliott if (rc) 85912946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8592105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8593105a3dbcSRobert Elliott if (rc) 85942946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8595a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 8596d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8597d604f533SWebb Scales mutex_init(&h->reset_mutex); 8598a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 859987b9e6aaSDon Brace h->scan_waiting = 0; 8600edd16368SStephen M. Cameron 8601edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 86029a41338eSStephen M. Cameron h->ndevices = 0; 86032946e82bSRobert Elliott 86049a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8605105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8606105a3dbcSRobert Elliott if (rc) 86072946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 86082946e82bSRobert Elliott 86092efa5929SRobert Elliott /* create the resubmit workqueue */ 86102efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 86112efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 86122efa5929SRobert Elliott rc = -ENOMEM; 86132efa5929SRobert Elliott goto clean7; 86142efa5929SRobert Elliott } 86152efa5929SRobert Elliott 86162efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 86172efa5929SRobert Elliott if (!h->resubmit_wq) { 86182efa5929SRobert Elliott rc = -ENOMEM; 86192efa5929SRobert Elliott goto clean7; /* aer/h */ 86202efa5929SRobert Elliott } 862164670ac8SStephen M. Cameron 8622105a3dbcSRobert Elliott /* 8623105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 862464670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 862564670ac8SStephen M. Cameron * the soft reset and see if that works. 862664670ac8SStephen M. Cameron */ 862764670ac8SStephen M. Cameron if (try_soft_reset) { 862864670ac8SStephen M. Cameron 862964670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 863064670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 863164670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 863264670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 863364670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 863464670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 863564670ac8SStephen M. Cameron */ 863664670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 863764670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 863864670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8639ec501a18SRobert Elliott hpsa_free_irqs(h); 86409ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 864164670ac8SStephen M. Cameron hpsa_intx_discard_completions); 864264670ac8SStephen M. Cameron if (rc) { 86439ee61794SRobert Elliott dev_warn(&h->pdev->dev, 86449ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8645d498757cSRobert Elliott /* 8646b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8647b2ef480cSRobert Elliott * again. Instead, do its work 8648b2ef480cSRobert Elliott */ 8649b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8650b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8651b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8652b2ef480cSRobert Elliott /* 8653b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8654b2ef480cSRobert Elliott * was just called before request_irqs failed 8655d498757cSRobert Elliott */ 8656d498757cSRobert Elliott goto clean3; 865764670ac8SStephen M. Cameron } 865864670ac8SStephen M. Cameron 865964670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 866064670ac8SStephen M. Cameron if (rc) 866164670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 86627ef7323fSDon Brace goto clean7; 866364670ac8SStephen M. Cameron 866464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 866564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 866664670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 866764670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 866864670ac8SStephen M. Cameron msleep(10000); 866964670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 867064670ac8SStephen M. Cameron 867164670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 867264670ac8SStephen M. Cameron if (rc) 867364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 867464670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 867564670ac8SStephen M. Cameron 867664670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 867764670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 867864670ac8SStephen M. Cameron * all over again. 867964670ac8SStephen M. Cameron */ 868064670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 868164670ac8SStephen M. Cameron try_soft_reset = 0; 868264670ac8SStephen M. Cameron if (rc) 8683b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 868464670ac8SStephen M. Cameron return -ENODEV; 868564670ac8SStephen M. Cameron 868664670ac8SStephen M. Cameron goto reinit_after_soft_reset; 868764670ac8SStephen M. Cameron } 8688edd16368SStephen M. Cameron 8689da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8690da0697bdSScott Teel h->acciopath_status = 1; 869134592254SScott Teel /* Disable discovery polling.*/ 869234592254SScott Teel h->discovery_polling = 0; 8693da0697bdSScott Teel 8694e863d68eSScott Teel 8695edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8696edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8697edd16368SStephen M. Cameron 8698339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 86998a98db73SStephen M. Cameron 870034592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 870134592254SScott Teel if (!h->lastlogicals) 870234592254SScott Teel dev_info(&h->pdev->dev, 870334592254SScott Teel "Can't track change to report lun data\n"); 870434592254SScott Teel 8705cf477237SDon Brace /* hook into SCSI subsystem */ 8706cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8707cf477237SDon Brace if (rc) 8708cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8709cf477237SDon Brace 87108a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 87118a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 87128a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 87138a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 87148a98db73SStephen M. Cameron h->heartbeat_sample_interval); 87156636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 87166636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 87176636e7f4SDon Brace h->heartbeat_sample_interval); 87183d38f00cSScott Teel INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 87193d38f00cSScott Teel schedule_delayed_work(&h->event_monitor_work, 87203d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 872188bf6d62SStephen M. Cameron return 0; 8722edd16368SStephen M. Cameron 87232946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8724105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8725105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8726105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 872733a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 87282946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 87292e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 87302946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8731ec501a18SRobert Elliott hpsa_free_irqs(h); 87322946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 87332946e82bSRobert Elliott scsi_host_put(h->scsi_host); 87342946e82bSRobert Elliott h->scsi_host = NULL; 87352946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8736195f2c65SRobert Elliott hpsa_free_pci_init(h); 87372946e82bSRobert Elliott clean2: /* lu, aer/h */ 8738105a3dbcSRobert Elliott if (h->lockup_detected) { 8739094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8740105a3dbcSRobert Elliott h->lockup_detected = NULL; 8741105a3dbcSRobert Elliott } 8742105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8743105a3dbcSRobert Elliott if (h->resubmit_wq) { 8744105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8745105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8746105a3dbcSRobert Elliott } 8747105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8748105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8749105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8750105a3dbcSRobert Elliott } 8751edd16368SStephen M. Cameron kfree(h); 8752ecd9aad4SStephen M. Cameron return rc; 8753edd16368SStephen M. Cameron } 8754edd16368SStephen M. Cameron 8755edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8756edd16368SStephen M. Cameron { 8757edd16368SStephen M. Cameron char *flush_buf; 8758edd16368SStephen M. Cameron struct CommandList *c; 875925163bd5SWebb Scales int rc; 8760702890e3SStephen M. Cameron 8761094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8762702890e3SStephen M. Cameron return; 8763edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8764edd16368SStephen M. Cameron if (!flush_buf) 8765edd16368SStephen M. Cameron return; 8766edd16368SStephen M. Cameron 876745fcb86eSStephen Cameron c = cmd_alloc(h); 8768bf43caf3SRobert Elliott 8769a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8770a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8771a2dac136SStephen M. Cameron goto out; 8772a2dac136SStephen M. Cameron } 877325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8774c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 877525163bd5SWebb Scales if (rc) 877625163bd5SWebb Scales goto out; 8777edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8778a2dac136SStephen M. Cameron out: 8779edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8780edd16368SStephen M. Cameron "error flushing cache on controller\n"); 878145fcb86eSStephen Cameron cmd_free(h, c); 8782edd16368SStephen M. Cameron kfree(flush_buf); 8783edd16368SStephen M. Cameron } 8784edd16368SStephen M. Cameron 8785c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8786c2adae44SScott Teel * send down a report luns request 8787c2adae44SScott Teel */ 8788c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8789c2adae44SScott Teel { 8790c2adae44SScott Teel u32 *options; 8791c2adae44SScott Teel struct CommandList *c; 8792c2adae44SScott Teel int rc; 8793c2adae44SScott Teel 8794c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8795c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8796c2adae44SScott Teel return; 8797c2adae44SScott Teel 8798c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 87997e8a9486SAmit Kushwaha if (!options) 8800c2adae44SScott Teel return; 8801c2adae44SScott Teel 8802c2adae44SScott Teel c = cmd_alloc(h); 8803c2adae44SScott Teel 8804c2adae44SScott Teel /* first, get the current diag options settings */ 8805c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8806c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8807c2adae44SScott Teel goto errout; 8808c2adae44SScott Teel 8809c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 88103026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8811c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8812c2adae44SScott Teel goto errout; 8813c2adae44SScott Teel 8814c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8815c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8816c2adae44SScott Teel 8817c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8818c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8819c2adae44SScott Teel goto errout; 8820c2adae44SScott Teel 8821c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 88223026ff9bSDon Brace PCI_DMA_TODEVICE, NO_TIMEOUT); 8823c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8824c2adae44SScott Teel goto errout; 8825c2adae44SScott Teel 8826c2adae44SScott Teel /* Now verify that it got set: */ 8827c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8828c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8829c2adae44SScott Teel goto errout; 8830c2adae44SScott Teel 8831c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 88323026ff9bSDon Brace PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8833c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8834c2adae44SScott Teel goto errout; 8835c2adae44SScott Teel 8836d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8837c2adae44SScott Teel goto out; 8838c2adae44SScott Teel 8839c2adae44SScott Teel errout: 8840c2adae44SScott Teel dev_err(&h->pdev->dev, 8841c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8842c2adae44SScott Teel out: 8843c2adae44SScott Teel cmd_free(h, c); 8844c2adae44SScott Teel kfree(options); 8845c2adae44SScott Teel } 8846c2adae44SScott Teel 8847edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8848edd16368SStephen M. Cameron { 8849edd16368SStephen M. Cameron struct ctlr_info *h; 8850edd16368SStephen M. Cameron 8851edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8852edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8853edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8854edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8855edd16368SStephen M. Cameron */ 8856edd16368SStephen M. Cameron hpsa_flush_cache(h); 8857edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8858105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8859cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8860edd16368SStephen M. Cameron } 8861edd16368SStephen M. Cameron 88626f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 886355e14e76SStephen M. Cameron { 886455e14e76SStephen M. Cameron int i; 886555e14e76SStephen M. Cameron 8866105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 886755e14e76SStephen M. Cameron kfree(h->dev[i]); 8868105a3dbcSRobert Elliott h->dev[i] = NULL; 8869105a3dbcSRobert Elliott } 887055e14e76SStephen M. Cameron } 887155e14e76SStephen M. Cameron 88726f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8873edd16368SStephen M. Cameron { 8874edd16368SStephen M. Cameron struct ctlr_info *h; 88758a98db73SStephen M. Cameron unsigned long flags; 8876edd16368SStephen M. Cameron 8877edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8878edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8879edd16368SStephen M. Cameron return; 8880edd16368SStephen M. Cameron } 8881edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 88828a98db73SStephen M. Cameron 88838a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 88848a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 88858a98db73SStephen M. Cameron h->remove_in_progress = 1; 88868a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 88876636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 88886636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 88893d38f00cSScott Teel cancel_delayed_work_sync(&h->event_monitor_work); 88906636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 88916636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8892cc64c817SRobert Elliott 8893dfb2e6f4SMartin Wilck hpsa_delete_sas_host(h); 8894dfb2e6f4SMartin Wilck 88952d041306SDon Brace /* 88962d041306SDon Brace * Call before disabling interrupts. 88972d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 88982d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 88992d041306SDon Brace * operations which cannot complete and will hang the system. 89002d041306SDon Brace */ 89012d041306SDon Brace if (h->scsi_host) 89022d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8903105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8904195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8905edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8906cc64c817SRobert Elliott 8907105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8908105a3dbcSRobert Elliott 89092946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 89102946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 89112946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8912105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8913105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 89141fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 891534592254SScott Teel kfree(h->lastlogicals); 8916105a3dbcSRobert Elliott 8917105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8918195f2c65SRobert Elliott 89192946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 89202946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 89212946e82bSRobert Elliott 8922195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 89232946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8924195f2c65SRobert Elliott 8925105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8926105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8927105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8928d04e62b9SKevin Barnett 8929105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8930edd16368SStephen M. Cameron } 8931edd16368SStephen M. Cameron 8932edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8933edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8934edd16368SStephen M. Cameron { 8935edd16368SStephen M. Cameron return -ENOSYS; 8936edd16368SStephen M. Cameron } 8937edd16368SStephen M. Cameron 8938edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8939edd16368SStephen M. Cameron { 8940edd16368SStephen M. Cameron return -ENOSYS; 8941edd16368SStephen M. Cameron } 8942edd16368SStephen M. Cameron 8943edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8944f79cfec6SStephen M. Cameron .name = HPSA, 8945edd16368SStephen M. Cameron .probe = hpsa_init_one, 89466f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8947edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8948edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8949edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8950edd16368SStephen M. Cameron .resume = hpsa_resume, 8951edd16368SStephen M. Cameron }; 8952edd16368SStephen M. Cameron 8953303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8954303932fdSDon Brace * scatter gather elements supported) and bucket[], 8955303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8956303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8957303932fdSDon Brace * byte increments) which the controller uses to fetch 8958303932fdSDon Brace * commands. This function fills in bucket_map[], which 8959303932fdSDon Brace * maps a given number of scatter gather elements to one of 8960303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8961303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8962303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8963303932fdSDon Brace * bits of the command address. 8964303932fdSDon Brace */ 8965303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 89662b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8967303932fdSDon Brace { 8968303932fdSDon Brace int i, j, b, size; 8969303932fdSDon Brace 8970303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8971303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8972303932fdSDon Brace /* Compute size of a command with i SG entries */ 8973e1f7de0cSMatt Gates size = i + min_blocks; 8974303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8975303932fdSDon Brace /* Find the bucket that is just big enough */ 8976e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8977303932fdSDon Brace if (bucket[j] >= size) { 8978303932fdSDon Brace b = j; 8979303932fdSDon Brace break; 8980303932fdSDon Brace } 8981303932fdSDon Brace } 8982303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8983303932fdSDon Brace bucket_map[i] = b; 8984303932fdSDon Brace } 8985303932fdSDon Brace } 8986303932fdSDon Brace 8987105a3dbcSRobert Elliott /* 8988105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8989105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8990105a3dbcSRobert Elliott */ 8991c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8992303932fdSDon Brace { 89936c311b57SStephen M. Cameron int i; 89946c311b57SStephen M. Cameron unsigned long register_value; 8995e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8996e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8997e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8998b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8999b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9000e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9001def342bdSStephen M. Cameron 9002def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9003def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9004def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9005def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9006def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9007def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9008def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9009def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9010def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9011def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9012d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9013def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9014def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9015def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9016def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9017def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9018def342bdSStephen M. Cameron */ 9019d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9020b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9021b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9022b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9023b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9024b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9025b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9026b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9027b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9028b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9029b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9030d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9031303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9032303932fdSDon Brace * 6 = 2 s/g entry or 8k 9033303932fdSDon Brace * 8 = 4 s/g entry or 16k 9034303932fdSDon Brace * 10 = 6 s/g entry or 24k 9035303932fdSDon Brace */ 9036303932fdSDon Brace 9037b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9038b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9039b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9040b3a52e79SStephen M. Cameron */ 9041b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9042b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9043b3a52e79SStephen M. Cameron 9044303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9045072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9046072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9047303932fdSDon Brace 9048d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9049d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9050e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9051303932fdSDon Brace for (i = 0; i < 8; i++) 9052303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9053303932fdSDon Brace 9054303932fdSDon Brace /* size of controller ring buffer */ 9055303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9056254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9057303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9058303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9059254f796bSMatt Gates 9060254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9061254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9062072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9063254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9064254f796bSMatt Gates } 9065254f796bSMatt Gates 9066b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9067e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9068e1f7de0cSMatt Gates /* 9069e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9070e1f7de0cSMatt Gates */ 9071e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9072e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9073e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9074e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 907596b6ce4eSDon Brace } else 907696b6ce4eSDon Brace if (trans_support & CFGTBL_Trans_io_accel2) 9077c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9078303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9079c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9080c706a795SRobert Elliott dev_err(&h->pdev->dev, 9081c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9082c706a795SRobert Elliott return -ENODEV; 9083c706a795SRobert Elliott } 9084303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9085303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9086050f7147SStephen Cameron dev_err(&h->pdev->dev, 9087050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9088c706a795SRobert Elliott return -ENODEV; 9089303932fdSDon Brace } 9090960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9091e1f7de0cSMatt Gates h->access = access; 9092e1f7de0cSMatt Gates h->transMethod = transMethod; 9093e1f7de0cSMatt Gates 9094b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9095b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9096c706a795SRobert Elliott return 0; 9097e1f7de0cSMatt Gates 9098b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9099e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9100e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9101e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9102e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9103e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9104e1f7de0cSMatt Gates } 9105283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9106283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9107e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9108e1f7de0cSMatt Gates 9109e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9110072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9111072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9112072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9113072b0518SStephen M. Cameron h->reply_queue_size); 9114e1f7de0cSMatt Gates 9115e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9116e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9117e1f7de0cSMatt Gates */ 9118e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9119e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9120e1f7de0cSMatt Gates 9121e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9122e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9123e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9124e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9125e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 91262b08b3e9SDon Brace cp->host_context_flags = 91272b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9128e1f7de0cSMatt Gates cp->timeout_sec = 0; 9129e1f7de0cSMatt Gates cp->ReplyQueue = 0; 913050a0decfSStephen M. Cameron cp->tag = 9131f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 913250a0decfSStephen M. Cameron cp->host_addr = 913350a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9134e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9135e1f7de0cSMatt Gates } 9136b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9137b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9138b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9139b9af4937SStephen M. Cameron int rc; 9140b9af4937SStephen M. Cameron 9141b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9142b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9143b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9144b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9145b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9146b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9147b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9148b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9149b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9150b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9151b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9152b9af4937SStephen M. Cameron cfg_base_addr_index) + 9153b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9154b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9155b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9156b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9157b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9158b9af4937SStephen M. Cameron } 9159b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9160c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9161c706a795SRobert Elliott dev_err(&h->pdev->dev, 9162c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9163c706a795SRobert Elliott return -ENODEV; 9164c706a795SRobert Elliott } 9165c706a795SRobert Elliott return 0; 9166e1f7de0cSMatt Gates } 9167e1f7de0cSMatt Gates 91681fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 91691fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 91701fb7c98aSRobert Elliott { 9171105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 91721fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 91731fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 91741fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 91751fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9176105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9177105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9178105a3dbcSRobert Elliott } 91791fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9180105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 91811fb7c98aSRobert Elliott } 91821fb7c98aSRobert Elliott 9183d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9184d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9185e1f7de0cSMatt Gates { 9186283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9187283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9188283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9189283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9190283b4a9bSStephen M. Cameron 9191e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9192e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9193e1f7de0cSMatt Gates * hardware. 9194e1f7de0cSMatt Gates */ 9195e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9196e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9197e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9198e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9199e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9200e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9201e1f7de0cSMatt Gates 9202e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9203283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9204e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9205e1f7de0cSMatt Gates 9206e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9207e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9208e1f7de0cSMatt Gates goto clean_up; 9209e1f7de0cSMatt Gates 9210e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9211e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9212e1f7de0cSMatt Gates return 0; 9213e1f7de0cSMatt Gates 9214e1f7de0cSMatt Gates clean_up: 92151fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 92162dd02d74SRobert Elliott return -ENOMEM; 92176c311b57SStephen M. Cameron } 92186c311b57SStephen M. Cameron 92191fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 92201fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 92211fb7c98aSRobert Elliott { 9222d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9223d9a729f3SWebb Scales 9224105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 92251fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 92261fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 92271fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 92281fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9229105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9230105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9231105a3dbcSRobert Elliott } 92321fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9233105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 92341fb7c98aSRobert Elliott } 92351fb7c98aSRobert Elliott 9236d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9237d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9238aca9012aSStephen M. Cameron { 9239d9a729f3SWebb Scales int rc; 9240d9a729f3SWebb Scales 9241aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9242aca9012aSStephen M. Cameron 9243aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9244aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9245aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9246aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9247aca9012aSStephen M. Cameron 9248aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9249aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9250aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9251aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9252aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9253aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9254aca9012aSStephen M. Cameron 9255aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9256aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9257aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9258aca9012aSStephen M. Cameron 9259aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9260d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9261d9a729f3SWebb Scales rc = -ENOMEM; 9262d9a729f3SWebb Scales goto clean_up; 9263d9a729f3SWebb Scales } 9264d9a729f3SWebb Scales 9265d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9266d9a729f3SWebb Scales if (rc) 9267aca9012aSStephen M. Cameron goto clean_up; 9268aca9012aSStephen M. Cameron 9269aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9270aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9271aca9012aSStephen M. Cameron return 0; 9272aca9012aSStephen M. Cameron 9273aca9012aSStephen M. Cameron clean_up: 92741fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9275d9a729f3SWebb Scales return rc; 9276aca9012aSStephen M. Cameron } 9277aca9012aSStephen M. Cameron 9278105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9279105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9280105a3dbcSRobert Elliott { 9281105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9282105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9283105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9284105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9285105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9286105a3dbcSRobert Elliott } 9287105a3dbcSRobert Elliott 9288105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9289105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9290105a3dbcSRobert Elliott */ 9291105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 92926c311b57SStephen M. Cameron { 92936c311b57SStephen M. Cameron u32 trans_support; 9294e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9295e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9296105a3dbcSRobert Elliott int i, rc; 92976c311b57SStephen M. Cameron 929802ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9299105a3dbcSRobert Elliott return 0; 930002ec19c8SStephen M. Cameron 930167c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 930267c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9303105a3dbcSRobert Elliott return 0; 930467c99a72Sscameron@beardog.cce.hp.com 9305e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9306e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9307e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9308e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9309105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9310105a3dbcSRobert Elliott if (rc) 9311105a3dbcSRobert Elliott return rc; 9312105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9313aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9314aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9315105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9316105a3dbcSRobert Elliott if (rc) 9317105a3dbcSRobert Elliott return rc; 9318e1f7de0cSMatt Gates } 9319e1f7de0cSMatt Gates 9320bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9321cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 93226c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9323072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 93246c311b57SStephen M. Cameron 9325254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9326072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9327072b0518SStephen M. Cameron h->reply_queue_size, 9328072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9329105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9330105a3dbcSRobert Elliott rc = -ENOMEM; 9331105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9332105a3dbcSRobert Elliott } 9333254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9334254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9335254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9336254f796bSMatt Gates } 9337254f796bSMatt Gates 93386c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9339d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 93406c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9341105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9342105a3dbcSRobert Elliott rc = -ENOMEM; 9343105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9344105a3dbcSRobert Elliott } 93456c311b57SStephen M. Cameron 9346105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9347105a3dbcSRobert Elliott if (rc) 9348105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9349105a3dbcSRobert Elliott return 0; 9350303932fdSDon Brace 9351105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9352303932fdSDon Brace kfree(h->blockFetchTable); 9353105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9354105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9355105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9356105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9357105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9358105a3dbcSRobert Elliott return rc; 9359303932fdSDon Brace } 9360303932fdSDon Brace 936123100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 936276438d08SStephen M. Cameron { 936323100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 936423100dd9SStephen M. Cameron } 936523100dd9SStephen M. Cameron 936623100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 936723100dd9SStephen M. Cameron { 936823100dd9SStephen M. Cameron struct CommandList *c = NULL; 9369f2405db8SDon Brace int i, accel_cmds_out; 9370281a7fd0SWebb Scales int refcount; 937176438d08SStephen M. Cameron 9372f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 937323100dd9SStephen M. Cameron accel_cmds_out = 0; 9374f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9375f2405db8SDon Brace c = h->cmd_pool + i; 9376281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9377281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 937823100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9379281a7fd0SWebb Scales cmd_free(h, c); 9380f2405db8SDon Brace } 938123100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 938276438d08SStephen M. Cameron break; 938376438d08SStephen M. Cameron msleep(100); 938476438d08SStephen M. Cameron } while (1); 938576438d08SStephen M. Cameron } 938676438d08SStephen M. Cameron 9387d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9388d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9389d04e62b9SKevin Barnett { 9390d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9391d04e62b9SKevin Barnett struct sas_phy *phy; 9392d04e62b9SKevin Barnett 9393d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9394d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9395d04e62b9SKevin Barnett return NULL; 9396d04e62b9SKevin Barnett 9397d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9398d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9399d04e62b9SKevin Barnett if (!phy) { 9400d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9401d04e62b9SKevin Barnett return NULL; 9402d04e62b9SKevin Barnett } 9403d04e62b9SKevin Barnett 9404d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9405d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9406d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9407d04e62b9SKevin Barnett 9408d04e62b9SKevin Barnett return hpsa_sas_phy; 9409d04e62b9SKevin Barnett } 9410d04e62b9SKevin Barnett 9411d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9412d04e62b9SKevin Barnett { 9413d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9414d04e62b9SKevin Barnett 9415d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9416d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9417d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 941855ca38b4SMartin Wilck sas_phy_delete(phy); 9419d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9420d04e62b9SKevin Barnett } 9421d04e62b9SKevin Barnett 9422d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9423d04e62b9SKevin Barnett { 9424d04e62b9SKevin Barnett int rc; 9425d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9426d04e62b9SKevin Barnett struct sas_phy *phy; 9427d04e62b9SKevin Barnett struct sas_identify *identify; 9428d04e62b9SKevin Barnett 9429d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9430d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9431d04e62b9SKevin Barnett 9432d04e62b9SKevin Barnett identify = &phy->identify; 9433d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9434d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9435d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9436d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9437d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9438d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9439d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9440d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9441d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9442d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9443d04e62b9SKevin Barnett 9444d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9445d04e62b9SKevin Barnett if (rc) 9446d04e62b9SKevin Barnett return rc; 9447d04e62b9SKevin Barnett 9448d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9449d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9450d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9451d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9452d04e62b9SKevin Barnett 9453d04e62b9SKevin Barnett return 0; 9454d04e62b9SKevin Barnett } 9455d04e62b9SKevin Barnett 9456d04e62b9SKevin Barnett static int 9457d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9458d04e62b9SKevin Barnett struct sas_rphy *rphy) 9459d04e62b9SKevin Barnett { 9460d04e62b9SKevin Barnett struct sas_identify *identify; 9461d04e62b9SKevin Barnett 9462d04e62b9SKevin Barnett identify = &rphy->identify; 9463d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9464d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9465d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9466d04e62b9SKevin Barnett 9467d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9468d04e62b9SKevin Barnett } 9469d04e62b9SKevin Barnett 9470d04e62b9SKevin Barnett static struct hpsa_sas_port 9471d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9472d04e62b9SKevin Barnett u64 sas_address) 9473d04e62b9SKevin Barnett { 9474d04e62b9SKevin Barnett int rc; 9475d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9476d04e62b9SKevin Barnett struct sas_port *port; 9477d04e62b9SKevin Barnett 9478d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9479d04e62b9SKevin Barnett if (!hpsa_sas_port) 9480d04e62b9SKevin Barnett return NULL; 9481d04e62b9SKevin Barnett 9482d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9483d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9484d04e62b9SKevin Barnett 9485d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9486d04e62b9SKevin Barnett if (!port) 9487d04e62b9SKevin Barnett goto free_hpsa_port; 9488d04e62b9SKevin Barnett 9489d04e62b9SKevin Barnett rc = sas_port_add(port); 9490d04e62b9SKevin Barnett if (rc) 9491d04e62b9SKevin Barnett goto free_sas_port; 9492d04e62b9SKevin Barnett 9493d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9494d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9495d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9496d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9497d04e62b9SKevin Barnett 9498d04e62b9SKevin Barnett return hpsa_sas_port; 9499d04e62b9SKevin Barnett 9500d04e62b9SKevin Barnett free_sas_port: 9501d04e62b9SKevin Barnett sas_port_free(port); 9502d04e62b9SKevin Barnett free_hpsa_port: 9503d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9504d04e62b9SKevin Barnett 9505d04e62b9SKevin Barnett return NULL; 9506d04e62b9SKevin Barnett } 9507d04e62b9SKevin Barnett 9508d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9509d04e62b9SKevin Barnett { 9510d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9511d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9512d04e62b9SKevin Barnett 9513d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9514d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9515d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9516d04e62b9SKevin Barnett 9517d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9518d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9519d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9520d04e62b9SKevin Barnett } 9521d04e62b9SKevin Barnett 9522d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9523d04e62b9SKevin Barnett { 9524d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9525d04e62b9SKevin Barnett 9526d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9527d04e62b9SKevin Barnett if (hpsa_sas_node) { 9528d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9529d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9530d04e62b9SKevin Barnett } 9531d04e62b9SKevin Barnett 9532d04e62b9SKevin Barnett return hpsa_sas_node; 9533d04e62b9SKevin Barnett } 9534d04e62b9SKevin Barnett 9535d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9536d04e62b9SKevin Barnett { 9537d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9538d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9539d04e62b9SKevin Barnett 9540d04e62b9SKevin Barnett if (!hpsa_sas_node) 9541d04e62b9SKevin Barnett return; 9542d04e62b9SKevin Barnett 9543d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9544d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9545d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9546d04e62b9SKevin Barnett 9547d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9548d04e62b9SKevin Barnett } 9549d04e62b9SKevin Barnett 9550d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9551d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9552d04e62b9SKevin Barnett struct sas_rphy *rphy) 9553d04e62b9SKevin Barnett { 9554d04e62b9SKevin Barnett int i; 9555d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9556d04e62b9SKevin Barnett 9557d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9558d04e62b9SKevin Barnett device = h->dev[i]; 9559d04e62b9SKevin Barnett if (!device->sas_port) 9560d04e62b9SKevin Barnett continue; 9561d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9562d04e62b9SKevin Barnett return device; 9563d04e62b9SKevin Barnett } 9564d04e62b9SKevin Barnett 9565d04e62b9SKevin Barnett return NULL; 9566d04e62b9SKevin Barnett } 9567d04e62b9SKevin Barnett 9568d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9569d04e62b9SKevin Barnett { 9570d04e62b9SKevin Barnett int rc; 9571d04e62b9SKevin Barnett struct device *parent_dev; 9572d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9573d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9574d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9575d04e62b9SKevin Barnett 9576*0a7c3bb8SDon Brace parent_dev = &h->scsi_host->shost_dev; 9577d04e62b9SKevin Barnett 9578d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9579d04e62b9SKevin Barnett if (!hpsa_sas_node) 9580d04e62b9SKevin Barnett return -ENOMEM; 9581d04e62b9SKevin Barnett 9582d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9583d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9584d04e62b9SKevin Barnett rc = -ENODEV; 9585d04e62b9SKevin Barnett goto free_sas_node; 9586d04e62b9SKevin Barnett } 9587d04e62b9SKevin Barnett 9588d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9589d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9590d04e62b9SKevin Barnett rc = -ENODEV; 9591d04e62b9SKevin Barnett goto free_sas_port; 9592d04e62b9SKevin Barnett } 9593d04e62b9SKevin Barnett 9594d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9595d04e62b9SKevin Barnett if (rc) 9596d04e62b9SKevin Barnett goto free_sas_phy; 9597d04e62b9SKevin Barnett 9598d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9599d04e62b9SKevin Barnett 9600d04e62b9SKevin Barnett return 0; 9601d04e62b9SKevin Barnett 9602d04e62b9SKevin Barnett free_sas_phy: 9603d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9604d04e62b9SKevin Barnett free_sas_port: 9605d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9606d04e62b9SKevin Barnett free_sas_node: 9607d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9608d04e62b9SKevin Barnett 9609d04e62b9SKevin Barnett return rc; 9610d04e62b9SKevin Barnett } 9611d04e62b9SKevin Barnett 9612d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9613d04e62b9SKevin Barnett { 9614d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9615d04e62b9SKevin Barnett } 9616d04e62b9SKevin Barnett 9617d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9618d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9619d04e62b9SKevin Barnett { 9620d04e62b9SKevin Barnett int rc; 9621d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9622d04e62b9SKevin Barnett struct sas_rphy *rphy; 9623d04e62b9SKevin Barnett 9624d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9625d04e62b9SKevin Barnett if (!hpsa_sas_port) 9626d04e62b9SKevin Barnett return -ENOMEM; 9627d04e62b9SKevin Barnett 9628d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9629d04e62b9SKevin Barnett if (!rphy) { 9630d04e62b9SKevin Barnett rc = -ENODEV; 9631d04e62b9SKevin Barnett goto free_sas_port; 9632d04e62b9SKevin Barnett } 9633d04e62b9SKevin Barnett 9634d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9635d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9636d04e62b9SKevin Barnett 9637d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9638d04e62b9SKevin Barnett if (rc) 9639d04e62b9SKevin Barnett goto free_sas_port; 9640d04e62b9SKevin Barnett 9641d04e62b9SKevin Barnett return 0; 9642d04e62b9SKevin Barnett 9643d04e62b9SKevin Barnett free_sas_port: 9644d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9645d04e62b9SKevin Barnett device->sas_port = NULL; 9646d04e62b9SKevin Barnett 9647d04e62b9SKevin Barnett return rc; 9648d04e62b9SKevin Barnett } 9649d04e62b9SKevin Barnett 9650d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9651d04e62b9SKevin Barnett { 9652d04e62b9SKevin Barnett if (device->sas_port) { 9653d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9654d04e62b9SKevin Barnett device->sas_port = NULL; 9655d04e62b9SKevin Barnett } 9656d04e62b9SKevin Barnett } 9657d04e62b9SKevin Barnett 9658d04e62b9SKevin Barnett static int 9659d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9660d04e62b9SKevin Barnett { 9661d04e62b9SKevin Barnett return 0; 9662d04e62b9SKevin Barnett } 9663d04e62b9SKevin Barnett 9664d04e62b9SKevin Barnett static int 9665d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9666d04e62b9SKevin Barnett { 9667*0a7c3bb8SDon Brace *identifier = rphy->identify.sas_address; 9668d04e62b9SKevin Barnett return 0; 9669d04e62b9SKevin Barnett } 9670d04e62b9SKevin Barnett 9671d04e62b9SKevin Barnett static int 9672d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9673d04e62b9SKevin Barnett { 9674d04e62b9SKevin Barnett return -ENXIO; 9675d04e62b9SKevin Barnett } 9676d04e62b9SKevin Barnett 9677d04e62b9SKevin Barnett static int 9678d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9679d04e62b9SKevin Barnett { 9680d04e62b9SKevin Barnett return 0; 9681d04e62b9SKevin Barnett } 9682d04e62b9SKevin Barnett 9683d04e62b9SKevin Barnett static int 9684d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9685d04e62b9SKevin Barnett { 9686d04e62b9SKevin Barnett return 0; 9687d04e62b9SKevin Barnett } 9688d04e62b9SKevin Barnett 9689d04e62b9SKevin Barnett static int 9690d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9691d04e62b9SKevin Barnett { 9692d04e62b9SKevin Barnett return 0; 9693d04e62b9SKevin Barnett } 9694d04e62b9SKevin Barnett 9695d04e62b9SKevin Barnett static void 9696d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9697d04e62b9SKevin Barnett { 9698d04e62b9SKevin Barnett } 9699d04e62b9SKevin Barnett 9700d04e62b9SKevin Barnett static int 9701d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9702d04e62b9SKevin Barnett { 9703d04e62b9SKevin Barnett return -EINVAL; 9704d04e62b9SKevin Barnett } 9705d04e62b9SKevin Barnett 9706d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9707d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9708d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9709d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9710d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9711d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9712d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9713d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9714d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9715d04e62b9SKevin Barnett }; 9716d04e62b9SKevin Barnett 9717edd16368SStephen M. Cameron /* 9718edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9719edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9720edd16368SStephen M. Cameron */ 9721edd16368SStephen M. Cameron static int __init hpsa_init(void) 9722edd16368SStephen M. Cameron { 9723d04e62b9SKevin Barnett int rc; 9724d04e62b9SKevin Barnett 9725d04e62b9SKevin Barnett hpsa_sas_transport_template = 9726d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9727d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9728d04e62b9SKevin Barnett return -ENODEV; 9729d04e62b9SKevin Barnett 9730d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9731d04e62b9SKevin Barnett 9732d04e62b9SKevin Barnett if (rc) 9733d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9734d04e62b9SKevin Barnett 9735d04e62b9SKevin Barnett return rc; 9736edd16368SStephen M. Cameron } 9737edd16368SStephen M. Cameron 9738edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9739edd16368SStephen M. Cameron { 9740edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9741d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9742edd16368SStephen M. Cameron } 9743edd16368SStephen M. Cameron 9744e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9745e1f7de0cSMatt Gates { 9746e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9747dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9748dd0e19f3SScott Teel 9749dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9750dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9751dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9752dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9753dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9754dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9755dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9756dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9757dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9758dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9759dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9760dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9761dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9762dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9763dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9764dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9765dd0e19f3SScott Teel 9766dd0e19f3SScott Teel #undef VERIFY_OFFSET 9767dd0e19f3SScott Teel 9768dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9769b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9770b66cc250SMike Miller 9771b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9772b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9773b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9774b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9775b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9776b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9777b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9778b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9779b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9780b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9781b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9782b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9783b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9784b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9785b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9786b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9787b66cc250SMike Miller 9788b66cc250SMike Miller #undef VERIFY_OFFSET 9789b66cc250SMike Miller 9790b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9791e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9792e1f7de0cSMatt Gates 9793e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9794e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9795e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9796e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9797e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9798e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9799e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9800e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9801e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9802e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9803e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9804e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9805e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9806e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9807e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9808e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9809e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9810e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9811e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9812e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9813e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9814e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 981550a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9816e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9817e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9818e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9819e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9820e1f7de0cSMatt Gates } 9821e1f7de0cSMatt Gates 9822edd16368SStephen M. Cameron module_init(hpsa_init); 9823edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9824