1 /* 2 * linux/drivers/scsi/esas2r/esas2r_init.c 3 * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers 4 * 5 * Copyright (c) 2001-2013 ATTO Technology, Inc. 6 * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 2 11 * of the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * NO WARRANTY 19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 23 * solely responsible for determining the appropriateness of using and 24 * distributing the Program and assumes all risks associated with its 25 * exercise of rights under this Agreement, including but not limited to 26 * the risks and costs of program errors, damage to or loss of data, 27 * programs or equipment, and unavailability or interruption of operations. 28 * 29 * DISCLAIMER OF LIABILITY 30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 37 * 38 * You should have received a copy of the GNU General Public License 39 * along with this program; if not, write to the Free Software 40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 41 * USA. 42 */ 43 44 #include "esas2r.h" 45 46 static bool esas2r_initmem_alloc(struct esas2r_adapter *a, 47 struct esas2r_mem_desc *mem_desc, 48 u32 align) 49 { 50 mem_desc->esas2r_param = mem_desc->size + align; 51 mem_desc->virt_addr = NULL; 52 mem_desc->phys_addr = 0; 53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, 54 (size_t)mem_desc-> 55 esas2r_param, 56 (dma_addr_t *)&mem_desc-> 57 phys_addr, 58 GFP_KERNEL); 59 60 if (mem_desc->esas2r_data == NULL) { 61 esas2r_log(ESAS2R_LOG_CRIT, 62 "failed to allocate %lu bytes of consistent memory!", 63 (long 64 unsigned 65 int)mem_desc->esas2r_param); 66 return false; 67 } 68 69 mem_desc->virt_addr = PTR_ALIGN(mem_desc->esas2r_data, align); 70 mem_desc->phys_addr = ALIGN(mem_desc->phys_addr, align); 71 memset(mem_desc->virt_addr, 0, mem_desc->size); 72 return true; 73 } 74 75 static void esas2r_initmem_free(struct esas2r_adapter *a, 76 struct esas2r_mem_desc *mem_desc) 77 { 78 if (mem_desc->virt_addr == NULL) 79 return; 80 81 /* 82 * Careful! phys_addr and virt_addr may have been adjusted from the 83 * original allocation in order to return the desired alignment. That 84 * means we have to use the original address (in esas2r_data) and size 85 * (esas2r_param) and calculate the original physical address based on 86 * the difference between the requested and actual allocation size. 87 */ 88 if (mem_desc->phys_addr) { 89 int unalign = ((u8 *)mem_desc->virt_addr) - 90 ((u8 *)mem_desc->esas2r_data); 91 92 dma_free_coherent(&a->pcid->dev, 93 (size_t)mem_desc->esas2r_param, 94 mem_desc->esas2r_data, 95 (dma_addr_t)(mem_desc->phys_addr - unalign)); 96 } else { 97 kfree(mem_desc->esas2r_data); 98 } 99 100 mem_desc->virt_addr = NULL; 101 } 102 103 static bool alloc_vda_req(struct esas2r_adapter *a, 104 struct esas2r_request *rq) 105 { 106 struct esas2r_mem_desc *memdesc = kzalloc( 107 sizeof(struct esas2r_mem_desc), GFP_KERNEL); 108 109 if (memdesc == NULL) { 110 esas2r_hdebug("could not alloc mem for vda request memdesc\n"); 111 return false; 112 } 113 114 memdesc->size = sizeof(union atto_vda_req) + 115 ESAS2R_DATA_BUF_LEN; 116 117 if (!esas2r_initmem_alloc(a, memdesc, 256)) { 118 esas2r_hdebug("could not alloc mem for vda request\n"); 119 kfree(memdesc); 120 return false; 121 } 122 123 a->num_vrqs++; 124 list_add(&memdesc->next_desc, &a->vrq_mds_head); 125 126 rq->vrq_md = memdesc; 127 rq->vrq = (union atto_vda_req *)memdesc->virt_addr; 128 rq->vrq->scsi.handle = a->num_vrqs; 129 130 return true; 131 } 132 133 static void esas2r_unmap_regions(struct esas2r_adapter *a) 134 { 135 if (a->regs) 136 iounmap((void __iomem *)a->regs); 137 138 a->regs = NULL; 139 140 pci_release_region(a->pcid, 2); 141 142 if (a->data_window) 143 iounmap((void __iomem *)a->data_window); 144 145 a->data_window = NULL; 146 147 pci_release_region(a->pcid, 0); 148 } 149 150 static int esas2r_map_regions(struct esas2r_adapter *a) 151 { 152 int error; 153 154 a->regs = NULL; 155 a->data_window = NULL; 156 157 error = pci_request_region(a->pcid, 2, a->name); 158 if (error != 0) { 159 esas2r_log(ESAS2R_LOG_CRIT, 160 "pci_request_region(2) failed, error %d", 161 error); 162 163 return error; 164 } 165 166 a->regs = (void __force *)ioremap(pci_resource_start(a->pcid, 2), 167 pci_resource_len(a->pcid, 2)); 168 if (a->regs == NULL) { 169 esas2r_log(ESAS2R_LOG_CRIT, 170 "ioremap failed for regs mem region\n"); 171 pci_release_region(a->pcid, 2); 172 return -EFAULT; 173 } 174 175 error = pci_request_region(a->pcid, 0, a->name); 176 if (error != 0) { 177 esas2r_log(ESAS2R_LOG_CRIT, 178 "pci_request_region(2) failed, error %d", 179 error); 180 esas2r_unmap_regions(a); 181 return error; 182 } 183 184 a->data_window = (void __force *)ioremap(pci_resource_start(a->pcid, 185 0), 186 pci_resource_len(a->pcid, 0)); 187 if (a->data_window == NULL) { 188 esas2r_log(ESAS2R_LOG_CRIT, 189 "ioremap failed for data_window mem region\n"); 190 esas2r_unmap_regions(a); 191 return -EFAULT; 192 } 193 194 return 0; 195 } 196 197 static void esas2r_setup_interrupts(struct esas2r_adapter *a, int intr_mode) 198 { 199 int i; 200 201 /* Set up interrupt mode based on the requested value */ 202 switch (intr_mode) { 203 case INTR_MODE_LEGACY: 204 use_legacy_interrupts: 205 a->intr_mode = INTR_MODE_LEGACY; 206 break; 207 208 case INTR_MODE_MSI: 209 i = pci_enable_msi(a->pcid); 210 if (i != 0) { 211 esas2r_log(ESAS2R_LOG_WARN, 212 "failed to enable MSI for adapter %d, " 213 "falling back to legacy interrupts " 214 "(err=%d)", a->index, 215 i); 216 goto use_legacy_interrupts; 217 } 218 a->intr_mode = INTR_MODE_MSI; 219 set_bit(AF2_MSI_ENABLED, &a->flags2); 220 break; 221 222 223 default: 224 esas2r_log(ESAS2R_LOG_WARN, 225 "unknown interrupt_mode %d requested, " 226 "falling back to legacy interrupt", 227 interrupt_mode); 228 goto use_legacy_interrupts; 229 } 230 } 231 232 static void esas2r_claim_interrupts(struct esas2r_adapter *a) 233 { 234 unsigned long flags = 0; 235 236 if (a->intr_mode == INTR_MODE_LEGACY) 237 flags |= IRQF_SHARED; 238 239 esas2r_log(ESAS2R_LOG_INFO, 240 "esas2r_claim_interrupts irq=%d (%p, %s, %lx)", 241 a->pcid->irq, a, a->name, flags); 242 243 if (request_irq(a->pcid->irq, 244 (a->intr_mode == 245 INTR_MODE_LEGACY) ? esas2r_interrupt : 246 esas2r_msi_interrupt, 247 flags, 248 a->name, 249 a)) { 250 esas2r_log(ESAS2R_LOG_CRIT, "unable to request IRQ %02X", 251 a->pcid->irq); 252 return; 253 } 254 255 set_bit(AF2_IRQ_CLAIMED, &a->flags2); 256 esas2r_log(ESAS2R_LOG_INFO, 257 "claimed IRQ %d flags: 0x%lx", 258 a->pcid->irq, flags); 259 } 260 261 int esas2r_init_adapter(struct Scsi_Host *host, struct pci_dev *pcid, 262 int index) 263 { 264 struct esas2r_adapter *a; 265 u64 bus_addr = 0; 266 int i; 267 void *next_uncached; 268 struct esas2r_request *first_request, *last_request; 269 bool dma64 = false; 270 271 if (index >= MAX_ADAPTERS) { 272 esas2r_log(ESAS2R_LOG_CRIT, 273 "tried to init invalid adapter index %u!", 274 index); 275 return 0; 276 } 277 278 if (esas2r_adapters[index]) { 279 esas2r_log(ESAS2R_LOG_CRIT, 280 "tried to init existing adapter index %u!", 281 index); 282 return 0; 283 } 284 285 a = (struct esas2r_adapter *)host->hostdata; 286 memset(a, 0, sizeof(struct esas2r_adapter)); 287 a->pcid = pcid; 288 a->host = host; 289 290 if (sizeof(dma_addr_t) > 4 && 291 dma_get_required_mask(&pcid->dev) > DMA_BIT_MASK(32) && 292 !dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(64))) 293 dma64 = true; 294 295 if (!dma64 && dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(32))) { 296 esas2r_log(ESAS2R_LOG_CRIT, "failed to set DMA mask"); 297 esas2r_kill_adapter(index); 298 return 0; 299 } 300 301 esas2r_log_dev(ESAS2R_LOG_INFO, &pcid->dev, 302 "%s-bit PCI addressing enabled\n", dma64 ? "64" : "32"); 303 304 esas2r_adapters[index] = a; 305 sprintf(a->name, ESAS2R_DRVR_NAME "_%02d", index); 306 esas2r_debug("new adapter %p, name %s", a, a->name); 307 spin_lock_init(&a->request_lock); 308 spin_lock_init(&a->fw_event_lock); 309 mutex_init(&a->fm_api_mutex); 310 mutex_init(&a->fs_api_mutex); 311 sema_init(&a->nvram_semaphore, 1); 312 313 esas2r_fw_event_off(a); 314 snprintf(a->fw_event_q_name, ESAS2R_KOBJ_NAME_LEN, "esas2r/%d", 315 a->index); 316 a->fw_event_q = create_singlethread_workqueue(a->fw_event_q_name); 317 318 init_waitqueue_head(&a->buffered_ioctl_waiter); 319 init_waitqueue_head(&a->nvram_waiter); 320 init_waitqueue_head(&a->fm_api_waiter); 321 init_waitqueue_head(&a->fs_api_waiter); 322 init_waitqueue_head(&a->vda_waiter); 323 324 INIT_LIST_HEAD(&a->general_req.req_list); 325 INIT_LIST_HEAD(&a->active_list); 326 INIT_LIST_HEAD(&a->defer_list); 327 INIT_LIST_HEAD(&a->free_sg_list_head); 328 INIT_LIST_HEAD(&a->avail_request); 329 INIT_LIST_HEAD(&a->vrq_mds_head); 330 INIT_LIST_HEAD(&a->fw_event_list); 331 332 first_request = (struct esas2r_request *)((u8 *)(a + 1)); 333 334 for (last_request = first_request, i = 1; i < num_requests; 335 last_request++, i++) { 336 INIT_LIST_HEAD(&last_request->req_list); 337 list_add_tail(&last_request->comp_list, &a->avail_request); 338 if (!alloc_vda_req(a, last_request)) { 339 esas2r_log(ESAS2R_LOG_CRIT, 340 "failed to allocate a VDA request!"); 341 esas2r_kill_adapter(index); 342 return 0; 343 } 344 } 345 346 esas2r_debug("requests: %p to %p (%d, %d)", first_request, 347 last_request, 348 sizeof(*first_request), 349 num_requests); 350 351 if (esas2r_map_regions(a) != 0) { 352 esas2r_log(ESAS2R_LOG_CRIT, "could not map PCI regions!"); 353 esas2r_kill_adapter(index); 354 return 0; 355 } 356 357 a->index = index; 358 359 /* interrupts will be disabled until we are done with init */ 360 atomic_inc(&a->dis_ints_cnt); 361 atomic_inc(&a->disable_cnt); 362 set_bit(AF_CHPRST_PENDING, &a->flags); 363 set_bit(AF_DISC_PENDING, &a->flags); 364 set_bit(AF_FIRST_INIT, &a->flags); 365 set_bit(AF_LEGACY_SGE_MODE, &a->flags); 366 367 a->init_msg = ESAS2R_INIT_MSG_START; 368 a->max_vdareq_size = 128; 369 a->build_sgl = esas2r_build_sg_list_sge; 370 371 esas2r_setup_interrupts(a, interrupt_mode); 372 373 a->uncached_size = esas2r_get_uncached_size(a); 374 a->uncached = dma_alloc_coherent(&pcid->dev, 375 (size_t)a->uncached_size, 376 (dma_addr_t *)&bus_addr, 377 GFP_KERNEL); 378 if (a->uncached == NULL) { 379 esas2r_log(ESAS2R_LOG_CRIT, 380 "failed to allocate %d bytes of consistent memory!", 381 a->uncached_size); 382 esas2r_kill_adapter(index); 383 return 0; 384 } 385 386 a->uncached_phys = bus_addr; 387 388 esas2r_debug("%d bytes uncached memory allocated @ %p (%x:%x)", 389 a->uncached_size, 390 a->uncached, 391 upper_32_bits(bus_addr), 392 lower_32_bits(bus_addr)); 393 memset(a->uncached, 0, a->uncached_size); 394 next_uncached = a->uncached; 395 396 if (!esas2r_init_adapter_struct(a, 397 &next_uncached)) { 398 esas2r_log(ESAS2R_LOG_CRIT, 399 "failed to initialize adapter structure (2)!"); 400 esas2r_kill_adapter(index); 401 return 0; 402 } 403 404 tasklet_init(&a->tasklet, 405 esas2r_adapter_tasklet, 406 (unsigned long)a); 407 408 /* 409 * Disable chip interrupts to prevent spurious interrupts 410 * until we claim the IRQ. 411 */ 412 esas2r_disable_chip_interrupts(a); 413 esas2r_check_adapter(a); 414 415 if (!esas2r_init_adapter_hw(a, true)) { 416 esas2r_log(ESAS2R_LOG_CRIT, "failed to initialize hardware!"); 417 } else { 418 esas2r_debug("esas2r_init_adapter ok"); 419 } 420 421 esas2r_claim_interrupts(a); 422 423 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) 424 esas2r_enable_chip_interrupts(a); 425 426 set_bit(AF2_INIT_DONE, &a->flags2); 427 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) 428 esas2r_kickoff_timer(a); 429 esas2r_debug("esas2r_init_adapter done for %p (%d)", 430 a, a->disable_cnt); 431 432 return 1; 433 } 434 435 static void esas2r_adapter_power_down(struct esas2r_adapter *a, 436 int power_management) 437 { 438 struct esas2r_mem_desc *memdesc, *next; 439 440 if ((test_bit(AF2_INIT_DONE, &a->flags2)) 441 && (!test_bit(AF_DEGRADED_MODE, &a->flags))) { 442 if (!power_management) { 443 del_timer_sync(&a->timer); 444 tasklet_kill(&a->tasklet); 445 } 446 esas2r_power_down(a); 447 448 /* 449 * There are versions of firmware that do not handle the sync 450 * cache command correctly. Stall here to ensure that the 451 * cache is lazily flushed. 452 */ 453 mdelay(500); 454 esas2r_debug("chip halted"); 455 } 456 457 /* Remove sysfs binary files */ 458 if (a->sysfs_fw_created) { 459 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fw); 460 a->sysfs_fw_created = 0; 461 } 462 463 if (a->sysfs_fs_created) { 464 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fs); 465 a->sysfs_fs_created = 0; 466 } 467 468 if (a->sysfs_vda_created) { 469 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_vda); 470 a->sysfs_vda_created = 0; 471 } 472 473 if (a->sysfs_hw_created) { 474 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_hw); 475 a->sysfs_hw_created = 0; 476 } 477 478 if (a->sysfs_live_nvram_created) { 479 sysfs_remove_bin_file(&a->host->shost_dev.kobj, 480 &bin_attr_live_nvram); 481 a->sysfs_live_nvram_created = 0; 482 } 483 484 if (a->sysfs_default_nvram_created) { 485 sysfs_remove_bin_file(&a->host->shost_dev.kobj, 486 &bin_attr_default_nvram); 487 a->sysfs_default_nvram_created = 0; 488 } 489 490 /* Clean up interrupts */ 491 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) { 492 esas2r_log_dev(ESAS2R_LOG_INFO, 493 &(a->pcid->dev), 494 "free_irq(%d) called", a->pcid->irq); 495 496 free_irq(a->pcid->irq, a); 497 esas2r_debug("IRQ released"); 498 clear_bit(AF2_IRQ_CLAIMED, &a->flags2); 499 } 500 501 if (test_bit(AF2_MSI_ENABLED, &a->flags2)) { 502 pci_disable_msi(a->pcid); 503 clear_bit(AF2_MSI_ENABLED, &a->flags2); 504 esas2r_debug("MSI disabled"); 505 } 506 507 if (a->inbound_list_md.virt_addr) 508 esas2r_initmem_free(a, &a->inbound_list_md); 509 510 if (a->outbound_list_md.virt_addr) 511 esas2r_initmem_free(a, &a->outbound_list_md); 512 513 list_for_each_entry_safe(memdesc, next, &a->free_sg_list_head, 514 next_desc) { 515 esas2r_initmem_free(a, memdesc); 516 } 517 518 /* Following frees everything allocated via alloc_vda_req */ 519 list_for_each_entry_safe(memdesc, next, &a->vrq_mds_head, next_desc) { 520 esas2r_initmem_free(a, memdesc); 521 list_del(&memdesc->next_desc); 522 kfree(memdesc); 523 } 524 525 kfree(a->first_ae_req); 526 a->first_ae_req = NULL; 527 528 kfree(a->sg_list_mds); 529 a->sg_list_mds = NULL; 530 531 kfree(a->req_table); 532 a->req_table = NULL; 533 534 if (a->regs) { 535 esas2r_unmap_regions(a); 536 a->regs = NULL; 537 a->data_window = NULL; 538 esas2r_debug("regions unmapped"); 539 } 540 } 541 542 /* Release/free allocated resources for specified adapters. */ 543 void esas2r_kill_adapter(int i) 544 { 545 struct esas2r_adapter *a = esas2r_adapters[i]; 546 547 if (a) { 548 unsigned long flags; 549 struct workqueue_struct *wq; 550 esas2r_debug("killing adapter %p [%d] ", a, i); 551 esas2r_fw_event_off(a); 552 esas2r_adapter_power_down(a, 0); 553 if (esas2r_buffered_ioctl && 554 (a->pcid == esas2r_buffered_ioctl_pcid)) { 555 dma_free_coherent(&a->pcid->dev, 556 (size_t)esas2r_buffered_ioctl_size, 557 esas2r_buffered_ioctl, 558 esas2r_buffered_ioctl_addr); 559 esas2r_buffered_ioctl = NULL; 560 } 561 562 if (a->vda_buffer) { 563 dma_free_coherent(&a->pcid->dev, 564 (size_t)VDA_MAX_BUFFER_SIZE, 565 a->vda_buffer, 566 (dma_addr_t)a->ppvda_buffer); 567 a->vda_buffer = NULL; 568 } 569 if (a->fs_api_buffer) { 570 dma_free_coherent(&a->pcid->dev, 571 (size_t)a->fs_api_buffer_size, 572 a->fs_api_buffer, 573 (dma_addr_t)a->ppfs_api_buffer); 574 a->fs_api_buffer = NULL; 575 } 576 577 kfree(a->local_atto_ioctl); 578 a->local_atto_ioctl = NULL; 579 580 spin_lock_irqsave(&a->fw_event_lock, flags); 581 wq = a->fw_event_q; 582 a->fw_event_q = NULL; 583 spin_unlock_irqrestore(&a->fw_event_lock, flags); 584 if (wq) 585 destroy_workqueue(wq); 586 587 if (a->uncached) { 588 dma_free_coherent(&a->pcid->dev, 589 (size_t)a->uncached_size, 590 a->uncached, 591 (dma_addr_t)a->uncached_phys); 592 a->uncached = NULL; 593 esas2r_debug("uncached area freed"); 594 } 595 596 esas2r_log_dev(ESAS2R_LOG_INFO, 597 &(a->pcid->dev), 598 "pci_disable_device() called. msix_enabled: %d " 599 "msi_enabled: %d irq: %d pin: %d", 600 a->pcid->msix_enabled, 601 a->pcid->msi_enabled, 602 a->pcid->irq, 603 a->pcid->pin); 604 605 esas2r_log_dev(ESAS2R_LOG_INFO, 606 &(a->pcid->dev), 607 "before pci_disable_device() enable_cnt: %d", 608 a->pcid->enable_cnt.counter); 609 610 pci_disable_device(a->pcid); 611 esas2r_log_dev(ESAS2R_LOG_INFO, 612 &(a->pcid->dev), 613 "after pci_disable_device() enable_cnt: %d", 614 a->pcid->enable_cnt.counter); 615 616 esas2r_log_dev(ESAS2R_LOG_INFO, 617 &(a->pcid->dev), 618 "pci_set_drv_data(%p, NULL) called", 619 a->pcid); 620 621 pci_set_drvdata(a->pcid, NULL); 622 esas2r_adapters[i] = NULL; 623 624 if (test_bit(AF2_INIT_DONE, &a->flags2)) { 625 clear_bit(AF2_INIT_DONE, &a->flags2); 626 627 set_bit(AF_DEGRADED_MODE, &a->flags); 628 629 esas2r_log_dev(ESAS2R_LOG_INFO, 630 &(a->host->shost_gendev), 631 "scsi_remove_host() called"); 632 633 scsi_remove_host(a->host); 634 635 esas2r_log_dev(ESAS2R_LOG_INFO, 636 &(a->host->shost_gendev), 637 "scsi_host_put() called"); 638 639 scsi_host_put(a->host); 640 } 641 } 642 } 643 644 int esas2r_suspend(struct pci_dev *pdev, pm_message_t state) 645 { 646 struct Scsi_Host *host = pci_get_drvdata(pdev); 647 u32 device_state; 648 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata; 649 650 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "suspending adapter()"); 651 if (!a) 652 return -ENODEV; 653 654 esas2r_adapter_power_down(a, 1); 655 device_state = pci_choose_state(pdev, state); 656 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 657 "pci_save_state() called"); 658 pci_save_state(pdev); 659 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 660 "pci_disable_device() called"); 661 pci_disable_device(pdev); 662 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 663 "pci_set_power_state() called"); 664 pci_set_power_state(pdev, device_state); 665 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "esas2r_suspend(): 0"); 666 return 0; 667 } 668 669 int esas2r_resume(struct pci_dev *pdev) 670 { 671 struct Scsi_Host *host = pci_get_drvdata(pdev); 672 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata; 673 int rez; 674 675 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "resuming adapter()"); 676 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 677 "pci_set_power_state(PCI_D0) " 678 "called"); 679 pci_set_power_state(pdev, PCI_D0); 680 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 681 "pci_restore_state() called"); 682 pci_restore_state(pdev); 683 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 684 "pci_enable_device() called"); 685 rez = pci_enable_device(pdev); 686 pci_set_master(pdev); 687 688 if (!a) { 689 rez = -ENODEV; 690 goto error_exit; 691 } 692 693 if (esas2r_map_regions(a) != 0) { 694 esas2r_log(ESAS2R_LOG_CRIT, "could not re-map PCI regions!"); 695 rez = -ENOMEM; 696 goto error_exit; 697 } 698 699 /* Set up interupt mode */ 700 esas2r_setup_interrupts(a, a->intr_mode); 701 702 /* 703 * Disable chip interrupts to prevent spurious interrupts until we 704 * claim the IRQ. 705 */ 706 esas2r_disable_chip_interrupts(a); 707 if (!esas2r_power_up(a, true)) { 708 esas2r_debug("yikes, esas2r_power_up failed"); 709 rez = -ENOMEM; 710 goto error_exit; 711 } 712 713 esas2r_claim_interrupts(a); 714 715 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) { 716 /* 717 * Now that system interrupt(s) are claimed, we can enable 718 * chip interrupts. 719 */ 720 esas2r_enable_chip_interrupts(a); 721 esas2r_kickoff_timer(a); 722 } else { 723 esas2r_debug("yikes, unable to claim IRQ"); 724 esas2r_log(ESAS2R_LOG_CRIT, "could not re-claim IRQ!"); 725 rez = -ENOMEM; 726 goto error_exit; 727 } 728 729 error_exit: 730 esas2r_log_dev(ESAS2R_LOG_CRIT, &(pdev->dev), "esas2r_resume(): %d", 731 rez); 732 return rez; 733 } 734 735 bool esas2r_set_degraded_mode(struct esas2r_adapter *a, char *error_str) 736 { 737 set_bit(AF_DEGRADED_MODE, &a->flags); 738 esas2r_log(ESAS2R_LOG_CRIT, 739 "setting adapter to degraded mode: %s\n", error_str); 740 return false; 741 } 742 743 u32 esas2r_get_uncached_size(struct esas2r_adapter *a) 744 { 745 return sizeof(struct esas2r_sas_nvram) 746 + ALIGN(ESAS2R_DISC_BUF_LEN, 8) 747 + ALIGN(sizeof(u32), 8) /* outbound list copy pointer */ 748 + 8 749 + (num_sg_lists * (u16)sgl_page_size) 750 + ALIGN((num_requests + num_ae_requests + 1 + 751 ESAS2R_LIST_EXTRA) * 752 sizeof(struct esas2r_inbound_list_source_entry), 753 8) 754 + ALIGN((num_requests + num_ae_requests + 1 + 755 ESAS2R_LIST_EXTRA) * 756 sizeof(struct atto_vda_ob_rsp), 8) 757 + 256; /* VDA request and buffer align */ 758 } 759 760 static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a) 761 { 762 if (pci_is_pcie(a->pcid)) { 763 u16 devcontrol; 764 765 pcie_capability_read_word(a->pcid, PCI_EXP_DEVCTL, &devcontrol); 766 767 if ((devcontrol & PCI_EXP_DEVCTL_READRQ) > 768 PCI_EXP_DEVCTL_READRQ_512B) { 769 esas2r_log(ESAS2R_LOG_INFO, 770 "max read request size > 512B"); 771 772 devcontrol &= ~PCI_EXP_DEVCTL_READRQ; 773 devcontrol |= PCI_EXP_DEVCTL_READRQ_512B; 774 pcie_capability_write_word(a->pcid, PCI_EXP_DEVCTL, 775 devcontrol); 776 } 777 } 778 } 779 780 /* 781 * Determine the organization of the uncached data area and 782 * finish initializing the adapter structure 783 */ 784 bool esas2r_init_adapter_struct(struct esas2r_adapter *a, 785 void **uncached_area) 786 { 787 u32 i; 788 u8 *high; 789 struct esas2r_inbound_list_source_entry *element; 790 struct esas2r_request *rq; 791 struct esas2r_mem_desc *sgl; 792 793 spin_lock_init(&a->sg_list_lock); 794 spin_lock_init(&a->mem_lock); 795 spin_lock_init(&a->queue_lock); 796 797 a->targetdb_end = &a->targetdb[ESAS2R_MAX_TARGETS]; 798 799 if (!alloc_vda_req(a, &a->general_req)) { 800 esas2r_hdebug( 801 "failed to allocate a VDA request for the general req!"); 802 return false; 803 } 804 805 /* allocate requests for asynchronous events */ 806 a->first_ae_req = 807 kcalloc(num_ae_requests, sizeof(struct esas2r_request), 808 GFP_KERNEL); 809 810 if (a->first_ae_req == NULL) { 811 esas2r_log(ESAS2R_LOG_CRIT, 812 "failed to allocate memory for asynchronous events"); 813 return false; 814 } 815 816 /* allocate the S/G list memory descriptors */ 817 a->sg_list_mds = kcalloc(num_sg_lists, sizeof(struct esas2r_mem_desc), 818 GFP_KERNEL); 819 820 if (a->sg_list_mds == NULL) { 821 esas2r_log(ESAS2R_LOG_CRIT, 822 "failed to allocate memory for s/g list descriptors"); 823 return false; 824 } 825 826 /* allocate the request table */ 827 a->req_table = 828 kcalloc(num_requests + num_ae_requests + 1, 829 sizeof(struct esas2r_request *), 830 GFP_KERNEL); 831 832 if (a->req_table == NULL) { 833 esas2r_log(ESAS2R_LOG_CRIT, 834 "failed to allocate memory for the request table"); 835 return false; 836 } 837 838 /* initialize PCI configuration space */ 839 esas2r_init_pci_cfg_space(a); 840 841 /* 842 * the thunder_stream boards all have a serial flash part that has a 843 * different base address on the AHB bus. 844 */ 845 if ((a->pcid->subsystem_vendor == ATTO_VENDOR_ID) 846 && (a->pcid->subsystem_device & ATTO_SSDID_TBT)) 847 a->flags2 |= AF2_THUNDERBOLT; 848 849 if (test_bit(AF2_THUNDERBOLT, &a->flags2)) 850 a->flags2 |= AF2_SERIAL_FLASH; 851 852 if (a->pcid->subsystem_device == ATTO_TLSH_1068) 853 a->flags2 |= AF2_THUNDERLINK; 854 855 /* Uncached Area */ 856 high = (u8 *)*uncached_area; 857 858 /* initialize the scatter/gather table pages */ 859 860 for (i = 0, sgl = a->sg_list_mds; i < num_sg_lists; i++, sgl++) { 861 sgl->size = sgl_page_size; 862 863 list_add_tail(&sgl->next_desc, &a->free_sg_list_head); 864 865 if (!esas2r_initmem_alloc(a, sgl, ESAS2R_SGL_ALIGN)) { 866 /* Allow the driver to load if the minimum count met. */ 867 if (i < NUM_SGL_MIN) 868 return false; 869 break; 870 } 871 } 872 873 /* compute the size of the lists */ 874 a->list_size = num_requests + ESAS2R_LIST_EXTRA; 875 876 /* allocate the inbound list */ 877 a->inbound_list_md.size = a->list_size * 878 sizeof(struct 879 esas2r_inbound_list_source_entry); 880 881 if (!esas2r_initmem_alloc(a, &a->inbound_list_md, ESAS2R_LIST_ALIGN)) { 882 esas2r_hdebug("failed to allocate IB list"); 883 return false; 884 } 885 886 /* allocate the outbound list */ 887 a->outbound_list_md.size = a->list_size * 888 sizeof(struct atto_vda_ob_rsp); 889 890 if (!esas2r_initmem_alloc(a, &a->outbound_list_md, 891 ESAS2R_LIST_ALIGN)) { 892 esas2r_hdebug("failed to allocate IB list"); 893 return false; 894 } 895 896 /* allocate the NVRAM structure */ 897 a->nvram = (struct esas2r_sas_nvram *)high; 898 high += sizeof(struct esas2r_sas_nvram); 899 900 /* allocate the discovery buffer */ 901 a->disc_buffer = high; 902 high += ESAS2R_DISC_BUF_LEN; 903 high = PTR_ALIGN(high, 8); 904 905 /* allocate the outbound list copy pointer */ 906 a->outbound_copy = (u32 volatile *)high; 907 high += sizeof(u32); 908 909 if (!test_bit(AF_NVR_VALID, &a->flags)) 910 esas2r_nvram_set_defaults(a); 911 912 /* update the caller's uncached memory area pointer */ 913 *uncached_area = (void *)high; 914 915 /* initialize the allocated memory */ 916 if (test_bit(AF_FIRST_INIT, &a->flags)) { 917 esas2r_targ_db_initialize(a); 918 919 /* prime parts of the inbound list */ 920 element = 921 (struct esas2r_inbound_list_source_entry *)a-> 922 inbound_list_md. 923 virt_addr; 924 925 for (i = 0; i < a->list_size; i++) { 926 element->address = 0; 927 element->reserved = 0; 928 element->length = cpu_to_le32(HWILSE_INTERFACE_F0 929 | (sizeof(union 930 atto_vda_req) 931 / 932 sizeof(u32))); 933 element++; 934 } 935 936 /* init the AE requests */ 937 for (rq = a->first_ae_req, i = 0; i < num_ae_requests; rq++, 938 i++) { 939 INIT_LIST_HEAD(&rq->req_list); 940 if (!alloc_vda_req(a, rq)) { 941 esas2r_hdebug( 942 "failed to allocate a VDA request!"); 943 return false; 944 } 945 946 esas2r_rq_init_request(rq, a); 947 948 /* override the completion function */ 949 rq->comp_cb = esas2r_ae_complete; 950 } 951 } 952 953 return true; 954 } 955 956 /* This code will verify that the chip is operational. */ 957 bool esas2r_check_adapter(struct esas2r_adapter *a) 958 { 959 u32 starttime; 960 u32 doorbell; 961 u64 ppaddr; 962 u32 dw; 963 964 /* 965 * if the chip reset detected flag is set, we can bypass a bunch of 966 * stuff. 967 */ 968 if (test_bit(AF_CHPRST_DETECTED, &a->flags)) 969 goto skip_chip_reset; 970 971 /* 972 * BEFORE WE DO ANYTHING, disable the chip interrupts! the boot driver 973 * may have left them enabled or we may be recovering from a fault. 974 */ 975 esas2r_write_register_dword(a, MU_INT_MASK_OUT, ESAS2R_INT_DIS_MASK); 976 esas2r_flush_register_dword(a, MU_INT_MASK_OUT); 977 978 /* 979 * wait for the firmware to become ready by forcing an interrupt and 980 * waiting for a response. 981 */ 982 starttime = jiffies_to_msecs(jiffies); 983 984 while (true) { 985 esas2r_force_interrupt(a); 986 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 987 if (doorbell == 0xFFFFFFFF) { 988 /* 989 * Give the firmware up to two seconds to enable 990 * register access after a reset. 991 */ 992 if ((jiffies_to_msecs(jiffies) - starttime) > 2000) 993 return esas2r_set_degraded_mode(a, 994 "unable to access registers"); 995 } else if (doorbell & DRBL_FORCE_INT) { 996 u32 ver = (doorbell & DRBL_FW_VER_MSK); 997 998 /* 999 * This driver supports version 0 and version 1 of 1000 * the API 1001 */ 1002 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1003 doorbell); 1004 1005 if (ver == DRBL_FW_VER_0) { 1006 set_bit(AF_LEGACY_SGE_MODE, &a->flags); 1007 1008 a->max_vdareq_size = 128; 1009 a->build_sgl = esas2r_build_sg_list_sge; 1010 } else if (ver == DRBL_FW_VER_1) { 1011 clear_bit(AF_LEGACY_SGE_MODE, &a->flags); 1012 1013 a->max_vdareq_size = 1024; 1014 a->build_sgl = esas2r_build_sg_list_prd; 1015 } else { 1016 return esas2r_set_degraded_mode(a, 1017 "unknown firmware version"); 1018 } 1019 break; 1020 } 1021 1022 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1023 1024 if ((jiffies_to_msecs(jiffies) - starttime) > 180000) { 1025 esas2r_hdebug("FW ready TMO"); 1026 esas2r_bugon(); 1027 1028 return esas2r_set_degraded_mode(a, 1029 "firmware start has timed out"); 1030 } 1031 } 1032 1033 /* purge any asynchronous events since we will repost them later */ 1034 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_DOWN); 1035 starttime = jiffies_to_msecs(jiffies); 1036 1037 while (true) { 1038 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1039 if (doorbell & DRBL_MSG_IFC_DOWN) { 1040 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1041 doorbell); 1042 break; 1043 } 1044 1045 schedule_timeout_interruptible(msecs_to_jiffies(50)); 1046 1047 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1048 esas2r_hdebug("timeout waiting for interface down"); 1049 break; 1050 } 1051 } 1052 skip_chip_reset: 1053 /* 1054 * first things first, before we go changing any of these registers 1055 * disable the communication lists. 1056 */ 1057 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); 1058 dw &= ~MU_ILC_ENABLE; 1059 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); 1060 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); 1061 dw &= ~MU_OLC_ENABLE; 1062 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); 1063 1064 /* configure the communication list addresses */ 1065 ppaddr = a->inbound_list_md.phys_addr; 1066 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_LO, 1067 lower_32_bits(ppaddr)); 1068 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_HI, 1069 upper_32_bits(ppaddr)); 1070 ppaddr = a->outbound_list_md.phys_addr; 1071 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_LO, 1072 lower_32_bits(ppaddr)); 1073 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_HI, 1074 upper_32_bits(ppaddr)); 1075 ppaddr = a->uncached_phys + 1076 ((u8 *)a->outbound_copy - a->uncached); 1077 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_LO, 1078 lower_32_bits(ppaddr)); 1079 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_HI, 1080 upper_32_bits(ppaddr)); 1081 1082 /* reset the read and write pointers */ 1083 *a->outbound_copy = 1084 a->last_write = 1085 a->last_read = a->list_size - 1; 1086 set_bit(AF_COMM_LIST_TOGGLE, &a->flags); 1087 esas2r_write_register_dword(a, MU_IN_LIST_WRITE, MU_ILW_TOGGLE | 1088 a->last_write); 1089 esas2r_write_register_dword(a, MU_OUT_LIST_COPY, MU_OLC_TOGGLE | 1090 a->last_write); 1091 esas2r_write_register_dword(a, MU_IN_LIST_READ, MU_ILR_TOGGLE | 1092 a->last_write); 1093 esas2r_write_register_dword(a, MU_OUT_LIST_WRITE, 1094 MU_OLW_TOGGLE | a->last_write); 1095 1096 /* configure the interface select fields */ 1097 dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG); 1098 dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST); 1099 esas2r_write_register_dword(a, MU_IN_LIST_IFC_CONFIG, 1100 (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR)); 1101 dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG); 1102 dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE); 1103 esas2r_write_register_dword(a, MU_OUT_LIST_IFC_CONFIG, 1104 (dw | MU_OLIC_LIST_F0 | 1105 MU_OLIC_SOURCE_DDR)); 1106 1107 /* finish configuring the communication lists */ 1108 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); 1109 dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK); 1110 dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC 1111 | (a->list_size << MU_ILC_NUMBER_SHIFT); 1112 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); 1113 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); 1114 dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK); 1115 dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT); 1116 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); 1117 1118 /* 1119 * notify the firmware that we're done setting up the communication 1120 * list registers. wait here until the firmware is done configuring 1121 * its lists. it will signal that it is done by enabling the lists. 1122 */ 1123 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_INIT); 1124 starttime = jiffies_to_msecs(jiffies); 1125 1126 while (true) { 1127 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1128 if (doorbell & DRBL_MSG_IFC_INIT) { 1129 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1130 doorbell); 1131 break; 1132 } 1133 1134 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1135 1136 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1137 esas2r_hdebug( 1138 "timeout waiting for communication list init"); 1139 esas2r_bugon(); 1140 return esas2r_set_degraded_mode(a, 1141 "timeout waiting for communication list init"); 1142 } 1143 } 1144 1145 /* 1146 * flag whether the firmware supports the power down doorbell. we 1147 * determine this by reading the inbound doorbell enable mask. 1148 */ 1149 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_IN_ENB); 1150 if (doorbell & DRBL_POWER_DOWN) 1151 set_bit(AF2_VDA_POWER_DOWN, &a->flags2); 1152 else 1153 clear_bit(AF2_VDA_POWER_DOWN, &a->flags2); 1154 1155 /* 1156 * enable assertion of outbound queue and doorbell interrupts in the 1157 * main interrupt cause register. 1158 */ 1159 esas2r_write_register_dword(a, MU_OUT_LIST_INT_MASK, MU_OLIS_MASK); 1160 esas2r_write_register_dword(a, MU_DOORBELL_OUT_ENB, DRBL_ENB_MASK); 1161 return true; 1162 } 1163 1164 /* Process the initialization message just completed and format the next one. */ 1165 static bool esas2r_format_init_msg(struct esas2r_adapter *a, 1166 struct esas2r_request *rq) 1167 { 1168 u32 msg = a->init_msg; 1169 struct atto_vda_cfg_init *ci; 1170 1171 a->init_msg = 0; 1172 1173 switch (msg) { 1174 case ESAS2R_INIT_MSG_START: 1175 case ESAS2R_INIT_MSG_REINIT: 1176 { 1177 esas2r_hdebug("CFG init"); 1178 esas2r_build_cfg_req(a, 1179 rq, 1180 VDA_CFG_INIT, 1181 0, 1182 NULL); 1183 ci = (struct atto_vda_cfg_init *)&rq->vrq->cfg.data.init; 1184 ci->sgl_page_size = cpu_to_le32(sgl_page_size); 1185 /* firmware interface overflows in y2106 */ 1186 ci->epoch_time = cpu_to_le32(ktime_get_real_seconds()); 1187 rq->flags |= RF_FAILURE_OK; 1188 a->init_msg = ESAS2R_INIT_MSG_INIT; 1189 break; 1190 } 1191 1192 case ESAS2R_INIT_MSG_INIT: 1193 if (rq->req_stat == RS_SUCCESS) { 1194 u32 major; 1195 u32 minor; 1196 u16 fw_release; 1197 1198 a->fw_version = le16_to_cpu( 1199 rq->func_rsp.cfg_rsp.vda_version); 1200 a->fw_build = rq->func_rsp.cfg_rsp.fw_build; 1201 fw_release = le16_to_cpu( 1202 rq->func_rsp.cfg_rsp.fw_release); 1203 major = LOBYTE(fw_release); 1204 minor = HIBYTE(fw_release); 1205 a->fw_version += (major << 16) + (minor << 24); 1206 } else { 1207 esas2r_hdebug("FAILED"); 1208 } 1209 1210 /* 1211 * the 2.71 and earlier releases of R6xx firmware did not error 1212 * unsupported config requests correctly. 1213 */ 1214 1215 if ((test_bit(AF2_THUNDERBOLT, &a->flags2)) 1216 || (be32_to_cpu(a->fw_version) > 0x00524702)) { 1217 esas2r_hdebug("CFG get init"); 1218 esas2r_build_cfg_req(a, 1219 rq, 1220 VDA_CFG_GET_INIT2, 1221 sizeof(struct atto_vda_cfg_init), 1222 NULL); 1223 1224 rq->vrq->cfg.sg_list_offset = offsetof( 1225 struct atto_vda_cfg_req, 1226 data.sge); 1227 rq->vrq->cfg.data.prde.ctl_len = 1228 cpu_to_le32(sizeof(struct atto_vda_cfg_init)); 1229 rq->vrq->cfg.data.prde.address = cpu_to_le64( 1230 rq->vrq_md->phys_addr + 1231 sizeof(union atto_vda_req)); 1232 rq->flags |= RF_FAILURE_OK; 1233 a->init_msg = ESAS2R_INIT_MSG_GET_INIT; 1234 break; 1235 } 1236 fallthrough; 1237 1238 case ESAS2R_INIT_MSG_GET_INIT: 1239 if (msg == ESAS2R_INIT_MSG_GET_INIT) { 1240 ci = (struct atto_vda_cfg_init *)rq->data_buf; 1241 if (rq->req_stat == RS_SUCCESS) { 1242 a->num_targets_backend = 1243 le32_to_cpu(ci->num_targets_backend); 1244 a->ioctl_tunnel = 1245 le32_to_cpu(ci->ioctl_tunnel); 1246 } else { 1247 esas2r_hdebug("FAILED"); 1248 } 1249 } 1250 fallthrough; 1251 1252 default: 1253 rq->req_stat = RS_SUCCESS; 1254 return false; 1255 } 1256 return true; 1257 } 1258 1259 /* 1260 * Perform initialization messages via the request queue. Messages are 1261 * performed with interrupts disabled. 1262 */ 1263 bool esas2r_init_msgs(struct esas2r_adapter *a) 1264 { 1265 bool success = true; 1266 struct esas2r_request *rq = &a->general_req; 1267 1268 esas2r_rq_init_request(rq, a); 1269 rq->comp_cb = esas2r_dummy_complete; 1270 1271 if (a->init_msg == 0) 1272 a->init_msg = ESAS2R_INIT_MSG_REINIT; 1273 1274 while (a->init_msg) { 1275 if (esas2r_format_init_msg(a, rq)) { 1276 unsigned long flags; 1277 while (true) { 1278 spin_lock_irqsave(&a->queue_lock, flags); 1279 esas2r_start_vda_request(a, rq); 1280 spin_unlock_irqrestore(&a->queue_lock, flags); 1281 esas2r_wait_request(a, rq); 1282 if (rq->req_stat != RS_PENDING) 1283 break; 1284 } 1285 } 1286 1287 if (rq->req_stat == RS_SUCCESS 1288 || ((rq->flags & RF_FAILURE_OK) 1289 && rq->req_stat != RS_TIMEOUT)) 1290 continue; 1291 1292 esas2r_log(ESAS2R_LOG_CRIT, "init message %x failed (%x, %x)", 1293 a->init_msg, rq->req_stat, rq->flags); 1294 a->init_msg = ESAS2R_INIT_MSG_START; 1295 success = false; 1296 break; 1297 } 1298 1299 esas2r_rq_destroy_request(rq, a); 1300 return success; 1301 } 1302 1303 /* Initialize the adapter chip */ 1304 bool esas2r_init_adapter_hw(struct esas2r_adapter *a, bool init_poll) 1305 { 1306 bool rslt = false; 1307 struct esas2r_request *rq; 1308 u32 i; 1309 1310 if (test_bit(AF_DEGRADED_MODE, &a->flags)) 1311 goto exit; 1312 1313 if (!test_bit(AF_NVR_VALID, &a->flags)) { 1314 if (!esas2r_nvram_read_direct(a)) 1315 esas2r_log(ESAS2R_LOG_WARN, 1316 "invalid/missing NVRAM parameters"); 1317 } 1318 1319 if (!esas2r_init_msgs(a)) { 1320 esas2r_set_degraded_mode(a, "init messages failed"); 1321 goto exit; 1322 } 1323 1324 /* The firmware is ready. */ 1325 clear_bit(AF_DEGRADED_MODE, &a->flags); 1326 clear_bit(AF_CHPRST_PENDING, &a->flags); 1327 1328 /* Post all the async event requests */ 1329 for (i = 0, rq = a->first_ae_req; i < num_ae_requests; i++, rq++) 1330 esas2r_start_ae_request(a, rq); 1331 1332 if (!a->flash_rev[0]) 1333 esas2r_read_flash_rev(a); 1334 1335 if (!a->image_type[0]) 1336 esas2r_read_image_type(a); 1337 1338 if (a->fw_version == 0) 1339 a->fw_rev[0] = 0; 1340 else 1341 sprintf(a->fw_rev, "%1d.%02d", 1342 (int)LOBYTE(HIWORD(a->fw_version)), 1343 (int)HIBYTE(HIWORD(a->fw_version))); 1344 1345 esas2r_hdebug("firmware revision: %s", a->fw_rev); 1346 1347 if (test_bit(AF_CHPRST_DETECTED, &a->flags) 1348 && (test_bit(AF_FIRST_INIT, &a->flags))) { 1349 esas2r_enable_chip_interrupts(a); 1350 return true; 1351 } 1352 1353 /* initialize discovery */ 1354 esas2r_disc_initialize(a); 1355 1356 /* 1357 * wait for the device wait time to expire here if requested. this is 1358 * usually requested during initial driver load and possibly when 1359 * resuming from a low power state. deferred device waiting will use 1360 * interrupts. chip reset recovery always defers device waiting to 1361 * avoid being in a TASKLET too long. 1362 */ 1363 if (init_poll) { 1364 u32 currtime = a->disc_start_time; 1365 u32 nexttick = 100; 1366 u32 deltatime; 1367 1368 /* 1369 * Block Tasklets from getting scheduled and indicate this is 1370 * polled discovery. 1371 */ 1372 set_bit(AF_TASKLET_SCHEDULED, &a->flags); 1373 set_bit(AF_DISC_POLLED, &a->flags); 1374 1375 /* 1376 * Temporarily bring the disable count to zero to enable 1377 * deferred processing. Note that the count is already zero 1378 * after the first initialization. 1379 */ 1380 if (test_bit(AF_FIRST_INIT, &a->flags)) 1381 atomic_dec(&a->disable_cnt); 1382 1383 while (test_bit(AF_DISC_PENDING, &a->flags)) { 1384 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1385 1386 /* 1387 * Determine the need for a timer tick based on the 1388 * delta time between this and the last iteration of 1389 * this loop. We don't use the absolute time because 1390 * then we would have to worry about when nexttick 1391 * wraps and currtime hasn't yet. 1392 */ 1393 deltatime = jiffies_to_msecs(jiffies) - currtime; 1394 currtime += deltatime; 1395 1396 /* 1397 * Process any waiting discovery as long as the chip is 1398 * up. If a chip reset happens during initial polling, 1399 * we have to make sure the timer tick processes the 1400 * doorbell indicating the firmware is ready. 1401 */ 1402 if (!test_bit(AF_CHPRST_PENDING, &a->flags)) 1403 esas2r_disc_check_for_work(a); 1404 1405 /* Simulate a timer tick. */ 1406 if (nexttick <= deltatime) { 1407 1408 /* Time for a timer tick */ 1409 nexttick += 100; 1410 esas2r_timer_tick(a); 1411 } 1412 1413 if (nexttick > deltatime) 1414 nexttick -= deltatime; 1415 1416 /* Do any deferred processing */ 1417 if (esas2r_is_tasklet_pending(a)) 1418 esas2r_do_tasklet_tasks(a); 1419 1420 } 1421 1422 if (test_bit(AF_FIRST_INIT, &a->flags)) 1423 atomic_inc(&a->disable_cnt); 1424 1425 clear_bit(AF_DISC_POLLED, &a->flags); 1426 clear_bit(AF_TASKLET_SCHEDULED, &a->flags); 1427 } 1428 1429 1430 esas2r_targ_db_report_changes(a); 1431 1432 /* 1433 * For cases where (a) the initialization messages processing may 1434 * handle an interrupt for a port event and a discovery is waiting, but 1435 * we are not waiting for devices, or (b) the device wait time has been 1436 * exhausted but there is still discovery pending, start any leftover 1437 * discovery in interrupt driven mode. 1438 */ 1439 esas2r_disc_start_waiting(a); 1440 1441 /* Enable chip interrupts */ 1442 a->int_mask = ESAS2R_INT_STS_MASK; 1443 esas2r_enable_chip_interrupts(a); 1444 esas2r_enable_heartbeat(a); 1445 rslt = true; 1446 1447 exit: 1448 /* 1449 * Regardless of whether initialization was successful, certain things 1450 * need to get done before we exit. 1451 */ 1452 1453 if (test_bit(AF_CHPRST_DETECTED, &a->flags) && 1454 test_bit(AF_FIRST_INIT, &a->flags)) { 1455 /* 1456 * Reinitialization was performed during the first 1457 * initialization. Only clear the chip reset flag so the 1458 * original device polling is not cancelled. 1459 */ 1460 if (!rslt) 1461 clear_bit(AF_CHPRST_PENDING, &a->flags); 1462 } else { 1463 /* First initialization or a subsequent re-init is complete. */ 1464 if (!rslt) { 1465 clear_bit(AF_CHPRST_PENDING, &a->flags); 1466 clear_bit(AF_DISC_PENDING, &a->flags); 1467 } 1468 1469 1470 /* Enable deferred processing after the first initialization. */ 1471 if (test_bit(AF_FIRST_INIT, &a->flags)) { 1472 clear_bit(AF_FIRST_INIT, &a->flags); 1473 1474 if (atomic_dec_return(&a->disable_cnt) == 0) 1475 esas2r_do_deferred_processes(a); 1476 } 1477 } 1478 1479 return rslt; 1480 } 1481 1482 void esas2r_reset_adapter(struct esas2r_adapter *a) 1483 { 1484 set_bit(AF_OS_RESET, &a->flags); 1485 esas2r_local_reset_adapter(a); 1486 esas2r_schedule_tasklet(a); 1487 } 1488 1489 void esas2r_reset_chip(struct esas2r_adapter *a) 1490 { 1491 if (!esas2r_is_adapter_present(a)) 1492 return; 1493 1494 /* 1495 * Before we reset the chip, save off the VDA core dump. The VDA core 1496 * dump is located in the upper 512KB of the onchip SRAM. Make sure 1497 * to not overwrite a previous crash that was saved. 1498 */ 1499 if (test_bit(AF2_COREDUMP_AVAIL, &a->flags2) && 1500 !test_bit(AF2_COREDUMP_SAVED, &a->flags2)) { 1501 esas2r_read_mem_block(a, 1502 a->fw_coredump_buff, 1503 MW_DATA_ADDR_SRAM + 0x80000, 1504 ESAS2R_FWCOREDUMP_SZ); 1505 1506 set_bit(AF2_COREDUMP_SAVED, &a->flags2); 1507 } 1508 1509 clear_bit(AF2_COREDUMP_AVAIL, &a->flags2); 1510 1511 /* Reset the chip */ 1512 if (a->pcid->revision == MVR_FREY_B2) 1513 esas2r_write_register_dword(a, MU_CTL_STATUS_IN_B2, 1514 MU_CTL_IN_FULL_RST2); 1515 else 1516 esas2r_write_register_dword(a, MU_CTL_STATUS_IN, 1517 MU_CTL_IN_FULL_RST); 1518 1519 1520 /* Stall a little while to let the reset condition clear */ 1521 mdelay(10); 1522 } 1523 1524 static void esas2r_power_down_notify_firmware(struct esas2r_adapter *a) 1525 { 1526 u32 starttime; 1527 u32 doorbell; 1528 1529 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_POWER_DOWN); 1530 starttime = jiffies_to_msecs(jiffies); 1531 1532 while (true) { 1533 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1534 if (doorbell & DRBL_POWER_DOWN) { 1535 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1536 doorbell); 1537 break; 1538 } 1539 1540 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1541 1542 if ((jiffies_to_msecs(jiffies) - starttime) > 30000) { 1543 esas2r_hdebug("Timeout waiting for power down"); 1544 break; 1545 } 1546 } 1547 } 1548 1549 /* 1550 * Perform power management processing including managing device states, adapter 1551 * states, interrupts, and I/O. 1552 */ 1553 void esas2r_power_down(struct esas2r_adapter *a) 1554 { 1555 set_bit(AF_POWER_MGT, &a->flags); 1556 set_bit(AF_POWER_DOWN, &a->flags); 1557 1558 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) { 1559 u32 starttime; 1560 u32 doorbell; 1561 1562 /* 1563 * We are currently running OK and will be reinitializing later. 1564 * increment the disable count to coordinate with 1565 * esas2r_init_adapter. We don't have to do this in degraded 1566 * mode since we never enabled interrupts in the first place. 1567 */ 1568 esas2r_disable_chip_interrupts(a); 1569 esas2r_disable_heartbeat(a); 1570 1571 /* wait for any VDA activity to clear before continuing */ 1572 esas2r_write_register_dword(a, MU_DOORBELL_IN, 1573 DRBL_MSG_IFC_DOWN); 1574 starttime = jiffies_to_msecs(jiffies); 1575 1576 while (true) { 1577 doorbell = 1578 esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1579 if (doorbell & DRBL_MSG_IFC_DOWN) { 1580 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1581 doorbell); 1582 break; 1583 } 1584 1585 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1586 1587 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1588 esas2r_hdebug( 1589 "timeout waiting for interface down"); 1590 break; 1591 } 1592 } 1593 1594 /* 1595 * For versions of firmware that support it tell them the driver 1596 * is powering down. 1597 */ 1598 if (test_bit(AF2_VDA_POWER_DOWN, &a->flags2)) 1599 esas2r_power_down_notify_firmware(a); 1600 } 1601 1602 /* Suspend I/O processing. */ 1603 set_bit(AF_OS_RESET, &a->flags); 1604 set_bit(AF_DISC_PENDING, &a->flags); 1605 set_bit(AF_CHPRST_PENDING, &a->flags); 1606 1607 esas2r_process_adapter_reset(a); 1608 1609 /* Remove devices now that I/O is cleaned up. */ 1610 a->prev_dev_cnt = esas2r_targ_db_get_tgt_cnt(a); 1611 esas2r_targ_db_remove_all(a, false); 1612 } 1613 1614 /* 1615 * Perform power management processing including managing device states, adapter 1616 * states, interrupts, and I/O. 1617 */ 1618 bool esas2r_power_up(struct esas2r_adapter *a, bool init_poll) 1619 { 1620 bool ret; 1621 1622 clear_bit(AF_POWER_DOWN, &a->flags); 1623 esas2r_init_pci_cfg_space(a); 1624 set_bit(AF_FIRST_INIT, &a->flags); 1625 atomic_inc(&a->disable_cnt); 1626 1627 /* reinitialize the adapter */ 1628 ret = esas2r_check_adapter(a); 1629 if (!esas2r_init_adapter_hw(a, init_poll)) 1630 ret = false; 1631 1632 /* send the reset asynchronous event */ 1633 esas2r_send_reset_ae(a, true); 1634 1635 /* clear this flag after initialization. */ 1636 clear_bit(AF_POWER_MGT, &a->flags); 1637 return ret; 1638 } 1639 1640 bool esas2r_is_adapter_present(struct esas2r_adapter *a) 1641 { 1642 if (test_bit(AF_NOT_PRESENT, &a->flags)) 1643 return false; 1644 1645 if (esas2r_read_register_dword(a, MU_DOORBELL_OUT) == 0xFFFFFFFF) { 1646 set_bit(AF_NOT_PRESENT, &a->flags); 1647 1648 return false; 1649 } 1650 return true; 1651 } 1652 1653 const char *esas2r_get_model_name(struct esas2r_adapter *a) 1654 { 1655 switch (a->pcid->subsystem_device) { 1656 case ATTO_ESAS_R680: 1657 return "ATTO ExpressSAS R680"; 1658 1659 case ATTO_ESAS_R608: 1660 return "ATTO ExpressSAS R608"; 1661 1662 case ATTO_ESAS_R60F: 1663 return "ATTO ExpressSAS R60F"; 1664 1665 case ATTO_ESAS_R6F0: 1666 return "ATTO ExpressSAS R6F0"; 1667 1668 case ATTO_ESAS_R644: 1669 return "ATTO ExpressSAS R644"; 1670 1671 case ATTO_ESAS_R648: 1672 return "ATTO ExpressSAS R648"; 1673 1674 case ATTO_TSSC_3808: 1675 return "ATTO ThunderStream SC 3808D"; 1676 1677 case ATTO_TSSC_3808E: 1678 return "ATTO ThunderStream SC 3808E"; 1679 1680 case ATTO_TLSH_1068: 1681 return "ATTO ThunderLink SH 1068"; 1682 } 1683 1684 return "ATTO SAS Controller"; 1685 } 1686 1687 const char *esas2r_get_model_name_short(struct esas2r_adapter *a) 1688 { 1689 switch (a->pcid->subsystem_device) { 1690 case ATTO_ESAS_R680: 1691 return "R680"; 1692 1693 case ATTO_ESAS_R608: 1694 return "R608"; 1695 1696 case ATTO_ESAS_R60F: 1697 return "R60F"; 1698 1699 case ATTO_ESAS_R6F0: 1700 return "R6F0"; 1701 1702 case ATTO_ESAS_R644: 1703 return "R644"; 1704 1705 case ATTO_ESAS_R648: 1706 return "R648"; 1707 1708 case ATTO_TSSC_3808: 1709 return "SC 3808D"; 1710 1711 case ATTO_TSSC_3808E: 1712 return "SC 3808E"; 1713 1714 case ATTO_TLSH_1068: 1715 return "SH 1068"; 1716 } 1717 1718 return "unknown"; 1719 } 1720