1*6733b39aSJayamohan Kallickal /** 2*6733b39aSJayamohan Kallickal * Copyright (C) 2005 - 2009 ServerEngines 3*6733b39aSJayamohan Kallickal * All rights reserved. 4*6733b39aSJayamohan Kallickal * 5*6733b39aSJayamohan Kallickal * This program is free software; you can redistribute it and/or 6*6733b39aSJayamohan Kallickal * modify it under the terms of the GNU General Public License version 2 7*6733b39aSJayamohan Kallickal * as published by the Free Software Foundation. The full GNU General 8*6733b39aSJayamohan Kallickal * Public License is included in this distribution in the file called COPYING. 9*6733b39aSJayamohan Kallickal * 10*6733b39aSJayamohan Kallickal * Contact Information: 11*6733b39aSJayamohan Kallickal * linux-drivers@serverengines.com 12*6733b39aSJayamohan Kallickal * 13*6733b39aSJayamohan Kallickal * ServerEngines 14*6733b39aSJayamohan Kallickal * 209 N. Fair Oaks Ave 15*6733b39aSJayamohan Kallickal * Sunnyvale, CA 94085 16*6733b39aSJayamohan Kallickal */ 17*6733b39aSJayamohan Kallickal 18*6733b39aSJayamohan Kallickal #ifndef BEISCSI_H 19*6733b39aSJayamohan Kallickal #define BEISCSI_H 20*6733b39aSJayamohan Kallickal 21*6733b39aSJayamohan Kallickal #include <linux/pci.h> 22*6733b39aSJayamohan Kallickal #include <linux/if_vlan.h> 23*6733b39aSJayamohan Kallickal 24*6733b39aSJayamohan Kallickal #define FW_VER_LEN 32 25*6733b39aSJayamohan Kallickal 26*6733b39aSJayamohan Kallickal struct be_dma_mem { 27*6733b39aSJayamohan Kallickal void *va; 28*6733b39aSJayamohan Kallickal dma_addr_t dma; 29*6733b39aSJayamohan Kallickal u32 size; 30*6733b39aSJayamohan Kallickal }; 31*6733b39aSJayamohan Kallickal 32*6733b39aSJayamohan Kallickal struct be_queue_info { 33*6733b39aSJayamohan Kallickal struct be_dma_mem dma_mem; 34*6733b39aSJayamohan Kallickal u16 len; 35*6733b39aSJayamohan Kallickal u16 entry_size; /* Size of an element in the queue */ 36*6733b39aSJayamohan Kallickal u16 id; 37*6733b39aSJayamohan Kallickal u16 tail, head; 38*6733b39aSJayamohan Kallickal bool created; 39*6733b39aSJayamohan Kallickal atomic_t used; /* Number of valid elements in the queue */ 40*6733b39aSJayamohan Kallickal }; 41*6733b39aSJayamohan Kallickal 42*6733b39aSJayamohan Kallickal static inline u32 MODULO(u16 val, u16 limit) 43*6733b39aSJayamohan Kallickal { 44*6733b39aSJayamohan Kallickal WARN_ON(limit & (limit - 1)); 45*6733b39aSJayamohan Kallickal return val & (limit - 1); 46*6733b39aSJayamohan Kallickal } 47*6733b39aSJayamohan Kallickal 48*6733b39aSJayamohan Kallickal static inline void index_inc(u16 *index, u16 limit) 49*6733b39aSJayamohan Kallickal { 50*6733b39aSJayamohan Kallickal *index = MODULO((*index + 1), limit); 51*6733b39aSJayamohan Kallickal } 52*6733b39aSJayamohan Kallickal 53*6733b39aSJayamohan Kallickal static inline void *queue_head_node(struct be_queue_info *q) 54*6733b39aSJayamohan Kallickal { 55*6733b39aSJayamohan Kallickal return q->dma_mem.va + q->head * q->entry_size; 56*6733b39aSJayamohan Kallickal } 57*6733b39aSJayamohan Kallickal 58*6733b39aSJayamohan Kallickal static inline void *queue_tail_node(struct be_queue_info *q) 59*6733b39aSJayamohan Kallickal { 60*6733b39aSJayamohan Kallickal return q->dma_mem.va + q->tail * q->entry_size; 61*6733b39aSJayamohan Kallickal } 62*6733b39aSJayamohan Kallickal 63*6733b39aSJayamohan Kallickal static inline void queue_head_inc(struct be_queue_info *q) 64*6733b39aSJayamohan Kallickal { 65*6733b39aSJayamohan Kallickal index_inc(&q->head, q->len); 66*6733b39aSJayamohan Kallickal } 67*6733b39aSJayamohan Kallickal 68*6733b39aSJayamohan Kallickal static inline void queue_tail_inc(struct be_queue_info *q) 69*6733b39aSJayamohan Kallickal { 70*6733b39aSJayamohan Kallickal index_inc(&q->tail, q->len); 71*6733b39aSJayamohan Kallickal } 72*6733b39aSJayamohan Kallickal 73*6733b39aSJayamohan Kallickal /*ISCSI */ 74*6733b39aSJayamohan Kallickal 75*6733b39aSJayamohan Kallickal struct be_eq_obj { 76*6733b39aSJayamohan Kallickal struct be_queue_info q; 77*6733b39aSJayamohan Kallickal char desc[32]; 78*6733b39aSJayamohan Kallickal 79*6733b39aSJayamohan Kallickal /* Adaptive interrupt coalescing (AIC) info */ 80*6733b39aSJayamohan Kallickal bool enable_aic; 81*6733b39aSJayamohan Kallickal u16 min_eqd; /* in usecs */ 82*6733b39aSJayamohan Kallickal u16 max_eqd; /* in usecs */ 83*6733b39aSJayamohan Kallickal u16 cur_eqd; /* in usecs */ 84*6733b39aSJayamohan Kallickal }; 85*6733b39aSJayamohan Kallickal 86*6733b39aSJayamohan Kallickal struct be_mcc_obj { 87*6733b39aSJayamohan Kallickal struct be_queue_info *q; 88*6733b39aSJayamohan Kallickal struct be_queue_info *cq; 89*6733b39aSJayamohan Kallickal }; 90*6733b39aSJayamohan Kallickal 91*6733b39aSJayamohan Kallickal struct be_ctrl_info { 92*6733b39aSJayamohan Kallickal u8 __iomem *csr; 93*6733b39aSJayamohan Kallickal u8 __iomem *db; /* Door Bell */ 94*6733b39aSJayamohan Kallickal u8 __iomem *pcicfg; /* PCI config space */ 95*6733b39aSJayamohan Kallickal struct pci_dev *pdev; 96*6733b39aSJayamohan Kallickal 97*6733b39aSJayamohan Kallickal /* Mbox used for cmd request/response */ 98*6733b39aSJayamohan Kallickal spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */ 99*6733b39aSJayamohan Kallickal struct be_dma_mem mbox_mem; 100*6733b39aSJayamohan Kallickal /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 101*6733b39aSJayamohan Kallickal * is stored for freeing purpose */ 102*6733b39aSJayamohan Kallickal struct be_dma_mem mbox_mem_alloced; 103*6733b39aSJayamohan Kallickal 104*6733b39aSJayamohan Kallickal /* MCC Rings */ 105*6733b39aSJayamohan Kallickal struct be_mcc_obj mcc_obj; 106*6733b39aSJayamohan Kallickal spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 107*6733b39aSJayamohan Kallickal spinlock_t mcc_cq_lock; 108*6733b39aSJayamohan Kallickal 109*6733b39aSJayamohan Kallickal /* MCC Async callback */ 110*6733b39aSJayamohan Kallickal void (*async_cb) (void *adapter, bool link_up); 111*6733b39aSJayamohan Kallickal void *adapter_ctxt; 112*6733b39aSJayamohan Kallickal }; 113*6733b39aSJayamohan Kallickal 114*6733b39aSJayamohan Kallickal #include "be_cmds.h" 115*6733b39aSJayamohan Kallickal 116*6733b39aSJayamohan Kallickal #define PAGE_SHIFT_4K 12 117*6733b39aSJayamohan Kallickal #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 118*6733b39aSJayamohan Kallickal 119*6733b39aSJayamohan Kallickal /* Returns number of pages spanned by the data starting at the given addr */ 120*6733b39aSJayamohan Kallickal #define PAGES_4K_SPANNED(_address, size) \ 121*6733b39aSJayamohan Kallickal ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 122*6733b39aSJayamohan Kallickal (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 123*6733b39aSJayamohan Kallickal 124*6733b39aSJayamohan Kallickal /* Byte offset into the page corresponding to given address */ 125*6733b39aSJayamohan Kallickal #define OFFSET_IN_PAGE(addr) \ 126*6733b39aSJayamohan Kallickal ((size_t)(addr) & (PAGE_SIZE_4K-1)) 127*6733b39aSJayamohan Kallickal 128*6733b39aSJayamohan Kallickal /* Returns bit offset within a DWORD of a bitfield */ 129*6733b39aSJayamohan Kallickal #define AMAP_BIT_OFFSET(_struct, field) \ 130*6733b39aSJayamohan Kallickal (((size_t)&(((_struct *)0)->field))%32) 131*6733b39aSJayamohan Kallickal 132*6733b39aSJayamohan Kallickal /* Returns the bit mask of the field that is NOT shifted into location. */ 133*6733b39aSJayamohan Kallickal static inline u32 amap_mask(u32 bitsize) 134*6733b39aSJayamohan Kallickal { 135*6733b39aSJayamohan Kallickal return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 136*6733b39aSJayamohan Kallickal } 137*6733b39aSJayamohan Kallickal 138*6733b39aSJayamohan Kallickal static inline void amap_set(void *ptr, u32 dw_offset, u32 mask, 139*6733b39aSJayamohan Kallickal u32 offset, u32 value) 140*6733b39aSJayamohan Kallickal { 141*6733b39aSJayamohan Kallickal u32 *dw = (u32 *) ptr + dw_offset; 142*6733b39aSJayamohan Kallickal *dw &= ~(mask << offset); 143*6733b39aSJayamohan Kallickal *dw |= (mask & value) << offset; 144*6733b39aSJayamohan Kallickal } 145*6733b39aSJayamohan Kallickal 146*6733b39aSJayamohan Kallickal #define AMAP_SET_BITS(_struct, field, ptr, val) \ 147*6733b39aSJayamohan Kallickal amap_set(ptr, \ 148*6733b39aSJayamohan Kallickal offsetof(_struct, field)/32, \ 149*6733b39aSJayamohan Kallickal amap_mask(sizeof(((_struct *)0)->field)), \ 150*6733b39aSJayamohan Kallickal AMAP_BIT_OFFSET(_struct, field), \ 151*6733b39aSJayamohan Kallickal val) 152*6733b39aSJayamohan Kallickal 153*6733b39aSJayamohan Kallickal static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 154*6733b39aSJayamohan Kallickal { 155*6733b39aSJayamohan Kallickal u32 *dw = ptr; 156*6733b39aSJayamohan Kallickal return mask & (*(dw + dw_offset) >> offset); 157*6733b39aSJayamohan Kallickal } 158*6733b39aSJayamohan Kallickal 159*6733b39aSJayamohan Kallickal #define AMAP_GET_BITS(_struct, field, ptr) \ 160*6733b39aSJayamohan Kallickal amap_get(ptr, \ 161*6733b39aSJayamohan Kallickal offsetof(_struct, field)/32, \ 162*6733b39aSJayamohan Kallickal amap_mask(sizeof(((_struct *)0)->field)), \ 163*6733b39aSJayamohan Kallickal AMAP_BIT_OFFSET(_struct, field)) 164*6733b39aSJayamohan Kallickal 165*6733b39aSJayamohan Kallickal #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 166*6733b39aSJayamohan Kallickal #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 167*6733b39aSJayamohan Kallickal static inline void swap_dws(void *wrb, int len) 168*6733b39aSJayamohan Kallickal { 169*6733b39aSJayamohan Kallickal #ifdef __BIG_ENDIAN 170*6733b39aSJayamohan Kallickal u32 *dw = wrb; 171*6733b39aSJayamohan Kallickal WARN_ON(len % 4); 172*6733b39aSJayamohan Kallickal do { 173*6733b39aSJayamohan Kallickal *dw = cpu_to_le32(*dw); 174*6733b39aSJayamohan Kallickal dw++; 175*6733b39aSJayamohan Kallickal len -= 4; 176*6733b39aSJayamohan Kallickal } while (len); 177*6733b39aSJayamohan Kallickal #endif /* __BIG_ENDIAN */ 178*6733b39aSJayamohan Kallickal } 179*6733b39aSJayamohan Kallickal 180*6733b39aSJayamohan Kallickal extern void beiscsi_cq_notify(struct be_ctrl_info *ctrl, u16 qid, bool arm, 181*6733b39aSJayamohan Kallickal u16 num_popped); 182*6733b39aSJayamohan Kallickal 183*6733b39aSJayamohan Kallickal #endif /* BEISCSI_H */ 184