1 /* 2 * Aic94xx SAS/SATA driver hardware interface header file. 3 * 4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved. 5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com> 6 * 7 * This file is licensed under GPLv2. 8 * 9 * This file is part of the aic94xx driver. 10 * 11 * The aic94xx driver is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; version 2 of the 14 * License. 15 * 16 * The aic94xx driver is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with the aic94xx driver; if not, write to the Free Software 23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 24 * 25 */ 26 27 #ifndef _AIC94XX_HWI_H_ 28 #define _AIC94XX_HWI_H_ 29 30 #include <linux/interrupt.h> 31 #include <linux/pci.h> 32 #include <linux/dma-mapping.h> 33 34 #include <scsi/libsas.h> 35 36 #include "aic94xx.h" 37 #include "aic94xx_sas.h" 38 39 /* Define ASD_MAX_PHYS to the maximum phys ever. Currently 8. */ 40 #define ASD_MAX_PHYS 8 41 #define ASD_PCBA_SN_SIZE 12 42 43 struct asd_ha_addrspace { 44 void __iomem *addr; 45 unsigned long start; /* pci resource start */ 46 unsigned long len; /* pci resource len */ 47 unsigned long flags; /* pci resource flags */ 48 49 /* addresses internal to the host adapter */ 50 u32 swa_base; /* mmspace 1 (MBAR1) uses this only */ 51 u32 swb_base; 52 u32 swc_base; 53 }; 54 55 struct bios_struct { 56 int present; 57 u8 maj; 58 u8 min; 59 u32 bld; 60 }; 61 62 struct unit_element_struct { 63 u16 num; 64 u16 size; 65 void *area; 66 }; 67 68 struct flash_struct { 69 u32 bar; 70 int present; 71 int wide; 72 u8 manuf; 73 u8 dev_id; 74 u8 sec_prot; 75 76 u32 dir_offs; 77 }; 78 79 struct asd_phy_desc { 80 /* From CTRL-A settings, then set to what is appropriate */ 81 u8 sas_addr[SAS_ADDR_SIZE]; 82 u8 max_sas_lrate; 83 u8 min_sas_lrate; 84 u8 max_sata_lrate; 85 u8 min_sata_lrate; 86 u8 flags; 87 #define ASD_CRC_DIS 1 88 #define ASD_SATA_SPINUP_HOLD 2 89 90 u8 phy_control_0; /* mode 5 reg 0x160 */ 91 u8 phy_control_1; /* mode 5 reg 0x161 */ 92 u8 phy_control_2; /* mode 5 reg 0x162 */ 93 u8 phy_control_3; /* mode 5 reg 0x163 */ 94 }; 95 96 struct asd_dma_tok { 97 void *vaddr; 98 dma_addr_t dma_handle; 99 size_t size; 100 }; 101 102 struct hw_profile { 103 struct bios_struct bios; 104 struct unit_element_struct ue; 105 struct flash_struct flash; 106 107 u8 sas_addr[SAS_ADDR_SIZE]; 108 char pcba_sn[ASD_PCBA_SN_SIZE+1]; 109 110 u8 enabled_phys; /* mask of enabled phys */ 111 struct asd_phy_desc phy_desc[ASD_MAX_PHYS]; 112 u32 max_scbs; /* absolute sequencer scb queue size */ 113 struct asd_dma_tok *scb_ext; 114 u32 max_ddbs; 115 struct asd_dma_tok *ddb_ext; 116 117 spinlock_t ddb_lock; 118 void *ddb_bitmap; 119 120 int num_phys; /* ENABLEABLE */ 121 int max_phys; /* REPORTED + ENABLEABLE */ 122 123 unsigned addr_range; /* max # of addrs; max # of possible ports */ 124 unsigned port_name_base; 125 unsigned dev_name_base; 126 unsigned sata_name_base; 127 }; 128 129 struct asd_ascb { 130 struct list_head list; 131 struct asd_ha_struct *ha; 132 133 struct scb *scb; /* equals dma_scb->vaddr */ 134 struct asd_dma_tok dma_scb; 135 struct asd_dma_tok *sg_arr; 136 137 void (*tasklet_complete)(struct asd_ascb *, struct done_list_struct *); 138 u8 uldd_timer:1; 139 140 /* internally generated command */ 141 struct timer_list timer; 142 struct completion completion; 143 u8 tag_valid:1; 144 __be16 tag; /* error recovery only */ 145 146 /* If this is an Empty SCB, index of first edb in seq->edb_arr. */ 147 int edb_index; 148 149 /* Used by the timer timeout function. */ 150 int tc_index; 151 152 void *uldd_task; 153 }; 154 155 #define ASD_DL_SIZE_BITS 0x8 156 #define ASD_DL_SIZE (1<<(2+ASD_DL_SIZE_BITS)) 157 #define ASD_DEF_DL_TOGGLE 0x01 158 159 struct asd_seq_data { 160 spinlock_t pend_q_lock; 161 u16 scbpro; 162 int pending; 163 struct list_head pend_q; 164 int can_queue; /* per adapter */ 165 struct asd_dma_tok next_scb; /* next scb to be delivered to CSEQ */ 166 167 spinlock_t tc_index_lock; 168 void **tc_index_array; 169 void *tc_index_bitmap; 170 int tc_index_bitmap_bits; 171 172 struct tasklet_struct dl_tasklet; 173 struct done_list_struct *dl; /* array of done list entries, equals */ 174 struct asd_dma_tok *actual_dl; /* actual_dl->vaddr */ 175 int dl_toggle; 176 int dl_next; 177 178 int num_edbs; 179 struct asd_dma_tok **edb_arr; 180 int num_escbs; 181 struct asd_ascb **escb_arr; /* array of pointers to escbs */ 182 }; 183 184 /* This is an internal port structure. These are used to get accurate 185 * phy_mask for updating DDB 0. 186 */ 187 struct asd_port { 188 u8 sas_addr[SAS_ADDR_SIZE]; 189 u8 attached_sas_addr[SAS_ADDR_SIZE]; 190 u32 phy_mask; 191 int num_phys; 192 }; 193 194 /* This is the Host Adapter structure. It describes the hardware 195 * SAS adapter. 196 */ 197 struct asd_ha_struct { 198 struct pci_dev *pcidev; 199 const char *name; 200 201 struct sas_ha_struct sas_ha; 202 203 u8 revision_id; 204 205 int iospace; 206 spinlock_t iolock; 207 struct asd_ha_addrspace io_handle[2]; 208 209 struct hw_profile hw_prof; 210 211 struct asd_phy phys[ASD_MAX_PHYS]; 212 spinlock_t asd_ports_lock; 213 struct asd_port asd_ports[ASD_MAX_PHYS]; 214 struct asd_sas_port ports[ASD_MAX_PHYS]; 215 216 struct dma_pool *scb_pool; 217 218 struct asd_seq_data seq; /* sequencer related */ 219 }; 220 221 /* ---------- Common macros ---------- */ 222 223 #define ASD_BUSADDR_LO(__dma_handle) ((u32)(__dma_handle)) 224 #define ASD_BUSADDR_HI(__dma_handle) (((sizeof(dma_addr_t))==8) \ 225 ? ((u32)((__dma_handle) >> 32)) \ 226 : ((u32)0)) 227 228 #define dev_to_asd_ha(__dev) pci_get_drvdata(to_pci_dev(__dev)) 229 #define SCB_SITE_VALID(__site_no) (((__site_no) & 0xF0FF) != 0x00FF \ 230 && ((__site_no) & 0xF0FF) > 0x001F) 231 /* For each bit set in __lseq_mask, set __lseq to equal the bit 232 * position of the set bit and execute the statement following. 233 * __mc is the temporary mask, used as a mask "counter". 234 */ 235 #define for_each_sequencer(__lseq_mask, __mc, __lseq) \ 236 for ((__mc)=(__lseq_mask),(__lseq)=0;(__mc)!=0;(__lseq++),(__mc)>>=1)\ 237 if (((__mc) & 1)) 238 #define for_each_phy(__lseq_mask, __mc, __lseq) \ 239 for ((__mc)=(__lseq_mask),(__lseq)=0;(__mc)!=0;(__lseq++),(__mc)>>=1)\ 240 if (((__mc) & 1)) 241 242 #define PHY_ENABLED(_HA, _I) ((_HA)->hw_prof.enabled_phys & (1<<(_I))) 243 244 /* ---------- DMA allocs ---------- */ 245 246 static inline struct asd_dma_tok *asd_dmatok_alloc(gfp_t flags) 247 { 248 return kmem_cache_alloc(asd_dma_token_cache, flags); 249 } 250 251 static inline void asd_dmatok_free(struct asd_dma_tok *token) 252 { 253 kmem_cache_free(asd_dma_token_cache, token); 254 } 255 256 static inline struct asd_dma_tok *asd_alloc_coherent(struct asd_ha_struct * 257 asd_ha, size_t size, 258 gfp_t flags) 259 { 260 struct asd_dma_tok *token = asd_dmatok_alloc(flags); 261 if (token) { 262 token->size = size; 263 token->vaddr = dma_alloc_coherent(&asd_ha->pcidev->dev, 264 token->size, 265 &token->dma_handle, 266 flags); 267 if (!token->vaddr) { 268 asd_dmatok_free(token); 269 token = NULL; 270 } 271 } 272 return token; 273 } 274 275 static inline void asd_free_coherent(struct asd_ha_struct *asd_ha, 276 struct asd_dma_tok *token) 277 { 278 if (token) { 279 dma_free_coherent(&asd_ha->pcidev->dev, token->size, 280 token->vaddr, token->dma_handle); 281 asd_dmatok_free(token); 282 } 283 } 284 285 static inline void asd_init_ascb(struct asd_ha_struct *asd_ha, 286 struct asd_ascb *ascb) 287 { 288 INIT_LIST_HEAD(&ascb->list); 289 ascb->scb = ascb->dma_scb.vaddr; 290 ascb->ha = asd_ha; 291 ascb->timer.function = NULL; 292 init_timer(&ascb->timer); 293 ascb->tc_index = -1; 294 init_completion(&ascb->completion); 295 } 296 297 /* Must be called with the tc_index_lock held! 298 */ 299 static inline void asd_tc_index_release(struct asd_seq_data *seq, int index) 300 { 301 seq->tc_index_array[index] = NULL; 302 clear_bit(index, seq->tc_index_bitmap); 303 } 304 305 /* Must be called with the tc_index_lock held! 306 */ 307 static inline int asd_tc_index_get(struct asd_seq_data *seq, void *ptr) 308 { 309 int index; 310 311 index = find_first_zero_bit(seq->tc_index_bitmap, 312 seq->tc_index_bitmap_bits); 313 if (index == seq->tc_index_bitmap_bits) 314 return -1; 315 316 seq->tc_index_array[index] = ptr; 317 set_bit(index, seq->tc_index_bitmap); 318 319 return index; 320 } 321 322 /* Must be called with the tc_index_lock held! 323 */ 324 static inline void *asd_tc_index_find(struct asd_seq_data *seq, int index) 325 { 326 return seq->tc_index_array[index]; 327 } 328 329 /** 330 * asd_ascb_free -- free a single aSCB after is has completed 331 * @ascb: pointer to the aSCB of interest 332 * 333 * This frees an aSCB after it has been executed/completed by 334 * the sequencer. 335 */ 336 static inline void asd_ascb_free(struct asd_ascb *ascb) 337 { 338 if (ascb) { 339 struct asd_ha_struct *asd_ha = ascb->ha; 340 unsigned long flags; 341 342 BUG_ON(!list_empty(&ascb->list)); 343 spin_lock_irqsave(&ascb->ha->seq.tc_index_lock, flags); 344 asd_tc_index_release(&ascb->ha->seq, ascb->tc_index); 345 spin_unlock_irqrestore(&ascb->ha->seq.tc_index_lock, flags); 346 dma_pool_free(asd_ha->scb_pool, ascb->dma_scb.vaddr, 347 ascb->dma_scb.dma_handle); 348 kmem_cache_free(asd_ascb_cache, ascb); 349 } 350 } 351 352 /** 353 * asd_ascb_list_free -- free a list of ascbs 354 * @ascb_list: a list of ascbs 355 * 356 * This function will free a list of ascbs allocated by asd_ascb_alloc_list. 357 * It is used when say the scb queueing function returned QUEUE_FULL, 358 * and we do not need the ascbs any more. 359 */ 360 static inline void asd_ascb_free_list(struct asd_ascb *ascb_list) 361 { 362 LIST_HEAD(list); 363 struct list_head *n, *pos; 364 365 __list_add(&list, ascb_list->list.prev, &ascb_list->list); 366 list_for_each_safe(pos, n, &list) { 367 list_del_init(pos); 368 asd_ascb_free(list_entry(pos, struct asd_ascb, list)); 369 } 370 } 371 372 /* ---------- Function declarations ---------- */ 373 374 int asd_init_hw(struct asd_ha_struct *asd_ha); 375 irqreturn_t asd_hw_isr(int irq, void *dev_id); 376 377 378 struct asd_ascb *asd_ascb_alloc_list(struct asd_ha_struct 379 *asd_ha, int *num, 380 gfp_t gfp_mask); 381 382 int asd_post_ascb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb, 383 int num); 384 int asd_post_escb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb, 385 int num); 386 387 int asd_init_post_escbs(struct asd_ha_struct *asd_ha); 388 void asd_build_control_phy(struct asd_ascb *ascb, int phy_id, u8 subfunc); 389 void asd_control_led(struct asd_ha_struct *asd_ha, int phy_id, int op); 390 void asd_turn_led(struct asd_ha_struct *asd_ha, int phy_id, int op); 391 int asd_enable_phys(struct asd_ha_struct *asd_ha, const u8 phy_mask); 392 void asd_build_initiate_link_adm_task(struct asd_ascb *ascb, int phy_id, 393 u8 subfunc); 394 395 void asd_ascb_timedout(unsigned long data); 396 int asd_chip_hardrst(struct asd_ha_struct *asd_ha); 397 398 #endif 399