xref: /openbmc/linux/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
11da177e4SLinus Torvalds /*
21da177e4SLinus Torvalds  * Instruction formats for the sequencer program downloaded to
31da177e4SLinus Torvalds  * Aic7xxx SCSI host adapters
41da177e4SLinus Torvalds  *
51da177e4SLinus Torvalds  * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs.
61da177e4SLinus Torvalds  * All rights reserved.
71da177e4SLinus Torvalds  *
81da177e4SLinus Torvalds  * Redistribution and use in source and binary forms, with or without
91da177e4SLinus Torvalds  * modification, are permitted provided that the following conditions
101da177e4SLinus Torvalds  * are met:
111da177e4SLinus Torvalds  * 1. Redistributions of source code must retain the above copyright
121da177e4SLinus Torvalds  *    notice, this list of conditions, and the following disclaimer,
131da177e4SLinus Torvalds  *    without modification.
141da177e4SLinus Torvalds  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
151da177e4SLinus Torvalds  *    substantially similar to the "NO WARRANTY" disclaimer below
161da177e4SLinus Torvalds  *    ("Disclaimer") and any redistribution must be conditioned upon
171da177e4SLinus Torvalds  *    including a substantially similar Disclaimer requirement for further
181da177e4SLinus Torvalds  *    binary redistribution.
191da177e4SLinus Torvalds  * 3. Neither the names of the above-listed copyright holders nor the names
201da177e4SLinus Torvalds  *    of any contributors may be used to endorse or promote products derived
211da177e4SLinus Torvalds  *    from this software without specific prior written permission.
221da177e4SLinus Torvalds  *
231da177e4SLinus Torvalds  * Alternatively, this software may be distributed under the terms of the
241da177e4SLinus Torvalds  * GNU General Public License ("GPL") version 2 as published by the Free
251da177e4SLinus Torvalds  * Software Foundation.
261da177e4SLinus Torvalds  *
271da177e4SLinus Torvalds  * NO WARRANTY
281da177e4SLinus Torvalds  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
291da177e4SLinus Torvalds  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
301da177e4SLinus Torvalds  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
311da177e4SLinus Torvalds  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
321da177e4SLinus Torvalds  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
331da177e4SLinus Torvalds  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
341da177e4SLinus Torvalds  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
351da177e4SLinus Torvalds  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
361da177e4SLinus Torvalds  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
371da177e4SLinus Torvalds  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
381da177e4SLinus Torvalds  * POSSIBILITY OF SUCH DAMAGES.
391da177e4SLinus Torvalds  *
40*2628ed2bSHannes Reinecke  * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $
411da177e4SLinus Torvalds  *
421da177e4SLinus Torvalds  * $FreeBSD$
431da177e4SLinus Torvalds  */
441da177e4SLinus Torvalds 
45f7c80c9fSOlaf Hering #include <asm/byteorder.h>
46f7c80c9fSOlaf Hering 
47*2628ed2bSHannes Reinecke /* 8bit ALU logic operations */
481da177e4SLinus Torvalds struct ins_format1 {
49f7c80c9fSOlaf Hering #ifdef __LITTLE_ENDIAN
501da177e4SLinus Torvalds 	uint32_t	immediate	: 8,
511da177e4SLinus Torvalds 			source		: 9,
521da177e4SLinus Torvalds 			destination	: 9,
531da177e4SLinus Torvalds 			ret		: 1,
541da177e4SLinus Torvalds 			opcode		: 4,
551da177e4SLinus Torvalds 			parity		: 1;
561da177e4SLinus Torvalds #else
571da177e4SLinus Torvalds 	uint32_t	parity		: 1,
581da177e4SLinus Torvalds 			opcode		: 4,
591da177e4SLinus Torvalds 			ret		: 1,
601da177e4SLinus Torvalds 			destination	: 9,
611da177e4SLinus Torvalds 			source		: 9,
621da177e4SLinus Torvalds 			immediate	: 8;
631da177e4SLinus Torvalds #endif
641da177e4SLinus Torvalds };
651da177e4SLinus Torvalds 
66*2628ed2bSHannes Reinecke /* 8bit ALU shift/rotate operations */
671da177e4SLinus Torvalds struct ins_format2 {
68f7c80c9fSOlaf Hering #ifdef __LITTLE_ENDIAN
691da177e4SLinus Torvalds 	uint32_t	shift_control	: 8,
701da177e4SLinus Torvalds 			source		: 9,
711da177e4SLinus Torvalds 			destination	: 9,
721da177e4SLinus Torvalds 			ret		: 1,
731da177e4SLinus Torvalds 			opcode		: 4,
741da177e4SLinus Torvalds 			parity		: 1;
751da177e4SLinus Torvalds #else
761da177e4SLinus Torvalds 	uint32_t	parity		: 1,
771da177e4SLinus Torvalds 			opcode		: 4,
781da177e4SLinus Torvalds 			ret		: 1,
791da177e4SLinus Torvalds 			destination	: 9,
801da177e4SLinus Torvalds 			source		: 9,
811da177e4SLinus Torvalds 			shift_control	: 8;
821da177e4SLinus Torvalds #endif
831da177e4SLinus Torvalds };
841da177e4SLinus Torvalds 
85*2628ed2bSHannes Reinecke /* 8bit branch control operations */
861da177e4SLinus Torvalds struct ins_format3 {
87f7c80c9fSOlaf Hering #ifdef __LITTLE_ENDIAN
881da177e4SLinus Torvalds 	uint32_t	immediate	: 8,
891da177e4SLinus Torvalds 			source		: 9,
901da177e4SLinus Torvalds 			address		: 10,
911da177e4SLinus Torvalds 			opcode		: 4,
921da177e4SLinus Torvalds 			parity		: 1;
931da177e4SLinus Torvalds #else
941da177e4SLinus Torvalds 	uint32_t	parity		: 1,
951da177e4SLinus Torvalds 			opcode		: 4,
961da177e4SLinus Torvalds 			address		: 10,
971da177e4SLinus Torvalds 			source		: 9,
981da177e4SLinus Torvalds 			immediate	: 8;
991da177e4SLinus Torvalds #endif
1001da177e4SLinus Torvalds };
1011da177e4SLinus Torvalds 
102*2628ed2bSHannes Reinecke /* 16bit ALU logic operations */
103*2628ed2bSHannes Reinecke struct ins_format4 {
104*2628ed2bSHannes Reinecke #ifdef __LITTLE_ENDIAN
105*2628ed2bSHannes Reinecke 	uint32_t	opcode_ext	: 8,
106*2628ed2bSHannes Reinecke 			source		: 9,
107*2628ed2bSHannes Reinecke 			destination	: 9,
108*2628ed2bSHannes Reinecke 			ret		: 1,
109*2628ed2bSHannes Reinecke 			opcode		: 4,
110*2628ed2bSHannes Reinecke 			parity		: 1;
111*2628ed2bSHannes Reinecke #else
112*2628ed2bSHannes Reinecke 	uint32_t	parity		: 1,
113*2628ed2bSHannes Reinecke 			opcode		: 4,
114*2628ed2bSHannes Reinecke 			ret		: 1,
115*2628ed2bSHannes Reinecke 			destination	: 9,
116*2628ed2bSHannes Reinecke 			source		: 9,
117*2628ed2bSHannes Reinecke 			opcode_ext	: 8;
118*2628ed2bSHannes Reinecke #endif
119*2628ed2bSHannes Reinecke };
120*2628ed2bSHannes Reinecke 
121*2628ed2bSHannes Reinecke /* 16bit branch control operations */
122*2628ed2bSHannes Reinecke struct ins_format5 {
123*2628ed2bSHannes Reinecke #ifdef __LITTLE_ENDIAN
124*2628ed2bSHannes Reinecke 	uint32_t	opcode_ext	: 8,
125*2628ed2bSHannes Reinecke 			source		: 9,
126*2628ed2bSHannes Reinecke 			address		: 10,
127*2628ed2bSHannes Reinecke 			opcode		: 4,
128*2628ed2bSHannes Reinecke 			parity		: 1;
129*2628ed2bSHannes Reinecke #else
130*2628ed2bSHannes Reinecke 	uint32_t	parity		: 1,
131*2628ed2bSHannes Reinecke 			opcode		: 4,
132*2628ed2bSHannes Reinecke 			address		: 10,
133*2628ed2bSHannes Reinecke 			source		: 9,
134*2628ed2bSHannes Reinecke 			opcode_ext	: 8;
135*2628ed2bSHannes Reinecke #endif
136*2628ed2bSHannes Reinecke };
137*2628ed2bSHannes Reinecke 
138*2628ed2bSHannes Reinecke /*  Far branch operations */
139*2628ed2bSHannes Reinecke struct ins_format6 {
140*2628ed2bSHannes Reinecke #ifdef __LITTLE_ENDIAN
141*2628ed2bSHannes Reinecke 	uint32_t	page		: 3,
142*2628ed2bSHannes Reinecke 			opcode_ext	: 5,
143*2628ed2bSHannes Reinecke 			source		: 9,
144*2628ed2bSHannes Reinecke 			address		: 10,
145*2628ed2bSHannes Reinecke 			opcode		: 4,
146*2628ed2bSHannes Reinecke 			parity		: 1;
147*2628ed2bSHannes Reinecke #else
148*2628ed2bSHannes Reinecke 	uint32_t	parity		: 1,
149*2628ed2bSHannes Reinecke 			opcode		: 4,
150*2628ed2bSHannes Reinecke 			address		: 10,
151*2628ed2bSHannes Reinecke 			source		: 9,
152*2628ed2bSHannes Reinecke 			opcode_ext	: 5,
153*2628ed2bSHannes Reinecke 			page		: 3;
154*2628ed2bSHannes Reinecke #endif
155*2628ed2bSHannes Reinecke };
156*2628ed2bSHannes Reinecke 
1571da177e4SLinus Torvalds union ins_formats {
1581da177e4SLinus Torvalds 		struct ins_format1 format1;
1591da177e4SLinus Torvalds 		struct ins_format2 format2;
1601da177e4SLinus Torvalds 		struct ins_format3 format3;
161*2628ed2bSHannes Reinecke 		struct ins_format4 format4;
162*2628ed2bSHannes Reinecke 		struct ins_format5 format5;
163*2628ed2bSHannes Reinecke 		struct ins_format6 format6;
1641da177e4SLinus Torvalds 		uint8_t		   bytes[4];
1651da177e4SLinus Torvalds 		uint32_t	   integer;
1661da177e4SLinus Torvalds };
1671da177e4SLinus Torvalds struct instruction {
1681da177e4SLinus Torvalds 	union	ins_formats format;
1691da177e4SLinus Torvalds 	u_int	srcline;
1701da177e4SLinus Torvalds 	struct symbol *patch_label;
1711da177e4SLinus Torvalds 	STAILQ_ENTRY(instruction) links;
1721da177e4SLinus Torvalds };
1731da177e4SLinus Torvalds 
1741da177e4SLinus Torvalds #define	AIC_OP_OR	0x0
1751da177e4SLinus Torvalds #define	AIC_OP_AND	0x1
1761da177e4SLinus Torvalds #define AIC_OP_XOR	0x2
1771da177e4SLinus Torvalds #define	AIC_OP_ADD	0x3
1781da177e4SLinus Torvalds #define	AIC_OP_ADC	0x4
1791da177e4SLinus Torvalds #define	AIC_OP_ROL	0x5
1801da177e4SLinus Torvalds #define	AIC_OP_BMOV	0x6
1811da177e4SLinus Torvalds 
182*2628ed2bSHannes Reinecke #define	AIC_OP_MVI16	0x7
183*2628ed2bSHannes Reinecke 
1841da177e4SLinus Torvalds #define	AIC_OP_JMP	0x8
1851da177e4SLinus Torvalds #define AIC_OP_JC	0x9
1861da177e4SLinus Torvalds #define AIC_OP_JNC	0xa
1871da177e4SLinus Torvalds #define AIC_OP_CALL	0xb
1881da177e4SLinus Torvalds #define	AIC_OP_JNE	0xc
1891da177e4SLinus Torvalds #define	AIC_OP_JNZ	0xd
1901da177e4SLinus Torvalds #define	AIC_OP_JE	0xe
1911da177e4SLinus Torvalds #define	AIC_OP_JZ	0xf
1921da177e4SLinus Torvalds 
1931da177e4SLinus Torvalds /* Pseudo Ops */
1941da177e4SLinus Torvalds #define	AIC_OP_SHL	0x10
1951da177e4SLinus Torvalds #define	AIC_OP_SHR	0x20
1961da177e4SLinus Torvalds #define	AIC_OP_ROR	0x30
197*2628ed2bSHannes Reinecke 
198*2628ed2bSHannes Reinecke /* 16bit Ops. Low byte main opcode.  High byte extended opcode. */
199*2628ed2bSHannes Reinecke #define	AIC_OP_OR16	0x8005
200*2628ed2bSHannes Reinecke #define	AIC_OP_AND16	0x8105
201*2628ed2bSHannes Reinecke #define	AIC_OP_XOR16	0x8205
202*2628ed2bSHannes Reinecke #define	AIC_OP_ADD16	0x8305
203*2628ed2bSHannes Reinecke #define	AIC_OP_ADC16	0x8405
204*2628ed2bSHannes Reinecke #define AIC_OP_JNE16	0x8805
205*2628ed2bSHannes Reinecke #define AIC_OP_JNZ16	0x8905
206*2628ed2bSHannes Reinecke #define AIC_OP_JE16	0x8C05
207*2628ed2bSHannes Reinecke #define AIC_OP_JZ16	0x8B05
208*2628ed2bSHannes Reinecke #define AIC_OP_JMP16	0x9005
209*2628ed2bSHannes Reinecke #define AIC_OP_JC16	0x9105
210*2628ed2bSHannes Reinecke #define AIC_OP_JNC16	0x9205
211*2628ed2bSHannes Reinecke #define AIC_OP_CALL16	0x9305
212*2628ed2bSHannes Reinecke 
213*2628ed2bSHannes Reinecke /* Page extension is low three bits of second opcode byte. */
214*2628ed2bSHannes Reinecke #define AIC_OP_JMPF	0xA005
215*2628ed2bSHannes Reinecke #define AIC_OP_CALLF	0xB005
216*2628ed2bSHannes Reinecke #define AIC_OP_JCF	0xC005
217*2628ed2bSHannes Reinecke #define AIC_OP_JNCF	0xD005
218*2628ed2bSHannes Reinecke #define AIC_OP_CMPXCHG	0xE005
219