xref: /openbmc/linux/drivers/rtc/rtc-sunplus.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1fad6cbe9SVincent Shih // SPDX-License-Identifier: GPL-2.0
2fad6cbe9SVincent Shih 
3fad6cbe9SVincent Shih /*
4fad6cbe9SVincent Shih  * The RTC driver for Sunplus	SP7021
5fad6cbe9SVincent Shih  *
6fad6cbe9SVincent Shih  * Copyright (C) 2019 Sunplus Technology Inc., All rights reseerved.
7fad6cbe9SVincent Shih  */
8fad6cbe9SVincent Shih 
9fad6cbe9SVincent Shih #include <linux/bitfield.h>
10fad6cbe9SVincent Shih #include <linux/clk.h>
11fad6cbe9SVincent Shih #include <linux/err.h>
12fad6cbe9SVincent Shih #include <linux/io.h>
13fad6cbe9SVincent Shih #include <linux/ktime.h>
14fad6cbe9SVincent Shih #include <linux/module.h>
15fad6cbe9SVincent Shih #include <linux/of.h>
16fad6cbe9SVincent Shih #include <linux/platform_device.h>
17fad6cbe9SVincent Shih #include <linux/reset.h>
18fad6cbe9SVincent Shih #include <linux/rtc.h>
19fad6cbe9SVincent Shih 
20fad6cbe9SVincent Shih #define RTC_REG_NAME			"rtc"
21fad6cbe9SVincent Shih 
22fad6cbe9SVincent Shih #define RTC_CTRL			0x40
23fad6cbe9SVincent Shih #define TIMER_FREEZE_MASK_BIT		BIT(5 + 16)
24fad6cbe9SVincent Shih #define TIMER_FREEZE			BIT(5)
25fad6cbe9SVincent Shih #define DIS_SYS_RST_RTC_MASK_BIT	BIT(4 + 16)
26fad6cbe9SVincent Shih #define DIS_SYS_RST_RTC			BIT(4)
27fad6cbe9SVincent Shih #define RTC32K_MODE_RESET_MASK_BIT	BIT(3 + 16)
28fad6cbe9SVincent Shih #define RTC32K_MODE_RESET		BIT(3)
29fad6cbe9SVincent Shih #define ALARM_EN_OVERDUE_MASK_BIT	BIT(2 + 16)
30fad6cbe9SVincent Shih #define ALARM_EN_OVERDUE		BIT(2)
31fad6cbe9SVincent Shih #define ALARM_EN_PMC_MASK_BIT		BIT(1 + 16)
32fad6cbe9SVincent Shih #define ALARM_EN_PMC			BIT(1)
33fad6cbe9SVincent Shih #define ALARM_EN_MASK_BIT		BIT(0 + 16)
34fad6cbe9SVincent Shih #define ALARM_EN			BIT(0)
35fad6cbe9SVincent Shih #define RTC_TIMER_OUT			0x44
36fad6cbe9SVincent Shih #define RTC_DIVIDER			0x48
37fad6cbe9SVincent Shih #define RTC_TIMER_SET			0x4c
38fad6cbe9SVincent Shih #define RTC_ALARM_SET			0x50
39fad6cbe9SVincent Shih #define RTC_USER_DATA			0x54
40fad6cbe9SVincent Shih #define RTC_RESET_RECORD		0x58
41fad6cbe9SVincent Shih #define RTC_BATT_CHARGE_CTRL		0x5c
42fad6cbe9SVincent Shih #define BAT_CHARGE_RSEL_MASK_BIT	GENMASK(3 + 16, 2 + 16)
43fad6cbe9SVincent Shih #define BAT_CHARGE_RSEL_MASK		GENMASK(3, 2)
44fad6cbe9SVincent Shih #define BAT_CHARGE_RSEL_2K_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 0)
45fad6cbe9SVincent Shih #define BAT_CHARGE_RSEL_250_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 1)
46fad6cbe9SVincent Shih #define BAT_CHARGE_RSEL_50_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 2)
47fad6cbe9SVincent Shih #define BAT_CHARGE_RSEL_0_OHM		FIELD_PREP(BAT_CHARGE_RSEL_MASK, 3)
48fad6cbe9SVincent Shih #define BAT_CHARGE_DSEL_MASK_BIT	BIT(1 + 16)
49fad6cbe9SVincent Shih #define BAT_CHARGE_DSEL_MASK		GENMASK(1, 1)
50fad6cbe9SVincent Shih #define BAT_CHARGE_DSEL_ON		FIELD_PREP(BAT_CHARGE_DSEL_MASK, 0)
51fad6cbe9SVincent Shih #define BAT_CHARGE_DSEL_OFF		FIELD_PREP(BAT_CHARGE_DSEL_MASK, 1)
52fad6cbe9SVincent Shih #define BAT_CHARGE_EN_MASK_BIT		BIT(0 + 16)
53fad6cbe9SVincent Shih #define BAT_CHARGE_EN			BIT(0)
54fad6cbe9SVincent Shih #define RTC_TRIM_CTRL			0x60
55fad6cbe9SVincent Shih 
56fad6cbe9SVincent Shih struct sunplus_rtc {
57fad6cbe9SVincent Shih 	struct rtc_device *rtc;
58fad6cbe9SVincent Shih 	struct resource *res;
59fad6cbe9SVincent Shih 	struct clk *rtcclk;
60fad6cbe9SVincent Shih 	struct reset_control *rstc;
61fad6cbe9SVincent Shih 	void __iomem *reg_base;
62fad6cbe9SVincent Shih 	int irq;
63fad6cbe9SVincent Shih };
64fad6cbe9SVincent Shih 
sp_get_seconds(struct device * dev,unsigned long * secs)65fad6cbe9SVincent Shih static void sp_get_seconds(struct device *dev, unsigned long *secs)
66fad6cbe9SVincent Shih {
67fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
68fad6cbe9SVincent Shih 
69fad6cbe9SVincent Shih 	*secs = (unsigned long)readl(sp_rtc->reg_base + RTC_TIMER_OUT);
70fad6cbe9SVincent Shih }
71fad6cbe9SVincent Shih 
sp_set_seconds(struct device * dev,unsigned long secs)72fad6cbe9SVincent Shih static void sp_set_seconds(struct device *dev, unsigned long secs)
73fad6cbe9SVincent Shih {
74fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
75fad6cbe9SVincent Shih 
76fad6cbe9SVincent Shih 	writel((u32)secs, sp_rtc->reg_base + RTC_TIMER_SET);
77fad6cbe9SVincent Shih }
78fad6cbe9SVincent Shih 
sp_rtc_read_time(struct device * dev,struct rtc_time * tm)79fad6cbe9SVincent Shih static int sp_rtc_read_time(struct device *dev, struct rtc_time *tm)
80fad6cbe9SVincent Shih {
81fad6cbe9SVincent Shih 	unsigned long secs;
82fad6cbe9SVincent Shih 
83fad6cbe9SVincent Shih 	sp_get_seconds(dev, &secs);
84fad6cbe9SVincent Shih 	rtc_time64_to_tm(secs, tm);
85fad6cbe9SVincent Shih 
86fad6cbe9SVincent Shih 	return 0;
87fad6cbe9SVincent Shih }
88fad6cbe9SVincent Shih 
sp_rtc_set_time(struct device * dev,struct rtc_time * tm)89fad6cbe9SVincent Shih static int sp_rtc_set_time(struct device *dev, struct rtc_time *tm)
90fad6cbe9SVincent Shih {
91fad6cbe9SVincent Shih 	unsigned long secs;
92fad6cbe9SVincent Shih 
93fad6cbe9SVincent Shih 	secs = rtc_tm_to_time64(tm);
94fad6cbe9SVincent Shih 	dev_dbg(dev, "%s, secs = %lu\n", __func__, secs);
95fad6cbe9SVincent Shih 	sp_set_seconds(dev, secs);
96fad6cbe9SVincent Shih 
97fad6cbe9SVincent Shih 	return 0;
98fad6cbe9SVincent Shih }
99fad6cbe9SVincent Shih 
sp_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)100fad6cbe9SVincent Shih static int sp_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
101fad6cbe9SVincent Shih {
102fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
103fad6cbe9SVincent Shih 	unsigned long alarm_time;
104fad6cbe9SVincent Shih 
105fad6cbe9SVincent Shih 	alarm_time = rtc_tm_to_time64(&alrm->time);
106fad6cbe9SVincent Shih 	dev_dbg(dev, "%s, alarm_time: %u\n", __func__, (u32)(alarm_time));
107fad6cbe9SVincent Shih 	writel((u32)alarm_time, sp_rtc->reg_base + RTC_ALARM_SET);
108fad6cbe9SVincent Shih 
109fad6cbe9SVincent Shih 	return 0;
110fad6cbe9SVincent Shih }
111fad6cbe9SVincent Shih 
sp_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)112fad6cbe9SVincent Shih static int sp_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
113fad6cbe9SVincent Shih {
114fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
115fad6cbe9SVincent Shih 	unsigned int alarm_time;
116fad6cbe9SVincent Shih 
117fad6cbe9SVincent Shih 	alarm_time = readl(sp_rtc->reg_base + RTC_ALARM_SET);
118fad6cbe9SVincent Shih 	dev_dbg(dev, "%s, alarm_time: %u\n", __func__, alarm_time);
119fad6cbe9SVincent Shih 
120fad6cbe9SVincent Shih 	if (alarm_time == 0)
121fad6cbe9SVincent Shih 		alrm->enabled = 0;
122fad6cbe9SVincent Shih 	else
123fad6cbe9SVincent Shih 		alrm->enabled = 1;
124fad6cbe9SVincent Shih 
125fad6cbe9SVincent Shih 	rtc_time64_to_tm((unsigned long)(alarm_time), &alrm->time);
126fad6cbe9SVincent Shih 
127fad6cbe9SVincent Shih 	return 0;
128fad6cbe9SVincent Shih }
129fad6cbe9SVincent Shih 
sp_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)130fad6cbe9SVincent Shih static int sp_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
131fad6cbe9SVincent Shih {
132fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
133fad6cbe9SVincent Shih 
134fad6cbe9SVincent Shih 	if (enabled)
135fad6cbe9SVincent Shih 		writel((TIMER_FREEZE_MASK_BIT | DIS_SYS_RST_RTC_MASK_BIT |
136fad6cbe9SVincent Shih 			RTC32K_MODE_RESET_MASK_BIT | ALARM_EN_OVERDUE_MASK_BIT |
137fad6cbe9SVincent Shih 			ALARM_EN_PMC_MASK_BIT | ALARM_EN_MASK_BIT) |
138fad6cbe9SVincent Shih 			(DIS_SYS_RST_RTC | ALARM_EN_OVERDUE | ALARM_EN_PMC | ALARM_EN),
139fad6cbe9SVincent Shih 			sp_rtc->reg_base + RTC_CTRL);
140fad6cbe9SVincent Shih 	else
141fad6cbe9SVincent Shih 		writel((ALARM_EN_OVERDUE_MASK_BIT | ALARM_EN_PMC_MASK_BIT | ALARM_EN_MASK_BIT) |
142fad6cbe9SVincent Shih 			0x0, sp_rtc->reg_base + RTC_CTRL);
143fad6cbe9SVincent Shih 
144fad6cbe9SVincent Shih 	return 0;
145fad6cbe9SVincent Shih }
146fad6cbe9SVincent Shih 
147fad6cbe9SVincent Shih static const struct rtc_class_ops sp_rtc_ops = {
148fad6cbe9SVincent Shih 	.read_time =		sp_rtc_read_time,
149fad6cbe9SVincent Shih 	.set_time =		sp_rtc_set_time,
150fad6cbe9SVincent Shih 	.set_alarm =		sp_rtc_set_alarm,
151fad6cbe9SVincent Shih 	.read_alarm =		sp_rtc_read_alarm,
152fad6cbe9SVincent Shih 	.alarm_irq_enable =	sp_rtc_alarm_irq_enable,
153fad6cbe9SVincent Shih };
154fad6cbe9SVincent Shih 
sp_rtc_irq_handler(int irq,void * dev_id)155fad6cbe9SVincent Shih static irqreturn_t sp_rtc_irq_handler(int irq, void *dev_id)
156fad6cbe9SVincent Shih {
157fad6cbe9SVincent Shih 	struct platform_device *plat_dev = dev_id;
158fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(&plat_dev->dev);
159fad6cbe9SVincent Shih 
160fad6cbe9SVincent Shih 	rtc_update_irq(sp_rtc->rtc, 1, RTC_IRQF | RTC_AF);
161fad6cbe9SVincent Shih 	dev_dbg(&plat_dev->dev, "[RTC] ALARM INT\n");
162fad6cbe9SVincent Shih 
163fad6cbe9SVincent Shih 	return IRQ_HANDLED;
164fad6cbe9SVincent Shih }
165fad6cbe9SVincent Shih 
166fad6cbe9SVincent Shih /*
167fad6cbe9SVincent Shih  * -------------------------------------------------------------------------------------
168fad6cbe9SVincent Shih  * bat_charge_rsel   bat_charge_dsel   bat_charge_en     Remarks
169fad6cbe9SVincent Shih  *         x              x                 0            Disable
170fad6cbe9SVincent Shih  *         0              0                 1            0.86mA (2K Ohm with diode)
171fad6cbe9SVincent Shih  *         1              0                 1            1.81mA (250 Ohm with diode)
172fad6cbe9SVincent Shih  *         2              0                 1            2.07mA (50 Ohm with diode)
173fad6cbe9SVincent Shih  *         3              0                 1            16.0mA (0 Ohm with diode)
174fad6cbe9SVincent Shih  *         0              1                 1            1.36mA (2K Ohm without diode)
175fad6cbe9SVincent Shih  *         1              1                 1            3.99mA (250 Ohm without diode)
176fad6cbe9SVincent Shih  *         2              1                 1            4.41mA (50 Ohm without diode)
177fad6cbe9SVincent Shih  *         3              1                 1            16.0mA (0 Ohm without diode)
178fad6cbe9SVincent Shih  * -------------------------------------------------------------------------------------
179fad6cbe9SVincent Shih  */
sp_rtc_set_trickle_charger(struct device dev)180fad6cbe9SVincent Shih static void sp_rtc_set_trickle_charger(struct device dev)
181fad6cbe9SVincent Shih {
182fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(&dev);
183fad6cbe9SVincent Shih 	u32 ohms, rsel;
184fad6cbe9SVincent Shih 	u32 chargeable;
185fad6cbe9SVincent Shih 
186fad6cbe9SVincent Shih 	if (of_property_read_u32(dev.of_node, "trickle-resistor-ohms", &ohms) ||
187fad6cbe9SVincent Shih 	    of_property_read_u32(dev.of_node, "aux-voltage-chargeable", &chargeable)) {
188fad6cbe9SVincent Shih 		dev_warn(&dev, "battery charger disabled\n");
189fad6cbe9SVincent Shih 		return;
190fad6cbe9SVincent Shih 	}
191fad6cbe9SVincent Shih 
192fad6cbe9SVincent Shih 	switch (ohms) {
193fad6cbe9SVincent Shih 	case 2000:
194fad6cbe9SVincent Shih 		rsel = BAT_CHARGE_RSEL_2K_OHM;
195fad6cbe9SVincent Shih 		break;
196fad6cbe9SVincent Shih 	case 250:
197fad6cbe9SVincent Shih 		rsel = BAT_CHARGE_RSEL_250_OHM;
198fad6cbe9SVincent Shih 		break;
199fad6cbe9SVincent Shih 	case 50:
200fad6cbe9SVincent Shih 		rsel = BAT_CHARGE_RSEL_50_OHM;
201fad6cbe9SVincent Shih 		break;
202fad6cbe9SVincent Shih 	case 0:
203fad6cbe9SVincent Shih 		rsel = BAT_CHARGE_RSEL_0_OHM;
204fad6cbe9SVincent Shih 		break;
205fad6cbe9SVincent Shih 	default:
206fad6cbe9SVincent Shih 		dev_err(&dev, "invalid charger resistor value (%d)\n", ohms);
207fad6cbe9SVincent Shih 		return;
208fad6cbe9SVincent Shih 	}
209fad6cbe9SVincent Shih 
210fad6cbe9SVincent Shih 	writel(BAT_CHARGE_RSEL_MASK_BIT | rsel, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
211fad6cbe9SVincent Shih 
212fad6cbe9SVincent Shih 	switch (chargeable) {
213fad6cbe9SVincent Shih 	case 0:
214fad6cbe9SVincent Shih 		writel(BAT_CHARGE_DSEL_MASK_BIT | BAT_CHARGE_DSEL_OFF,
215fad6cbe9SVincent Shih 		       sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
216fad6cbe9SVincent Shih 		break;
217fad6cbe9SVincent Shih 	case 1:
218fad6cbe9SVincent Shih 		writel(BAT_CHARGE_DSEL_MASK_BIT | BAT_CHARGE_DSEL_ON,
219fad6cbe9SVincent Shih 		       sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
220fad6cbe9SVincent Shih 		break;
221fad6cbe9SVincent Shih 	default:
222fad6cbe9SVincent Shih 		dev_err(&dev, "invalid aux-voltage-chargeable value (%d)\n", chargeable);
223fad6cbe9SVincent Shih 		return;
224fad6cbe9SVincent Shih 	}
225fad6cbe9SVincent Shih 
226fad6cbe9SVincent Shih 	writel(BAT_CHARGE_EN_MASK_BIT | BAT_CHARGE_EN, sp_rtc->reg_base + RTC_BATT_CHARGE_CTRL);
227fad6cbe9SVincent Shih }
228fad6cbe9SVincent Shih 
sp_rtc_probe(struct platform_device * plat_dev)229fad6cbe9SVincent Shih static int sp_rtc_probe(struct platform_device *plat_dev)
230fad6cbe9SVincent Shih {
231fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc;
232fad6cbe9SVincent Shih 	int ret;
233fad6cbe9SVincent Shih 
234fad6cbe9SVincent Shih 	sp_rtc = devm_kzalloc(&plat_dev->dev, sizeof(*sp_rtc), GFP_KERNEL);
235fad6cbe9SVincent Shih 	if (!sp_rtc)
236fad6cbe9SVincent Shih 		return -ENOMEM;
237fad6cbe9SVincent Shih 
23891689053SYe Xingchen 	sp_rtc->reg_base = devm_platform_ioremap_resource_byname(plat_dev, RTC_REG_NAME);
239fad6cbe9SVincent Shih 	if (IS_ERR(sp_rtc->reg_base))
2405ceee540SYang Yingliang 		return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->reg_base),
241fad6cbe9SVincent Shih 					    "%s devm_ioremap_resource fail\n", RTC_REG_NAME);
24208279468SArnd Bergmann 	dev_dbg(&plat_dev->dev, "res = %pR, reg_base = %p\n",
24308279468SArnd Bergmann 		sp_rtc->res, sp_rtc->reg_base);
244fad6cbe9SVincent Shih 
245fad6cbe9SVincent Shih 	sp_rtc->irq = platform_get_irq(plat_dev, 0);
246fad6cbe9SVincent Shih 	if (sp_rtc->irq < 0)
247*df9c16b5SChen Jiahao 		return sp_rtc->irq;
248fad6cbe9SVincent Shih 
249fad6cbe9SVincent Shih 	ret = devm_request_irq(&plat_dev->dev, sp_rtc->irq, sp_rtc_irq_handler,
250fad6cbe9SVincent Shih 			       IRQF_TRIGGER_RISING, "rtc irq", plat_dev);
251fad6cbe9SVincent Shih 	if (ret)
252fad6cbe9SVincent Shih 		return dev_err_probe(&plat_dev->dev, ret, "devm_request_irq failed:\n");
253fad6cbe9SVincent Shih 
254fad6cbe9SVincent Shih 	sp_rtc->rtcclk = devm_clk_get(&plat_dev->dev, NULL);
255fad6cbe9SVincent Shih 	if (IS_ERR(sp_rtc->rtcclk))
256fad6cbe9SVincent Shih 		return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rtcclk),
257fad6cbe9SVincent Shih 					    "devm_clk_get fail\n");
258fad6cbe9SVincent Shih 
259fad6cbe9SVincent Shih 	sp_rtc->rstc = devm_reset_control_get_exclusive(&plat_dev->dev, NULL);
260fad6cbe9SVincent Shih 	if (IS_ERR(sp_rtc->rstc))
261fad6cbe9SVincent Shih 		return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rstc),
262fad6cbe9SVincent Shih 					    "failed to retrieve reset controller\n");
263fad6cbe9SVincent Shih 
264fad6cbe9SVincent Shih 	ret = clk_prepare_enable(sp_rtc->rtcclk);
265fad6cbe9SVincent Shih 	if (ret)
266fad6cbe9SVincent Shih 		goto free_clk;
267fad6cbe9SVincent Shih 
268fad6cbe9SVincent Shih 	ret = reset_control_deassert(sp_rtc->rstc);
269fad6cbe9SVincent Shih 	if (ret)
270fad6cbe9SVincent Shih 		goto free_reset_assert;
271fad6cbe9SVincent Shih 
272fad6cbe9SVincent Shih 	device_init_wakeup(&plat_dev->dev, 1);
273fad6cbe9SVincent Shih 	dev_set_drvdata(&plat_dev->dev, sp_rtc);
274fad6cbe9SVincent Shih 
275fad6cbe9SVincent Shih 	sp_rtc->rtc = devm_rtc_allocate_device(&plat_dev->dev);
276fad6cbe9SVincent Shih 	if (IS_ERR(sp_rtc->rtc)) {
277fad6cbe9SVincent Shih 		ret = PTR_ERR(sp_rtc->rtc);
278fad6cbe9SVincent Shih 		goto free_reset_assert;
279fad6cbe9SVincent Shih 	}
280fad6cbe9SVincent Shih 
281fad6cbe9SVincent Shih 	sp_rtc->rtc->range_max = U32_MAX;
282fad6cbe9SVincent Shih 	sp_rtc->rtc->range_min = 0;
283fad6cbe9SVincent Shih 	sp_rtc->rtc->ops = &sp_rtc_ops;
284fad6cbe9SVincent Shih 
285fad6cbe9SVincent Shih 	ret = devm_rtc_register_device(sp_rtc->rtc);
286fad6cbe9SVincent Shih 	if (ret)
287fad6cbe9SVincent Shih 		goto free_reset_assert;
288fad6cbe9SVincent Shih 
289fad6cbe9SVincent Shih 	/* Setup trickle charger */
290fad6cbe9SVincent Shih 	if (plat_dev->dev.of_node)
291fad6cbe9SVincent Shih 		sp_rtc_set_trickle_charger(plat_dev->dev);
292fad6cbe9SVincent Shih 
293fad6cbe9SVincent Shih 	/* Keep RTC from system reset */
294fad6cbe9SVincent Shih 	writel(DIS_SYS_RST_RTC_MASK_BIT | DIS_SYS_RST_RTC, sp_rtc->reg_base + RTC_CTRL);
295fad6cbe9SVincent Shih 
296fad6cbe9SVincent Shih 	return 0;
297fad6cbe9SVincent Shih 
298fad6cbe9SVincent Shih free_reset_assert:
299fad6cbe9SVincent Shih 	reset_control_assert(sp_rtc->rstc);
300fad6cbe9SVincent Shih free_clk:
301fad6cbe9SVincent Shih 	clk_disable_unprepare(sp_rtc->rtcclk);
302fad6cbe9SVincent Shih 
303fad6cbe9SVincent Shih 	return ret;
304fad6cbe9SVincent Shih }
305fad6cbe9SVincent Shih 
sp_rtc_remove(struct platform_device * plat_dev)306d6f52504SUwe Kleine-König static void sp_rtc_remove(struct platform_device *plat_dev)
307fad6cbe9SVincent Shih {
308fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(&plat_dev->dev);
309fad6cbe9SVincent Shih 
310fad6cbe9SVincent Shih 	device_init_wakeup(&plat_dev->dev, 0);
311fad6cbe9SVincent Shih 	reset_control_assert(sp_rtc->rstc);
312fad6cbe9SVincent Shih 	clk_disable_unprepare(sp_rtc->rtcclk);
313fad6cbe9SVincent Shih }
314fad6cbe9SVincent Shih 
315fad6cbe9SVincent Shih #ifdef CONFIG_PM_SLEEP
sp_rtc_suspend(struct device * dev)316fad6cbe9SVincent Shih static int sp_rtc_suspend(struct device *dev)
317fad6cbe9SVincent Shih {
318fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
319fad6cbe9SVincent Shih 
320fad6cbe9SVincent Shih 	if (device_may_wakeup(dev))
321fad6cbe9SVincent Shih 		enable_irq_wake(sp_rtc->irq);
322fad6cbe9SVincent Shih 
323fad6cbe9SVincent Shih 	return 0;
324fad6cbe9SVincent Shih }
325fad6cbe9SVincent Shih 
sp_rtc_resume(struct device * dev)326fad6cbe9SVincent Shih static int sp_rtc_resume(struct device *dev)
327fad6cbe9SVincent Shih {
328fad6cbe9SVincent Shih 	struct sunplus_rtc *sp_rtc = dev_get_drvdata(dev);
329fad6cbe9SVincent Shih 
330fad6cbe9SVincent Shih 	if (device_may_wakeup(dev))
331fad6cbe9SVincent Shih 		disable_irq_wake(sp_rtc->irq);
332fad6cbe9SVincent Shih 
333fad6cbe9SVincent Shih 	return 0;
334fad6cbe9SVincent Shih }
335fad6cbe9SVincent Shih #endif
336fad6cbe9SVincent Shih 
337fad6cbe9SVincent Shih static const struct of_device_id sp_rtc_of_match[] = {
338fad6cbe9SVincent Shih 	{ .compatible = "sunplus,sp7021-rtc" },
339fad6cbe9SVincent Shih 	{ /* sentinel */ }
340fad6cbe9SVincent Shih };
341fad6cbe9SVincent Shih MODULE_DEVICE_TABLE(of, sp_rtc_of_match);
342fad6cbe9SVincent Shih 
343fad6cbe9SVincent Shih static SIMPLE_DEV_PM_OPS(sp_rtc_pm_ops, sp_rtc_suspend, sp_rtc_resume);
344fad6cbe9SVincent Shih 
345fad6cbe9SVincent Shih static struct platform_driver sp_rtc_driver = {
346fad6cbe9SVincent Shih 	.probe   = sp_rtc_probe,
347d6f52504SUwe Kleine-König 	.remove_new = sp_rtc_remove,
348fad6cbe9SVincent Shih 	.driver  = {
349fad6cbe9SVincent Shih 		.name	= "sp7021-rtc",
350fad6cbe9SVincent Shih 		.of_match_table = sp_rtc_of_match,
351fad6cbe9SVincent Shih 		.pm	= &sp_rtc_pm_ops,
352fad6cbe9SVincent Shih 	},
353fad6cbe9SVincent Shih };
354fad6cbe9SVincent Shih module_platform_driver(sp_rtc_driver);
355fad6cbe9SVincent Shih 
356fad6cbe9SVincent Shih MODULE_AUTHOR("Vincent Shih <vincent.sunplus@gmail.com>");
357fad6cbe9SVincent Shih MODULE_DESCRIPTION("Sunplus RTC driver");
358fad6cbe9SVincent Shih MODULE_LICENSE("GPL v2");
359fad6cbe9SVincent Shih 
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