1df17f631Sdmitry pervushin /* 2df17f631Sdmitry pervushin * Freescale STMP37XX/STMP378X Real Time Clock driver 3df17f631Sdmitry pervushin * 4df17f631Sdmitry pervushin * Copyright (c) 2007 Sigmatel, Inc. 5df17f631Sdmitry pervushin * Peter Hartley, <peter.hartley@sigmatel.com> 6df17f631Sdmitry pervushin * 7df17f631Sdmitry pervushin * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. 8df17f631Sdmitry pervushin * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. 97e794cb7SWolfram Sang * Copyright 2011 Wolfram Sang, Pengutronix e.K. 10df17f631Sdmitry pervushin */ 11df17f631Sdmitry pervushin 12df17f631Sdmitry pervushin /* 13df17f631Sdmitry pervushin * The code contained herein is licensed under the GNU General Public 14df17f631Sdmitry pervushin * License. You may obtain a copy of the GNU General Public License 15df17f631Sdmitry pervushin * Version 2 or later at the following locations: 16df17f631Sdmitry pervushin * 17df17f631Sdmitry pervushin * http://www.opensource.org/licenses/gpl-license.html 18df17f631Sdmitry pervushin * http://www.gnu.org/copyleft/gpl.html 19df17f631Sdmitry pervushin */ 20df17f631Sdmitry pervushin #include <linux/kernel.h> 21df17f631Sdmitry pervushin #include <linux/module.h> 22b5167159SWolfram Sang #include <linux/io.h> 23df17f631Sdmitry pervushin #include <linux/init.h> 24df17f631Sdmitry pervushin #include <linux/platform_device.h> 25df17f631Sdmitry pervushin #include <linux/interrupt.h> 26df17f631Sdmitry pervushin #include <linux/rtc.h> 275a0e3ad6STejun Heo #include <linux/slab.h> 28dd8d20a3SMarek Vasut #include <linux/of_device.h> 29c8a6046eSSachin Kamat #include <linux/of.h> 301a71fb84SWolfram Sang #include <linux/stmp_device.h> 311a71fb84SWolfram Sang #include <linux/stmp3xxx_rtc_wdt.h> 32df17f631Sdmitry pervushin 3346b21218SWolfram Sang #include <mach/common.h> 3447eac337SWolfram Sang 3547eac337SWolfram Sang #define STMP3XXX_RTC_CTRL 0x0 36b5167159SWolfram Sang #define STMP3XXX_RTC_CTRL_SET 0x4 37b5167159SWolfram Sang #define STMP3XXX_RTC_CTRL_CLR 0x8 3847eac337SWolfram Sang #define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN 0x00000001 3947eac337SWolfram Sang #define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002 4047eac337SWolfram Sang #define STMP3XXX_RTC_CTRL_ALARM_IRQ 0x00000004 411a71fb84SWolfram Sang #define STMP3XXX_RTC_CTRL_WATCHDOGEN 0x00000010 4247eac337SWolfram Sang 4347eac337SWolfram Sang #define STMP3XXX_RTC_STAT 0x10 4447eac337SWolfram Sang #define STMP3XXX_RTC_STAT_STALE_SHIFT 16 4547eac337SWolfram Sang #define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000 4647eac337SWolfram Sang 4747eac337SWolfram Sang #define STMP3XXX_RTC_SECONDS 0x30 4847eac337SWolfram Sang 4947eac337SWolfram Sang #define STMP3XXX_RTC_ALARM 0x40 5047eac337SWolfram Sang 511a71fb84SWolfram Sang #define STMP3XXX_RTC_WATCHDOG 0x50 521a71fb84SWolfram Sang 5347eac337SWolfram Sang #define STMP3XXX_RTC_PERSISTENT0 0x60 54b5167159SWolfram Sang #define STMP3XXX_RTC_PERSISTENT0_SET 0x64 55b5167159SWolfram Sang #define STMP3XXX_RTC_PERSISTENT0_CLR 0x68 5647eac337SWolfram Sang #define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002 5747eac337SWolfram Sang #define STMP3XXX_RTC_PERSISTENT0_ALARM_EN 0x00000004 5847eac337SWolfram Sang #define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE 0x00000080 59df17f631Sdmitry pervushin 601a71fb84SWolfram Sang #define STMP3XXX_RTC_PERSISTENT1 0x70 611a71fb84SWolfram Sang /* missing bitmask in headers */ 621a71fb84SWolfram Sang #define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER 0x80000000 631a71fb84SWolfram Sang 64df17f631Sdmitry pervushin struct stmp3xxx_rtc_data { 65df17f631Sdmitry pervushin struct rtc_device *rtc; 66df17f631Sdmitry pervushin void __iomem *io; 677e794cb7SWolfram Sang int irq_alarm; 68df17f631Sdmitry pervushin }; 69df17f631Sdmitry pervushin 701a71fb84SWolfram Sang #if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG) 711a71fb84SWolfram Sang /** 721a71fb84SWolfram Sang * stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC 731a71fb84SWolfram Sang * @dev: the parent device of the watchdog (= the RTC) 741a71fb84SWolfram Sang * @timeout: the desired value for the timeout register of the watchdog. 751a71fb84SWolfram Sang * 0 disables the watchdog 761a71fb84SWolfram Sang * 771a71fb84SWolfram Sang * The watchdog needs one register and two bits which are in the RTC domain. 781a71fb84SWolfram Sang * To handle the resource conflict, the RTC driver will create another 791a71fb84SWolfram Sang * platform_device for the watchdog driver as a child of the RTC device. 801a71fb84SWolfram Sang * The watchdog driver is passed the below accessor function via platform_data 811a71fb84SWolfram Sang * to configure the watchdog. Locking is not needed because accessing SET/CLR 821a71fb84SWolfram Sang * registers is atomic. 831a71fb84SWolfram Sang */ 841a71fb84SWolfram Sang 851a71fb84SWolfram Sang static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout) 861a71fb84SWolfram Sang { 871a71fb84SWolfram Sang struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 881a71fb84SWolfram Sang 891a71fb84SWolfram Sang if (timeout) { 901a71fb84SWolfram Sang writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG); 911a71fb84SWolfram Sang writel(STMP3XXX_RTC_CTRL_WATCHDOGEN, 921a71fb84SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET); 931a71fb84SWolfram Sang writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER, 941a71fb84SWolfram Sang rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET); 951a71fb84SWolfram Sang } else { 961a71fb84SWolfram Sang writel(STMP3XXX_RTC_CTRL_WATCHDOGEN, 971a71fb84SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR); 981a71fb84SWolfram Sang writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER, 991a71fb84SWolfram Sang rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR); 1001a71fb84SWolfram Sang } 1011a71fb84SWolfram Sang } 1021a71fb84SWolfram Sang 1031a71fb84SWolfram Sang static struct stmp3xxx_wdt_pdata wdt_pdata = { 1041a71fb84SWolfram Sang .wdt_set_timeout = stmp3xxx_wdt_set_timeout, 1051a71fb84SWolfram Sang }; 1061a71fb84SWolfram Sang 1071a71fb84SWolfram Sang static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev) 1081a71fb84SWolfram Sang { 1091a71fb84SWolfram Sang struct platform_device *wdt_pdev = 1101a71fb84SWolfram Sang platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id); 1111a71fb84SWolfram Sang 1121a71fb84SWolfram Sang if (wdt_pdev) { 1131a71fb84SWolfram Sang wdt_pdev->dev.parent = &rtc_pdev->dev; 1141a71fb84SWolfram Sang wdt_pdev->dev.platform_data = &wdt_pdata; 1151a71fb84SWolfram Sang platform_device_add(wdt_pdev); 1161a71fb84SWolfram Sang } 1171a71fb84SWolfram Sang } 1181a71fb84SWolfram Sang #else 1191a71fb84SWolfram Sang static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev) 1201a71fb84SWolfram Sang { 1211a71fb84SWolfram Sang } 1221a71fb84SWolfram Sang #endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */ 1231a71fb84SWolfram Sang 124df17f631Sdmitry pervushin static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data) 125df17f631Sdmitry pervushin { 126df17f631Sdmitry pervushin /* 127df17f631Sdmitry pervushin * The datasheet doesn't say which way round the 128df17f631Sdmitry pervushin * NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0, 129df17f631Sdmitry pervushin * 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS 130df17f631Sdmitry pervushin */ 131b5167159SWolfram Sang while (readl(rtc_data->io + STMP3XXX_RTC_STAT) & 13247eac337SWolfram Sang (0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)) 133df17f631Sdmitry pervushin cpu_relax(); 134df17f631Sdmitry pervushin } 135df17f631Sdmitry pervushin 136df17f631Sdmitry pervushin /* Time read/write */ 137df17f631Sdmitry pervushin static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) 138df17f631Sdmitry pervushin { 139df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 140df17f631Sdmitry pervushin 141df17f631Sdmitry pervushin stmp3xxx_wait_time(rtc_data); 142b5167159SWolfram Sang rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm); 143df17f631Sdmitry pervushin return 0; 144df17f631Sdmitry pervushin } 145df17f631Sdmitry pervushin 146df17f631Sdmitry pervushin static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t) 147df17f631Sdmitry pervushin { 148df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 149df17f631Sdmitry pervushin 150b5167159SWolfram Sang writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS); 151df17f631Sdmitry pervushin stmp3xxx_wait_time(rtc_data); 152df17f631Sdmitry pervushin return 0; 153df17f631Sdmitry pervushin } 154df17f631Sdmitry pervushin 155df17f631Sdmitry pervushin /* interrupt(s) handler */ 156df17f631Sdmitry pervushin static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id) 157df17f631Sdmitry pervushin { 158df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id); 1597e794cb7SWolfram Sang u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL); 160df17f631Sdmitry pervushin 16147eac337SWolfram Sang if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) { 162b5167159SWolfram Sang writel(STMP3XXX_RTC_CTRL_ALARM_IRQ, 163b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL_CLR); 1647e794cb7SWolfram Sang rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF); 165df17f631Sdmitry pervushin return IRQ_HANDLED; 166df17f631Sdmitry pervushin } 167df17f631Sdmitry pervushin 1687e794cb7SWolfram Sang return IRQ_NONE; 1697e794cb7SWolfram Sang } 1707e794cb7SWolfram Sang 171df17f631Sdmitry pervushin static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled) 172df17f631Sdmitry pervushin { 173df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 174df17f631Sdmitry pervushin 175df17f631Sdmitry pervushin if (enabled) { 176b5167159SWolfram Sang writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | 177b5167159SWolfram Sang STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN, 178b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET); 179b5167159SWolfram Sang writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN, 180b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL_SET); 181df17f631Sdmitry pervushin } else { 182b5167159SWolfram Sang writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | 183b5167159SWolfram Sang STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN, 184b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR); 185b5167159SWolfram Sang writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN, 186b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL_CLR); 187df17f631Sdmitry pervushin } 188df17f631Sdmitry pervushin return 0; 189df17f631Sdmitry pervushin } 190df17f631Sdmitry pervushin 191df17f631Sdmitry pervushin static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 192df17f631Sdmitry pervushin { 193df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 194df17f631Sdmitry pervushin 195b5167159SWolfram Sang rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time); 196df17f631Sdmitry pervushin return 0; 197df17f631Sdmitry pervushin } 198df17f631Sdmitry pervushin 199df17f631Sdmitry pervushin static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 200df17f631Sdmitry pervushin { 201df17f631Sdmitry pervushin unsigned long t; 202df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 203df17f631Sdmitry pervushin 204df17f631Sdmitry pervushin rtc_tm_to_time(&alm->time, &t); 205b5167159SWolfram Sang writel(t, rtc_data->io + STMP3XXX_RTC_ALARM); 2067e794cb7SWolfram Sang 2077e794cb7SWolfram Sang stmp3xxx_alarm_irq_enable(dev, alm->enabled); 2087e794cb7SWolfram Sang 209df17f631Sdmitry pervushin return 0; 210df17f631Sdmitry pervushin } 211df17f631Sdmitry pervushin 212df17f631Sdmitry pervushin static struct rtc_class_ops stmp3xxx_rtc_ops = { 213df17f631Sdmitry pervushin .alarm_irq_enable = 214df17f631Sdmitry pervushin stmp3xxx_alarm_irq_enable, 215df17f631Sdmitry pervushin .read_time = stmp3xxx_rtc_gettime, 216df17f631Sdmitry pervushin .set_mmss = stmp3xxx_rtc_set_mmss, 217df17f631Sdmitry pervushin .read_alarm = stmp3xxx_rtc_read_alarm, 218df17f631Sdmitry pervushin .set_alarm = stmp3xxx_rtc_set_alarm, 219df17f631Sdmitry pervushin }; 220df17f631Sdmitry pervushin 221df17f631Sdmitry pervushin static int stmp3xxx_rtc_remove(struct platform_device *pdev) 222df17f631Sdmitry pervushin { 223df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev); 224df17f631Sdmitry pervushin 225df17f631Sdmitry pervushin if (!rtc_data) 226df17f631Sdmitry pervushin return 0; 227df17f631Sdmitry pervushin 2287e794cb7SWolfram Sang writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN, 229b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL_CLR); 230a91d2babSWolfram Sang platform_set_drvdata(pdev, NULL); 231df17f631Sdmitry pervushin 232df17f631Sdmitry pervushin return 0; 233df17f631Sdmitry pervushin } 234df17f631Sdmitry pervushin 235df17f631Sdmitry pervushin static int stmp3xxx_rtc_probe(struct platform_device *pdev) 236df17f631Sdmitry pervushin { 237df17f631Sdmitry pervushin struct stmp3xxx_rtc_data *rtc_data; 238df17f631Sdmitry pervushin struct resource *r; 239df17f631Sdmitry pervushin int err; 240df17f631Sdmitry pervushin 24187a81420SJingoo Han rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL); 242df17f631Sdmitry pervushin if (!rtc_data) 243df17f631Sdmitry pervushin return -ENOMEM; 244df17f631Sdmitry pervushin 245df17f631Sdmitry pervushin r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 246df17f631Sdmitry pervushin if (!r) { 247df17f631Sdmitry pervushin dev_err(&pdev->dev, "failed to get resource\n"); 24887a81420SJingoo Han return -ENXIO; 249df17f631Sdmitry pervushin } 250df17f631Sdmitry pervushin 25187a81420SJingoo Han rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r)); 252df17f631Sdmitry pervushin if (!rtc_data->io) { 253df17f631Sdmitry pervushin dev_err(&pdev->dev, "ioremap failed\n"); 25487a81420SJingoo Han return -EIO; 255df17f631Sdmitry pervushin } 256df17f631Sdmitry pervushin 257df17f631Sdmitry pervushin rtc_data->irq_alarm = platform_get_irq(pdev, 0); 258df17f631Sdmitry pervushin 259b5167159SWolfram Sang if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) & 26047eac337SWolfram Sang STMP3XXX_RTC_STAT_RTC_PRESENT)) { 261df17f631Sdmitry pervushin dev_err(&pdev->dev, "no device onboard\n"); 26287a81420SJingoo Han return -ENODEV; 263df17f631Sdmitry pervushin } 264df17f631Sdmitry pervushin 265a91d2babSWolfram Sang platform_set_drvdata(pdev, rtc_data); 266a91d2babSWolfram Sang 26746b21218SWolfram Sang mxs_reset_block(rtc_data->io); 268b5167159SWolfram Sang writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | 26947eac337SWolfram Sang STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN | 27047eac337SWolfram Sang STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE, 271b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR); 272a91d2babSWolfram Sang 2737e794cb7SWolfram Sang writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN | 2747e794cb7SWolfram Sang STMP3XXX_RTC_CTRL_ALARM_IRQ_EN, 2757e794cb7SWolfram Sang rtc_data->io + STMP3XXX_RTC_CTRL_CLR); 2767e794cb7SWolfram Sang 27787a81420SJingoo Han rtc_data->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 278df17f631Sdmitry pervushin &stmp3xxx_rtc_ops, THIS_MODULE); 279df17f631Sdmitry pervushin if (IS_ERR(rtc_data->rtc)) { 280df17f631Sdmitry pervushin err = PTR_ERR(rtc_data->rtc); 28187a81420SJingoo Han goto out; 282df17f631Sdmitry pervushin } 283df17f631Sdmitry pervushin 28487a81420SJingoo Han err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm, 28587a81420SJingoo Han stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev); 286df17f631Sdmitry pervushin if (err) { 287df17f631Sdmitry pervushin dev_err(&pdev->dev, "Cannot claim IRQ%d\n", 288df17f631Sdmitry pervushin rtc_data->irq_alarm); 28987a81420SJingoo Han goto out; 290df17f631Sdmitry pervushin } 291df17f631Sdmitry pervushin 2921a71fb84SWolfram Sang stmp3xxx_wdt_register(pdev); 293df17f631Sdmitry pervushin return 0; 294df17f631Sdmitry pervushin 29587a81420SJingoo Han out: 296a91d2babSWolfram Sang platform_set_drvdata(pdev, NULL); 297df17f631Sdmitry pervushin return err; 298df17f631Sdmitry pervushin } 299df17f631Sdmitry pervushin 300*ef69a7f0SJingoo Han #ifdef CONFIG_PM_SLEEP 301*ef69a7f0SJingoo Han static int stmp3xxx_rtc_suspend(struct device *dev) 302df17f631Sdmitry pervushin { 303df17f631Sdmitry pervushin return 0; 304df17f631Sdmitry pervushin } 305df17f631Sdmitry pervushin 306*ef69a7f0SJingoo Han static int stmp3xxx_rtc_resume(struct device *dev) 307df17f631Sdmitry pervushin { 308*ef69a7f0SJingoo Han struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev); 309df17f631Sdmitry pervushin 31046b21218SWolfram Sang mxs_reset_block(rtc_data->io); 311b5167159SWolfram Sang writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | 31247eac337SWolfram Sang STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN | 31347eac337SWolfram Sang STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE, 314b5167159SWolfram Sang rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR); 315df17f631Sdmitry pervushin return 0; 316df17f631Sdmitry pervushin } 317df17f631Sdmitry pervushin #endif 318df17f631Sdmitry pervushin 319*ef69a7f0SJingoo Han static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend, 320*ef69a7f0SJingoo Han stmp3xxx_rtc_resume); 321*ef69a7f0SJingoo Han 322dd8d20a3SMarek Vasut static const struct of_device_id rtc_dt_ids[] = { 323dd8d20a3SMarek Vasut { .compatible = "fsl,stmp3xxx-rtc", }, 324dd8d20a3SMarek Vasut { /* sentinel */ } 325dd8d20a3SMarek Vasut }; 326dd8d20a3SMarek Vasut MODULE_DEVICE_TABLE(of, rtc_dt_ids); 327dd8d20a3SMarek Vasut 328df17f631Sdmitry pervushin static struct platform_driver stmp3xxx_rtcdrv = { 329df17f631Sdmitry pervushin .probe = stmp3xxx_rtc_probe, 330df17f631Sdmitry pervushin .remove = stmp3xxx_rtc_remove, 331df17f631Sdmitry pervushin .driver = { 332df17f631Sdmitry pervushin .name = "stmp3xxx-rtc", 333df17f631Sdmitry pervushin .owner = THIS_MODULE, 334*ef69a7f0SJingoo Han .pm = &stmp3xxx_rtc_pm_ops, 335c8a6046eSSachin Kamat .of_match_table = of_match_ptr(rtc_dt_ids), 336df17f631Sdmitry pervushin }, 337df17f631Sdmitry pervushin }; 338df17f631Sdmitry pervushin 3390c4eae66SAxel Lin module_platform_driver(stmp3xxx_rtcdrv); 340df17f631Sdmitry pervushin 341df17f631Sdmitry pervushin MODULE_DESCRIPTION("STMP3xxx RTC Driver"); 3427e794cb7SWolfram Sang MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and " 3437e794cb7SWolfram Sang "Wolfram Sang <w.sang@pengutronix.de>"); 344df17f631Sdmitry pervushin MODULE_LICENSE("GPL"); 345