11d67a232SDianlong Li // SPDX-License-Identifier: GPL-2.0
21d67a232SDianlong Li /*
31d67a232SDianlong Li * Real Time Clock (RTC) Driver for sd3078
41d67a232SDianlong Li * Copyright (C) 2018 Zoro Li
51d67a232SDianlong Li */
61d67a232SDianlong Li
71d67a232SDianlong Li #include <linux/bcd.h>
81d67a232SDianlong Li #include <linux/i2c.h>
91d67a232SDianlong Li #include <linux/module.h>
101d67a232SDianlong Li #include <linux/regmap.h>
111d67a232SDianlong Li #include <linux/rtc.h>
121d67a232SDianlong Li #include <linux/slab.h>
131d67a232SDianlong Li
141d67a232SDianlong Li #define SD3078_REG_SC 0x00
151d67a232SDianlong Li #define SD3078_REG_MN 0x01
161d67a232SDianlong Li #define SD3078_REG_HR 0x02
171d67a232SDianlong Li #define SD3078_REG_DW 0x03
181d67a232SDianlong Li #define SD3078_REG_DM 0x04
191d67a232SDianlong Li #define SD3078_REG_MO 0x05
201d67a232SDianlong Li #define SD3078_REG_YR 0x06
211d67a232SDianlong Li
221d67a232SDianlong Li #define SD3078_REG_CTRL1 0x0f
231d67a232SDianlong Li #define SD3078_REG_CTRL2 0x10
241d67a232SDianlong Li #define SD3078_REG_CTRL3 0x11
251d67a232SDianlong Li
261d67a232SDianlong Li #define KEY_WRITE1 0x80
271d67a232SDianlong Li #define KEY_WRITE2 0x04
281d67a232SDianlong Li #define KEY_WRITE3 0x80
291d67a232SDianlong Li
301d67a232SDianlong Li #define NUM_TIME_REGS (SD3078_REG_YR - SD3078_REG_SC + 1)
311d67a232SDianlong Li
321d67a232SDianlong Li /*
331d67a232SDianlong Li * The sd3078 has write protection
341d67a232SDianlong Li * and we can choose whether or not to use it.
351d67a232SDianlong Li * Write protection is turned off by default.
361d67a232SDianlong Li */
371d67a232SDianlong Li #define WRITE_PROTECT_EN 0
381d67a232SDianlong Li
391d67a232SDianlong Li struct sd3078 {
401d67a232SDianlong Li struct rtc_device *rtc;
411d67a232SDianlong Li struct regmap *regmap;
421d67a232SDianlong Li };
431d67a232SDianlong Li
441d67a232SDianlong Li /*
451d67a232SDianlong Li * In order to prevent arbitrary modification of the time register,
461d67a232SDianlong Li * when modification of the register,
471d67a232SDianlong Li * the "write" bit needs to be written in a certain order.
481d67a232SDianlong Li * 1. set WRITE1 bit
491d67a232SDianlong Li * 2. set WRITE2 bit
501d67a232SDianlong Li * 3. set WRITE3 bit
511d67a232SDianlong Li */
sd3078_enable_reg_write(struct sd3078 * sd3078)521d67a232SDianlong Li static void sd3078_enable_reg_write(struct sd3078 *sd3078)
531d67a232SDianlong Li {
541d67a232SDianlong Li regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL2,
551d67a232SDianlong Li KEY_WRITE1, KEY_WRITE1);
561d67a232SDianlong Li regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
571d67a232SDianlong Li KEY_WRITE2, KEY_WRITE2);
581d67a232SDianlong Li regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
591d67a232SDianlong Li KEY_WRITE3, KEY_WRITE3);
601d67a232SDianlong Li }
611d67a232SDianlong Li
621d67a232SDianlong Li #if WRITE_PROTECT_EN
631d67a232SDianlong Li /*
641d67a232SDianlong Li * In order to prevent arbitrary modification of the time register,
651d67a232SDianlong Li * we should disable the write function.
661d67a232SDianlong Li * when disable write,
671d67a232SDianlong Li * the "write" bit needs to be clear in a certain order.
681d67a232SDianlong Li * 1. clear WRITE2 bit
691d67a232SDianlong Li * 2. clear WRITE3 bit
701d67a232SDianlong Li * 3. clear WRITE1 bit
711d67a232SDianlong Li */
sd3078_disable_reg_write(struct sd3078 * sd3078)721d67a232SDianlong Li static void sd3078_disable_reg_write(struct sd3078 *sd3078)
731d67a232SDianlong Li {
741d67a232SDianlong Li regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
751d67a232SDianlong Li KEY_WRITE2, 0);
761d67a232SDianlong Li regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
771d67a232SDianlong Li KEY_WRITE3, 0);
781d67a232SDianlong Li regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL2,
791d67a232SDianlong Li KEY_WRITE1, 0);
801d67a232SDianlong Li }
811d67a232SDianlong Li #endif
821d67a232SDianlong Li
sd3078_rtc_read_time(struct device * dev,struct rtc_time * tm)831d67a232SDianlong Li static int sd3078_rtc_read_time(struct device *dev, struct rtc_time *tm)
841d67a232SDianlong Li {
851d67a232SDianlong Li unsigned char hour;
861d67a232SDianlong Li unsigned char rtc_data[NUM_TIME_REGS] = {0};
871d67a232SDianlong Li struct i2c_client *client = to_i2c_client(dev);
881d67a232SDianlong Li struct sd3078 *sd3078 = i2c_get_clientdata(client);
891d67a232SDianlong Li int ret;
901d67a232SDianlong Li
911d67a232SDianlong Li ret = regmap_bulk_read(sd3078->regmap, SD3078_REG_SC, rtc_data,
921d67a232SDianlong Li NUM_TIME_REGS);
931d67a232SDianlong Li if (ret < 0) {
941d67a232SDianlong Li dev_err(dev, "reading from RTC failed with err:%d\n", ret);
951d67a232SDianlong Li return ret;
961d67a232SDianlong Li }
971d67a232SDianlong Li
981d67a232SDianlong Li tm->tm_sec = bcd2bin(rtc_data[SD3078_REG_SC] & 0x7F);
991d67a232SDianlong Li tm->tm_min = bcd2bin(rtc_data[SD3078_REG_MN] & 0x7F);
1001d67a232SDianlong Li
1011d67a232SDianlong Li /*
1021d67a232SDianlong Li * The sd3078 supports 12/24 hour mode.
1031d67a232SDianlong Li * When getting time,
1041d67a232SDianlong Li * we need to convert the 12 hour mode to the 24 hour mode.
1051d67a232SDianlong Li */
1061d67a232SDianlong Li hour = rtc_data[SD3078_REG_HR];
1071d67a232SDianlong Li if (hour & 0x80) /* 24H MODE */
1081d67a232SDianlong Li tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x3F);
1091d67a232SDianlong Li else if (hour & 0x20) /* 12H MODE PM */
1101d67a232SDianlong Li tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x1F) + 12;
1111d67a232SDianlong Li else /* 12H MODE AM */
1121d67a232SDianlong Li tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x1F);
1131d67a232SDianlong Li
1141d67a232SDianlong Li tm->tm_mday = bcd2bin(rtc_data[SD3078_REG_DM] & 0x3F);
1151d67a232SDianlong Li tm->tm_wday = rtc_data[SD3078_REG_DW] & 0x07;
1161d67a232SDianlong Li tm->tm_mon = bcd2bin(rtc_data[SD3078_REG_MO] & 0x1F) - 1;
1171d67a232SDianlong Li tm->tm_year = bcd2bin(rtc_data[SD3078_REG_YR]) + 100;
1181d67a232SDianlong Li
1191d67a232SDianlong Li return 0;
1201d67a232SDianlong Li }
1211d67a232SDianlong Li
sd3078_rtc_set_time(struct device * dev,struct rtc_time * tm)1221d67a232SDianlong Li static int sd3078_rtc_set_time(struct device *dev, struct rtc_time *tm)
1231d67a232SDianlong Li {
1241d67a232SDianlong Li unsigned char rtc_data[NUM_TIME_REGS];
1251d67a232SDianlong Li struct i2c_client *client = to_i2c_client(dev);
1261d67a232SDianlong Li struct sd3078 *sd3078 = i2c_get_clientdata(client);
1271d67a232SDianlong Li int ret;
1281d67a232SDianlong Li
1291d67a232SDianlong Li rtc_data[SD3078_REG_SC] = bin2bcd(tm->tm_sec);
1301d67a232SDianlong Li rtc_data[SD3078_REG_MN] = bin2bcd(tm->tm_min);
1311d67a232SDianlong Li rtc_data[SD3078_REG_HR] = bin2bcd(tm->tm_hour) | 0x80;
1321d67a232SDianlong Li rtc_data[SD3078_REG_DM] = bin2bcd(tm->tm_mday);
1331d67a232SDianlong Li rtc_data[SD3078_REG_DW] = tm->tm_wday & 0x07;
1341d67a232SDianlong Li rtc_data[SD3078_REG_MO] = bin2bcd(tm->tm_mon) + 1;
1351d67a232SDianlong Li rtc_data[SD3078_REG_YR] = bin2bcd(tm->tm_year - 100);
1361d67a232SDianlong Li
1371d67a232SDianlong Li #if WRITE_PROTECT_EN
1381d67a232SDianlong Li sd3078_enable_reg_write(sd3078);
1391d67a232SDianlong Li #endif
1401d67a232SDianlong Li
1411d67a232SDianlong Li ret = regmap_bulk_write(sd3078->regmap, SD3078_REG_SC, rtc_data,
1421d67a232SDianlong Li NUM_TIME_REGS);
1431d67a232SDianlong Li if (ret < 0) {
1441d67a232SDianlong Li dev_err(dev, "writing to RTC failed with err:%d\n", ret);
1451d67a232SDianlong Li return ret;
1461d67a232SDianlong Li }
1471d67a232SDianlong Li
1481d67a232SDianlong Li #if WRITE_PROTECT_EN
1491d67a232SDianlong Li sd3078_disable_reg_write(sd3078);
1501d67a232SDianlong Li #endif
1511d67a232SDianlong Li
1521d67a232SDianlong Li return 0;
1531d67a232SDianlong Li }
1541d67a232SDianlong Li
1551d67a232SDianlong Li static const struct rtc_class_ops sd3078_rtc_ops = {
1561d67a232SDianlong Li .read_time = sd3078_rtc_read_time,
1571d67a232SDianlong Li .set_time = sd3078_rtc_set_time,
1581d67a232SDianlong Li };
1591d67a232SDianlong Li
1601d67a232SDianlong Li static const struct regmap_config regmap_config = {
1611d67a232SDianlong Li .reg_bits = 8,
1621d67a232SDianlong Li .val_bits = 8,
1631d67a232SDianlong Li .max_register = 0x11,
1641d67a232SDianlong Li };
1651d67a232SDianlong Li
sd3078_probe(struct i2c_client * client)1663f4a3322SStephen Kitt static int sd3078_probe(struct i2c_client *client)
1671d67a232SDianlong Li {
1681d67a232SDianlong Li int ret;
1691d67a232SDianlong Li struct sd3078 *sd3078;
1701d67a232SDianlong Li
1711d67a232SDianlong Li if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
1721d67a232SDianlong Li return -ENODEV;
1731d67a232SDianlong Li
1741d67a232SDianlong Li sd3078 = devm_kzalloc(&client->dev, sizeof(*sd3078), GFP_KERNEL);
1751d67a232SDianlong Li if (!sd3078)
1761d67a232SDianlong Li return -ENOMEM;
1771d67a232SDianlong Li
1781d67a232SDianlong Li sd3078->regmap = devm_regmap_init_i2c(client, ®map_config);
1791d67a232SDianlong Li if (IS_ERR(sd3078->regmap)) {
1801d67a232SDianlong Li dev_err(&client->dev, "regmap allocation failed\n");
1811d67a232SDianlong Li return PTR_ERR(sd3078->regmap);
1821d67a232SDianlong Li }
1831d67a232SDianlong Li
1841d67a232SDianlong Li i2c_set_clientdata(client, sd3078);
1851d67a232SDianlong Li
1861d67a232SDianlong Li sd3078->rtc = devm_rtc_allocate_device(&client->dev);
1871d67a232SDianlong Li if (IS_ERR(sd3078->rtc))
1881d67a232SDianlong Li return PTR_ERR(sd3078->rtc);
1891d67a232SDianlong Li
1901d67a232SDianlong Li sd3078->rtc->ops = &sd3078_rtc_ops;
1911d67a232SDianlong Li sd3078->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
1921d67a232SDianlong Li sd3078->rtc->range_max = RTC_TIMESTAMP_END_2099;
1931d67a232SDianlong Li
194fdcfd854SBartosz Golaszewski ret = devm_rtc_register_device(sd3078->rtc);
19544c638ceSAlexandre Belloni if (ret)
1961d67a232SDianlong Li return ret;
1971d67a232SDianlong Li
1981d67a232SDianlong Li sd3078_enable_reg_write(sd3078);
1991d67a232SDianlong Li
2001d67a232SDianlong Li return 0;
2011d67a232SDianlong Li }
2021d67a232SDianlong Li
2031d67a232SDianlong Li static const struct i2c_device_id sd3078_id[] = {
2041d67a232SDianlong Li {"sd3078", 0},
2051d67a232SDianlong Li { }
2061d67a232SDianlong Li };
2071d67a232SDianlong Li MODULE_DEVICE_TABLE(i2c, sd3078_id);
2081d67a232SDianlong Li
209302757c9SAlexandre Belloni static const __maybe_unused struct of_device_id rtc_dt_match[] = {
2101d67a232SDianlong Li { .compatible = "whwave,sd3078" },
2111d67a232SDianlong Li {},
2121d67a232SDianlong Li };
2131d67a232SDianlong Li MODULE_DEVICE_TABLE(of, rtc_dt_match);
2141d67a232SDianlong Li
215f724c6beSWei Yongjun static struct i2c_driver sd3078_driver = {
2161d67a232SDianlong Li .driver = {
2171d67a232SDianlong Li .name = "sd3078",
2181d67a232SDianlong Li .of_match_table = of_match_ptr(rtc_dt_match),
2191d67a232SDianlong Li },
220*31b0cecbSUwe Kleine-König .probe = sd3078_probe,
2211d67a232SDianlong Li .id_table = sd3078_id,
2221d67a232SDianlong Li };
2231d67a232SDianlong Li
2241d67a232SDianlong Li module_i2c_driver(sd3078_driver);
2251d67a232SDianlong Li
2261d67a232SDianlong Li MODULE_AUTHOR("Dianlong Li <long17.cool@163.com>");
2271d67a232SDianlong Li MODULE_DESCRIPTION("SD3078 RTC driver");
2281d67a232SDianlong Li MODULE_LICENSE("GPL v2");
229