1 /* 2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx 3 * 4 * Copyright (c) 2000 Nils Faerber 5 * 6 * Based on rtc.c by Paul Gortmaker 7 * 8 * Original Driver by Nils Faerber <nils@kernelconcepts.de> 9 * 10 * Modifications from: 11 * CIH <cih@coventive.com> 12 * Nicolas Pitre <nico@fluxnic.net> 13 * Andrew Christian <andrew.christian@hp.com> 14 * 15 * Converted to the RTC subsystem and Driver Model 16 * by Richard Purdie <rpurdie@rpsys.net> 17 * 18 * This program is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License 20 * as published by the Free Software Foundation; either version 21 * 2 of the License, or (at your option) any later version. 22 */ 23 24 #include <linux/platform_device.h> 25 #include <linux/module.h> 26 #include <linux/clk.h> 27 #include <linux/rtc.h> 28 #include <linux/init.h> 29 #include <linux/fs.h> 30 #include <linux/interrupt.h> 31 #include <linux/slab.h> 32 #include <linux/string.h> 33 #include <linux/of.h> 34 #include <linux/pm.h> 35 #include <linux/bitops.h> 36 #include <linux/io.h> 37 38 #include <mach/hardware.h> 39 #include <mach/irqs.h> 40 41 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP) 42 #include <mach/regs-rtc.h> 43 #endif 44 45 #include "rtc-sa1100.h" 46 47 #define RTC_DEF_DIVIDER (32768 - 1) 48 #define RTC_DEF_TRIM 0 49 #define RTC_FREQ 1024 50 51 52 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) 53 { 54 struct sa1100_rtc *info = dev_get_drvdata(dev_id); 55 struct rtc_device *rtc = info->rtc; 56 unsigned int rtsr; 57 unsigned long events = 0; 58 59 spin_lock(&info->lock); 60 61 rtsr = RTSR; 62 /* clear interrupt sources */ 63 RTSR = 0; 64 /* Fix for a nasty initialization problem the in SA11xx RTSR register. 65 * See also the comments in sa1100_rtc_probe(). */ 66 if (rtsr & (RTSR_ALE | RTSR_HZE)) { 67 /* This is the original code, before there was the if test 68 * above. This code does not clear interrupts that were not 69 * enabled. */ 70 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); 71 } else { 72 /* For some reason, it is possible to enter this routine 73 * without interruptions enabled, it has been tested with 74 * several units (Bug in SA11xx chip?). 75 * 76 * This situation leads to an infinite "loop" of interrupt 77 * routine calling and as a result the processor seems to 78 * lock on its first call to open(). */ 79 RTSR = RTSR_AL | RTSR_HZ; 80 } 81 82 /* clear alarm interrupt if it has occurred */ 83 if (rtsr & RTSR_AL) 84 rtsr &= ~RTSR_ALE; 85 RTSR = rtsr & (RTSR_ALE | RTSR_HZE); 86 87 /* update irq data & counter */ 88 if (rtsr & RTSR_AL) 89 events |= RTC_AF | RTC_IRQF; 90 if (rtsr & RTSR_HZ) 91 events |= RTC_UF | RTC_IRQF; 92 93 rtc_update_irq(rtc, 1, events); 94 95 spin_unlock(&info->lock); 96 97 return IRQ_HANDLED; 98 } 99 100 static int sa1100_rtc_open(struct device *dev) 101 { 102 struct sa1100_rtc *info = dev_get_drvdata(dev); 103 struct rtc_device *rtc = info->rtc; 104 int ret; 105 106 ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev); 107 if (ret) { 108 dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz); 109 goto fail_ui; 110 } 111 ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev); 112 if (ret) { 113 dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm); 114 goto fail_ai; 115 } 116 rtc->max_user_freq = RTC_FREQ; 117 rtc_irq_set_freq(rtc, NULL, RTC_FREQ); 118 119 return 0; 120 121 fail_ai: 122 free_irq(info->irq_1hz, dev); 123 fail_ui: 124 clk_disable_unprepare(info->clk); 125 return ret; 126 } 127 128 static void sa1100_rtc_release(struct device *dev) 129 { 130 struct sa1100_rtc *info = dev_get_drvdata(dev); 131 132 spin_lock_irq(&info->lock); 133 RTSR = 0; 134 spin_unlock_irq(&info->lock); 135 136 free_irq(info->irq_alarm, dev); 137 free_irq(info->irq_1hz, dev); 138 } 139 140 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 141 { 142 struct sa1100_rtc *info = dev_get_drvdata(dev); 143 144 spin_lock_irq(&info->lock); 145 if (enabled) 146 RTSR |= RTSR_ALE; 147 else 148 RTSR &= ~RTSR_ALE; 149 spin_unlock_irq(&info->lock); 150 return 0; 151 } 152 153 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) 154 { 155 rtc_time_to_tm(RCNR, tm); 156 return 0; 157 } 158 159 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) 160 { 161 unsigned long time; 162 int ret; 163 164 ret = rtc_tm_to_time(tm, &time); 165 if (ret == 0) 166 RCNR = time; 167 return ret; 168 } 169 170 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 171 { 172 u32 rtsr; 173 174 rtsr = RTSR; 175 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; 176 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; 177 return 0; 178 } 179 180 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 181 { 182 struct sa1100_rtc *info = dev_get_drvdata(dev); 183 unsigned long time; 184 int ret; 185 186 spin_lock_irq(&info->lock); 187 ret = rtc_tm_to_time(&alrm->time, &time); 188 if (ret != 0) 189 goto out; 190 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL); 191 RTAR = time; 192 if (alrm->enabled) 193 RTSR |= RTSR_ALE; 194 else 195 RTSR &= ~RTSR_ALE; 196 out: 197 spin_unlock_irq(&info->lock); 198 199 return ret; 200 } 201 202 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) 203 { 204 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR); 205 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR); 206 207 return 0; 208 } 209 210 static const struct rtc_class_ops sa1100_rtc_ops = { 211 .open = sa1100_rtc_open, 212 .release = sa1100_rtc_release, 213 .read_time = sa1100_rtc_read_time, 214 .set_time = sa1100_rtc_set_time, 215 .read_alarm = sa1100_rtc_read_alarm, 216 .set_alarm = sa1100_rtc_set_alarm, 217 .proc = sa1100_rtc_proc, 218 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable, 219 }; 220 221 int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info) 222 { 223 struct rtc_device *rtc; 224 int ret; 225 226 spin_lock_init(&info->lock); 227 228 info->clk = devm_clk_get(&pdev->dev, NULL); 229 if (IS_ERR(info->clk)) { 230 dev_err(&pdev->dev, "failed to find rtc clock source\n"); 231 return PTR_ERR(info->clk); 232 } 233 234 ret = clk_prepare_enable(info->clk); 235 if (ret) 236 return ret; 237 /* 238 * According to the manual we should be able to let RTTR be zero 239 * and then a default diviser for a 32.768KHz clock is used. 240 * Apparently this doesn't work, at least for my SA1110 rev 5. 241 * If the clock divider is uninitialized then reset it to the 242 * default value to get the 1Hz clock. 243 */ 244 if (RTTR == 0) { 245 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); 246 dev_warn(&pdev->dev, "warning: " 247 "initializing default clock divider/trim value\n"); 248 /* The current RTC value probably doesn't make sense either */ 249 RCNR = 0; 250 } 251 252 rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops, 253 THIS_MODULE); 254 if (IS_ERR(rtc)) { 255 clk_disable_unprepare(info->clk); 256 return PTR_ERR(rtc); 257 } 258 info->rtc = rtc; 259 260 /* Fix for a nasty initialization problem the in SA11xx RTSR register. 261 * See also the comments in sa1100_rtc_interrupt(). 262 * 263 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an 264 * interrupt pending, even though interrupts were never enabled. 265 * In this case, this bit it must be reset before enabling 266 * interruptions to avoid a nonexistent interrupt to occur. 267 * 268 * In principle, the same problem would apply to bit 0, although it has 269 * never been observed to happen. 270 * 271 * This issue is addressed both here and in sa1100_rtc_interrupt(). 272 * If the issue is not addressed here, in the times when the processor 273 * wakes up with the bit set there will be one spurious interrupt. 274 * 275 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the 276 * safe side, once the condition that lead to this strange 277 * initialization is unknown and could in principle happen during 278 * normal processing. 279 * 280 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to 281 * the corresponding bits in RTSR. */ 282 RTSR = RTSR_AL | RTSR_HZ; 283 284 return 0; 285 } 286 EXPORT_SYMBOL_GPL(sa1100_rtc_init); 287 288 static int sa1100_rtc_probe(struct platform_device *pdev) 289 { 290 struct sa1100_rtc *info; 291 int irq_1hz, irq_alarm; 292 293 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz"); 294 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm"); 295 if (irq_1hz < 0 || irq_alarm < 0) 296 return -ENODEV; 297 298 info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL); 299 if (!info) 300 return -ENOMEM; 301 info->irq_1hz = irq_1hz; 302 info->irq_alarm = irq_alarm; 303 304 platform_set_drvdata(pdev, info); 305 device_init_wakeup(&pdev->dev, 1); 306 307 return sa1100_rtc_init(pdev, info); 308 } 309 310 static int sa1100_rtc_remove(struct platform_device *pdev) 311 { 312 struct sa1100_rtc *info = platform_get_drvdata(pdev); 313 314 if (info) 315 clk_disable_unprepare(info->clk); 316 317 return 0; 318 } 319 320 #ifdef CONFIG_PM_SLEEP 321 static int sa1100_rtc_suspend(struct device *dev) 322 { 323 struct sa1100_rtc *info = dev_get_drvdata(dev); 324 if (device_may_wakeup(dev)) 325 enable_irq_wake(info->irq_alarm); 326 return 0; 327 } 328 329 static int sa1100_rtc_resume(struct device *dev) 330 { 331 struct sa1100_rtc *info = dev_get_drvdata(dev); 332 if (device_may_wakeup(dev)) 333 disable_irq_wake(info->irq_alarm); 334 return 0; 335 } 336 #endif 337 338 static SIMPLE_DEV_PM_OPS(sa1100_rtc_pm_ops, sa1100_rtc_suspend, 339 sa1100_rtc_resume); 340 341 #ifdef CONFIG_OF 342 static const struct of_device_id sa1100_rtc_dt_ids[] = { 343 { .compatible = "mrvl,sa1100-rtc", }, 344 { .compatible = "mrvl,mmp-rtc", }, 345 {} 346 }; 347 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids); 348 #endif 349 350 static struct platform_driver sa1100_rtc_driver = { 351 .probe = sa1100_rtc_probe, 352 .remove = sa1100_rtc_remove, 353 .driver = { 354 .name = "sa1100-rtc", 355 .pm = &sa1100_rtc_pm_ops, 356 .of_match_table = of_match_ptr(sa1100_rtc_dt_ids), 357 }, 358 }; 359 360 module_platform_driver(sa1100_rtc_driver); 361 362 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); 363 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)"); 364 MODULE_LICENSE("GPL"); 365 MODULE_ALIAS("platform:sa1100-rtc"); 366