1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2f803f0d0SThierry Reding /*
3f803f0d0SThierry Reding * Copyright (C) 2012 Avionic Design GmbH
4f803f0d0SThierry Reding */
5f803f0d0SThierry Reding
6f803f0d0SThierry Reding #include <linux/bcd.h>
7f8d4e4faSAlexandre Belloni #include <linux/bitfield.h>
8f803f0d0SThierry Reding #include <linux/i2c.h>
9f803f0d0SThierry Reding #include <linux/module.h>
1091f3849dSAlexandre Belloni #include <linux/regmap.h>
11f803f0d0SThierry Reding #include <linux/rtc.h>
12f803f0d0SThierry Reding #include <linux/of.h>
1313e37b7fSAlexandre Belloni #include <linux/pm_wakeirq.h>
14f803f0d0SThierry Reding
154aa90c03SAlexandre Belloni #define PCF8523_REG_CONTROL1 0x00
164aa90c03SAlexandre Belloni #define PCF8523_CONTROL1_CAP_SEL BIT(7)
174aa90c03SAlexandre Belloni #define PCF8523_CONTROL1_STOP BIT(5)
184aa90c03SAlexandre Belloni #define PCF8523_CONTROL1_AIE BIT(1)
1913e37b7fSAlexandre Belloni
204aa90c03SAlexandre Belloni #define PCF8523_REG_CONTROL2 0x01
214aa90c03SAlexandre Belloni #define PCF8523_CONTROL2_AF BIT(3)
22f803f0d0SThierry Reding
234aa90c03SAlexandre Belloni #define PCF8523_REG_CONTROL3 0x02
24f8d4e4faSAlexandre Belloni #define PCF8523_CONTROL3_PM GENMASK(7, 5)
25f8d4e4faSAlexandre Belloni #define PCF8523_PM_STANDBY 0x7
264aa90c03SAlexandre Belloni #define PCF8523_CONTROL3_BLF BIT(2) /* battery low bit, read-only */
277d7234a4SAlexandre Belloni #define PCF8523_CONTROL3_BSF BIT(3)
28f803f0d0SThierry Reding
294aa90c03SAlexandre Belloni #define PCF8523_REG_SECONDS 0x03
304aa90c03SAlexandre Belloni #define PCF8523_SECONDS_OS BIT(7)
31f803f0d0SThierry Reding
324aa90c03SAlexandre Belloni #define PCF8523_REG_MINUTES 0x04
334aa90c03SAlexandre Belloni #define PCF8523_REG_HOURS 0x05
344aa90c03SAlexandre Belloni #define PCF8523_REG_DAYS 0x06
354aa90c03SAlexandre Belloni #define PCF8523_REG_WEEKDAYS 0x07
364aa90c03SAlexandre Belloni #define PCF8523_REG_MONTHS 0x08
374aa90c03SAlexandre Belloni #define PCF8523_REG_YEARS 0x09
38f803f0d0SThierry Reding
394aa90c03SAlexandre Belloni #define PCF8523_REG_MINUTE_ALARM 0x0a
404aa90c03SAlexandre Belloni #define PCF8523_REG_HOUR_ALARM 0x0b
414aa90c03SAlexandre Belloni #define PCF8523_REG_DAY_ALARM 0x0c
424aa90c03SAlexandre Belloni #define PCF8523_REG_WEEKDAY_ALARM 0x0d
4313e37b7fSAlexandre Belloni #define ALARM_DIS BIT(7)
4413e37b7fSAlexandre Belloni
454aa90c03SAlexandre Belloni #define PCF8523_REG_OFFSET 0x0e
464aa90c03SAlexandre Belloni #define PCF8523_OFFSET_MODE BIT(7)
47bc3bee02SRussell King
484aa90c03SAlexandre Belloni #define PCF8523_TMR_CLKOUT_CTRL 0x0f
4913e37b7fSAlexandre Belloni
5013e37b7fSAlexandre Belloni struct pcf8523 {
5113e37b7fSAlexandre Belloni struct rtc_device *rtc;
5291f3849dSAlexandre Belloni struct regmap *regmap;
5313e37b7fSAlexandre Belloni };
5413e37b7fSAlexandre Belloni
pcf8523_load_capacitance(struct pcf8523 * pcf8523,struct device_node * node)5591f3849dSAlexandre Belloni static int pcf8523_load_capacitance(struct pcf8523 *pcf8523, struct device_node *node)
56f803f0d0SThierry Reding {
5791f3849dSAlexandre Belloni u32 load, value = 0;
58f803f0d0SThierry Reding
59189927e7SSam Ravnborg load = 12500;
6091f3849dSAlexandre Belloni of_property_read_u32(node, "quartz-load-femtofarads", &load);
61189927e7SSam Ravnborg
62189927e7SSam Ravnborg switch (load) {
63189927e7SSam Ravnborg default:
6491f3849dSAlexandre Belloni dev_warn(&pcf8523->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
65189927e7SSam Ravnborg load);
66df561f66SGustavo A. R. Silva fallthrough;
67189927e7SSam Ravnborg case 12500:
68*dc87fad6SJavier Carrasco value = PCF8523_CONTROL1_CAP_SEL;
69189927e7SSam Ravnborg break;
70189927e7SSam Ravnborg case 7000:
71189927e7SSam Ravnborg break;
72189927e7SSam Ravnborg }
73f803f0d0SThierry Reding
7491f3849dSAlexandre Belloni return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
7591f3849dSAlexandre Belloni PCF8523_CONTROL1_CAP_SEL, value);
76f803f0d0SThierry Reding }
77f803f0d0SThierry Reding
pcf8523_irq(int irq,void * dev_id)7813e37b7fSAlexandre Belloni static irqreturn_t pcf8523_irq(int irq, void *dev_id)
7913e37b7fSAlexandre Belloni {
8091f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_id;
8191f3849dSAlexandre Belloni u32 value;
8213e37b7fSAlexandre Belloni int err;
8313e37b7fSAlexandre Belloni
8491f3849dSAlexandre Belloni err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
8513e37b7fSAlexandre Belloni if (err < 0)
8613e37b7fSAlexandre Belloni return IRQ_HANDLED;
8713e37b7fSAlexandre Belloni
884aa90c03SAlexandre Belloni if (value & PCF8523_CONTROL2_AF) {
894aa90c03SAlexandre Belloni value &= ~PCF8523_CONTROL2_AF;
9091f3849dSAlexandre Belloni regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, value);
9113e37b7fSAlexandre Belloni rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF);
9213e37b7fSAlexandre Belloni
9313e37b7fSAlexandre Belloni return IRQ_HANDLED;
9413e37b7fSAlexandre Belloni }
9513e37b7fSAlexandre Belloni
9613e37b7fSAlexandre Belloni return IRQ_NONE;
9713e37b7fSAlexandre Belloni }
9813e37b7fSAlexandre Belloni
pcf8523_rtc_read_time(struct device * dev,struct rtc_time * tm)99f803f0d0SThierry Reding static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
100f803f0d0SThierry Reding {
10191f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
102fe0157baSpaulmn u8 regs[10];
103f803f0d0SThierry Reding int err;
104f803f0d0SThierry Reding
105fe0157baSpaulmn err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_CONTROL1, regs,
10691f3849dSAlexandre Belloni sizeof(regs));
107f803f0d0SThierry Reding if (err < 0)
108f803f0d0SThierry Reding return err;
109f803f0d0SThierry Reding
110fe0157baSpaulmn if ((regs[0] & PCF8523_CONTROL1_STOP) || (regs[3] & PCF8523_SECONDS_OS))
111ede44c90SAlexandre Belloni return -EINVAL;
112f803f0d0SThierry Reding
113fe0157baSpaulmn tm->tm_sec = bcd2bin(regs[3] & 0x7f);
114fe0157baSpaulmn tm->tm_min = bcd2bin(regs[4] & 0x7f);
115fe0157baSpaulmn tm->tm_hour = bcd2bin(regs[5] & 0x3f);
116fe0157baSpaulmn tm->tm_mday = bcd2bin(regs[6] & 0x3f);
117fe0157baSpaulmn tm->tm_wday = regs[7] & 0x7;
118fe0157baSpaulmn tm->tm_mon = bcd2bin(regs[8] & 0x1f) - 1;
119fe0157baSpaulmn tm->tm_year = bcd2bin(regs[9]) + 100;
120f803f0d0SThierry Reding
12122652ba7SAlexandre Belloni return 0;
122f803f0d0SThierry Reding }
123f803f0d0SThierry Reding
pcf8523_rtc_set_time(struct device * dev,struct rtc_time * tm)124f803f0d0SThierry Reding static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
125f803f0d0SThierry Reding {
12691f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
12791f3849dSAlexandre Belloni u8 regs[7];
128f803f0d0SThierry Reding int err;
129f803f0d0SThierry Reding
13091f3849dSAlexandre Belloni err = regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
13191f3849dSAlexandre Belloni PCF8523_CONTROL1_STOP, PCF8523_CONTROL1_STOP);
132f803f0d0SThierry Reding if (err < 0)
133f803f0d0SThierry Reding return err;
134f803f0d0SThierry Reding
1354aa90c03SAlexandre Belloni /* This will purposely overwrite PCF8523_SECONDS_OS */
13691f3849dSAlexandre Belloni regs[0] = bin2bcd(tm->tm_sec);
13791f3849dSAlexandre Belloni regs[1] = bin2bcd(tm->tm_min);
13891f3849dSAlexandre Belloni regs[2] = bin2bcd(tm->tm_hour);
13991f3849dSAlexandre Belloni regs[3] = bin2bcd(tm->tm_mday);
14091f3849dSAlexandre Belloni regs[4] = tm->tm_wday;
14191f3849dSAlexandre Belloni regs[5] = bin2bcd(tm->tm_mon + 1);
14291f3849dSAlexandre Belloni regs[6] = bin2bcd(tm->tm_year - 100);
143f803f0d0SThierry Reding
14491f3849dSAlexandre Belloni err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
14591f3849dSAlexandre Belloni sizeof(regs));
146f803f0d0SThierry Reding if (err < 0) {
147f803f0d0SThierry Reding /*
148f803f0d0SThierry Reding * If the time cannot be set, restart the RTC anyway. Note
149f803f0d0SThierry Reding * that errors are ignored if the RTC cannot be started so
150f803f0d0SThierry Reding * that we have a chance to propagate the original error.
151f803f0d0SThierry Reding */
15291f3849dSAlexandre Belloni regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
15391f3849dSAlexandre Belloni PCF8523_CONTROL1_STOP, 0);
154f803f0d0SThierry Reding return err;
155f803f0d0SThierry Reding }
156f803f0d0SThierry Reding
15791f3849dSAlexandre Belloni return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
15891f3849dSAlexandre Belloni PCF8523_CONTROL1_STOP, 0);
159f803f0d0SThierry Reding }
160f803f0d0SThierry Reding
pcf8523_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * tm)16113e37b7fSAlexandre Belloni static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
16213e37b7fSAlexandre Belloni {
16391f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
16491f3849dSAlexandre Belloni u8 regs[4];
16591f3849dSAlexandre Belloni u32 value;
16613e37b7fSAlexandre Belloni int err;
16713e37b7fSAlexandre Belloni
16891f3849dSAlexandre Belloni err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
16991f3849dSAlexandre Belloni sizeof(regs));
17013e37b7fSAlexandre Belloni if (err < 0)
17113e37b7fSAlexandre Belloni return err;
17213e37b7fSAlexandre Belloni
17313e37b7fSAlexandre Belloni tm->time.tm_sec = 0;
17413e37b7fSAlexandre Belloni tm->time.tm_min = bcd2bin(regs[0] & 0x7F);
17513e37b7fSAlexandre Belloni tm->time.tm_hour = bcd2bin(regs[1] & 0x3F);
17613e37b7fSAlexandre Belloni tm->time.tm_mday = bcd2bin(regs[2] & 0x3F);
17713e37b7fSAlexandre Belloni tm->time.tm_wday = bcd2bin(regs[3] & 0x7);
17813e37b7fSAlexandre Belloni
17991f3849dSAlexandre Belloni err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL1, &value);
18013e37b7fSAlexandre Belloni if (err < 0)
18113e37b7fSAlexandre Belloni return err;
1824aa90c03SAlexandre Belloni tm->enabled = !!(value & PCF8523_CONTROL1_AIE);
18313e37b7fSAlexandre Belloni
18491f3849dSAlexandre Belloni err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
18513e37b7fSAlexandre Belloni if (err < 0)
18613e37b7fSAlexandre Belloni return err;
1874aa90c03SAlexandre Belloni tm->pending = !!(value & PCF8523_CONTROL2_AF);
18813e37b7fSAlexandre Belloni
18913e37b7fSAlexandre Belloni return 0;
19013e37b7fSAlexandre Belloni }
19113e37b7fSAlexandre Belloni
pcf8523_irq_enable(struct device * dev,unsigned int enabled)19213e37b7fSAlexandre Belloni static int pcf8523_irq_enable(struct device *dev, unsigned int enabled)
19313e37b7fSAlexandre Belloni {
19491f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
19513e37b7fSAlexandre Belloni
19691f3849dSAlexandre Belloni return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
19791f3849dSAlexandre Belloni PCF8523_CONTROL1_AIE, enabled ?
19891f3849dSAlexandre Belloni PCF8523_CONTROL1_AIE : 0);
19913e37b7fSAlexandre Belloni }
20013e37b7fSAlexandre Belloni
pcf8523_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * tm)20113e37b7fSAlexandre Belloni static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
20213e37b7fSAlexandre Belloni {
20391f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
20413e37b7fSAlexandre Belloni u8 regs[5];
20513e37b7fSAlexandre Belloni int err;
20613e37b7fSAlexandre Belloni
20713e37b7fSAlexandre Belloni err = pcf8523_irq_enable(dev, 0);
20813e37b7fSAlexandre Belloni if (err)
20913e37b7fSAlexandre Belloni return err;
21013e37b7fSAlexandre Belloni
21191f3849dSAlexandre Belloni err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, 0);
21213e37b7fSAlexandre Belloni if (err < 0)
21313e37b7fSAlexandre Belloni return err;
21413e37b7fSAlexandre Belloni
21591f3849dSAlexandre Belloni regs[0] = bin2bcd(tm->time.tm_min);
21691f3849dSAlexandre Belloni regs[1] = bin2bcd(tm->time.tm_hour);
21791f3849dSAlexandre Belloni regs[2] = bin2bcd(tm->time.tm_mday);
21891f3849dSAlexandre Belloni regs[3] = ALARM_DIS;
21991f3849dSAlexandre Belloni
22091f3849dSAlexandre Belloni err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
22191f3849dSAlexandre Belloni sizeof(regs));
22213e37b7fSAlexandre Belloni if (err < 0)
22313e37b7fSAlexandre Belloni return err;
22413e37b7fSAlexandre Belloni
22513e37b7fSAlexandre Belloni if (tm->enabled)
22613e37b7fSAlexandre Belloni return pcf8523_irq_enable(dev, tm->enabled);
22713e37b7fSAlexandre Belloni
22813e37b7fSAlexandre Belloni return 0;
22913e37b7fSAlexandre Belloni }
23013e37b7fSAlexandre Belloni
pcf8523_param_get(struct device * dev,struct rtc_param * param)231f8d4e4faSAlexandre Belloni static int pcf8523_param_get(struct device *dev, struct rtc_param *param)
232f8d4e4faSAlexandre Belloni {
233f8d4e4faSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
234f8d4e4faSAlexandre Belloni int ret;
23585bcb01fSVictor Erminpour u32 value;
236f8d4e4faSAlexandre Belloni
237f8d4e4faSAlexandre Belloni switch (param->param) {
238f8d4e4faSAlexandre Belloni case RTC_PARAM_BACKUP_SWITCH_MODE:
239f8d4e4faSAlexandre Belloni ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
240f8d4e4faSAlexandre Belloni if (ret < 0)
241f8d4e4faSAlexandre Belloni return ret;
242f8d4e4faSAlexandre Belloni
243f8d4e4faSAlexandre Belloni value = FIELD_GET(PCF8523_CONTROL3_PM, value);
244f8d4e4faSAlexandre Belloni
245f8d4e4faSAlexandre Belloni switch (value) {
246f8d4e4faSAlexandre Belloni case 0x0:
247f8d4e4faSAlexandre Belloni case 0x4:
248f8d4e4faSAlexandre Belloni param->uvalue = RTC_BSM_LEVEL;
249f8d4e4faSAlexandre Belloni break;
250f8d4e4faSAlexandre Belloni case 0x1:
251f8d4e4faSAlexandre Belloni case 0x5:
252f8d4e4faSAlexandre Belloni param->uvalue = RTC_BSM_DIRECT;
253f8d4e4faSAlexandre Belloni break;
254f8d4e4faSAlexandre Belloni case PCF8523_PM_STANDBY:
255f8d4e4faSAlexandre Belloni param->uvalue = RTC_BSM_STANDBY;
256f8d4e4faSAlexandre Belloni break;
257f8d4e4faSAlexandre Belloni default:
258f8d4e4faSAlexandre Belloni param->uvalue = RTC_BSM_DISABLED;
259f8d4e4faSAlexandre Belloni }
260f8d4e4faSAlexandre Belloni
261f8d4e4faSAlexandre Belloni break;
262f8d4e4faSAlexandre Belloni
263f8d4e4faSAlexandre Belloni default:
264f8d4e4faSAlexandre Belloni return -EINVAL;
265f8d4e4faSAlexandre Belloni }
266f8d4e4faSAlexandre Belloni
267f8d4e4faSAlexandre Belloni return 0;
268f8d4e4faSAlexandre Belloni }
269f8d4e4faSAlexandre Belloni
pcf8523_param_set(struct device * dev,struct rtc_param * param)270f8d4e4faSAlexandre Belloni static int pcf8523_param_set(struct device *dev, struct rtc_param *param)
271f8d4e4faSAlexandre Belloni {
272f8d4e4faSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
27385bcb01fSVictor Erminpour u8 mode;
274f8d4e4faSAlexandre Belloni
275f8d4e4faSAlexandre Belloni switch (param->param) {
276f8d4e4faSAlexandre Belloni case RTC_PARAM_BACKUP_SWITCH_MODE:
277f8d4e4faSAlexandre Belloni switch (param->uvalue) {
278f8d4e4faSAlexandre Belloni case RTC_BSM_DISABLED:
279f8d4e4faSAlexandre Belloni mode = 0x2;
280f8d4e4faSAlexandre Belloni break;
281f8d4e4faSAlexandre Belloni case RTC_BSM_DIRECT:
282f8d4e4faSAlexandre Belloni mode = 0x1;
283f8d4e4faSAlexandre Belloni break;
284f8d4e4faSAlexandre Belloni case RTC_BSM_LEVEL:
285f8d4e4faSAlexandre Belloni mode = 0x0;
286f8d4e4faSAlexandre Belloni break;
287f8d4e4faSAlexandre Belloni case RTC_BSM_STANDBY:
288f8d4e4faSAlexandre Belloni mode = PCF8523_PM_STANDBY;
289f8d4e4faSAlexandre Belloni break;
290f8d4e4faSAlexandre Belloni default:
291f8d4e4faSAlexandre Belloni return -EINVAL;
292f8d4e4faSAlexandre Belloni }
293f8d4e4faSAlexandre Belloni
294f8d4e4faSAlexandre Belloni return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL3,
295f8d4e4faSAlexandre Belloni PCF8523_CONTROL3_PM,
296f8d4e4faSAlexandre Belloni FIELD_PREP(PCF8523_CONTROL3_PM, mode));
297f8d4e4faSAlexandre Belloni
298f8d4e4faSAlexandre Belloni break;
299f8d4e4faSAlexandre Belloni
300f8d4e4faSAlexandre Belloni default:
301f8d4e4faSAlexandre Belloni return -EINVAL;
302f8d4e4faSAlexandre Belloni }
303f8d4e4faSAlexandre Belloni
304f8d4e4faSAlexandre Belloni return 0;
305f8d4e4faSAlexandre Belloni }
306f8d4e4faSAlexandre Belloni
pcf8523_rtc_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)307f32bc70dSJesper Nilsson static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd,
308f32bc70dSJesper Nilsson unsigned long arg)
309f32bc70dSJesper Nilsson {
31091f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
311a1cfe7ccSAlexandre Belloni unsigned int flags = 0;
31291f3849dSAlexandre Belloni u32 value;
313ecb4a353SBaruch Siach int ret;
314f32bc70dSJesper Nilsson
315f32bc70dSJesper Nilsson switch (cmd) {
316f32bc70dSJesper Nilsson case RTC_VL_READ:
31791f3849dSAlexandre Belloni ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
318ecb4a353SBaruch Siach if (ret < 0)
319ecb4a353SBaruch Siach return ret;
3207d7234a4SAlexandre Belloni
3217d7234a4SAlexandre Belloni if (value & PCF8523_CONTROL3_BLF)
322a1cfe7ccSAlexandre Belloni flags |= RTC_VL_BACKUP_LOW;
323f32bc70dSJesper Nilsson
32491f3849dSAlexandre Belloni ret = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
325a1cfe7ccSAlexandre Belloni if (ret < 0)
326a1cfe7ccSAlexandre Belloni return ret;
327a1cfe7ccSAlexandre Belloni
3284aa90c03SAlexandre Belloni if (value & PCF8523_SECONDS_OS)
329a1cfe7ccSAlexandre Belloni flags |= RTC_VL_DATA_INVALID;
330a1cfe7ccSAlexandre Belloni
331a1cfe7ccSAlexandre Belloni return put_user(flags, (unsigned int __user *)arg);
332f32bc70dSJesper Nilsson
333f32bc70dSJesper Nilsson default:
334f32bc70dSJesper Nilsson return -ENOIOCTLCMD;
335f32bc70dSJesper Nilsson }
336f32bc70dSJesper Nilsson }
337f32bc70dSJesper Nilsson
pcf8523_rtc_read_offset(struct device * dev,long * offset)338bc3bee02SRussell King static int pcf8523_rtc_read_offset(struct device *dev, long *offset)
339bc3bee02SRussell King {
34091f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
341bc3bee02SRussell King int err;
34291f3849dSAlexandre Belloni u32 value;
343bc3bee02SRussell King s8 val;
344bc3bee02SRussell King
34591f3849dSAlexandre Belloni err = regmap_read(pcf8523->regmap, PCF8523_REG_OFFSET, &value);
346bc3bee02SRussell King if (err < 0)
347bc3bee02SRussell King return err;
348bc3bee02SRussell King
349bc3bee02SRussell King /* sign extend the 7-bit offset value */
350bc3bee02SRussell King val = value << 1;
3514aa90c03SAlexandre Belloni *offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1);
352bc3bee02SRussell King
353bc3bee02SRussell King return 0;
354bc3bee02SRussell King }
355bc3bee02SRussell King
pcf8523_rtc_set_offset(struct device * dev,long offset)356bc3bee02SRussell King static int pcf8523_rtc_set_offset(struct device *dev, long offset)
357bc3bee02SRussell King {
35891f3849dSAlexandre Belloni struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
359bc3bee02SRussell King long reg_m0, reg_m1;
36091f3849dSAlexandre Belloni u32 value;
361bc3bee02SRussell King
362bc3bee02SRussell King reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L);
363bc3bee02SRussell King reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L);
364bc3bee02SRussell King
365bc3bee02SRussell King if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset))
366bc3bee02SRussell King value = reg_m0 & 0x7f;
367bc3bee02SRussell King else
3684aa90c03SAlexandre Belloni value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE;
369bc3bee02SRussell King
37091f3849dSAlexandre Belloni return regmap_write(pcf8523->regmap, PCF8523_REG_OFFSET, value);
371bc3bee02SRussell King }
372bc3bee02SRussell King
373f803f0d0SThierry Reding static const struct rtc_class_ops pcf8523_rtc_ops = {
374f803f0d0SThierry Reding .read_time = pcf8523_rtc_read_time,
375f803f0d0SThierry Reding .set_time = pcf8523_rtc_set_time,
37613e37b7fSAlexandre Belloni .read_alarm = pcf8523_rtc_read_alarm,
37713e37b7fSAlexandre Belloni .set_alarm = pcf8523_rtc_set_alarm,
37813e37b7fSAlexandre Belloni .alarm_irq_enable = pcf8523_irq_enable,
379f32bc70dSJesper Nilsson .ioctl = pcf8523_rtc_ioctl,
380bc3bee02SRussell King .read_offset = pcf8523_rtc_read_offset,
381bc3bee02SRussell King .set_offset = pcf8523_rtc_set_offset,
382f8d4e4faSAlexandre Belloni .param_get = pcf8523_param_get,
383f8d4e4faSAlexandre Belloni .param_set = pcf8523_param_set,
384f803f0d0SThierry Reding };
385f803f0d0SThierry Reding
38691f3849dSAlexandre Belloni static const struct regmap_config regmap_config = {
38791f3849dSAlexandre Belloni .reg_bits = 8,
38891f3849dSAlexandre Belloni .val_bits = 8,
38991f3849dSAlexandre Belloni .max_register = 0x13,
39091f3849dSAlexandre Belloni };
39191f3849dSAlexandre Belloni
pcf8523_probe(struct i2c_client * client)3923f4a3322SStephen Kitt static int pcf8523_probe(struct i2c_client *client)
393f803f0d0SThierry Reding {
39413e37b7fSAlexandre Belloni struct pcf8523 *pcf8523;
39593966243SNobuhiro Iwamatsu struct rtc_device *rtc;
39613e37b7fSAlexandre Belloni bool wakeup_source = false;
397f8d4e4faSAlexandre Belloni u32 value;
398f803f0d0SThierry Reding int err;
399f803f0d0SThierry Reding
400f803f0d0SThierry Reding if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
401f803f0d0SThierry Reding return -ENODEV;
402f803f0d0SThierry Reding
40313e37b7fSAlexandre Belloni pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), GFP_KERNEL);
40413e37b7fSAlexandre Belloni if (!pcf8523)
40513e37b7fSAlexandre Belloni return -ENOMEM;
40613e37b7fSAlexandre Belloni
40791f3849dSAlexandre Belloni pcf8523->regmap = devm_regmap_init_i2c(client, ®map_config);
40891f3849dSAlexandre Belloni if (IS_ERR(pcf8523->regmap))
40991f3849dSAlexandre Belloni return PTR_ERR(pcf8523->regmap);
41091f3849dSAlexandre Belloni
41113e37b7fSAlexandre Belloni i2c_set_clientdata(client, pcf8523);
412f803f0d0SThierry Reding
41388614405SAlexandre Belloni rtc = devm_rtc_allocate_device(&client->dev);
41493966243SNobuhiro Iwamatsu if (IS_ERR(rtc))
41593966243SNobuhiro Iwamatsu return PTR_ERR(rtc);
41613e37b7fSAlexandre Belloni pcf8523->rtc = rtc;
41791f3849dSAlexandre Belloni
41891f3849dSAlexandre Belloni err = pcf8523_load_capacitance(pcf8523, client->dev.of_node);
41991f3849dSAlexandre Belloni if (err < 0)
42091f3849dSAlexandre Belloni dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
42191f3849dSAlexandre Belloni err);
42291f3849dSAlexandre Belloni
423f8d4e4faSAlexandre Belloni err = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
42491f3849dSAlexandre Belloni if (err < 0)
42591f3849dSAlexandre Belloni return err;
42691f3849dSAlexandre Belloni
427f8d4e4faSAlexandre Belloni if (value & PCF8523_SECONDS_OS) {
428f8d4e4faSAlexandre Belloni err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
429f8d4e4faSAlexandre Belloni if (err < 0)
430f8d4e4faSAlexandre Belloni return err;
431f8d4e4faSAlexandre Belloni
432f8d4e4faSAlexandre Belloni if (FIELD_GET(PCF8523_CONTROL3_PM, value) == PCF8523_PM_STANDBY) {
433f8d4e4faSAlexandre Belloni err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL3,
434f8d4e4faSAlexandre Belloni value & ~PCF8523_CONTROL3_PM);
435f8d4e4faSAlexandre Belloni if (err < 0)
436f8d4e4faSAlexandre Belloni return err;
437f8d4e4faSAlexandre Belloni }
438f8d4e4faSAlexandre Belloni }
439f8d4e4faSAlexandre Belloni
44088614405SAlexandre Belloni rtc->ops = &pcf8523_rtc_ops;
441219cc0f9SAlexandre Belloni rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
442219cc0f9SAlexandre Belloni rtc->range_max = RTC_TIMESTAMP_END_2099;
443e51cdef0SAlexandre Belloni set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->features);
444c1325e73SAlexandre Belloni clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->features);
44513e37b7fSAlexandre Belloni
44613e37b7fSAlexandre Belloni if (client->irq > 0) {
4473542db1dSAlexandre Belloni unsigned long irqflags = IRQF_TRIGGER_LOW;
4483542db1dSAlexandre Belloni
4493542db1dSAlexandre Belloni if (dev_fwnode(&client->dev))
4503542db1dSAlexandre Belloni irqflags = 0;
4513542db1dSAlexandre Belloni
45291f3849dSAlexandre Belloni err = regmap_write(pcf8523->regmap, PCF8523_TMR_CLKOUT_CTRL, 0x38);
45313e37b7fSAlexandre Belloni if (err < 0)
45413e37b7fSAlexandre Belloni return err;
45513e37b7fSAlexandre Belloni
45613e37b7fSAlexandre Belloni err = devm_request_threaded_irq(&client->dev, client->irq,
45713e37b7fSAlexandre Belloni NULL, pcf8523_irq,
4583542db1dSAlexandre Belloni IRQF_SHARED | IRQF_ONESHOT | irqflags,
45991f3849dSAlexandre Belloni dev_name(&rtc->dev), pcf8523);
46013e37b7fSAlexandre Belloni if (err)
46113e37b7fSAlexandre Belloni return err;
46213e37b7fSAlexandre Belloni
46313e37b7fSAlexandre Belloni dev_pm_set_wake_irq(&client->dev, client->irq);
46413e37b7fSAlexandre Belloni }
46513e37b7fSAlexandre Belloni
46613e37b7fSAlexandre Belloni wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source");
46713e37b7fSAlexandre Belloni if (client->irq > 0 || wakeup_source)
46813e37b7fSAlexandre Belloni device_init_wakeup(&client->dev, true);
46988614405SAlexandre Belloni
47088614405SAlexandre Belloni return devm_rtc_register_device(rtc);
471f803f0d0SThierry Reding }
472f803f0d0SThierry Reding
473f803f0d0SThierry Reding static const struct i2c_device_id pcf8523_id[] = {
474f803f0d0SThierry Reding { "pcf8523", 0 },
475f803f0d0SThierry Reding { }
476f803f0d0SThierry Reding };
477f803f0d0SThierry Reding MODULE_DEVICE_TABLE(i2c, pcf8523_id);
478f803f0d0SThierry Reding
479f803f0d0SThierry Reding static const struct of_device_id pcf8523_of_match[] = {
480f803f0d0SThierry Reding { .compatible = "nxp,pcf8523" },
4817c617e0cSAlexandre Belloni { .compatible = "microcrystal,rv8523" },
482f803f0d0SThierry Reding { }
483f803f0d0SThierry Reding };
484f803f0d0SThierry Reding MODULE_DEVICE_TABLE(of, pcf8523_of_match);
485f803f0d0SThierry Reding
486f803f0d0SThierry Reding static struct i2c_driver pcf8523_driver = {
487f803f0d0SThierry Reding .driver = {
48894959a3aSAlexandre Belloni .name = "rtc-pcf8523",
489ebf48cbeSAlexandre Belloni .of_match_table = pcf8523_of_match,
490f803f0d0SThierry Reding },
4913f4a3322SStephen Kitt .probe = pcf8523_probe,
492f803f0d0SThierry Reding .id_table = pcf8523_id,
493f803f0d0SThierry Reding };
494f803f0d0SThierry Reding module_i2c_driver(pcf8523_driver);
495f803f0d0SThierry Reding
496f803f0d0SThierry Reding MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
497f803f0d0SThierry Reding MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
498f803f0d0SThierry Reding MODULE_LICENSE("GPL v2");
499