xref: /openbmc/linux/drivers/rtc/rtc-pcf2127.c (revision 0e735eaae1650a2e26835cc776f496e06a87be9f)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
218cb6368SRenaud Cerrato /*
3cee2cc21SAkinobu Mita  * An I2C and SPI driver for the NXP PCF2127/29 RTC
418cb6368SRenaud Cerrato  * Copyright 2013 Til-Technologies
518cb6368SRenaud Cerrato  *
618cb6368SRenaud Cerrato  * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
718cb6368SRenaud Cerrato  *
8*0e735eaaSBruno Thomsen  * Watchdog and tamper functions
9*0e735eaaSBruno Thomsen  * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
10*0e735eaaSBruno Thomsen  *
1118cb6368SRenaud Cerrato  * based on the other drivers in this same directory.
1218cb6368SRenaud Cerrato  *
13cee2cc21SAkinobu Mita  * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
1418cb6368SRenaud Cerrato  */
1518cb6368SRenaud Cerrato 
1618cb6368SRenaud Cerrato #include <linux/i2c.h>
179408ec1aSAkinobu Mita #include <linux/spi/spi.h>
1818cb6368SRenaud Cerrato #include <linux/bcd.h>
1918cb6368SRenaud Cerrato #include <linux/rtc.h>
2018cb6368SRenaud Cerrato #include <linux/slab.h>
2118cb6368SRenaud Cerrato #include <linux/module.h>
2218cb6368SRenaud Cerrato #include <linux/of.h>
23907b3262SAkinobu Mita #include <linux/regmap.h>
24*0e735eaaSBruno Thomsen #include <linux/watchdog.h>
2518cb6368SRenaud Cerrato 
26bbfe3a7aSBruno Thomsen /* Control register 1 */
27bbfe3a7aSBruno Thomsen #define PCF2127_REG_CTRL1		0x00
28bbfe3a7aSBruno Thomsen /* Control register 2 */
29bbfe3a7aSBruno Thomsen #define PCF2127_REG_CTRL2		0x01
30bbfe3a7aSBruno Thomsen /* Control register 3 */
31bbfe3a7aSBruno Thomsen #define PCF2127_REG_CTRL3		0x02
32bbfe3a7aSBruno Thomsen #define PCF2127_BIT_CTRL3_BLF			BIT(2)
33bbfe3a7aSBruno Thomsen /* Time and date registers */
34bbfe3a7aSBruno Thomsen #define PCF2127_REG_SC			0x03
35bbfe3a7aSBruno Thomsen #define PCF2127_BIT_SC_OSF			BIT(7)
36bbfe3a7aSBruno Thomsen #define PCF2127_REG_MN			0x04
37bbfe3a7aSBruno Thomsen #define PCF2127_REG_HR			0x05
38bbfe3a7aSBruno Thomsen #define PCF2127_REG_DM			0x06
39bbfe3a7aSBruno Thomsen #define PCF2127_REG_DW			0x07
40bbfe3a7aSBruno Thomsen #define PCF2127_REG_MO			0x08
41bbfe3a7aSBruno Thomsen #define PCF2127_REG_YR			0x09
42*0e735eaaSBruno Thomsen /* Watchdog registers */
43*0e735eaaSBruno Thomsen #define PCF2127_REG_WD_CTL		0x10
44*0e735eaaSBruno Thomsen #define PCF2127_BIT_WD_CTL_TF0			BIT(0)
45*0e735eaaSBruno Thomsen #define PCF2127_BIT_WD_CTL_TF1			BIT(1)
46*0e735eaaSBruno Thomsen #define PCF2127_BIT_WD_CTL_CD0			BIT(6)
47*0e735eaaSBruno Thomsen #define PCF2127_BIT_WD_CTL_CD1			BIT(7)
48*0e735eaaSBruno Thomsen #define PCF2127_REG_WD_VAL		0x11
49bbfe3a7aSBruno Thomsen /*
50bbfe3a7aSBruno Thomsen  * RAM registers
51bbfe3a7aSBruno Thomsen  * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
52bbfe3a7aSBruno Thomsen  * battery backed and can survive a power outage.
53bbfe3a7aSBruno Thomsen  * PCF2129 doesn't have this feature.
54bbfe3a7aSBruno Thomsen  */
55bbfe3a7aSBruno Thomsen #define PCF2127_REG_RAM_ADDR_MSB	0x1A
56bbfe3a7aSBruno Thomsen #define PCF2127_REG_RAM_WRT_CMD		0x1C
57bbfe3a7aSBruno Thomsen #define PCF2127_REG_RAM_RD_CMD		0x1D
58f97cfddcSUwe Kleine-König 
59*0e735eaaSBruno Thomsen /* Watchdog timer value constants */
60*0e735eaaSBruno Thomsen #define PCF2127_WD_VAL_STOP		0
61*0e735eaaSBruno Thomsen #define PCF2127_WD_VAL_MIN		2
62*0e735eaaSBruno Thomsen #define PCF2127_WD_VAL_MAX		255
63*0e735eaaSBruno Thomsen #define PCF2127_WD_VAL_DEFAULT		60
64653ebd75SAndrea Scian 
6518cb6368SRenaud Cerrato struct pcf2127 {
6618cb6368SRenaud Cerrato 	struct rtc_device *rtc;
67*0e735eaaSBruno Thomsen 	struct watchdog_device wdd;
68907b3262SAkinobu Mita 	struct regmap *regmap;
6918cb6368SRenaud Cerrato };
7018cb6368SRenaud Cerrato 
7118cb6368SRenaud Cerrato /*
7218cb6368SRenaud Cerrato  * In the routines that deal directly with the pcf2127 hardware, we use
7318cb6368SRenaud Cerrato  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
7418cb6368SRenaud Cerrato  */
75907b3262SAkinobu Mita static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
7618cb6368SRenaud Cerrato {
77907b3262SAkinobu Mita 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
78907b3262SAkinobu Mita 	unsigned char buf[10];
79907b3262SAkinobu Mita 	int ret;
8018cb6368SRenaud Cerrato 
817f43020eSBruno Thomsen 	/*
827f43020eSBruno Thomsen 	 * Avoid reading CTRL2 register as it causes WD_VAL register
837f43020eSBruno Thomsen 	 * value to reset to 0 which means watchdog is stopped.
847f43020eSBruno Thomsen 	 */
857f43020eSBruno Thomsen 	ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
867f43020eSBruno Thomsen 			       (buf + PCF2127_REG_CTRL3),
877f43020eSBruno Thomsen 			       ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
88907b3262SAkinobu Mita 	if (ret) {
89907b3262SAkinobu Mita 		dev_err(dev, "%s: read error\n", __func__);
90907b3262SAkinobu Mita 		return ret;
9118cb6368SRenaud Cerrato 	}
9218cb6368SRenaud Cerrato 
93bbfe3a7aSBruno Thomsen 	if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
94907b3262SAkinobu Mita 		dev_info(dev,
95653ebd75SAndrea Scian 			"low voltage detected, check/replace RTC battery.\n");
96653ebd75SAndrea Scian 
97bbfe3a7aSBruno Thomsen 	/* Clock integrity is not guaranteed when OSF flag is set. */
98bbfe3a7aSBruno Thomsen 	if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
99653ebd75SAndrea Scian 		/*
100653ebd75SAndrea Scian 		 * no need clear the flag here,
101653ebd75SAndrea Scian 		 * it will be cleared once the new date is saved
102653ebd75SAndrea Scian 		 */
103907b3262SAkinobu Mita 		dev_warn(dev,
104653ebd75SAndrea Scian 			 "oscillator stop detected, date/time is not reliable\n");
105653ebd75SAndrea Scian 		return -EINVAL;
10618cb6368SRenaud Cerrato 	}
10718cb6368SRenaud Cerrato 
108907b3262SAkinobu Mita 	dev_dbg(dev,
1097f43020eSBruno Thomsen 		"%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
11018cb6368SRenaud Cerrato 		"mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
1117f43020eSBruno Thomsen 		__func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
1127f43020eSBruno Thomsen 		buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
1137f43020eSBruno Thomsen 		buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
1147f43020eSBruno Thomsen 		buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
11518cb6368SRenaud Cerrato 
11618cb6368SRenaud Cerrato 	tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
11718cb6368SRenaud Cerrato 	tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
11818cb6368SRenaud Cerrato 	tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
11918cb6368SRenaud Cerrato 	tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
12018cb6368SRenaud Cerrato 	tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
12118cb6368SRenaud Cerrato 	tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
12218cb6368SRenaud Cerrato 	tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
12318cb6368SRenaud Cerrato 	if (tm->tm_year < 70)
12418cb6368SRenaud Cerrato 		tm->tm_year += 100;	/* assume we are in 1970...2069 */
12518cb6368SRenaud Cerrato 
126907b3262SAkinobu Mita 	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
12718cb6368SRenaud Cerrato 		"mday=%d, mon=%d, year=%d, wday=%d\n",
12818cb6368SRenaud Cerrato 		__func__,
12918cb6368SRenaud Cerrato 		tm->tm_sec, tm->tm_min, tm->tm_hour,
13018cb6368SRenaud Cerrato 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
13118cb6368SRenaud Cerrato 
13222652ba7SAlexandre Belloni 	return 0;
13318cb6368SRenaud Cerrato }
13418cb6368SRenaud Cerrato 
135907b3262SAkinobu Mita static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
13618cb6368SRenaud Cerrato {
137907b3262SAkinobu Mita 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
138907b3262SAkinobu Mita 	unsigned char buf[7];
13918cb6368SRenaud Cerrato 	int i = 0, err;
14018cb6368SRenaud Cerrato 
141907b3262SAkinobu Mita 	dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
14218cb6368SRenaud Cerrato 		"mday=%d, mon=%d, year=%d, wday=%d\n",
14318cb6368SRenaud Cerrato 		__func__,
14418cb6368SRenaud Cerrato 		tm->tm_sec, tm->tm_min, tm->tm_hour,
14518cb6368SRenaud Cerrato 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
14618cb6368SRenaud Cerrato 
14718cb6368SRenaud Cerrato 	/* hours, minutes and seconds */
148653ebd75SAndrea Scian 	buf[i++] = bin2bcd(tm->tm_sec);	/* this will also clear OSF flag */
14918cb6368SRenaud Cerrato 	buf[i++] = bin2bcd(tm->tm_min);
15018cb6368SRenaud Cerrato 	buf[i++] = bin2bcd(tm->tm_hour);
15118cb6368SRenaud Cerrato 	buf[i++] = bin2bcd(tm->tm_mday);
15218cb6368SRenaud Cerrato 	buf[i++] = tm->tm_wday & 0x07;
15318cb6368SRenaud Cerrato 
15418cb6368SRenaud Cerrato 	/* month, 1 - 12 */
15518cb6368SRenaud Cerrato 	buf[i++] = bin2bcd(tm->tm_mon + 1);
15618cb6368SRenaud Cerrato 
15718cb6368SRenaud Cerrato 	/* year */
15818cb6368SRenaud Cerrato 	buf[i++] = bin2bcd(tm->tm_year % 100);
15918cb6368SRenaud Cerrato 
16018cb6368SRenaud Cerrato 	/* write register's data */
161907b3262SAkinobu Mita 	err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
162907b3262SAkinobu Mita 	if (err) {
163907b3262SAkinobu Mita 		dev_err(dev,
16418cb6368SRenaud Cerrato 			"%s: err=%d", __func__, err);
165907b3262SAkinobu Mita 		return err;
16618cb6368SRenaud Cerrato 	}
16718cb6368SRenaud Cerrato 
16818cb6368SRenaud Cerrato 	return 0;
16918cb6368SRenaud Cerrato }
17018cb6368SRenaud Cerrato 
17118cb6368SRenaud Cerrato #ifdef CONFIG_RTC_INTF_DEV
17218cb6368SRenaud Cerrato static int pcf2127_rtc_ioctl(struct device *dev,
17318cb6368SRenaud Cerrato 				unsigned int cmd, unsigned long arg)
17418cb6368SRenaud Cerrato {
175907b3262SAkinobu Mita 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
176f97cfddcSUwe Kleine-König 	int touser;
177f97cfddcSUwe Kleine-König 	int ret;
17818cb6368SRenaud Cerrato 
17918cb6368SRenaud Cerrato 	switch (cmd) {
18018cb6368SRenaud Cerrato 	case RTC_VL_READ:
181907b3262SAkinobu Mita 		ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &touser);
182907b3262SAkinobu Mita 		if (ret)
183f97cfddcSUwe Kleine-König 			return ret;
18418cb6368SRenaud Cerrato 
185bbfe3a7aSBruno Thomsen 		touser = touser & PCF2127_BIT_CTRL3_BLF ? 1 : 0;
186f97cfddcSUwe Kleine-König 
187f97cfddcSUwe Kleine-König 		if (copy_to_user((void __user *)arg, &touser, sizeof(int)))
18818cb6368SRenaud Cerrato 			return -EFAULT;
18918cb6368SRenaud Cerrato 		return 0;
19018cb6368SRenaud Cerrato 	default:
19118cb6368SRenaud Cerrato 		return -ENOIOCTLCMD;
19218cb6368SRenaud Cerrato 	}
19318cb6368SRenaud Cerrato }
19418cb6368SRenaud Cerrato #else
19518cb6368SRenaud Cerrato #define pcf2127_rtc_ioctl NULL
19618cb6368SRenaud Cerrato #endif
19718cb6368SRenaud Cerrato 
19818cb6368SRenaud Cerrato static const struct rtc_class_ops pcf2127_rtc_ops = {
19918cb6368SRenaud Cerrato 	.ioctl		= pcf2127_rtc_ioctl,
20018cb6368SRenaud Cerrato 	.read_time	= pcf2127_rtc_read_time,
20118cb6368SRenaud Cerrato 	.set_time	= pcf2127_rtc_set_time,
20218cb6368SRenaud Cerrato };
20318cb6368SRenaud Cerrato 
204d6c3029fSUwe Kleine-König static int pcf2127_nvmem_read(void *priv, unsigned int offset,
205d6c3029fSUwe Kleine-König 			      void *val, size_t bytes)
206d6c3029fSUwe Kleine-König {
207d6c3029fSUwe Kleine-König 	struct pcf2127 *pcf2127 = priv;
208d6c3029fSUwe Kleine-König 	int ret;
209d6c3029fSUwe Kleine-König 	unsigned char offsetbuf[] = { offset >> 8, offset };
210d6c3029fSUwe Kleine-König 
211bbfe3a7aSBruno Thomsen 	ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
212d6c3029fSUwe Kleine-König 				offsetbuf, 2);
213d6c3029fSUwe Kleine-König 	if (ret)
214d6c3029fSUwe Kleine-König 		return ret;
215d6c3029fSUwe Kleine-König 
216bbfe3a7aSBruno Thomsen 	ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
217d6c3029fSUwe Kleine-König 			       val, bytes);
218d6c3029fSUwe Kleine-König 
219d6c3029fSUwe Kleine-König 	return ret ?: bytes;
220d6c3029fSUwe Kleine-König }
221d6c3029fSUwe Kleine-König 
222d6c3029fSUwe Kleine-König static int pcf2127_nvmem_write(void *priv, unsigned int offset,
223d6c3029fSUwe Kleine-König 			       void *val, size_t bytes)
224d6c3029fSUwe Kleine-König {
225d6c3029fSUwe Kleine-König 	struct pcf2127 *pcf2127 = priv;
226d6c3029fSUwe Kleine-König 	int ret;
227d6c3029fSUwe Kleine-König 	unsigned char offsetbuf[] = { offset >> 8, offset };
228d6c3029fSUwe Kleine-König 
229bbfe3a7aSBruno Thomsen 	ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
230d6c3029fSUwe Kleine-König 				offsetbuf, 2);
231d6c3029fSUwe Kleine-König 	if (ret)
232d6c3029fSUwe Kleine-König 		return ret;
233d6c3029fSUwe Kleine-König 
234bbfe3a7aSBruno Thomsen 	ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
235d6c3029fSUwe Kleine-König 				val, bytes);
236d6c3029fSUwe Kleine-König 
237d6c3029fSUwe Kleine-König 	return ret ?: bytes;
238d6c3029fSUwe Kleine-König }
239d6c3029fSUwe Kleine-König 
240*0e735eaaSBruno Thomsen /* watchdog driver */
241*0e735eaaSBruno Thomsen 
242*0e735eaaSBruno Thomsen static int pcf2127_wdt_ping(struct watchdog_device *wdd)
243*0e735eaaSBruno Thomsen {
244*0e735eaaSBruno Thomsen 	struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
245*0e735eaaSBruno Thomsen 
246*0e735eaaSBruno Thomsen 	return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
247*0e735eaaSBruno Thomsen }
248*0e735eaaSBruno Thomsen 
249*0e735eaaSBruno Thomsen /*
250*0e735eaaSBruno Thomsen  * Restart watchdog timer if feature is active.
251*0e735eaaSBruno Thomsen  *
252*0e735eaaSBruno Thomsen  * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
253*0e735eaaSBruno Thomsen  * since register also contain control/status flags for other features.
254*0e735eaaSBruno Thomsen  * Always call this function after reading CTRL2 register.
255*0e735eaaSBruno Thomsen  */
256*0e735eaaSBruno Thomsen static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
257*0e735eaaSBruno Thomsen {
258*0e735eaaSBruno Thomsen 	int ret = 0;
259*0e735eaaSBruno Thomsen 
260*0e735eaaSBruno Thomsen 	if (watchdog_active(wdd)) {
261*0e735eaaSBruno Thomsen 		ret = pcf2127_wdt_ping(wdd);
262*0e735eaaSBruno Thomsen 		if (ret)
263*0e735eaaSBruno Thomsen 			dev_err(wdd->parent,
264*0e735eaaSBruno Thomsen 				"%s: watchdog restart failed, ret=%d\n",
265*0e735eaaSBruno Thomsen 				__func__, ret);
266*0e735eaaSBruno Thomsen 	}
267*0e735eaaSBruno Thomsen 
268*0e735eaaSBruno Thomsen 	return ret;
269*0e735eaaSBruno Thomsen }
270*0e735eaaSBruno Thomsen 
271*0e735eaaSBruno Thomsen static int pcf2127_wdt_start(struct watchdog_device *wdd)
272*0e735eaaSBruno Thomsen {
273*0e735eaaSBruno Thomsen 	return pcf2127_wdt_ping(wdd);
274*0e735eaaSBruno Thomsen }
275*0e735eaaSBruno Thomsen 
276*0e735eaaSBruno Thomsen static int pcf2127_wdt_stop(struct watchdog_device *wdd)
277*0e735eaaSBruno Thomsen {
278*0e735eaaSBruno Thomsen 	struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
279*0e735eaaSBruno Thomsen 
280*0e735eaaSBruno Thomsen 	return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
281*0e735eaaSBruno Thomsen 			    PCF2127_WD_VAL_STOP);
282*0e735eaaSBruno Thomsen }
283*0e735eaaSBruno Thomsen 
284*0e735eaaSBruno Thomsen static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
285*0e735eaaSBruno Thomsen 				   unsigned int new_timeout)
286*0e735eaaSBruno Thomsen {
287*0e735eaaSBruno Thomsen 	dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
288*0e735eaaSBruno Thomsen 		new_timeout, wdd->timeout);
289*0e735eaaSBruno Thomsen 
290*0e735eaaSBruno Thomsen 	wdd->timeout = new_timeout;
291*0e735eaaSBruno Thomsen 
292*0e735eaaSBruno Thomsen 	return pcf2127_wdt_active_ping(wdd);
293*0e735eaaSBruno Thomsen }
294*0e735eaaSBruno Thomsen 
295*0e735eaaSBruno Thomsen static const struct watchdog_info pcf2127_wdt_info = {
296*0e735eaaSBruno Thomsen 	.identity = "NXP PCF2127/PCF2129 Watchdog",
297*0e735eaaSBruno Thomsen 	.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
298*0e735eaaSBruno Thomsen };
299*0e735eaaSBruno Thomsen 
300*0e735eaaSBruno Thomsen static const struct watchdog_ops pcf2127_watchdog_ops = {
301*0e735eaaSBruno Thomsen 	.owner = THIS_MODULE,
302*0e735eaaSBruno Thomsen 	.start = pcf2127_wdt_start,
303*0e735eaaSBruno Thomsen 	.stop = pcf2127_wdt_stop,
304*0e735eaaSBruno Thomsen 	.ping = pcf2127_wdt_ping,
305*0e735eaaSBruno Thomsen 	.set_timeout = pcf2127_wdt_set_timeout,
306*0e735eaaSBruno Thomsen };
307*0e735eaaSBruno Thomsen 
308907b3262SAkinobu Mita static int pcf2127_probe(struct device *dev, struct regmap *regmap,
309d6c3029fSUwe Kleine-König 			const char *name, bool has_nvmem)
31018cb6368SRenaud Cerrato {
31118cb6368SRenaud Cerrato 	struct pcf2127 *pcf2127;
312d6c3029fSUwe Kleine-König 	int ret = 0;
31318cb6368SRenaud Cerrato 
314907b3262SAkinobu Mita 	dev_dbg(dev, "%s\n", __func__);
31518cb6368SRenaud Cerrato 
316907b3262SAkinobu Mita 	pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
31718cb6368SRenaud Cerrato 	if (!pcf2127)
31818cb6368SRenaud Cerrato 		return -ENOMEM;
31918cb6368SRenaud Cerrato 
320907b3262SAkinobu Mita 	pcf2127->regmap = regmap;
32118cb6368SRenaud Cerrato 
322907b3262SAkinobu Mita 	dev_set_drvdata(dev, pcf2127);
323907b3262SAkinobu Mita 
324e788771cSBruno Thomsen 	pcf2127->rtc = devm_rtc_allocate_device(dev);
325d6c3029fSUwe Kleine-König 	if (IS_ERR(pcf2127->rtc))
326d6c3029fSUwe Kleine-König 		return PTR_ERR(pcf2127->rtc);
32718cb6368SRenaud Cerrato 
328e788771cSBruno Thomsen 	pcf2127->rtc->ops = &pcf2127_rtc_ops;
329e788771cSBruno Thomsen 
330*0e735eaaSBruno Thomsen 	pcf2127->wdd.parent = dev;
331*0e735eaaSBruno Thomsen 	pcf2127->wdd.info = &pcf2127_wdt_info;
332*0e735eaaSBruno Thomsen 	pcf2127->wdd.ops = &pcf2127_watchdog_ops;
333*0e735eaaSBruno Thomsen 	pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
334*0e735eaaSBruno Thomsen 	pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
335*0e735eaaSBruno Thomsen 	pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
336*0e735eaaSBruno Thomsen 	pcf2127->wdd.min_hw_heartbeat_ms = 500;
337*0e735eaaSBruno Thomsen 
338*0e735eaaSBruno Thomsen 	watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
339*0e735eaaSBruno Thomsen 
340d6c3029fSUwe Kleine-König 	if (has_nvmem) {
341d6c3029fSUwe Kleine-König 		struct nvmem_config nvmem_cfg = {
342d6c3029fSUwe Kleine-König 			.priv = pcf2127,
343d6c3029fSUwe Kleine-König 			.reg_read = pcf2127_nvmem_read,
344d6c3029fSUwe Kleine-König 			.reg_write = pcf2127_nvmem_write,
345d6c3029fSUwe Kleine-König 			.size = 512,
346d6c3029fSUwe Kleine-König 		};
347d6c3029fSUwe Kleine-König 
348d6c3029fSUwe Kleine-König 		ret = rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
349d6c3029fSUwe Kleine-König 	}
350d6c3029fSUwe Kleine-König 
351*0e735eaaSBruno Thomsen 	/*
352*0e735eaaSBruno Thomsen 	 * Watchdog timer enabled and reset pin /RST activated when timed out.
353*0e735eaaSBruno Thomsen 	 * Select 1Hz clock source for watchdog timer.
354*0e735eaaSBruno Thomsen 	 * Timer is not started until WD_VAL is loaded with a valid value.
355*0e735eaaSBruno Thomsen 	 * Note: Countdown timer disabled and not available.
356*0e735eaaSBruno Thomsen 	 */
357*0e735eaaSBruno Thomsen 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
358*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_CD1 |
359*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_CD0 |
360*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_TF1 |
361*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_TF0,
362*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_CD1 |
363*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_CD0 |
364*0e735eaaSBruno Thomsen 				 PCF2127_BIT_WD_CTL_TF1);
365*0e735eaaSBruno Thomsen 	if (ret) {
366*0e735eaaSBruno Thomsen 		dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
367*0e735eaaSBruno Thomsen 		return ret;
368*0e735eaaSBruno Thomsen 	}
369*0e735eaaSBruno Thomsen 
370*0e735eaaSBruno Thomsen 	ret = devm_watchdog_register_device(dev, &pcf2127->wdd);
371*0e735eaaSBruno Thomsen 	if (ret)
372*0e735eaaSBruno Thomsen 		return ret;
373*0e735eaaSBruno Thomsen 
374e788771cSBruno Thomsen 	return rtc_register_device(pcf2127->rtc);
37518cb6368SRenaud Cerrato }
37618cb6368SRenaud Cerrato 
37718cb6368SRenaud Cerrato #ifdef CONFIG_OF
37818cb6368SRenaud Cerrato static const struct of_device_id pcf2127_of_match[] = {
37918cb6368SRenaud Cerrato 	{ .compatible = "nxp,pcf2127" },
380cee2cc21SAkinobu Mita 	{ .compatible = "nxp,pcf2129" },
38118cb6368SRenaud Cerrato 	{}
38218cb6368SRenaud Cerrato };
38318cb6368SRenaud Cerrato MODULE_DEVICE_TABLE(of, pcf2127_of_match);
38418cb6368SRenaud Cerrato #endif
38518cb6368SRenaud Cerrato 
3869408ec1aSAkinobu Mita #if IS_ENABLED(CONFIG_I2C)
3879408ec1aSAkinobu Mita 
388907b3262SAkinobu Mita static int pcf2127_i2c_write(void *context, const void *data, size_t count)
389907b3262SAkinobu Mita {
390907b3262SAkinobu Mita 	struct device *dev = context;
391907b3262SAkinobu Mita 	struct i2c_client *client = to_i2c_client(dev);
392907b3262SAkinobu Mita 	int ret;
393907b3262SAkinobu Mita 
394907b3262SAkinobu Mita 	ret = i2c_master_send(client, data, count);
395907b3262SAkinobu Mita 	if (ret != count)
396907b3262SAkinobu Mita 		return ret < 0 ? ret : -EIO;
397907b3262SAkinobu Mita 
398907b3262SAkinobu Mita 	return 0;
399907b3262SAkinobu Mita }
400907b3262SAkinobu Mita 
401907b3262SAkinobu Mita static int pcf2127_i2c_gather_write(void *context,
402907b3262SAkinobu Mita 				const void *reg, size_t reg_size,
403907b3262SAkinobu Mita 				const void *val, size_t val_size)
404907b3262SAkinobu Mita {
405907b3262SAkinobu Mita 	struct device *dev = context;
406907b3262SAkinobu Mita 	struct i2c_client *client = to_i2c_client(dev);
407907b3262SAkinobu Mita 	int ret;
408907b3262SAkinobu Mita 	void *buf;
409907b3262SAkinobu Mita 
410907b3262SAkinobu Mita 	if (WARN_ON(reg_size != 1))
411907b3262SAkinobu Mita 		return -EINVAL;
412907b3262SAkinobu Mita 
413907b3262SAkinobu Mita 	buf = kmalloc(val_size + 1, GFP_KERNEL);
414907b3262SAkinobu Mita 	if (!buf)
415907b3262SAkinobu Mita 		return -ENOMEM;
416907b3262SAkinobu Mita 
417907b3262SAkinobu Mita 	memcpy(buf, reg, 1);
418907b3262SAkinobu Mita 	memcpy(buf + 1, val, val_size);
419907b3262SAkinobu Mita 
420907b3262SAkinobu Mita 	ret = i2c_master_send(client, buf, val_size + 1);
4219bde0afbSXulin Sun 
4229bde0afbSXulin Sun 	kfree(buf);
4239bde0afbSXulin Sun 
424907b3262SAkinobu Mita 	if (ret != val_size + 1)
425907b3262SAkinobu Mita 		return ret < 0 ? ret : -EIO;
426907b3262SAkinobu Mita 
427907b3262SAkinobu Mita 	return 0;
428907b3262SAkinobu Mita }
429907b3262SAkinobu Mita 
430907b3262SAkinobu Mita static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
431907b3262SAkinobu Mita 				void *val, size_t val_size)
432907b3262SAkinobu Mita {
433907b3262SAkinobu Mita 	struct device *dev = context;
434907b3262SAkinobu Mita 	struct i2c_client *client = to_i2c_client(dev);
435907b3262SAkinobu Mita 	int ret;
436907b3262SAkinobu Mita 
437907b3262SAkinobu Mita 	if (WARN_ON(reg_size != 1))
438907b3262SAkinobu Mita 		return -EINVAL;
439907b3262SAkinobu Mita 
440907b3262SAkinobu Mita 	ret = i2c_master_send(client, reg, 1);
441907b3262SAkinobu Mita 	if (ret != 1)
442907b3262SAkinobu Mita 		return ret < 0 ? ret : -EIO;
443907b3262SAkinobu Mita 
444907b3262SAkinobu Mita 	ret = i2c_master_recv(client, val, val_size);
445907b3262SAkinobu Mita 	if (ret != val_size)
446907b3262SAkinobu Mita 		return ret < 0 ? ret : -EIO;
447907b3262SAkinobu Mita 
448907b3262SAkinobu Mita 	return 0;
449907b3262SAkinobu Mita }
450907b3262SAkinobu Mita 
451907b3262SAkinobu Mita /*
452907b3262SAkinobu Mita  * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
453907b3262SAkinobu Mita  * is that the STOP condition is required between set register address and
454907b3262SAkinobu Mita  * read register data when reading from registers.
455907b3262SAkinobu Mita  */
456907b3262SAkinobu Mita static const struct regmap_bus pcf2127_i2c_regmap = {
457907b3262SAkinobu Mita 	.write = pcf2127_i2c_write,
458907b3262SAkinobu Mita 	.gather_write = pcf2127_i2c_gather_write,
459907b3262SAkinobu Mita 	.read = pcf2127_i2c_read,
46018cb6368SRenaud Cerrato };
46118cb6368SRenaud Cerrato 
462907b3262SAkinobu Mita static struct i2c_driver pcf2127_i2c_driver;
463907b3262SAkinobu Mita 
464907b3262SAkinobu Mita static int pcf2127_i2c_probe(struct i2c_client *client,
465907b3262SAkinobu Mita 				const struct i2c_device_id *id)
466907b3262SAkinobu Mita {
467907b3262SAkinobu Mita 	struct regmap *regmap;
468907b3262SAkinobu Mita 	static const struct regmap_config config = {
469907b3262SAkinobu Mita 		.reg_bits = 8,
470907b3262SAkinobu Mita 		.val_bits = 8,
471907b3262SAkinobu Mita 	};
472907b3262SAkinobu Mita 
473907b3262SAkinobu Mita 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
474907b3262SAkinobu Mita 		return -ENODEV;
475907b3262SAkinobu Mita 
476907b3262SAkinobu Mita 	regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
477907b3262SAkinobu Mita 					&client->dev, &config);
478907b3262SAkinobu Mita 	if (IS_ERR(regmap)) {
479907b3262SAkinobu Mita 		dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
480907b3262SAkinobu Mita 			__func__, PTR_ERR(regmap));
481907b3262SAkinobu Mita 		return PTR_ERR(regmap);
482907b3262SAkinobu Mita 	}
483907b3262SAkinobu Mita 
484907b3262SAkinobu Mita 	return pcf2127_probe(&client->dev, regmap,
485d6c3029fSUwe Kleine-König 			     pcf2127_i2c_driver.driver.name, id->driver_data);
486907b3262SAkinobu Mita }
487907b3262SAkinobu Mita 
488907b3262SAkinobu Mita static const struct i2c_device_id pcf2127_i2c_id[] = {
489d6c3029fSUwe Kleine-König 	{ "pcf2127", 1 },
490cee2cc21SAkinobu Mita 	{ "pcf2129", 0 },
491907b3262SAkinobu Mita 	{ }
492907b3262SAkinobu Mita };
493907b3262SAkinobu Mita MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
494907b3262SAkinobu Mita 
495907b3262SAkinobu Mita static struct i2c_driver pcf2127_i2c_driver = {
496907b3262SAkinobu Mita 	.driver		= {
497907b3262SAkinobu Mita 		.name	= "rtc-pcf2127-i2c",
498907b3262SAkinobu Mita 		.of_match_table = of_match_ptr(pcf2127_of_match),
499907b3262SAkinobu Mita 	},
500907b3262SAkinobu Mita 	.probe		= pcf2127_i2c_probe,
501907b3262SAkinobu Mita 	.id_table	= pcf2127_i2c_id,
502907b3262SAkinobu Mita };
5039408ec1aSAkinobu Mita 
5049408ec1aSAkinobu Mita static int pcf2127_i2c_register_driver(void)
5059408ec1aSAkinobu Mita {
5069408ec1aSAkinobu Mita 	return i2c_add_driver(&pcf2127_i2c_driver);
5079408ec1aSAkinobu Mita }
5089408ec1aSAkinobu Mita 
5099408ec1aSAkinobu Mita static void pcf2127_i2c_unregister_driver(void)
5109408ec1aSAkinobu Mita {
5119408ec1aSAkinobu Mita 	i2c_del_driver(&pcf2127_i2c_driver);
5129408ec1aSAkinobu Mita }
5139408ec1aSAkinobu Mita 
5149408ec1aSAkinobu Mita #else
5159408ec1aSAkinobu Mita 
5169408ec1aSAkinobu Mita static int pcf2127_i2c_register_driver(void)
5179408ec1aSAkinobu Mita {
5189408ec1aSAkinobu Mita 	return 0;
5199408ec1aSAkinobu Mita }
5209408ec1aSAkinobu Mita 
5219408ec1aSAkinobu Mita static void pcf2127_i2c_unregister_driver(void)
5229408ec1aSAkinobu Mita {
5239408ec1aSAkinobu Mita }
5249408ec1aSAkinobu Mita 
5259408ec1aSAkinobu Mita #endif
5269408ec1aSAkinobu Mita 
5279408ec1aSAkinobu Mita #if IS_ENABLED(CONFIG_SPI_MASTER)
5289408ec1aSAkinobu Mita 
5299408ec1aSAkinobu Mita static struct spi_driver pcf2127_spi_driver;
5309408ec1aSAkinobu Mita 
5319408ec1aSAkinobu Mita static int pcf2127_spi_probe(struct spi_device *spi)
5329408ec1aSAkinobu Mita {
5339408ec1aSAkinobu Mita 	static const struct regmap_config config = {
5349408ec1aSAkinobu Mita 		.reg_bits = 8,
5359408ec1aSAkinobu Mita 		.val_bits = 8,
5369408ec1aSAkinobu Mita 		.read_flag_mask = 0xa0,
5379408ec1aSAkinobu Mita 		.write_flag_mask = 0x20,
5389408ec1aSAkinobu Mita 	};
5399408ec1aSAkinobu Mita 	struct regmap *regmap;
5409408ec1aSAkinobu Mita 
5419408ec1aSAkinobu Mita 	regmap = devm_regmap_init_spi(spi, &config);
5429408ec1aSAkinobu Mita 	if (IS_ERR(regmap)) {
5439408ec1aSAkinobu Mita 		dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
5449408ec1aSAkinobu Mita 			__func__, PTR_ERR(regmap));
5459408ec1aSAkinobu Mita 		return PTR_ERR(regmap);
5469408ec1aSAkinobu Mita 	}
5479408ec1aSAkinobu Mita 
548d6c3029fSUwe Kleine-König 	return pcf2127_probe(&spi->dev, regmap, pcf2127_spi_driver.driver.name,
549d6c3029fSUwe Kleine-König 			     spi_get_device_id(spi)->driver_data);
5509408ec1aSAkinobu Mita }
5519408ec1aSAkinobu Mita 
5529408ec1aSAkinobu Mita static const struct spi_device_id pcf2127_spi_id[] = {
553d6c3029fSUwe Kleine-König 	{ "pcf2127", 1 },
554cee2cc21SAkinobu Mita 	{ "pcf2129", 0 },
5559408ec1aSAkinobu Mita 	{ }
5569408ec1aSAkinobu Mita };
5579408ec1aSAkinobu Mita MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
5589408ec1aSAkinobu Mita 
5599408ec1aSAkinobu Mita static struct spi_driver pcf2127_spi_driver = {
5609408ec1aSAkinobu Mita 	.driver		= {
5619408ec1aSAkinobu Mita 		.name	= "rtc-pcf2127-spi",
5629408ec1aSAkinobu Mita 		.of_match_table = of_match_ptr(pcf2127_of_match),
5639408ec1aSAkinobu Mita 	},
5649408ec1aSAkinobu Mita 	.probe		= pcf2127_spi_probe,
5659408ec1aSAkinobu Mita 	.id_table	= pcf2127_spi_id,
5669408ec1aSAkinobu Mita };
5679408ec1aSAkinobu Mita 
5689408ec1aSAkinobu Mita static int pcf2127_spi_register_driver(void)
5699408ec1aSAkinobu Mita {
5709408ec1aSAkinobu Mita 	return spi_register_driver(&pcf2127_spi_driver);
5719408ec1aSAkinobu Mita }
5729408ec1aSAkinobu Mita 
5739408ec1aSAkinobu Mita static void pcf2127_spi_unregister_driver(void)
5749408ec1aSAkinobu Mita {
5759408ec1aSAkinobu Mita 	spi_unregister_driver(&pcf2127_spi_driver);
5769408ec1aSAkinobu Mita }
5779408ec1aSAkinobu Mita 
5789408ec1aSAkinobu Mita #else
5799408ec1aSAkinobu Mita 
5809408ec1aSAkinobu Mita static int pcf2127_spi_register_driver(void)
5819408ec1aSAkinobu Mita {
5829408ec1aSAkinobu Mita 	return 0;
5839408ec1aSAkinobu Mita }
5849408ec1aSAkinobu Mita 
5859408ec1aSAkinobu Mita static void pcf2127_spi_unregister_driver(void)
5869408ec1aSAkinobu Mita {
5879408ec1aSAkinobu Mita }
5889408ec1aSAkinobu Mita 
5899408ec1aSAkinobu Mita #endif
5909408ec1aSAkinobu Mita 
5919408ec1aSAkinobu Mita static int __init pcf2127_init(void)
5929408ec1aSAkinobu Mita {
5939408ec1aSAkinobu Mita 	int ret;
5949408ec1aSAkinobu Mita 
5959408ec1aSAkinobu Mita 	ret = pcf2127_i2c_register_driver();
5969408ec1aSAkinobu Mita 	if (ret) {
5979408ec1aSAkinobu Mita 		pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
5989408ec1aSAkinobu Mita 		return ret;
5999408ec1aSAkinobu Mita 	}
6009408ec1aSAkinobu Mita 
6019408ec1aSAkinobu Mita 	ret = pcf2127_spi_register_driver();
6029408ec1aSAkinobu Mita 	if (ret) {
6039408ec1aSAkinobu Mita 		pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
6049408ec1aSAkinobu Mita 		pcf2127_i2c_unregister_driver();
6059408ec1aSAkinobu Mita 	}
6069408ec1aSAkinobu Mita 
6079408ec1aSAkinobu Mita 	return ret;
6089408ec1aSAkinobu Mita }
6099408ec1aSAkinobu Mita module_init(pcf2127_init)
6109408ec1aSAkinobu Mita 
6119408ec1aSAkinobu Mita static void __exit pcf2127_exit(void)
6129408ec1aSAkinobu Mita {
6139408ec1aSAkinobu Mita 	pcf2127_spi_unregister_driver();
6149408ec1aSAkinobu Mita 	pcf2127_i2c_unregister_driver();
6159408ec1aSAkinobu Mita }
6169408ec1aSAkinobu Mita module_exit(pcf2127_exit)
61718cb6368SRenaud Cerrato 
61818cb6368SRenaud Cerrato MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
619cee2cc21SAkinobu Mita MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
6204d8318bcSUwe Kleine-König MODULE_LICENSE("GPL v2");
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