xref: /openbmc/linux/drivers/rtc/rtc-da9063.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1737842e5SWolfram Sang // SPDX-License-Identifier: GPL-2.0+
2737842e5SWolfram Sang /*
3737842e5SWolfram Sang  * Real time clock device driver for DA9063
4ce006ca6SSteve Twiss  * Copyright (C) 2013-2015  Dialog Semiconductor Ltd.
5c2a57550SOpensource [Steve Twiss]  */
6c2a57550SOpensource [Steve Twiss] 
780ca3277SS Twiss #include <linux/delay.h>
880ca3277SS Twiss #include <linux/init.h>
980ca3277SS Twiss #include <linux/interrupt.h>
10c2a57550SOpensource [Steve Twiss] #include <linux/kernel.h>
11c2a57550SOpensource [Steve Twiss] #include <linux/module.h>
1280ca3277SS Twiss #include <linux/of.h>
13c2a57550SOpensource [Steve Twiss] #include <linux/platform_device.h>
14*ed17a2bcSSamuel Holland #include <linux/pm_wakeirq.h>
1580ca3277SS Twiss #include <linux/regmap.h>
16c2a57550SOpensource [Steve Twiss] #include <linux/rtc.h>
17c2a57550SOpensource [Steve Twiss] #include <linux/slab.h>
1880ca3277SS Twiss 
1980ca3277SS Twiss #include <linux/mfd/da9062/registers.h>
20c2a57550SOpensource [Steve Twiss] #include <linux/mfd/da9063/registers.h>
21c2a57550SOpensource [Steve Twiss] #include <linux/mfd/da9063/core.h>
22c2a57550SOpensource [Steve Twiss] 
23c2a57550SOpensource [Steve Twiss] #define YEARS_TO_DA9063(year)		((year) - 100)
24c2a57550SOpensource [Steve Twiss] #define MONTHS_TO_DA9063(month)		((month) + 1)
25c2a57550SOpensource [Steve Twiss] #define YEARS_FROM_DA9063(year)		((year) + 100)
26c2a57550SOpensource [Steve Twiss] #define MONTHS_FROM_DA9063(month)	((month) - 1)
27c2a57550SOpensource [Steve Twiss] 
2880ca3277SS Twiss enum {
2980ca3277SS Twiss 	RTC_SEC	= 0,
3080ca3277SS Twiss 	RTC_MIN	= 1,
3180ca3277SS Twiss 	RTC_HOUR = 2,
3280ca3277SS Twiss 	RTC_DAY	= 3,
3380ca3277SS Twiss 	RTC_MONTH = 4,
3480ca3277SS Twiss 	RTC_YEAR = 5,
3580ca3277SS Twiss 	RTC_DATA_LEN
36c2a57550SOpensource [Steve Twiss] };
37c2a57550SOpensource [Steve Twiss] 
3880ca3277SS Twiss struct da9063_compatible_rtc_regmap {
3980ca3277SS Twiss 	/* REGS */
4080ca3277SS Twiss 	int rtc_enable_reg;
4180ca3277SS Twiss 	int rtc_enable_32k_crystal_reg;
4280ca3277SS Twiss 	int rtc_alarm_secs_reg;
4380ca3277SS Twiss 	int rtc_alarm_year_reg;
4480ca3277SS Twiss 	int rtc_count_secs_reg;
4580ca3277SS Twiss 	int rtc_count_year_reg;
4680ca3277SS Twiss 	int rtc_event_reg;
4780ca3277SS Twiss 	/* MASKS */
4880ca3277SS Twiss 	int rtc_enable_mask;
4980ca3277SS Twiss 	int rtc_crystal_mask;
5080ca3277SS Twiss 	int rtc_event_alarm_mask;
5180ca3277SS Twiss 	int rtc_alarm_on_mask;
5280ca3277SS Twiss 	int rtc_alarm_status_mask;
5380ca3277SS Twiss 	int rtc_tick_on_mask;
5480ca3277SS Twiss 	int rtc_ready_to_read_mask;
5580ca3277SS Twiss 	int rtc_count_sec_mask;
5680ca3277SS Twiss 	int rtc_count_min_mask;
5780ca3277SS Twiss 	int rtc_count_hour_mask;
5880ca3277SS Twiss 	int rtc_count_day_mask;
5980ca3277SS Twiss 	int rtc_count_month_mask;
6080ca3277SS Twiss 	int rtc_count_year_mask;
6180ca3277SS Twiss 	/* ALARM CONFIG */
6280ca3277SS Twiss 	int rtc_data_start;
6380ca3277SS Twiss 	int rtc_alarm_len;
6480ca3277SS Twiss };
6580ca3277SS Twiss 
6680ca3277SS Twiss struct da9063_compatible_rtc {
6780ca3277SS Twiss 	struct rtc_device *rtc_dev;
6880ca3277SS Twiss 	struct rtc_time alarm_time;
6980ca3277SS Twiss 	struct regmap *regmap;
7080ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config;
7180ca3277SS Twiss 	bool rtc_sync;
7280ca3277SS Twiss };
7380ca3277SS Twiss 
7480ca3277SS Twiss static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
7580ca3277SS Twiss 	/* REGS */
7680ca3277SS Twiss 	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
7780ca3277SS Twiss 	.rtc_alarm_secs_reg         = DA9063_AD_REG_ALARM_MI,
7880ca3277SS Twiss 	.rtc_alarm_year_reg         = DA9063_AD_REG_ALARM_Y,
7980ca3277SS Twiss 	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
8080ca3277SS Twiss 	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
8180ca3277SS Twiss 	.rtc_event_reg              = DA9063_REG_EVENT_A,
8280ca3277SS Twiss 	/* MASKS */
8380ca3277SS Twiss 	.rtc_enable_mask            = DA9063_RTC_EN,
8480ca3277SS Twiss 	.rtc_crystal_mask           = DA9063_CRYSTAL,
8580ca3277SS Twiss 	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
8680ca3277SS Twiss 	.rtc_event_alarm_mask       = DA9063_E_ALARM,
8780ca3277SS Twiss 	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
8880ca3277SS Twiss 	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
8980ca3277SS Twiss 				      DA9063_ALARM_STATUS_TICK,
9080ca3277SS Twiss 	.rtc_tick_on_mask           = DA9063_TICK_ON,
9180ca3277SS Twiss 	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
9280ca3277SS Twiss 	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
9380ca3277SS Twiss 	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
9480ca3277SS Twiss 	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
9580ca3277SS Twiss 	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
9680ca3277SS Twiss 	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
9780ca3277SS Twiss 	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
9880ca3277SS Twiss 	/* ALARM CONFIG */
9980ca3277SS Twiss 	.rtc_data_start             = RTC_MIN,
10080ca3277SS Twiss 	.rtc_alarm_len              = RTC_DATA_LEN - 1,
10180ca3277SS Twiss };
10280ca3277SS Twiss 
10380ca3277SS Twiss static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
10480ca3277SS Twiss 	/* REGS */
10580ca3277SS Twiss 	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
10680ca3277SS Twiss 	.rtc_alarm_secs_reg         = DA9063_BB_REG_ALARM_S,
10780ca3277SS Twiss 	.rtc_alarm_year_reg         = DA9063_BB_REG_ALARM_Y,
10880ca3277SS Twiss 	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
10980ca3277SS Twiss 	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
11080ca3277SS Twiss 	.rtc_event_reg              = DA9063_REG_EVENT_A,
11180ca3277SS Twiss 	/* MASKS */
11280ca3277SS Twiss 	.rtc_enable_mask            = DA9063_RTC_EN,
11380ca3277SS Twiss 	.rtc_crystal_mask           = DA9063_CRYSTAL,
11480ca3277SS Twiss 	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
11580ca3277SS Twiss 	.rtc_event_alarm_mask       = DA9063_E_ALARM,
11680ca3277SS Twiss 	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
11780ca3277SS Twiss 	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
11880ca3277SS Twiss 				      DA9063_ALARM_STATUS_TICK,
11980ca3277SS Twiss 	.rtc_tick_on_mask           = DA9063_TICK_ON,
12080ca3277SS Twiss 	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
12180ca3277SS Twiss 	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
12280ca3277SS Twiss 	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
12380ca3277SS Twiss 	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
12480ca3277SS Twiss 	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
12580ca3277SS Twiss 	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
12680ca3277SS Twiss 	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
12780ca3277SS Twiss 	/* ALARM CONFIG */
12880ca3277SS Twiss 	.rtc_data_start             = RTC_SEC,
12980ca3277SS Twiss 	.rtc_alarm_len              = RTC_DATA_LEN,
13080ca3277SS Twiss };
13180ca3277SS Twiss 
13280ca3277SS Twiss static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
13380ca3277SS Twiss 	/* REGS */
13480ca3277SS Twiss 	.rtc_enable_reg             = DA9062AA_CONTROL_E,
13580ca3277SS Twiss 	.rtc_alarm_secs_reg         = DA9062AA_ALARM_S,
13680ca3277SS Twiss 	.rtc_alarm_year_reg         = DA9062AA_ALARM_Y,
13780ca3277SS Twiss 	.rtc_count_secs_reg         = DA9062AA_COUNT_S,
13880ca3277SS Twiss 	.rtc_count_year_reg         = DA9062AA_COUNT_Y,
13980ca3277SS Twiss 	.rtc_event_reg              = DA9062AA_EVENT_A,
14080ca3277SS Twiss 	/* MASKS */
14180ca3277SS Twiss 	.rtc_enable_mask            = DA9062AA_RTC_EN_MASK,
14280ca3277SS Twiss 	.rtc_crystal_mask           = DA9062AA_CRYSTAL_MASK,
14380ca3277SS Twiss 	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
14480ca3277SS Twiss 	.rtc_event_alarm_mask       = DA9062AA_M_ALARM_MASK,
14580ca3277SS Twiss 	.rtc_alarm_on_mask          = DA9062AA_ALARM_ON_MASK,
14680ca3277SS Twiss 	.rtc_alarm_status_mask      = (0x02 << 6),
14780ca3277SS Twiss 	.rtc_tick_on_mask           = DA9062AA_TICK_ON_MASK,
14880ca3277SS Twiss 	.rtc_ready_to_read_mask     = DA9062AA_RTC_READ_MASK,
14980ca3277SS Twiss 	.rtc_count_sec_mask         = DA9062AA_COUNT_SEC_MASK,
15080ca3277SS Twiss 	.rtc_count_min_mask         = DA9062AA_COUNT_MIN_MASK,
15180ca3277SS Twiss 	.rtc_count_hour_mask        = DA9062AA_COUNT_HOUR_MASK,
15280ca3277SS Twiss 	.rtc_count_day_mask         = DA9062AA_COUNT_DAY_MASK,
15380ca3277SS Twiss 	.rtc_count_month_mask       = DA9062AA_COUNT_MONTH_MASK,
15480ca3277SS Twiss 	.rtc_count_year_mask        = DA9062AA_COUNT_YEAR_MASK,
15580ca3277SS Twiss 	/* ALARM CONFIG */
15680ca3277SS Twiss 	.rtc_data_start             = RTC_SEC,
15780ca3277SS Twiss 	.rtc_alarm_len              = RTC_DATA_LEN,
15880ca3277SS Twiss };
15980ca3277SS Twiss 
16080ca3277SS Twiss static const struct of_device_id da9063_compatible_reg_id_table[] = {
16180ca3277SS Twiss 	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
16280ca3277SS Twiss 	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
16380ca3277SS Twiss 	{ },
16480ca3277SS Twiss };
16573798d5cSJavier Martinez Canillas MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);
16680ca3277SS Twiss 
da9063_data_to_tm(u8 * data,struct rtc_time * tm,struct da9063_compatible_rtc * rtc)16780ca3277SS Twiss static void da9063_data_to_tm(u8 *data, struct rtc_time *tm,
16880ca3277SS Twiss 			      struct da9063_compatible_rtc *rtc)
169c2a57550SOpensource [Steve Twiss] {
17080ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
17180ca3277SS Twiss 
17280ca3277SS Twiss 	tm->tm_sec  = data[RTC_SEC]  & config->rtc_count_sec_mask;
17380ca3277SS Twiss 	tm->tm_min  = data[RTC_MIN]  & config->rtc_count_min_mask;
17480ca3277SS Twiss 	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
17580ca3277SS Twiss 	tm->tm_mday = data[RTC_DAY]  & config->rtc_count_day_mask;
176c2a57550SOpensource [Steve Twiss] 	tm->tm_mon  = MONTHS_FROM_DA9063(data[RTC_MONTH] &
17780ca3277SS Twiss 					 config->rtc_count_month_mask);
178c2a57550SOpensource [Steve Twiss] 	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
17980ca3277SS Twiss 					config->rtc_count_year_mask);
180c2a57550SOpensource [Steve Twiss] }
181c2a57550SOpensource [Steve Twiss] 
da9063_tm_to_data(struct rtc_time * tm,u8 * data,struct da9063_compatible_rtc * rtc)18280ca3277SS Twiss static void da9063_tm_to_data(struct rtc_time *tm, u8 *data,
18380ca3277SS Twiss 			      struct da9063_compatible_rtc *rtc)
184c2a57550SOpensource [Steve Twiss] {
18580ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
186c2a57550SOpensource [Steve Twiss] 
1872ad2c174SEnrico Scholz 	data[RTC_SEC]   = tm->tm_sec & config->rtc_count_sec_mask;
1882ad2c174SEnrico Scholz 	data[RTC_MIN]   = tm->tm_min & config->rtc_count_min_mask;
1892ad2c174SEnrico Scholz 	data[RTC_HOUR]  = tm->tm_hour & config->rtc_count_hour_mask;
1902ad2c174SEnrico Scholz 	data[RTC_DAY]   = tm->tm_mday & config->rtc_count_day_mask;
1912ad2c174SEnrico Scholz 	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
19280ca3277SS Twiss 				config->rtc_count_month_mask;
1932ad2c174SEnrico Scholz 	data[RTC_YEAR]  = YEARS_TO_DA9063(tm->tm_year) &
19480ca3277SS Twiss 				config->rtc_count_year_mask;
195c2a57550SOpensource [Steve Twiss] }
196c2a57550SOpensource [Steve Twiss] 
da9063_rtc_stop_alarm(struct device * dev)197c2a57550SOpensource [Steve Twiss] static int da9063_rtc_stop_alarm(struct device *dev)
198c2a57550SOpensource [Steve Twiss] {
19980ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
20080ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
201c2a57550SOpensource [Steve Twiss] 
20280ca3277SS Twiss 	return regmap_update_bits(rtc->regmap,
20380ca3277SS Twiss 				  config->rtc_alarm_year_reg,
20480ca3277SS Twiss 				  config->rtc_alarm_on_mask,
20580ca3277SS Twiss 				  0);
206c2a57550SOpensource [Steve Twiss] }
207c2a57550SOpensource [Steve Twiss] 
da9063_rtc_start_alarm(struct device * dev)208c2a57550SOpensource [Steve Twiss] static int da9063_rtc_start_alarm(struct device *dev)
209c2a57550SOpensource [Steve Twiss] {
21080ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
21180ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
212c2a57550SOpensource [Steve Twiss] 
21380ca3277SS Twiss 	return regmap_update_bits(rtc->regmap,
21480ca3277SS Twiss 				  config->rtc_alarm_year_reg,
21580ca3277SS Twiss 				  config->rtc_alarm_on_mask,
21680ca3277SS Twiss 				  config->rtc_alarm_on_mask);
217c2a57550SOpensource [Steve Twiss] }
218c2a57550SOpensource [Steve Twiss] 
da9063_rtc_read_time(struct device * dev,struct rtc_time * tm)219c2a57550SOpensource [Steve Twiss] static int da9063_rtc_read_time(struct device *dev, struct rtc_time *tm)
220c2a57550SOpensource [Steve Twiss] {
22180ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
22280ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
223c2a57550SOpensource [Steve Twiss] 	unsigned long tm_secs;
224c2a57550SOpensource [Steve Twiss] 	unsigned long al_secs;
225c2a57550SOpensource [Steve Twiss] 	u8 data[RTC_DATA_LEN];
226c2a57550SOpensource [Steve Twiss] 	int ret;
227c2a57550SOpensource [Steve Twiss] 
22880ca3277SS Twiss 	ret = regmap_bulk_read(rtc->regmap,
22980ca3277SS Twiss 			       config->rtc_count_secs_reg,
230c2a57550SOpensource [Steve Twiss] 			       data, RTC_DATA_LEN);
231c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
232c2a57550SOpensource [Steve Twiss] 		dev_err(dev, "Failed to read RTC time data: %d\n", ret);
233c2a57550SOpensource [Steve Twiss] 		return ret;
234c2a57550SOpensource [Steve Twiss] 	}
235c2a57550SOpensource [Steve Twiss] 
23680ca3277SS Twiss 	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
237c2a57550SOpensource [Steve Twiss] 		dev_dbg(dev, "RTC not yet ready to be read by the host\n");
238c2a57550SOpensource [Steve Twiss] 		return -EINVAL;
239c2a57550SOpensource [Steve Twiss] 	}
240c2a57550SOpensource [Steve Twiss] 
24180ca3277SS Twiss 	da9063_data_to_tm(data, tm, rtc);
242c2a57550SOpensource [Steve Twiss] 
243b599db3aSAlexandre Belloni 	tm_secs = rtc_tm_to_time64(tm);
244b599db3aSAlexandre Belloni 	al_secs = rtc_tm_to_time64(&rtc->alarm_time);
245c2a57550SOpensource [Steve Twiss] 
246c2a57550SOpensource [Steve Twiss] 	/* handle the rtc synchronisation delay */
247a48c6224SKaixu Xia 	if (rtc->rtc_sync && al_secs - tm_secs == 1)
248c2a57550SOpensource [Steve Twiss] 		memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
249c2a57550SOpensource [Steve Twiss] 	else
250c2a57550SOpensource [Steve Twiss] 		rtc->rtc_sync = false;
251c2a57550SOpensource [Steve Twiss] 
252bb54be13SAlexandre Belloni 	return 0;
253c2a57550SOpensource [Steve Twiss] }
254c2a57550SOpensource [Steve Twiss] 
da9063_rtc_set_time(struct device * dev,struct rtc_time * tm)255c2a57550SOpensource [Steve Twiss] static int da9063_rtc_set_time(struct device *dev, struct rtc_time *tm)
256c2a57550SOpensource [Steve Twiss] {
25780ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
25880ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
259c2a57550SOpensource [Steve Twiss] 	u8 data[RTC_DATA_LEN];
260c2a57550SOpensource [Steve Twiss] 	int ret;
261c2a57550SOpensource [Steve Twiss] 
26280ca3277SS Twiss 	da9063_tm_to_data(tm, data, rtc);
26380ca3277SS Twiss 	ret = regmap_bulk_write(rtc->regmap,
26480ca3277SS Twiss 				config->rtc_count_secs_reg,
265c2a57550SOpensource [Steve Twiss] 				data, RTC_DATA_LEN);
266c2a57550SOpensource [Steve Twiss] 	if (ret < 0)
267c2a57550SOpensource [Steve Twiss] 		dev_err(dev, "Failed to set RTC time data: %d\n", ret);
268c2a57550SOpensource [Steve Twiss] 
269c2a57550SOpensource [Steve Twiss] 	return ret;
270c2a57550SOpensource [Steve Twiss] }
271c2a57550SOpensource [Steve Twiss] 
da9063_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)272c2a57550SOpensource [Steve Twiss] static int da9063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
273c2a57550SOpensource [Steve Twiss] {
27480ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
27580ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
276c2a57550SOpensource [Steve Twiss] 	u8 data[RTC_DATA_LEN];
277c2a57550SOpensource [Steve Twiss] 	int ret;
278c2a57550SOpensource [Steve Twiss] 	unsigned int val;
279c2a57550SOpensource [Steve Twiss] 
2809cb42e2aSOpensource [Steve Twiss] 	data[RTC_SEC] = 0;
28180ca3277SS Twiss 	ret = regmap_bulk_read(rtc->regmap,
28280ca3277SS Twiss 			       config->rtc_alarm_secs_reg,
28380ca3277SS Twiss 			       &data[config->rtc_data_start],
28480ca3277SS Twiss 			       config->rtc_alarm_len);
285c2a57550SOpensource [Steve Twiss] 	if (ret < 0)
286c2a57550SOpensource [Steve Twiss] 		return ret;
287c2a57550SOpensource [Steve Twiss] 
28880ca3277SS Twiss 	da9063_data_to_tm(data, &alrm->time, rtc);
289c2a57550SOpensource [Steve Twiss] 
29080ca3277SS Twiss 	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);
291c2a57550SOpensource [Steve Twiss] 
29280ca3277SS Twiss 	ret = regmap_read(rtc->regmap,
29380ca3277SS Twiss 			  config->rtc_event_reg,
29480ca3277SS Twiss 			  &val);
295c2a57550SOpensource [Steve Twiss] 	if (ret < 0)
296c2a57550SOpensource [Steve Twiss] 		return ret;
297c2a57550SOpensource [Steve Twiss] 
29880ca3277SS Twiss 	if (val & config->rtc_event_alarm_mask)
299c2a57550SOpensource [Steve Twiss] 		alrm->pending = 1;
300c2a57550SOpensource [Steve Twiss] 	else
301c2a57550SOpensource [Steve Twiss] 		alrm->pending = 0;
302c2a57550SOpensource [Steve Twiss] 
303c2a57550SOpensource [Steve Twiss] 	return 0;
304c2a57550SOpensource [Steve Twiss] }
305c2a57550SOpensource [Steve Twiss] 
da9063_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)306c2a57550SOpensource [Steve Twiss] static int da9063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
307c2a57550SOpensource [Steve Twiss] {
30880ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
30980ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
310c2a57550SOpensource [Steve Twiss] 	u8 data[RTC_DATA_LEN];
311c2a57550SOpensource [Steve Twiss] 	int ret;
312c2a57550SOpensource [Steve Twiss] 
31380ca3277SS Twiss 	da9063_tm_to_data(&alrm->time, data, rtc);
314c2a57550SOpensource [Steve Twiss] 
315c2a57550SOpensource [Steve Twiss] 	ret = da9063_rtc_stop_alarm(dev);
316c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
317c2a57550SOpensource [Steve Twiss] 		dev_err(dev, "Failed to stop alarm: %d\n", ret);
318c2a57550SOpensource [Steve Twiss] 		return ret;
319c2a57550SOpensource [Steve Twiss] 	}
320c2a57550SOpensource [Steve Twiss] 
32180ca3277SS Twiss 	ret = regmap_bulk_write(rtc->regmap,
32280ca3277SS Twiss 				config->rtc_alarm_secs_reg,
32380ca3277SS Twiss 				&data[config->rtc_data_start],
32480ca3277SS Twiss 				config->rtc_alarm_len);
325c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
326c2a57550SOpensource [Steve Twiss] 		dev_err(dev, "Failed to write alarm: %d\n", ret);
327c2a57550SOpensource [Steve Twiss] 		return ret;
328c2a57550SOpensource [Steve Twiss] 	}
329c2a57550SOpensource [Steve Twiss] 
33080ca3277SS Twiss 	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
331c2a57550SOpensource [Steve Twiss] 
332c2a57550SOpensource [Steve Twiss] 	if (alrm->enabled) {
333c2a57550SOpensource [Steve Twiss] 		ret = da9063_rtc_start_alarm(dev);
334c2a57550SOpensource [Steve Twiss] 		if (ret < 0) {
335c2a57550SOpensource [Steve Twiss] 			dev_err(dev, "Failed to start alarm: %d\n", ret);
336c2a57550SOpensource [Steve Twiss] 			return ret;
337c2a57550SOpensource [Steve Twiss] 		}
338c2a57550SOpensource [Steve Twiss] 	}
339c2a57550SOpensource [Steve Twiss] 
340c2a57550SOpensource [Steve Twiss] 	return ret;
341c2a57550SOpensource [Steve Twiss] }
342c2a57550SOpensource [Steve Twiss] 
da9063_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)34380ca3277SS Twiss static int da9063_rtc_alarm_irq_enable(struct device *dev,
34480ca3277SS Twiss 				       unsigned int enabled)
345c2a57550SOpensource [Steve Twiss] {
346c2a57550SOpensource [Steve Twiss] 	if (enabled)
347c2a57550SOpensource [Steve Twiss] 		return da9063_rtc_start_alarm(dev);
348c2a57550SOpensource [Steve Twiss] 	else
349c2a57550SOpensource [Steve Twiss] 		return da9063_rtc_stop_alarm(dev);
350c2a57550SOpensource [Steve Twiss] }
351c2a57550SOpensource [Steve Twiss] 
da9063_alarm_event(int irq,void * data)352c2a57550SOpensource [Steve Twiss] static irqreturn_t da9063_alarm_event(int irq, void *data)
353c2a57550SOpensource [Steve Twiss] {
35480ca3277SS Twiss 	struct da9063_compatible_rtc *rtc = data;
35580ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config = rtc->config;
356c2a57550SOpensource [Steve Twiss] 
35780ca3277SS Twiss 	regmap_update_bits(rtc->regmap,
35880ca3277SS Twiss 			   config->rtc_alarm_year_reg,
35980ca3277SS Twiss 			   config->rtc_alarm_on_mask,
36080ca3277SS Twiss 			   0);
361c2a57550SOpensource [Steve Twiss] 
362c2a57550SOpensource [Steve Twiss] 	rtc->rtc_sync = true;
363c2a57550SOpensource [Steve Twiss] 	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
364c2a57550SOpensource [Steve Twiss] 
365c2a57550SOpensource [Steve Twiss] 	return IRQ_HANDLED;
366c2a57550SOpensource [Steve Twiss] }
367c2a57550SOpensource [Steve Twiss] 
368c2a57550SOpensource [Steve Twiss] static const struct rtc_class_ops da9063_rtc_ops = {
369c2a57550SOpensource [Steve Twiss] 	.read_time = da9063_rtc_read_time,
370c2a57550SOpensource [Steve Twiss] 	.set_time = da9063_rtc_set_time,
371c2a57550SOpensource [Steve Twiss] 	.read_alarm = da9063_rtc_read_alarm,
372c2a57550SOpensource [Steve Twiss] 	.set_alarm = da9063_rtc_set_alarm,
373c2a57550SOpensource [Steve Twiss] 	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
374c2a57550SOpensource [Steve Twiss] };
375c2a57550SOpensource [Steve Twiss] 
da9063_rtc_probe(struct platform_device * pdev)376c2a57550SOpensource [Steve Twiss] static int da9063_rtc_probe(struct platform_device *pdev)
377c2a57550SOpensource [Steve Twiss] {
37880ca3277SS Twiss 	struct da9063_compatible_rtc *rtc;
37980ca3277SS Twiss 	const struct da9063_compatible_rtc_regmap *config;
38080ca3277SS Twiss 	const struct of_device_id *match;
381c2a57550SOpensource [Steve Twiss] 	int irq_alarm;
382c2a57550SOpensource [Steve Twiss] 	u8 data[RTC_DATA_LEN];
383c2a57550SOpensource [Steve Twiss] 	int ret;
384c2a57550SOpensource [Steve Twiss] 
38580ca3277SS Twiss 	if (!pdev->dev.of_node)
38680ca3277SS Twiss 		return -ENXIO;
387c2a57550SOpensource [Steve Twiss] 
38880ca3277SS Twiss 	match = of_match_node(da9063_compatible_reg_id_table,
38980ca3277SS Twiss 			      pdev->dev.of_node);
390c2a57550SOpensource [Steve Twiss] 
3919cb42e2aSOpensource [Steve Twiss] 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
3929cb42e2aSOpensource [Steve Twiss] 	if (!rtc)
3939cb42e2aSOpensource [Steve Twiss] 		return -ENOMEM;
3949cb42e2aSOpensource [Steve Twiss] 
39580ca3277SS Twiss 	rtc->config = match->data;
39680ca3277SS Twiss 	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
39780ca3277SS Twiss 		struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);
39880ca3277SS Twiss 
39980ca3277SS Twiss 		if (chip->variant_code == PMIC_DA9063_AD)
40080ca3277SS Twiss 			rtc->config = &da9063_ad_regs;
4019cb42e2aSOpensource [Steve Twiss] 	}
4029cb42e2aSOpensource [Steve Twiss] 
40380ca3277SS Twiss 	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
40480ca3277SS Twiss 	if (!rtc->regmap) {
40580ca3277SS Twiss 		dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
40680ca3277SS Twiss 		return -ENXIO;
40780ca3277SS Twiss 	}
40880ca3277SS Twiss 
40980ca3277SS Twiss 	config = rtc->config;
41080ca3277SS Twiss 	ret = regmap_update_bits(rtc->regmap,
41180ca3277SS Twiss 				 config->rtc_enable_reg,
41280ca3277SS Twiss 				 config->rtc_enable_mask,
41380ca3277SS Twiss 				 config->rtc_enable_mask);
41480ca3277SS Twiss 	if (ret < 0) {
41580ca3277SS Twiss 		dev_err(&pdev->dev, "Failed to enable RTC\n");
41680ca3277SS Twiss 		return ret;
41780ca3277SS Twiss 	}
41880ca3277SS Twiss 
41980ca3277SS Twiss 	ret = regmap_update_bits(rtc->regmap,
42080ca3277SS Twiss 				 config->rtc_enable_32k_crystal_reg,
42180ca3277SS Twiss 				 config->rtc_crystal_mask,
42280ca3277SS Twiss 				 config->rtc_crystal_mask);
42380ca3277SS Twiss 	if (ret < 0) {
42480ca3277SS Twiss 		dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
42580ca3277SS Twiss 		return ret;
42680ca3277SS Twiss 	}
42780ca3277SS Twiss 
42880ca3277SS Twiss 	ret = regmap_update_bits(rtc->regmap,
42980ca3277SS Twiss 				 config->rtc_alarm_secs_reg,
43080ca3277SS Twiss 				 config->rtc_alarm_status_mask,
431c2a57550SOpensource [Steve Twiss] 				 0);
432c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
433c2a57550SOpensource [Steve Twiss] 		dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
43480ca3277SS Twiss 		return ret;
435c2a57550SOpensource [Steve Twiss] 	}
436c2a57550SOpensource [Steve Twiss] 
43780ca3277SS Twiss 	ret = regmap_update_bits(rtc->regmap,
43880ca3277SS Twiss 				 config->rtc_alarm_secs_reg,
439c2a57550SOpensource [Steve Twiss] 				 DA9063_ALARM_STATUS_ALARM,
440c2a57550SOpensource [Steve Twiss] 				 DA9063_ALARM_STATUS_ALARM);
441c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
442c2a57550SOpensource [Steve Twiss] 		dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
44380ca3277SS Twiss 		return ret;
444c2a57550SOpensource [Steve Twiss] 	}
445c2a57550SOpensource [Steve Twiss] 
44680ca3277SS Twiss 	ret = regmap_update_bits(rtc->regmap,
44780ca3277SS Twiss 				 config->rtc_alarm_year_reg,
44880ca3277SS Twiss 				 config->rtc_tick_on_mask,
44980ca3277SS Twiss 				 0);
450c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
451c2a57550SOpensource [Steve Twiss] 		dev_err(&pdev->dev, "Failed to disable TICKs\n");
45280ca3277SS Twiss 		return ret;
453c2a57550SOpensource [Steve Twiss] 	}
454c2a57550SOpensource [Steve Twiss] 
4559cb42e2aSOpensource [Steve Twiss] 	data[RTC_SEC] = 0;
45680ca3277SS Twiss 	ret = regmap_bulk_read(rtc->regmap,
45780ca3277SS Twiss 			       config->rtc_alarm_secs_reg,
45880ca3277SS Twiss 			       &data[config->rtc_data_start],
45980ca3277SS Twiss 			       config->rtc_alarm_len);
460c2a57550SOpensource [Steve Twiss] 	if (ret < 0) {
461c2a57550SOpensource [Steve Twiss] 		dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
462c2a57550SOpensource [Steve Twiss] 			ret);
46380ca3277SS Twiss 		return ret;
464c2a57550SOpensource [Steve Twiss] 	}
465c2a57550SOpensource [Steve Twiss] 
466c2a57550SOpensource [Steve Twiss] 	platform_set_drvdata(pdev, rtc);
467c2a57550SOpensource [Steve Twiss] 
4685ff404d1SAlexandre Belloni 	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
469c2a57550SOpensource [Steve Twiss] 	if (IS_ERR(rtc->rtc_dev))
470c2a57550SOpensource [Steve Twiss] 		return PTR_ERR(rtc->rtc_dev);
471c2a57550SOpensource [Steve Twiss] 
4725ff404d1SAlexandre Belloni 	rtc->rtc_dev->ops = &da9063_rtc_ops;
4735ff404d1SAlexandre Belloni 	rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
4745ff404d1SAlexandre Belloni 	rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_2063;
4755ff404d1SAlexandre Belloni 
47680ca3277SS Twiss 	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
477c2a57550SOpensource [Steve Twiss] 	rtc->rtc_sync = false;
47877535aceSSteve Twiss 
479a478c433SAlexandre Belloni 	if (config->rtc_data_start != RTC_SEC) {
480a478c433SAlexandre Belloni 		set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtc_dev->features);
481882c5e55SAlexandre Belloni 		/*
482a478c433SAlexandre Belloni 		 * TODO: some models have alarms on a minute boundary but still
483a478c433SAlexandre Belloni 		 * support real hardware interrupts.
484882c5e55SAlexandre Belloni 		 */
485a478c433SAlexandre Belloni 		clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
486a478c433SAlexandre Belloni 	}
487882c5e55SAlexandre Belloni 
48877535aceSSteve Twiss 	irq_alarm = platform_get_irq_byname(pdev, "ALARM");
4897da83f1bSKrzysztof Kozlowski 	if (irq_alarm < 0)
4907da83f1bSKrzysztof Kozlowski 		return irq_alarm;
4917da83f1bSKrzysztof Kozlowski 
49277535aceSSteve Twiss 	ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
49377535aceSSteve Twiss 					da9063_alarm_event,
49477535aceSSteve Twiss 					IRQF_TRIGGER_LOW | IRQF_ONESHOT,
49577535aceSSteve Twiss 					"ALARM", rtc);
49677535aceSSteve Twiss 	if (ret)
49777535aceSSteve Twiss 		dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
49877535aceSSteve Twiss 			irq_alarm, ret);
49977535aceSSteve Twiss 
500*ed17a2bcSSamuel Holland 	ret = dev_pm_set_wake_irq(&pdev->dev, irq_alarm);
501*ed17a2bcSSamuel Holland 	if (ret)
502*ed17a2bcSSamuel Holland 		dev_warn(&pdev->dev,
503*ed17a2bcSSamuel Holland 			 "Failed to set IRQ %d as a wake IRQ: %d\n",
504*ed17a2bcSSamuel Holland 			 irq_alarm, ret);
505*ed17a2bcSSamuel Holland 
506029d3a6fSNikita Shubin 	device_init_wakeup(&pdev->dev, true);
507029d3a6fSNikita Shubin 
508fdcfd854SBartosz Golaszewski 	return devm_rtc_register_device(rtc->rtc_dev);
509c2a57550SOpensource [Steve Twiss] }
510c2a57550SOpensource [Steve Twiss] 
511c2a57550SOpensource [Steve Twiss] static struct platform_driver da9063_rtc_driver = {
512c2a57550SOpensource [Steve Twiss] 	.probe		= da9063_rtc_probe,
513c2a57550SOpensource [Steve Twiss] 	.driver		= {
514c2a57550SOpensource [Steve Twiss] 		.name	= DA9063_DRVNAME_RTC,
51580ca3277SS Twiss 		.of_match_table = da9063_compatible_reg_id_table,
516c2a57550SOpensource [Steve Twiss] 	},
517c2a57550SOpensource [Steve Twiss] };
518c2a57550SOpensource [Steve Twiss] 
519c2a57550SOpensource [Steve Twiss] module_platform_driver(da9063_rtc_driver);
520c2a57550SOpensource [Steve Twiss] 
521c2a57550SOpensource [Steve Twiss] MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
522c2a57550SOpensource [Steve Twiss] MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
523ce006ca6SSteve Twiss MODULE_LICENSE("GPL");
524c2a57550SOpensource [Steve Twiss] MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);
525