xref: /openbmc/linux/drivers/regulator/qcom_spmi-regulator.c (revision e92a4047419c805d08ad136fbc72368249d9f091)
1*e92a4047SStephen Boyd /*
2*e92a4047SStephen Boyd  * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
3*e92a4047SStephen Boyd  *
4*e92a4047SStephen Boyd  * This program is free software; you can redistribute it and/or modify
5*e92a4047SStephen Boyd  * it under the terms of the GNU General Public License version 2 and
6*e92a4047SStephen Boyd  * only version 2 as published by the Free Software Foundation.
7*e92a4047SStephen Boyd  *
8*e92a4047SStephen Boyd  * This program is distributed in the hope that it will be useful,
9*e92a4047SStephen Boyd  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10*e92a4047SStephen Boyd  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11*e92a4047SStephen Boyd  * GNU General Public License for more details.
12*e92a4047SStephen Boyd  */
13*e92a4047SStephen Boyd 
14*e92a4047SStephen Boyd #include <linux/module.h>
15*e92a4047SStephen Boyd #include <linux/delay.h>
16*e92a4047SStephen Boyd #include <linux/err.h>
17*e92a4047SStephen Boyd #include <linux/kernel.h>
18*e92a4047SStephen Boyd #include <linux/interrupt.h>
19*e92a4047SStephen Boyd #include <linux/bitops.h>
20*e92a4047SStephen Boyd #include <linux/slab.h>
21*e92a4047SStephen Boyd #include <linux/of.h>
22*e92a4047SStephen Boyd #include <linux/of_device.h>
23*e92a4047SStephen Boyd #include <linux/platform_device.h>
24*e92a4047SStephen Boyd #include <linux/ktime.h>
25*e92a4047SStephen Boyd #include <linux/regulator/driver.h>
26*e92a4047SStephen Boyd #include <linux/regmap.h>
27*e92a4047SStephen Boyd #include <linux/list.h>
28*e92a4047SStephen Boyd 
29*e92a4047SStephen Boyd /* These types correspond to unique register layouts. */
30*e92a4047SStephen Boyd enum spmi_regulator_logical_type {
31*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_SMPS,
32*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_LDO,
33*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_VS,
34*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_BOOST,
35*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS,
36*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP,
37*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO,
38*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
39*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
40*e92a4047SStephen Boyd 	SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
41*e92a4047SStephen Boyd };
42*e92a4047SStephen Boyd 
43*e92a4047SStephen Boyd enum spmi_regulator_type {
44*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_BUCK		= 0x03,
45*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_LDO			= 0x04,
46*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_VS			= 0x05,
47*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_BOOST		= 0x1b,
48*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_FTS			= 0x1c,
49*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_BOOST_BYP		= 0x1f,
50*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_ULT_LDO		= 0x21,
51*e92a4047SStephen Boyd 	SPMI_REGULATOR_TYPE_ULT_BUCK		= 0x22,
52*e92a4047SStephen Boyd };
53*e92a4047SStephen Boyd 
54*e92a4047SStephen Boyd enum spmi_regulator_subtype {
55*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_GP_CTL		= 0x08,
56*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_RF_CTL		= 0x09,
57*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N50		= 0x01,
58*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N150		= 0x02,
59*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N300		= 0x03,
60*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N600		= 0x04,
61*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N1200		= 0x05,
62*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N600_ST		= 0x06,
63*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N1200_ST		= 0x07,
64*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N900_ST		= 0x14,
65*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_N300_ST		= 0x15,
66*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_P50		= 0x08,
67*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_P150		= 0x09,
68*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_P300		= 0x0a,
69*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_P600		= 0x0b,
70*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_P1200		= 0x0c,
71*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LN		= 0x10,
72*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV_P50		= 0x28,
73*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV_P150		= 0x29,
74*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV_P300		= 0x2a,
75*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV_P600		= 0x2b,
76*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV_P1200		= 0x2c,
77*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV_P450		= 0x2d,
78*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV100		= 0x01,
79*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_LV300		= 0x02,
80*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_MV300		= 0x08,
81*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_MV500		= 0x09,
82*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_HDMI		= 0x10,
83*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_OTG		= 0x11,
84*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_5V_BOOST		= 0x01,
85*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_FTS_CTL		= 0x08,
86*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL	= 0x09,
87*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_BB_2A		= 0x01,
88*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1	= 0x0d,
89*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2	= 0x0e,
90*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3	= 0x0f,
91*e92a4047SStephen Boyd 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4	= 0x10,
92*e92a4047SStephen Boyd };
93*e92a4047SStephen Boyd 
94*e92a4047SStephen Boyd enum spmi_common_regulator_registers {
95*e92a4047SStephen Boyd 	SPMI_COMMON_REG_DIG_MAJOR_REV		= 0x01,
96*e92a4047SStephen Boyd 	SPMI_COMMON_REG_TYPE			= 0x04,
97*e92a4047SStephen Boyd 	SPMI_COMMON_REG_SUBTYPE			= 0x05,
98*e92a4047SStephen Boyd 	SPMI_COMMON_REG_VOLTAGE_RANGE		= 0x40,
99*e92a4047SStephen Boyd 	SPMI_COMMON_REG_VOLTAGE_SET		= 0x41,
100*e92a4047SStephen Boyd 	SPMI_COMMON_REG_MODE			= 0x45,
101*e92a4047SStephen Boyd 	SPMI_COMMON_REG_ENABLE			= 0x46,
102*e92a4047SStephen Boyd 	SPMI_COMMON_REG_PULL_DOWN		= 0x48,
103*e92a4047SStephen Boyd 	SPMI_COMMON_REG_SOFT_START		= 0x4c,
104*e92a4047SStephen Boyd 	SPMI_COMMON_REG_STEP_CTRL		= 0x61,
105*e92a4047SStephen Boyd };
106*e92a4047SStephen Boyd 
107*e92a4047SStephen Boyd enum spmi_vs_registers {
108*e92a4047SStephen Boyd 	SPMI_VS_REG_OCP				= 0x4a,
109*e92a4047SStephen Boyd 	SPMI_VS_REG_SOFT_START			= 0x4c,
110*e92a4047SStephen Boyd };
111*e92a4047SStephen Boyd 
112*e92a4047SStephen Boyd enum spmi_boost_registers {
113*e92a4047SStephen Boyd 	SPMI_BOOST_REG_CURRENT_LIMIT		= 0x4a,
114*e92a4047SStephen Boyd };
115*e92a4047SStephen Boyd 
116*e92a4047SStephen Boyd enum spmi_boost_byp_registers {
117*e92a4047SStephen Boyd 	SPMI_BOOST_BYP_REG_CURRENT_LIMIT	= 0x4b,
118*e92a4047SStephen Boyd };
119*e92a4047SStephen Boyd 
120*e92a4047SStephen Boyd /* Used for indexing into ctrl_reg.  These are offets from 0x40 */
121*e92a4047SStephen Boyd enum spmi_common_control_register_index {
122*e92a4047SStephen Boyd 	SPMI_COMMON_IDX_VOLTAGE_RANGE		= 0,
123*e92a4047SStephen Boyd 	SPMI_COMMON_IDX_VOLTAGE_SET		= 1,
124*e92a4047SStephen Boyd 	SPMI_COMMON_IDX_MODE			= 5,
125*e92a4047SStephen Boyd 	SPMI_COMMON_IDX_ENABLE			= 6,
126*e92a4047SStephen Boyd };
127*e92a4047SStephen Boyd 
128*e92a4047SStephen Boyd /* Common regulator control register layout */
129*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE_MASK			0x80
130*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE			0x80
131*e92a4047SStephen Boyd #define SPMI_COMMON_DISABLE			0x00
132*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK	0x08
133*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK	0x04
134*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK	0x02
135*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK	0x01
136*e92a4047SStephen Boyd #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK	0x0f
137*e92a4047SStephen Boyd 
138*e92a4047SStephen Boyd /* Common regulator mode register layout */
139*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_HPM_MASK		0x80
140*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_AUTO_MASK		0x40
141*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_BYPASS_MASK		0x20
142*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK	0x10
143*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK	0x08
144*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK	0x04
145*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK	0x02
146*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK	0x01
147*e92a4047SStephen Boyd #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK	0x1f
148*e92a4047SStephen Boyd 
149*e92a4047SStephen Boyd /* Common regulator pull down control register layout */
150*e92a4047SStephen Boyd #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK	0x80
151*e92a4047SStephen Boyd 
152*e92a4047SStephen Boyd /* LDO regulator current limit control register layout */
153*e92a4047SStephen Boyd #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK	0x80
154*e92a4047SStephen Boyd 
155*e92a4047SStephen Boyd /* LDO regulator soft start control register layout */
156*e92a4047SStephen Boyd #define SPMI_LDO_SOFT_START_ENABLE_MASK		0x80
157*e92a4047SStephen Boyd 
158*e92a4047SStephen Boyd /* VS regulator over current protection control register layout */
159*e92a4047SStephen Boyd #define SPMI_VS_OCP_OVERRIDE			0x01
160*e92a4047SStephen Boyd #define SPMI_VS_OCP_NO_OVERRIDE			0x00
161*e92a4047SStephen Boyd 
162*e92a4047SStephen Boyd /* VS regulator soft start control register layout */
163*e92a4047SStephen Boyd #define SPMI_VS_SOFT_START_ENABLE_MASK		0x80
164*e92a4047SStephen Boyd #define SPMI_VS_SOFT_START_SEL_MASK		0x03
165*e92a4047SStephen Boyd 
166*e92a4047SStephen Boyd /* Boost regulator current limit control register layout */
167*e92a4047SStephen Boyd #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK	0x80
168*e92a4047SStephen Boyd #define SPMI_BOOST_CURRENT_LIMIT_MASK		0x07
169*e92a4047SStephen Boyd 
170*e92a4047SStephen Boyd #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES		10
171*e92a4047SStephen Boyd #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS	30
172*e92a4047SStephen Boyd #define SPMI_VS_OCP_FALL_DELAY_US		90
173*e92a4047SStephen Boyd #define SPMI_VS_OCP_FAULT_DELAY_US		20000
174*e92a4047SStephen Boyd 
175*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK		0x18
176*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT	3
177*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK	0x07
178*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT	0
179*e92a4047SStephen Boyd 
180*e92a4047SStephen Boyd /* Clock rate in kHz of the FTSMPS regulator reference clock. */
181*e92a4047SStephen Boyd #define SPMI_FTSMPS_CLOCK_RATE		19200
182*e92a4047SStephen Boyd 
183*e92a4047SStephen Boyd /* Minimum voltage stepper delay for each step. */
184*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_DELAY		8
185*e92a4047SStephen Boyd 
186*e92a4047SStephen Boyd /*
187*e92a4047SStephen Boyd  * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to
188*e92a4047SStephen Boyd  * adjust the step rate in order to account for oscillator variance.
189*e92a4047SStephen Boyd  */
190*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_MARGIN_NUM	4
191*e92a4047SStephen Boyd #define SPMI_FTSMPS_STEP_MARGIN_DEN	5
192*e92a4047SStephen Boyd 
193*e92a4047SStephen Boyd /*
194*e92a4047SStephen Boyd  * This voltage in uV is returned by get_voltage functions when there is no way
195*e92a4047SStephen Boyd  * to determine the current voltage level.  It is needed because the regulator
196*e92a4047SStephen Boyd  * framework treats a 0 uV voltage as an error.
197*e92a4047SStephen Boyd  */
198*e92a4047SStephen Boyd #define VOLTAGE_UNKNOWN 1
199*e92a4047SStephen Boyd 
200*e92a4047SStephen Boyd /* VSET value to decide the range of ULT SMPS */
201*e92a4047SStephen Boyd #define ULT_SMPS_RANGE_SPLIT 0x60
202*e92a4047SStephen Boyd 
203*e92a4047SStephen Boyd /**
204*e92a4047SStephen Boyd  * struct spmi_voltage_range - regulator set point voltage mapping description
205*e92a4047SStephen Boyd  * @min_uV:		Minimum programmable output voltage resulting from
206*e92a4047SStephen Boyd  *			set point register value 0x00
207*e92a4047SStephen Boyd  * @max_uV:		Maximum programmable output voltage
208*e92a4047SStephen Boyd  * @step_uV:		Output voltage increase resulting from the set point
209*e92a4047SStephen Boyd  *			register value increasing by 1
210*e92a4047SStephen Boyd  * @set_point_min_uV:	Minimum allowed voltage
211*e92a4047SStephen Boyd  * @set_point_max_uV:	Maximum allowed voltage.  This may be tweaked in order
212*e92a4047SStephen Boyd  *			to pick which range should be used in the case of
213*e92a4047SStephen Boyd  *			overlapping set points.
214*e92a4047SStephen Boyd  * @n_voltages:		Number of preferred voltage set points present in this
215*e92a4047SStephen Boyd  *			range
216*e92a4047SStephen Boyd  * @range_sel:		Voltage range register value corresponding to this range
217*e92a4047SStephen Boyd  *
218*e92a4047SStephen Boyd  * The following relationships must be true for the values used in this struct:
219*e92a4047SStephen Boyd  * (max_uV - min_uV) % step_uV == 0
220*e92a4047SStephen Boyd  * (set_point_min_uV - min_uV) % step_uV == 0*
221*e92a4047SStephen Boyd  * (set_point_max_uV - min_uV) % step_uV == 0*
222*e92a4047SStephen Boyd  * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
223*e92a4047SStephen Boyd  *
224*e92a4047SStephen Boyd  * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to
225*e92a4047SStephen Boyd  * specify that the voltage range has meaning, but is not preferred.
226*e92a4047SStephen Boyd  */
227*e92a4047SStephen Boyd struct spmi_voltage_range {
228*e92a4047SStephen Boyd 	int					min_uV;
229*e92a4047SStephen Boyd 	int					max_uV;
230*e92a4047SStephen Boyd 	int					step_uV;
231*e92a4047SStephen Boyd 	int					set_point_min_uV;
232*e92a4047SStephen Boyd 	int					set_point_max_uV;
233*e92a4047SStephen Boyd 	unsigned				n_voltages;
234*e92a4047SStephen Boyd 	u8					range_sel;
235*e92a4047SStephen Boyd };
236*e92a4047SStephen Boyd 
237*e92a4047SStephen Boyd /*
238*e92a4047SStephen Boyd  * The ranges specified in the spmi_voltage_set_points struct must be listed
239*e92a4047SStephen Boyd  * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV.
240*e92a4047SStephen Boyd  */
241*e92a4047SStephen Boyd struct spmi_voltage_set_points {
242*e92a4047SStephen Boyd 	struct spmi_voltage_range		*range;
243*e92a4047SStephen Boyd 	int					count;
244*e92a4047SStephen Boyd 	unsigned				n_voltages;
245*e92a4047SStephen Boyd };
246*e92a4047SStephen Boyd 
247*e92a4047SStephen Boyd struct spmi_regulator {
248*e92a4047SStephen Boyd 	struct regulator_desc			desc;
249*e92a4047SStephen Boyd 	struct device				*dev;
250*e92a4047SStephen Boyd 	struct delayed_work			ocp_work;
251*e92a4047SStephen Boyd 	struct regmap				*regmap;
252*e92a4047SStephen Boyd 	struct spmi_voltage_set_points		*set_points;
253*e92a4047SStephen Boyd 	enum spmi_regulator_logical_type	logical_type;
254*e92a4047SStephen Boyd 	int					ocp_irq;
255*e92a4047SStephen Boyd 	int					ocp_count;
256*e92a4047SStephen Boyd 	int					ocp_max_retries;
257*e92a4047SStephen Boyd 	int					ocp_retry_delay_ms;
258*e92a4047SStephen Boyd 	int					hpm_min_load;
259*e92a4047SStephen Boyd 	int					slew_rate;
260*e92a4047SStephen Boyd 	ktime_t					vs_enable_time;
261*e92a4047SStephen Boyd 	u16					base;
262*e92a4047SStephen Boyd 	struct list_head			node;
263*e92a4047SStephen Boyd };
264*e92a4047SStephen Boyd 
265*e92a4047SStephen Boyd struct spmi_regulator_mapping {
266*e92a4047SStephen Boyd 	enum spmi_regulator_type		type;
267*e92a4047SStephen Boyd 	enum spmi_regulator_subtype		subtype;
268*e92a4047SStephen Boyd 	enum spmi_regulator_logical_type	logical_type;
269*e92a4047SStephen Boyd 	u32					revision_min;
270*e92a4047SStephen Boyd 	u32					revision_max;
271*e92a4047SStephen Boyd 	struct regulator_ops			*ops;
272*e92a4047SStephen Boyd 	struct spmi_voltage_set_points		*set_points;
273*e92a4047SStephen Boyd 	int					hpm_min_load;
274*e92a4047SStephen Boyd };
275*e92a4047SStephen Boyd 
276*e92a4047SStephen Boyd struct spmi_regulator_data {
277*e92a4047SStephen Boyd 	const char			*name;
278*e92a4047SStephen Boyd 	u16				base;
279*e92a4047SStephen Boyd 	const char			*supply;
280*e92a4047SStephen Boyd 	const char			*ocp;
281*e92a4047SStephen Boyd 	u16				force_type;
282*e92a4047SStephen Boyd };
283*e92a4047SStephen Boyd 
284*e92a4047SStephen Boyd #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \
285*e92a4047SStephen Boyd 		      _logical_type, _ops_val, _set_points_val, _hpm_min_load) \
286*e92a4047SStephen Boyd 	{ \
287*e92a4047SStephen Boyd 		.type		= SPMI_REGULATOR_TYPE_##_type, \
288*e92a4047SStephen Boyd 		.subtype	= SPMI_REGULATOR_SUBTYPE_##_subtype, \
289*e92a4047SStephen Boyd 		.revision_min	= _dig_major_min, \
290*e92a4047SStephen Boyd 		.revision_max	= _dig_major_max, \
291*e92a4047SStephen Boyd 		.logical_type	= SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \
292*e92a4047SStephen Boyd 		.ops		= &spmi_##_ops_val##_ops, \
293*e92a4047SStephen Boyd 		.set_points	= &_set_points_val##_set_points, \
294*e92a4047SStephen Boyd 		.hpm_min_load	= _hpm_min_load, \
295*e92a4047SStephen Boyd 	}
296*e92a4047SStephen Boyd 
297*e92a4047SStephen Boyd #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \
298*e92a4047SStephen Boyd 	{ \
299*e92a4047SStephen Boyd 		.type		= SPMI_REGULATOR_TYPE_VS, \
300*e92a4047SStephen Boyd 		.subtype	= SPMI_REGULATOR_SUBTYPE_##_subtype, \
301*e92a4047SStephen Boyd 		.revision_min	= _dig_major_min, \
302*e92a4047SStephen Boyd 		.revision_max	= _dig_major_max, \
303*e92a4047SStephen Boyd 		.logical_type	= SPMI_REGULATOR_LOGICAL_TYPE_VS, \
304*e92a4047SStephen Boyd 		.ops		= &spmi_vs_ops, \
305*e92a4047SStephen Boyd 	}
306*e92a4047SStephen Boyd 
307*e92a4047SStephen Boyd #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \
308*e92a4047SStephen Boyd 			_set_point_max_uV, _max_uV, _step_uV) \
309*e92a4047SStephen Boyd 	{ \
310*e92a4047SStephen Boyd 		.min_uV			= _min_uV, \
311*e92a4047SStephen Boyd 		.max_uV			= _max_uV, \
312*e92a4047SStephen Boyd 		.set_point_min_uV	= _set_point_min_uV, \
313*e92a4047SStephen Boyd 		.set_point_max_uV	= _set_point_max_uV, \
314*e92a4047SStephen Boyd 		.step_uV		= _step_uV, \
315*e92a4047SStephen Boyd 		.range_sel		= _range_sel, \
316*e92a4047SStephen Boyd 	}
317*e92a4047SStephen Boyd 
318*e92a4047SStephen Boyd #define DEFINE_SPMI_SET_POINTS(name) \
319*e92a4047SStephen Boyd struct spmi_voltage_set_points name##_set_points = { \
320*e92a4047SStephen Boyd 	.range	= name##_ranges, \
321*e92a4047SStephen Boyd 	.count	= ARRAY_SIZE(name##_ranges), \
322*e92a4047SStephen Boyd }
323*e92a4047SStephen Boyd 
324*e92a4047SStephen Boyd /*
325*e92a4047SStephen Boyd  * These tables contain the physically available PMIC regulator voltage setpoint
326*e92a4047SStephen Boyd  * ranges.  Where two ranges overlap in hardware, one of the ranges is trimmed
327*e92a4047SStephen Boyd  * to ensure that the setpoints available to software are monotonically
328*e92a4047SStephen Boyd  * increasing and unique.  The set_voltage callback functions expect these
329*e92a4047SStephen Boyd  * properties to hold.
330*e92a4047SStephen Boyd  */
331*e92a4047SStephen Boyd static struct spmi_voltage_range pldo_ranges[] = {
332*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
333*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000),
334*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000),
335*e92a4047SStephen Boyd };
336*e92a4047SStephen Boyd 
337*e92a4047SStephen Boyd static struct spmi_voltage_range nldo1_ranges[] = {
338*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
339*e92a4047SStephen Boyd };
340*e92a4047SStephen Boyd 
341*e92a4047SStephen Boyd static struct spmi_voltage_range nldo2_ranges[] = {
342*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,  375000,       0,       0, 1537500, 12500),
343*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1,  375000,  375000,  768750,  768750,  6250),
344*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(2,  750000,  775000, 1537500, 1537500, 12500),
345*e92a4047SStephen Boyd };
346*e92a4047SStephen Boyd 
347*e92a4047SStephen Boyd static struct spmi_voltage_range nldo3_ranges[] = {
348*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
349*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1,  375000,       0,       0, 1537500, 12500),
350*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(2,  750000,       0,       0, 1537500, 12500),
351*e92a4047SStephen Boyd };
352*e92a4047SStephen Boyd 
353*e92a4047SStephen Boyd static struct spmi_voltage_range ln_ldo_ranges[] = {
354*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1,  690000,  690000, 1110000, 1110000, 60000),
355*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000),
356*e92a4047SStephen Boyd };
357*e92a4047SStephen Boyd 
358*e92a4047SStephen Boyd static struct spmi_voltage_range smps_ranges[] = {
359*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
360*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000),
361*e92a4047SStephen Boyd };
362*e92a4047SStephen Boyd 
363*e92a4047SStephen Boyd static struct spmi_voltage_range ftsmps_ranges[] = {
364*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,       0,  350000, 1275000, 1275000,  5000),
365*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1,       0, 1280000, 2040000, 2040000, 10000),
366*e92a4047SStephen Boyd };
367*e92a4047SStephen Boyd 
368*e92a4047SStephen Boyd static struct spmi_voltage_range ftsmps2p5_ranges[] = {
369*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,   80000,  350000, 1355000, 1355000,  5000),
370*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1,  160000, 1360000, 2200000, 2200000, 10000),
371*e92a4047SStephen Boyd };
372*e92a4047SStephen Boyd 
373*e92a4047SStephen Boyd static struct spmi_voltage_range boost_ranges[] = {
374*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
375*e92a4047SStephen Boyd };
376*e92a4047SStephen Boyd 
377*e92a4047SStephen Boyd static struct spmi_voltage_range boost_byp_ranges[] = {
378*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000),
379*e92a4047SStephen Boyd };
380*e92a4047SStephen Boyd 
381*e92a4047SStephen Boyd static struct spmi_voltage_range ult_lo_smps_ranges[] = {
382*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
383*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(1,  750000,       0,       0, 1525000, 25000),
384*e92a4047SStephen Boyd };
385*e92a4047SStephen Boyd 
386*e92a4047SStephen Boyd static struct spmi_voltage_range ult_ho_smps_ranges[] = {
387*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000),
388*e92a4047SStephen Boyd };
389*e92a4047SStephen Boyd 
390*e92a4047SStephen Boyd static struct spmi_voltage_range ult_nldo_ranges[] = {
391*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
392*e92a4047SStephen Boyd };
393*e92a4047SStephen Boyd 
394*e92a4047SStephen Boyd static struct spmi_voltage_range ult_pldo_ranges[] = {
395*e92a4047SStephen Boyd 	SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
396*e92a4047SStephen Boyd };
397*e92a4047SStephen Boyd 
398*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(pldo);
399*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(nldo1);
400*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(nldo2);
401*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(nldo3);
402*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ln_ldo);
403*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(smps);
404*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ftsmps);
405*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
406*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(boost);
407*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(boost_byp);
408*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
409*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
410*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ult_nldo);
411*e92a4047SStephen Boyd static DEFINE_SPMI_SET_POINTS(ult_pldo);
412*e92a4047SStephen Boyd 
413*e92a4047SStephen Boyd static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
414*e92a4047SStephen Boyd 				 int len)
415*e92a4047SStephen Boyd {
416*e92a4047SStephen Boyd 	return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len);
417*e92a4047SStephen Boyd }
418*e92a4047SStephen Boyd 
419*e92a4047SStephen Boyd static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr,
420*e92a4047SStephen Boyd 				u8 *buf, int len)
421*e92a4047SStephen Boyd {
422*e92a4047SStephen Boyd 	return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len);
423*e92a4047SStephen Boyd }
424*e92a4047SStephen Boyd 
425*e92a4047SStephen Boyd static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val,
426*e92a4047SStephen Boyd 		u8 mask)
427*e92a4047SStephen Boyd {
428*e92a4047SStephen Boyd 	return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val);
429*e92a4047SStephen Boyd }
430*e92a4047SStephen Boyd 
431*e92a4047SStephen Boyd static int spmi_regulator_common_is_enabled(struct regulator_dev *rdev)
432*e92a4047SStephen Boyd {
433*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
434*e92a4047SStephen Boyd 	u8 reg;
435*e92a4047SStephen Boyd 
436*e92a4047SStephen Boyd 	spmi_vreg_read(vreg, SPMI_COMMON_REG_ENABLE, &reg, 1);
437*e92a4047SStephen Boyd 
438*e92a4047SStephen Boyd 	return (reg & SPMI_COMMON_ENABLE_MASK) == SPMI_COMMON_ENABLE;
439*e92a4047SStephen Boyd }
440*e92a4047SStephen Boyd 
441*e92a4047SStephen Boyd static int spmi_regulator_common_enable(struct regulator_dev *rdev)
442*e92a4047SStephen Boyd {
443*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
444*e92a4047SStephen Boyd 
445*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
446*e92a4047SStephen Boyd 		SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
447*e92a4047SStephen Boyd }
448*e92a4047SStephen Boyd 
449*e92a4047SStephen Boyd static int spmi_regulator_vs_enable(struct regulator_dev *rdev)
450*e92a4047SStephen Boyd {
451*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
452*e92a4047SStephen Boyd 
453*e92a4047SStephen Boyd 	if (vreg->ocp_irq) {
454*e92a4047SStephen Boyd 		vreg->ocp_count = 0;
455*e92a4047SStephen Boyd 		vreg->vs_enable_time = ktime_get();
456*e92a4047SStephen Boyd 	}
457*e92a4047SStephen Boyd 
458*e92a4047SStephen Boyd 	return spmi_regulator_common_enable(rdev);
459*e92a4047SStephen Boyd }
460*e92a4047SStephen Boyd 
461*e92a4047SStephen Boyd static int spmi_regulator_common_disable(struct regulator_dev *rdev)
462*e92a4047SStephen Boyd {
463*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
464*e92a4047SStephen Boyd 
465*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
466*e92a4047SStephen Boyd 		SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
467*e92a4047SStephen Boyd }
468*e92a4047SStephen Boyd 
469*e92a4047SStephen Boyd static int spmi_regulator_select_voltage(struct spmi_regulator *vreg,
470*e92a4047SStephen Boyd 		int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel,
471*e92a4047SStephen Boyd 		unsigned *selector)
472*e92a4047SStephen Boyd {
473*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range;
474*e92a4047SStephen Boyd 	int uV = min_uV;
475*e92a4047SStephen Boyd 	int lim_min_uV, lim_max_uV, i, range_id, range_max_uV;
476*e92a4047SStephen Boyd 
477*e92a4047SStephen Boyd 	/* Check if request voltage is outside of physically settable range. */
478*e92a4047SStephen Boyd 	lim_min_uV = vreg->set_points->range[0].set_point_min_uV;
479*e92a4047SStephen Boyd 	lim_max_uV =
480*e92a4047SStephen Boyd 	  vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV;
481*e92a4047SStephen Boyd 
482*e92a4047SStephen Boyd 	if (uV < lim_min_uV && max_uV >= lim_min_uV)
483*e92a4047SStephen Boyd 		uV = lim_min_uV;
484*e92a4047SStephen Boyd 
485*e92a4047SStephen Boyd 	if (uV < lim_min_uV || uV > lim_max_uV) {
486*e92a4047SStephen Boyd 		dev_err(vreg->dev,
487*e92a4047SStephen Boyd 			"request v=[%d, %d] is outside possible v=[%d, %d]\n",
488*e92a4047SStephen Boyd 			 min_uV, max_uV, lim_min_uV, lim_max_uV);
489*e92a4047SStephen Boyd 		return -EINVAL;
490*e92a4047SStephen Boyd 	}
491*e92a4047SStephen Boyd 
492*e92a4047SStephen Boyd 	/* Find the range which uV is inside of. */
493*e92a4047SStephen Boyd 	for (i = vreg->set_points->count - 1; i > 0; i--) {
494*e92a4047SStephen Boyd 		range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV;
495*e92a4047SStephen Boyd 		if (uV > range_max_uV && range_max_uV > 0)
496*e92a4047SStephen Boyd 			break;
497*e92a4047SStephen Boyd 	}
498*e92a4047SStephen Boyd 
499*e92a4047SStephen Boyd 	range_id = i;
500*e92a4047SStephen Boyd 	range = &vreg->set_points->range[range_id];
501*e92a4047SStephen Boyd 	*range_sel = range->range_sel;
502*e92a4047SStephen Boyd 
503*e92a4047SStephen Boyd 	/*
504*e92a4047SStephen Boyd 	 * Force uV to be an allowed set point by applying a ceiling function to
505*e92a4047SStephen Boyd 	 * the uV value.
506*e92a4047SStephen Boyd 	 */
507*e92a4047SStephen Boyd 	*voltage_sel = (uV - range->min_uV + range->step_uV - 1)
508*e92a4047SStephen Boyd 			/ range->step_uV;
509*e92a4047SStephen Boyd 	uV = *voltage_sel * range->step_uV + range->min_uV;
510*e92a4047SStephen Boyd 
511*e92a4047SStephen Boyd 	if (uV > max_uV) {
512*e92a4047SStephen Boyd 		dev_err(vreg->dev,
513*e92a4047SStephen Boyd 			"request v=[%d, %d] cannot be met by any set point; "
514*e92a4047SStephen Boyd 			"next set point: %d\n",
515*e92a4047SStephen Boyd 			min_uV, max_uV, uV);
516*e92a4047SStephen Boyd 		return -EINVAL;
517*e92a4047SStephen Boyd 	}
518*e92a4047SStephen Boyd 
519*e92a4047SStephen Boyd 	*selector = 0;
520*e92a4047SStephen Boyd 	for (i = 0; i < range_id; i++)
521*e92a4047SStephen Boyd 		*selector += vreg->set_points->range[i].n_voltages;
522*e92a4047SStephen Boyd 	*selector += (uV - range->set_point_min_uV) / range->step_uV;
523*e92a4047SStephen Boyd 
524*e92a4047SStephen Boyd 	return 0;
525*e92a4047SStephen Boyd }
526*e92a4047SStephen Boyd 
527*e92a4047SStephen Boyd static const struct spmi_voltage_range *
528*e92a4047SStephen Boyd spmi_regulator_find_range(struct spmi_regulator *vreg)
529*e92a4047SStephen Boyd {
530*e92a4047SStephen Boyd 	u8 range_sel;
531*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range, *end;
532*e92a4047SStephen Boyd 
533*e92a4047SStephen Boyd 	range = vreg->set_points->range;
534*e92a4047SStephen Boyd 	end = range + vreg->set_points->count;
535*e92a4047SStephen Boyd 
536*e92a4047SStephen Boyd 	spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1);
537*e92a4047SStephen Boyd 
538*e92a4047SStephen Boyd 	for (; range < end; range++)
539*e92a4047SStephen Boyd 		if (range->range_sel == range_sel)
540*e92a4047SStephen Boyd 			return range;
541*e92a4047SStephen Boyd 
542*e92a4047SStephen Boyd 	return NULL;
543*e92a4047SStephen Boyd }
544*e92a4047SStephen Boyd 
545*e92a4047SStephen Boyd static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg,
546*e92a4047SStephen Boyd 		int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel,
547*e92a4047SStephen Boyd 		unsigned *selector)
548*e92a4047SStephen Boyd {
549*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range;
550*e92a4047SStephen Boyd 	int uV = min_uV;
551*e92a4047SStephen Boyd 	int i;
552*e92a4047SStephen Boyd 
553*e92a4047SStephen Boyd 	range = spmi_regulator_find_range(vreg);
554*e92a4047SStephen Boyd 	if (!range)
555*e92a4047SStephen Boyd 		goto different_range;
556*e92a4047SStephen Boyd 
557*e92a4047SStephen Boyd 	if (uV < range->min_uV && max_uV >= range->min_uV)
558*e92a4047SStephen Boyd 		uV = range->min_uV;
559*e92a4047SStephen Boyd 
560*e92a4047SStephen Boyd 	if (uV < range->min_uV || uV > range->max_uV) {
561*e92a4047SStephen Boyd 		/* Current range doesn't support the requested voltage. */
562*e92a4047SStephen Boyd 		goto different_range;
563*e92a4047SStephen Boyd 	}
564*e92a4047SStephen Boyd 
565*e92a4047SStephen Boyd 	/*
566*e92a4047SStephen Boyd 	 * Force uV to be an allowed set point by applying a ceiling function to
567*e92a4047SStephen Boyd 	 * the uV value.
568*e92a4047SStephen Boyd 	 */
569*e92a4047SStephen Boyd 	*voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
570*e92a4047SStephen Boyd 	uV = *voltage_sel * range->step_uV + range->min_uV;
571*e92a4047SStephen Boyd 
572*e92a4047SStephen Boyd 	if (uV > max_uV) {
573*e92a4047SStephen Boyd 		/*
574*e92a4047SStephen Boyd 		 * No set point in the current voltage range is within the
575*e92a4047SStephen Boyd 		 * requested min_uV to max_uV range.
576*e92a4047SStephen Boyd 		 */
577*e92a4047SStephen Boyd 		goto different_range;
578*e92a4047SStephen Boyd 	}
579*e92a4047SStephen Boyd 
580*e92a4047SStephen Boyd 	*selector = 0;
581*e92a4047SStephen Boyd 	for (i = 0; i < vreg->set_points->count; i++) {
582*e92a4047SStephen Boyd 		if (uV >= vreg->set_points->range[i].set_point_min_uV
583*e92a4047SStephen Boyd 		    && uV <= vreg->set_points->range[i].set_point_max_uV)
584*e92a4047SStephen Boyd 			*selector +=
585*e92a4047SStephen Boyd 			    (uV - vreg->set_points->range[i].set_point_min_uV)
586*e92a4047SStephen Boyd 				/ vreg->set_points->range[i].step_uV;
587*e92a4047SStephen Boyd 			break;
588*e92a4047SStephen Boyd 
589*e92a4047SStephen Boyd 		*selector += vreg->set_points->range[i].n_voltages;
590*e92a4047SStephen Boyd 	}
591*e92a4047SStephen Boyd 
592*e92a4047SStephen Boyd 	if (*selector >= vreg->set_points->n_voltages)
593*e92a4047SStephen Boyd 		goto different_range;
594*e92a4047SStephen Boyd 
595*e92a4047SStephen Boyd 	return 0;
596*e92a4047SStephen Boyd 
597*e92a4047SStephen Boyd different_range:
598*e92a4047SStephen Boyd 	return spmi_regulator_select_voltage(vreg, min_uV, max_uV,
599*e92a4047SStephen Boyd 			range_sel, voltage_sel, selector);
600*e92a4047SStephen Boyd }
601*e92a4047SStephen Boyd 
602*e92a4047SStephen Boyd static int spmi_regulator_common_set_voltage(struct regulator_dev *rdev,
603*e92a4047SStephen Boyd 		int min_uV, int max_uV, unsigned *selector)
604*e92a4047SStephen Boyd {
605*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
606*e92a4047SStephen Boyd 	int ret;
607*e92a4047SStephen Boyd 	u8 buf[2];
608*e92a4047SStephen Boyd 	u8 range_sel, voltage_sel;
609*e92a4047SStephen Boyd 
610*e92a4047SStephen Boyd 	/*
611*e92a4047SStephen Boyd 	 * Favor staying in the current voltage range if possible.  This avoids
612*e92a4047SStephen Boyd 	 * voltage spikes that occur when changing the voltage range.
613*e92a4047SStephen Boyd 	 */
614*e92a4047SStephen Boyd 	ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV,
615*e92a4047SStephen Boyd 		&range_sel, &voltage_sel, selector);
616*e92a4047SStephen Boyd 	if (ret)
617*e92a4047SStephen Boyd 		return ret;
618*e92a4047SStephen Boyd 
619*e92a4047SStephen Boyd 	buf[0] = range_sel;
620*e92a4047SStephen Boyd 	buf[1] = voltage_sel;
621*e92a4047SStephen Boyd 	return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
622*e92a4047SStephen Boyd }
623*e92a4047SStephen Boyd 
624*e92a4047SStephen Boyd static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
625*e92a4047SStephen Boyd 		unsigned int old_selector, unsigned int new_selector)
626*e92a4047SStephen Boyd {
627*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
628*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range;
629*e92a4047SStephen Boyd 	int diff_uV;
630*e92a4047SStephen Boyd 
631*e92a4047SStephen Boyd 	range = spmi_regulator_find_range(vreg);
632*e92a4047SStephen Boyd 	if (!range)
633*e92a4047SStephen Boyd 		return -EINVAL;
634*e92a4047SStephen Boyd 
635*e92a4047SStephen Boyd 	diff_uV = abs(new_selector - old_selector) * range->step_uV;
636*e92a4047SStephen Boyd 
637*e92a4047SStephen Boyd 	return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
638*e92a4047SStephen Boyd }
639*e92a4047SStephen Boyd 
640*e92a4047SStephen Boyd static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev)
641*e92a4047SStephen Boyd {
642*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
643*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range;
644*e92a4047SStephen Boyd 	u8 voltage_sel;
645*e92a4047SStephen Boyd 
646*e92a4047SStephen Boyd 	spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
647*e92a4047SStephen Boyd 
648*e92a4047SStephen Boyd 	range = spmi_regulator_find_range(vreg);
649*e92a4047SStephen Boyd 	if (!range)
650*e92a4047SStephen Boyd 		return VOLTAGE_UNKNOWN;
651*e92a4047SStephen Boyd 
652*e92a4047SStephen Boyd 	return range->step_uV * voltage_sel + range->min_uV;
653*e92a4047SStephen Boyd }
654*e92a4047SStephen Boyd 
655*e92a4047SStephen Boyd static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev,
656*e92a4047SStephen Boyd 		int min_uV, int max_uV, unsigned *selector)
657*e92a4047SStephen Boyd {
658*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
659*e92a4047SStephen Boyd 	int ret;
660*e92a4047SStephen Boyd 	u8 range_sel, sel;
661*e92a4047SStephen Boyd 
662*e92a4047SStephen Boyd 	ret = spmi_regulator_select_voltage(vreg, min_uV, max_uV, &range_sel,
663*e92a4047SStephen Boyd 		&sel, selector);
664*e92a4047SStephen Boyd 	if (ret) {
665*e92a4047SStephen Boyd 		dev_err(vreg->dev, "could not set voltage, ret=%d\n", ret);
666*e92a4047SStephen Boyd 		return ret;
667*e92a4047SStephen Boyd 	}
668*e92a4047SStephen Boyd 
669*e92a4047SStephen Boyd 	/*
670*e92a4047SStephen Boyd 	 * Certain types of regulators do not have a range select register so
671*e92a4047SStephen Boyd 	 * only voltage set register needs to be written.
672*e92a4047SStephen Boyd 	 */
673*e92a4047SStephen Boyd 	return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1);
674*e92a4047SStephen Boyd }
675*e92a4047SStephen Boyd 
676*e92a4047SStephen Boyd static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev)
677*e92a4047SStephen Boyd {
678*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
679*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range = vreg->set_points->range;
680*e92a4047SStephen Boyd 	u8 voltage_sel;
681*e92a4047SStephen Boyd 
682*e92a4047SStephen Boyd 	spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
683*e92a4047SStephen Boyd 
684*e92a4047SStephen Boyd 	return range->step_uV * voltage_sel + range->min_uV;
685*e92a4047SStephen Boyd }
686*e92a4047SStephen Boyd 
687*e92a4047SStephen Boyd static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
688*e92a4047SStephen Boyd 		int min_uV, int max_uV, unsigned *selector)
689*e92a4047SStephen Boyd {
690*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
691*e92a4047SStephen Boyd 	int ret;
692*e92a4047SStephen Boyd 	u8 range_sel, voltage_sel;
693*e92a4047SStephen Boyd 
694*e92a4047SStephen Boyd 	/*
695*e92a4047SStephen Boyd 	 * Favor staying in the current voltage range if possible. This avoids
696*e92a4047SStephen Boyd 	 * voltage spikes that occur when changing the voltage range.
697*e92a4047SStephen Boyd 	 */
698*e92a4047SStephen Boyd 	ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV,
699*e92a4047SStephen Boyd 		&range_sel, &voltage_sel, selector);
700*e92a4047SStephen Boyd 	if (ret)
701*e92a4047SStephen Boyd 		return ret;
702*e92a4047SStephen Boyd 
703*e92a4047SStephen Boyd 	/*
704*e92a4047SStephen Boyd 	 * Calculate VSET based on range
705*e92a4047SStephen Boyd 	 * In case of range 0: voltage_sel is a 7 bit value, can be written
706*e92a4047SStephen Boyd 	 *			witout any modification.
707*e92a4047SStephen Boyd 	 * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to
708*e92a4047SStephen Boyd 	 *			[011].
709*e92a4047SStephen Boyd 	 */
710*e92a4047SStephen Boyd 	if (range_sel == 1)
711*e92a4047SStephen Boyd 		voltage_sel |= ULT_SMPS_RANGE_SPLIT;
712*e92a4047SStephen Boyd 
713*e92a4047SStephen Boyd 	ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET,
714*e92a4047SStephen Boyd 	       voltage_sel, 0xff);
715*e92a4047SStephen Boyd 	if (ret)
716*e92a4047SStephen Boyd 		return ret;
717*e92a4047SStephen Boyd 
718*e92a4047SStephen Boyd 	return 0;
719*e92a4047SStephen Boyd }
720*e92a4047SStephen Boyd 
721*e92a4047SStephen Boyd static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
722*e92a4047SStephen Boyd {
723*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
724*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range;
725*e92a4047SStephen Boyd 	u8 voltage_sel;
726*e92a4047SStephen Boyd 
727*e92a4047SStephen Boyd 	spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
728*e92a4047SStephen Boyd 
729*e92a4047SStephen Boyd 	range = spmi_regulator_find_range(vreg);
730*e92a4047SStephen Boyd 	if (!range)
731*e92a4047SStephen Boyd 		return VOLTAGE_UNKNOWN;
732*e92a4047SStephen Boyd 
733*e92a4047SStephen Boyd 	if (range->range_sel == 1)
734*e92a4047SStephen Boyd 		voltage_sel &= ~ULT_SMPS_RANGE_SPLIT;
735*e92a4047SStephen Boyd 
736*e92a4047SStephen Boyd 	return range->step_uV * voltage_sel + range->min_uV;
737*e92a4047SStephen Boyd }
738*e92a4047SStephen Boyd 
739*e92a4047SStephen Boyd static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
740*e92a4047SStephen Boyd 			unsigned selector)
741*e92a4047SStephen Boyd {
742*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
743*e92a4047SStephen Boyd 	int uV = 0;
744*e92a4047SStephen Boyd 	int i;
745*e92a4047SStephen Boyd 
746*e92a4047SStephen Boyd 	if (selector >= vreg->set_points->n_voltages)
747*e92a4047SStephen Boyd 		return 0;
748*e92a4047SStephen Boyd 
749*e92a4047SStephen Boyd 	for (i = 0; i < vreg->set_points->count; i++) {
750*e92a4047SStephen Boyd 		if (selector < vreg->set_points->range[i].n_voltages)
751*e92a4047SStephen Boyd 			uV = selector * vreg->set_points->range[i].step_uV
752*e92a4047SStephen Boyd 				+ vreg->set_points->range[i].set_point_min_uV;
753*e92a4047SStephen Boyd 			break;
754*e92a4047SStephen Boyd 
755*e92a4047SStephen Boyd 		selector -= vreg->set_points->range[i].n_voltages;
756*e92a4047SStephen Boyd 	}
757*e92a4047SStephen Boyd 
758*e92a4047SStephen Boyd 	return uV;
759*e92a4047SStephen Boyd }
760*e92a4047SStephen Boyd 
761*e92a4047SStephen Boyd static int
762*e92a4047SStephen Boyd spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
763*e92a4047SStephen Boyd {
764*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
765*e92a4047SStephen Boyd 	u8 mask = SPMI_COMMON_MODE_BYPASS_MASK;
766*e92a4047SStephen Boyd 	u8 val = 0;
767*e92a4047SStephen Boyd 
768*e92a4047SStephen Boyd 	if (enable)
769*e92a4047SStephen Boyd 		val = mask;
770*e92a4047SStephen Boyd 
771*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
772*e92a4047SStephen Boyd }
773*e92a4047SStephen Boyd 
774*e92a4047SStephen Boyd static int
775*e92a4047SStephen Boyd spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
776*e92a4047SStephen Boyd {
777*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
778*e92a4047SStephen Boyd 	u8 val;
779*e92a4047SStephen Boyd 	int ret;
780*e92a4047SStephen Boyd 
781*e92a4047SStephen Boyd 	ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1);
782*e92a4047SStephen Boyd 	*enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
783*e92a4047SStephen Boyd 
784*e92a4047SStephen Boyd 	return ret;
785*e92a4047SStephen Boyd }
786*e92a4047SStephen Boyd 
787*e92a4047SStephen Boyd static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
788*e92a4047SStephen Boyd {
789*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
790*e92a4047SStephen Boyd 	u8 reg;
791*e92a4047SStephen Boyd 
792*e92a4047SStephen Boyd 	spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
793*e92a4047SStephen Boyd 
794*e92a4047SStephen Boyd 	if (reg & SPMI_COMMON_MODE_HPM_MASK)
795*e92a4047SStephen Boyd 		return REGULATOR_MODE_NORMAL;
796*e92a4047SStephen Boyd 
797*e92a4047SStephen Boyd 	return REGULATOR_MODE_IDLE;
798*e92a4047SStephen Boyd }
799*e92a4047SStephen Boyd 
800*e92a4047SStephen Boyd static int
801*e92a4047SStephen Boyd spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
802*e92a4047SStephen Boyd {
803*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
804*e92a4047SStephen Boyd 	u8 mask = SPMI_COMMON_MODE_HPM_MASK;
805*e92a4047SStephen Boyd 	u8 val = 0;
806*e92a4047SStephen Boyd 
807*e92a4047SStephen Boyd 	if (mode == REGULATOR_MODE_NORMAL)
808*e92a4047SStephen Boyd 		val = mask;
809*e92a4047SStephen Boyd 
810*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
811*e92a4047SStephen Boyd }
812*e92a4047SStephen Boyd 
813*e92a4047SStephen Boyd static int
814*e92a4047SStephen Boyd spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
815*e92a4047SStephen Boyd {
816*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
817*e92a4047SStephen Boyd 	unsigned int mode;
818*e92a4047SStephen Boyd 
819*e92a4047SStephen Boyd 	if (load_uA >= vreg->hpm_min_load)
820*e92a4047SStephen Boyd 		mode = REGULATOR_MODE_NORMAL;
821*e92a4047SStephen Boyd 	else
822*e92a4047SStephen Boyd 		mode = REGULATOR_MODE_IDLE;
823*e92a4047SStephen Boyd 
824*e92a4047SStephen Boyd 	return spmi_regulator_common_set_mode(rdev, mode);
825*e92a4047SStephen Boyd }
826*e92a4047SStephen Boyd 
827*e92a4047SStephen Boyd static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
828*e92a4047SStephen Boyd {
829*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
830*e92a4047SStephen Boyd 	unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
831*e92a4047SStephen Boyd 
832*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN,
833*e92a4047SStephen Boyd 				     mask, mask);
834*e92a4047SStephen Boyd }
835*e92a4047SStephen Boyd 
836*e92a4047SStephen Boyd static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
837*e92a4047SStephen Boyd {
838*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
839*e92a4047SStephen Boyd 	unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK;
840*e92a4047SStephen Boyd 
841*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START,
842*e92a4047SStephen Boyd 				     mask, mask);
843*e92a4047SStephen Boyd }
844*e92a4047SStephen Boyd 
845*e92a4047SStephen Boyd static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA)
846*e92a4047SStephen Boyd {
847*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
848*e92a4047SStephen Boyd 	enum spmi_regulator_logical_type type = vreg->logical_type;
849*e92a4047SStephen Boyd 	unsigned int current_reg;
850*e92a4047SStephen Boyd 	u8 reg;
851*e92a4047SStephen Boyd 	u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK |
852*e92a4047SStephen Boyd 		  SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
853*e92a4047SStephen Boyd 	int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500;
854*e92a4047SStephen Boyd 
855*e92a4047SStephen Boyd 	if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST)
856*e92a4047SStephen Boyd 		current_reg = SPMI_BOOST_REG_CURRENT_LIMIT;
857*e92a4047SStephen Boyd 	else
858*e92a4047SStephen Boyd 		current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT;
859*e92a4047SStephen Boyd 
860*e92a4047SStephen Boyd 	if (ilim_uA > max || ilim_uA <= 0)
861*e92a4047SStephen Boyd 		return -EINVAL;
862*e92a4047SStephen Boyd 
863*e92a4047SStephen Boyd 	reg = (ilim_uA - 1) / 500;
864*e92a4047SStephen Boyd 	reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
865*e92a4047SStephen Boyd 
866*e92a4047SStephen Boyd 	return spmi_vreg_update_bits(vreg, current_reg, reg, mask);
867*e92a4047SStephen Boyd }
868*e92a4047SStephen Boyd 
869*e92a4047SStephen Boyd static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg)
870*e92a4047SStephen Boyd {
871*e92a4047SStephen Boyd 	int ret;
872*e92a4047SStephen Boyd 
873*e92a4047SStephen Boyd 	ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
874*e92a4047SStephen Boyd 		SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
875*e92a4047SStephen Boyd 
876*e92a4047SStephen Boyd 	vreg->vs_enable_time = ktime_get();
877*e92a4047SStephen Boyd 
878*e92a4047SStephen Boyd 	ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
879*e92a4047SStephen Boyd 		SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
880*e92a4047SStephen Boyd 
881*e92a4047SStephen Boyd 	return ret;
882*e92a4047SStephen Boyd }
883*e92a4047SStephen Boyd 
884*e92a4047SStephen Boyd static void spmi_regulator_vs_ocp_work(struct work_struct *work)
885*e92a4047SStephen Boyd {
886*e92a4047SStephen Boyd 	struct delayed_work *dwork = to_delayed_work(work);
887*e92a4047SStephen Boyd 	struct spmi_regulator *vreg
888*e92a4047SStephen Boyd 		= container_of(dwork, struct spmi_regulator, ocp_work);
889*e92a4047SStephen Boyd 
890*e92a4047SStephen Boyd 	spmi_regulator_vs_clear_ocp(vreg);
891*e92a4047SStephen Boyd }
892*e92a4047SStephen Boyd 
893*e92a4047SStephen Boyd static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data)
894*e92a4047SStephen Boyd {
895*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = data;
896*e92a4047SStephen Boyd 	ktime_t ocp_irq_time;
897*e92a4047SStephen Boyd 	s64 ocp_trigger_delay_us;
898*e92a4047SStephen Boyd 
899*e92a4047SStephen Boyd 	ocp_irq_time = ktime_get();
900*e92a4047SStephen Boyd 	ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time,
901*e92a4047SStephen Boyd 						vreg->vs_enable_time);
902*e92a4047SStephen Boyd 
903*e92a4047SStephen Boyd 	/*
904*e92a4047SStephen Boyd 	 * Reset the OCP count if there is a large delay between switch enable
905*e92a4047SStephen Boyd 	 * and when OCP triggers.  This is indicative of a hotplug event as
906*e92a4047SStephen Boyd 	 * opposed to a fault.
907*e92a4047SStephen Boyd 	 */
908*e92a4047SStephen Boyd 	if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US)
909*e92a4047SStephen Boyd 		vreg->ocp_count = 0;
910*e92a4047SStephen Boyd 
911*e92a4047SStephen Boyd 	/* Wait for switch output to settle back to 0 V after OCP triggered. */
912*e92a4047SStephen Boyd 	udelay(SPMI_VS_OCP_FALL_DELAY_US);
913*e92a4047SStephen Boyd 
914*e92a4047SStephen Boyd 	vreg->ocp_count++;
915*e92a4047SStephen Boyd 
916*e92a4047SStephen Boyd 	if (vreg->ocp_count == 1) {
917*e92a4047SStephen Boyd 		/* Immediately clear the over current condition. */
918*e92a4047SStephen Boyd 		spmi_regulator_vs_clear_ocp(vreg);
919*e92a4047SStephen Boyd 	} else if (vreg->ocp_count <= vreg->ocp_max_retries) {
920*e92a4047SStephen Boyd 		/* Schedule the over current clear task to run later. */
921*e92a4047SStephen Boyd 		schedule_delayed_work(&vreg->ocp_work,
922*e92a4047SStephen Boyd 			msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1);
923*e92a4047SStephen Boyd 	} else {
924*e92a4047SStephen Boyd 		dev_err(vreg->dev,
925*e92a4047SStephen Boyd 			"OCP triggered %d times; no further retries\n",
926*e92a4047SStephen Boyd 			vreg->ocp_count);
927*e92a4047SStephen Boyd 	}
928*e92a4047SStephen Boyd 
929*e92a4047SStephen Boyd 	return IRQ_HANDLED;
930*e92a4047SStephen Boyd }
931*e92a4047SStephen Boyd 
932*e92a4047SStephen Boyd static struct regulator_ops spmi_smps_ops = {
933*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
934*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
935*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
936*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_common_set_voltage,
937*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_common_get_voltage,
938*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
939*e92a4047SStephen Boyd 	.set_mode		= spmi_regulator_common_set_mode,
940*e92a4047SStephen Boyd 	.get_mode		= spmi_regulator_common_get_mode,
941*e92a4047SStephen Boyd 	.set_load		= spmi_regulator_common_set_load,
942*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
943*e92a4047SStephen Boyd };
944*e92a4047SStephen Boyd 
945*e92a4047SStephen Boyd static struct regulator_ops spmi_ldo_ops = {
946*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
947*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
948*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
949*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_common_set_voltage,
950*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_common_get_voltage,
951*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
952*e92a4047SStephen Boyd 	.set_mode		= spmi_regulator_common_set_mode,
953*e92a4047SStephen Boyd 	.get_mode		= spmi_regulator_common_get_mode,
954*e92a4047SStephen Boyd 	.set_load		= spmi_regulator_common_set_load,
955*e92a4047SStephen Boyd 	.set_bypass		= spmi_regulator_common_set_bypass,
956*e92a4047SStephen Boyd 	.get_bypass		= spmi_regulator_common_get_bypass,
957*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
958*e92a4047SStephen Boyd 	.set_soft_start		= spmi_regulator_common_set_soft_start,
959*e92a4047SStephen Boyd };
960*e92a4047SStephen Boyd 
961*e92a4047SStephen Boyd static struct regulator_ops spmi_ln_ldo_ops = {
962*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
963*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
964*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
965*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_common_set_voltage,
966*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_common_get_voltage,
967*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
968*e92a4047SStephen Boyd 	.set_bypass		= spmi_regulator_common_set_bypass,
969*e92a4047SStephen Boyd 	.get_bypass		= spmi_regulator_common_get_bypass,
970*e92a4047SStephen Boyd };
971*e92a4047SStephen Boyd 
972*e92a4047SStephen Boyd static struct regulator_ops spmi_vs_ops = {
973*e92a4047SStephen Boyd 	.enable			= spmi_regulator_vs_enable,
974*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
975*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
976*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
977*e92a4047SStephen Boyd 	.set_soft_start		= spmi_regulator_common_set_soft_start,
978*e92a4047SStephen Boyd };
979*e92a4047SStephen Boyd 
980*e92a4047SStephen Boyd static struct regulator_ops spmi_boost_ops = {
981*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
982*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
983*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
984*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_single_range_set_voltage,
985*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_single_range_get_voltage,
986*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
987*e92a4047SStephen Boyd 	.set_input_current_limit = spmi_regulator_set_ilim,
988*e92a4047SStephen Boyd };
989*e92a4047SStephen Boyd 
990*e92a4047SStephen Boyd static struct regulator_ops spmi_ftsmps_ops = {
991*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
992*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
993*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
994*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_common_set_voltage,
995*e92a4047SStephen Boyd 	.set_voltage_time_sel	= spmi_regulator_set_voltage_time_sel,
996*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_common_get_voltage,
997*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
998*e92a4047SStephen Boyd 	.set_mode		= spmi_regulator_common_set_mode,
999*e92a4047SStephen Boyd 	.get_mode		= spmi_regulator_common_get_mode,
1000*e92a4047SStephen Boyd 	.set_load		= spmi_regulator_common_set_load,
1001*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
1002*e92a4047SStephen Boyd };
1003*e92a4047SStephen Boyd 
1004*e92a4047SStephen Boyd static struct regulator_ops spmi_ult_lo_smps_ops = {
1005*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
1006*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
1007*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
1008*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_ult_lo_smps_set_voltage,
1009*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_ult_lo_smps_get_voltage,
1010*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
1011*e92a4047SStephen Boyd 	.set_mode		= spmi_regulator_common_set_mode,
1012*e92a4047SStephen Boyd 	.get_mode		= spmi_regulator_common_get_mode,
1013*e92a4047SStephen Boyd 	.set_load		= spmi_regulator_common_set_load,
1014*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
1015*e92a4047SStephen Boyd };
1016*e92a4047SStephen Boyd 
1017*e92a4047SStephen Boyd static struct regulator_ops spmi_ult_ho_smps_ops = {
1018*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
1019*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
1020*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
1021*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_single_range_set_voltage,
1022*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_single_range_get_voltage,
1023*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
1024*e92a4047SStephen Boyd 	.set_mode		= spmi_regulator_common_set_mode,
1025*e92a4047SStephen Boyd 	.get_mode		= spmi_regulator_common_get_mode,
1026*e92a4047SStephen Boyd 	.set_load		= spmi_regulator_common_set_load,
1027*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
1028*e92a4047SStephen Boyd };
1029*e92a4047SStephen Boyd 
1030*e92a4047SStephen Boyd static struct regulator_ops spmi_ult_ldo_ops = {
1031*e92a4047SStephen Boyd 	.enable			= spmi_regulator_common_enable,
1032*e92a4047SStephen Boyd 	.disable		= spmi_regulator_common_disable,
1033*e92a4047SStephen Boyd 	.is_enabled		= spmi_regulator_common_is_enabled,
1034*e92a4047SStephen Boyd 	.set_voltage		= spmi_regulator_single_range_set_voltage,
1035*e92a4047SStephen Boyd 	.get_voltage		= spmi_regulator_single_range_get_voltage,
1036*e92a4047SStephen Boyd 	.list_voltage		= spmi_regulator_common_list_voltage,
1037*e92a4047SStephen Boyd 	.set_mode		= spmi_regulator_common_set_mode,
1038*e92a4047SStephen Boyd 	.get_mode		= spmi_regulator_common_get_mode,
1039*e92a4047SStephen Boyd 	.set_load		= spmi_regulator_common_set_load,
1040*e92a4047SStephen Boyd 	.set_bypass		= spmi_regulator_common_set_bypass,
1041*e92a4047SStephen Boyd 	.get_bypass		= spmi_regulator_common_get_bypass,
1042*e92a4047SStephen Boyd 	.set_pull_down		= spmi_regulator_common_set_pull_down,
1043*e92a4047SStephen Boyd 	.set_soft_start		= spmi_regulator_common_set_soft_start,
1044*e92a4047SStephen Boyd };
1045*e92a4047SStephen Boyd 
1046*e92a4047SStephen Boyd /* Maximum possible digital major revision value */
1047*e92a4047SStephen Boyd #define INF 0xFF
1048*e92a4047SStephen Boyd 
1049*e92a4047SStephen Boyd static const struct spmi_regulator_mapping supported_regulators[] = {
1050*e92a4047SStephen Boyd 	/*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
1051*e92a4047SStephen Boyd 	SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
1052*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N300,     0, INF, LDO,    ldo,    nldo1,   10000),
1053*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N600,     0,   0, LDO,    ldo,    nldo2,   10000),
1054*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N1200,    0,   0, LDO,    ldo,    nldo2,   10000),
1055*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N600,     1, INF, LDO,    ldo,    nldo3,   10000),
1056*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N1200,    1, INF, LDO,    ldo,    nldo3,   10000),
1057*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N600_ST,  0,   0, LDO,    ldo,    nldo2,   10000),
1058*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N1200_ST, 0,   0, LDO,    ldo,    nldo2,   10000),
1059*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N600_ST,  1, INF, LDO,    ldo,    nldo3,   10000),
1060*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   N1200_ST, 1, INF, LDO,    ldo,    nldo3,   10000),
1061*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   P50,      0, INF, LDO,    ldo,    pldo,     5000),
1062*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   P150,     0, INF, LDO,    ldo,    pldo,    10000),
1063*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   P300,     0, INF, LDO,    ldo,    pldo,    10000),
1064*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   P600,     0, INF, LDO,    ldo,    pldo,    10000),
1065*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   P1200,    0, INF, LDO,    ldo,    pldo,    10000),
1066*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   LN,       0, INF, LN_LDO, ln_ldo, ln_ldo,      0),
1067*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   LV_P50,   0, INF, LDO,    ldo,    pldo,     5000),
1068*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   LV_P150,  0, INF, LDO,    ldo,    pldo,    10000),
1069*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   LV_P300,  0, INF, LDO,    ldo,    pldo,    10000),
1070*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   LV_P600,  0, INF, LDO,    ldo,    pldo,    10000),
1071*e92a4047SStephen Boyd 	SPMI_VREG(LDO,   LV_P1200, 0, INF, LDO,    ldo,    pldo,    10000),
1072*e92a4047SStephen Boyd 	SPMI_VREG_VS(LV100,        0, INF),
1073*e92a4047SStephen Boyd 	SPMI_VREG_VS(LV300,        0, INF),
1074*e92a4047SStephen Boyd 	SPMI_VREG_VS(MV300,        0, INF),
1075*e92a4047SStephen Boyd 	SPMI_VREG_VS(MV500,        0, INF),
1076*e92a4047SStephen Boyd 	SPMI_VREG_VS(HDMI,         0, INF),
1077*e92a4047SStephen Boyd 	SPMI_VREG_VS(OTG,          0, INF),
1078*e92a4047SStephen Boyd 	SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST,  boost,  boost,       0),
1079*e92a4047SStephen Boyd 	SPMI_VREG(FTS,   FTS_CTL,  0, INF, FTSMPS, ftsmps, ftsmps, 100000),
1080*e92a4047SStephen Boyd 	SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1081*e92a4047SStephen Boyd 	SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
1082*e92a4047SStephen Boyd 	SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1083*e92a4047SStephen Boyd 						ult_lo_smps,   100000),
1084*e92a4047SStephen Boyd 	SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1085*e92a4047SStephen Boyd 						ult_lo_smps,   100000),
1086*e92a4047SStephen Boyd 	SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1087*e92a4047SStephen Boyd 						ult_lo_smps,   100000),
1088*e92a4047SStephen Boyd 	SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps,
1089*e92a4047SStephen Boyd 						ult_ho_smps,   100000),
1090*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1091*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1092*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1093*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1094*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, LV_P150,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1095*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, LV_P300,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1096*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, LV_P450,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1097*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, P600,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1098*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, P150,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1099*e92a4047SStephen Boyd 	SPMI_VREG(ULT_LDO, P50,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
1100*e92a4047SStephen Boyd };
1101*e92a4047SStephen Boyd 
1102*e92a4047SStephen Boyd static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
1103*e92a4047SStephen Boyd {
1104*e92a4047SStephen Boyd 	unsigned int n;
1105*e92a4047SStephen Boyd 	struct spmi_voltage_range *range = points->range;
1106*e92a4047SStephen Boyd 
1107*e92a4047SStephen Boyd 	for (; range < points->range + points->count; range++) {
1108*e92a4047SStephen Boyd 		n = 0;
1109*e92a4047SStephen Boyd 		if (range->set_point_max_uV) {
1110*e92a4047SStephen Boyd 			n = range->set_point_max_uV - range->set_point_min_uV;
1111*e92a4047SStephen Boyd 			n /= range->step_uV + 1;
1112*e92a4047SStephen Boyd 		}
1113*e92a4047SStephen Boyd 		range->n_voltages = n;
1114*e92a4047SStephen Boyd 		points->n_voltages += n;
1115*e92a4047SStephen Boyd 	}
1116*e92a4047SStephen Boyd }
1117*e92a4047SStephen Boyd 
1118*e92a4047SStephen Boyd static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type)
1119*e92a4047SStephen Boyd {
1120*e92a4047SStephen Boyd 	const struct spmi_regulator_mapping *mapping;
1121*e92a4047SStephen Boyd 	int ret, i;
1122*e92a4047SStephen Boyd 	u32 dig_major_rev;
1123*e92a4047SStephen Boyd 	u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1];
1124*e92a4047SStephen Boyd 	u8 type, subtype;
1125*e92a4047SStephen Boyd 
1126*e92a4047SStephen Boyd 	ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version,
1127*e92a4047SStephen Boyd 		ARRAY_SIZE(version));
1128*e92a4047SStephen Boyd 	if (ret) {
1129*e92a4047SStephen Boyd 		dev_err(vreg->dev, "could not read version registers\n");
1130*e92a4047SStephen Boyd 		return ret;
1131*e92a4047SStephen Boyd 	}
1132*e92a4047SStephen Boyd 	dig_major_rev	= version[SPMI_COMMON_REG_DIG_MAJOR_REV
1133*e92a4047SStephen Boyd 					- SPMI_COMMON_REG_DIG_MAJOR_REV];
1134*e92a4047SStephen Boyd 	if (!force_type) {
1135*e92a4047SStephen Boyd 		type		= version[SPMI_COMMON_REG_TYPE -
1136*e92a4047SStephen Boyd 					  SPMI_COMMON_REG_DIG_MAJOR_REV];
1137*e92a4047SStephen Boyd 		subtype		= version[SPMI_COMMON_REG_SUBTYPE -
1138*e92a4047SStephen Boyd 					  SPMI_COMMON_REG_DIG_MAJOR_REV];
1139*e92a4047SStephen Boyd 	} else {
1140*e92a4047SStephen Boyd 		type = force_type >> 8;
1141*e92a4047SStephen Boyd 		subtype = force_type;
1142*e92a4047SStephen Boyd 	}
1143*e92a4047SStephen Boyd 
1144*e92a4047SStephen Boyd 	for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
1145*e92a4047SStephen Boyd 		mapping = &supported_regulators[i];
1146*e92a4047SStephen Boyd 		if (mapping->type == type && mapping->subtype == subtype
1147*e92a4047SStephen Boyd 		    && mapping->revision_min <= dig_major_rev
1148*e92a4047SStephen Boyd 		    && mapping->revision_max >= dig_major_rev)
1149*e92a4047SStephen Boyd 			goto found;
1150*e92a4047SStephen Boyd 	}
1151*e92a4047SStephen Boyd 
1152*e92a4047SStephen Boyd 	dev_err(vreg->dev,
1153*e92a4047SStephen Boyd 		"unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n",
1154*e92a4047SStephen Boyd 		vreg->desc.name, type, subtype, dig_major_rev);
1155*e92a4047SStephen Boyd 
1156*e92a4047SStephen Boyd 	return -ENODEV;
1157*e92a4047SStephen Boyd 
1158*e92a4047SStephen Boyd found:
1159*e92a4047SStephen Boyd 	vreg->logical_type	= mapping->logical_type;
1160*e92a4047SStephen Boyd 	vreg->set_points	= mapping->set_points;
1161*e92a4047SStephen Boyd 	vreg->hpm_min_load	= mapping->hpm_min_load;
1162*e92a4047SStephen Boyd 	vreg->desc.ops		= mapping->ops;
1163*e92a4047SStephen Boyd 
1164*e92a4047SStephen Boyd 	if (mapping->set_points) {
1165*e92a4047SStephen Boyd 		if (!mapping->set_points->n_voltages)
1166*e92a4047SStephen Boyd 			spmi_calculate_num_voltages(mapping->set_points);
1167*e92a4047SStephen Boyd 		vreg->desc.n_voltages = mapping->set_points->n_voltages;
1168*e92a4047SStephen Boyd 	}
1169*e92a4047SStephen Boyd 
1170*e92a4047SStephen Boyd 	return 0;
1171*e92a4047SStephen Boyd }
1172*e92a4047SStephen Boyd 
1173*e92a4047SStephen Boyd static int spmi_regulator_ftsmps_init_slew_rate(struct spmi_regulator *vreg)
1174*e92a4047SStephen Boyd {
1175*e92a4047SStephen Boyd 	int ret;
1176*e92a4047SStephen Boyd 	u8 reg = 0;
1177*e92a4047SStephen Boyd 	int step, delay, slew_rate;
1178*e92a4047SStephen Boyd 	const struct spmi_voltage_range *range;
1179*e92a4047SStephen Boyd 
1180*e92a4047SStephen Boyd 	ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1181*e92a4047SStephen Boyd 	if (ret) {
1182*e92a4047SStephen Boyd 		dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1183*e92a4047SStephen Boyd 		return ret;
1184*e92a4047SStephen Boyd 	}
1185*e92a4047SStephen Boyd 
1186*e92a4047SStephen Boyd 	range = spmi_regulator_find_range(vreg);
1187*e92a4047SStephen Boyd 	if (!range)
1188*e92a4047SStephen Boyd 		return -EINVAL;
1189*e92a4047SStephen Boyd 
1190*e92a4047SStephen Boyd 	step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK;
1191*e92a4047SStephen Boyd 	step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT;
1192*e92a4047SStephen Boyd 
1193*e92a4047SStephen Boyd 	delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK;
1194*e92a4047SStephen Boyd 	delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT;
1195*e92a4047SStephen Boyd 
1196*e92a4047SStephen Boyd 	/* slew_rate has units of uV/us */
1197*e92a4047SStephen Boyd 	slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step);
1198*e92a4047SStephen Boyd 	slew_rate /= 1000 * (SPMI_FTSMPS_STEP_DELAY << delay);
1199*e92a4047SStephen Boyd 	slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM;
1200*e92a4047SStephen Boyd 	slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN;
1201*e92a4047SStephen Boyd 
1202*e92a4047SStephen Boyd 	/* Ensure that the slew rate is greater than 0 */
1203*e92a4047SStephen Boyd 	vreg->slew_rate = max(slew_rate, 1);
1204*e92a4047SStephen Boyd 
1205*e92a4047SStephen Boyd 	return ret;
1206*e92a4047SStephen Boyd }
1207*e92a4047SStephen Boyd 
1208*e92a4047SStephen Boyd static unsigned int spmi_regulator_of_map_mode(unsigned int mode)
1209*e92a4047SStephen Boyd {
1210*e92a4047SStephen Boyd 	if (mode)
1211*e92a4047SStephen Boyd 		return REGULATOR_MODE_NORMAL;
1212*e92a4047SStephen Boyd 
1213*e92a4047SStephen Boyd 	return REGULATOR_MODE_IDLE;
1214*e92a4047SStephen Boyd }
1215*e92a4047SStephen Boyd 
1216*e92a4047SStephen Boyd static int spmi_regulator_of_parse(struct device_node *node,
1217*e92a4047SStephen Boyd 			    const struct regulator_desc *desc,
1218*e92a4047SStephen Boyd 			    struct regulator_config *config)
1219*e92a4047SStephen Boyd {
1220*e92a4047SStephen Boyd 	struct spmi_regulator *vreg = config->driver_data;
1221*e92a4047SStephen Boyd 	struct device *dev = config->dev;
1222*e92a4047SStephen Boyd 	int ret;
1223*e92a4047SStephen Boyd 
1224*e92a4047SStephen Boyd 	vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;
1225*e92a4047SStephen Boyd 	vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;
1226*e92a4047SStephen Boyd 
1227*e92a4047SStephen Boyd 	if (vreg->logical_type == SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS) {
1228*e92a4047SStephen Boyd 		ret = spmi_regulator_ftsmps_init_slew_rate(vreg);
1229*e92a4047SStephen Boyd 		if (ret)
1230*e92a4047SStephen Boyd 			return ret;
1231*e92a4047SStephen Boyd 	}
1232*e92a4047SStephen Boyd 
1233*e92a4047SStephen Boyd 	if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS)
1234*e92a4047SStephen Boyd 		vreg->ocp_irq = 0;
1235*e92a4047SStephen Boyd 
1236*e92a4047SStephen Boyd 	if (vreg->ocp_irq) {
1237*e92a4047SStephen Boyd 		ret = devm_request_irq(dev, vreg->ocp_irq,
1238*e92a4047SStephen Boyd 			spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp",
1239*e92a4047SStephen Boyd 			vreg);
1240*e92a4047SStephen Boyd 		if (ret < 0) {
1241*e92a4047SStephen Boyd 			dev_err(dev, "failed to request irq %d, ret=%d\n",
1242*e92a4047SStephen Boyd 				vreg->ocp_irq, ret);
1243*e92a4047SStephen Boyd 			return ret;
1244*e92a4047SStephen Boyd 		}
1245*e92a4047SStephen Boyd 
1246*e92a4047SStephen Boyd 		INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work);
1247*e92a4047SStephen Boyd 	}
1248*e92a4047SStephen Boyd 
1249*e92a4047SStephen Boyd 	return 0;
1250*e92a4047SStephen Boyd }
1251*e92a4047SStephen Boyd 
1252*e92a4047SStephen Boyd static const struct spmi_regulator_data pm8941_regulators[] = {
1253*e92a4047SStephen Boyd 	{ "s1", 0x1400, "vdd_s1", },
1254*e92a4047SStephen Boyd 	{ "s2", 0x1700, "vdd_s2", },
1255*e92a4047SStephen Boyd 	{ "s3", 0x1a00, "vdd_s3", },
1256*e92a4047SStephen Boyd 	{ "l1", 0x4000, "vdd_l1_l3", },
1257*e92a4047SStephen Boyd 	{ "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
1258*e92a4047SStephen Boyd 	{ "l3", 0x4200, "vdd_l1_l3", },
1259*e92a4047SStephen Boyd 	{ "l4", 0x4300, "vdd_l4_l11", },
1260*e92a4047SStephen Boyd 	{ "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
1261*e92a4047SStephen Boyd 	{ "l6", 0x4500, "vdd_l6_l12_l14_l15", },
1262*e92a4047SStephen Boyd 	{ "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
1263*e92a4047SStephen Boyd 	{ "l8", 0x4700, "vdd_l8_l16_l18_19", },
1264*e92a4047SStephen Boyd 	{ "l9", 0x4800, "vdd_l9_l10_l17_l22", },
1265*e92a4047SStephen Boyd 	{ "l10", 0x4900, "vdd_l9_l10_l17_l22", },
1266*e92a4047SStephen Boyd 	{ "l11", 0x4a00, "vdd_l4_l11", },
1267*e92a4047SStephen Boyd 	{ "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
1268*e92a4047SStephen Boyd 	{ "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
1269*e92a4047SStephen Boyd 	{ "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
1270*e92a4047SStephen Boyd 	{ "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
1271*e92a4047SStephen Boyd 	{ "l16", 0x4f00, "vdd_l8_l16_l18_19", },
1272*e92a4047SStephen Boyd 	{ "l17", 0x5000, "vdd_l9_l10_l17_l22", },
1273*e92a4047SStephen Boyd 	{ "l18", 0x5100, "vdd_l8_l16_l18_19", },
1274*e92a4047SStephen Boyd 	{ "l19", 0x5200, "vdd_l8_l16_l18_19", },
1275*e92a4047SStephen Boyd 	{ "l20", 0x5300, "vdd_l13_l20_l23_l24", },
1276*e92a4047SStephen Boyd 	{ "l21", 0x5400, "vdd_l21", },
1277*e92a4047SStephen Boyd 	{ "l22", 0x5500, "vdd_l9_l10_l17_l22", },
1278*e92a4047SStephen Boyd 	{ "l23", 0x5600, "vdd_l13_l20_l23_l24", },
1279*e92a4047SStephen Boyd 	{ "l24", 0x5700, "vdd_l13_l20_l23_l24", },
1280*e92a4047SStephen Boyd 	{ "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
1281*e92a4047SStephen Boyd 	{ "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
1282*e92a4047SStephen Boyd 	{ "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
1283*e92a4047SStephen Boyd 	{ "mvs1", 0x8300, "vin_5vs", },
1284*e92a4047SStephen Boyd 	{ "mvs2", 0x8400, "vin_5vs", },
1285*e92a4047SStephen Boyd 	{ }
1286*e92a4047SStephen Boyd };
1287*e92a4047SStephen Boyd 
1288*e92a4047SStephen Boyd static const struct spmi_regulator_data pm8841_regulators[] = {
1289*e92a4047SStephen Boyd 	{ "s1", 0x1400, "vdd_s1", },
1290*e92a4047SStephen Boyd 	{ "s2", 0x1700, "vdd_s2", NULL, 0x1c08 },
1291*e92a4047SStephen Boyd 	{ "s3", 0x1a00, "vdd_s3", },
1292*e92a4047SStephen Boyd 	{ "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 },
1293*e92a4047SStephen Boyd 	{ "s5", 0x2000, "vdd_s5", NULL, 0x1c08 },
1294*e92a4047SStephen Boyd 	{ "s6", 0x2300, "vdd_s6", NULL, 0x1c08 },
1295*e92a4047SStephen Boyd 	{ "s7", 0x2600, "vdd_s7", NULL, 0x1c08 },
1296*e92a4047SStephen Boyd 	{ "s8", 0x2900, "vdd_s8", NULL, 0x1c08 },
1297*e92a4047SStephen Boyd 	{ }
1298*e92a4047SStephen Boyd };
1299*e92a4047SStephen Boyd 
1300*e92a4047SStephen Boyd static const struct spmi_regulator_data pm8916_regulators[] = {
1301*e92a4047SStephen Boyd 	{ "s1", 0x1400, "vdd_s1", },
1302*e92a4047SStephen Boyd 	{ "s2", 0x1700, "vdd_s2", },
1303*e92a4047SStephen Boyd 	{ "s3", 0x1a00, "vdd_s3", },
1304*e92a4047SStephen Boyd 	{ "s4", 0x1d00, "vdd_s4", },
1305*e92a4047SStephen Boyd 	{ "l1", 0x4000, "vdd_l1_l3", },
1306*e92a4047SStephen Boyd 	{ "l2", 0x4100, "vdd_l2", },
1307*e92a4047SStephen Boyd 	{ "l3", 0x4200, "vdd_l1_l3", },
1308*e92a4047SStephen Boyd 	{ "l4", 0x4300, "vdd_l4_l5_l6", },
1309*e92a4047SStephen Boyd 	{ "l5", 0x4400, "vdd_l4_l5_l6", },
1310*e92a4047SStephen Boyd 	{ "l6", 0x4500, "vdd_l4_l5_l6", },
1311*e92a4047SStephen Boyd 	{ "l7", 0x4600, "vdd_l7", },
1312*e92a4047SStephen Boyd 	{ "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", },
1313*e92a4047SStephen Boyd 	{ "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", },
1314*e92a4047SStephen Boyd 	{ "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", },
1315*e92a4047SStephen Boyd 	{ "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", },
1316*e92a4047SStephen Boyd 	{ "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", },
1317*e92a4047SStephen Boyd 	{ "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", },
1318*e92a4047SStephen Boyd 	{ "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", },
1319*e92a4047SStephen Boyd 	{ "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", },
1320*e92a4047SStephen Boyd 	{ "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", },
1321*e92a4047SStephen Boyd 	{ "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", },
1322*e92a4047SStephen Boyd 	{ "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", },
1323*e92a4047SStephen Boyd 	{ }
1324*e92a4047SStephen Boyd };
1325*e92a4047SStephen Boyd 
1326*e92a4047SStephen Boyd static const struct of_device_id qcom_spmi_regulator_match[] = {
1327*e92a4047SStephen Boyd 	{ .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
1328*e92a4047SStephen Boyd 	{ .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
1329*e92a4047SStephen Boyd 	{ .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
1330*e92a4047SStephen Boyd 	{ }
1331*e92a4047SStephen Boyd };
1332*e92a4047SStephen Boyd MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
1333*e92a4047SStephen Boyd 
1334*e92a4047SStephen Boyd static int qcom_spmi_regulator_probe(struct platform_device *pdev)
1335*e92a4047SStephen Boyd {
1336*e92a4047SStephen Boyd 	const struct spmi_regulator_data *reg;
1337*e92a4047SStephen Boyd 	const struct of_device_id *match;
1338*e92a4047SStephen Boyd 	struct regulator_config config = { };
1339*e92a4047SStephen Boyd 	struct regulator_dev *rdev;
1340*e92a4047SStephen Boyd 	struct spmi_regulator *vreg;
1341*e92a4047SStephen Boyd 	struct regmap *regmap;
1342*e92a4047SStephen Boyd 	const char *name;
1343*e92a4047SStephen Boyd 	struct device *dev = &pdev->dev;
1344*e92a4047SStephen Boyd 	int ret;
1345*e92a4047SStephen Boyd 	struct list_head *vreg_list;
1346*e92a4047SStephen Boyd 
1347*e92a4047SStephen Boyd 	vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL);
1348*e92a4047SStephen Boyd 	if (!vreg_list)
1349*e92a4047SStephen Boyd 		return -ENOMEM;
1350*e92a4047SStephen Boyd 	INIT_LIST_HEAD(vreg_list);
1351*e92a4047SStephen Boyd 	platform_set_drvdata(pdev, vreg_list);
1352*e92a4047SStephen Boyd 
1353*e92a4047SStephen Boyd 	regmap = dev_get_regmap(dev->parent, NULL);
1354*e92a4047SStephen Boyd 	if (!regmap)
1355*e92a4047SStephen Boyd 		return -ENODEV;
1356*e92a4047SStephen Boyd 
1357*e92a4047SStephen Boyd 	match = of_match_device(qcom_spmi_regulator_match, &pdev->dev);
1358*e92a4047SStephen Boyd 	if (!match)
1359*e92a4047SStephen Boyd 		return -ENODEV;
1360*e92a4047SStephen Boyd 
1361*e92a4047SStephen Boyd 	for (reg = match->data; reg->name; reg++) {
1362*e92a4047SStephen Boyd 		vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1363*e92a4047SStephen Boyd 		if (!vreg)
1364*e92a4047SStephen Boyd 			return -ENOMEM;
1365*e92a4047SStephen Boyd 
1366*e92a4047SStephen Boyd 		vreg->dev = dev;
1367*e92a4047SStephen Boyd 		vreg->base = reg->base;
1368*e92a4047SStephen Boyd 		vreg->regmap = regmap;
1369*e92a4047SStephen Boyd 
1370*e92a4047SStephen Boyd 		if (reg->ocp) {
1371*e92a4047SStephen Boyd 			vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp);
1372*e92a4047SStephen Boyd 			if (vreg->ocp_irq < 0) {
1373*e92a4047SStephen Boyd 				ret = vreg->ocp_irq;
1374*e92a4047SStephen Boyd 				goto err;
1375*e92a4047SStephen Boyd 			}
1376*e92a4047SStephen Boyd 		}
1377*e92a4047SStephen Boyd 
1378*e92a4047SStephen Boyd 		vreg->desc.id = -1;
1379*e92a4047SStephen Boyd 		vreg->desc.owner = THIS_MODULE;
1380*e92a4047SStephen Boyd 		vreg->desc.type = REGULATOR_VOLTAGE;
1381*e92a4047SStephen Boyd 		vreg->desc.name = name = reg->name;
1382*e92a4047SStephen Boyd 		vreg->desc.supply_name = reg->supply;
1383*e92a4047SStephen Boyd 		vreg->desc.of_match = reg->name;
1384*e92a4047SStephen Boyd 		vreg->desc.of_parse_cb = spmi_regulator_of_parse;
1385*e92a4047SStephen Boyd 		vreg->desc.of_map_mode = spmi_regulator_of_map_mode;
1386*e92a4047SStephen Boyd 
1387*e92a4047SStephen Boyd 		ret = spmi_regulator_match(vreg, reg->force_type);
1388*e92a4047SStephen Boyd 		if (ret)
1389*e92a4047SStephen Boyd 			goto err;
1390*e92a4047SStephen Boyd 
1391*e92a4047SStephen Boyd 		config.dev = dev;
1392*e92a4047SStephen Boyd 		config.driver_data = vreg;
1393*e92a4047SStephen Boyd 		rdev = devm_regulator_register(dev, &vreg->desc, &config);
1394*e92a4047SStephen Boyd 		if (IS_ERR(rdev)) {
1395*e92a4047SStephen Boyd 			dev_err(dev, "failed to register %s\n", name);
1396*e92a4047SStephen Boyd 			ret = PTR_ERR(rdev);
1397*e92a4047SStephen Boyd 			goto err;
1398*e92a4047SStephen Boyd 		}
1399*e92a4047SStephen Boyd 
1400*e92a4047SStephen Boyd 		INIT_LIST_HEAD(&vreg->node);
1401*e92a4047SStephen Boyd 		list_add(&vreg->node, vreg_list);
1402*e92a4047SStephen Boyd 	}
1403*e92a4047SStephen Boyd 
1404*e92a4047SStephen Boyd 	return 0;
1405*e92a4047SStephen Boyd 
1406*e92a4047SStephen Boyd err:
1407*e92a4047SStephen Boyd 	list_for_each_entry(vreg, vreg_list, node)
1408*e92a4047SStephen Boyd 		if (vreg->ocp_irq)
1409*e92a4047SStephen Boyd 			cancel_delayed_work_sync(&vreg->ocp_work);
1410*e92a4047SStephen Boyd 	return ret;
1411*e92a4047SStephen Boyd }
1412*e92a4047SStephen Boyd 
1413*e92a4047SStephen Boyd static int qcom_spmi_regulator_remove(struct platform_device *pdev)
1414*e92a4047SStephen Boyd {
1415*e92a4047SStephen Boyd 	struct spmi_regulator *vreg;
1416*e92a4047SStephen Boyd 	struct list_head *vreg_list = platform_get_drvdata(pdev);
1417*e92a4047SStephen Boyd 
1418*e92a4047SStephen Boyd 	list_for_each_entry(vreg, vreg_list, node)
1419*e92a4047SStephen Boyd 		if (vreg->ocp_irq)
1420*e92a4047SStephen Boyd 			cancel_delayed_work_sync(&vreg->ocp_work);
1421*e92a4047SStephen Boyd 
1422*e92a4047SStephen Boyd 	return 0;
1423*e92a4047SStephen Boyd }
1424*e92a4047SStephen Boyd 
1425*e92a4047SStephen Boyd static struct platform_driver qcom_spmi_regulator_driver = {
1426*e92a4047SStephen Boyd 	.driver		= {
1427*e92a4047SStephen Boyd 		.name	= "qcom-spmi-regulator",
1428*e92a4047SStephen Boyd 		.of_match_table = qcom_spmi_regulator_match,
1429*e92a4047SStephen Boyd 	},
1430*e92a4047SStephen Boyd 	.probe		= qcom_spmi_regulator_probe,
1431*e92a4047SStephen Boyd 	.remove		= qcom_spmi_regulator_remove,
1432*e92a4047SStephen Boyd };
1433*e92a4047SStephen Boyd module_platform_driver(qcom_spmi_regulator_driver);
1434*e92a4047SStephen Boyd 
1435*e92a4047SStephen Boyd MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver");
1436*e92a4047SStephen Boyd MODULE_LICENSE("GPL v2");
1437*e92a4047SStephen Boyd MODULE_ALIAS("platform:qcom-spmi-regulator");
1438