xref: /openbmc/linux/drivers/regulator/da9052-regulator.c (revision cd22a965c46e249843c049cbbfe3d9f12270ea2b)
108bf1c0aSAshish Jangam /*
208bf1c0aSAshish Jangam * da9052-regulator.c: Regulator driver for DA9052
308bf1c0aSAshish Jangam *
408bf1c0aSAshish Jangam * Copyright(c) 2011 Dialog Semiconductor Ltd.
508bf1c0aSAshish Jangam *
608bf1c0aSAshish Jangam * Author: David Dajun Chen <dchen@diasemi.com>
708bf1c0aSAshish Jangam *
808bf1c0aSAshish Jangam * This program is free software; you can redistribute it and/or modify
908bf1c0aSAshish Jangam * it under the terms of the GNU General Public License as published by
1008bf1c0aSAshish Jangam * the Free Software Foundation; either version 2 of the License, or
1108bf1c0aSAshish Jangam * (at your option) any later version.
1208bf1c0aSAshish Jangam *
1308bf1c0aSAshish Jangam */
1408bf1c0aSAshish Jangam 
1508bf1c0aSAshish Jangam #include <linux/module.h>
1608bf1c0aSAshish Jangam #include <linux/moduleparam.h>
1708bf1c0aSAshish Jangam #include <linux/init.h>
1808bf1c0aSAshish Jangam #include <linux/err.h>
1908bf1c0aSAshish Jangam #include <linux/platform_device.h>
2008bf1c0aSAshish Jangam #include <linux/regulator/driver.h>
2108bf1c0aSAshish Jangam #include <linux/regulator/machine.h>
2288c84c14SYing-Chun Liu (PaulLiu) #ifdef CONFIG_OF
23*cd22a965SMark Brown #include <linux/of.h>
2488c84c14SYing-Chun Liu (PaulLiu) #include <linux/regulator/of_regulator.h>
2588c84c14SYing-Chun Liu (PaulLiu) #endif
2608bf1c0aSAshish Jangam 
2708bf1c0aSAshish Jangam #include <linux/mfd/da9052/da9052.h>
2808bf1c0aSAshish Jangam #include <linux/mfd/da9052/reg.h>
2908bf1c0aSAshish Jangam #include <linux/mfd/da9052/pdata.h>
3008bf1c0aSAshish Jangam 
3108bf1c0aSAshish Jangam /* Buck step size */
3208bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_3uV_STEP		100000
3308bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV	24
3408bf1c0aSAshish Jangam #define DA9052_CONST_3uV			3000000
3508bf1c0aSAshish Jangam 
3608bf1c0aSAshish Jangam #define DA9052_MIN_UA		0
3708bf1c0aSAshish Jangam #define DA9052_MAX_UA		3
3808bf1c0aSAshish Jangam #define DA9052_CURRENT_RANGE	4
3908bf1c0aSAshish Jangam 
4008bf1c0aSAshish Jangam /* Bit masks */
4108bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_EVEN	0x0c
4208bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_ODD	0xc0
4308bf1c0aSAshish Jangam 
449210f05bSAxel Lin /* DA9052 REGULATOR IDs */
459210f05bSAxel Lin #define DA9052_ID_BUCK1		0
469210f05bSAxel Lin #define DA9052_ID_BUCK2		1
479210f05bSAxel Lin #define DA9052_ID_BUCK3		2
489210f05bSAxel Lin #define DA9052_ID_BUCK4		3
499210f05bSAxel Lin #define DA9052_ID_LDO1		4
509210f05bSAxel Lin #define DA9052_ID_LDO2		5
519210f05bSAxel Lin #define DA9052_ID_LDO3		6
529210f05bSAxel Lin #define DA9052_ID_LDO4		7
539210f05bSAxel Lin #define DA9052_ID_LDO5		8
549210f05bSAxel Lin #define DA9052_ID_LDO6		9
559210f05bSAxel Lin #define DA9052_ID_LDO7		10
569210f05bSAxel Lin #define DA9052_ID_LDO8		11
579210f05bSAxel Lin #define DA9052_ID_LDO9		12
589210f05bSAxel Lin #define DA9052_ID_LDO10		13
599210f05bSAxel Lin 
6008bf1c0aSAshish Jangam static const u32 da9052_current_limits[3][4] = {
6108bf1c0aSAshish Jangam 	{700000, 800000, 1000000, 1200000},	/* DA9052-BC BUCKs */
6208bf1c0aSAshish Jangam 	{1600000, 2000000, 2400000, 3000000},	/* DA9053-AA/Bx BUCK-CORE */
6308bf1c0aSAshish Jangam 	{800000, 1000000, 1200000, 1500000},	/* DA9053-AA/Bx BUCK-PRO,
6408bf1c0aSAshish Jangam 						 * BUCK-MEM and BUCK-PERI
6508bf1c0aSAshish Jangam 						*/
6608bf1c0aSAshish Jangam };
6708bf1c0aSAshish Jangam 
6808bf1c0aSAshish Jangam struct da9052_regulator_info {
6908bf1c0aSAshish Jangam 	struct regulator_desc reg_desc;
7008bf1c0aSAshish Jangam 	int step_uV;
7108bf1c0aSAshish Jangam 	int min_uV;
7208bf1c0aSAshish Jangam 	int max_uV;
7308bf1c0aSAshish Jangam 	unsigned char volt_shift;
7408bf1c0aSAshish Jangam 	unsigned char en_bit;
7508bf1c0aSAshish Jangam 	unsigned char activate_bit;
7608bf1c0aSAshish Jangam };
7708bf1c0aSAshish Jangam 
7808bf1c0aSAshish Jangam struct da9052_regulator {
7908bf1c0aSAshish Jangam 	struct da9052 *da9052;
8008bf1c0aSAshish Jangam 	struct da9052_regulator_info *info;
8108bf1c0aSAshish Jangam 	struct regulator_dev *rdev;
8208bf1c0aSAshish Jangam };
8308bf1c0aSAshish Jangam 
8408bf1c0aSAshish Jangam static int verify_range(struct da9052_regulator_info *info,
8508bf1c0aSAshish Jangam 			 int min_uV, int max_uV)
8608bf1c0aSAshish Jangam {
8708bf1c0aSAshish Jangam 	if (min_uV > info->max_uV || max_uV < info->min_uV)
8808bf1c0aSAshish Jangam 		return -EINVAL;
8908bf1c0aSAshish Jangam 
9008bf1c0aSAshish Jangam 	return 0;
9108bf1c0aSAshish Jangam }
9208bf1c0aSAshish Jangam 
9308bf1c0aSAshish Jangam static int da9052_regulator_enable(struct regulator_dev *rdev)
9408bf1c0aSAshish Jangam {
9508bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
9608bf1c0aSAshish Jangam 	struct da9052_regulator_info *info = regulator->info;
9708bf1c0aSAshish Jangam 	int offset = rdev_get_id(rdev);
9808bf1c0aSAshish Jangam 
9908bf1c0aSAshish Jangam 	return da9052_reg_update(regulator->da9052,
10008bf1c0aSAshish Jangam 				 DA9052_BUCKCORE_REG + offset,
10108bf1c0aSAshish Jangam 				 1 << info->en_bit, 1 << info->en_bit);
10208bf1c0aSAshish Jangam }
10308bf1c0aSAshish Jangam 
10408bf1c0aSAshish Jangam static int da9052_regulator_disable(struct regulator_dev *rdev)
10508bf1c0aSAshish Jangam {
10608bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
10708bf1c0aSAshish Jangam 	struct da9052_regulator_info *info = regulator->info;
10808bf1c0aSAshish Jangam 	int offset = rdev_get_id(rdev);
10908bf1c0aSAshish Jangam 
11008bf1c0aSAshish Jangam 	return da9052_reg_update(regulator->da9052,
11108bf1c0aSAshish Jangam 				 DA9052_BUCKCORE_REG + offset,
11208bf1c0aSAshish Jangam 				 1 << info->en_bit, 0);
11308bf1c0aSAshish Jangam }
11408bf1c0aSAshish Jangam 
11508bf1c0aSAshish Jangam static int da9052_regulator_is_enabled(struct regulator_dev *rdev)
11608bf1c0aSAshish Jangam {
11708bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
11808bf1c0aSAshish Jangam 	struct da9052_regulator_info *info = regulator->info;
11908bf1c0aSAshish Jangam 	int offset = rdev_get_id(rdev);
12008bf1c0aSAshish Jangam 	int ret;
12108bf1c0aSAshish Jangam 
12208bf1c0aSAshish Jangam 	ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset);
12308bf1c0aSAshish Jangam 	if (ret < 0)
12408bf1c0aSAshish Jangam 		return ret;
12508bf1c0aSAshish Jangam 
12608bf1c0aSAshish Jangam 	return ret & (1 << info->en_bit);
12708bf1c0aSAshish Jangam }
12808bf1c0aSAshish Jangam 
12908bf1c0aSAshish Jangam static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev)
13008bf1c0aSAshish Jangam {
13108bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
13208bf1c0aSAshish Jangam 	int offset = rdev_get_id(rdev);
13308bf1c0aSAshish Jangam 	int ret, row = 2;
13408bf1c0aSAshish Jangam 
13508bf1c0aSAshish Jangam 	ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2);
13608bf1c0aSAshish Jangam 	if (ret < 0)
13708bf1c0aSAshish Jangam 		return ret;
13808bf1c0aSAshish Jangam 
13908bf1c0aSAshish Jangam 	/* Determine the even or odd position of the buck current limit
14008bf1c0aSAshish Jangam 	 * register field
14108bf1c0aSAshish Jangam 	*/
14208bf1c0aSAshish Jangam 	if (offset % 2 == 0)
14308bf1c0aSAshish Jangam 		ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2;
14408bf1c0aSAshish Jangam 	else
14508bf1c0aSAshish Jangam 		ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6;
14608bf1c0aSAshish Jangam 
14708bf1c0aSAshish Jangam 	/* Select the appropriate current limit range */
14808bf1c0aSAshish Jangam 	if (regulator->da9052->chip_id == DA9052)
14908bf1c0aSAshish Jangam 		row = 0;
15008bf1c0aSAshish Jangam 	else if (offset == 0)
15108bf1c0aSAshish Jangam 		row = 1;
15208bf1c0aSAshish Jangam 
15308bf1c0aSAshish Jangam 	return da9052_current_limits[row][ret];
15408bf1c0aSAshish Jangam }
15508bf1c0aSAshish Jangam 
15608bf1c0aSAshish Jangam static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA,
15708bf1c0aSAshish Jangam 					  int max_uA)
15808bf1c0aSAshish Jangam {
15908bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
16008bf1c0aSAshish Jangam 	int offset = rdev_get_id(rdev);
16108bf1c0aSAshish Jangam 	int reg_val = 0;
16208bf1c0aSAshish Jangam 	int i, row = 2;
16308bf1c0aSAshish Jangam 
16408bf1c0aSAshish Jangam 	/* Select the appropriate current limit range */
16508bf1c0aSAshish Jangam 	if (regulator->da9052->chip_id == DA9052)
16608bf1c0aSAshish Jangam 		row = 0;
16708bf1c0aSAshish Jangam 	else if (offset == 0)
16808bf1c0aSAshish Jangam 		row = 1;
16908bf1c0aSAshish Jangam 
17008bf1c0aSAshish Jangam 	if (min_uA > da9052_current_limits[row][DA9052_MAX_UA] ||
17108bf1c0aSAshish Jangam 	    max_uA < da9052_current_limits[row][DA9052_MIN_UA])
17208bf1c0aSAshish Jangam 		return -EINVAL;
17308bf1c0aSAshish Jangam 
17408bf1c0aSAshish Jangam 	for (i = 0; i < DA9052_CURRENT_RANGE; i++) {
17508bf1c0aSAshish Jangam 		if (min_uA <= da9052_current_limits[row][i]) {
17608bf1c0aSAshish Jangam 			reg_val = i;
17708bf1c0aSAshish Jangam 			break;
17808bf1c0aSAshish Jangam 		}
17908bf1c0aSAshish Jangam 	}
18008bf1c0aSAshish Jangam 
18108bf1c0aSAshish Jangam 	/* Determine the even or odd position of the buck current limit
18208bf1c0aSAshish Jangam 	 * register field
18308bf1c0aSAshish Jangam 	*/
18408bf1c0aSAshish Jangam 	if (offset % 2 == 0)
18508bf1c0aSAshish Jangam 		return da9052_reg_update(regulator->da9052,
18608bf1c0aSAshish Jangam 					 DA9052_BUCKA_REG + offset/2,
18708bf1c0aSAshish Jangam 					 DA9052_BUCK_ILIM_MASK_EVEN,
18808bf1c0aSAshish Jangam 					 reg_val << 2);
18908bf1c0aSAshish Jangam 	else
19008bf1c0aSAshish Jangam 		return da9052_reg_update(regulator->da9052,
19108bf1c0aSAshish Jangam 					 DA9052_BUCKA_REG + offset/2,
19208bf1c0aSAshish Jangam 					 DA9052_BUCK_ILIM_MASK_ODD,
19308bf1c0aSAshish Jangam 					 reg_val << 6);
19408bf1c0aSAshish Jangam }
19508bf1c0aSAshish Jangam 
19608bf1c0aSAshish Jangam static int da9052_list_voltage(struct regulator_dev *rdev,
19708bf1c0aSAshish Jangam 				unsigned int selector)
19808bf1c0aSAshish Jangam {
19908bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
20008bf1c0aSAshish Jangam 	struct da9052_regulator_info *info = regulator->info;
2010ec446eaSAxel Lin 	int id = rdev_get_id(rdev);
20208bf1c0aSAshish Jangam 	int volt_uV;
20308bf1c0aSAshish Jangam 
2040ec446eaSAxel Lin 	if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052)
2050ec446eaSAxel Lin 		&& (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) {
2060ec446eaSAxel Lin 		volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV)
2070ec446eaSAxel Lin 			  + info->min_uV);
2080ec446eaSAxel Lin 		volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)
2090ec446eaSAxel Lin 				    * (DA9052_BUCK_PERI_3uV_STEP);
2100ec446eaSAxel Lin 	} else {
2110ec446eaSAxel Lin 		volt_uV = (selector * info->step_uV) + info->min_uV;
2120ec446eaSAxel Lin 	}
21308bf1c0aSAshish Jangam 
21408bf1c0aSAshish Jangam 	if (volt_uV > info->max_uV)
21508bf1c0aSAshish Jangam 		return -EINVAL;
21608bf1c0aSAshish Jangam 
21708bf1c0aSAshish Jangam 	return volt_uV;
21808bf1c0aSAshish Jangam }
21908bf1c0aSAshish Jangam 
2200ec446eaSAxel Lin static int da9052_regulator_set_voltage(struct regulator_dev *rdev,
22108bf1c0aSAshish Jangam 					     int min_uV, int max_uV,
22208bf1c0aSAshish Jangam 					     unsigned int *selector)
22308bf1c0aSAshish Jangam {
22408bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
22508bf1c0aSAshish Jangam 	struct da9052_regulator_info *info = regulator->info;
2260ec446eaSAxel Lin 	int id = rdev_get_id(rdev);
22708bf1c0aSAshish Jangam 	int ret;
22808bf1c0aSAshish Jangam 
22908bf1c0aSAshish Jangam 	ret = verify_range(info, min_uV, max_uV);
23008bf1c0aSAshish Jangam 	if (ret < 0)
23108bf1c0aSAshish Jangam 		return ret;
23208bf1c0aSAshish Jangam 
23308bf1c0aSAshish Jangam 	if (min_uV < info->min_uV)
23408bf1c0aSAshish Jangam 		min_uV = info->min_uV;
23508bf1c0aSAshish Jangam 
2360ec446eaSAxel Lin 	if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052)
2370ec446eaSAxel Lin 		&& (min_uV >= DA9052_CONST_3uV)) {
2380ec446eaSAxel Lin 			*selector = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV +
2390ec446eaSAxel Lin 				    DIV_ROUND_UP(min_uV - DA9052_CONST_3uV,
2400ec446eaSAxel Lin 						 DA9052_BUCK_PERI_3uV_STEP);
2410ec446eaSAxel Lin 	} else {
24293651218SAxel Lin 		*selector = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV);
2430ec446eaSAxel Lin 	}
24408bf1c0aSAshish Jangam 
24508bf1c0aSAshish Jangam 	ret = da9052_list_voltage(rdev, *selector);
24608bf1c0aSAshish Jangam 	if (ret < 0)
24708bf1c0aSAshish Jangam 		return ret;
24808bf1c0aSAshish Jangam 
2490ec446eaSAxel Lin 	ret = da9052_reg_update(regulator->da9052,
2500ec446eaSAxel Lin 				 DA9052_BUCKCORE_REG + id,
25108bf1c0aSAshish Jangam 				 (1 << info->volt_shift) - 1, *selector);
25208bf1c0aSAshish Jangam 	if (ret < 0)
25308bf1c0aSAshish Jangam 		return ret;
25408bf1c0aSAshish Jangam 
2550ec446eaSAxel Lin 	/* Some LDOs and DCDCs are DVC controlled which requires enabling of
2560ec446eaSAxel Lin 	 * the activate bit to implment the changes on the output.
25708bf1c0aSAshish Jangam 	 */
2580ec446eaSAxel Lin 	switch (id) {
2590ec446eaSAxel Lin 	case DA9052_ID_BUCK1:
2600ec446eaSAxel Lin 	case DA9052_ID_BUCK2:
2610ec446eaSAxel Lin 	case DA9052_ID_BUCK3:
2620ec446eaSAxel Lin 	case DA9052_ID_LDO2:
2630ec446eaSAxel Lin 	case DA9052_ID_LDO3:
2640ec446eaSAxel Lin 		ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG,
2654adf9bedSAxel Lin 					info->activate_bit, info->activate_bit);
2660ec446eaSAxel Lin 		break;
26708bf1c0aSAshish Jangam 	}
26808bf1c0aSAshish Jangam 
26908bf1c0aSAshish Jangam 	return ret;
27008bf1c0aSAshish Jangam }
27108bf1c0aSAshish Jangam 
27208bf1c0aSAshish Jangam static int da9052_get_regulator_voltage_sel(struct regulator_dev *rdev)
27308bf1c0aSAshish Jangam {
27408bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);
27508bf1c0aSAshish Jangam 	struct da9052_regulator_info *info = regulator->info;
27608bf1c0aSAshish Jangam 	int offset = rdev_get_id(rdev);
27708bf1c0aSAshish Jangam 	int ret;
27808bf1c0aSAshish Jangam 
27908bf1c0aSAshish Jangam 	ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset);
28008bf1c0aSAshish Jangam 	if (ret < 0)
28108bf1c0aSAshish Jangam 		return ret;
28208bf1c0aSAshish Jangam 
28308bf1c0aSAshish Jangam 	ret &= ((1 << info->volt_shift) - 1);
28408bf1c0aSAshish Jangam 
28508bf1c0aSAshish Jangam 	return ret;
28608bf1c0aSAshish Jangam }
28708bf1c0aSAshish Jangam 
28808bf1c0aSAshish Jangam static struct regulator_ops da9052_dcdc_ops = {
2890ec446eaSAxel Lin 	.set_voltage = da9052_regulator_set_voltage,
29008bf1c0aSAshish Jangam 	.get_current_limit = da9052_dcdc_get_current_limit,
29108bf1c0aSAshish Jangam 	.set_current_limit = da9052_dcdc_set_current_limit,
29208bf1c0aSAshish Jangam 
29308bf1c0aSAshish Jangam 	.list_voltage = da9052_list_voltage,
29408bf1c0aSAshish Jangam 	.get_voltage_sel = da9052_get_regulator_voltage_sel,
29508bf1c0aSAshish Jangam 	.is_enabled = da9052_regulator_is_enabled,
29608bf1c0aSAshish Jangam 	.enable = da9052_regulator_enable,
29708bf1c0aSAshish Jangam 	.disable = da9052_regulator_disable,
29808bf1c0aSAshish Jangam };
29908bf1c0aSAshish Jangam 
30008bf1c0aSAshish Jangam static struct regulator_ops da9052_ldo_ops = {
3010ec446eaSAxel Lin 	.set_voltage = da9052_regulator_set_voltage,
30208bf1c0aSAshish Jangam 
30308bf1c0aSAshish Jangam 	.list_voltage = da9052_list_voltage,
30408bf1c0aSAshish Jangam 	.get_voltage_sel = da9052_get_regulator_voltage_sel,
30508bf1c0aSAshish Jangam 	.is_enabled = da9052_regulator_is_enabled,
30608bf1c0aSAshish Jangam 	.enable = da9052_regulator_enable,
30708bf1c0aSAshish Jangam 	.disable = da9052_regulator_disable,
30808bf1c0aSAshish Jangam };
30908bf1c0aSAshish Jangam 
31008bf1c0aSAshish Jangam #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \
31108bf1c0aSAshish Jangam {\
31208bf1c0aSAshish Jangam 	.reg_desc = {\
3139210f05bSAxel Lin 		.name = #_id,\
31408bf1c0aSAshish Jangam 		.ops = &da9052_ldo_ops,\
31508bf1c0aSAshish Jangam 		.type = REGULATOR_VOLTAGE,\
3169210f05bSAxel Lin 		.id = DA9052_ID_##_id,\
3177b957654SAxel Lin 		.n_voltages = (max - min) / step + 1, \
31808bf1c0aSAshish Jangam 		.owner = THIS_MODULE,\
31908bf1c0aSAshish Jangam 	},\
32008bf1c0aSAshish Jangam 	.min_uV = (min) * 1000,\
32108bf1c0aSAshish Jangam 	.max_uV = (max) * 1000,\
32208bf1c0aSAshish Jangam 	.step_uV = (step) * 1000,\
32308bf1c0aSAshish Jangam 	.volt_shift = (sbits),\
32408bf1c0aSAshish Jangam 	.en_bit = (ebits),\
32508bf1c0aSAshish Jangam 	.activate_bit = (abits),\
32608bf1c0aSAshish Jangam }
32708bf1c0aSAshish Jangam 
32808bf1c0aSAshish Jangam #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \
32908bf1c0aSAshish Jangam {\
33008bf1c0aSAshish Jangam 	.reg_desc = {\
3319210f05bSAxel Lin 		.name = #_id,\
33208bf1c0aSAshish Jangam 		.ops = &da9052_dcdc_ops,\
33308bf1c0aSAshish Jangam 		.type = REGULATOR_VOLTAGE,\
3349210f05bSAxel Lin 		.id = DA9052_ID_##_id,\
3357b957654SAxel Lin 		.n_voltages = (max - min) / step + 1, \
33608bf1c0aSAshish Jangam 		.owner = THIS_MODULE,\
33708bf1c0aSAshish Jangam 	},\
33808bf1c0aSAshish Jangam 	.min_uV = (min) * 1000,\
33908bf1c0aSAshish Jangam 	.max_uV = (max) * 1000,\
34008bf1c0aSAshish Jangam 	.step_uV = (step) * 1000,\
34108bf1c0aSAshish Jangam 	.volt_shift = (sbits),\
34208bf1c0aSAshish Jangam 	.en_bit = (ebits),\
34308bf1c0aSAshish Jangam 	.activate_bit = (abits),\
34408bf1c0aSAshish Jangam }
34508bf1c0aSAshish Jangam 
3466242eae9SAxel Lin static struct da9052_regulator_info da9052_regulator_info[] = {
3479210f05bSAxel Lin 	DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),
3489210f05bSAxel Lin 	DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),
3499210f05bSAxel Lin 	DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO),
3500ec446eaSAxel Lin 	DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0),
3519210f05bSAxel Lin 	DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0),
3520ec446eaSAxel Lin 	DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),
3530ec446eaSAxel Lin 	DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),
3549210f05bSAxel Lin 	DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0),
3559210f05bSAxel Lin 	DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0),
3569210f05bSAxel Lin 	DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0),
3579210f05bSAxel Lin 	DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0),
3589210f05bSAxel Lin 	DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0),
3599210f05bSAxel Lin 	DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0),
3609210f05bSAxel Lin 	DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0),
36108bf1c0aSAshish Jangam };
36208bf1c0aSAshish Jangam 
3636242eae9SAxel Lin static struct da9052_regulator_info da9053_regulator_info[] = {
3649210f05bSAxel Lin 	DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),
3659210f05bSAxel Lin 	DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),
3669210f05bSAxel Lin 	DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO),
3670ec446eaSAxel Lin 	DA9052_DCDC(BUCK4, 25, 925, 2500, 6, 6, 0),
3689210f05bSAxel Lin 	DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0),
3690ec446eaSAxel Lin 	DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),
3700ec446eaSAxel Lin 	DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),
3719210f05bSAxel Lin 	DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0),
3729210f05bSAxel Lin 	DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0),
3739210f05bSAxel Lin 	DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0),
3749210f05bSAxel Lin 	DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0),
3759210f05bSAxel Lin 	DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0),
3769210f05bSAxel Lin 	DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0),
3779210f05bSAxel Lin 	DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0),
37808bf1c0aSAshish Jangam };
37908bf1c0aSAshish Jangam 
38008bf1c0aSAshish Jangam static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id,
38108bf1c0aSAshish Jangam 								 int id)
38208bf1c0aSAshish Jangam {
38308bf1c0aSAshish Jangam 	struct da9052_regulator_info *info;
38408bf1c0aSAshish Jangam 	int i;
38508bf1c0aSAshish Jangam 
386984b5a6bSAshish Jangam 	switch (chip_id) {
387984b5a6bSAshish Jangam 	case DA9052:
38808bf1c0aSAshish Jangam 		for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) {
38908bf1c0aSAshish Jangam 			info = &da9052_regulator_info[i];
39008bf1c0aSAshish Jangam 			if (info->reg_desc.id == id)
39108bf1c0aSAshish Jangam 				return info;
39208bf1c0aSAshish Jangam 		}
393984b5a6bSAshish Jangam 		break;
394984b5a6bSAshish Jangam 	case DA9053_AA:
395984b5a6bSAshish Jangam 	case DA9053_BA:
396984b5a6bSAshish Jangam 	case DA9053_BB:
39708bf1c0aSAshish Jangam 		for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) {
39808bf1c0aSAshish Jangam 			info = &da9053_regulator_info[i];
39908bf1c0aSAshish Jangam 			if (info->reg_desc.id == id)
40008bf1c0aSAshish Jangam 				return info;
40108bf1c0aSAshish Jangam 		}
402984b5a6bSAshish Jangam 		break;
40308bf1c0aSAshish Jangam 	}
40408bf1c0aSAshish Jangam 
40508bf1c0aSAshish Jangam 	return NULL;
40608bf1c0aSAshish Jangam }
40708bf1c0aSAshish Jangam 
40808bf1c0aSAshish Jangam static int __devinit da9052_regulator_probe(struct platform_device *pdev)
40908bf1c0aSAshish Jangam {
410c172708dSMark Brown 	struct regulator_config config = { };
41108bf1c0aSAshish Jangam 	struct da9052_regulator *regulator;
41208bf1c0aSAshish Jangam 	struct da9052 *da9052;
41308bf1c0aSAshish Jangam 	struct da9052_pdata *pdata;
41408bf1c0aSAshish Jangam 
415984b5a6bSAshish Jangam 	regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator),
416984b5a6bSAshish Jangam 				 GFP_KERNEL);
41708bf1c0aSAshish Jangam 	if (!regulator)
41808bf1c0aSAshish Jangam 		return -ENOMEM;
41908bf1c0aSAshish Jangam 
42008bf1c0aSAshish Jangam 	da9052 = dev_get_drvdata(pdev->dev.parent);
42108bf1c0aSAshish Jangam 	pdata = da9052->dev->platform_data;
42208bf1c0aSAshish Jangam 	regulator->da9052 = da9052;
42308bf1c0aSAshish Jangam 
42408bf1c0aSAshish Jangam 	regulator->info = find_regulator_info(regulator->da9052->chip_id,
42508bf1c0aSAshish Jangam 					      pdev->id);
42608bf1c0aSAshish Jangam 	if (regulator->info == NULL) {
42708bf1c0aSAshish Jangam 		dev_err(&pdev->dev, "invalid regulator ID specified\n");
4287eb6444fSAxel Lin 		return -EINVAL;
42908bf1c0aSAshish Jangam 	}
430c172708dSMark Brown 
431c172708dSMark Brown 	config.dev = &pdev->dev;
432c172708dSMark Brown 	config.driver_data = regulator;
43388c84c14SYing-Chun Liu (PaulLiu) 	if (pdata && pdata->regulators) {
43488c84c14SYing-Chun Liu (PaulLiu) 		config.init_data = pdata->regulators[pdev->id];
43588c84c14SYing-Chun Liu (PaulLiu) 	} else {
43688c84c14SYing-Chun Liu (PaulLiu) #ifdef CONFIG_OF
43788c84c14SYing-Chun Liu (PaulLiu) 		struct device_node *nproot = da9052->dev->of_node;
43888c84c14SYing-Chun Liu (PaulLiu) 		struct device_node *np;
43988c84c14SYing-Chun Liu (PaulLiu) 
44088c84c14SYing-Chun Liu (PaulLiu) 		if (!nproot)
44188c84c14SYing-Chun Liu (PaulLiu) 			return -ENODEV;
44288c84c14SYing-Chun Liu (PaulLiu) 
44388c84c14SYing-Chun Liu (PaulLiu) 		nproot = of_find_node_by_name(nproot, "regulators");
44488c84c14SYing-Chun Liu (PaulLiu) 		if (!nproot)
44588c84c14SYing-Chun Liu (PaulLiu) 			return -ENODEV;
44688c84c14SYing-Chun Liu (PaulLiu) 
44788c84c14SYing-Chun Liu (PaulLiu) 		for (np = of_get_next_child(nproot, NULL); !np;
44888c84c14SYing-Chun Liu (PaulLiu) 		     np = of_get_next_child(nproot, np)) {
44988c84c14SYing-Chun Liu (PaulLiu) 			if (!of_node_cmp(np->name,
45088c84c14SYing-Chun Liu (PaulLiu) 					 regulator->info->reg_desc.name)) {
45188c84c14SYing-Chun Liu (PaulLiu) 				config.init_data = of_get_regulator_init_data(
45288c84c14SYing-Chun Liu (PaulLiu) 					&pdev->dev, np);
45388c84c14SYing-Chun Liu (PaulLiu) 				break;
45488c84c14SYing-Chun Liu (PaulLiu) 			}
45588c84c14SYing-Chun Liu (PaulLiu) 		}
45688c84c14SYing-Chun Liu (PaulLiu) #endif
45788c84c14SYing-Chun Liu (PaulLiu) 	}
458c172708dSMark Brown 
45908bf1c0aSAshish Jangam 	regulator->rdev = regulator_register(&regulator->info->reg_desc,
460c172708dSMark Brown 					     &config);
46108bf1c0aSAshish Jangam 	if (IS_ERR(regulator->rdev)) {
46208bf1c0aSAshish Jangam 		dev_err(&pdev->dev, "failed to register regulator %s\n",
46308bf1c0aSAshish Jangam 			regulator->info->reg_desc.name);
4647eb6444fSAxel Lin 		return PTR_ERR(regulator->rdev);
46508bf1c0aSAshish Jangam 	}
46608bf1c0aSAshish Jangam 
46708bf1c0aSAshish Jangam 	platform_set_drvdata(pdev, regulator);
46808bf1c0aSAshish Jangam 
46908bf1c0aSAshish Jangam 	return 0;
47008bf1c0aSAshish Jangam }
47108bf1c0aSAshish Jangam 
47208bf1c0aSAshish Jangam static int __devexit da9052_regulator_remove(struct platform_device *pdev)
47308bf1c0aSAshish Jangam {
47408bf1c0aSAshish Jangam 	struct da9052_regulator *regulator = platform_get_drvdata(pdev);
47508bf1c0aSAshish Jangam 
47608bf1c0aSAshish Jangam 	regulator_unregister(regulator->rdev);
47708bf1c0aSAshish Jangam 	return 0;
47808bf1c0aSAshish Jangam }
47908bf1c0aSAshish Jangam 
48008bf1c0aSAshish Jangam static struct platform_driver da9052_regulator_driver = {
48108bf1c0aSAshish Jangam 	.probe = da9052_regulator_probe,
48208bf1c0aSAshish Jangam 	.remove = __devexit_p(da9052_regulator_remove),
48308bf1c0aSAshish Jangam 	.driver = {
48408bf1c0aSAshish Jangam 		.name = "da9052-regulator",
48508bf1c0aSAshish Jangam 		.owner = THIS_MODULE,
48608bf1c0aSAshish Jangam 	},
48708bf1c0aSAshish Jangam };
48808bf1c0aSAshish Jangam 
48908bf1c0aSAshish Jangam static int __init da9052_regulator_init(void)
49008bf1c0aSAshish Jangam {
49108bf1c0aSAshish Jangam 	return platform_driver_register(&da9052_regulator_driver);
49208bf1c0aSAshish Jangam }
49308bf1c0aSAshish Jangam subsys_initcall(da9052_regulator_init);
49408bf1c0aSAshish Jangam 
49508bf1c0aSAshish Jangam static void __exit da9052_regulator_exit(void)
49608bf1c0aSAshish Jangam {
49708bf1c0aSAshish Jangam 	platform_driver_unregister(&da9052_regulator_driver);
49808bf1c0aSAshish Jangam }
49908bf1c0aSAshish Jangam module_exit(da9052_regulator_exit);
50008bf1c0aSAshish Jangam 
50108bf1c0aSAshish Jangam MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
50208bf1c0aSAshish Jangam MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC");
50308bf1c0aSAshish Jangam MODULE_LICENSE("GPL");
50408bf1c0aSAshish Jangam MODULE_ALIAS("platform:da9052-regulator");
505