108bf1c0aSAshish Jangam /* 208bf1c0aSAshish Jangam * da9052-regulator.c: Regulator driver for DA9052 308bf1c0aSAshish Jangam * 408bf1c0aSAshish Jangam * Copyright(c) 2011 Dialog Semiconductor Ltd. 508bf1c0aSAshish Jangam * 608bf1c0aSAshish Jangam * Author: David Dajun Chen <dchen@diasemi.com> 708bf1c0aSAshish Jangam * 808bf1c0aSAshish Jangam * This program is free software; you can redistribute it and/or modify 908bf1c0aSAshish Jangam * it under the terms of the GNU General Public License as published by 1008bf1c0aSAshish Jangam * the Free Software Foundation; either version 2 of the License, or 1108bf1c0aSAshish Jangam * (at your option) any later version. 1208bf1c0aSAshish Jangam * 1308bf1c0aSAshish Jangam */ 1408bf1c0aSAshish Jangam 1508bf1c0aSAshish Jangam #include <linux/module.h> 1608bf1c0aSAshish Jangam #include <linux/moduleparam.h> 1708bf1c0aSAshish Jangam #include <linux/init.h> 1808bf1c0aSAshish Jangam #include <linux/err.h> 1908bf1c0aSAshish Jangam #include <linux/platform_device.h> 2008bf1c0aSAshish Jangam #include <linux/regulator/driver.h> 2108bf1c0aSAshish Jangam #include <linux/regulator/machine.h> 2288c84c14SYing-Chun Liu (PaulLiu) #ifdef CONFIG_OF 2388c84c14SYing-Chun Liu (PaulLiu) #include <linux/regulator/of_regulator.h> 2488c84c14SYing-Chun Liu (PaulLiu) #endif 2508bf1c0aSAshish Jangam 2608bf1c0aSAshish Jangam #include <linux/mfd/da9052/da9052.h> 2708bf1c0aSAshish Jangam #include <linux/mfd/da9052/reg.h> 2808bf1c0aSAshish Jangam #include <linux/mfd/da9052/pdata.h> 2908bf1c0aSAshish Jangam 3008bf1c0aSAshish Jangam /* Buck step size */ 3108bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_3uV_STEP 100000 3208bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 3308bf1c0aSAshish Jangam #define DA9052_CONST_3uV 3000000 3408bf1c0aSAshish Jangam 3508bf1c0aSAshish Jangam #define DA9052_MIN_UA 0 3608bf1c0aSAshish Jangam #define DA9052_MAX_UA 3 3708bf1c0aSAshish Jangam #define DA9052_CURRENT_RANGE 4 3808bf1c0aSAshish Jangam 3908bf1c0aSAshish Jangam /* Bit masks */ 4008bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_EVEN 0x0c 4108bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_ODD 0xc0 4208bf1c0aSAshish Jangam 439210f05bSAxel Lin /* DA9052 REGULATOR IDs */ 449210f05bSAxel Lin #define DA9052_ID_BUCK1 0 459210f05bSAxel Lin #define DA9052_ID_BUCK2 1 469210f05bSAxel Lin #define DA9052_ID_BUCK3 2 479210f05bSAxel Lin #define DA9052_ID_BUCK4 3 489210f05bSAxel Lin #define DA9052_ID_LDO1 4 499210f05bSAxel Lin #define DA9052_ID_LDO2 5 509210f05bSAxel Lin #define DA9052_ID_LDO3 6 519210f05bSAxel Lin #define DA9052_ID_LDO4 7 529210f05bSAxel Lin #define DA9052_ID_LDO5 8 539210f05bSAxel Lin #define DA9052_ID_LDO6 9 549210f05bSAxel Lin #define DA9052_ID_LDO7 10 559210f05bSAxel Lin #define DA9052_ID_LDO8 11 569210f05bSAxel Lin #define DA9052_ID_LDO9 12 579210f05bSAxel Lin #define DA9052_ID_LDO10 13 589210f05bSAxel Lin 5908bf1c0aSAshish Jangam static const u32 da9052_current_limits[3][4] = { 6008bf1c0aSAshish Jangam {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ 6108bf1c0aSAshish Jangam {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ 6208bf1c0aSAshish Jangam {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, 6308bf1c0aSAshish Jangam * BUCK-MEM and BUCK-PERI 6408bf1c0aSAshish Jangam */ 6508bf1c0aSAshish Jangam }; 6608bf1c0aSAshish Jangam 6708bf1c0aSAshish Jangam struct da9052_regulator_info { 6808bf1c0aSAshish Jangam struct regulator_desc reg_desc; 6908bf1c0aSAshish Jangam int step_uV; 7008bf1c0aSAshish Jangam int min_uV; 7108bf1c0aSAshish Jangam int max_uV; 7208bf1c0aSAshish Jangam unsigned char volt_shift; 7308bf1c0aSAshish Jangam unsigned char activate_bit; 7408bf1c0aSAshish Jangam }; 7508bf1c0aSAshish Jangam 7608bf1c0aSAshish Jangam struct da9052_regulator { 7708bf1c0aSAshish Jangam struct da9052 *da9052; 7808bf1c0aSAshish Jangam struct da9052_regulator_info *info; 7908bf1c0aSAshish Jangam struct regulator_dev *rdev; 8008bf1c0aSAshish Jangam }; 8108bf1c0aSAshish Jangam 8208bf1c0aSAshish Jangam static int verify_range(struct da9052_regulator_info *info, 8308bf1c0aSAshish Jangam int min_uV, int max_uV) 8408bf1c0aSAshish Jangam { 8508bf1c0aSAshish Jangam if (min_uV > info->max_uV || max_uV < info->min_uV) 8608bf1c0aSAshish Jangam return -EINVAL; 8708bf1c0aSAshish Jangam 8808bf1c0aSAshish Jangam return 0; 8908bf1c0aSAshish Jangam } 9008bf1c0aSAshish Jangam 9108bf1c0aSAshish Jangam static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) 9208bf1c0aSAshish Jangam { 9308bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 9408bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 9508bf1c0aSAshish Jangam int ret, row = 2; 9608bf1c0aSAshish Jangam 9708bf1c0aSAshish Jangam ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); 9808bf1c0aSAshish Jangam if (ret < 0) 9908bf1c0aSAshish Jangam return ret; 10008bf1c0aSAshish Jangam 10108bf1c0aSAshish Jangam /* Determine the even or odd position of the buck current limit 10208bf1c0aSAshish Jangam * register field 10308bf1c0aSAshish Jangam */ 10408bf1c0aSAshish Jangam if (offset % 2 == 0) 10508bf1c0aSAshish Jangam ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; 10608bf1c0aSAshish Jangam else 10708bf1c0aSAshish Jangam ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; 10808bf1c0aSAshish Jangam 10908bf1c0aSAshish Jangam /* Select the appropriate current limit range */ 11008bf1c0aSAshish Jangam if (regulator->da9052->chip_id == DA9052) 11108bf1c0aSAshish Jangam row = 0; 11208bf1c0aSAshish Jangam else if (offset == 0) 11308bf1c0aSAshish Jangam row = 1; 11408bf1c0aSAshish Jangam 11508bf1c0aSAshish Jangam return da9052_current_limits[row][ret]; 11608bf1c0aSAshish Jangam } 11708bf1c0aSAshish Jangam 11808bf1c0aSAshish Jangam static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, 11908bf1c0aSAshish Jangam int max_uA) 12008bf1c0aSAshish Jangam { 12108bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 12208bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 12308bf1c0aSAshish Jangam int reg_val = 0; 12408bf1c0aSAshish Jangam int i, row = 2; 12508bf1c0aSAshish Jangam 12608bf1c0aSAshish Jangam /* Select the appropriate current limit range */ 12708bf1c0aSAshish Jangam if (regulator->da9052->chip_id == DA9052) 12808bf1c0aSAshish Jangam row = 0; 12908bf1c0aSAshish Jangam else if (offset == 0) 13008bf1c0aSAshish Jangam row = 1; 13108bf1c0aSAshish Jangam 13208bf1c0aSAshish Jangam if (min_uA > da9052_current_limits[row][DA9052_MAX_UA] || 13308bf1c0aSAshish Jangam max_uA < da9052_current_limits[row][DA9052_MIN_UA]) 13408bf1c0aSAshish Jangam return -EINVAL; 13508bf1c0aSAshish Jangam 13608bf1c0aSAshish Jangam for (i = 0; i < DA9052_CURRENT_RANGE; i++) { 13708bf1c0aSAshish Jangam if (min_uA <= da9052_current_limits[row][i]) { 13808bf1c0aSAshish Jangam reg_val = i; 13908bf1c0aSAshish Jangam break; 14008bf1c0aSAshish Jangam } 14108bf1c0aSAshish Jangam } 14208bf1c0aSAshish Jangam 14308bf1c0aSAshish Jangam /* Determine the even or odd position of the buck current limit 14408bf1c0aSAshish Jangam * register field 14508bf1c0aSAshish Jangam */ 14608bf1c0aSAshish Jangam if (offset % 2 == 0) 14708bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 14808bf1c0aSAshish Jangam DA9052_BUCKA_REG + offset/2, 14908bf1c0aSAshish Jangam DA9052_BUCK_ILIM_MASK_EVEN, 15008bf1c0aSAshish Jangam reg_val << 2); 15108bf1c0aSAshish Jangam else 15208bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 15308bf1c0aSAshish Jangam DA9052_BUCKA_REG + offset/2, 15408bf1c0aSAshish Jangam DA9052_BUCK_ILIM_MASK_ODD, 15508bf1c0aSAshish Jangam reg_val << 6); 15608bf1c0aSAshish Jangam } 15708bf1c0aSAshish Jangam 15808bf1c0aSAshish Jangam static int da9052_list_voltage(struct regulator_dev *rdev, 15908bf1c0aSAshish Jangam unsigned int selector) 16008bf1c0aSAshish Jangam { 16108bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 16208bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 1630ec446eaSAxel Lin int id = rdev_get_id(rdev); 16408bf1c0aSAshish Jangam int volt_uV; 16508bf1c0aSAshish Jangam 1660ec446eaSAxel Lin if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) 1670ec446eaSAxel Lin && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { 1680ec446eaSAxel Lin volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) 1690ec446eaSAxel Lin + info->min_uV); 1700ec446eaSAxel Lin volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) 1710ec446eaSAxel Lin * (DA9052_BUCK_PERI_3uV_STEP); 1720ec446eaSAxel Lin } else { 1730ec446eaSAxel Lin volt_uV = (selector * info->step_uV) + info->min_uV; 1740ec446eaSAxel Lin } 17508bf1c0aSAshish Jangam 17608bf1c0aSAshish Jangam if (volt_uV > info->max_uV) 17708bf1c0aSAshish Jangam return -EINVAL; 17808bf1c0aSAshish Jangam 17908bf1c0aSAshish Jangam return volt_uV; 18008bf1c0aSAshish Jangam } 18108bf1c0aSAshish Jangam 1820ec446eaSAxel Lin static int da9052_regulator_set_voltage(struct regulator_dev *rdev, 18308bf1c0aSAshish Jangam int min_uV, int max_uV, 18408bf1c0aSAshish Jangam unsigned int *selector) 18508bf1c0aSAshish Jangam { 18608bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 18708bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 1880ec446eaSAxel Lin int id = rdev_get_id(rdev); 18908bf1c0aSAshish Jangam int ret; 19008bf1c0aSAshish Jangam 19108bf1c0aSAshish Jangam ret = verify_range(info, min_uV, max_uV); 19208bf1c0aSAshish Jangam if (ret < 0) 19308bf1c0aSAshish Jangam return ret; 19408bf1c0aSAshish Jangam 19508bf1c0aSAshish Jangam if (min_uV < info->min_uV) 19608bf1c0aSAshish Jangam min_uV = info->min_uV; 19708bf1c0aSAshish Jangam 1980ec446eaSAxel Lin if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) 1990ec446eaSAxel Lin && (min_uV >= DA9052_CONST_3uV)) { 2000ec446eaSAxel Lin *selector = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + 2010ec446eaSAxel Lin DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, 2020ec446eaSAxel Lin DA9052_BUCK_PERI_3uV_STEP); 2030ec446eaSAxel Lin } else { 20493651218SAxel Lin *selector = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); 2050ec446eaSAxel Lin } 20608bf1c0aSAshish Jangam 20708bf1c0aSAshish Jangam ret = da9052_list_voltage(rdev, *selector); 20808bf1c0aSAshish Jangam if (ret < 0) 20908bf1c0aSAshish Jangam return ret; 21008bf1c0aSAshish Jangam 2110ec446eaSAxel Lin ret = da9052_reg_update(regulator->da9052, 2120ec446eaSAxel Lin DA9052_BUCKCORE_REG + id, 21308bf1c0aSAshish Jangam (1 << info->volt_shift) - 1, *selector); 21408bf1c0aSAshish Jangam if (ret < 0) 21508bf1c0aSAshish Jangam return ret; 21608bf1c0aSAshish Jangam 2170ec446eaSAxel Lin /* Some LDOs and DCDCs are DVC controlled which requires enabling of 2180ec446eaSAxel Lin * the activate bit to implment the changes on the output. 21908bf1c0aSAshish Jangam */ 2200ec446eaSAxel Lin switch (id) { 2210ec446eaSAxel Lin case DA9052_ID_BUCK1: 2220ec446eaSAxel Lin case DA9052_ID_BUCK2: 2230ec446eaSAxel Lin case DA9052_ID_BUCK3: 2240ec446eaSAxel Lin case DA9052_ID_LDO2: 2250ec446eaSAxel Lin case DA9052_ID_LDO3: 2260ec446eaSAxel Lin ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, 2274adf9bedSAxel Lin info->activate_bit, info->activate_bit); 2280ec446eaSAxel Lin break; 22908bf1c0aSAshish Jangam } 23008bf1c0aSAshish Jangam 23108bf1c0aSAshish Jangam return ret; 23208bf1c0aSAshish Jangam } 23308bf1c0aSAshish Jangam 23408bf1c0aSAshish Jangam static int da9052_get_regulator_voltage_sel(struct regulator_dev *rdev) 23508bf1c0aSAshish Jangam { 23608bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 23708bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 23808bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 23908bf1c0aSAshish Jangam int ret; 24008bf1c0aSAshish Jangam 24108bf1c0aSAshish Jangam ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset); 24208bf1c0aSAshish Jangam if (ret < 0) 24308bf1c0aSAshish Jangam return ret; 24408bf1c0aSAshish Jangam 24508bf1c0aSAshish Jangam ret &= ((1 << info->volt_shift) - 1); 24608bf1c0aSAshish Jangam 24708bf1c0aSAshish Jangam return ret; 24808bf1c0aSAshish Jangam } 24908bf1c0aSAshish Jangam 25008bf1c0aSAshish Jangam static struct regulator_ops da9052_dcdc_ops = { 2510ec446eaSAxel Lin .set_voltage = da9052_regulator_set_voltage, 25208bf1c0aSAshish Jangam .get_current_limit = da9052_dcdc_get_current_limit, 25308bf1c0aSAshish Jangam .set_current_limit = da9052_dcdc_set_current_limit, 25408bf1c0aSAshish Jangam 25508bf1c0aSAshish Jangam .list_voltage = da9052_list_voltage, 25608bf1c0aSAshish Jangam .get_voltage_sel = da9052_get_regulator_voltage_sel, 257*0d481f74SAxel Lin .is_enabled = regulator_is_enabled_regmap, 258*0d481f74SAxel Lin .enable = regulator_enable_regmap, 259*0d481f74SAxel Lin .disable = regulator_disable_regmap, 26008bf1c0aSAshish Jangam }; 26108bf1c0aSAshish Jangam 26208bf1c0aSAshish Jangam static struct regulator_ops da9052_ldo_ops = { 2630ec446eaSAxel Lin .set_voltage = da9052_regulator_set_voltage, 26408bf1c0aSAshish Jangam 26508bf1c0aSAshish Jangam .list_voltage = da9052_list_voltage, 26608bf1c0aSAshish Jangam .get_voltage_sel = da9052_get_regulator_voltage_sel, 267*0d481f74SAxel Lin .is_enabled = regulator_is_enabled_regmap, 268*0d481f74SAxel Lin .enable = regulator_enable_regmap, 269*0d481f74SAxel Lin .disable = regulator_disable_regmap, 27008bf1c0aSAshish Jangam }; 27108bf1c0aSAshish Jangam 27208bf1c0aSAshish Jangam #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \ 27308bf1c0aSAshish Jangam {\ 27408bf1c0aSAshish Jangam .reg_desc = {\ 2759210f05bSAxel Lin .name = #_id,\ 27608bf1c0aSAshish Jangam .ops = &da9052_ldo_ops,\ 27708bf1c0aSAshish Jangam .type = REGULATOR_VOLTAGE,\ 2789210f05bSAxel Lin .id = DA9052_ID_##_id,\ 2797b957654SAxel Lin .n_voltages = (max - min) / step + 1, \ 28008bf1c0aSAshish Jangam .owner = THIS_MODULE,\ 281*0d481f74SAxel Lin .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ 282*0d481f74SAxel Lin .enable_mask = 1 << (ebits),\ 28308bf1c0aSAshish Jangam },\ 28408bf1c0aSAshish Jangam .min_uV = (min) * 1000,\ 28508bf1c0aSAshish Jangam .max_uV = (max) * 1000,\ 28608bf1c0aSAshish Jangam .step_uV = (step) * 1000,\ 28708bf1c0aSAshish Jangam .volt_shift = (sbits),\ 28808bf1c0aSAshish Jangam .activate_bit = (abits),\ 28908bf1c0aSAshish Jangam } 29008bf1c0aSAshish Jangam 29108bf1c0aSAshish Jangam #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \ 29208bf1c0aSAshish Jangam {\ 29308bf1c0aSAshish Jangam .reg_desc = {\ 2949210f05bSAxel Lin .name = #_id,\ 29508bf1c0aSAshish Jangam .ops = &da9052_dcdc_ops,\ 29608bf1c0aSAshish Jangam .type = REGULATOR_VOLTAGE,\ 2979210f05bSAxel Lin .id = DA9052_ID_##_id,\ 2987b957654SAxel Lin .n_voltages = (max - min) / step + 1, \ 29908bf1c0aSAshish Jangam .owner = THIS_MODULE,\ 300*0d481f74SAxel Lin .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ 301*0d481f74SAxel Lin .enable_mask = 1 << (ebits),\ 30208bf1c0aSAshish Jangam },\ 30308bf1c0aSAshish Jangam .min_uV = (min) * 1000,\ 30408bf1c0aSAshish Jangam .max_uV = (max) * 1000,\ 30508bf1c0aSAshish Jangam .step_uV = (step) * 1000,\ 30608bf1c0aSAshish Jangam .volt_shift = (sbits),\ 30708bf1c0aSAshish Jangam .activate_bit = (abits),\ 30808bf1c0aSAshish Jangam } 30908bf1c0aSAshish Jangam 3106242eae9SAxel Lin static struct da9052_regulator_info da9052_regulator_info[] = { 3119210f05bSAxel Lin DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 3129210f05bSAxel Lin DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 3139210f05bSAxel Lin DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), 3140ec446eaSAxel Lin DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0), 3159210f05bSAxel Lin DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 3160ec446eaSAxel Lin DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 3170ec446eaSAxel Lin DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 3189210f05bSAxel Lin DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 3199210f05bSAxel Lin DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 3209210f05bSAxel Lin DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 3219210f05bSAxel Lin DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 3229210f05bSAxel Lin DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 3239210f05bSAxel Lin DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 3249210f05bSAxel Lin DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 32508bf1c0aSAshish Jangam }; 32608bf1c0aSAshish Jangam 3276242eae9SAxel Lin static struct da9052_regulator_info da9053_regulator_info[] = { 3289210f05bSAxel Lin DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 3299210f05bSAxel Lin DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 3309210f05bSAxel Lin DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), 3310ec446eaSAxel Lin DA9052_DCDC(BUCK4, 25, 925, 2500, 6, 6, 0), 3329210f05bSAxel Lin DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 3330ec446eaSAxel Lin DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 3340ec446eaSAxel Lin DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 3359210f05bSAxel Lin DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 3369210f05bSAxel Lin DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 3379210f05bSAxel Lin DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 3389210f05bSAxel Lin DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 3399210f05bSAxel Lin DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 3409210f05bSAxel Lin DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 3419210f05bSAxel Lin DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 34208bf1c0aSAshish Jangam }; 34308bf1c0aSAshish Jangam 34408bf1c0aSAshish Jangam static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, 34508bf1c0aSAshish Jangam int id) 34608bf1c0aSAshish Jangam { 34708bf1c0aSAshish Jangam struct da9052_regulator_info *info; 34808bf1c0aSAshish Jangam int i; 34908bf1c0aSAshish Jangam 350984b5a6bSAshish Jangam switch (chip_id) { 351984b5a6bSAshish Jangam case DA9052: 35208bf1c0aSAshish Jangam for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { 35308bf1c0aSAshish Jangam info = &da9052_regulator_info[i]; 35408bf1c0aSAshish Jangam if (info->reg_desc.id == id) 35508bf1c0aSAshish Jangam return info; 35608bf1c0aSAshish Jangam } 357984b5a6bSAshish Jangam break; 358984b5a6bSAshish Jangam case DA9053_AA: 359984b5a6bSAshish Jangam case DA9053_BA: 360984b5a6bSAshish Jangam case DA9053_BB: 36108bf1c0aSAshish Jangam for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { 36208bf1c0aSAshish Jangam info = &da9053_regulator_info[i]; 36308bf1c0aSAshish Jangam if (info->reg_desc.id == id) 36408bf1c0aSAshish Jangam return info; 36508bf1c0aSAshish Jangam } 366984b5a6bSAshish Jangam break; 36708bf1c0aSAshish Jangam } 36808bf1c0aSAshish Jangam 36908bf1c0aSAshish Jangam return NULL; 37008bf1c0aSAshish Jangam } 37108bf1c0aSAshish Jangam 37208bf1c0aSAshish Jangam static int __devinit da9052_regulator_probe(struct platform_device *pdev) 37308bf1c0aSAshish Jangam { 374c172708dSMark Brown struct regulator_config config = { }; 37508bf1c0aSAshish Jangam struct da9052_regulator *regulator; 37608bf1c0aSAshish Jangam struct da9052 *da9052; 37708bf1c0aSAshish Jangam struct da9052_pdata *pdata; 37808bf1c0aSAshish Jangam 379984b5a6bSAshish Jangam regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), 380984b5a6bSAshish Jangam GFP_KERNEL); 38108bf1c0aSAshish Jangam if (!regulator) 38208bf1c0aSAshish Jangam return -ENOMEM; 38308bf1c0aSAshish Jangam 38408bf1c0aSAshish Jangam da9052 = dev_get_drvdata(pdev->dev.parent); 38508bf1c0aSAshish Jangam pdata = da9052->dev->platform_data; 38608bf1c0aSAshish Jangam regulator->da9052 = da9052; 38708bf1c0aSAshish Jangam 38808bf1c0aSAshish Jangam regulator->info = find_regulator_info(regulator->da9052->chip_id, 38908bf1c0aSAshish Jangam pdev->id); 39008bf1c0aSAshish Jangam if (regulator->info == NULL) { 39108bf1c0aSAshish Jangam dev_err(&pdev->dev, "invalid regulator ID specified\n"); 3927eb6444fSAxel Lin return -EINVAL; 39308bf1c0aSAshish Jangam } 394c172708dSMark Brown 395c172708dSMark Brown config.dev = &pdev->dev; 396c172708dSMark Brown config.driver_data = regulator; 397*0d481f74SAxel Lin config.regmap = da9052->regmap; 39888c84c14SYing-Chun Liu (PaulLiu) if (pdata && pdata->regulators) { 39988c84c14SYing-Chun Liu (PaulLiu) config.init_data = pdata->regulators[pdev->id]; 40088c84c14SYing-Chun Liu (PaulLiu) } else { 40188c84c14SYing-Chun Liu (PaulLiu) #ifdef CONFIG_OF 40288c84c14SYing-Chun Liu (PaulLiu) struct device_node *nproot = da9052->dev->of_node; 40388c84c14SYing-Chun Liu (PaulLiu) struct device_node *np; 40488c84c14SYing-Chun Liu (PaulLiu) 40588c84c14SYing-Chun Liu (PaulLiu) if (!nproot) 40688c84c14SYing-Chun Liu (PaulLiu) return -ENODEV; 40788c84c14SYing-Chun Liu (PaulLiu) 40888c84c14SYing-Chun Liu (PaulLiu) nproot = of_find_node_by_name(nproot, "regulators"); 40988c84c14SYing-Chun Liu (PaulLiu) if (!nproot) 41088c84c14SYing-Chun Liu (PaulLiu) return -ENODEV; 41188c84c14SYing-Chun Liu (PaulLiu) 41288c84c14SYing-Chun Liu (PaulLiu) for (np = of_get_next_child(nproot, NULL); !np; 41388c84c14SYing-Chun Liu (PaulLiu) np = of_get_next_child(nproot, np)) { 41488c84c14SYing-Chun Liu (PaulLiu) if (!of_node_cmp(np->name, 41588c84c14SYing-Chun Liu (PaulLiu) regulator->info->reg_desc.name)) { 41688c84c14SYing-Chun Liu (PaulLiu) config.init_data = of_get_regulator_init_data( 41788c84c14SYing-Chun Liu (PaulLiu) &pdev->dev, np); 41888c84c14SYing-Chun Liu (PaulLiu) break; 41988c84c14SYing-Chun Liu (PaulLiu) } 42088c84c14SYing-Chun Liu (PaulLiu) } 42188c84c14SYing-Chun Liu (PaulLiu) #endif 42288c84c14SYing-Chun Liu (PaulLiu) } 423c172708dSMark Brown 42408bf1c0aSAshish Jangam regulator->rdev = regulator_register(®ulator->info->reg_desc, 425c172708dSMark Brown &config); 42608bf1c0aSAshish Jangam if (IS_ERR(regulator->rdev)) { 42708bf1c0aSAshish Jangam dev_err(&pdev->dev, "failed to register regulator %s\n", 42808bf1c0aSAshish Jangam regulator->info->reg_desc.name); 4297eb6444fSAxel Lin return PTR_ERR(regulator->rdev); 43008bf1c0aSAshish Jangam } 43108bf1c0aSAshish Jangam 43208bf1c0aSAshish Jangam platform_set_drvdata(pdev, regulator); 43308bf1c0aSAshish Jangam 43408bf1c0aSAshish Jangam return 0; 43508bf1c0aSAshish Jangam } 43608bf1c0aSAshish Jangam 43708bf1c0aSAshish Jangam static int __devexit da9052_regulator_remove(struct platform_device *pdev) 43808bf1c0aSAshish Jangam { 43908bf1c0aSAshish Jangam struct da9052_regulator *regulator = platform_get_drvdata(pdev); 44008bf1c0aSAshish Jangam 44108bf1c0aSAshish Jangam regulator_unregister(regulator->rdev); 44208bf1c0aSAshish Jangam return 0; 44308bf1c0aSAshish Jangam } 44408bf1c0aSAshish Jangam 44508bf1c0aSAshish Jangam static struct platform_driver da9052_regulator_driver = { 44608bf1c0aSAshish Jangam .probe = da9052_regulator_probe, 44708bf1c0aSAshish Jangam .remove = __devexit_p(da9052_regulator_remove), 44808bf1c0aSAshish Jangam .driver = { 44908bf1c0aSAshish Jangam .name = "da9052-regulator", 45008bf1c0aSAshish Jangam .owner = THIS_MODULE, 45108bf1c0aSAshish Jangam }, 45208bf1c0aSAshish Jangam }; 45308bf1c0aSAshish Jangam 45408bf1c0aSAshish Jangam static int __init da9052_regulator_init(void) 45508bf1c0aSAshish Jangam { 45608bf1c0aSAshish Jangam return platform_driver_register(&da9052_regulator_driver); 45708bf1c0aSAshish Jangam } 45808bf1c0aSAshish Jangam subsys_initcall(da9052_regulator_init); 45908bf1c0aSAshish Jangam 46008bf1c0aSAshish Jangam static void __exit da9052_regulator_exit(void) 46108bf1c0aSAshish Jangam { 46208bf1c0aSAshish Jangam platform_driver_unregister(&da9052_regulator_driver); 46308bf1c0aSAshish Jangam } 46408bf1c0aSAshish Jangam module_exit(da9052_regulator_exit); 46508bf1c0aSAshish Jangam 46608bf1c0aSAshish Jangam MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); 46708bf1c0aSAshish Jangam MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); 46808bf1c0aSAshish Jangam MODULE_LICENSE("GPL"); 46908bf1c0aSAshish Jangam MODULE_ALIAS("platform:da9052-regulator"); 470