108bf1c0aSAshish Jangam /* 208bf1c0aSAshish Jangam * da9052-regulator.c: Regulator driver for DA9052 308bf1c0aSAshish Jangam * 408bf1c0aSAshish Jangam * Copyright(c) 2011 Dialog Semiconductor Ltd. 508bf1c0aSAshish Jangam * 608bf1c0aSAshish Jangam * Author: David Dajun Chen <dchen@diasemi.com> 708bf1c0aSAshish Jangam * 808bf1c0aSAshish Jangam * This program is free software; you can redistribute it and/or modify 908bf1c0aSAshish Jangam * it under the terms of the GNU General Public License as published by 1008bf1c0aSAshish Jangam * the Free Software Foundation; either version 2 of the License, or 1108bf1c0aSAshish Jangam * (at your option) any later version. 1208bf1c0aSAshish Jangam * 1308bf1c0aSAshish Jangam */ 1408bf1c0aSAshish Jangam 1508bf1c0aSAshish Jangam #include <linux/module.h> 1608bf1c0aSAshish Jangam #include <linux/moduleparam.h> 1708bf1c0aSAshish Jangam #include <linux/init.h> 1808bf1c0aSAshish Jangam #include <linux/err.h> 1908bf1c0aSAshish Jangam #include <linux/platform_device.h> 2008bf1c0aSAshish Jangam #include <linux/regulator/driver.h> 2108bf1c0aSAshish Jangam #include <linux/regulator/machine.h> 2288c84c14SYing-Chun Liu (PaulLiu) #ifdef CONFIG_OF 2388c84c14SYing-Chun Liu (PaulLiu) #include <linux/regulator/of_regulator.h> 2488c84c14SYing-Chun Liu (PaulLiu) #endif 2508bf1c0aSAshish Jangam 2608bf1c0aSAshish Jangam #include <linux/mfd/da9052/da9052.h> 2708bf1c0aSAshish Jangam #include <linux/mfd/da9052/reg.h> 2808bf1c0aSAshish Jangam #include <linux/mfd/da9052/pdata.h> 2908bf1c0aSAshish Jangam 3008bf1c0aSAshish Jangam /* Buck step size */ 3108bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_3uV_STEP 100000 3208bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 3308bf1c0aSAshish Jangam #define DA9052_CONST_3uV 3000000 3408bf1c0aSAshish Jangam 3508bf1c0aSAshish Jangam #define DA9052_MIN_UA 0 3608bf1c0aSAshish Jangam #define DA9052_MAX_UA 3 3708bf1c0aSAshish Jangam #define DA9052_CURRENT_RANGE 4 3808bf1c0aSAshish Jangam 3908bf1c0aSAshish Jangam /* Bit masks */ 4008bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_EVEN 0x0c 4108bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_ODD 0xc0 4208bf1c0aSAshish Jangam 439210f05bSAxel Lin /* DA9052 REGULATOR IDs */ 449210f05bSAxel Lin #define DA9052_ID_BUCK1 0 459210f05bSAxel Lin #define DA9052_ID_BUCK2 1 469210f05bSAxel Lin #define DA9052_ID_BUCK3 2 479210f05bSAxel Lin #define DA9052_ID_BUCK4 3 489210f05bSAxel Lin #define DA9052_ID_LDO1 4 499210f05bSAxel Lin #define DA9052_ID_LDO2 5 509210f05bSAxel Lin #define DA9052_ID_LDO3 6 519210f05bSAxel Lin #define DA9052_ID_LDO4 7 529210f05bSAxel Lin #define DA9052_ID_LDO5 8 539210f05bSAxel Lin #define DA9052_ID_LDO6 9 549210f05bSAxel Lin #define DA9052_ID_LDO7 10 559210f05bSAxel Lin #define DA9052_ID_LDO8 11 569210f05bSAxel Lin #define DA9052_ID_LDO9 12 579210f05bSAxel Lin #define DA9052_ID_LDO10 13 589210f05bSAxel Lin 5908bf1c0aSAshish Jangam static const u32 da9052_current_limits[3][4] = { 6008bf1c0aSAshish Jangam {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ 6108bf1c0aSAshish Jangam {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ 6208bf1c0aSAshish Jangam {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, 6308bf1c0aSAshish Jangam * BUCK-MEM and BUCK-PERI 6408bf1c0aSAshish Jangam */ 6508bf1c0aSAshish Jangam }; 6608bf1c0aSAshish Jangam 6708bf1c0aSAshish Jangam struct da9052_regulator_info { 6808bf1c0aSAshish Jangam struct regulator_desc reg_desc; 6908bf1c0aSAshish Jangam int step_uV; 7008bf1c0aSAshish Jangam int min_uV; 7108bf1c0aSAshish Jangam int max_uV; 7208bf1c0aSAshish Jangam unsigned char activate_bit; 7308bf1c0aSAshish Jangam }; 7408bf1c0aSAshish Jangam 7508bf1c0aSAshish Jangam struct da9052_regulator { 7608bf1c0aSAshish Jangam struct da9052 *da9052; 7708bf1c0aSAshish Jangam struct da9052_regulator_info *info; 7808bf1c0aSAshish Jangam struct regulator_dev *rdev; 7908bf1c0aSAshish Jangam }; 8008bf1c0aSAshish Jangam 8108bf1c0aSAshish Jangam static int verify_range(struct da9052_regulator_info *info, 8208bf1c0aSAshish Jangam int min_uV, int max_uV) 8308bf1c0aSAshish Jangam { 8408bf1c0aSAshish Jangam if (min_uV > info->max_uV || max_uV < info->min_uV) 8508bf1c0aSAshish Jangam return -EINVAL; 8608bf1c0aSAshish Jangam 8708bf1c0aSAshish Jangam return 0; 8808bf1c0aSAshish Jangam } 8908bf1c0aSAshish Jangam 9008bf1c0aSAshish Jangam static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) 9108bf1c0aSAshish Jangam { 9208bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 9308bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 9408bf1c0aSAshish Jangam int ret, row = 2; 9508bf1c0aSAshish Jangam 9608bf1c0aSAshish Jangam ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); 9708bf1c0aSAshish Jangam if (ret < 0) 9808bf1c0aSAshish Jangam return ret; 9908bf1c0aSAshish Jangam 10008bf1c0aSAshish Jangam /* Determine the even or odd position of the buck current limit 10108bf1c0aSAshish Jangam * register field 10208bf1c0aSAshish Jangam */ 10308bf1c0aSAshish Jangam if (offset % 2 == 0) 10408bf1c0aSAshish Jangam ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; 10508bf1c0aSAshish Jangam else 10608bf1c0aSAshish Jangam ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; 10708bf1c0aSAshish Jangam 10808bf1c0aSAshish Jangam /* Select the appropriate current limit range */ 10908bf1c0aSAshish Jangam if (regulator->da9052->chip_id == DA9052) 11008bf1c0aSAshish Jangam row = 0; 11108bf1c0aSAshish Jangam else if (offset == 0) 11208bf1c0aSAshish Jangam row = 1; 11308bf1c0aSAshish Jangam 11408bf1c0aSAshish Jangam return da9052_current_limits[row][ret]; 11508bf1c0aSAshish Jangam } 11608bf1c0aSAshish Jangam 11708bf1c0aSAshish Jangam static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, 11808bf1c0aSAshish Jangam int max_uA) 11908bf1c0aSAshish Jangam { 12008bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 12108bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 12208bf1c0aSAshish Jangam int reg_val = 0; 12308bf1c0aSAshish Jangam int i, row = 2; 12408bf1c0aSAshish Jangam 12508bf1c0aSAshish Jangam /* Select the appropriate current limit range */ 12608bf1c0aSAshish Jangam if (regulator->da9052->chip_id == DA9052) 12708bf1c0aSAshish Jangam row = 0; 12808bf1c0aSAshish Jangam else if (offset == 0) 12908bf1c0aSAshish Jangam row = 1; 13008bf1c0aSAshish Jangam 13108bf1c0aSAshish Jangam if (min_uA > da9052_current_limits[row][DA9052_MAX_UA] || 13208bf1c0aSAshish Jangam max_uA < da9052_current_limits[row][DA9052_MIN_UA]) 13308bf1c0aSAshish Jangam return -EINVAL; 13408bf1c0aSAshish Jangam 13508bf1c0aSAshish Jangam for (i = 0; i < DA9052_CURRENT_RANGE; i++) { 13608bf1c0aSAshish Jangam if (min_uA <= da9052_current_limits[row][i]) { 13708bf1c0aSAshish Jangam reg_val = i; 13808bf1c0aSAshish Jangam break; 13908bf1c0aSAshish Jangam } 14008bf1c0aSAshish Jangam } 14108bf1c0aSAshish Jangam 14208bf1c0aSAshish Jangam /* Determine the even or odd position of the buck current limit 14308bf1c0aSAshish Jangam * register field 14408bf1c0aSAshish Jangam */ 14508bf1c0aSAshish Jangam if (offset % 2 == 0) 14608bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 14708bf1c0aSAshish Jangam DA9052_BUCKA_REG + offset/2, 14808bf1c0aSAshish Jangam DA9052_BUCK_ILIM_MASK_EVEN, 14908bf1c0aSAshish Jangam reg_val << 2); 15008bf1c0aSAshish Jangam else 15108bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 15208bf1c0aSAshish Jangam DA9052_BUCKA_REG + offset/2, 15308bf1c0aSAshish Jangam DA9052_BUCK_ILIM_MASK_ODD, 15408bf1c0aSAshish Jangam reg_val << 6); 15508bf1c0aSAshish Jangam } 15608bf1c0aSAshish Jangam 15708bf1c0aSAshish Jangam static int da9052_list_voltage(struct regulator_dev *rdev, 15808bf1c0aSAshish Jangam unsigned int selector) 15908bf1c0aSAshish Jangam { 16008bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 16108bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 1620ec446eaSAxel Lin int id = rdev_get_id(rdev); 16308bf1c0aSAshish Jangam int volt_uV; 16408bf1c0aSAshish Jangam 1650ec446eaSAxel Lin if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) 1660ec446eaSAxel Lin && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { 1670ec446eaSAxel Lin volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) 1680ec446eaSAxel Lin + info->min_uV); 1690ec446eaSAxel Lin volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) 1700ec446eaSAxel Lin * (DA9052_BUCK_PERI_3uV_STEP); 1710ec446eaSAxel Lin } else { 1720ec446eaSAxel Lin volt_uV = (selector * info->step_uV) + info->min_uV; 1730ec446eaSAxel Lin } 17408bf1c0aSAshish Jangam 17508bf1c0aSAshish Jangam if (volt_uV > info->max_uV) 17608bf1c0aSAshish Jangam return -EINVAL; 17708bf1c0aSAshish Jangam 17808bf1c0aSAshish Jangam return volt_uV; 17908bf1c0aSAshish Jangam } 18008bf1c0aSAshish Jangam 1810ec446eaSAxel Lin static int da9052_regulator_set_voltage(struct regulator_dev *rdev, 18208bf1c0aSAshish Jangam int min_uV, int max_uV, 18308bf1c0aSAshish Jangam unsigned int *selector) 18408bf1c0aSAshish Jangam { 18508bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 18608bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 1870ec446eaSAxel Lin int id = rdev_get_id(rdev); 18808bf1c0aSAshish Jangam int ret; 18908bf1c0aSAshish Jangam 19008bf1c0aSAshish Jangam ret = verify_range(info, min_uV, max_uV); 19108bf1c0aSAshish Jangam if (ret < 0) 19208bf1c0aSAshish Jangam return ret; 19308bf1c0aSAshish Jangam 19408bf1c0aSAshish Jangam if (min_uV < info->min_uV) 19508bf1c0aSAshish Jangam min_uV = info->min_uV; 19608bf1c0aSAshish Jangam 1970ec446eaSAxel Lin if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) 1980ec446eaSAxel Lin && (min_uV >= DA9052_CONST_3uV)) { 1990ec446eaSAxel Lin *selector = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + 2000ec446eaSAxel Lin DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, 2010ec446eaSAxel Lin DA9052_BUCK_PERI_3uV_STEP); 2020ec446eaSAxel Lin } else { 20393651218SAxel Lin *selector = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); 2040ec446eaSAxel Lin } 20508bf1c0aSAshish Jangam 20608bf1c0aSAshish Jangam ret = da9052_list_voltage(rdev, *selector); 20708bf1c0aSAshish Jangam if (ret < 0) 20808bf1c0aSAshish Jangam return ret; 20908bf1c0aSAshish Jangam 210*09812bc4SAxel Lin ret = da9052_reg_update(regulator->da9052, rdev->desc->vsel_reg, 211*09812bc4SAxel Lin rdev->desc->vsel_mask, *selector); 21208bf1c0aSAshish Jangam if (ret < 0) 21308bf1c0aSAshish Jangam return ret; 21408bf1c0aSAshish Jangam 2150ec446eaSAxel Lin /* Some LDOs and DCDCs are DVC controlled which requires enabling of 2160ec446eaSAxel Lin * the activate bit to implment the changes on the output. 21708bf1c0aSAshish Jangam */ 2180ec446eaSAxel Lin switch (id) { 2190ec446eaSAxel Lin case DA9052_ID_BUCK1: 2200ec446eaSAxel Lin case DA9052_ID_BUCK2: 2210ec446eaSAxel Lin case DA9052_ID_BUCK3: 2220ec446eaSAxel Lin case DA9052_ID_LDO2: 2230ec446eaSAxel Lin case DA9052_ID_LDO3: 2240ec446eaSAxel Lin ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, 2254adf9bedSAxel Lin info->activate_bit, info->activate_bit); 2260ec446eaSAxel Lin break; 22708bf1c0aSAshish Jangam } 22808bf1c0aSAshish Jangam 22908bf1c0aSAshish Jangam return ret; 23008bf1c0aSAshish Jangam } 23108bf1c0aSAshish Jangam 23208bf1c0aSAshish Jangam static struct regulator_ops da9052_dcdc_ops = { 2330ec446eaSAxel Lin .set_voltage = da9052_regulator_set_voltage, 23408bf1c0aSAshish Jangam .get_current_limit = da9052_dcdc_get_current_limit, 23508bf1c0aSAshish Jangam .set_current_limit = da9052_dcdc_set_current_limit, 23608bf1c0aSAshish Jangam 23708bf1c0aSAshish Jangam .list_voltage = da9052_list_voltage, 238*09812bc4SAxel Lin .get_voltage_sel = regulator_get_voltage_sel_regmap, 2390d481f74SAxel Lin .is_enabled = regulator_is_enabled_regmap, 2400d481f74SAxel Lin .enable = regulator_enable_regmap, 2410d481f74SAxel Lin .disable = regulator_disable_regmap, 24208bf1c0aSAshish Jangam }; 24308bf1c0aSAshish Jangam 24408bf1c0aSAshish Jangam static struct regulator_ops da9052_ldo_ops = { 2450ec446eaSAxel Lin .set_voltage = da9052_regulator_set_voltage, 24608bf1c0aSAshish Jangam 24708bf1c0aSAshish Jangam .list_voltage = da9052_list_voltage, 248*09812bc4SAxel Lin .get_voltage_sel = regulator_get_voltage_sel_regmap, 2490d481f74SAxel Lin .is_enabled = regulator_is_enabled_regmap, 2500d481f74SAxel Lin .enable = regulator_enable_regmap, 2510d481f74SAxel Lin .disable = regulator_disable_regmap, 25208bf1c0aSAshish Jangam }; 25308bf1c0aSAshish Jangam 25408bf1c0aSAshish Jangam #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \ 25508bf1c0aSAshish Jangam {\ 25608bf1c0aSAshish Jangam .reg_desc = {\ 2579210f05bSAxel Lin .name = #_id,\ 25808bf1c0aSAshish Jangam .ops = &da9052_ldo_ops,\ 25908bf1c0aSAshish Jangam .type = REGULATOR_VOLTAGE,\ 2609210f05bSAxel Lin .id = DA9052_ID_##_id,\ 2617b957654SAxel Lin .n_voltages = (max - min) / step + 1, \ 26208bf1c0aSAshish Jangam .owner = THIS_MODULE,\ 263*09812bc4SAxel Lin .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ 264*09812bc4SAxel Lin .vsel_mask = (1 << (sbits)) - 1,\ 2650d481f74SAxel Lin .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ 2660d481f74SAxel Lin .enable_mask = 1 << (ebits),\ 26708bf1c0aSAshish Jangam },\ 26808bf1c0aSAshish Jangam .min_uV = (min) * 1000,\ 26908bf1c0aSAshish Jangam .max_uV = (max) * 1000,\ 27008bf1c0aSAshish Jangam .step_uV = (step) * 1000,\ 27108bf1c0aSAshish Jangam .activate_bit = (abits),\ 27208bf1c0aSAshish Jangam } 27308bf1c0aSAshish Jangam 27408bf1c0aSAshish Jangam #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \ 27508bf1c0aSAshish Jangam {\ 27608bf1c0aSAshish Jangam .reg_desc = {\ 2779210f05bSAxel Lin .name = #_id,\ 27808bf1c0aSAshish Jangam .ops = &da9052_dcdc_ops,\ 27908bf1c0aSAshish Jangam .type = REGULATOR_VOLTAGE,\ 2809210f05bSAxel Lin .id = DA9052_ID_##_id,\ 2817b957654SAxel Lin .n_voltages = (max - min) / step + 1, \ 28208bf1c0aSAshish Jangam .owner = THIS_MODULE,\ 283*09812bc4SAxel Lin .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ 284*09812bc4SAxel Lin .vsel_mask = (1 << (sbits)) - 1,\ 2850d481f74SAxel Lin .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ 2860d481f74SAxel Lin .enable_mask = 1 << (ebits),\ 28708bf1c0aSAshish Jangam },\ 28808bf1c0aSAshish Jangam .min_uV = (min) * 1000,\ 28908bf1c0aSAshish Jangam .max_uV = (max) * 1000,\ 29008bf1c0aSAshish Jangam .step_uV = (step) * 1000,\ 29108bf1c0aSAshish Jangam .activate_bit = (abits),\ 29208bf1c0aSAshish Jangam } 29308bf1c0aSAshish Jangam 2946242eae9SAxel Lin static struct da9052_regulator_info da9052_regulator_info[] = { 2959210f05bSAxel Lin DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 2969210f05bSAxel Lin DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 2979210f05bSAxel Lin DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), 2980ec446eaSAxel Lin DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0), 2999210f05bSAxel Lin DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 3000ec446eaSAxel Lin DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 3010ec446eaSAxel Lin DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 3029210f05bSAxel Lin DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 3039210f05bSAxel Lin DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 3049210f05bSAxel Lin DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 3059210f05bSAxel Lin DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 3069210f05bSAxel Lin DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 3079210f05bSAxel Lin DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 3089210f05bSAxel Lin DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 30908bf1c0aSAshish Jangam }; 31008bf1c0aSAshish Jangam 3116242eae9SAxel Lin static struct da9052_regulator_info da9053_regulator_info[] = { 3129210f05bSAxel Lin DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 3139210f05bSAxel Lin DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 3149210f05bSAxel Lin DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), 3150ec446eaSAxel Lin DA9052_DCDC(BUCK4, 25, 925, 2500, 6, 6, 0), 3169210f05bSAxel Lin DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 3170ec446eaSAxel Lin DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 3180ec446eaSAxel Lin DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 3199210f05bSAxel Lin DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 3209210f05bSAxel Lin DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 3219210f05bSAxel Lin DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 3229210f05bSAxel Lin DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 3239210f05bSAxel Lin DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 3249210f05bSAxel Lin DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 3259210f05bSAxel Lin DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 32608bf1c0aSAshish Jangam }; 32708bf1c0aSAshish Jangam 32808bf1c0aSAshish Jangam static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, 32908bf1c0aSAshish Jangam int id) 33008bf1c0aSAshish Jangam { 33108bf1c0aSAshish Jangam struct da9052_regulator_info *info; 33208bf1c0aSAshish Jangam int i; 33308bf1c0aSAshish Jangam 334984b5a6bSAshish Jangam switch (chip_id) { 335984b5a6bSAshish Jangam case DA9052: 33608bf1c0aSAshish Jangam for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { 33708bf1c0aSAshish Jangam info = &da9052_regulator_info[i]; 33808bf1c0aSAshish Jangam if (info->reg_desc.id == id) 33908bf1c0aSAshish Jangam return info; 34008bf1c0aSAshish Jangam } 341984b5a6bSAshish Jangam break; 342984b5a6bSAshish Jangam case DA9053_AA: 343984b5a6bSAshish Jangam case DA9053_BA: 344984b5a6bSAshish Jangam case DA9053_BB: 34508bf1c0aSAshish Jangam for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { 34608bf1c0aSAshish Jangam info = &da9053_regulator_info[i]; 34708bf1c0aSAshish Jangam if (info->reg_desc.id == id) 34808bf1c0aSAshish Jangam return info; 34908bf1c0aSAshish Jangam } 350984b5a6bSAshish Jangam break; 35108bf1c0aSAshish Jangam } 35208bf1c0aSAshish Jangam 35308bf1c0aSAshish Jangam return NULL; 35408bf1c0aSAshish Jangam } 35508bf1c0aSAshish Jangam 35608bf1c0aSAshish Jangam static int __devinit da9052_regulator_probe(struct platform_device *pdev) 35708bf1c0aSAshish Jangam { 358c172708dSMark Brown struct regulator_config config = { }; 35908bf1c0aSAshish Jangam struct da9052_regulator *regulator; 36008bf1c0aSAshish Jangam struct da9052 *da9052; 36108bf1c0aSAshish Jangam struct da9052_pdata *pdata; 36208bf1c0aSAshish Jangam 363984b5a6bSAshish Jangam regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), 364984b5a6bSAshish Jangam GFP_KERNEL); 36508bf1c0aSAshish Jangam if (!regulator) 36608bf1c0aSAshish Jangam return -ENOMEM; 36708bf1c0aSAshish Jangam 36808bf1c0aSAshish Jangam da9052 = dev_get_drvdata(pdev->dev.parent); 36908bf1c0aSAshish Jangam pdata = da9052->dev->platform_data; 37008bf1c0aSAshish Jangam regulator->da9052 = da9052; 37108bf1c0aSAshish Jangam 37208bf1c0aSAshish Jangam regulator->info = find_regulator_info(regulator->da9052->chip_id, 37308bf1c0aSAshish Jangam pdev->id); 37408bf1c0aSAshish Jangam if (regulator->info == NULL) { 37508bf1c0aSAshish Jangam dev_err(&pdev->dev, "invalid regulator ID specified\n"); 3767eb6444fSAxel Lin return -EINVAL; 37708bf1c0aSAshish Jangam } 378c172708dSMark Brown 379c172708dSMark Brown config.dev = &pdev->dev; 380c172708dSMark Brown config.driver_data = regulator; 3810d481f74SAxel Lin config.regmap = da9052->regmap; 38288c84c14SYing-Chun Liu (PaulLiu) if (pdata && pdata->regulators) { 38388c84c14SYing-Chun Liu (PaulLiu) config.init_data = pdata->regulators[pdev->id]; 38488c84c14SYing-Chun Liu (PaulLiu) } else { 38588c84c14SYing-Chun Liu (PaulLiu) #ifdef CONFIG_OF 38688c84c14SYing-Chun Liu (PaulLiu) struct device_node *nproot = da9052->dev->of_node; 38788c84c14SYing-Chun Liu (PaulLiu) struct device_node *np; 38888c84c14SYing-Chun Liu (PaulLiu) 38988c84c14SYing-Chun Liu (PaulLiu) if (!nproot) 39088c84c14SYing-Chun Liu (PaulLiu) return -ENODEV; 39188c84c14SYing-Chun Liu (PaulLiu) 39288c84c14SYing-Chun Liu (PaulLiu) nproot = of_find_node_by_name(nproot, "regulators"); 39388c84c14SYing-Chun Liu (PaulLiu) if (!nproot) 39488c84c14SYing-Chun Liu (PaulLiu) return -ENODEV; 39588c84c14SYing-Chun Liu (PaulLiu) 39688c84c14SYing-Chun Liu (PaulLiu) for (np = of_get_next_child(nproot, NULL); !np; 39788c84c14SYing-Chun Liu (PaulLiu) np = of_get_next_child(nproot, np)) { 39888c84c14SYing-Chun Liu (PaulLiu) if (!of_node_cmp(np->name, 39988c84c14SYing-Chun Liu (PaulLiu) regulator->info->reg_desc.name)) { 40088c84c14SYing-Chun Liu (PaulLiu) config.init_data = of_get_regulator_init_data( 40188c84c14SYing-Chun Liu (PaulLiu) &pdev->dev, np); 40288c84c14SYing-Chun Liu (PaulLiu) break; 40388c84c14SYing-Chun Liu (PaulLiu) } 40488c84c14SYing-Chun Liu (PaulLiu) } 40588c84c14SYing-Chun Liu (PaulLiu) #endif 40688c84c14SYing-Chun Liu (PaulLiu) } 407c172708dSMark Brown 40808bf1c0aSAshish Jangam regulator->rdev = regulator_register(®ulator->info->reg_desc, 409c172708dSMark Brown &config); 41008bf1c0aSAshish Jangam if (IS_ERR(regulator->rdev)) { 41108bf1c0aSAshish Jangam dev_err(&pdev->dev, "failed to register regulator %s\n", 41208bf1c0aSAshish Jangam regulator->info->reg_desc.name); 4137eb6444fSAxel Lin return PTR_ERR(regulator->rdev); 41408bf1c0aSAshish Jangam } 41508bf1c0aSAshish Jangam 41608bf1c0aSAshish Jangam platform_set_drvdata(pdev, regulator); 41708bf1c0aSAshish Jangam 41808bf1c0aSAshish Jangam return 0; 41908bf1c0aSAshish Jangam } 42008bf1c0aSAshish Jangam 42108bf1c0aSAshish Jangam static int __devexit da9052_regulator_remove(struct platform_device *pdev) 42208bf1c0aSAshish Jangam { 42308bf1c0aSAshish Jangam struct da9052_regulator *regulator = platform_get_drvdata(pdev); 42408bf1c0aSAshish Jangam 42508bf1c0aSAshish Jangam regulator_unregister(regulator->rdev); 42608bf1c0aSAshish Jangam return 0; 42708bf1c0aSAshish Jangam } 42808bf1c0aSAshish Jangam 42908bf1c0aSAshish Jangam static struct platform_driver da9052_regulator_driver = { 43008bf1c0aSAshish Jangam .probe = da9052_regulator_probe, 43108bf1c0aSAshish Jangam .remove = __devexit_p(da9052_regulator_remove), 43208bf1c0aSAshish Jangam .driver = { 43308bf1c0aSAshish Jangam .name = "da9052-regulator", 43408bf1c0aSAshish Jangam .owner = THIS_MODULE, 43508bf1c0aSAshish Jangam }, 43608bf1c0aSAshish Jangam }; 43708bf1c0aSAshish Jangam 43808bf1c0aSAshish Jangam static int __init da9052_regulator_init(void) 43908bf1c0aSAshish Jangam { 44008bf1c0aSAshish Jangam return platform_driver_register(&da9052_regulator_driver); 44108bf1c0aSAshish Jangam } 44208bf1c0aSAshish Jangam subsys_initcall(da9052_regulator_init); 44308bf1c0aSAshish Jangam 44408bf1c0aSAshish Jangam static void __exit da9052_regulator_exit(void) 44508bf1c0aSAshish Jangam { 44608bf1c0aSAshish Jangam platform_driver_unregister(&da9052_regulator_driver); 44708bf1c0aSAshish Jangam } 44808bf1c0aSAshish Jangam module_exit(da9052_regulator_exit); 44908bf1c0aSAshish Jangam 45008bf1c0aSAshish Jangam MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); 45108bf1c0aSAshish Jangam MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); 45208bf1c0aSAshish Jangam MODULE_LICENSE("GPL"); 45308bf1c0aSAshish Jangam MODULE_ALIAS("platform:da9052-regulator"); 454