1e3e5aff7SYing-Chun Liu (PaulLiu) /* 2e3e5aff7SYing-Chun Liu (PaulLiu) * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. 3e3e5aff7SYing-Chun Liu (PaulLiu) */ 4e3e5aff7SYing-Chun Liu (PaulLiu) 5e3e5aff7SYing-Chun Liu (PaulLiu) /* 6e3e5aff7SYing-Chun Liu (PaulLiu) * This program is free software; you can redistribute it and/or modify 7e3e5aff7SYing-Chun Liu (PaulLiu) * it under the terms of the GNU General Public License as published by 8e3e5aff7SYing-Chun Liu (PaulLiu) * the Free Software Foundation; either version 2 of the License, or 9e3e5aff7SYing-Chun Liu (PaulLiu) * (at your option) any later version. 10e3e5aff7SYing-Chun Liu (PaulLiu) 11e3e5aff7SYing-Chun Liu (PaulLiu) * This program is distributed in the hope that it will be useful, 12e3e5aff7SYing-Chun Liu (PaulLiu) * but WITHOUT ANY WARRANTY; without even the implied warranty of 13e3e5aff7SYing-Chun Liu (PaulLiu) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14e3e5aff7SYing-Chun Liu (PaulLiu) * GNU General Public License for more details. 15e3e5aff7SYing-Chun Liu (PaulLiu) 16e3e5aff7SYing-Chun Liu (PaulLiu) * You should have received a copy of the GNU General Public License along 17e3e5aff7SYing-Chun Liu (PaulLiu) * with this program; if not, write to the Free Software Foundation, Inc., 18e3e5aff7SYing-Chun Liu (PaulLiu) * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19e3e5aff7SYing-Chun Liu (PaulLiu) */ 20e3e5aff7SYing-Chun Liu (PaulLiu) 21e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/slab.h> 22e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/device.h> 23e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/module.h> 24baa64151SDong Aisheng #include <linux/mfd/syscon.h> 25e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/err.h> 26e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/io.h> 27e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/platform_device.h> 28e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/of.h> 29e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/of_address.h> 30baa64151SDong Aisheng #include <linux/regmap.h> 31e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/regulator/driver.h> 32e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/regulator/of_regulator.h> 330d19208eSSascha Hauer #include <linux/regulator/machine.h> 34e3e5aff7SYing-Chun Liu (PaulLiu) 359ee417c0SAnson Huang #define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */ 369ee417c0SAnson Huang #define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */ 379ee417c0SAnson Huang 38605ebd35SPhilipp Zabel #define LDO_POWER_GATE 0x00 39d38018f2SPhilipp Zabel #define LDO_FET_FULL_ON 0x1f 40605ebd35SPhilipp Zabel 41e3e5aff7SYing-Chun Liu (PaulLiu) struct anatop_regulator { 42e3e5aff7SYing-Chun Liu (PaulLiu) u32 control_reg; 43baa64151SDong Aisheng struct regmap *anatop; 44e3e5aff7SYing-Chun Liu (PaulLiu) int vol_bit_shift; 45e3e5aff7SYing-Chun Liu (PaulLiu) int vol_bit_width; 469ee417c0SAnson Huang u32 delay_reg; 479ee417c0SAnson Huang int delay_bit_shift; 489ee417c0SAnson Huang int delay_bit_width; 49e3e5aff7SYing-Chun Liu (PaulLiu) int min_bit_val; 50e3e5aff7SYing-Chun Liu (PaulLiu) int min_voltage; 51e3e5aff7SYing-Chun Liu (PaulLiu) int max_voltage; 52e3e5aff7SYing-Chun Liu (PaulLiu) struct regulator_desc rdesc; 53e3e5aff7SYing-Chun Liu (PaulLiu) struct regulator_init_data *initdata; 54d38018f2SPhilipp Zabel bool bypass; 55605ebd35SPhilipp Zabel int sel; 56e3e5aff7SYing-Chun Liu (PaulLiu) }; 57e3e5aff7SYing-Chun Liu (PaulLiu) 589ee417c0SAnson Huang static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg, 599ee417c0SAnson Huang unsigned int old_sel, 609ee417c0SAnson Huang unsigned int new_sel) 619ee417c0SAnson Huang { 629ee417c0SAnson Huang struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 639ee417c0SAnson Huang u32 val; 649ee417c0SAnson Huang int ret = 0; 659ee417c0SAnson Huang 669ee417c0SAnson Huang /* check whether need to care about LDO ramp up speed */ 679ee417c0SAnson Huang if (anatop_reg->delay_bit_width && new_sel > old_sel) { 689ee417c0SAnson Huang /* 699ee417c0SAnson Huang * the delay for LDO ramp up time is 709ee417c0SAnson Huang * based on the register setting, we need 719ee417c0SAnson Huang * to calculate how many steps LDO need to 729ee417c0SAnson Huang * ramp up, and how much delay needed. (us) 739ee417c0SAnson Huang */ 749ee417c0SAnson Huang regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val); 759ee417c0SAnson Huang val = (val >> anatop_reg->delay_bit_shift) & 769ee417c0SAnson Huang ((1 << anatop_reg->delay_bit_width) - 1); 77ff1ce057SShawn Guo ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << 78ff1ce057SShawn Guo val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1; 799ee417c0SAnson Huang } 809ee417c0SAnson Huang 819ee417c0SAnson Huang return ret; 829ee417c0SAnson Huang } 839ee417c0SAnson Huang 84605ebd35SPhilipp Zabel static int anatop_regmap_enable(struct regulator_dev *reg) 85605ebd35SPhilipp Zabel { 86605ebd35SPhilipp Zabel struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 87d38018f2SPhilipp Zabel int sel; 88605ebd35SPhilipp Zabel 89d38018f2SPhilipp Zabel sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; 90d38018f2SPhilipp Zabel return regulator_set_voltage_sel_regmap(reg, sel); 91605ebd35SPhilipp Zabel } 92605ebd35SPhilipp Zabel 93605ebd35SPhilipp Zabel static int anatop_regmap_disable(struct regulator_dev *reg) 94605ebd35SPhilipp Zabel { 95605ebd35SPhilipp Zabel return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE); 96605ebd35SPhilipp Zabel } 97605ebd35SPhilipp Zabel 98605ebd35SPhilipp Zabel static int anatop_regmap_is_enabled(struct regulator_dev *reg) 99605ebd35SPhilipp Zabel { 100605ebd35SPhilipp Zabel return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE; 101605ebd35SPhilipp Zabel } 102605ebd35SPhilipp Zabel 103605ebd35SPhilipp Zabel static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg, 104605ebd35SPhilipp Zabel unsigned selector) 105605ebd35SPhilipp Zabel { 106605ebd35SPhilipp Zabel struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 107605ebd35SPhilipp Zabel int ret; 108605ebd35SPhilipp Zabel 109d38018f2SPhilipp Zabel if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { 110605ebd35SPhilipp Zabel anatop_reg->sel = selector; 111605ebd35SPhilipp Zabel return 0; 112605ebd35SPhilipp Zabel } 113605ebd35SPhilipp Zabel 114605ebd35SPhilipp Zabel ret = regulator_set_voltage_sel_regmap(reg, selector); 115605ebd35SPhilipp Zabel if (!ret) 116605ebd35SPhilipp Zabel anatop_reg->sel = selector; 117605ebd35SPhilipp Zabel return ret; 118605ebd35SPhilipp Zabel } 119605ebd35SPhilipp Zabel 120605ebd35SPhilipp Zabel static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg) 121605ebd35SPhilipp Zabel { 122605ebd35SPhilipp Zabel struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 123605ebd35SPhilipp Zabel 124d38018f2SPhilipp Zabel if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) 125605ebd35SPhilipp Zabel return anatop_reg->sel; 126605ebd35SPhilipp Zabel 127605ebd35SPhilipp Zabel return regulator_get_voltage_sel_regmap(reg); 128605ebd35SPhilipp Zabel } 129605ebd35SPhilipp Zabel 130d38018f2SPhilipp Zabel static int anatop_regmap_get_bypass(struct regulator_dev *reg, bool *enable) 131d38018f2SPhilipp Zabel { 132d38018f2SPhilipp Zabel struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 133d38018f2SPhilipp Zabel int sel; 134d38018f2SPhilipp Zabel 135d38018f2SPhilipp Zabel sel = regulator_get_voltage_sel_regmap(reg); 136d38018f2SPhilipp Zabel if (sel == LDO_FET_FULL_ON) 137d38018f2SPhilipp Zabel WARN_ON(!anatop_reg->bypass); 138d38018f2SPhilipp Zabel else if (sel != LDO_POWER_GATE) 139d38018f2SPhilipp Zabel WARN_ON(anatop_reg->bypass); 140d38018f2SPhilipp Zabel 141d38018f2SPhilipp Zabel *enable = anatop_reg->bypass; 142d38018f2SPhilipp Zabel return 0; 143d38018f2SPhilipp Zabel } 144d38018f2SPhilipp Zabel 145d38018f2SPhilipp Zabel static int anatop_regmap_set_bypass(struct regulator_dev *reg, bool enable) 146d38018f2SPhilipp Zabel { 147d38018f2SPhilipp Zabel struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 148d38018f2SPhilipp Zabel int sel; 149d38018f2SPhilipp Zabel 150d38018f2SPhilipp Zabel if (enable == anatop_reg->bypass) 151d38018f2SPhilipp Zabel return 0; 152d38018f2SPhilipp Zabel 153d38018f2SPhilipp Zabel sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel; 154d38018f2SPhilipp Zabel anatop_reg->bypass = enable; 155d38018f2SPhilipp Zabel 156d38018f2SPhilipp Zabel return regulator_set_voltage_sel_regmap(reg, sel); 157d38018f2SPhilipp Zabel } 158d38018f2SPhilipp Zabel 159e3e5aff7SYing-Chun Liu (PaulLiu) static struct regulator_ops anatop_rops = { 160114c5748SAxel Lin .set_voltage_sel = regulator_set_voltage_sel_regmap, 161114c5748SAxel Lin .get_voltage_sel = regulator_get_voltage_sel_regmap, 1620713e6abSAxel Lin .list_voltage = regulator_list_voltage_linear, 163d01c3a1eSAxel Lin .map_voltage = regulator_map_voltage_linear, 164e3e5aff7SYing-Chun Liu (PaulLiu) }; 165e3e5aff7SYing-Chun Liu (PaulLiu) 166605ebd35SPhilipp Zabel static struct regulator_ops anatop_core_rops = { 167605ebd35SPhilipp Zabel .enable = anatop_regmap_enable, 168605ebd35SPhilipp Zabel .disable = anatop_regmap_disable, 169605ebd35SPhilipp Zabel .is_enabled = anatop_regmap_is_enabled, 170605ebd35SPhilipp Zabel .set_voltage_sel = anatop_regmap_core_set_voltage_sel, 171605ebd35SPhilipp Zabel .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel, 172605ebd35SPhilipp Zabel .get_voltage_sel = anatop_regmap_core_get_voltage_sel, 173605ebd35SPhilipp Zabel .list_voltage = regulator_list_voltage_linear, 174605ebd35SPhilipp Zabel .map_voltage = regulator_map_voltage_linear, 175d38018f2SPhilipp Zabel .get_bypass = anatop_regmap_get_bypass, 176d38018f2SPhilipp Zabel .set_bypass = anatop_regmap_set_bypass, 177605ebd35SPhilipp Zabel }; 178605ebd35SPhilipp Zabel 179a5023574SBill Pemberton static int anatop_regulator_probe(struct platform_device *pdev) 180e3e5aff7SYing-Chun Liu (PaulLiu) { 181e3e5aff7SYing-Chun Liu (PaulLiu) struct device *dev = &pdev->dev; 182e3e5aff7SYing-Chun Liu (PaulLiu) struct device_node *np = dev->of_node; 183baa64151SDong Aisheng struct device_node *anatop_np; 184e3e5aff7SYing-Chun Liu (PaulLiu) struct regulator_desc *rdesc; 185e3e5aff7SYing-Chun Liu (PaulLiu) struct regulator_dev *rdev; 186e3e5aff7SYing-Chun Liu (PaulLiu) struct anatop_regulator *sreg; 187e3e5aff7SYing-Chun Liu (PaulLiu) struct regulator_init_data *initdata; 188d914d81bSAxel Lin struct regulator_config config = { }; 189e3e5aff7SYing-Chun Liu (PaulLiu) int ret = 0; 190605ebd35SPhilipp Zabel u32 val; 191e3e5aff7SYing-Chun Liu (PaulLiu) 192e3e5aff7SYing-Chun Liu (PaulLiu) sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL); 193e3e5aff7SYing-Chun Liu (PaulLiu) if (!sreg) 194e3e5aff7SYing-Chun Liu (PaulLiu) return -ENOMEM; 1955062e047SDong Aisheng 196e3e5aff7SYing-Chun Liu (PaulLiu) rdesc = &sreg->rdesc; 197e3e5aff7SYing-Chun Liu (PaulLiu) rdesc->type = REGULATOR_VOLTAGE; 198e3e5aff7SYing-Chun Liu (PaulLiu) rdesc->owner = THIS_MODULE; 199baa64151SDong Aisheng 200aeb1404dSDong Aisheng of_property_read_string(np, "regulator-name", &rdesc->name); 201aeb1404dSDong Aisheng 202072e78b1SJavier Martinez Canillas initdata = of_get_regulator_init_data(dev, np, rdesc); 2037f51cf2eSDong Aisheng if (!initdata) 2047f51cf2eSDong Aisheng return -ENOMEM; 2057f51cf2eSDong Aisheng 2060d19208eSSascha Hauer initdata->supply_regulator = "vin"; 207072e78b1SJavier Martinez Canillas sreg->initdata = initdata; 208072e78b1SJavier Martinez Canillas 209baa64151SDong Aisheng anatop_np = of_get_parent(np); 210baa64151SDong Aisheng if (!anatop_np) 211baa64151SDong Aisheng return -ENODEV; 212baa64151SDong Aisheng sreg->anatop = syscon_node_to_regmap(anatop_np); 213baa64151SDong Aisheng of_node_put(anatop_np); 214baa64151SDong Aisheng if (IS_ERR(sreg->anatop)) 215baa64151SDong Aisheng return PTR_ERR(sreg->anatop); 216baa64151SDong Aisheng 2172f2cc27fSYing-Chun Liu (PaulLiu) ret = of_property_read_u32(np, "anatop-reg-offset", 2182f2cc27fSYing-Chun Liu (PaulLiu) &sreg->control_reg); 219e3e5aff7SYing-Chun Liu (PaulLiu) if (ret) { 2202f2cc27fSYing-Chun Liu (PaulLiu) dev_err(dev, "no anatop-reg-offset property set\n"); 221f2b269b8SFabio Estevam return ret; 222e3e5aff7SYing-Chun Liu (PaulLiu) } 223e3e5aff7SYing-Chun Liu (PaulLiu) ret = of_property_read_u32(np, "anatop-vol-bit-width", 224e3e5aff7SYing-Chun Liu (PaulLiu) &sreg->vol_bit_width); 225e3e5aff7SYing-Chun Liu (PaulLiu) if (ret) { 226e3e5aff7SYing-Chun Liu (PaulLiu) dev_err(dev, "no anatop-vol-bit-width property set\n"); 227f2b269b8SFabio Estevam return ret; 228e3e5aff7SYing-Chun Liu (PaulLiu) } 229e3e5aff7SYing-Chun Liu (PaulLiu) ret = of_property_read_u32(np, "anatop-vol-bit-shift", 230e3e5aff7SYing-Chun Liu (PaulLiu) &sreg->vol_bit_shift); 231e3e5aff7SYing-Chun Liu (PaulLiu) if (ret) { 232e3e5aff7SYing-Chun Liu (PaulLiu) dev_err(dev, "no anatop-vol-bit-shift property set\n"); 233f2b269b8SFabio Estevam return ret; 234e3e5aff7SYing-Chun Liu (PaulLiu) } 235e3e5aff7SYing-Chun Liu (PaulLiu) ret = of_property_read_u32(np, "anatop-min-bit-val", 236e3e5aff7SYing-Chun Liu (PaulLiu) &sreg->min_bit_val); 237e3e5aff7SYing-Chun Liu (PaulLiu) if (ret) { 238e3e5aff7SYing-Chun Liu (PaulLiu) dev_err(dev, "no anatop-min-bit-val property set\n"); 239f2b269b8SFabio Estevam return ret; 240e3e5aff7SYing-Chun Liu (PaulLiu) } 241e3e5aff7SYing-Chun Liu (PaulLiu) ret = of_property_read_u32(np, "anatop-min-voltage", 242e3e5aff7SYing-Chun Liu (PaulLiu) &sreg->min_voltage); 243e3e5aff7SYing-Chun Liu (PaulLiu) if (ret) { 244e3e5aff7SYing-Chun Liu (PaulLiu) dev_err(dev, "no anatop-min-voltage property set\n"); 245f2b269b8SFabio Estevam return ret; 246e3e5aff7SYing-Chun Liu (PaulLiu) } 247e3e5aff7SYing-Chun Liu (PaulLiu) ret = of_property_read_u32(np, "anatop-max-voltage", 248e3e5aff7SYing-Chun Liu (PaulLiu) &sreg->max_voltage); 249e3e5aff7SYing-Chun Liu (PaulLiu) if (ret) { 250e3e5aff7SYing-Chun Liu (PaulLiu) dev_err(dev, "no anatop-max-voltage property set\n"); 251f2b269b8SFabio Estevam return ret; 252e3e5aff7SYing-Chun Liu (PaulLiu) } 253e3e5aff7SYing-Chun Liu (PaulLiu) 2549ee417c0SAnson Huang /* read LDO ramp up setting, only for core reg */ 2559ee417c0SAnson Huang of_property_read_u32(np, "anatop-delay-reg-offset", 2569ee417c0SAnson Huang &sreg->delay_reg); 2579ee417c0SAnson Huang of_property_read_u32(np, "anatop-delay-bit-width", 2589ee417c0SAnson Huang &sreg->delay_bit_width); 2599ee417c0SAnson Huang of_property_read_u32(np, "anatop-delay-bit-shift", 2609ee417c0SAnson Huang &sreg->delay_bit_shift); 2619ee417c0SAnson Huang 262985884dbSAxel Lin rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1 263985884dbSAxel Lin + sreg->min_bit_val; 2640713e6abSAxel Lin rdesc->min_uV = sreg->min_voltage; 2650713e6abSAxel Lin rdesc->uV_step = 25000; 266985884dbSAxel Lin rdesc->linear_min_sel = sreg->min_bit_val; 267e1b0144fSAxel Lin rdesc->vsel_reg = sreg->control_reg; 268e1b0144fSAxel Lin rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) << 269e1b0144fSAxel Lin sreg->vol_bit_shift; 2700d19208eSSascha Hauer rdesc->min_dropout_uV = 125000; 271e3e5aff7SYing-Chun Liu (PaulLiu) 272d914d81bSAxel Lin config.dev = &pdev->dev; 273d914d81bSAxel Lin config.init_data = initdata; 274d914d81bSAxel Lin config.driver_data = sreg; 275d914d81bSAxel Lin config.of_node = pdev->dev.of_node; 276e1b0144fSAxel Lin config.regmap = sreg->anatop; 277d914d81bSAxel Lin 278605ebd35SPhilipp Zabel /* Only core regulators have the ramp up delay configuration. */ 279605ebd35SPhilipp Zabel if (sreg->control_reg && sreg->delay_bit_width) { 280605ebd35SPhilipp Zabel rdesc->ops = &anatop_core_rops; 281605ebd35SPhilipp Zabel 282605ebd35SPhilipp Zabel ret = regmap_read(config.regmap, rdesc->vsel_reg, &val); 283605ebd35SPhilipp Zabel if (ret) { 284605ebd35SPhilipp Zabel dev_err(dev, "failed to read initial state\n"); 285605ebd35SPhilipp Zabel return ret; 286605ebd35SPhilipp Zabel } 287605ebd35SPhilipp Zabel 288605ebd35SPhilipp Zabel sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift; 289d38018f2SPhilipp Zabel if (sreg->sel == LDO_FET_FULL_ON) { 290d38018f2SPhilipp Zabel sreg->sel = 0; 291d38018f2SPhilipp Zabel sreg->bypass = true; 292d38018f2SPhilipp Zabel } 293fe08be3eSMarkus Pargmann 294fe08be3eSMarkus Pargmann /* 295fe08be3eSMarkus Pargmann * In case vddpu was disabled by the bootloader, we need to set 296fe08be3eSMarkus Pargmann * a sane default until imx6-cpufreq was probed and changes the 297fe08be3eSMarkus Pargmann * voltage to the correct value. In this case we set 1.25V. 298fe08be3eSMarkus Pargmann */ 299aeb1404dSDong Aisheng if (!sreg->sel && !strcmp(rdesc->name, "vddpu")) 300fe08be3eSMarkus Pargmann sreg->sel = 22; 301da0607c8SMarkus Pargmann 302*9bf94454SDong Aisheng /* set the default voltage of the pcie phy to be 1.100v */ 303*9bf94454SDong Aisheng if (!sreg->sel && rdesc->name && 304*9bf94454SDong Aisheng !strcmp(rdesc->name, "vddpcie")) 305*9bf94454SDong Aisheng sreg->sel = 0x10; 306*9bf94454SDong Aisheng 3078a092e68SMika Båtsman if (!sreg->bypass && !sreg->sel) { 308da0607c8SMarkus Pargmann dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n"); 309da0607c8SMarkus Pargmann return -EINVAL; 310da0607c8SMarkus Pargmann } 311605ebd35SPhilipp Zabel } else { 312605ebd35SPhilipp Zabel rdesc->ops = &anatop_rops; 313605ebd35SPhilipp Zabel } 314605ebd35SPhilipp Zabel 315e3e5aff7SYing-Chun Liu (PaulLiu) /* register regulator */ 316be1221e8SSachin Kamat rdev = devm_regulator_register(dev, rdesc, &config); 317e3e5aff7SYing-Chun Liu (PaulLiu) if (IS_ERR(rdev)) { 318e3e5aff7SYing-Chun Liu (PaulLiu) dev_err(dev, "failed to register %s\n", 319e3e5aff7SYing-Chun Liu (PaulLiu) rdesc->name); 320f2b269b8SFabio Estevam return PTR_ERR(rdev); 321e3e5aff7SYing-Chun Liu (PaulLiu) } 322e3e5aff7SYing-Chun Liu (PaulLiu) 323e3e5aff7SYing-Chun Liu (PaulLiu) platform_set_drvdata(pdev, rdev); 324e3e5aff7SYing-Chun Liu (PaulLiu) 325e3e5aff7SYing-Chun Liu (PaulLiu) return 0; 326e3e5aff7SYing-Chun Liu (PaulLiu) } 327e3e5aff7SYing-Chun Liu (PaulLiu) 328a799baabSJingoo Han static const struct of_device_id of_anatop_regulator_match_tbl[] = { 329e3e5aff7SYing-Chun Liu (PaulLiu) { .compatible = "fsl,anatop-regulator", }, 330e3e5aff7SYing-Chun Liu (PaulLiu) { /* end */ } 331e3e5aff7SYing-Chun Liu (PaulLiu) }; 332d702ffd4SLuis de Bethencourt MODULE_DEVICE_TABLE(of, of_anatop_regulator_match_tbl); 333e3e5aff7SYing-Chun Liu (PaulLiu) 334c0d78c23SShawn Guo static struct platform_driver anatop_regulator_driver = { 335e3e5aff7SYing-Chun Liu (PaulLiu) .driver = { 336e3e5aff7SYing-Chun Liu (PaulLiu) .name = "anatop_regulator", 337e3e5aff7SYing-Chun Liu (PaulLiu) .of_match_table = of_anatop_regulator_match_tbl, 338e3e5aff7SYing-Chun Liu (PaulLiu) }, 339e3e5aff7SYing-Chun Liu (PaulLiu) .probe = anatop_regulator_probe, 340e3e5aff7SYing-Chun Liu (PaulLiu) }; 341e3e5aff7SYing-Chun Liu (PaulLiu) 342e3e5aff7SYing-Chun Liu (PaulLiu) static int __init anatop_regulator_init(void) 343e3e5aff7SYing-Chun Liu (PaulLiu) { 344c0d78c23SShawn Guo return platform_driver_register(&anatop_regulator_driver); 345e3e5aff7SYing-Chun Liu (PaulLiu) } 346e3e5aff7SYing-Chun Liu (PaulLiu) postcore_initcall(anatop_regulator_init); 347e3e5aff7SYing-Chun Liu (PaulLiu) 348e3e5aff7SYing-Chun Liu (PaulLiu) static void __exit anatop_regulator_exit(void) 349e3e5aff7SYing-Chun Liu (PaulLiu) { 350c0d78c23SShawn Guo platform_driver_unregister(&anatop_regulator_driver); 351e3e5aff7SYing-Chun Liu (PaulLiu) } 352e3e5aff7SYing-Chun Liu (PaulLiu) module_exit(anatop_regulator_exit); 353e3e5aff7SYing-Chun Liu (PaulLiu) 35434f75685SJingoo Han MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>"); 35534f75685SJingoo Han MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>"); 356e3e5aff7SYing-Chun Liu (PaulLiu) MODULE_DESCRIPTION("ANATOP Regulator driver"); 357e3e5aff7SYing-Chun Liu (PaulLiu) MODULE_LICENSE("GPL v2"); 35889705b9eSFabio Estevam MODULE_ALIAS("platform:anatop_regulator"); 359