1*e2ad626fSUlf Hansson // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*e2ad626fSUlf Hansson /* 3*e2ad626fSUlf Hansson * Copyright (c) 2019 Amlogic, Inc. 4*e2ad626fSUlf Hansson * Author: Jianxin Pan <jianxin.pan@amlogic.com> 5*e2ad626fSUlf Hansson */ 6*e2ad626fSUlf Hansson 7*e2ad626fSUlf Hansson #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 8*e2ad626fSUlf Hansson 9*e2ad626fSUlf Hansson #include <linux/io.h> 10*e2ad626fSUlf Hansson #include <linux/of.h> 11*e2ad626fSUlf Hansson #include <linux/platform_device.h> 12*e2ad626fSUlf Hansson #include <linux/pm_domain.h> 13*e2ad626fSUlf Hansson #include <dt-bindings/power/meson-a1-power.h> 14*e2ad626fSUlf Hansson #include <dt-bindings/power/amlogic,c3-pwrc.h> 15*e2ad626fSUlf Hansson #include <dt-bindings/power/meson-s4-power.h> 16*e2ad626fSUlf Hansson #include <linux/arm-smccc.h> 17*e2ad626fSUlf Hansson #include <linux/firmware/meson/meson_sm.h> 18*e2ad626fSUlf Hansson #include <linux/module.h> 19*e2ad626fSUlf Hansson 20*e2ad626fSUlf Hansson #define PWRC_ON 1 21*e2ad626fSUlf Hansson #define PWRC_OFF 0 22*e2ad626fSUlf Hansson 23*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain { 24*e2ad626fSUlf Hansson struct generic_pm_domain base; 25*e2ad626fSUlf Hansson unsigned int index; 26*e2ad626fSUlf Hansson struct meson_secure_pwrc *pwrc; 27*e2ad626fSUlf Hansson }; 28*e2ad626fSUlf Hansson 29*e2ad626fSUlf Hansson struct meson_secure_pwrc { 30*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain *domains; 31*e2ad626fSUlf Hansson struct genpd_onecell_data xlate; 32*e2ad626fSUlf Hansson struct meson_sm_firmware *fw; 33*e2ad626fSUlf Hansson }; 34*e2ad626fSUlf Hansson 35*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain_desc { 36*e2ad626fSUlf Hansson unsigned int index; 37*e2ad626fSUlf Hansson unsigned int flags; 38*e2ad626fSUlf Hansson char *name; 39*e2ad626fSUlf Hansson bool (*is_off)(struct meson_secure_pwrc_domain *pwrc_domain); 40*e2ad626fSUlf Hansson }; 41*e2ad626fSUlf Hansson 42*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain_data { 43*e2ad626fSUlf Hansson unsigned int count; 44*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain_desc *domains; 45*e2ad626fSUlf Hansson }; 46*e2ad626fSUlf Hansson 47*e2ad626fSUlf Hansson static bool pwrc_secure_is_off(struct meson_secure_pwrc_domain *pwrc_domain) 48*e2ad626fSUlf Hansson { 49*e2ad626fSUlf Hansson int is_off = 1; 50*e2ad626fSUlf Hansson 51*e2ad626fSUlf Hansson if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off, 52*e2ad626fSUlf Hansson pwrc_domain->index, 0, 0, 0, 0) < 0) 53*e2ad626fSUlf Hansson pr_err("failed to get power domain status\n"); 54*e2ad626fSUlf Hansson 55*e2ad626fSUlf Hansson return is_off; 56*e2ad626fSUlf Hansson } 57*e2ad626fSUlf Hansson 58*e2ad626fSUlf Hansson static int meson_secure_pwrc_off(struct generic_pm_domain *domain) 59*e2ad626fSUlf Hansson { 60*e2ad626fSUlf Hansson int ret = 0; 61*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain *pwrc_domain = 62*e2ad626fSUlf Hansson container_of(domain, struct meson_secure_pwrc_domain, base); 63*e2ad626fSUlf Hansson 64*e2ad626fSUlf Hansson if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL, 65*e2ad626fSUlf Hansson pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) { 66*e2ad626fSUlf Hansson pr_err("failed to set power domain off\n"); 67*e2ad626fSUlf Hansson ret = -EINVAL; 68*e2ad626fSUlf Hansson } 69*e2ad626fSUlf Hansson 70*e2ad626fSUlf Hansson return ret; 71*e2ad626fSUlf Hansson } 72*e2ad626fSUlf Hansson 73*e2ad626fSUlf Hansson static int meson_secure_pwrc_on(struct generic_pm_domain *domain) 74*e2ad626fSUlf Hansson { 75*e2ad626fSUlf Hansson int ret = 0; 76*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain *pwrc_domain = 77*e2ad626fSUlf Hansson container_of(domain, struct meson_secure_pwrc_domain, base); 78*e2ad626fSUlf Hansson 79*e2ad626fSUlf Hansson if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL, 80*e2ad626fSUlf Hansson pwrc_domain->index, PWRC_ON, 0, 0, 0) < 0) { 81*e2ad626fSUlf Hansson pr_err("failed to set power domain on\n"); 82*e2ad626fSUlf Hansson ret = -EINVAL; 83*e2ad626fSUlf Hansson } 84*e2ad626fSUlf Hansson 85*e2ad626fSUlf Hansson return ret; 86*e2ad626fSUlf Hansson } 87*e2ad626fSUlf Hansson 88*e2ad626fSUlf Hansson #define SEC_PD(__name, __flag) \ 89*e2ad626fSUlf Hansson [PWRC_##__name##_ID] = \ 90*e2ad626fSUlf Hansson { \ 91*e2ad626fSUlf Hansson .name = #__name, \ 92*e2ad626fSUlf Hansson .index = PWRC_##__name##_ID, \ 93*e2ad626fSUlf Hansson .is_off = pwrc_secure_is_off, \ 94*e2ad626fSUlf Hansson .flags = __flag, \ 95*e2ad626fSUlf Hansson } 96*e2ad626fSUlf Hansson 97*e2ad626fSUlf Hansson static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = { 98*e2ad626fSUlf Hansson SEC_PD(DSPA, 0), 99*e2ad626fSUlf Hansson SEC_PD(DSPB, 0), 100*e2ad626fSUlf Hansson /* UART should keep working in ATF after suspend and before resume */ 101*e2ad626fSUlf Hansson SEC_PD(UART, GENPD_FLAG_ALWAYS_ON), 102*e2ad626fSUlf Hansson /* DMC is for DDR PHY ana/dig and DMC, and should be always on */ 103*e2ad626fSUlf Hansson SEC_PD(DMC, GENPD_FLAG_ALWAYS_ON), 104*e2ad626fSUlf Hansson SEC_PD(I2C, 0), 105*e2ad626fSUlf Hansson SEC_PD(PSRAM, 0), 106*e2ad626fSUlf Hansson SEC_PD(ACODEC, 0), 107*e2ad626fSUlf Hansson SEC_PD(AUDIO, 0), 108*e2ad626fSUlf Hansson SEC_PD(OTP, 0), 109*e2ad626fSUlf Hansson SEC_PD(DMA, GENPD_FLAG_ALWAYS_ON | GENPD_FLAG_IRQ_SAFE), 110*e2ad626fSUlf Hansson SEC_PD(SD_EMMC, 0), 111*e2ad626fSUlf Hansson SEC_PD(RAMA, 0), 112*e2ad626fSUlf Hansson /* SRAMB is used as ATF runtime memory, and should be always on */ 113*e2ad626fSUlf Hansson SEC_PD(RAMB, GENPD_FLAG_ALWAYS_ON), 114*e2ad626fSUlf Hansson SEC_PD(IR, 0), 115*e2ad626fSUlf Hansson SEC_PD(SPICC, 0), 116*e2ad626fSUlf Hansson SEC_PD(SPIFC, 0), 117*e2ad626fSUlf Hansson SEC_PD(USB, 0), 118*e2ad626fSUlf Hansson /* NIC is for the Arm NIC-400 interconnect, and should be always on */ 119*e2ad626fSUlf Hansson SEC_PD(NIC, GENPD_FLAG_ALWAYS_ON), 120*e2ad626fSUlf Hansson SEC_PD(PDMIN, 0), 121*e2ad626fSUlf Hansson SEC_PD(RSA, 0), 122*e2ad626fSUlf Hansson }; 123*e2ad626fSUlf Hansson 124*e2ad626fSUlf Hansson static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = { 125*e2ad626fSUlf Hansson SEC_PD(C3_NNA, 0), 126*e2ad626fSUlf Hansson SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON), 127*e2ad626fSUlf Hansson SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON), 128*e2ad626fSUlf Hansson SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON), 129*e2ad626fSUlf Hansson SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON), 130*e2ad626fSUlf Hansson SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON), 131*e2ad626fSUlf Hansson SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON), 132*e2ad626fSUlf Hansson SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON), 133*e2ad626fSUlf Hansson SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON), 134*e2ad626fSUlf Hansson SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON), 135*e2ad626fSUlf Hansson SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON), 136*e2ad626fSUlf Hansson SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON), 137*e2ad626fSUlf Hansson SEC_PD(C3_VCODEC, 0), 138*e2ad626fSUlf Hansson }; 139*e2ad626fSUlf Hansson 140*e2ad626fSUlf Hansson static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = { 141*e2ad626fSUlf Hansson SEC_PD(S4_DOS_HEVC, 0), 142*e2ad626fSUlf Hansson SEC_PD(S4_DOS_VDEC, 0), 143*e2ad626fSUlf Hansson SEC_PD(S4_VPU_HDMI, 0), 144*e2ad626fSUlf Hansson SEC_PD(S4_USB_COMB, 0), 145*e2ad626fSUlf Hansson SEC_PD(S4_GE2D, 0), 146*e2ad626fSUlf Hansson /* ETH is for ethernet online wakeup, and should be always on */ 147*e2ad626fSUlf Hansson SEC_PD(S4_ETH, GENPD_FLAG_ALWAYS_ON), 148*e2ad626fSUlf Hansson SEC_PD(S4_DEMOD, 0), 149*e2ad626fSUlf Hansson SEC_PD(S4_AUDIO, 0), 150*e2ad626fSUlf Hansson }; 151*e2ad626fSUlf Hansson 152*e2ad626fSUlf Hansson static int meson_secure_pwrc_probe(struct platform_device *pdev) 153*e2ad626fSUlf Hansson { 154*e2ad626fSUlf Hansson int i; 155*e2ad626fSUlf Hansson struct device_node *sm_np; 156*e2ad626fSUlf Hansson struct meson_secure_pwrc *pwrc; 157*e2ad626fSUlf Hansson const struct meson_secure_pwrc_domain_data *match; 158*e2ad626fSUlf Hansson 159*e2ad626fSUlf Hansson match = of_device_get_match_data(&pdev->dev); 160*e2ad626fSUlf Hansson if (!match) { 161*e2ad626fSUlf Hansson dev_err(&pdev->dev, "failed to get match data\n"); 162*e2ad626fSUlf Hansson return -ENODEV; 163*e2ad626fSUlf Hansson } 164*e2ad626fSUlf Hansson 165*e2ad626fSUlf Hansson sm_np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gxbb-sm"); 166*e2ad626fSUlf Hansson if (!sm_np) { 167*e2ad626fSUlf Hansson dev_err(&pdev->dev, "no secure-monitor node\n"); 168*e2ad626fSUlf Hansson return -ENODEV; 169*e2ad626fSUlf Hansson } 170*e2ad626fSUlf Hansson 171*e2ad626fSUlf Hansson pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL); 172*e2ad626fSUlf Hansson if (!pwrc) { 173*e2ad626fSUlf Hansson of_node_put(sm_np); 174*e2ad626fSUlf Hansson return -ENOMEM; 175*e2ad626fSUlf Hansson } 176*e2ad626fSUlf Hansson 177*e2ad626fSUlf Hansson pwrc->fw = meson_sm_get(sm_np); 178*e2ad626fSUlf Hansson of_node_put(sm_np); 179*e2ad626fSUlf Hansson if (!pwrc->fw) 180*e2ad626fSUlf Hansson return -EPROBE_DEFER; 181*e2ad626fSUlf Hansson 182*e2ad626fSUlf Hansson pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count, 183*e2ad626fSUlf Hansson sizeof(*pwrc->xlate.domains), 184*e2ad626fSUlf Hansson GFP_KERNEL); 185*e2ad626fSUlf Hansson if (!pwrc->xlate.domains) 186*e2ad626fSUlf Hansson return -ENOMEM; 187*e2ad626fSUlf Hansson 188*e2ad626fSUlf Hansson pwrc->domains = devm_kcalloc(&pdev->dev, match->count, 189*e2ad626fSUlf Hansson sizeof(*pwrc->domains), GFP_KERNEL); 190*e2ad626fSUlf Hansson if (!pwrc->domains) 191*e2ad626fSUlf Hansson return -ENOMEM; 192*e2ad626fSUlf Hansson 193*e2ad626fSUlf Hansson pwrc->xlate.num_domains = match->count; 194*e2ad626fSUlf Hansson platform_set_drvdata(pdev, pwrc); 195*e2ad626fSUlf Hansson 196*e2ad626fSUlf Hansson for (i = 0 ; i < match->count ; ++i) { 197*e2ad626fSUlf Hansson struct meson_secure_pwrc_domain *dom = &pwrc->domains[i]; 198*e2ad626fSUlf Hansson 199*e2ad626fSUlf Hansson if (!match->domains[i].name) 200*e2ad626fSUlf Hansson continue; 201*e2ad626fSUlf Hansson 202*e2ad626fSUlf Hansson dom->pwrc = pwrc; 203*e2ad626fSUlf Hansson dom->index = match->domains[i].index; 204*e2ad626fSUlf Hansson dom->base.name = match->domains[i].name; 205*e2ad626fSUlf Hansson dom->base.flags = match->domains[i].flags; 206*e2ad626fSUlf Hansson dom->base.power_on = meson_secure_pwrc_on; 207*e2ad626fSUlf Hansson dom->base.power_off = meson_secure_pwrc_off; 208*e2ad626fSUlf Hansson 209*e2ad626fSUlf Hansson pm_genpd_init(&dom->base, NULL, match->domains[i].is_off(dom)); 210*e2ad626fSUlf Hansson 211*e2ad626fSUlf Hansson pwrc->xlate.domains[i] = &dom->base; 212*e2ad626fSUlf Hansson } 213*e2ad626fSUlf Hansson 214*e2ad626fSUlf Hansson return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate); 215*e2ad626fSUlf Hansson } 216*e2ad626fSUlf Hansson 217*e2ad626fSUlf Hansson static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = { 218*e2ad626fSUlf Hansson .domains = a1_pwrc_domains, 219*e2ad626fSUlf Hansson .count = ARRAY_SIZE(a1_pwrc_domains), 220*e2ad626fSUlf Hansson }; 221*e2ad626fSUlf Hansson 222*e2ad626fSUlf Hansson static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = { 223*e2ad626fSUlf Hansson .domains = c3_pwrc_domains, 224*e2ad626fSUlf Hansson .count = ARRAY_SIZE(c3_pwrc_domains), 225*e2ad626fSUlf Hansson }; 226*e2ad626fSUlf Hansson 227*e2ad626fSUlf Hansson static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = { 228*e2ad626fSUlf Hansson .domains = s4_pwrc_domains, 229*e2ad626fSUlf Hansson .count = ARRAY_SIZE(s4_pwrc_domains), 230*e2ad626fSUlf Hansson }; 231*e2ad626fSUlf Hansson 232*e2ad626fSUlf Hansson static const struct of_device_id meson_secure_pwrc_match_table[] = { 233*e2ad626fSUlf Hansson { 234*e2ad626fSUlf Hansson .compatible = "amlogic,meson-a1-pwrc", 235*e2ad626fSUlf Hansson .data = &meson_secure_a1_pwrc_data, 236*e2ad626fSUlf Hansson }, 237*e2ad626fSUlf Hansson { 238*e2ad626fSUlf Hansson .compatible = "amlogic,c3-pwrc", 239*e2ad626fSUlf Hansson .data = &amlogic_secure_c3_pwrc_data, 240*e2ad626fSUlf Hansson }, 241*e2ad626fSUlf Hansson { 242*e2ad626fSUlf Hansson .compatible = "amlogic,meson-s4-pwrc", 243*e2ad626fSUlf Hansson .data = &meson_secure_s4_pwrc_data, 244*e2ad626fSUlf Hansson }, 245*e2ad626fSUlf Hansson { /* sentinel */ } 246*e2ad626fSUlf Hansson }; 247*e2ad626fSUlf Hansson MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table); 248*e2ad626fSUlf Hansson 249*e2ad626fSUlf Hansson static struct platform_driver meson_secure_pwrc_driver = { 250*e2ad626fSUlf Hansson .probe = meson_secure_pwrc_probe, 251*e2ad626fSUlf Hansson .driver = { 252*e2ad626fSUlf Hansson .name = "meson_secure_pwrc", 253*e2ad626fSUlf Hansson .of_match_table = meson_secure_pwrc_match_table, 254*e2ad626fSUlf Hansson }, 255*e2ad626fSUlf Hansson }; 256*e2ad626fSUlf Hansson module_platform_driver(meson_secure_pwrc_driver); 257*e2ad626fSUlf Hansson MODULE_LICENSE("Dual MIT/GPL"); 258