1f1e1ea51SMario Limonciello /* SPDX-License-Identifier: GPL-2.0-only */ 2f1e1ea51SMario Limonciello /* 3f1e1ea51SMario Limonciello * dcdbas.h: Definitions for Dell Systems Management Base driver 4f1e1ea51SMario Limonciello * 5f1e1ea51SMario Limonciello * Copyright (C) 1995-2005 Dell Inc. 6f1e1ea51SMario Limonciello */ 7f1e1ea51SMario Limonciello 8f1e1ea51SMario Limonciello #ifndef _DCDBAS_H_ 9f1e1ea51SMario Limonciello #define _DCDBAS_H_ 10f1e1ea51SMario Limonciello 11f1e1ea51SMario Limonciello #include <linux/device.h> 12f1e1ea51SMario Limonciello #include <linux/sysfs.h> 13f1e1ea51SMario Limonciello #include <linux/types.h> 14f1e1ea51SMario Limonciello 15f1e1ea51SMario Limonciello #define MAX_SMI_DATA_BUF_SIZE (256 * 1024) 16f1e1ea51SMario Limonciello 17f1e1ea51SMario Limonciello #define HC_ACTION_NONE (0) 18f1e1ea51SMario Limonciello #define HC_ACTION_HOST_CONTROL_POWEROFF BIT(1) 19f1e1ea51SMario Limonciello #define HC_ACTION_HOST_CONTROL_POWERCYCLE BIT(2) 20f1e1ea51SMario Limonciello 21f1e1ea51SMario Limonciello #define HC_SMITYPE_NONE (0) 22f1e1ea51SMario Limonciello #define HC_SMITYPE_TYPE1 (1) 23f1e1ea51SMario Limonciello #define HC_SMITYPE_TYPE2 (2) 24f1e1ea51SMario Limonciello #define HC_SMITYPE_TYPE3 (3) 25f1e1ea51SMario Limonciello 26f1e1ea51SMario Limonciello #define ESM_APM_CMD (0x0A0) 27f1e1ea51SMario Limonciello #define ESM_APM_POWER_CYCLE (0x10) 28f1e1ea51SMario Limonciello #define ESM_STATUS_CMD_UNSUCCESSFUL (-1) 29f1e1ea51SMario Limonciello 30f1e1ea51SMario Limonciello #define CMOS_BASE_PORT (0x070) 31f1e1ea51SMario Limonciello #define CMOS_PAGE1_INDEX_PORT (0) 32f1e1ea51SMario Limonciello #define CMOS_PAGE1_DATA_PORT (1) 33f1e1ea51SMario Limonciello #define CMOS_PAGE2_INDEX_PORT_PIIX4 (2) 34f1e1ea51SMario Limonciello #define CMOS_PAGE2_DATA_PORT_PIIX4 (3) 35f1e1ea51SMario Limonciello #define PE1400_APM_CONTROL_PORT (0x0B0) 36f1e1ea51SMario Limonciello #define PCAT_APM_CONTROL_PORT (0x0B2) 37f1e1ea51SMario Limonciello #define PCAT_APM_STATUS_PORT (0x0B3) 38f1e1ea51SMario Limonciello #define PE1300_CMOS_CMD_STRUCT_PTR (0x38) 39f1e1ea51SMario Limonciello #define PE1400_CMOS_CMD_STRUCT_PTR (0x70) 40f1e1ea51SMario Limonciello 41f1e1ea51SMario Limonciello #define MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN (14) 42f1e1ea51SMario Limonciello #define MAX_SYSMGMT_LONGCMD_SGENTRY_NUM (16) 43f1e1ea51SMario Limonciello 44f1e1ea51SMario Limonciello #define TIMEOUT_USEC_SHORT_SEMA_BLOCKING (10000) 45f1e1ea51SMario Limonciello #define EXPIRED_TIMER (0) 46f1e1ea51SMario Limonciello 47f1e1ea51SMario Limonciello #define SMI_CMD_MAGIC (0x534D4931) 48f1e1ea51SMario Limonciello #define SMM_EPS_SIG "$SCB" 49f1e1ea51SMario Limonciello 50f1e1ea51SMario Limonciello #define DCDBAS_DEV_ATTR_RW(_name) \ 51f1e1ea51SMario Limonciello DEVICE_ATTR(_name,0600,_name##_show,_name##_store); 52f1e1ea51SMario Limonciello 53f1e1ea51SMario Limonciello #define DCDBAS_DEV_ATTR_RO(_name) \ 54f1e1ea51SMario Limonciello DEVICE_ATTR(_name,0400,_name##_show,NULL); 55f1e1ea51SMario Limonciello 56f1e1ea51SMario Limonciello #define DCDBAS_DEV_ATTR_WO(_name) \ 57f1e1ea51SMario Limonciello DEVICE_ATTR(_name,0200,NULL,_name##_store); 58f1e1ea51SMario Limonciello 59f1e1ea51SMario Limonciello #define DCDBAS_BIN_ATTR_RW(_name) \ 60f1e1ea51SMario Limonciello struct bin_attribute bin_attr_##_name = { \ 61f1e1ea51SMario Limonciello .attr = { .name = __stringify(_name), \ 62f1e1ea51SMario Limonciello .mode = 0600 }, \ 63f1e1ea51SMario Limonciello .read = _name##_read, \ 64f1e1ea51SMario Limonciello .write = _name##_write, \ 65f1e1ea51SMario Limonciello } 66f1e1ea51SMario Limonciello 67f1e1ea51SMario Limonciello struct smi_cmd { 68f1e1ea51SMario Limonciello __u32 magic; 69f1e1ea51SMario Limonciello __u32 ebx; 70f1e1ea51SMario Limonciello __u32 ecx; 71f1e1ea51SMario Limonciello __u16 command_address; 72f1e1ea51SMario Limonciello __u8 command_code; 73f1e1ea51SMario Limonciello __u8 reserved; 74f1e1ea51SMario Limonciello __u8 command_buffer[1]; 75f1e1ea51SMario Limonciello } __attribute__ ((packed)); 76f1e1ea51SMario Limonciello 77f1e1ea51SMario Limonciello struct apm_cmd { 78f1e1ea51SMario Limonciello __u8 command; 79f1e1ea51SMario Limonciello __s8 status; 80f1e1ea51SMario Limonciello __u16 reserved; 81f1e1ea51SMario Limonciello union { 82f1e1ea51SMario Limonciello struct { 83f1e1ea51SMario Limonciello __u8 parm[MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN]; 84f1e1ea51SMario Limonciello } __attribute__ ((packed)) shortreq; 85f1e1ea51SMario Limonciello 86f1e1ea51SMario Limonciello struct { 87f1e1ea51SMario Limonciello __u16 num_sg_entries; 88f1e1ea51SMario Limonciello struct { 89f1e1ea51SMario Limonciello __u32 size; 90f1e1ea51SMario Limonciello __u64 addr; 91f1e1ea51SMario Limonciello } __attribute__ ((packed)) 92f1e1ea51SMario Limonciello sglist[MAX_SYSMGMT_LONGCMD_SGENTRY_NUM]; 93f1e1ea51SMario Limonciello } __attribute__ ((packed)) longreq; 94f1e1ea51SMario Limonciello } __attribute__ ((packed)) parameters; 95f1e1ea51SMario Limonciello } __attribute__ ((packed)); 96f1e1ea51SMario Limonciello 97f1e1ea51SMario Limonciello int dcdbas_smi_request(struct smi_cmd *smi_cmd); 98f1e1ea51SMario Limonciello 99f1e1ea51SMario Limonciello struct smm_eps_table { 100f1e1ea51SMario Limonciello char smm_comm_buff_anchor[4]; 101f1e1ea51SMario Limonciello u8 length; 102f1e1ea51SMario Limonciello u8 checksum; 103f1e1ea51SMario Limonciello u8 version; 104f1e1ea51SMario Limonciello u64 smm_comm_buff_addr; 105f1e1ea51SMario Limonciello u64 num_of_4k_pages; 106f1e1ea51SMario Limonciello } __packed; 107f1e1ea51SMario Limonciello 108*77089467SJuergen Gross struct smi_buffer { 109*77089467SJuergen Gross u8 *virt; 110*77089467SJuergen Gross unsigned long size; 111*77089467SJuergen Gross dma_addr_t dma; 112*77089467SJuergen Gross }; 113*77089467SJuergen Gross 114*77089467SJuergen Gross int dcdbas_smi_alloc(struct smi_buffer *smi_buffer, unsigned long size); 115*77089467SJuergen Gross void dcdbas_smi_free(struct smi_buffer *smi_buffer); 116*77089467SJuergen Gross 117f1e1ea51SMario Limonciello #endif /* _DCDBAS_H_ */ 118f1e1ea51SMario Limonciello 119