1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * AMD Platform Management Framework Driver 4 * 5 * Copyright (c) 2022, Advanced Micro Devices, Inc. 6 * All Rights Reserved. 7 * 8 * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> 9 */ 10 11 #ifndef PMF_H 12 #define PMF_H 13 14 #include <linux/acpi.h> 15 #include <linux/platform_profile.h> 16 17 /* APMF Functions */ 18 #define APMF_FUNC_VERIFY_INTERFACE 0 19 #define APMF_FUNC_GET_SYS_PARAMS 1 20 #define APMF_FUNC_SBIOS_REQUESTS 2 21 #define APMF_FUNC_SBIOS_HEARTBEAT 4 22 #define APMF_FUNC_AUTO_MODE 5 23 #define APMF_FUNC_SET_FAN_IDX 7 24 #define APMF_FUNC_STATIC_SLIDER_GRANULAR 9 25 26 /* Message Definitions */ 27 #define SET_SPL 0x03 /* SPL: Sustained Power Limit */ 28 #define SET_SPPT 0x05 /* SPPT: Slow Package Power Tracking */ 29 #define SET_FPPT 0x07 /* FPPT: Fast Package Power Tracking */ 30 #define GET_SPL 0x0B 31 #define GET_SPPT 0x0D 32 #define GET_FPPT 0x0F 33 #define SET_DRAM_ADDR_HIGH 0x14 34 #define SET_DRAM_ADDR_LOW 0x15 35 #define SET_TRANSFER_TABLE 0x16 36 #define SET_STT_MIN_LIMIT 0x18 /* STT: Skin Temperature Tracking */ 37 #define SET_STT_LIMIT_APU 0x19 38 #define SET_STT_LIMIT_HS2 0x1A 39 #define SET_SPPT_APU_ONLY 0x1D 40 #define GET_SPPT_APU_ONLY 0x1E 41 #define GET_STT_MIN_LIMIT 0x1F 42 #define GET_STT_LIMIT_APU 0x20 43 #define GET_STT_LIMIT_HS2 0x21 44 45 /* Fan Index for Auto Mode */ 46 #define FAN_INDEX_AUTO 0xFFFFFFFF 47 48 #define ARG_NONE 0 49 #define AVG_SAMPLE_SIZE 3 50 51 /* AMD PMF BIOS interfaces */ 52 struct apmf_verify_interface { 53 u16 size; 54 u16 version; 55 u32 notification_mask; 56 u32 supported_functions; 57 } __packed; 58 59 struct apmf_system_params { 60 u16 size; 61 u32 valid_mask; 62 u32 flags; 63 u8 command_code; 64 u32 heartbeat_int; 65 } __packed; 66 67 struct apmf_sbios_req { 68 u16 size; 69 u32 pending_req; 70 u8 rsd; 71 u8 cql_event; 72 u8 amt_event; 73 u32 fppt; 74 u32 sppt; 75 u32 fppt_apu_only; 76 u32 spl; 77 u32 stt_min_limit; 78 u8 skin_temp_apu; 79 u8 skin_temp_hs2; 80 } __packed; 81 82 struct apmf_fan_idx { 83 u16 size; 84 u8 fan_ctl_mode; 85 u32 fan_ctl_idx; 86 } __packed; 87 88 struct smu_pmf_metrics { 89 u16 gfxclk_freq; /* in MHz */ 90 u16 socclk_freq; /* in MHz */ 91 u16 vclk_freq; /* in MHz */ 92 u16 dclk_freq; /* in MHz */ 93 u16 memclk_freq; /* in MHz */ 94 u16 spare; 95 u16 gfx_activity; /* in Centi */ 96 u16 uvd_activity; /* in Centi */ 97 u16 voltage[2]; /* in mV */ 98 u16 currents[2]; /* in mA */ 99 u16 power[2];/* in mW */ 100 u16 core_freq[8]; /* in MHz */ 101 u16 core_power[8]; /* in mW */ 102 u16 core_temp[8]; /* in centi-Celsius */ 103 u16 l3_freq; /* in MHz */ 104 u16 l3_temp; /* in centi-Celsius */ 105 u16 gfx_temp; /* in centi-Celsius */ 106 u16 soc_temp; /* in centi-Celsius */ 107 u16 throttler_status; 108 u16 current_socketpower; /* in mW */ 109 u16 stapm_orig_limit; /* in W */ 110 u16 stapm_cur_limit; /* in W */ 111 u32 apu_power; /* in mW */ 112 u32 dgpu_power; /* in mW */ 113 u16 vdd_tdc_val; /* in mA */ 114 u16 soc_tdc_val; /* in mA */ 115 u16 vdd_edc_val; /* in mA */ 116 u16 soc_edcv_al; /* in mA */ 117 u16 infra_cpu_maxfreq; /* in MHz */ 118 u16 infra_gfx_maxfreq; /* in MHz */ 119 u16 skin_temp; /* in centi-Celsius */ 120 u16 device_state; 121 } __packed; 122 123 enum amd_stt_skin_temp { 124 STT_TEMP_APU, 125 STT_TEMP_HS2, 126 STT_TEMP_COUNT, 127 }; 128 129 enum amd_slider_op { 130 SLIDER_OP_GET, 131 SLIDER_OP_SET, 132 }; 133 134 enum power_source { 135 POWER_SOURCE_AC, 136 POWER_SOURCE_DC, 137 POWER_SOURCE_MAX, 138 }; 139 140 enum power_modes { 141 POWER_MODE_PERFORMANCE, 142 POWER_MODE_BALANCED_POWER, 143 POWER_MODE_POWER_SAVER, 144 POWER_MODE_MAX, 145 }; 146 147 struct amd_pmf_dev { 148 void __iomem *regbase; 149 void __iomem *smu_virt_addr; 150 void *buf; 151 u32 base_addr; 152 u32 cpu_id; 153 struct device *dev; 154 struct mutex lock; /* protects the PMF interface */ 155 u32 supported_func; 156 enum platform_profile_option current_profile; 157 struct platform_profile_handler pprof; 158 struct dentry *dbgfs_dir; 159 int hb_interval; /* SBIOS heartbeat interval */ 160 struct delayed_work heart_beat; 161 struct smu_pmf_metrics m_table; 162 struct delayed_work work_buffer; 163 ktime_t start_time; 164 int socket_power_history[AVG_SAMPLE_SIZE]; 165 int socket_power_history_idx; 166 bool amt_enabled; 167 struct mutex update_mutex; /* protects race between ACPI handler and metrics thread */ 168 }; 169 170 struct apmf_sps_prop_granular { 171 u32 fppt; 172 u32 sppt; 173 u32 sppt_apu_only; 174 u32 spl; 175 u32 stt_min; 176 u8 stt_skin_temp[STT_TEMP_COUNT]; 177 u32 fan_id; 178 } __packed; 179 180 /* Static Slider */ 181 struct apmf_static_slider_granular_output { 182 u16 size; 183 struct apmf_sps_prop_granular prop[POWER_SOURCE_MAX * POWER_MODE_MAX]; 184 } __packed; 185 186 struct amd_pmf_static_slider_granular { 187 u16 size; 188 struct apmf_sps_prop_granular prop[POWER_SOURCE_MAX][POWER_MODE_MAX]; 189 }; 190 191 struct fan_table_control { 192 bool manual; 193 unsigned long fan_id; 194 }; 195 196 struct power_table_control { 197 u32 spl; 198 u32 sppt; 199 u32 fppt; 200 u32 sppt_apu_only; 201 u32 stt_min; 202 u32 stt_skin_temp[STT_TEMP_COUNT]; 203 u32 reserved[16]; 204 }; 205 206 /* Auto Mode Layer */ 207 enum auto_mode_transition_priority { 208 AUTO_TRANSITION_TO_PERFORMANCE, /* Any other mode to Performance Mode */ 209 AUTO_TRANSITION_FROM_QUIET_TO_BALANCE, /* Quiet Mode to Balance Mode */ 210 AUTO_TRANSITION_TO_QUIET, /* Any other mode to Quiet Mode */ 211 AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE, /* Performance Mode to Balance Mode */ 212 AUTO_TRANSITION_MAX, 213 }; 214 215 enum auto_mode_mode { 216 AUTO_QUIET, 217 AUTO_BALANCE, 218 AUTO_PERFORMANCE_ON_LAP, 219 AUTO_PERFORMANCE, 220 AUTO_MODE_MAX, 221 }; 222 223 struct auto_mode_trans_params { 224 u32 time_constant; /* minimum time required to switch to next mode */ 225 u32 power_delta; /* delta power to shift mode */ 226 u32 power_threshold; 227 u32 timer; /* elapsed time. if timer > TimeThreshold, it will move to next mode */ 228 u32 applied; 229 enum auto_mode_mode target_mode; 230 u32 shifting_up; 231 }; 232 233 struct auto_mode_mode_settings { 234 struct power_table_control power_control; 235 struct fan_table_control fan_control; 236 u32 power_floor; 237 }; 238 239 struct auto_mode_mode_config { 240 struct auto_mode_trans_params transition[AUTO_TRANSITION_MAX]; 241 struct auto_mode_mode_settings mode_set[AUTO_MODE_MAX]; 242 enum auto_mode_mode current_mode; 243 }; 244 245 struct apmf_auto_mode { 246 u16 size; 247 /* time constant */ 248 u32 balanced_to_perf; 249 u32 perf_to_balanced; 250 u32 quiet_to_balanced; 251 u32 balanced_to_quiet; 252 /* power floor */ 253 u32 pfloor_perf; 254 u32 pfloor_balanced; 255 u32 pfloor_quiet; 256 /* Power delta for mode change */ 257 u32 pd_balanced_to_perf; 258 u32 pd_perf_to_balanced; 259 u32 pd_quiet_to_balanced; 260 u32 pd_balanced_to_quiet; 261 /* skin temperature limits */ 262 u8 stt_apu_perf_on_lap; /* CQL ON */ 263 u8 stt_hs2_perf_on_lap; /* CQL ON */ 264 u8 stt_apu_perf; 265 u8 stt_hs2_perf; 266 u8 stt_apu_balanced; 267 u8 stt_hs2_balanced; 268 u8 stt_apu_quiet; 269 u8 stt_hs2_quiet; 270 u32 stt_min_limit_perf_on_lap; /* CQL ON */ 271 u32 stt_min_limit_perf; 272 u32 stt_min_limit_balanced; 273 u32 stt_min_limit_quiet; 274 /* SPL based */ 275 u32 fppt_perf_on_lap; /* CQL ON */ 276 u32 sppt_perf_on_lap; /* CQL ON */ 277 u32 spl_perf_on_lap; /* CQL ON */ 278 u32 sppt_apu_only_perf_on_lap; /* CQL ON */ 279 u32 fppt_perf; 280 u32 sppt_perf; 281 u32 spl_perf; 282 u32 sppt_apu_only_perf; 283 u32 fppt_balanced; 284 u32 sppt_balanced; 285 u32 spl_balanced; 286 u32 sppt_apu_only_balanced; 287 u32 fppt_quiet; 288 u32 sppt_quiet; 289 u32 spl_quiet; 290 u32 sppt_apu_only_quiet; 291 /* Fan ID */ 292 u32 fan_id_perf; 293 u32 fan_id_balanced; 294 u32 fan_id_quiet; 295 } __packed; 296 297 /* Core Layer */ 298 int apmf_acpi_init(struct amd_pmf_dev *pmf_dev); 299 void apmf_acpi_deinit(struct amd_pmf_dev *pmf_dev); 300 int is_apmf_func_supported(struct amd_pmf_dev *pdev, unsigned long index); 301 int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 *data); 302 int amd_pmf_init_metrics_table(struct amd_pmf_dev *dev); 303 int amd_pmf_get_power_source(void); 304 305 /* SPS Layer */ 306 int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf); 307 void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx, 308 struct amd_pmf_static_slider_granular *table); 309 int amd_pmf_init_sps(struct amd_pmf_dev *dev); 310 void amd_pmf_deinit_sps(struct amd_pmf_dev *dev); 311 int apmf_get_static_slider_granular(struct amd_pmf_dev *pdev, 312 struct apmf_static_slider_granular_output *output); 313 314 315 int apmf_update_fan_idx(struct amd_pmf_dev *pdev, bool manual, u32 idx); 316 317 /* Auto Mode Layer */ 318 int apmf_get_auto_mode_def(struct amd_pmf_dev *pdev, struct apmf_auto_mode *data); 319 void amd_pmf_init_auto_mode(struct amd_pmf_dev *dev); 320 void amd_pmf_deinit_auto_mode(struct amd_pmf_dev *dev); 321 void amd_pmf_trans_automode(struct amd_pmf_dev *dev, int socket_power, ktime_t time_elapsed_ms); 322 int apmf_get_sbios_requests(struct amd_pmf_dev *pdev, struct apmf_sbios_req *req); 323 324 void amd_pmf_update_2_cql(struct amd_pmf_dev *dev, bool is_cql_event); 325 int amd_pmf_reset_amt(struct amd_pmf_dev *dev); 326 void amd_pmf_handle_amt(struct amd_pmf_dev *dev); 327 #endif /* PMF_H */ 328