1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Spreadtrum pin controller driver 4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/init.h> 10 #include <linux/io.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/pinctrl/machine.h> 17 #include <linux/pinctrl/pinconf.h> 18 #include <linux/pinctrl/pinconf-generic.h> 19 #include <linux/pinctrl/pinctrl.h> 20 #include <linux/pinctrl/pinmux.h> 21 #include <linux/slab.h> 22 23 #include "../core.h" 24 #include "../pinmux.h" 25 #include "../pinconf.h" 26 #include "../pinctrl-utils.h" 27 #include "pinctrl-sprd.h" 28 29 #define PINCTRL_BIT_MASK(width) (~(~0UL << (width))) 30 #define PINCTRL_REG_OFFSET 0x20 31 #define PINCTRL_REG_MISC_OFFSET 0x4020 32 #define PINCTRL_REG_LEN 0x4 33 34 #define PIN_FUNC_MASK (BIT(4) | BIT(5)) 35 #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK 36 #define PIN_FUNC_SEL_2 BIT(4) 37 #define PIN_FUNC_SEL_3 BIT(5) 38 #define PIN_FUNC_SEL_4 PIN_FUNC_MASK 39 40 #define AP_SLEEP_MODE BIT(13) 41 #define PUBCP_SLEEP_MODE BIT(14) 42 #define TGLDSP_SLEEP_MODE BIT(15) 43 #define AGDSP_SLEEP_MODE BIT(16) 44 #define CM4_SLEEP_MODE BIT(17) 45 #define SLEEP_MODE_MASK GENMASK(5, 0) 46 #define SLEEP_MODE_SHIFT 13 47 48 #define SLEEP_INPUT BIT(1) 49 #define SLEEP_INPUT_MASK 0x1 50 #define SLEEP_INPUT_SHIFT 1 51 52 #define SLEEP_OUTPUT BIT(0) 53 #define SLEEP_OUTPUT_MASK 0x1 54 #define SLEEP_OUTPUT_SHIFT 0 55 56 #define DRIVE_STRENGTH_MASK GENMASK(3, 0) 57 #define DRIVE_STRENGTH_SHIFT 19 58 59 #define SLEEP_PULL_DOWN BIT(2) 60 #define SLEEP_PULL_DOWN_MASK 0x1 61 #define SLEEP_PULL_DOWN_SHIFT 2 62 63 #define PULL_DOWN BIT(6) 64 #define PULL_DOWN_MASK 0x1 65 #define PULL_DOWN_SHIFT 6 66 67 #define SLEEP_PULL_UP BIT(3) 68 #define SLEEP_PULL_UP_MASK 0x1 69 #define SLEEP_PULL_UP_SHIFT 3 70 71 #define PULL_UP_20K (BIT(12) | BIT(7)) 72 #define PULL_UP_4_7K BIT(12) 73 #define PULL_UP_MASK 0x21 74 #define PULL_UP_SHIFT 7 75 76 #define INPUT_SCHMITT BIT(11) 77 #define INPUT_SCHMITT_MASK 0x1 78 #define INPUT_SCHMITT_SHIFT 11 79 80 enum pin_sleep_mode { 81 AP_SLEEP = BIT(0), 82 PUBCP_SLEEP = BIT(1), 83 TGLDSP_SLEEP = BIT(2), 84 AGDSP_SLEEP = BIT(3), 85 CM4_SLEEP = BIT(4), 86 }; 87 88 enum pin_func_sel { 89 PIN_FUNC_1, 90 PIN_FUNC_2, 91 PIN_FUNC_3, 92 PIN_FUNC_4, 93 PIN_FUNC_MAX, 94 }; 95 96 /** 97 * struct sprd_pin: represent one pin's description 98 * @name: pin name 99 * @number: pin number 100 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN 101 * @reg: pin register address 102 * @bit_offset: bit offset in pin register 103 * @bit_width: bit width in pin register 104 */ 105 struct sprd_pin { 106 const char *name; 107 unsigned int number; 108 enum pin_type type; 109 unsigned long reg; 110 unsigned long bit_offset; 111 unsigned long bit_width; 112 }; 113 114 /** 115 * struct sprd_pin_group: represent one group's description 116 * @name: group name 117 * @npins: pin numbers of this group 118 * @pins: pointer to pins array 119 */ 120 struct sprd_pin_group { 121 const char *name; 122 unsigned int npins; 123 unsigned int *pins; 124 }; 125 126 /** 127 * struct sprd_pinctrl_soc_info: represent the SoC's pins description 128 * @groups: pointer to groups of pins 129 * @ngroups: group numbers of the whole SoC 130 * @pins: pointer to pins description 131 * @npins: pin numbers of the whole SoC 132 * @grp_names: pointer to group names array 133 */ 134 struct sprd_pinctrl_soc_info { 135 struct sprd_pin_group *groups; 136 unsigned int ngroups; 137 struct sprd_pin *pins; 138 unsigned int npins; 139 const char **grp_names; 140 }; 141 142 /** 143 * struct sprd_pinctrl: represent the pin controller device 144 * @dev: pointer to the device structure 145 * @pctl: pointer to the pinctrl handle 146 * @base: base address of the controller 147 * @info: pointer to SoC's pins description information 148 */ 149 struct sprd_pinctrl { 150 struct device *dev; 151 struct pinctrl_dev *pctl; 152 void __iomem *base; 153 struct sprd_pinctrl_soc_info *info; 154 }; 155 156 #define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1) 157 #define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2) 158 159 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl, 160 const char *name) 161 { 162 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 163 int i; 164 165 for (i = 0; i < info->npins; i++) { 166 if (!strcmp(info->pins[i].name, name)) 167 return info->pins[i].number; 168 } 169 170 return -ENODEV; 171 } 172 173 static struct sprd_pin * 174 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id) 175 { 176 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 177 struct sprd_pin *pin = NULL; 178 int i; 179 180 for (i = 0; i < info->npins; i++) { 181 if (info->pins[i].number == id) { 182 pin = &info->pins[i]; 183 break; 184 } 185 } 186 187 return pin; 188 } 189 190 static const struct sprd_pin_group * 191 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl, 192 const char *name) 193 { 194 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 195 const struct sprd_pin_group *grp = NULL; 196 int i; 197 198 for (i = 0; i < info->ngroups; i++) { 199 if (!strcmp(info->groups[i].name, name)) { 200 grp = &info->groups[i]; 201 break; 202 } 203 } 204 205 return grp; 206 } 207 208 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev) 209 { 210 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 211 struct sprd_pinctrl_soc_info *info = pctl->info; 212 213 return info->ngroups; 214 } 215 216 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev, 217 unsigned int selector) 218 { 219 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 220 struct sprd_pinctrl_soc_info *info = pctl->info; 221 222 return info->groups[selector].name; 223 } 224 225 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev, 226 unsigned int selector, 227 const unsigned int **pins, 228 unsigned int *npins) 229 { 230 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 231 struct sprd_pinctrl_soc_info *info = pctl->info; 232 233 if (selector >= info->ngroups) 234 return -EINVAL; 235 236 *pins = info->groups[selector].pins; 237 *npins = info->groups[selector].npins; 238 239 return 0; 240 } 241 242 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev, 243 struct device_node *np, 244 struct pinctrl_map **map, 245 unsigned int *num_maps) 246 { 247 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 248 const struct sprd_pin_group *grp; 249 unsigned long *configs = NULL; 250 unsigned int num_configs = 0; 251 unsigned int reserved_maps = 0; 252 unsigned int reserve = 0; 253 const char *function; 254 enum pinctrl_map_type type; 255 int ret; 256 257 grp = sprd_pinctrl_find_group_by_name(pctl, np->name); 258 if (!grp) { 259 dev_err(pctl->dev, "unable to find group for node %s\n", 260 of_node_full_name(np)); 261 return -EINVAL; 262 } 263 264 ret = of_property_count_strings(np, "pins"); 265 if (ret < 0) 266 return ret; 267 268 if (ret == 1) 269 type = PIN_MAP_TYPE_CONFIGS_PIN; 270 else 271 type = PIN_MAP_TYPE_CONFIGS_GROUP; 272 273 ret = of_property_read_string(np, "function", &function); 274 if (ret < 0) { 275 if (ret != -EINVAL) 276 dev_err(pctl->dev, 277 "%s: could not parse property function\n", 278 of_node_full_name(np)); 279 function = NULL; 280 } 281 282 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, 283 &num_configs); 284 if (ret < 0) { 285 dev_err(pctl->dev, "%s: could not parse node property\n", 286 of_node_full_name(np)); 287 return ret; 288 } 289 290 *map = NULL; 291 *num_maps = 0; 292 293 if (function != NULL) 294 reserve++; 295 if (num_configs) 296 reserve++; 297 298 ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps, 299 num_maps, reserve); 300 if (ret < 0) 301 goto out; 302 303 if (function) { 304 ret = pinctrl_utils_add_map_mux(pctldev, map, 305 &reserved_maps, num_maps, 306 grp->name, function); 307 if (ret < 0) 308 goto out; 309 } 310 311 if (num_configs) { 312 const char *group_or_pin; 313 unsigned int pin_id; 314 315 if (type == PIN_MAP_TYPE_CONFIGS_PIN) { 316 pin_id = grp->pins[0]; 317 group_or_pin = pin_get_name(pctldev, pin_id); 318 } else { 319 group_or_pin = grp->name; 320 } 321 322 ret = pinctrl_utils_add_map_configs(pctldev, map, 323 &reserved_maps, num_maps, 324 group_or_pin, configs, 325 num_configs, type); 326 } 327 328 out: 329 kfree(configs); 330 return ret; 331 } 332 333 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 334 unsigned int offset) 335 { 336 seq_printf(s, "%s", dev_name(pctldev->dev)); 337 } 338 339 static const struct pinctrl_ops sprd_pctrl_ops = { 340 .get_groups_count = sprd_pctrl_group_count, 341 .get_group_name = sprd_pctrl_group_name, 342 .get_group_pins = sprd_pctrl_group_pins, 343 .pin_dbg_show = sprd_pctrl_dbg_show, 344 .dt_node_to_map = sprd_dt_node_to_map, 345 .dt_free_map = pinctrl_utils_free_map, 346 }; 347 348 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev) 349 { 350 return PIN_FUNC_MAX; 351 } 352 353 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev, 354 unsigned int selector) 355 { 356 switch (selector) { 357 case PIN_FUNC_1: 358 return "func1"; 359 case PIN_FUNC_2: 360 return "func2"; 361 case PIN_FUNC_3: 362 return "func3"; 363 case PIN_FUNC_4: 364 return "func4"; 365 default: 366 return "null"; 367 } 368 } 369 370 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev, 371 unsigned int selector, 372 const char * const **groups, 373 unsigned int * const num_groups) 374 { 375 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 376 struct sprd_pinctrl_soc_info *info = pctl->info; 377 378 *groups = info->grp_names; 379 *num_groups = info->ngroups; 380 381 return 0; 382 } 383 384 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev, 385 unsigned int func_selector, 386 unsigned int group_selector) 387 { 388 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 389 struct sprd_pinctrl_soc_info *info = pctl->info; 390 struct sprd_pin_group *grp = &info->groups[group_selector]; 391 unsigned int i, grp_pins = grp->npins; 392 unsigned long reg; 393 unsigned int val = 0; 394 395 if (group_selector >= info->ngroups) 396 return -EINVAL; 397 398 switch (func_selector) { 399 case PIN_FUNC_1: 400 val &= PIN_FUNC_SEL_1; 401 break; 402 case PIN_FUNC_2: 403 val |= PIN_FUNC_SEL_2; 404 break; 405 case PIN_FUNC_3: 406 val |= PIN_FUNC_SEL_3; 407 break; 408 case PIN_FUNC_4: 409 val |= PIN_FUNC_SEL_4; 410 break; 411 default: 412 break; 413 } 414 415 for (i = 0; i < grp_pins; i++) { 416 unsigned int pin_id = grp->pins[i]; 417 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 418 419 if (!pin || pin->type != COMMON_PIN) 420 continue; 421 422 reg = readl((void __iomem *)pin->reg); 423 reg &= ~PIN_FUNC_MASK; 424 reg |= val; 425 writel(reg, (void __iomem *)pin->reg); 426 } 427 428 return 0; 429 } 430 431 static const struct pinmux_ops sprd_pmx_ops = { 432 .get_functions_count = sprd_pmx_get_function_count, 433 .get_function_name = sprd_pmx_get_function_name, 434 .get_function_groups = sprd_pmx_get_function_groups, 435 .set_mux = sprd_pmx_set_mux, 436 }; 437 438 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id, 439 unsigned long *config) 440 { 441 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 442 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 443 unsigned int param = pinconf_to_config_param(*config); 444 unsigned int reg, arg; 445 446 if (!pin) 447 return -EINVAL; 448 449 if (pin->type == GLOBAL_CTRL_PIN) { 450 reg = (readl((void __iomem *)pin->reg) >> 451 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 452 } else { 453 reg = readl((void __iomem *)pin->reg); 454 } 455 456 if (pin->type == GLOBAL_CTRL_PIN && 457 param == SPRD_PIN_CONFIG_CONTROL) { 458 arg = reg; 459 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) { 460 switch (param) { 461 case SPRD_PIN_CONFIG_SLEEP_MODE: 462 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK; 463 break; 464 case PIN_CONFIG_INPUT_ENABLE: 465 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK; 466 break; 467 case PIN_CONFIG_OUTPUT_ENABLE: 468 arg = reg & SLEEP_OUTPUT_MASK; 469 break; 470 case PIN_CONFIG_DRIVE_STRENGTH: 471 arg = (reg >> DRIVE_STRENGTH_SHIFT) & 472 DRIVE_STRENGTH_MASK; 473 break; 474 case PIN_CONFIG_BIAS_PULL_DOWN: 475 /* combine sleep pull down and pull down config */ 476 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) & 477 SLEEP_PULL_DOWN_MASK) << 16; 478 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK; 479 break; 480 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 481 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK; 482 break; 483 case PIN_CONFIG_BIAS_PULL_UP: 484 /* combine sleep pull up and pull up config */ 485 arg = ((reg >> SLEEP_PULL_UP_SHIFT) & 486 SLEEP_PULL_UP_MASK) << 16; 487 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK; 488 break; 489 case PIN_CONFIG_BIAS_DISABLE: 490 if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) || 491 (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K))) 492 return -EINVAL; 493 494 arg = 1; 495 break; 496 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 497 arg = 0; 498 break; 499 default: 500 return -ENOTSUPP; 501 } 502 } else { 503 return -ENOTSUPP; 504 } 505 506 *config = pinconf_to_config_packed(param, arg); 507 return 0; 508 } 509 510 static unsigned int sprd_pinconf_drive(unsigned int mA) 511 { 512 unsigned int val = 0; 513 514 switch (mA) { 515 case 2: 516 break; 517 case 4: 518 val |= BIT(19); 519 break; 520 case 6: 521 val |= BIT(20); 522 break; 523 case 8: 524 val |= BIT(19) | BIT(20); 525 break; 526 case 10: 527 val |= BIT(21); 528 break; 529 case 12: 530 val |= BIT(21) | BIT(19); 531 break; 532 case 14: 533 val |= BIT(21) | BIT(20); 534 break; 535 case 16: 536 val |= BIT(19) | BIT(20) | BIT(21); 537 break; 538 case 20: 539 val |= BIT(22); 540 break; 541 case 21: 542 val |= BIT(22) | BIT(19); 543 break; 544 case 24: 545 val |= BIT(22) | BIT(20); 546 break; 547 case 25: 548 val |= BIT(22) | BIT(20) | BIT(19); 549 break; 550 case 27: 551 val |= BIT(22) | BIT(21); 552 break; 553 case 29: 554 val |= BIT(22) | BIT(21) | BIT(19); 555 break; 556 case 31: 557 val |= BIT(22) | BIT(21) | BIT(20); 558 break; 559 case 33: 560 val |= BIT(22) | BIT(21) | BIT(20) | BIT(19); 561 break; 562 default: 563 break; 564 } 565 566 return val; 567 } 568 569 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs, 570 unsigned int num_configs) 571 { 572 unsigned int param; 573 int i; 574 575 for (i = 0; i < num_configs; i++) { 576 param = pinconf_to_config_param(configs[i]); 577 if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE) 578 return true; 579 } 580 581 return false; 582 } 583 584 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id, 585 unsigned long *configs, unsigned int num_configs) 586 { 587 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 588 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 589 bool is_sleep_config; 590 unsigned long reg; 591 int i; 592 593 if (!pin) 594 return -EINVAL; 595 596 is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs); 597 598 for (i = 0; i < num_configs; i++) { 599 unsigned int param, arg, shift, mask, val; 600 601 param = pinconf_to_config_param(configs[i]); 602 arg = pinconf_to_config_argument(configs[i]); 603 604 val = 0; 605 shift = 0; 606 mask = 0; 607 if (pin->type == GLOBAL_CTRL_PIN && 608 param == SPRD_PIN_CONFIG_CONTROL) { 609 val = arg; 610 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) { 611 switch (param) { 612 case SPRD_PIN_CONFIG_SLEEP_MODE: 613 if (arg & AP_SLEEP) 614 val |= AP_SLEEP_MODE; 615 if (arg & PUBCP_SLEEP) 616 val |= PUBCP_SLEEP_MODE; 617 if (arg & TGLDSP_SLEEP) 618 val |= TGLDSP_SLEEP_MODE; 619 if (arg & AGDSP_SLEEP) 620 val |= AGDSP_SLEEP_MODE; 621 if (arg & CM4_SLEEP) 622 val |= CM4_SLEEP_MODE; 623 624 mask = SLEEP_MODE_MASK; 625 shift = SLEEP_MODE_SHIFT; 626 break; 627 case PIN_CONFIG_INPUT_ENABLE: 628 if (is_sleep_config == true) { 629 if (arg > 0) 630 val |= SLEEP_INPUT; 631 else 632 val &= ~SLEEP_INPUT; 633 634 mask = SLEEP_INPUT_MASK; 635 shift = SLEEP_INPUT_SHIFT; 636 } 637 break; 638 case PIN_CONFIG_OUTPUT_ENABLE: 639 if (is_sleep_config == true) { 640 if (arg > 0) 641 val |= SLEEP_OUTPUT; 642 else 643 val &= ~SLEEP_OUTPUT; 644 645 mask = SLEEP_OUTPUT_MASK; 646 shift = SLEEP_OUTPUT_SHIFT; 647 } 648 break; 649 case PIN_CONFIG_DRIVE_STRENGTH: 650 if (arg < 2 || arg > 60) 651 return -EINVAL; 652 653 val = sprd_pinconf_drive(arg); 654 mask = DRIVE_STRENGTH_MASK; 655 shift = DRIVE_STRENGTH_SHIFT; 656 break; 657 case PIN_CONFIG_BIAS_PULL_DOWN: 658 if (is_sleep_config == true) { 659 val |= SLEEP_PULL_DOWN; 660 mask = SLEEP_PULL_DOWN_MASK; 661 shift = SLEEP_PULL_DOWN_SHIFT; 662 } else { 663 val |= PULL_DOWN; 664 mask = PULL_DOWN_MASK; 665 shift = PULL_DOWN_SHIFT; 666 } 667 break; 668 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 669 if (arg > 0) 670 val |= INPUT_SCHMITT; 671 else 672 val &= ~INPUT_SCHMITT; 673 674 mask = INPUT_SCHMITT_MASK; 675 shift = INPUT_SCHMITT_SHIFT; 676 break; 677 case PIN_CONFIG_BIAS_PULL_UP: 678 if (is_sleep_config == true) { 679 val |= SLEEP_PULL_UP; 680 mask = SLEEP_PULL_UP_MASK; 681 shift = SLEEP_PULL_UP_SHIFT; 682 } else { 683 if (arg == 20000) 684 val |= PULL_UP_20K; 685 else if (arg == 4700) 686 val |= PULL_UP_4_7K; 687 688 mask = PULL_UP_MASK; 689 shift = PULL_UP_SHIFT; 690 } 691 break; 692 case PIN_CONFIG_BIAS_DISABLE: 693 if (is_sleep_config == true) { 694 val = shift = 0; 695 mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP; 696 } else { 697 val = shift = 0; 698 mask = PULL_DOWN | PULL_UP_20K | 699 PULL_UP_4_7K; 700 } 701 break; 702 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 703 continue; 704 default: 705 return -ENOTSUPP; 706 } 707 } else { 708 return -ENOTSUPP; 709 } 710 711 if (pin->type == GLOBAL_CTRL_PIN) { 712 reg = readl((void __iomem *)pin->reg); 713 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width) 714 << pin->bit_offset); 715 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width)) 716 << pin->bit_offset; 717 writel(reg, (void __iomem *)pin->reg); 718 } else { 719 reg = readl((void __iomem *)pin->reg); 720 reg &= ~(mask << shift); 721 reg |= val; 722 writel(reg, (void __iomem *)pin->reg); 723 } 724 } 725 726 return 0; 727 } 728 729 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev, 730 unsigned int selector, unsigned long *config) 731 { 732 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 733 struct sprd_pinctrl_soc_info *info = pctl->info; 734 struct sprd_pin_group *grp; 735 unsigned int pin_id; 736 737 if (selector >= info->ngroups) 738 return -EINVAL; 739 740 grp = &info->groups[selector]; 741 pin_id = grp->pins[0]; 742 743 return sprd_pinconf_get(pctldev, pin_id, config); 744 } 745 746 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev, 747 unsigned int selector, 748 unsigned long *configs, 749 unsigned int num_configs) 750 { 751 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 752 struct sprd_pinctrl_soc_info *info = pctl->info; 753 struct sprd_pin_group *grp; 754 int ret, i; 755 756 if (selector >= info->ngroups) 757 return -EINVAL; 758 759 grp = &info->groups[selector]; 760 761 for (i = 0; i < grp->npins; i++) { 762 unsigned int pin_id = grp->pins[i]; 763 764 ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs); 765 if (ret) 766 return ret; 767 } 768 769 return 0; 770 } 771 772 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev, 773 unsigned int pin_id, 774 unsigned long *config) 775 { 776 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 777 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 778 779 if (!pin) 780 return -EINVAL; 781 782 if (pin->type == GLOBAL_CTRL_PIN) { 783 *config = (readl((void __iomem *)pin->reg) >> 784 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 785 } else { 786 *config = readl((void __iomem *)pin->reg); 787 } 788 789 return 0; 790 } 791 792 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev, 793 struct seq_file *s, unsigned int pin_id) 794 { 795 unsigned long config; 796 int ret; 797 798 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 799 if (ret) 800 return; 801 802 seq_printf(s, "0x%lx", config); 803 } 804 805 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 806 struct seq_file *s, 807 unsigned int selector) 808 { 809 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 810 struct sprd_pinctrl_soc_info *info = pctl->info; 811 struct sprd_pin_group *grp; 812 unsigned long config; 813 const char *name; 814 int i, ret; 815 816 if (selector >= info->ngroups) 817 return; 818 819 grp = &info->groups[selector]; 820 821 seq_putc(s, '\n'); 822 for (i = 0; i < grp->npins; i++, config++) { 823 unsigned int pin_id = grp->pins[i]; 824 825 name = pin_get_name(pctldev, pin_id); 826 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 827 if (ret) 828 return; 829 830 seq_printf(s, "%s: 0x%lx ", name, config); 831 } 832 } 833 834 static const struct pinconf_ops sprd_pinconf_ops = { 835 .is_generic = true, 836 .pin_config_get = sprd_pinconf_get, 837 .pin_config_set = sprd_pinconf_set, 838 .pin_config_group_get = sprd_pinconf_group_get, 839 .pin_config_group_set = sprd_pinconf_group_set, 840 .pin_config_dbg_show = sprd_pinconf_dbg_show, 841 .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show, 842 }; 843 844 static const struct pinconf_generic_params sprd_dt_params[] = { 845 {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0}, 846 {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0}, 847 }; 848 849 #ifdef CONFIG_DEBUG_FS 850 static const struct pin_config_item sprd_conf_items[] = { 851 PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true), 852 PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true), 853 }; 854 #endif 855 856 static struct pinctrl_desc sprd_pinctrl_desc = { 857 .pctlops = &sprd_pctrl_ops, 858 .pmxops = &sprd_pmx_ops, 859 .confops = &sprd_pinconf_ops, 860 .num_custom_params = ARRAY_SIZE(sprd_dt_params), 861 .custom_params = sprd_dt_params, 862 #ifdef CONFIG_DEBUG_FS 863 .custom_conf_items = sprd_conf_items, 864 #endif 865 .owner = THIS_MODULE, 866 }; 867 868 static int sprd_pinctrl_parse_groups(struct device_node *np, 869 struct sprd_pinctrl *sprd_pctl, 870 struct sprd_pin_group *grp) 871 { 872 struct property *prop; 873 const char *pin_name; 874 int ret, i = 0; 875 876 ret = of_property_count_strings(np, "pins"); 877 if (ret < 0) 878 return ret; 879 880 grp->name = np->name; 881 grp->npins = ret; 882 grp->pins = devm_kcalloc(sprd_pctl->dev, 883 grp->npins, sizeof(unsigned int), 884 GFP_KERNEL); 885 if (!grp->pins) 886 return -ENOMEM; 887 888 of_property_for_each_string(np, "pins", prop, pin_name) { 889 ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name); 890 if (ret >= 0) 891 grp->pins[i++] = ret; 892 } 893 894 for (i = 0; i < grp->npins; i++) { 895 dev_dbg(sprd_pctl->dev, 896 "Group[%s] contains [%d] pins: id = %d\n", 897 grp->name, grp->npins, grp->pins[i]); 898 } 899 900 return 0; 901 } 902 903 static unsigned int sprd_pinctrl_get_groups(struct device_node *np) 904 { 905 struct device_node *child; 906 unsigned int group_cnt, cnt; 907 908 group_cnt = of_get_child_count(np); 909 910 for_each_child_of_node(np, child) { 911 cnt = of_get_child_count(child); 912 if (cnt > 0) 913 group_cnt += cnt; 914 } 915 916 return group_cnt; 917 } 918 919 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl) 920 { 921 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 922 struct device_node *np = sprd_pctl->dev->of_node; 923 struct device_node *child, *sub_child; 924 struct sprd_pin_group *grp; 925 const char **temp; 926 int ret; 927 928 if (!np) 929 return -ENODEV; 930 931 info->ngroups = sprd_pinctrl_get_groups(np); 932 if (!info->ngroups) 933 return 0; 934 935 info->groups = devm_kcalloc(sprd_pctl->dev, 936 info->ngroups, 937 sizeof(struct sprd_pin_group), 938 GFP_KERNEL); 939 if (!info->groups) 940 return -ENOMEM; 941 942 info->grp_names = devm_kcalloc(sprd_pctl->dev, 943 info->ngroups, sizeof(char *), 944 GFP_KERNEL); 945 if (!info->grp_names) 946 return -ENOMEM; 947 948 temp = info->grp_names; 949 grp = info->groups; 950 951 for_each_child_of_node(np, child) { 952 ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp); 953 if (ret) { 954 of_node_put(child); 955 return ret; 956 } 957 958 *temp++ = grp->name; 959 grp++; 960 961 if (of_get_child_count(child) > 0) { 962 for_each_child_of_node(child, sub_child) { 963 ret = sprd_pinctrl_parse_groups(sub_child, 964 sprd_pctl, grp); 965 if (ret) { 966 of_node_put(sub_child); 967 of_node_put(child); 968 return ret; 969 } 970 971 *temp++ = grp->name; 972 grp++; 973 } 974 } 975 } 976 977 return 0; 978 } 979 980 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl, 981 struct sprd_pins_info *sprd_soc_pin_info, 982 int pins_cnt) 983 { 984 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 985 unsigned int ctrl_pin = 0, com_pin = 0; 986 struct sprd_pin *pin; 987 int i; 988 989 info->npins = pins_cnt; 990 info->pins = devm_kcalloc(sprd_pctl->dev, 991 info->npins, sizeof(struct sprd_pin), 992 GFP_KERNEL); 993 if (!info->pins) 994 return -ENOMEM; 995 996 for (i = 0, pin = info->pins; i < info->npins; i++, pin++) { 997 unsigned int reg; 998 999 pin->name = sprd_soc_pin_info[i].name; 1000 pin->type = sprd_soc_pin_info[i].type; 1001 pin->number = sprd_soc_pin_info[i].num; 1002 reg = sprd_soc_pin_info[i].reg; 1003 if (pin->type == GLOBAL_CTRL_PIN) { 1004 pin->reg = (unsigned long)sprd_pctl->base + 1005 PINCTRL_REG_LEN * reg; 1006 pin->bit_offset = sprd_soc_pin_info[i].bit_offset; 1007 pin->bit_width = sprd_soc_pin_info[i].bit_width; 1008 ctrl_pin++; 1009 } else if (pin->type == COMMON_PIN) { 1010 pin->reg = (unsigned long)sprd_pctl->base + 1011 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN * 1012 (i - ctrl_pin); 1013 com_pin++; 1014 } else if (pin->type == MISC_PIN) { 1015 pin->reg = (unsigned long)sprd_pctl->base + 1016 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN * 1017 (i - ctrl_pin - com_pin); 1018 } 1019 } 1020 1021 for (i = 0, pin = info->pins; i < info->npins; pin++, i++) { 1022 dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, " 1023 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n", 1024 pin->name, pin->number, pin->type, 1025 pin->bit_offset, pin->bit_width, pin->reg); 1026 } 1027 1028 return 0; 1029 } 1030 1031 int sprd_pinctrl_core_probe(struct platform_device *pdev, 1032 struct sprd_pins_info *sprd_soc_pin_info, 1033 int pins_cnt) 1034 { 1035 struct sprd_pinctrl *sprd_pctl; 1036 struct sprd_pinctrl_soc_info *pinctrl_info; 1037 struct pinctrl_pin_desc *pin_desc; 1038 int ret, i; 1039 1040 sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl), 1041 GFP_KERNEL); 1042 if (!sprd_pctl) 1043 return -ENOMEM; 1044 1045 sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0); 1046 if (IS_ERR(sprd_pctl->base)) 1047 return PTR_ERR(sprd_pctl->base); 1048 1049 pinctrl_info = devm_kzalloc(&pdev->dev, 1050 sizeof(struct sprd_pinctrl_soc_info), 1051 GFP_KERNEL); 1052 if (!pinctrl_info) 1053 return -ENOMEM; 1054 1055 sprd_pctl->info = pinctrl_info; 1056 sprd_pctl->dev = &pdev->dev; 1057 platform_set_drvdata(pdev, sprd_pctl); 1058 1059 ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt); 1060 if (ret) { 1061 dev_err(&pdev->dev, "fail to add pins information\n"); 1062 return ret; 1063 } 1064 1065 ret = sprd_pinctrl_parse_dt(sprd_pctl); 1066 if (ret) { 1067 dev_err(&pdev->dev, "fail to parse dt properties\n"); 1068 return ret; 1069 } 1070 1071 pin_desc = devm_kcalloc(&pdev->dev, 1072 pinctrl_info->npins, 1073 sizeof(struct pinctrl_pin_desc), 1074 GFP_KERNEL); 1075 if (!pin_desc) 1076 return -ENOMEM; 1077 1078 for (i = 0; i < pinctrl_info->npins; i++) { 1079 pin_desc[i].number = pinctrl_info->pins[i].number; 1080 pin_desc[i].name = pinctrl_info->pins[i].name; 1081 pin_desc[i].drv_data = pinctrl_info; 1082 } 1083 1084 sprd_pinctrl_desc.pins = pin_desc; 1085 sprd_pinctrl_desc.name = dev_name(&pdev->dev); 1086 sprd_pinctrl_desc.npins = pinctrl_info->npins; 1087 1088 sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc, 1089 &pdev->dev, (void *)sprd_pctl); 1090 if (IS_ERR(sprd_pctl->pctl)) { 1091 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 1092 return PTR_ERR(sprd_pctl->pctl); 1093 } 1094 1095 return 0; 1096 } 1097 EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe); 1098 1099 int sprd_pinctrl_remove(struct platform_device *pdev) 1100 { 1101 struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev); 1102 1103 pinctrl_unregister(sprd_pctl->pctl); 1104 return 0; 1105 } 1106 EXPORT_SYMBOL_GPL(sprd_pinctrl_remove); 1107 1108 void sprd_pinctrl_shutdown(struct platform_device *pdev) 1109 { 1110 struct pinctrl *pinctl; 1111 struct pinctrl_state *state; 1112 1113 pinctl = devm_pinctrl_get(&pdev->dev); 1114 if (IS_ERR(pinctl)) 1115 return; 1116 state = pinctrl_lookup_state(pinctl, "shutdown"); 1117 if (IS_ERR(state)) 1118 return; 1119 pinctrl_select_state(pinctl, state); 1120 } 1121 EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown); 1122 1123 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver"); 1124 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>"); 1125 MODULE_LICENSE("GPL v2"); 1126