1*52130b60SViresh Kumar /* 2*52130b60SViresh Kumar * Driver for the ST Microelectronics SPEAr310 pinmux 3*52130b60SViresh Kumar * 4*52130b60SViresh Kumar * Copyright (C) 2012 ST Microelectronics 5*52130b60SViresh Kumar * Viresh Kumar <viresh.kumar@st.com> 6*52130b60SViresh Kumar * 7*52130b60SViresh Kumar * This file is licensed under the terms of the GNU General Public 8*52130b60SViresh Kumar * License version 2. This program is licensed "as is" without any 9*52130b60SViresh Kumar * warranty of any kind, whether express or implied. 10*52130b60SViresh Kumar */ 11*52130b60SViresh Kumar 12*52130b60SViresh Kumar #include <linux/err.h> 13*52130b60SViresh Kumar #include <linux/init.h> 14*52130b60SViresh Kumar #include <linux/module.h> 15*52130b60SViresh Kumar #include <linux/of_device.h> 16*52130b60SViresh Kumar #include <linux/platform_device.h> 17*52130b60SViresh Kumar #include "pinctrl-spear3xx.h" 18*52130b60SViresh Kumar 19*52130b60SViresh Kumar #define DRIVER_NAME "spear310-pinmux" 20*52130b60SViresh Kumar 21*52130b60SViresh Kumar /* addresses */ 22*52130b60SViresh Kumar #define PMX_CONFIG_REG 0x08 23*52130b60SViresh Kumar 24*52130b60SViresh Kumar /* emi_cs_0_to_5_pins */ 25*52130b60SViresh Kumar static const unsigned emi_cs_0_to_5_pins[] = { 45, 46, 47, 48, 49, 50 }; 26*52130b60SViresh Kumar static struct spear_muxreg emi_cs_0_to_5_muxreg[] = { 27*52130b60SViresh Kumar { 28*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 29*52130b60SViresh Kumar .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, 30*52130b60SViresh Kumar .val = 0, 31*52130b60SViresh Kumar }, 32*52130b60SViresh Kumar }; 33*52130b60SViresh Kumar 34*52130b60SViresh Kumar static struct spear_modemux emi_cs_0_to_5_modemux[] = { 35*52130b60SViresh Kumar { 36*52130b60SViresh Kumar .muxregs = emi_cs_0_to_5_muxreg, 37*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(emi_cs_0_to_5_muxreg), 38*52130b60SViresh Kumar }, 39*52130b60SViresh Kumar }; 40*52130b60SViresh Kumar 41*52130b60SViresh Kumar static struct spear_pingroup emi_cs_0_to_5_pingroup = { 42*52130b60SViresh Kumar .name = "emi_cs_0_to_5_grp", 43*52130b60SViresh Kumar .pins = emi_cs_0_to_5_pins, 44*52130b60SViresh Kumar .npins = ARRAY_SIZE(emi_cs_0_to_5_pins), 45*52130b60SViresh Kumar .modemuxs = emi_cs_0_to_5_modemux, 46*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(emi_cs_0_to_5_modemux), 47*52130b60SViresh Kumar }; 48*52130b60SViresh Kumar 49*52130b60SViresh Kumar static const char *const emi_cs_0_to_5_grps[] = { "emi_cs_0_to_5_grp" }; 50*52130b60SViresh Kumar static struct spear_function emi_cs_0_to_5_function = { 51*52130b60SViresh Kumar .name = "emi", 52*52130b60SViresh Kumar .groups = emi_cs_0_to_5_grps, 53*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(emi_cs_0_to_5_grps), 54*52130b60SViresh Kumar }; 55*52130b60SViresh Kumar 56*52130b60SViresh Kumar /* uart1_pins */ 57*52130b60SViresh Kumar static const unsigned uart1_pins[] = { 0, 1 }; 58*52130b60SViresh Kumar static struct spear_muxreg uart1_muxreg[] = { 59*52130b60SViresh Kumar { 60*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 61*52130b60SViresh Kumar .mask = PMX_FIRDA_MASK, 62*52130b60SViresh Kumar .val = 0, 63*52130b60SViresh Kumar }, 64*52130b60SViresh Kumar }; 65*52130b60SViresh Kumar 66*52130b60SViresh Kumar static struct spear_modemux uart1_modemux[] = { 67*52130b60SViresh Kumar { 68*52130b60SViresh Kumar .muxregs = uart1_muxreg, 69*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(uart1_muxreg), 70*52130b60SViresh Kumar }, 71*52130b60SViresh Kumar }; 72*52130b60SViresh Kumar 73*52130b60SViresh Kumar static struct spear_pingroup uart1_pingroup = { 74*52130b60SViresh Kumar .name = "uart1_grp", 75*52130b60SViresh Kumar .pins = uart1_pins, 76*52130b60SViresh Kumar .npins = ARRAY_SIZE(uart1_pins), 77*52130b60SViresh Kumar .modemuxs = uart1_modemux, 78*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(uart1_modemux), 79*52130b60SViresh Kumar }; 80*52130b60SViresh Kumar 81*52130b60SViresh Kumar static const char *const uart1_grps[] = { "uart1_grp" }; 82*52130b60SViresh Kumar static struct spear_function uart1_function = { 83*52130b60SViresh Kumar .name = "uart1", 84*52130b60SViresh Kumar .groups = uart1_grps, 85*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(uart1_grps), 86*52130b60SViresh Kumar }; 87*52130b60SViresh Kumar 88*52130b60SViresh Kumar /* uart2_pins */ 89*52130b60SViresh Kumar static const unsigned uart2_pins[] = { 43, 44 }; 90*52130b60SViresh Kumar static struct spear_muxreg uart2_muxreg[] = { 91*52130b60SViresh Kumar { 92*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 93*52130b60SViresh Kumar .mask = PMX_TIMER_0_1_MASK, 94*52130b60SViresh Kumar .val = 0, 95*52130b60SViresh Kumar }, 96*52130b60SViresh Kumar }; 97*52130b60SViresh Kumar 98*52130b60SViresh Kumar static struct spear_modemux uart2_modemux[] = { 99*52130b60SViresh Kumar { 100*52130b60SViresh Kumar .muxregs = uart2_muxreg, 101*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(uart2_muxreg), 102*52130b60SViresh Kumar }, 103*52130b60SViresh Kumar }; 104*52130b60SViresh Kumar 105*52130b60SViresh Kumar static struct spear_pingroup uart2_pingroup = { 106*52130b60SViresh Kumar .name = "uart2_grp", 107*52130b60SViresh Kumar .pins = uart2_pins, 108*52130b60SViresh Kumar .npins = ARRAY_SIZE(uart2_pins), 109*52130b60SViresh Kumar .modemuxs = uart2_modemux, 110*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(uart2_modemux), 111*52130b60SViresh Kumar }; 112*52130b60SViresh Kumar 113*52130b60SViresh Kumar static const char *const uart2_grps[] = { "uart2_grp" }; 114*52130b60SViresh Kumar static struct spear_function uart2_function = { 115*52130b60SViresh Kumar .name = "uart2", 116*52130b60SViresh Kumar .groups = uart2_grps, 117*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(uart2_grps), 118*52130b60SViresh Kumar }; 119*52130b60SViresh Kumar 120*52130b60SViresh Kumar /* uart3_pins */ 121*52130b60SViresh Kumar static const unsigned uart3_pins[] = { 37, 38 }; 122*52130b60SViresh Kumar static struct spear_muxreg uart3_muxreg[] = { 123*52130b60SViresh Kumar { 124*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 125*52130b60SViresh Kumar .mask = PMX_UART0_MODEM_MASK, 126*52130b60SViresh Kumar .val = 0, 127*52130b60SViresh Kumar }, 128*52130b60SViresh Kumar }; 129*52130b60SViresh Kumar 130*52130b60SViresh Kumar static struct spear_modemux uart3_modemux[] = { 131*52130b60SViresh Kumar { 132*52130b60SViresh Kumar .muxregs = uart3_muxreg, 133*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(uart3_muxreg), 134*52130b60SViresh Kumar }, 135*52130b60SViresh Kumar }; 136*52130b60SViresh Kumar 137*52130b60SViresh Kumar static struct spear_pingroup uart3_pingroup = { 138*52130b60SViresh Kumar .name = "uart3_grp", 139*52130b60SViresh Kumar .pins = uart3_pins, 140*52130b60SViresh Kumar .npins = ARRAY_SIZE(uart3_pins), 141*52130b60SViresh Kumar .modemuxs = uart3_modemux, 142*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(uart3_modemux), 143*52130b60SViresh Kumar }; 144*52130b60SViresh Kumar 145*52130b60SViresh Kumar static const char *const uart3_grps[] = { "uart3_grp" }; 146*52130b60SViresh Kumar static struct spear_function uart3_function = { 147*52130b60SViresh Kumar .name = "uart3", 148*52130b60SViresh Kumar .groups = uart3_grps, 149*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(uart3_grps), 150*52130b60SViresh Kumar }; 151*52130b60SViresh Kumar 152*52130b60SViresh Kumar /* uart4_pins */ 153*52130b60SViresh Kumar static const unsigned uart4_pins[] = { 39, 40 }; 154*52130b60SViresh Kumar static struct spear_muxreg uart4_muxreg[] = { 155*52130b60SViresh Kumar { 156*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 157*52130b60SViresh Kumar .mask = PMX_UART0_MODEM_MASK, 158*52130b60SViresh Kumar .val = 0, 159*52130b60SViresh Kumar }, 160*52130b60SViresh Kumar }; 161*52130b60SViresh Kumar 162*52130b60SViresh Kumar static struct spear_modemux uart4_modemux[] = { 163*52130b60SViresh Kumar { 164*52130b60SViresh Kumar .muxregs = uart4_muxreg, 165*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(uart4_muxreg), 166*52130b60SViresh Kumar }, 167*52130b60SViresh Kumar }; 168*52130b60SViresh Kumar 169*52130b60SViresh Kumar static struct spear_pingroup uart4_pingroup = { 170*52130b60SViresh Kumar .name = "uart4_grp", 171*52130b60SViresh Kumar .pins = uart4_pins, 172*52130b60SViresh Kumar .npins = ARRAY_SIZE(uart4_pins), 173*52130b60SViresh Kumar .modemuxs = uart4_modemux, 174*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(uart4_modemux), 175*52130b60SViresh Kumar }; 176*52130b60SViresh Kumar 177*52130b60SViresh Kumar static const char *const uart4_grps[] = { "uart4_grp" }; 178*52130b60SViresh Kumar static struct spear_function uart4_function = { 179*52130b60SViresh Kumar .name = "uart4", 180*52130b60SViresh Kumar .groups = uart4_grps, 181*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(uart4_grps), 182*52130b60SViresh Kumar }; 183*52130b60SViresh Kumar 184*52130b60SViresh Kumar /* uart5_pins */ 185*52130b60SViresh Kumar static const unsigned uart5_pins[] = { 41, 42 }; 186*52130b60SViresh Kumar static struct spear_muxreg uart5_muxreg[] = { 187*52130b60SViresh Kumar { 188*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 189*52130b60SViresh Kumar .mask = PMX_UART0_MODEM_MASK, 190*52130b60SViresh Kumar .val = 0, 191*52130b60SViresh Kumar }, 192*52130b60SViresh Kumar }; 193*52130b60SViresh Kumar 194*52130b60SViresh Kumar static struct spear_modemux uart5_modemux[] = { 195*52130b60SViresh Kumar { 196*52130b60SViresh Kumar .muxregs = uart5_muxreg, 197*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(uart5_muxreg), 198*52130b60SViresh Kumar }, 199*52130b60SViresh Kumar }; 200*52130b60SViresh Kumar 201*52130b60SViresh Kumar static struct spear_pingroup uart5_pingroup = { 202*52130b60SViresh Kumar .name = "uart5_grp", 203*52130b60SViresh Kumar .pins = uart5_pins, 204*52130b60SViresh Kumar .npins = ARRAY_SIZE(uart5_pins), 205*52130b60SViresh Kumar .modemuxs = uart5_modemux, 206*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(uart5_modemux), 207*52130b60SViresh Kumar }; 208*52130b60SViresh Kumar 209*52130b60SViresh Kumar static const char *const uart5_grps[] = { "uart5_grp" }; 210*52130b60SViresh Kumar static struct spear_function uart5_function = { 211*52130b60SViresh Kumar .name = "uart5", 212*52130b60SViresh Kumar .groups = uart5_grps, 213*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(uart5_grps), 214*52130b60SViresh Kumar }; 215*52130b60SViresh Kumar 216*52130b60SViresh Kumar /* fsmc_pins */ 217*52130b60SViresh Kumar static const unsigned fsmc_pins[] = { 34, 35, 36 }; 218*52130b60SViresh Kumar static struct spear_muxreg fsmc_muxreg[] = { 219*52130b60SViresh Kumar { 220*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 221*52130b60SViresh Kumar .mask = PMX_SSP_CS_MASK, 222*52130b60SViresh Kumar .val = 0, 223*52130b60SViresh Kumar }, 224*52130b60SViresh Kumar }; 225*52130b60SViresh Kumar 226*52130b60SViresh Kumar static struct spear_modemux fsmc_modemux[] = { 227*52130b60SViresh Kumar { 228*52130b60SViresh Kumar .muxregs = fsmc_muxreg, 229*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(fsmc_muxreg), 230*52130b60SViresh Kumar }, 231*52130b60SViresh Kumar }; 232*52130b60SViresh Kumar 233*52130b60SViresh Kumar static struct spear_pingroup fsmc_pingroup = { 234*52130b60SViresh Kumar .name = "fsmc_grp", 235*52130b60SViresh Kumar .pins = fsmc_pins, 236*52130b60SViresh Kumar .npins = ARRAY_SIZE(fsmc_pins), 237*52130b60SViresh Kumar .modemuxs = fsmc_modemux, 238*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(fsmc_modemux), 239*52130b60SViresh Kumar }; 240*52130b60SViresh Kumar 241*52130b60SViresh Kumar static const char *const fsmc_grps[] = { "fsmc_grp" }; 242*52130b60SViresh Kumar static struct spear_function fsmc_function = { 243*52130b60SViresh Kumar .name = "fsmc", 244*52130b60SViresh Kumar .groups = fsmc_grps, 245*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(fsmc_grps), 246*52130b60SViresh Kumar }; 247*52130b60SViresh Kumar 248*52130b60SViresh Kumar /* rs485_0_pins */ 249*52130b60SViresh Kumar static const unsigned rs485_0_pins[] = { 19, 20, 21, 22, 23 }; 250*52130b60SViresh Kumar static struct spear_muxreg rs485_0_muxreg[] = { 251*52130b60SViresh Kumar { 252*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 253*52130b60SViresh Kumar .mask = PMX_MII_MASK, 254*52130b60SViresh Kumar .val = 0, 255*52130b60SViresh Kumar }, 256*52130b60SViresh Kumar }; 257*52130b60SViresh Kumar 258*52130b60SViresh Kumar static struct spear_modemux rs485_0_modemux[] = { 259*52130b60SViresh Kumar { 260*52130b60SViresh Kumar .muxregs = rs485_0_muxreg, 261*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(rs485_0_muxreg), 262*52130b60SViresh Kumar }, 263*52130b60SViresh Kumar }; 264*52130b60SViresh Kumar 265*52130b60SViresh Kumar static struct spear_pingroup rs485_0_pingroup = { 266*52130b60SViresh Kumar .name = "rs485_0_grp", 267*52130b60SViresh Kumar .pins = rs485_0_pins, 268*52130b60SViresh Kumar .npins = ARRAY_SIZE(rs485_0_pins), 269*52130b60SViresh Kumar .modemuxs = rs485_0_modemux, 270*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(rs485_0_modemux), 271*52130b60SViresh Kumar }; 272*52130b60SViresh Kumar 273*52130b60SViresh Kumar static const char *const rs485_0_grps[] = { "rs485_0" }; 274*52130b60SViresh Kumar static struct spear_function rs485_0_function = { 275*52130b60SViresh Kumar .name = "rs485_0", 276*52130b60SViresh Kumar .groups = rs485_0_grps, 277*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(rs485_0_grps), 278*52130b60SViresh Kumar }; 279*52130b60SViresh Kumar 280*52130b60SViresh Kumar /* rs485_1_pins */ 281*52130b60SViresh Kumar static const unsigned rs485_1_pins[] = { 14, 15, 16, 17, 18 }; 282*52130b60SViresh Kumar static struct spear_muxreg rs485_1_muxreg[] = { 283*52130b60SViresh Kumar { 284*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 285*52130b60SViresh Kumar .mask = PMX_MII_MASK, 286*52130b60SViresh Kumar .val = 0, 287*52130b60SViresh Kumar }, 288*52130b60SViresh Kumar }; 289*52130b60SViresh Kumar 290*52130b60SViresh Kumar static struct spear_modemux rs485_1_modemux[] = { 291*52130b60SViresh Kumar { 292*52130b60SViresh Kumar .muxregs = rs485_1_muxreg, 293*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(rs485_1_muxreg), 294*52130b60SViresh Kumar }, 295*52130b60SViresh Kumar }; 296*52130b60SViresh Kumar 297*52130b60SViresh Kumar static struct spear_pingroup rs485_1_pingroup = { 298*52130b60SViresh Kumar .name = "rs485_1_grp", 299*52130b60SViresh Kumar .pins = rs485_1_pins, 300*52130b60SViresh Kumar .npins = ARRAY_SIZE(rs485_1_pins), 301*52130b60SViresh Kumar .modemuxs = rs485_1_modemux, 302*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(rs485_1_modemux), 303*52130b60SViresh Kumar }; 304*52130b60SViresh Kumar 305*52130b60SViresh Kumar static const char *const rs485_1_grps[] = { "rs485_1" }; 306*52130b60SViresh Kumar static struct spear_function rs485_1_function = { 307*52130b60SViresh Kumar .name = "rs485_1", 308*52130b60SViresh Kumar .groups = rs485_1_grps, 309*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(rs485_1_grps), 310*52130b60SViresh Kumar }; 311*52130b60SViresh Kumar 312*52130b60SViresh Kumar /* tdm_pins */ 313*52130b60SViresh Kumar static const unsigned tdm_pins[] = { 10, 11, 12, 13 }; 314*52130b60SViresh Kumar static struct spear_muxreg tdm_muxreg[] = { 315*52130b60SViresh Kumar { 316*52130b60SViresh Kumar .reg = PMX_CONFIG_REG, 317*52130b60SViresh Kumar .mask = PMX_MII_MASK, 318*52130b60SViresh Kumar .val = 0, 319*52130b60SViresh Kumar }, 320*52130b60SViresh Kumar }; 321*52130b60SViresh Kumar 322*52130b60SViresh Kumar static struct spear_modemux tdm_modemux[] = { 323*52130b60SViresh Kumar { 324*52130b60SViresh Kumar .muxregs = tdm_muxreg, 325*52130b60SViresh Kumar .nmuxregs = ARRAY_SIZE(tdm_muxreg), 326*52130b60SViresh Kumar }, 327*52130b60SViresh Kumar }; 328*52130b60SViresh Kumar 329*52130b60SViresh Kumar static struct spear_pingroup tdm_pingroup = { 330*52130b60SViresh Kumar .name = "tdm_grp", 331*52130b60SViresh Kumar .pins = tdm_pins, 332*52130b60SViresh Kumar .npins = ARRAY_SIZE(tdm_pins), 333*52130b60SViresh Kumar .modemuxs = tdm_modemux, 334*52130b60SViresh Kumar .nmodemuxs = ARRAY_SIZE(tdm_modemux), 335*52130b60SViresh Kumar }; 336*52130b60SViresh Kumar 337*52130b60SViresh Kumar static const char *const tdm_grps[] = { "tdm_grp" }; 338*52130b60SViresh Kumar static struct spear_function tdm_function = { 339*52130b60SViresh Kumar .name = "tdm", 340*52130b60SViresh Kumar .groups = tdm_grps, 341*52130b60SViresh Kumar .ngroups = ARRAY_SIZE(tdm_grps), 342*52130b60SViresh Kumar }; 343*52130b60SViresh Kumar 344*52130b60SViresh Kumar /* pingroups */ 345*52130b60SViresh Kumar static struct spear_pingroup *spear310_pingroups[] = { 346*52130b60SViresh Kumar SPEAR3XX_COMMON_PINGROUPS, 347*52130b60SViresh Kumar &emi_cs_0_to_5_pingroup, 348*52130b60SViresh Kumar &uart1_pingroup, 349*52130b60SViresh Kumar &uart2_pingroup, 350*52130b60SViresh Kumar &uart3_pingroup, 351*52130b60SViresh Kumar &uart4_pingroup, 352*52130b60SViresh Kumar &uart5_pingroup, 353*52130b60SViresh Kumar &fsmc_pingroup, 354*52130b60SViresh Kumar &rs485_0_pingroup, 355*52130b60SViresh Kumar &rs485_1_pingroup, 356*52130b60SViresh Kumar &tdm_pingroup, 357*52130b60SViresh Kumar }; 358*52130b60SViresh Kumar 359*52130b60SViresh Kumar /* functions */ 360*52130b60SViresh Kumar static struct spear_function *spear310_functions[] = { 361*52130b60SViresh Kumar SPEAR3XX_COMMON_FUNCTIONS, 362*52130b60SViresh Kumar &emi_cs_0_to_5_function, 363*52130b60SViresh Kumar &uart1_function, 364*52130b60SViresh Kumar &uart2_function, 365*52130b60SViresh Kumar &uart3_function, 366*52130b60SViresh Kumar &uart4_function, 367*52130b60SViresh Kumar &uart5_function, 368*52130b60SViresh Kumar &fsmc_function, 369*52130b60SViresh Kumar &rs485_0_function, 370*52130b60SViresh Kumar &rs485_1_function, 371*52130b60SViresh Kumar &tdm_function, 372*52130b60SViresh Kumar }; 373*52130b60SViresh Kumar 374*52130b60SViresh Kumar static struct of_device_id spear310_pinctrl_of_match[] __devinitdata = { 375*52130b60SViresh Kumar { 376*52130b60SViresh Kumar .compatible = "st,spear310-pinmux", 377*52130b60SViresh Kumar }, 378*52130b60SViresh Kumar {}, 379*52130b60SViresh Kumar }; 380*52130b60SViresh Kumar 381*52130b60SViresh Kumar static int __devinit spear310_pinctrl_probe(struct platform_device *pdev) 382*52130b60SViresh Kumar { 383*52130b60SViresh Kumar int ret; 384*52130b60SViresh Kumar 385*52130b60SViresh Kumar spear3xx_machdata.groups = spear310_pingroups; 386*52130b60SViresh Kumar spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups); 387*52130b60SViresh Kumar spear3xx_machdata.functions = spear310_functions; 388*52130b60SViresh Kumar spear3xx_machdata.nfunctions = ARRAY_SIZE(spear310_functions); 389*52130b60SViresh Kumar 390*52130b60SViresh Kumar pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG); 391*52130b60SViresh Kumar 392*52130b60SViresh Kumar spear3xx_machdata.modes_supported = false; 393*52130b60SViresh Kumar 394*52130b60SViresh Kumar ret = spear_pinctrl_probe(pdev, &spear3xx_machdata); 395*52130b60SViresh Kumar if (ret) 396*52130b60SViresh Kumar return ret; 397*52130b60SViresh Kumar 398*52130b60SViresh Kumar return 0; 399*52130b60SViresh Kumar } 400*52130b60SViresh Kumar 401*52130b60SViresh Kumar static int __devexit spear310_pinctrl_remove(struct platform_device *pdev) 402*52130b60SViresh Kumar { 403*52130b60SViresh Kumar return spear_pinctrl_remove(pdev); 404*52130b60SViresh Kumar } 405*52130b60SViresh Kumar 406*52130b60SViresh Kumar static struct platform_driver spear310_pinctrl_driver = { 407*52130b60SViresh Kumar .driver = { 408*52130b60SViresh Kumar .name = DRIVER_NAME, 409*52130b60SViresh Kumar .owner = THIS_MODULE, 410*52130b60SViresh Kumar .of_match_table = spear310_pinctrl_of_match, 411*52130b60SViresh Kumar }, 412*52130b60SViresh Kumar .probe = spear310_pinctrl_probe, 413*52130b60SViresh Kumar .remove = __devexit_p(spear310_pinctrl_remove), 414*52130b60SViresh Kumar }; 415*52130b60SViresh Kumar 416*52130b60SViresh Kumar static int __init spear310_pinctrl_init(void) 417*52130b60SViresh Kumar { 418*52130b60SViresh Kumar return platform_driver_register(&spear310_pinctrl_driver); 419*52130b60SViresh Kumar } 420*52130b60SViresh Kumar arch_initcall(spear310_pinctrl_init); 421*52130b60SViresh Kumar 422*52130b60SViresh Kumar static void __exit spear310_pinctrl_exit(void) 423*52130b60SViresh Kumar { 424*52130b60SViresh Kumar platform_driver_unregister(&spear310_pinctrl_driver); 425*52130b60SViresh Kumar } 426*52130b60SViresh Kumar module_exit(spear310_pinctrl_exit); 427*52130b60SViresh Kumar 428*52130b60SViresh Kumar MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>"); 429*52130b60SViresh Kumar MODULE_DESCRIPTION("ST Microelectronics SPEAr310 pinctrl driver"); 430*52130b60SViresh Kumar MODULE_LICENSE("GPL v2"); 431*52130b60SViresh Kumar MODULE_DEVICE_TABLE(of, SPEAr310_pinctrl_of_match); 432