xref: /openbmc/linux/drivers/pinctrl/mediatek/pinctrl-mt6797.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1f969b7aaSManivannan Sadhasivam // SPDX-License-Identifier: GPL-2.0
2f969b7aaSManivannan Sadhasivam /*
3f969b7aaSManivannan Sadhasivam  * Based on pinctrl-mt6765.c
4f969b7aaSManivannan Sadhasivam  *
5f969b7aaSManivannan Sadhasivam  * Copyright (C) 2018 MediaTek Inc.
6f969b7aaSManivannan Sadhasivam  *
7f969b7aaSManivannan Sadhasivam  * Author: ZH Chen <zh.chen@mediatek.com>
8f969b7aaSManivannan Sadhasivam  *
9f969b7aaSManivannan Sadhasivam  * Copyright (C) Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
10f969b7aaSManivannan Sadhasivam  *
11f969b7aaSManivannan Sadhasivam  */
12f969b7aaSManivannan Sadhasivam 
13f969b7aaSManivannan Sadhasivam #include "pinctrl-mtk-mt6797.h"
14f969b7aaSManivannan Sadhasivam #include "pinctrl-paris.h"
15f969b7aaSManivannan Sadhasivam 
16f969b7aaSManivannan Sadhasivam /*
17f969b7aaSManivannan Sadhasivam  * MT6797 have multiple bases to program pin configuration listed as the below:
18f969b7aaSManivannan Sadhasivam  * gpio:0x10005000, iocfg[l]:0x10002000, iocfg[b]:0x10002400,
19f969b7aaSManivannan Sadhasivam  * iocfg[r]:0x10002800, iocfg[t]:0x10002C00.
20f969b7aaSManivannan Sadhasivam  * _i_base could be used to indicate what base the pin should be mapped into.
21f969b7aaSManivannan Sadhasivam  */
22f969b7aaSManivannan Sadhasivam 
23f969b7aaSManivannan Sadhasivam static const struct mtk_pin_field_calc mt6797_pin_mode_range[] = {
24f969b7aaSManivannan Sadhasivam 	PIN_FIELD(0, 261, 0x300, 0x10, 0, 4),
25f969b7aaSManivannan Sadhasivam };
26f969b7aaSManivannan Sadhasivam 
27f969b7aaSManivannan Sadhasivam static const struct mtk_pin_field_calc mt6797_pin_dir_range[] = {
28f969b7aaSManivannan Sadhasivam 	PIN_FIELD(0, 261, 0x0, 0x10, 0, 1),
29f969b7aaSManivannan Sadhasivam };
30f969b7aaSManivannan Sadhasivam 
31f969b7aaSManivannan Sadhasivam static const struct mtk_pin_field_calc mt6797_pin_di_range[] = {
32f969b7aaSManivannan Sadhasivam 	PIN_FIELD(0, 261, 0x200, 0x10, 0, 1),
33f969b7aaSManivannan Sadhasivam };
34f969b7aaSManivannan Sadhasivam 
35f969b7aaSManivannan Sadhasivam static const struct mtk_pin_field_calc mt6797_pin_do_range[] = {
36f969b7aaSManivannan Sadhasivam 	PIN_FIELD(0, 261, 0x100, 0x10, 0, 1),
37f969b7aaSManivannan Sadhasivam };
38f969b7aaSManivannan Sadhasivam 
39f969b7aaSManivannan Sadhasivam static const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = {
40f969b7aaSManivannan Sadhasivam 	[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range),
41f969b7aaSManivannan Sadhasivam 	[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range),
42f969b7aaSManivannan Sadhasivam 	[PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range),
43f969b7aaSManivannan Sadhasivam 	[PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range),
44f969b7aaSManivannan Sadhasivam };
45f969b7aaSManivannan Sadhasivam 
46f969b7aaSManivannan Sadhasivam static const char * const mt6797_pinctrl_register_base_names[] = {
47f969b7aaSManivannan Sadhasivam 	"gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt",
48f969b7aaSManivannan Sadhasivam };
49f969b7aaSManivannan Sadhasivam 
50f969b7aaSManivannan Sadhasivam static const struct mtk_pin_soc mt6797_data = {
51f969b7aaSManivannan Sadhasivam 	.reg_cal = mt6797_reg_cals,
52f969b7aaSManivannan Sadhasivam 	.pins = mtk_pins_mt6797,
53f969b7aaSManivannan Sadhasivam 	.npins = ARRAY_SIZE(mtk_pins_mt6797),
54f969b7aaSManivannan Sadhasivam 	.ngrps = ARRAY_SIZE(mtk_pins_mt6797),
55f969b7aaSManivannan Sadhasivam 	.gpio_m = 0,
56f969b7aaSManivannan Sadhasivam 	.base_names = mt6797_pinctrl_register_base_names,
57f969b7aaSManivannan Sadhasivam 	.nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names),
58f969b7aaSManivannan Sadhasivam };
59f969b7aaSManivannan Sadhasivam 
60f969b7aaSManivannan Sadhasivam static const struct of_device_id mt6797_pinctrl_of_match[] = {
61*78df7bbaSAngeloGioacchino Del Regno 	{ .compatible = "mediatek,mt6797-pinctrl", .data = &mt6797_data },
62f969b7aaSManivannan Sadhasivam 	{ }
63f969b7aaSManivannan Sadhasivam };
64f969b7aaSManivannan Sadhasivam 
65f969b7aaSManivannan Sadhasivam static struct platform_driver mt6797_pinctrl_driver = {
66f969b7aaSManivannan Sadhasivam 	.driver = {
67f969b7aaSManivannan Sadhasivam 		.name = "mt6797-pinctrl",
68f969b7aaSManivannan Sadhasivam 		.of_match_table = mt6797_pinctrl_of_match,
69f969b7aaSManivannan Sadhasivam 	},
70*78df7bbaSAngeloGioacchino Del Regno 	.probe = mtk_paris_pinctrl_probe,
71f969b7aaSManivannan Sadhasivam };
72f969b7aaSManivannan Sadhasivam 
mt6797_pinctrl_init(void)73f969b7aaSManivannan Sadhasivam static int __init mt6797_pinctrl_init(void)
74f969b7aaSManivannan Sadhasivam {
75f969b7aaSManivannan Sadhasivam 	return platform_driver_register(&mt6797_pinctrl_driver);
76f969b7aaSManivannan Sadhasivam }
77f969b7aaSManivannan Sadhasivam arch_initcall(mt6797_pinctrl_init);
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