1*edad3b2aSLinus Walleij /* 2*edad3b2aSLinus Walleij * imx27 pinctrl driver based on imx pinmux core 3*edad3b2aSLinus Walleij * 4*edad3b2aSLinus Walleij * Copyright (C) 2013 Pengutronix 5*edad3b2aSLinus Walleij * 6*edad3b2aSLinus Walleij * Author: Markus Pargmann <mpa@pengutronix.de> 7*edad3b2aSLinus Walleij * 8*edad3b2aSLinus Walleij * This program is free software; you can redistribute it and/or modify 9*edad3b2aSLinus Walleij * it under the terms of the GNU General Public License as published by 10*edad3b2aSLinus Walleij * the Free Software Foundation; either version 2 of the License, or 11*edad3b2aSLinus Walleij * (at your option) any later version. 12*edad3b2aSLinus Walleij */ 13*edad3b2aSLinus Walleij 14*edad3b2aSLinus Walleij #include <linux/err.h> 15*edad3b2aSLinus Walleij #include <linux/init.h> 16*edad3b2aSLinus Walleij #include <linux/io.h> 17*edad3b2aSLinus Walleij #include <linux/module.h> 18*edad3b2aSLinus Walleij #include <linux/of.h> 19*edad3b2aSLinus Walleij #include <linux/of_device.h> 20*edad3b2aSLinus Walleij #include <linux/pinctrl/pinctrl.h> 21*edad3b2aSLinus Walleij 22*edad3b2aSLinus Walleij #include "pinctrl-imx1.h" 23*edad3b2aSLinus Walleij 24*edad3b2aSLinus Walleij #define PAD_ID(port, pin) (port*32 + pin) 25*edad3b2aSLinus Walleij #define PA 0 26*edad3b2aSLinus Walleij #define PB 1 27*edad3b2aSLinus Walleij #define PC 2 28*edad3b2aSLinus Walleij #define PD 3 29*edad3b2aSLinus Walleij #define PE 4 30*edad3b2aSLinus Walleij #define PF 5 31*edad3b2aSLinus Walleij 32*edad3b2aSLinus Walleij enum imx27_pads { 33*edad3b2aSLinus Walleij MX27_PAD_USBH2_CLK = PAD_ID(PA, 0), 34*edad3b2aSLinus Walleij MX27_PAD_USBH2_DIR = PAD_ID(PA, 1), 35*edad3b2aSLinus Walleij MX27_PAD_USBH2_DATA7 = PAD_ID(PA, 2), 36*edad3b2aSLinus Walleij MX27_PAD_USBH2_NXT = PAD_ID(PA, 3), 37*edad3b2aSLinus Walleij MX27_PAD_USBH2_STP = PAD_ID(PA, 4), 38*edad3b2aSLinus Walleij MX27_PAD_LSCLK = PAD_ID(PA, 5), 39*edad3b2aSLinus Walleij MX27_PAD_LD0 = PAD_ID(PA, 6), 40*edad3b2aSLinus Walleij MX27_PAD_LD1 = PAD_ID(PA, 7), 41*edad3b2aSLinus Walleij MX27_PAD_LD2 = PAD_ID(PA, 8), 42*edad3b2aSLinus Walleij MX27_PAD_LD3 = PAD_ID(PA, 9), 43*edad3b2aSLinus Walleij MX27_PAD_LD4 = PAD_ID(PA, 10), 44*edad3b2aSLinus Walleij MX27_PAD_LD5 = PAD_ID(PA, 11), 45*edad3b2aSLinus Walleij MX27_PAD_LD6 = PAD_ID(PA, 12), 46*edad3b2aSLinus Walleij MX27_PAD_LD7 = PAD_ID(PA, 13), 47*edad3b2aSLinus Walleij MX27_PAD_LD8 = PAD_ID(PA, 14), 48*edad3b2aSLinus Walleij MX27_PAD_LD9 = PAD_ID(PA, 15), 49*edad3b2aSLinus Walleij MX27_PAD_LD10 = PAD_ID(PA, 16), 50*edad3b2aSLinus Walleij MX27_PAD_LD11 = PAD_ID(PA, 17), 51*edad3b2aSLinus Walleij MX27_PAD_LD12 = PAD_ID(PA, 18), 52*edad3b2aSLinus Walleij MX27_PAD_LD13 = PAD_ID(PA, 19), 53*edad3b2aSLinus Walleij MX27_PAD_LD14 = PAD_ID(PA, 20), 54*edad3b2aSLinus Walleij MX27_PAD_LD15 = PAD_ID(PA, 21), 55*edad3b2aSLinus Walleij MX27_PAD_LD16 = PAD_ID(PA, 22), 56*edad3b2aSLinus Walleij MX27_PAD_LD17 = PAD_ID(PA, 23), 57*edad3b2aSLinus Walleij MX27_PAD_REV = PAD_ID(PA, 24), 58*edad3b2aSLinus Walleij MX27_PAD_CLS = PAD_ID(PA, 25), 59*edad3b2aSLinus Walleij MX27_PAD_PS = PAD_ID(PA, 26), 60*edad3b2aSLinus Walleij MX27_PAD_SPL_SPR = PAD_ID(PA, 27), 61*edad3b2aSLinus Walleij MX27_PAD_HSYNC = PAD_ID(PA, 28), 62*edad3b2aSLinus Walleij MX27_PAD_VSYNC = PAD_ID(PA, 29), 63*edad3b2aSLinus Walleij MX27_PAD_CONTRAST = PAD_ID(PA, 30), 64*edad3b2aSLinus Walleij MX27_PAD_OE_ACD = PAD_ID(PA, 31), 65*edad3b2aSLinus Walleij 66*edad3b2aSLinus Walleij MX27_PAD_SD2_D0 = PAD_ID(PB, 4), 67*edad3b2aSLinus Walleij MX27_PAD_SD2_D1 = PAD_ID(PB, 5), 68*edad3b2aSLinus Walleij MX27_PAD_SD2_D2 = PAD_ID(PB, 6), 69*edad3b2aSLinus Walleij MX27_PAD_SD2_D3 = PAD_ID(PB, 7), 70*edad3b2aSLinus Walleij MX27_PAD_SD2_CMD = PAD_ID(PB, 8), 71*edad3b2aSLinus Walleij MX27_PAD_SD2_CLK = PAD_ID(PB, 9), 72*edad3b2aSLinus Walleij MX27_PAD_CSI_D0 = PAD_ID(PB, 10), 73*edad3b2aSLinus Walleij MX27_PAD_CSI_D1 = PAD_ID(PB, 11), 74*edad3b2aSLinus Walleij MX27_PAD_CSI_D2 = PAD_ID(PB, 12), 75*edad3b2aSLinus Walleij MX27_PAD_CSI_D3 = PAD_ID(PB, 13), 76*edad3b2aSLinus Walleij MX27_PAD_CSI_D4 = PAD_ID(PB, 14), 77*edad3b2aSLinus Walleij MX27_PAD_CSI_MCLK = PAD_ID(PB, 15), 78*edad3b2aSLinus Walleij MX27_PAD_CSI_PIXCLK = PAD_ID(PB, 16), 79*edad3b2aSLinus Walleij MX27_PAD_CSI_D5 = PAD_ID(PB, 17), 80*edad3b2aSLinus Walleij MX27_PAD_CSI_D6 = PAD_ID(PB, 18), 81*edad3b2aSLinus Walleij MX27_PAD_CSI_D7 = PAD_ID(PB, 19), 82*edad3b2aSLinus Walleij MX27_PAD_CSI_VSYNC = PAD_ID(PB, 20), 83*edad3b2aSLinus Walleij MX27_PAD_CSI_HSYNC = PAD_ID(PB, 21), 84*edad3b2aSLinus Walleij MX27_PAD_USBH1_SUSP = PAD_ID(PB, 22), 85*edad3b2aSLinus Walleij MX27_PAD_USB_PWR = PAD_ID(PB, 23), 86*edad3b2aSLinus Walleij MX27_PAD_USB_OC_B = PAD_ID(PB, 24), 87*edad3b2aSLinus Walleij MX27_PAD_USBH1_RCV = PAD_ID(PB, 25), 88*edad3b2aSLinus Walleij MX27_PAD_USBH1_FS = PAD_ID(PB, 26), 89*edad3b2aSLinus Walleij MX27_PAD_USBH1_OE_B = PAD_ID(PB, 27), 90*edad3b2aSLinus Walleij MX27_PAD_USBH1_TXDM = PAD_ID(PB, 28), 91*edad3b2aSLinus Walleij MX27_PAD_USBH1_TXDP = PAD_ID(PB, 29), 92*edad3b2aSLinus Walleij MX27_PAD_USBH1_RXDM = PAD_ID(PB, 30), 93*edad3b2aSLinus Walleij MX27_PAD_USBH1_RXDP = PAD_ID(PB, 31), 94*edad3b2aSLinus Walleij 95*edad3b2aSLinus Walleij MX27_PAD_I2C2_SDA = PAD_ID(PC, 5), 96*edad3b2aSLinus Walleij MX27_PAD_I2C2_SCL = PAD_ID(PC, 6), 97*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA5 = PAD_ID(PC, 7), 98*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA6 = PAD_ID(PC, 8), 99*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA0 = PAD_ID(PC, 9), 100*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA2 = PAD_ID(PC, 10), 101*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA1 = PAD_ID(PC, 11), 102*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA4 = PAD_ID(PC, 12), 103*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA3 = PAD_ID(PC, 13), 104*edad3b2aSLinus Walleij MX27_PAD_TOUT = PAD_ID(PC, 14), 105*edad3b2aSLinus Walleij MX27_PAD_TIN = PAD_ID(PC, 15), 106*edad3b2aSLinus Walleij MX27_PAD_SSI4_FS = PAD_ID(PC, 16), 107*edad3b2aSLinus Walleij MX27_PAD_SSI4_RXDAT = PAD_ID(PC, 17), 108*edad3b2aSLinus Walleij MX27_PAD_SSI4_TXDAT = PAD_ID(PC, 18), 109*edad3b2aSLinus Walleij MX27_PAD_SSI4_CLK = PAD_ID(PC, 19), 110*edad3b2aSLinus Walleij MX27_PAD_SSI1_FS = PAD_ID(PC, 20), 111*edad3b2aSLinus Walleij MX27_PAD_SSI1_RXDAT = PAD_ID(PC, 21), 112*edad3b2aSLinus Walleij MX27_PAD_SSI1_TXDAT = PAD_ID(PC, 22), 113*edad3b2aSLinus Walleij MX27_PAD_SSI1_CLK = PAD_ID(PC, 23), 114*edad3b2aSLinus Walleij MX27_PAD_SSI2_FS = PAD_ID(PC, 24), 115*edad3b2aSLinus Walleij MX27_PAD_SSI2_RXDAT = PAD_ID(PC, 25), 116*edad3b2aSLinus Walleij MX27_PAD_SSI2_TXDAT = PAD_ID(PC, 26), 117*edad3b2aSLinus Walleij MX27_PAD_SSI2_CLK = PAD_ID(PC, 27), 118*edad3b2aSLinus Walleij MX27_PAD_SSI3_FS = PAD_ID(PC, 28), 119*edad3b2aSLinus Walleij MX27_PAD_SSI3_RXDAT = PAD_ID(PC, 29), 120*edad3b2aSLinus Walleij MX27_PAD_SSI3_TXDAT = PAD_ID(PC, 30), 121*edad3b2aSLinus Walleij MX27_PAD_SSI3_CLK = PAD_ID(PC, 31), 122*edad3b2aSLinus Walleij 123*edad3b2aSLinus Walleij MX27_PAD_SD3_CMD = PAD_ID(PD, 0), 124*edad3b2aSLinus Walleij MX27_PAD_SD3_CLK = PAD_ID(PD, 1), 125*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2), 126*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3), 127*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4), 128*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5), 129*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6), 130*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7), 131*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA6 = PAD_ID(PD, 8), 132*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA7 = PAD_ID(PD, 9), 133*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA8 = PAD_ID(PD, 10), 134*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA9 = PAD_ID(PD, 11), 135*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA10 = PAD_ID(PD, 12), 136*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA11 = PAD_ID(PD, 13), 137*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA12 = PAD_ID(PD, 14), 138*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA13 = PAD_ID(PD, 15), 139*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA14 = PAD_ID(PD, 16), 140*edad3b2aSLinus Walleij MX27_PAD_I2C_DATA = PAD_ID(PD, 17), 141*edad3b2aSLinus Walleij MX27_PAD_I2C_CLK = PAD_ID(PD, 18), 142*edad3b2aSLinus Walleij MX27_PAD_CSPI2_SS2 = PAD_ID(PD, 19), 143*edad3b2aSLinus Walleij MX27_PAD_CSPI2_SS1 = PAD_ID(PD, 20), 144*edad3b2aSLinus Walleij MX27_PAD_CSPI2_SS0 = PAD_ID(PD, 21), 145*edad3b2aSLinus Walleij MX27_PAD_CSPI2_SCLK = PAD_ID(PD, 22), 146*edad3b2aSLinus Walleij MX27_PAD_CSPI2_MISO = PAD_ID(PD, 23), 147*edad3b2aSLinus Walleij MX27_PAD_CSPI2_MOSI = PAD_ID(PD, 24), 148*edad3b2aSLinus Walleij MX27_PAD_CSPI1_RDY = PAD_ID(PD, 25), 149*edad3b2aSLinus Walleij MX27_PAD_CSPI1_SS2 = PAD_ID(PD, 26), 150*edad3b2aSLinus Walleij MX27_PAD_CSPI1_SS1 = PAD_ID(PD, 27), 151*edad3b2aSLinus Walleij MX27_PAD_CSPI1_SS0 = PAD_ID(PD, 28), 152*edad3b2aSLinus Walleij MX27_PAD_CSPI1_SCLK = PAD_ID(PD, 29), 153*edad3b2aSLinus Walleij MX27_PAD_CSPI1_MISO = PAD_ID(PD, 30), 154*edad3b2aSLinus Walleij MX27_PAD_CSPI1_MOSI = PAD_ID(PD, 31), 155*edad3b2aSLinus Walleij 156*edad3b2aSLinus Walleij MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0), 157*edad3b2aSLinus Walleij MX27_PAD_USBOTG_STP = PAD_ID(PE, 1), 158*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2), 159*edad3b2aSLinus Walleij MX27_PAD_UART2_CTS = PAD_ID(PE, 3), 160*edad3b2aSLinus Walleij MX27_PAD_UART2_RTS = PAD_ID(PE, 4), 161*edad3b2aSLinus Walleij MX27_PAD_PWMO = PAD_ID(PE, 5), 162*edad3b2aSLinus Walleij MX27_PAD_UART2_TXD = PAD_ID(PE, 6), 163*edad3b2aSLinus Walleij MX27_PAD_UART2_RXD = PAD_ID(PE, 7), 164*edad3b2aSLinus Walleij MX27_PAD_UART3_TXD = PAD_ID(PE, 8), 165*edad3b2aSLinus Walleij MX27_PAD_UART3_RXD = PAD_ID(PE, 9), 166*edad3b2aSLinus Walleij MX27_PAD_UART3_CTS = PAD_ID(PE, 10), 167*edad3b2aSLinus Walleij MX27_PAD_UART3_RTS = PAD_ID(PE, 11), 168*edad3b2aSLinus Walleij MX27_PAD_UART1_TXD = PAD_ID(PE, 12), 169*edad3b2aSLinus Walleij MX27_PAD_UART1_RXD = PAD_ID(PE, 13), 170*edad3b2aSLinus Walleij MX27_PAD_UART1_CTS = PAD_ID(PE, 14), 171*edad3b2aSLinus Walleij MX27_PAD_UART1_RTS = PAD_ID(PE, 15), 172*edad3b2aSLinus Walleij MX27_PAD_RTCK = PAD_ID(PE, 16), 173*edad3b2aSLinus Walleij MX27_PAD_RESET_OUT_B = PAD_ID(PE, 17), 174*edad3b2aSLinus Walleij MX27_PAD_SD1_D0 = PAD_ID(PE, 18), 175*edad3b2aSLinus Walleij MX27_PAD_SD1_D1 = PAD_ID(PE, 19), 176*edad3b2aSLinus Walleij MX27_PAD_SD1_D2 = PAD_ID(PE, 20), 177*edad3b2aSLinus Walleij MX27_PAD_SD1_D3 = PAD_ID(PE, 21), 178*edad3b2aSLinus Walleij MX27_PAD_SD1_CMD = PAD_ID(PE, 22), 179*edad3b2aSLinus Walleij MX27_PAD_SD1_CLK = PAD_ID(PE, 23), 180*edad3b2aSLinus Walleij MX27_PAD_USBOTG_CLK = PAD_ID(PE, 24), 181*edad3b2aSLinus Walleij MX27_PAD_USBOTG_DATA7 = PAD_ID(PE, 25), 182*edad3b2aSLinus Walleij 183*edad3b2aSLinus Walleij MX27_PAD_NFRB = PAD_ID(PF, 0), 184*edad3b2aSLinus Walleij MX27_PAD_NFCLE = PAD_ID(PF, 1), 185*edad3b2aSLinus Walleij MX27_PAD_NFWP_B = PAD_ID(PF, 2), 186*edad3b2aSLinus Walleij MX27_PAD_NFCE_B = PAD_ID(PF, 3), 187*edad3b2aSLinus Walleij MX27_PAD_NFALE = PAD_ID(PF, 4), 188*edad3b2aSLinus Walleij MX27_PAD_NFRE_B = PAD_ID(PF, 5), 189*edad3b2aSLinus Walleij MX27_PAD_NFWE_B = PAD_ID(PF, 6), 190*edad3b2aSLinus Walleij MX27_PAD_PC_POE = PAD_ID(PF, 7), 191*edad3b2aSLinus Walleij MX27_PAD_PC_RW_B = PAD_ID(PF, 8), 192*edad3b2aSLinus Walleij MX27_PAD_IOIS16 = PAD_ID(PF, 9), 193*edad3b2aSLinus Walleij MX27_PAD_PC_RST = PAD_ID(PF, 10), 194*edad3b2aSLinus Walleij MX27_PAD_PC_BVD2 = PAD_ID(PF, 11), 195*edad3b2aSLinus Walleij MX27_PAD_PC_BVD1 = PAD_ID(PF, 12), 196*edad3b2aSLinus Walleij MX27_PAD_PC_VS2 = PAD_ID(PF, 13), 197*edad3b2aSLinus Walleij MX27_PAD_PC_VS1 = PAD_ID(PF, 14), 198*edad3b2aSLinus Walleij MX27_PAD_CLKO = PAD_ID(PF, 15), 199*edad3b2aSLinus Walleij MX27_PAD_PC_PWRON = PAD_ID(PF, 16), 200*edad3b2aSLinus Walleij MX27_PAD_PC_READY = PAD_ID(PF, 17), 201*edad3b2aSLinus Walleij MX27_PAD_PC_WAIT_B = PAD_ID(PF, 18), 202*edad3b2aSLinus Walleij MX27_PAD_PC_CD2_B = PAD_ID(PF, 19), 203*edad3b2aSLinus Walleij MX27_PAD_PC_CD1_B = PAD_ID(PF, 20), 204*edad3b2aSLinus Walleij MX27_PAD_CS4_B = PAD_ID(PF, 21), 205*edad3b2aSLinus Walleij MX27_PAD_CS5_B = PAD_ID(PF, 22), 206*edad3b2aSLinus Walleij MX27_PAD_ATA_DATA15 = PAD_ID(PF, 23), 207*edad3b2aSLinus Walleij }; 208*edad3b2aSLinus Walleij 209*edad3b2aSLinus Walleij /* Pad names for the pinmux subsystem */ 210*edad3b2aSLinus Walleij static const struct pinctrl_pin_desc imx27_pinctrl_pads[] = { 211*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH2_CLK), 212*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH2_DIR), 213*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH2_DATA7), 214*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH2_NXT), 215*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH2_STP), 216*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LSCLK), 217*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD0), 218*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD1), 219*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD2), 220*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD3), 221*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD4), 222*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD5), 223*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD6), 224*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD7), 225*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD8), 226*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD9), 227*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD10), 228*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD11), 229*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD12), 230*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD13), 231*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD14), 232*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD15), 233*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD16), 234*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_LD17), 235*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_REV), 236*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CLS), 237*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PS), 238*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SPL_SPR), 239*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_HSYNC), 240*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_VSYNC), 241*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CONTRAST), 242*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_OE_ACD), 243*edad3b2aSLinus Walleij 244*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD2_D0), 245*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD2_D1), 246*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD2_D2), 247*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD2_D3), 248*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD2_CMD), 249*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD2_CLK), 250*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D0), 251*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D1), 252*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D2), 253*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D3), 254*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D4), 255*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_MCLK), 256*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_PIXCLK), 257*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D5), 258*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D6), 259*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_D7), 260*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_VSYNC), 261*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSI_HSYNC), 262*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_SUSP), 263*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USB_PWR), 264*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USB_OC_B), 265*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_RCV), 266*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_FS), 267*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_OE_B), 268*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDM), 269*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDP), 270*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDM), 271*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDP), 272*edad3b2aSLinus Walleij 273*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_I2C2_SDA), 274*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_I2C2_SCL), 275*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA5), 276*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA6), 277*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA0), 278*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA2), 279*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA1), 280*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA4), 281*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA3), 282*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_TOUT), 283*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_TIN), 284*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI4_FS), 285*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI4_RXDAT), 286*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI4_TXDAT), 287*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI4_CLK), 288*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI1_FS), 289*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI1_RXDAT), 290*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI1_TXDAT), 291*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI1_CLK), 292*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI2_FS), 293*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI2_RXDAT), 294*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI2_TXDAT), 295*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI2_CLK), 296*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI3_FS), 297*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI3_RXDAT), 298*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI3_TXDAT), 299*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SSI3_CLK), 300*edad3b2aSLinus Walleij 301*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD3_CMD), 302*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD3_CLK), 303*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA0), 304*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA1), 305*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA2), 306*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA3), 307*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA4), 308*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA5), 309*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA6), 310*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA7), 311*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA8), 312*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA9), 313*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA10), 314*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA11), 315*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA12), 316*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA13), 317*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA14), 318*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_I2C_DATA), 319*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_I2C_CLK), 320*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS2), 321*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS1), 322*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS0), 323*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SCLK), 324*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MISO), 325*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MOSI), 326*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_RDY), 327*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS2), 328*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS1), 329*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS0), 330*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SCLK), 331*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MISO), 332*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MOSI), 333*edad3b2aSLinus Walleij 334*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_NXT), 335*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_STP), 336*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DIR), 337*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART2_CTS), 338*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART2_RTS), 339*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PWMO), 340*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART2_TXD), 341*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART2_RXD), 342*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART3_TXD), 343*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART3_RXD), 344*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART3_CTS), 345*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART3_RTS), 346*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART1_TXD), 347*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART1_RXD), 348*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART1_CTS), 349*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_UART1_RTS), 350*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_RTCK), 351*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_RESET_OUT_B), 352*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD1_D0), 353*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD1_D1), 354*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD1_D2), 355*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD1_D3), 356*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD1_CMD), 357*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_SD1_CLK), 358*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_CLK), 359*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA7), 360*edad3b2aSLinus Walleij 361*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFRB), 362*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFCLE), 363*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFWP_B), 364*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFCE_B), 365*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFALE), 366*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFRE_B), 367*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_NFWE_B), 368*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_POE), 369*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_RW_B), 370*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_IOIS16), 371*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_RST), 372*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_BVD2), 373*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_BVD1), 374*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_VS2), 375*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_VS1), 376*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CLKO), 377*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_PWRON), 378*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_READY), 379*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_WAIT_B), 380*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_CD2_B), 381*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_PC_CD1_B), 382*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CS4_B), 383*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_CS5_B), 384*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA15), 385*edad3b2aSLinus Walleij }; 386*edad3b2aSLinus Walleij 387*edad3b2aSLinus Walleij static struct imx1_pinctrl_soc_info imx27_pinctrl_info = { 388*edad3b2aSLinus Walleij .pins = imx27_pinctrl_pads, 389*edad3b2aSLinus Walleij .npins = ARRAY_SIZE(imx27_pinctrl_pads), 390*edad3b2aSLinus Walleij }; 391*edad3b2aSLinus Walleij 392*edad3b2aSLinus Walleij static const struct of_device_id imx27_pinctrl_of_match[] = { 393*edad3b2aSLinus Walleij { .compatible = "fsl,imx27-iomuxc", }, 394*edad3b2aSLinus Walleij { /* sentinel */ } 395*edad3b2aSLinus Walleij }; 396*edad3b2aSLinus Walleij 397*edad3b2aSLinus Walleij static int imx27_pinctrl_probe(struct platform_device *pdev) 398*edad3b2aSLinus Walleij { 399*edad3b2aSLinus Walleij return imx1_pinctrl_core_probe(pdev, &imx27_pinctrl_info); 400*edad3b2aSLinus Walleij } 401*edad3b2aSLinus Walleij 402*edad3b2aSLinus Walleij static struct platform_driver imx27_pinctrl_driver = { 403*edad3b2aSLinus Walleij .driver = { 404*edad3b2aSLinus Walleij .name = "imx27-pinctrl", 405*edad3b2aSLinus Walleij .owner = THIS_MODULE, 406*edad3b2aSLinus Walleij .of_match_table = of_match_ptr(imx27_pinctrl_of_match), 407*edad3b2aSLinus Walleij }, 408*edad3b2aSLinus Walleij .probe = imx27_pinctrl_probe, 409*edad3b2aSLinus Walleij .remove = imx1_pinctrl_core_remove, 410*edad3b2aSLinus Walleij }; 411*edad3b2aSLinus Walleij 412*edad3b2aSLinus Walleij static int __init imx27_pinctrl_init(void) 413*edad3b2aSLinus Walleij { 414*edad3b2aSLinus Walleij return platform_driver_register(&imx27_pinctrl_driver); 415*edad3b2aSLinus Walleij } 416*edad3b2aSLinus Walleij arch_initcall(imx27_pinctrl_init); 417*edad3b2aSLinus Walleij 418*edad3b2aSLinus Walleij static void __exit imx27_pinctrl_exit(void) 419*edad3b2aSLinus Walleij { 420*edad3b2aSLinus Walleij platform_driver_unregister(&imx27_pinctrl_driver); 421*edad3b2aSLinus Walleij } 422*edad3b2aSLinus Walleij module_exit(imx27_pinctrl_exit); 423*edad3b2aSLinus Walleij MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>"); 424*edad3b2aSLinus Walleij MODULE_DESCRIPTION("Freescale IMX27 pinctrl driver"); 425*edad3b2aSLinus Walleij MODULE_LICENSE("GPL v2"); 426