1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 24d3d0e42SAndrew Jefferyconfig PINCTRL_ASPEED 34d3d0e42SAndrew Jeffery bool 44d3d0e42SAndrew Jeffery depends on (ARCH_ASPEED || COMPILE_TEST) && OF 5*54dd5a41SJulian Braha select MFD_SYSCON 64d3d0e42SAndrew Jeffery select PINMUX 74d3d0e42SAndrew Jeffery select PINCONF 84d3d0e42SAndrew Jeffery select GENERIC_PINCONF 94d3d0e42SAndrew Jeffery select REGMAP_MMIO 10524594d4SAndrew Jeffery 11524594d4SAndrew Jefferyconfig PINCTRL_ASPEED_G4 12524594d4SAndrew Jeffery bool "Aspeed G4 SoC pin control" 13524594d4SAndrew Jeffery depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF 14524594d4SAndrew Jeffery select PINCTRL_ASPEED 15524594d4SAndrew Jeffery help 16524594d4SAndrew Jeffery Say Y here to enable pin controller support for Aspeed's 4th 17524594d4SAndrew Jeffery generation SoCs. GPIO is provided by a separate GPIO driver. 1856e57cb6SAndrew Jeffery 1956e57cb6SAndrew Jefferyconfig PINCTRL_ASPEED_G5 2056e57cb6SAndrew Jeffery bool "Aspeed G5 SoC pin control" 2156e57cb6SAndrew Jeffery depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF 2256e57cb6SAndrew Jeffery select PINCTRL_ASPEED 2356e57cb6SAndrew Jeffery help 2456e57cb6SAndrew Jeffery Say Y here to enable pin controller support for Aspeed's 5th 2556e57cb6SAndrew Jeffery generation SoCs. GPIO is provided by a separate GPIO driver. 262eda1cdeSAndrew Jeffery 272eda1cdeSAndrew Jefferyconfig PINCTRL_ASPEED_G6 282eda1cdeSAndrew Jeffery bool "Aspeed G6 SoC pin control" 292eda1cdeSAndrew Jeffery depends on (MACH_ASPEED_G6 || COMPILE_TEST) && OF 302eda1cdeSAndrew Jeffery select PINCTRL_ASPEED 312eda1cdeSAndrew Jeffery help 322eda1cdeSAndrew Jeffery Say Y here to enable pin controller support for Aspeed's 6th 332eda1cdeSAndrew Jeffery generation SoCs. GPIO is provided by a separate GPIO driver. 34