1b7a2f882SDmitry Baryshkov /* Only for QMP V5 PHY - PCS_PCIE registers */ 2b7a2f882SDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0 */ 3b7a2f882SDmitry Baryshkov /* 4b7a2f882SDmitry Baryshkov * Copyright (c) 2017, The Linux Foundation. All rights reserved. 5b7a2f882SDmitry Baryshkov */ 6b7a2f882SDmitry Baryshkov 7b7a2f882SDmitry Baryshkov #ifndef QCOM_PHY_QMP_PCS_PCIE_V5_H_ 8b7a2f882SDmitry Baryshkov #define QCOM_PHY_QMP_PCS_PCIE_V5_H_ 9b7a2f882SDmitry Baryshkov 10b7a2f882SDmitry Baryshkov /* Only for QMP V5 PHY - PCS_PCIE registers */ 11*d0a846baSJohan Hovold #define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 0x0c 12*d0a846baSJohan Hovold #define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 0x14 13b7a2f882SDmitry Baryshkov #define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20 14b7a2f882SDmitry Baryshkov #define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x54 15b7a2f882SDmitry Baryshkov #define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x94 16b7a2f882SDmitry Baryshkov #define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa8 17b7a2f882SDmitry Baryshkov 18b7a2f882SDmitry Baryshkov #endif 19