xref: /openbmc/linux/drivers/nvmem/layerscape-sfp.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1f7845101SMichael Walle // SPDX-License-Identifier: GPL-2.0-only
2f7845101SMichael Walle /*
3f7845101SMichael Walle  * Layerscape SFP driver
4f7845101SMichael Walle  *
5f7845101SMichael Walle  * Copyright (c) 2022 Michael Walle <michael@walle.cc>
6f7845101SMichael Walle  *
7f7845101SMichael Walle  */
8f7845101SMichael Walle 
9f7845101SMichael Walle #include <linux/device.h>
10f7845101SMichael Walle #include <linux/io.h>
11f7845101SMichael Walle #include <linux/mod_devicetable.h>
12f7845101SMichael Walle #include <linux/module.h>
13f7845101SMichael Walle #include <linux/nvmem-provider.h>
14f7845101SMichael Walle #include <linux/platform_device.h>
15f7845101SMichael Walle #include <linux/property.h>
16943eadbdSSean Anderson #include <linux/regmap.h>
17f7845101SMichael Walle 
18f7845101SMichael Walle #define LAYERSCAPE_SFP_OTP_OFFSET	0x0200
19f7845101SMichael Walle 
20f7845101SMichael Walle struct layerscape_sfp_priv {
21943eadbdSSean Anderson 	struct regmap *regmap;
22f7845101SMichael Walle };
23f7845101SMichael Walle 
24f7845101SMichael Walle struct layerscape_sfp_data {
25f7845101SMichael Walle 	int size;
26943eadbdSSean Anderson 	enum regmap_endian endian;
27f7845101SMichael Walle };
28f7845101SMichael Walle 
layerscape_sfp_read(void * context,unsigned int offset,void * val,size_t bytes)29f7845101SMichael Walle static int layerscape_sfp_read(void *context, unsigned int offset, void *val,
30f7845101SMichael Walle 			       size_t bytes)
31f7845101SMichael Walle {
32f7845101SMichael Walle 	struct layerscape_sfp_priv *priv = context;
33f7845101SMichael Walle 
34943eadbdSSean Anderson 	return regmap_bulk_read(priv->regmap,
35943eadbdSSean Anderson 				LAYERSCAPE_SFP_OTP_OFFSET + offset, val,
36943eadbdSSean Anderson 				bytes / 4);
37f7845101SMichael Walle }
38f7845101SMichael Walle 
39f7845101SMichael Walle static struct nvmem_config layerscape_sfp_nvmem_config = {
40f7845101SMichael Walle 	.name = "fsl-sfp",
41f7845101SMichael Walle 	.reg_read = layerscape_sfp_read,
42943eadbdSSean Anderson 	.word_size = 4,
43943eadbdSSean Anderson 	.stride = 4,
44f7845101SMichael Walle };
45f7845101SMichael Walle 
layerscape_sfp_probe(struct platform_device * pdev)46f7845101SMichael Walle static int layerscape_sfp_probe(struct platform_device *pdev)
47f7845101SMichael Walle {
48f7845101SMichael Walle 	const struct layerscape_sfp_data *data;
49f7845101SMichael Walle 	struct layerscape_sfp_priv *priv;
50f7845101SMichael Walle 	struct nvmem_device *nvmem;
51943eadbdSSean Anderson 	struct regmap_config config = { 0 };
52943eadbdSSean Anderson 	void __iomem *base;
53f7845101SMichael Walle 
54f7845101SMichael Walle 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
55f7845101SMichael Walle 	if (!priv)
56f7845101SMichael Walle 		return -ENOMEM;
57f7845101SMichael Walle 
58943eadbdSSean Anderson 	base = devm_platform_ioremap_resource(pdev, 0);
59943eadbdSSean Anderson 	if (IS_ERR(base))
60943eadbdSSean Anderson 		return PTR_ERR(base);
61f7845101SMichael Walle 
62f7845101SMichael Walle 	data = device_get_match_data(&pdev->dev);
63943eadbdSSean Anderson 	config.reg_bits = 32;
64943eadbdSSean Anderson 	config.reg_stride = 4;
65943eadbdSSean Anderson 	config.val_bits = 32;
66943eadbdSSean Anderson 	config.val_format_endian = data->endian;
67943eadbdSSean Anderson 	config.max_register = LAYERSCAPE_SFP_OTP_OFFSET + data->size - 4;
68943eadbdSSean Anderson 	priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, &config);
69943eadbdSSean Anderson 	if (IS_ERR(priv->regmap))
70943eadbdSSean Anderson 		return PTR_ERR(priv->regmap);
71f7845101SMichael Walle 
72f7845101SMichael Walle 	layerscape_sfp_nvmem_config.size = data->size;
73f7845101SMichael Walle 	layerscape_sfp_nvmem_config.dev = &pdev->dev;
74f7845101SMichael Walle 	layerscape_sfp_nvmem_config.priv = priv;
75f7845101SMichael Walle 
76f7845101SMichael Walle 	nvmem = devm_nvmem_register(&pdev->dev, &layerscape_sfp_nvmem_config);
77f7845101SMichael Walle 
78f7845101SMichael Walle 	return PTR_ERR_OR_ZERO(nvmem);
79f7845101SMichael Walle }
80f7845101SMichael Walle 
81*33a1c661SSean Anderson static const struct layerscape_sfp_data ls1021a_data = {
82*33a1c661SSean Anderson 	.size = 0x88,
83*33a1c661SSean Anderson 	.endian = REGMAP_ENDIAN_BIG,
84*33a1c661SSean Anderson };
85*33a1c661SSean Anderson 
86f7845101SMichael Walle static const struct layerscape_sfp_data ls1028a_data = {
87f7845101SMichael Walle 	.size = 0x88,
88943eadbdSSean Anderson 	.endian = REGMAP_ENDIAN_LITTLE,
89f7845101SMichael Walle };
90f7845101SMichael Walle 
91f7845101SMichael Walle static const struct of_device_id layerscape_sfp_dt_ids[] = {
92*33a1c661SSean Anderson 	{ .compatible = "fsl,ls1021a-sfp", .data = &ls1021a_data },
93f7845101SMichael Walle 	{ .compatible = "fsl,ls1028a-sfp", .data = &ls1028a_data },
94f7845101SMichael Walle 	{},
95f7845101SMichael Walle };
96f7845101SMichael Walle MODULE_DEVICE_TABLE(of, layerscape_sfp_dt_ids);
97f7845101SMichael Walle 
98f7845101SMichael Walle static struct platform_driver layerscape_sfp_driver = {
99f7845101SMichael Walle 	.probe	= layerscape_sfp_probe,
100f7845101SMichael Walle 	.driver = {
101f7845101SMichael Walle 		.name	= "layerscape_sfp",
102f7845101SMichael Walle 		.of_match_table = layerscape_sfp_dt_ids,
103f7845101SMichael Walle 	},
104f7845101SMichael Walle };
105f7845101SMichael Walle module_platform_driver(layerscape_sfp_driver);
106f7845101SMichael Walle 
107f7845101SMichael Walle MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
108f7845101SMichael Walle MODULE_DESCRIPTION("Layerscape Security Fuse Processor driver");
109f7845101SMichael Walle MODULE_LICENSE("GPL");
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