13641bd32SChristoph Hellwig // SPDX-License-Identifier: GPL-2.0 28f000cacSChristoph Hellwig /* 38f000cacSChristoph Hellwig * NVMe over Fabrics RDMA target. 48f000cacSChristoph Hellwig * Copyright (c) 2015-2016 HGST, a Western Digital Company. 58f000cacSChristoph Hellwig */ 68f000cacSChristoph Hellwig #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 78f000cacSChristoph Hellwig #include <linux/atomic.h> 88f000cacSChristoph Hellwig #include <linux/ctype.h> 98f000cacSChristoph Hellwig #include <linux/delay.h> 108f000cacSChristoph Hellwig #include <linux/err.h> 118f000cacSChristoph Hellwig #include <linux/init.h> 128f000cacSChristoph Hellwig #include <linux/module.h> 138f000cacSChristoph Hellwig #include <linux/nvme.h> 148f000cacSChristoph Hellwig #include <linux/slab.h> 158f000cacSChristoph Hellwig #include <linux/string.h> 168f000cacSChristoph Hellwig #include <linux/wait.h> 178f000cacSChristoph Hellwig #include <linux/inet.h> 188f000cacSChristoph Hellwig #include <asm/unaligned.h> 198f000cacSChristoph Hellwig 208f000cacSChristoph Hellwig #include <rdma/ib_verbs.h> 218f000cacSChristoph Hellwig #include <rdma/rdma_cm.h> 228f000cacSChristoph Hellwig #include <rdma/rw.h> 238094ba0aSLeon Romanovsky #include <rdma/ib_cm.h> 248f000cacSChristoph Hellwig 258f000cacSChristoph Hellwig #include <linux/nvme-rdma.h> 268f000cacSChristoph Hellwig #include "nvmet.h" 278f000cacSChristoph Hellwig 288f000cacSChristoph Hellwig /* 290d5ee2b2SSteve Wise * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data 308f000cacSChristoph Hellwig */ 310d5ee2b2SSteve Wise #define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE PAGE_SIZE 320d5ee2b2SSteve Wise #define NVMET_RDMA_MAX_INLINE_SGE 4 330d5ee2b2SSteve Wise #define NVMET_RDMA_MAX_INLINE_DATA_SIZE max_t(int, SZ_16K, PAGE_SIZE) 348f000cacSChristoph Hellwig 35ec6d20e1SMax Gurtovoy /* Assume mpsmin == device_page_size == 4KB */ 36ec6d20e1SMax Gurtovoy #define NVMET_RDMA_MAX_MDTS 8 37b09160c3SIsrael Rukshin #define NVMET_RDMA_MAX_METADATA_MDTS 5 38ec6d20e1SMax Gurtovoy 39b0012dd3SMax Gurtovoy struct nvmet_rdma_srq; 40b0012dd3SMax Gurtovoy 418f000cacSChristoph Hellwig struct nvmet_rdma_cmd { 420d5ee2b2SSteve Wise struct ib_sge sge[NVMET_RDMA_MAX_INLINE_SGE + 1]; 438f000cacSChristoph Hellwig struct ib_cqe cqe; 448f000cacSChristoph Hellwig struct ib_recv_wr wr; 450d5ee2b2SSteve Wise struct scatterlist inline_sg[NVMET_RDMA_MAX_INLINE_SGE]; 468f000cacSChristoph Hellwig struct nvme_command *nvme_cmd; 478f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 48b0012dd3SMax Gurtovoy struct nvmet_rdma_srq *nsrq; 498f000cacSChristoph Hellwig }; 508f000cacSChristoph Hellwig 518f000cacSChristoph Hellwig enum { 528f000cacSChristoph Hellwig NVMET_RDMA_REQ_INLINE_DATA = (1 << 0), 538f000cacSChristoph Hellwig NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1), 548f000cacSChristoph Hellwig }; 558f000cacSChristoph Hellwig 568f000cacSChristoph Hellwig struct nvmet_rdma_rsp { 578f000cacSChristoph Hellwig struct ib_sge send_sge; 588f000cacSChristoph Hellwig struct ib_cqe send_cqe; 598f000cacSChristoph Hellwig struct ib_send_wr send_wr; 608f000cacSChristoph Hellwig 618f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmd; 628f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 638f000cacSChristoph Hellwig 648f000cacSChristoph Hellwig struct ib_cqe read_cqe; 65b09160c3SIsrael Rukshin struct ib_cqe write_cqe; 668f000cacSChristoph Hellwig struct rdma_rw_ctx rw; 678f000cacSChristoph Hellwig 688f000cacSChristoph Hellwig struct nvmet_req req; 698f000cacSChristoph Hellwig 708407879cSSagi Grimberg bool allocated; 718f000cacSChristoph Hellwig u8 n_rdma; 728f000cacSChristoph Hellwig u32 flags; 738f000cacSChristoph Hellwig u32 invalidate_rkey; 748f000cacSChristoph Hellwig 758f000cacSChristoph Hellwig struct list_head wait_list; 768f000cacSChristoph Hellwig struct list_head free_list; 778f000cacSChristoph Hellwig }; 788f000cacSChristoph Hellwig 798f000cacSChristoph Hellwig enum nvmet_rdma_queue_state { 808f000cacSChristoph Hellwig NVMET_RDMA_Q_CONNECTING, 818f000cacSChristoph Hellwig NVMET_RDMA_Q_LIVE, 828f000cacSChristoph Hellwig NVMET_RDMA_Q_DISCONNECTING, 838f000cacSChristoph Hellwig }; 848f000cacSChristoph Hellwig 858f000cacSChristoph Hellwig struct nvmet_rdma_queue { 868f000cacSChristoph Hellwig struct rdma_cm_id *cm_id; 8721f90243SIsrael Rukshin struct ib_qp *qp; 888f000cacSChristoph Hellwig struct nvmet_port *port; 898f000cacSChristoph Hellwig struct ib_cq *cq; 908f000cacSChristoph Hellwig atomic_t sq_wr_avail; 918f000cacSChristoph Hellwig struct nvmet_rdma_device *dev; 92b0012dd3SMax Gurtovoy struct nvmet_rdma_srq *nsrq; 938f000cacSChristoph Hellwig spinlock_t state_lock; 948f000cacSChristoph Hellwig enum nvmet_rdma_queue_state state; 958f000cacSChristoph Hellwig struct nvmet_cq nvme_cq; 968f000cacSChristoph Hellwig struct nvmet_sq nvme_sq; 978f000cacSChristoph Hellwig 988f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsps; 998f000cacSChristoph Hellwig struct list_head free_rsps; 1008f000cacSChristoph Hellwig spinlock_t rsps_lock; 1018f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmds; 1028f000cacSChristoph Hellwig 1038f000cacSChristoph Hellwig struct work_struct release_work; 1048f000cacSChristoph Hellwig struct list_head rsp_wait_list; 1058f000cacSChristoph Hellwig struct list_head rsp_wr_wait_list; 1068f000cacSChristoph Hellwig spinlock_t rsp_wr_wait_lock; 1078f000cacSChristoph Hellwig 1088f000cacSChristoph Hellwig int idx; 1098f000cacSChristoph Hellwig int host_qid; 110b0012dd3SMax Gurtovoy int comp_vector; 1118f000cacSChristoph Hellwig int recv_queue_size; 1128f000cacSChristoph Hellwig int send_queue_size; 1138f000cacSChristoph Hellwig 1148f000cacSChristoph Hellwig struct list_head queue_list; 1158f000cacSChristoph Hellwig }; 1168f000cacSChristoph Hellwig 117a032e4f6SSagi Grimberg struct nvmet_rdma_port { 118a032e4f6SSagi Grimberg struct nvmet_port *nport; 119a032e4f6SSagi Grimberg struct sockaddr_storage addr; 120a032e4f6SSagi Grimberg struct rdma_cm_id *cm_id; 121a032e4f6SSagi Grimberg struct delayed_work repair_work; 122a032e4f6SSagi Grimberg }; 123a032e4f6SSagi Grimberg 124b0012dd3SMax Gurtovoy struct nvmet_rdma_srq { 125b0012dd3SMax Gurtovoy struct ib_srq *srq; 126b0012dd3SMax Gurtovoy struct nvmet_rdma_cmd *cmds; 127b0012dd3SMax Gurtovoy struct nvmet_rdma_device *ndev; 128b0012dd3SMax Gurtovoy }; 129b0012dd3SMax Gurtovoy 1308f000cacSChristoph Hellwig struct nvmet_rdma_device { 1318f000cacSChristoph Hellwig struct ib_device *device; 1328f000cacSChristoph Hellwig struct ib_pd *pd; 133b0012dd3SMax Gurtovoy struct nvmet_rdma_srq **srqs; 134b0012dd3SMax Gurtovoy int srq_count; 1358f000cacSChristoph Hellwig size_t srq_size; 1368f000cacSChristoph Hellwig struct kref ref; 1378f000cacSChristoph Hellwig struct list_head entry; 1380d5ee2b2SSteve Wise int inline_data_size; 1390d5ee2b2SSteve Wise int inline_page_count; 1408f000cacSChristoph Hellwig }; 1418f000cacSChristoph Hellwig 1428f000cacSChristoph Hellwig static bool nvmet_rdma_use_srq; 1438f000cacSChristoph Hellwig module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444); 1448f000cacSChristoph Hellwig MODULE_PARM_DESC(use_srq, "Use shared receive queue."); 1458f000cacSChristoph Hellwig 146b0012dd3SMax Gurtovoy static int srq_size_set(const char *val, const struct kernel_param *kp); 147b0012dd3SMax Gurtovoy static const struct kernel_param_ops srq_size_ops = { 148b0012dd3SMax Gurtovoy .set = srq_size_set, 149b0012dd3SMax Gurtovoy .get = param_get_int, 150b0012dd3SMax Gurtovoy }; 151b0012dd3SMax Gurtovoy 152b0012dd3SMax Gurtovoy static int nvmet_rdma_srq_size = 1024; 153b0012dd3SMax Gurtovoy module_param_cb(srq_size, &srq_size_ops, &nvmet_rdma_srq_size, 0644); 154b0012dd3SMax Gurtovoy MODULE_PARM_DESC(srq_size, "set Shared Receive Queue (SRQ) size, should >= 256 (default: 1024)"); 155b0012dd3SMax Gurtovoy 1568f000cacSChristoph Hellwig static DEFINE_IDA(nvmet_rdma_queue_ida); 1578f000cacSChristoph Hellwig static LIST_HEAD(nvmet_rdma_queue_list); 1588f000cacSChristoph Hellwig static DEFINE_MUTEX(nvmet_rdma_queue_mutex); 1598f000cacSChristoph Hellwig 1608f000cacSChristoph Hellwig static LIST_HEAD(device_list); 1618f000cacSChristoph Hellwig static DEFINE_MUTEX(device_list_mutex); 1628f000cacSChristoph Hellwig 1638f000cacSChristoph Hellwig static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp); 1648f000cacSChristoph Hellwig static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc); 1658f000cacSChristoph Hellwig static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 1668f000cacSChristoph Hellwig static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc); 167b09160c3SIsrael Rukshin static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc); 1688f000cacSChristoph Hellwig static void nvmet_rdma_qp_event(struct ib_event *event, void *priv); 1698f000cacSChristoph Hellwig static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue); 1705cbab630SRaju Rangoju static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev, 1715cbab630SRaju Rangoju struct nvmet_rdma_rsp *r); 1725cbab630SRaju Rangoju static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, 1735cbab630SRaju Rangoju struct nvmet_rdma_rsp *r); 1748f000cacSChristoph Hellwig 175e929f06dSChristoph Hellwig static const struct nvmet_fabrics_ops nvmet_rdma_ops; 1768f000cacSChristoph Hellwig 177b0012dd3SMax Gurtovoy static int srq_size_set(const char *val, const struct kernel_param *kp) 178b0012dd3SMax Gurtovoy { 179b0012dd3SMax Gurtovoy int n = 0, ret; 180b0012dd3SMax Gurtovoy 181b0012dd3SMax Gurtovoy ret = kstrtoint(val, 10, &n); 182b0012dd3SMax Gurtovoy if (ret != 0 || n < 256) 183b0012dd3SMax Gurtovoy return -EINVAL; 184b0012dd3SMax Gurtovoy 185b0012dd3SMax Gurtovoy return param_set_int(val, kp); 186b0012dd3SMax Gurtovoy } 187b0012dd3SMax Gurtovoy 1880d5ee2b2SSteve Wise static int num_pages(int len) 1890d5ee2b2SSteve Wise { 1900d5ee2b2SSteve Wise return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT); 1910d5ee2b2SSteve Wise } 1920d5ee2b2SSteve Wise 1938f000cacSChristoph Hellwig static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp) 1948f000cacSChristoph Hellwig { 1958f000cacSChristoph Hellwig return nvme_is_write(rsp->req.cmd) && 1965e62d5c9SChristoph Hellwig rsp->req.transfer_len && 1978f000cacSChristoph Hellwig !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA); 1988f000cacSChristoph Hellwig } 1998f000cacSChristoph Hellwig 2008f000cacSChristoph Hellwig static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp) 2018f000cacSChristoph Hellwig { 2028f000cacSChristoph Hellwig return !nvme_is_write(rsp->req.cmd) && 2035e62d5c9SChristoph Hellwig rsp->req.transfer_len && 204fc6c9730SMax Gurtovoy !rsp->req.cqe->status && 2058f000cacSChristoph Hellwig !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA); 2068f000cacSChristoph Hellwig } 2078f000cacSChristoph Hellwig 2088f000cacSChristoph Hellwig static inline struct nvmet_rdma_rsp * 2098f000cacSChristoph Hellwig nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue) 2108f000cacSChristoph Hellwig { 2118f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp; 2128f000cacSChristoph Hellwig unsigned long flags; 2138f000cacSChristoph Hellwig 2148f000cacSChristoph Hellwig spin_lock_irqsave(&queue->rsps_lock, flags); 2158407879cSSagi Grimberg rsp = list_first_entry_or_null(&queue->free_rsps, 2168f000cacSChristoph Hellwig struct nvmet_rdma_rsp, free_list); 2178407879cSSagi Grimberg if (likely(rsp)) 2188f000cacSChristoph Hellwig list_del(&rsp->free_list); 2198f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->rsps_lock, flags); 2208f000cacSChristoph Hellwig 2218407879cSSagi Grimberg if (unlikely(!rsp)) { 2225cbab630SRaju Rangoju int ret; 2235cbab630SRaju Rangoju 2245cbab630SRaju Rangoju rsp = kzalloc(sizeof(*rsp), GFP_KERNEL); 2258407879cSSagi Grimberg if (unlikely(!rsp)) 2268407879cSSagi Grimberg return NULL; 2275cbab630SRaju Rangoju ret = nvmet_rdma_alloc_rsp(queue->dev, rsp); 2285cbab630SRaju Rangoju if (unlikely(ret)) { 2295cbab630SRaju Rangoju kfree(rsp); 2305cbab630SRaju Rangoju return NULL; 2315cbab630SRaju Rangoju } 2325cbab630SRaju Rangoju 2338407879cSSagi Grimberg rsp->allocated = true; 2348407879cSSagi Grimberg } 2358407879cSSagi Grimberg 2368f000cacSChristoph Hellwig return rsp; 2378f000cacSChristoph Hellwig } 2388f000cacSChristoph Hellwig 2398f000cacSChristoph Hellwig static inline void 2408f000cacSChristoph Hellwig nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp) 2418f000cacSChristoph Hellwig { 2428f000cacSChristoph Hellwig unsigned long flags; 2438f000cacSChristoph Hellwig 244ad1f8249SIsrael Rukshin if (unlikely(rsp->allocated)) { 2455cbab630SRaju Rangoju nvmet_rdma_free_rsp(rsp->queue->dev, rsp); 2468407879cSSagi Grimberg kfree(rsp); 2478407879cSSagi Grimberg return; 2488407879cSSagi Grimberg } 2498407879cSSagi Grimberg 2508f000cacSChristoph Hellwig spin_lock_irqsave(&rsp->queue->rsps_lock, flags); 2518f000cacSChristoph Hellwig list_add_tail(&rsp->free_list, &rsp->queue->free_rsps); 2528f000cacSChristoph Hellwig spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags); 2538f000cacSChristoph Hellwig } 2548f000cacSChristoph Hellwig 2550d5ee2b2SSteve Wise static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev, 2560d5ee2b2SSteve Wise struct nvmet_rdma_cmd *c) 2570d5ee2b2SSteve Wise { 2580d5ee2b2SSteve Wise struct scatterlist *sg; 2590d5ee2b2SSteve Wise struct ib_sge *sge; 2600d5ee2b2SSteve Wise int i; 2610d5ee2b2SSteve Wise 2620d5ee2b2SSteve Wise if (!ndev->inline_data_size) 2630d5ee2b2SSteve Wise return; 2640d5ee2b2SSteve Wise 2650d5ee2b2SSteve Wise sg = c->inline_sg; 2660d5ee2b2SSteve Wise sge = &c->sge[1]; 2670d5ee2b2SSteve Wise 2680d5ee2b2SSteve Wise for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) { 2690d5ee2b2SSteve Wise if (sge->length) 2700d5ee2b2SSteve Wise ib_dma_unmap_page(ndev->device, sge->addr, 2710d5ee2b2SSteve Wise sge->length, DMA_FROM_DEVICE); 2720d5ee2b2SSteve Wise if (sg_page(sg)) 2730d5ee2b2SSteve Wise __free_page(sg_page(sg)); 2740d5ee2b2SSteve Wise } 2750d5ee2b2SSteve Wise } 2760d5ee2b2SSteve Wise 2770d5ee2b2SSteve Wise static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev, 2780d5ee2b2SSteve Wise struct nvmet_rdma_cmd *c) 2790d5ee2b2SSteve Wise { 2800d5ee2b2SSteve Wise struct scatterlist *sg; 2810d5ee2b2SSteve Wise struct ib_sge *sge; 2820d5ee2b2SSteve Wise struct page *pg; 2830d5ee2b2SSteve Wise int len; 2840d5ee2b2SSteve Wise int i; 2850d5ee2b2SSteve Wise 2860d5ee2b2SSteve Wise if (!ndev->inline_data_size) 2870d5ee2b2SSteve Wise return 0; 2880d5ee2b2SSteve Wise 2890d5ee2b2SSteve Wise sg = c->inline_sg; 2900d5ee2b2SSteve Wise sg_init_table(sg, ndev->inline_page_count); 2910d5ee2b2SSteve Wise sge = &c->sge[1]; 2920d5ee2b2SSteve Wise len = ndev->inline_data_size; 2930d5ee2b2SSteve Wise 2940d5ee2b2SSteve Wise for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) { 2950d5ee2b2SSteve Wise pg = alloc_page(GFP_KERNEL); 2960d5ee2b2SSteve Wise if (!pg) 2970d5ee2b2SSteve Wise goto out_err; 2980d5ee2b2SSteve Wise sg_assign_page(sg, pg); 2990d5ee2b2SSteve Wise sge->addr = ib_dma_map_page(ndev->device, 3000d5ee2b2SSteve Wise pg, 0, PAGE_SIZE, DMA_FROM_DEVICE); 3010d5ee2b2SSteve Wise if (ib_dma_mapping_error(ndev->device, sge->addr)) 3020d5ee2b2SSteve Wise goto out_err; 3030d5ee2b2SSteve Wise sge->length = min_t(int, len, PAGE_SIZE); 3040d5ee2b2SSteve Wise sge->lkey = ndev->pd->local_dma_lkey; 3050d5ee2b2SSteve Wise len -= sge->length; 3060d5ee2b2SSteve Wise } 3070d5ee2b2SSteve Wise 3080d5ee2b2SSteve Wise return 0; 3090d5ee2b2SSteve Wise out_err: 3100d5ee2b2SSteve Wise for (; i >= 0; i--, sg--, sge--) { 3110d5ee2b2SSteve Wise if (sge->length) 3120d5ee2b2SSteve Wise ib_dma_unmap_page(ndev->device, sge->addr, 3130d5ee2b2SSteve Wise sge->length, DMA_FROM_DEVICE); 3140d5ee2b2SSteve Wise if (sg_page(sg)) 3150d5ee2b2SSteve Wise __free_page(sg_page(sg)); 3160d5ee2b2SSteve Wise } 3170d5ee2b2SSteve Wise return -ENOMEM; 3180d5ee2b2SSteve Wise } 3190d5ee2b2SSteve Wise 3208f000cacSChristoph Hellwig static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev, 3218f000cacSChristoph Hellwig struct nvmet_rdma_cmd *c, bool admin) 3228f000cacSChristoph Hellwig { 3238f000cacSChristoph Hellwig /* NVMe command / RDMA RECV */ 3248f000cacSChristoph Hellwig c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL); 3258f000cacSChristoph Hellwig if (!c->nvme_cmd) 3268f000cacSChristoph Hellwig goto out; 3278f000cacSChristoph Hellwig 3288f000cacSChristoph Hellwig c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd, 3298f000cacSChristoph Hellwig sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 3308f000cacSChristoph Hellwig if (ib_dma_mapping_error(ndev->device, c->sge[0].addr)) 3318f000cacSChristoph Hellwig goto out_free_cmd; 3328f000cacSChristoph Hellwig 3338f000cacSChristoph Hellwig c->sge[0].length = sizeof(*c->nvme_cmd); 3348f000cacSChristoph Hellwig c->sge[0].lkey = ndev->pd->local_dma_lkey; 3358f000cacSChristoph Hellwig 3360d5ee2b2SSteve Wise if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c)) 3378f000cacSChristoph Hellwig goto out_unmap_cmd; 3388f000cacSChristoph Hellwig 3398f000cacSChristoph Hellwig c->cqe.done = nvmet_rdma_recv_done; 3408f000cacSChristoph Hellwig 3418f000cacSChristoph Hellwig c->wr.wr_cqe = &c->cqe; 3428f000cacSChristoph Hellwig c->wr.sg_list = c->sge; 3430d5ee2b2SSteve Wise c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1; 3448f000cacSChristoph Hellwig 3458f000cacSChristoph Hellwig return 0; 3468f000cacSChristoph Hellwig 3478f000cacSChristoph Hellwig out_unmap_cmd: 3488f000cacSChristoph Hellwig ib_dma_unmap_single(ndev->device, c->sge[0].addr, 3498f000cacSChristoph Hellwig sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 3508f000cacSChristoph Hellwig out_free_cmd: 3518f000cacSChristoph Hellwig kfree(c->nvme_cmd); 3528f000cacSChristoph Hellwig 3538f000cacSChristoph Hellwig out: 3548f000cacSChristoph Hellwig return -ENOMEM; 3558f000cacSChristoph Hellwig } 3568f000cacSChristoph Hellwig 3578f000cacSChristoph Hellwig static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev, 3588f000cacSChristoph Hellwig struct nvmet_rdma_cmd *c, bool admin) 3598f000cacSChristoph Hellwig { 3600d5ee2b2SSteve Wise if (!admin) 3610d5ee2b2SSteve Wise nvmet_rdma_free_inline_pages(ndev, c); 3628f000cacSChristoph Hellwig ib_dma_unmap_single(ndev->device, c->sge[0].addr, 3638f000cacSChristoph Hellwig sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 3648f000cacSChristoph Hellwig kfree(c->nvme_cmd); 3658f000cacSChristoph Hellwig } 3668f000cacSChristoph Hellwig 3678f000cacSChristoph Hellwig static struct nvmet_rdma_cmd * 3688f000cacSChristoph Hellwig nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev, 3698f000cacSChristoph Hellwig int nr_cmds, bool admin) 3708f000cacSChristoph Hellwig { 3718f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmds; 3728f000cacSChristoph Hellwig int ret = -EINVAL, i; 3738f000cacSChristoph Hellwig 3748f000cacSChristoph Hellwig cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL); 3758f000cacSChristoph Hellwig if (!cmds) 3768f000cacSChristoph Hellwig goto out; 3778f000cacSChristoph Hellwig 3788f000cacSChristoph Hellwig for (i = 0; i < nr_cmds; i++) { 3798f000cacSChristoph Hellwig ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin); 3808f000cacSChristoph Hellwig if (ret) 3818f000cacSChristoph Hellwig goto out_free; 3828f000cacSChristoph Hellwig } 3838f000cacSChristoph Hellwig 3848f000cacSChristoph Hellwig return cmds; 3858f000cacSChristoph Hellwig 3868f000cacSChristoph Hellwig out_free: 3878f000cacSChristoph Hellwig while (--i >= 0) 3888f000cacSChristoph Hellwig nvmet_rdma_free_cmd(ndev, cmds + i, admin); 3898f000cacSChristoph Hellwig kfree(cmds); 3908f000cacSChristoph Hellwig out: 3918f000cacSChristoph Hellwig return ERR_PTR(ret); 3928f000cacSChristoph Hellwig } 3938f000cacSChristoph Hellwig 3948f000cacSChristoph Hellwig static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev, 3958f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin) 3968f000cacSChristoph Hellwig { 3978f000cacSChristoph Hellwig int i; 3988f000cacSChristoph Hellwig 3998f000cacSChristoph Hellwig for (i = 0; i < nr_cmds; i++) 4008f000cacSChristoph Hellwig nvmet_rdma_free_cmd(ndev, cmds + i, admin); 4018f000cacSChristoph Hellwig kfree(cmds); 4028f000cacSChristoph Hellwig } 4038f000cacSChristoph Hellwig 4048f000cacSChristoph Hellwig static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, 4058f000cacSChristoph Hellwig struct nvmet_rdma_rsp *r) 4068f000cacSChristoph Hellwig { 4078f000cacSChristoph Hellwig /* NVMe CQE / RDMA SEND */ 408fc6c9730SMax Gurtovoy r->req.cqe = kmalloc(sizeof(*r->req.cqe), GFP_KERNEL); 409fc6c9730SMax Gurtovoy if (!r->req.cqe) 4108f000cacSChristoph Hellwig goto out; 4118f000cacSChristoph Hellwig 412fc6c9730SMax Gurtovoy r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.cqe, 413fc6c9730SMax Gurtovoy sizeof(*r->req.cqe), DMA_TO_DEVICE); 4148f000cacSChristoph Hellwig if (ib_dma_mapping_error(ndev->device, r->send_sge.addr)) 4158f000cacSChristoph Hellwig goto out_free_rsp; 4168f000cacSChristoph Hellwig 4178dc2ed3fSMax Gurtovoy r->req.p2p_client = &ndev->device->dev; 418fc6c9730SMax Gurtovoy r->send_sge.length = sizeof(*r->req.cqe); 4198f000cacSChristoph Hellwig r->send_sge.lkey = ndev->pd->local_dma_lkey; 4208f000cacSChristoph Hellwig 4218f000cacSChristoph Hellwig r->send_cqe.done = nvmet_rdma_send_done; 4228f000cacSChristoph Hellwig 4238f000cacSChristoph Hellwig r->send_wr.wr_cqe = &r->send_cqe; 4248f000cacSChristoph Hellwig r->send_wr.sg_list = &r->send_sge; 4258f000cacSChristoph Hellwig r->send_wr.num_sge = 1; 4268f000cacSChristoph Hellwig r->send_wr.send_flags = IB_SEND_SIGNALED; 4278f000cacSChristoph Hellwig 4288f000cacSChristoph Hellwig /* Data In / RDMA READ */ 4298f000cacSChristoph Hellwig r->read_cqe.done = nvmet_rdma_read_data_done; 430b09160c3SIsrael Rukshin /* Data Out / RDMA WRITE */ 431b09160c3SIsrael Rukshin r->write_cqe.done = nvmet_rdma_write_data_done; 432b09160c3SIsrael Rukshin 4338f000cacSChristoph Hellwig return 0; 4348f000cacSChristoph Hellwig 4358f000cacSChristoph Hellwig out_free_rsp: 436fc6c9730SMax Gurtovoy kfree(r->req.cqe); 4378f000cacSChristoph Hellwig out: 4388f000cacSChristoph Hellwig return -ENOMEM; 4398f000cacSChristoph Hellwig } 4408f000cacSChristoph Hellwig 4418f000cacSChristoph Hellwig static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev, 4428f000cacSChristoph Hellwig struct nvmet_rdma_rsp *r) 4438f000cacSChristoph Hellwig { 4448f000cacSChristoph Hellwig ib_dma_unmap_single(ndev->device, r->send_sge.addr, 445fc6c9730SMax Gurtovoy sizeof(*r->req.cqe), DMA_TO_DEVICE); 446fc6c9730SMax Gurtovoy kfree(r->req.cqe); 4478f000cacSChristoph Hellwig } 4488f000cacSChristoph Hellwig 4498f000cacSChristoph Hellwig static int 4508f000cacSChristoph Hellwig nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue) 4518f000cacSChristoph Hellwig { 4528f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = queue->dev; 4538f000cacSChristoph Hellwig int nr_rsps = queue->recv_queue_size * 2; 4548f000cacSChristoph Hellwig int ret = -EINVAL, i; 4558f000cacSChristoph Hellwig 4568f000cacSChristoph Hellwig queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp), 4578f000cacSChristoph Hellwig GFP_KERNEL); 4588f000cacSChristoph Hellwig if (!queue->rsps) 4598f000cacSChristoph Hellwig goto out; 4608f000cacSChristoph Hellwig 4618f000cacSChristoph Hellwig for (i = 0; i < nr_rsps; i++) { 4628f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 4638f000cacSChristoph Hellwig 4648f000cacSChristoph Hellwig ret = nvmet_rdma_alloc_rsp(ndev, rsp); 4658f000cacSChristoph Hellwig if (ret) 4668f000cacSChristoph Hellwig goto out_free; 4678f000cacSChristoph Hellwig 4688f000cacSChristoph Hellwig list_add_tail(&rsp->free_list, &queue->free_rsps); 4698f000cacSChristoph Hellwig } 4708f000cacSChristoph Hellwig 4718f000cacSChristoph Hellwig return 0; 4728f000cacSChristoph Hellwig 4738f000cacSChristoph Hellwig out_free: 4748f000cacSChristoph Hellwig while (--i >= 0) { 4758f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 4768f000cacSChristoph Hellwig 4778f000cacSChristoph Hellwig list_del(&rsp->free_list); 4788f000cacSChristoph Hellwig nvmet_rdma_free_rsp(ndev, rsp); 4798f000cacSChristoph Hellwig } 4808f000cacSChristoph Hellwig kfree(queue->rsps); 4818f000cacSChristoph Hellwig out: 4828f000cacSChristoph Hellwig return ret; 4838f000cacSChristoph Hellwig } 4848f000cacSChristoph Hellwig 4858f000cacSChristoph Hellwig static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue) 4868f000cacSChristoph Hellwig { 4878f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = queue->dev; 4888f000cacSChristoph Hellwig int i, nr_rsps = queue->recv_queue_size * 2; 4898f000cacSChristoph Hellwig 4908f000cacSChristoph Hellwig for (i = 0; i < nr_rsps; i++) { 4918f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 4928f000cacSChristoph Hellwig 4938f000cacSChristoph Hellwig list_del(&rsp->free_list); 4948f000cacSChristoph Hellwig nvmet_rdma_free_rsp(ndev, rsp); 4958f000cacSChristoph Hellwig } 4968f000cacSChristoph Hellwig kfree(queue->rsps); 4978f000cacSChristoph Hellwig } 4988f000cacSChristoph Hellwig 4998f000cacSChristoph Hellwig static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev, 5008f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmd) 5018f000cacSChristoph Hellwig { 50220209384SMax Gurtovoy int ret; 5038f000cacSChristoph Hellwig 504748ff840SParav Pandit ib_dma_sync_single_for_device(ndev->device, 505748ff840SParav Pandit cmd->sge[0].addr, cmd->sge[0].length, 506748ff840SParav Pandit DMA_FROM_DEVICE); 507748ff840SParav Pandit 508b0012dd3SMax Gurtovoy if (cmd->nsrq) 509b0012dd3SMax Gurtovoy ret = ib_post_srq_recv(cmd->nsrq->srq, &cmd->wr, NULL); 51020209384SMax Gurtovoy else 51121f90243SIsrael Rukshin ret = ib_post_recv(cmd->queue->qp, &cmd->wr, NULL); 51220209384SMax Gurtovoy 51320209384SMax Gurtovoy if (unlikely(ret)) 51420209384SMax Gurtovoy pr_err("post_recv cmd failed\n"); 51520209384SMax Gurtovoy 51620209384SMax Gurtovoy return ret; 5178f000cacSChristoph Hellwig } 5188f000cacSChristoph Hellwig 5198f000cacSChristoph Hellwig static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue) 5208f000cacSChristoph Hellwig { 5218f000cacSChristoph Hellwig spin_lock(&queue->rsp_wr_wait_lock); 5228f000cacSChristoph Hellwig while (!list_empty(&queue->rsp_wr_wait_list)) { 5238f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp; 5248f000cacSChristoph Hellwig bool ret; 5258f000cacSChristoph Hellwig 5268f000cacSChristoph Hellwig rsp = list_entry(queue->rsp_wr_wait_list.next, 5278f000cacSChristoph Hellwig struct nvmet_rdma_rsp, wait_list); 5288f000cacSChristoph Hellwig list_del(&rsp->wait_list); 5298f000cacSChristoph Hellwig 5308f000cacSChristoph Hellwig spin_unlock(&queue->rsp_wr_wait_lock); 5318f000cacSChristoph Hellwig ret = nvmet_rdma_execute_command(rsp); 5328f000cacSChristoph Hellwig spin_lock(&queue->rsp_wr_wait_lock); 5338f000cacSChristoph Hellwig 5348f000cacSChristoph Hellwig if (!ret) { 5358f000cacSChristoph Hellwig list_add(&rsp->wait_list, &queue->rsp_wr_wait_list); 5368f000cacSChristoph Hellwig break; 5378f000cacSChristoph Hellwig } 5388f000cacSChristoph Hellwig } 5398f000cacSChristoph Hellwig spin_unlock(&queue->rsp_wr_wait_lock); 5408f000cacSChristoph Hellwig } 5418f000cacSChristoph Hellwig 542b09160c3SIsrael Rukshin static u16 nvmet_rdma_check_pi_status(struct ib_mr *sig_mr) 543b09160c3SIsrael Rukshin { 544b09160c3SIsrael Rukshin struct ib_mr_status mr_status; 545b09160c3SIsrael Rukshin int ret; 546b09160c3SIsrael Rukshin u16 status = 0; 547b09160c3SIsrael Rukshin 548b09160c3SIsrael Rukshin ret = ib_check_mr_status(sig_mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 549b09160c3SIsrael Rukshin if (ret) { 550b09160c3SIsrael Rukshin pr_err("ib_check_mr_status failed, ret %d\n", ret); 551b09160c3SIsrael Rukshin return NVME_SC_INVALID_PI; 552b09160c3SIsrael Rukshin } 553b09160c3SIsrael Rukshin 554b09160c3SIsrael Rukshin if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 555b09160c3SIsrael Rukshin switch (mr_status.sig_err.err_type) { 556b09160c3SIsrael Rukshin case IB_SIG_BAD_GUARD: 557b09160c3SIsrael Rukshin status = NVME_SC_GUARD_CHECK; 558b09160c3SIsrael Rukshin break; 559b09160c3SIsrael Rukshin case IB_SIG_BAD_REFTAG: 560b09160c3SIsrael Rukshin status = NVME_SC_REFTAG_CHECK; 561b09160c3SIsrael Rukshin break; 562b09160c3SIsrael Rukshin case IB_SIG_BAD_APPTAG: 563b09160c3SIsrael Rukshin status = NVME_SC_APPTAG_CHECK; 564b09160c3SIsrael Rukshin break; 565b09160c3SIsrael Rukshin } 566b09160c3SIsrael Rukshin pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 567b09160c3SIsrael Rukshin mr_status.sig_err.err_type, 568b09160c3SIsrael Rukshin mr_status.sig_err.expected, 569b09160c3SIsrael Rukshin mr_status.sig_err.actual); 570b09160c3SIsrael Rukshin } 571b09160c3SIsrael Rukshin 572b09160c3SIsrael Rukshin return status; 573b09160c3SIsrael Rukshin } 574b09160c3SIsrael Rukshin 575b09160c3SIsrael Rukshin static void nvmet_rdma_set_sig_domain(struct blk_integrity *bi, 576b09160c3SIsrael Rukshin struct nvme_command *cmd, struct ib_sig_domain *domain, 577b09160c3SIsrael Rukshin u16 control, u8 pi_type) 578b09160c3SIsrael Rukshin { 579b09160c3SIsrael Rukshin domain->sig_type = IB_SIG_TYPE_T10_DIF; 580b09160c3SIsrael Rukshin domain->sig.dif.bg_type = IB_T10DIF_CRC; 581b09160c3SIsrael Rukshin domain->sig.dif.pi_interval = 1 << bi->interval_exp; 582b09160c3SIsrael Rukshin domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 583b09160c3SIsrael Rukshin if (control & NVME_RW_PRINFO_PRCHK_REF) 584b09160c3SIsrael Rukshin domain->sig.dif.ref_remap = true; 585b09160c3SIsrael Rukshin 586b09160c3SIsrael Rukshin domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 587b09160c3SIsrael Rukshin domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 588b09160c3SIsrael Rukshin domain->sig.dif.app_escape = true; 589b09160c3SIsrael Rukshin if (pi_type == NVME_NS_DPS_PI_TYPE3) 590b09160c3SIsrael Rukshin domain->sig.dif.ref_escape = true; 591b09160c3SIsrael Rukshin } 592b09160c3SIsrael Rukshin 593b09160c3SIsrael Rukshin static void nvmet_rdma_set_sig_attrs(struct nvmet_req *req, 594b09160c3SIsrael Rukshin struct ib_sig_attrs *sig_attrs) 595b09160c3SIsrael Rukshin { 596b09160c3SIsrael Rukshin struct nvme_command *cmd = req->cmd; 597b09160c3SIsrael Rukshin u16 control = le16_to_cpu(cmd->rw.control); 598b09160c3SIsrael Rukshin u8 pi_type = req->ns->pi_type; 599b09160c3SIsrael Rukshin struct blk_integrity *bi; 600b09160c3SIsrael Rukshin 601b09160c3SIsrael Rukshin bi = bdev_get_integrity(req->ns->bdev); 602b09160c3SIsrael Rukshin 603b09160c3SIsrael Rukshin memset(sig_attrs, 0, sizeof(*sig_attrs)); 604b09160c3SIsrael Rukshin 605b09160c3SIsrael Rukshin if (control & NVME_RW_PRINFO_PRACT) { 606b09160c3SIsrael Rukshin /* for WRITE_INSERT/READ_STRIP no wire domain */ 607b09160c3SIsrael Rukshin sig_attrs->wire.sig_type = IB_SIG_TYPE_NONE; 608b09160c3SIsrael Rukshin nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 609b09160c3SIsrael Rukshin pi_type); 610b09160c3SIsrael Rukshin /* Clear the PRACT bit since HCA will generate/verify the PI */ 611b09160c3SIsrael Rukshin control &= ~NVME_RW_PRINFO_PRACT; 612b09160c3SIsrael Rukshin cmd->rw.control = cpu_to_le16(control); 613b09160c3SIsrael Rukshin /* PI is added by the HW */ 614b09160c3SIsrael Rukshin req->transfer_len += req->metadata_len; 615b09160c3SIsrael Rukshin } else { 616b09160c3SIsrael Rukshin /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 617b09160c3SIsrael Rukshin nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 618b09160c3SIsrael Rukshin pi_type); 619b09160c3SIsrael Rukshin nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 620b09160c3SIsrael Rukshin pi_type); 621b09160c3SIsrael Rukshin } 622b09160c3SIsrael Rukshin 623b09160c3SIsrael Rukshin if (control & NVME_RW_PRINFO_PRCHK_REF) 624b09160c3SIsrael Rukshin sig_attrs->check_mask |= IB_SIG_CHECK_REFTAG; 625b09160c3SIsrael Rukshin if (control & NVME_RW_PRINFO_PRCHK_GUARD) 626b09160c3SIsrael Rukshin sig_attrs->check_mask |= IB_SIG_CHECK_GUARD; 627b09160c3SIsrael Rukshin if (control & NVME_RW_PRINFO_PRCHK_APP) 628b09160c3SIsrael Rukshin sig_attrs->check_mask |= IB_SIG_CHECK_APPTAG; 629b09160c3SIsrael Rukshin } 630b09160c3SIsrael Rukshin 631b09160c3SIsrael Rukshin static int nvmet_rdma_rw_ctx_init(struct nvmet_rdma_rsp *rsp, u64 addr, u32 key, 632b09160c3SIsrael Rukshin struct ib_sig_attrs *sig_attrs) 633b09160c3SIsrael Rukshin { 634b09160c3SIsrael Rukshin struct rdma_cm_id *cm_id = rsp->queue->cm_id; 635b09160c3SIsrael Rukshin struct nvmet_req *req = &rsp->req; 636b09160c3SIsrael Rukshin int ret; 637b09160c3SIsrael Rukshin 638b09160c3SIsrael Rukshin if (req->metadata_len) 639b09160c3SIsrael Rukshin ret = rdma_rw_ctx_signature_init(&rsp->rw, cm_id->qp, 640b09160c3SIsrael Rukshin cm_id->port_num, req->sg, req->sg_cnt, 641b09160c3SIsrael Rukshin req->metadata_sg, req->metadata_sg_cnt, sig_attrs, 642b09160c3SIsrael Rukshin addr, key, nvmet_data_dir(req)); 643b09160c3SIsrael Rukshin else 644b09160c3SIsrael Rukshin ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num, 645b09160c3SIsrael Rukshin req->sg, req->sg_cnt, 0, addr, key, 646b09160c3SIsrael Rukshin nvmet_data_dir(req)); 647b09160c3SIsrael Rukshin 648b09160c3SIsrael Rukshin return ret; 649b09160c3SIsrael Rukshin } 650b09160c3SIsrael Rukshin 651b09160c3SIsrael Rukshin static void nvmet_rdma_rw_ctx_destroy(struct nvmet_rdma_rsp *rsp) 652b09160c3SIsrael Rukshin { 653b09160c3SIsrael Rukshin struct rdma_cm_id *cm_id = rsp->queue->cm_id; 654b09160c3SIsrael Rukshin struct nvmet_req *req = &rsp->req; 655b09160c3SIsrael Rukshin 656b09160c3SIsrael Rukshin if (req->metadata_len) 657b09160c3SIsrael Rukshin rdma_rw_ctx_destroy_signature(&rsp->rw, cm_id->qp, 658b09160c3SIsrael Rukshin cm_id->port_num, req->sg, req->sg_cnt, 659b09160c3SIsrael Rukshin req->metadata_sg, req->metadata_sg_cnt, 660b09160c3SIsrael Rukshin nvmet_data_dir(req)); 661b09160c3SIsrael Rukshin else 662b09160c3SIsrael Rukshin rdma_rw_ctx_destroy(&rsp->rw, cm_id->qp, cm_id->port_num, 663b09160c3SIsrael Rukshin req->sg, req->sg_cnt, nvmet_data_dir(req)); 664b09160c3SIsrael Rukshin } 6658f000cacSChristoph Hellwig 6668f000cacSChristoph Hellwig static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp) 6678f000cacSChristoph Hellwig { 6688f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = rsp->queue; 6698f000cacSChristoph Hellwig 6708f000cacSChristoph Hellwig atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail); 6718f000cacSChristoph Hellwig 672b09160c3SIsrael Rukshin if (rsp->n_rdma) 673b09160c3SIsrael Rukshin nvmet_rdma_rw_ctx_destroy(rsp); 6748f000cacSChristoph Hellwig 6750d5ee2b2SSteve Wise if (rsp->req.sg != rsp->cmd->inline_sg) 676c6e3f133SIsrael Rukshin nvmet_req_free_sgls(&rsp->req); 6778f000cacSChristoph Hellwig 6788f000cacSChristoph Hellwig if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list))) 6798f000cacSChristoph Hellwig nvmet_rdma_process_wr_wait_list(queue); 6808f000cacSChristoph Hellwig 6818f000cacSChristoph Hellwig nvmet_rdma_put_rsp(rsp); 6828f000cacSChristoph Hellwig } 6838f000cacSChristoph Hellwig 6848f000cacSChristoph Hellwig static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue) 6858f000cacSChristoph Hellwig { 6868f000cacSChristoph Hellwig if (queue->nvme_sq.ctrl) { 6878f000cacSChristoph Hellwig nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl); 6888f000cacSChristoph Hellwig } else { 6898f000cacSChristoph Hellwig /* 6908f000cacSChristoph Hellwig * we didn't setup the controller yet in case 6918f000cacSChristoph Hellwig * of admin connect error, just disconnect and 6928f000cacSChristoph Hellwig * cleanup the queue 6938f000cacSChristoph Hellwig */ 6948f000cacSChristoph Hellwig nvmet_rdma_queue_disconnect(queue); 6958f000cacSChristoph Hellwig } 6968f000cacSChristoph Hellwig } 6978f000cacSChristoph Hellwig 6988f000cacSChristoph Hellwig static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 6998f000cacSChristoph Hellwig { 7008f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = 7018f000cacSChristoph Hellwig container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe); 702d7dcdf9dSIsrael Rukshin struct nvmet_rdma_queue *queue = cq->cq_context; 7038f000cacSChristoph Hellwig 7048f000cacSChristoph Hellwig nvmet_rdma_release_rsp(rsp); 7058f000cacSChristoph Hellwig 7068f000cacSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS && 7078f000cacSChristoph Hellwig wc->status != IB_WC_WR_FLUSH_ERR)) { 7088f000cacSChristoph Hellwig pr_err("SEND for CQE 0x%p failed with status %s (%d).\n", 7098f000cacSChristoph Hellwig wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status); 710d7dcdf9dSIsrael Rukshin nvmet_rdma_error_comp(queue); 7118f000cacSChristoph Hellwig } 7128f000cacSChristoph Hellwig } 7138f000cacSChristoph Hellwig 7148f000cacSChristoph Hellwig static void nvmet_rdma_queue_response(struct nvmet_req *req) 7158f000cacSChristoph Hellwig { 7168f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = 7178f000cacSChristoph Hellwig container_of(req, struct nvmet_rdma_rsp, req); 7188f000cacSChristoph Hellwig struct rdma_cm_id *cm_id = rsp->queue->cm_id; 71923f96d1fSBart Van Assche struct ib_send_wr *first_wr; 7208f000cacSChristoph Hellwig 7218f000cacSChristoph Hellwig if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) { 7228f000cacSChristoph Hellwig rsp->send_wr.opcode = IB_WR_SEND_WITH_INV; 7238f000cacSChristoph Hellwig rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey; 7248f000cacSChristoph Hellwig } else { 7258f000cacSChristoph Hellwig rsp->send_wr.opcode = IB_WR_SEND; 7268f000cacSChristoph Hellwig } 7278f000cacSChristoph Hellwig 728b09160c3SIsrael Rukshin if (nvmet_rdma_need_data_out(rsp)) { 729b09160c3SIsrael Rukshin if (rsp->req.metadata_len) 730b09160c3SIsrael Rukshin first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp, 731b09160c3SIsrael Rukshin cm_id->port_num, &rsp->write_cqe, NULL); 732b09160c3SIsrael Rukshin else 7338f000cacSChristoph Hellwig first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp, 7348f000cacSChristoph Hellwig cm_id->port_num, NULL, &rsp->send_wr); 735b09160c3SIsrael Rukshin } else { 7368f000cacSChristoph Hellwig first_wr = &rsp->send_wr; 737b09160c3SIsrael Rukshin } 7388f000cacSChristoph Hellwig 7398f000cacSChristoph Hellwig nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd); 740748ff840SParav Pandit 741748ff840SParav Pandit ib_dma_sync_single_for_device(rsp->queue->dev->device, 742748ff840SParav Pandit rsp->send_sge.addr, rsp->send_sge.length, 743748ff840SParav Pandit DMA_TO_DEVICE); 744748ff840SParav Pandit 7450a3173a5SJason Gunthorpe if (unlikely(ib_post_send(cm_id->qp, first_wr, NULL))) { 7468f000cacSChristoph Hellwig pr_err("sending cmd response failed\n"); 7478f000cacSChristoph Hellwig nvmet_rdma_release_rsp(rsp); 7488f000cacSChristoph Hellwig } 7498f000cacSChristoph Hellwig } 7508f000cacSChristoph Hellwig 7518f000cacSChristoph Hellwig static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc) 7528f000cacSChristoph Hellwig { 7538f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = 7548f000cacSChristoph Hellwig container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe); 755*ca0f1a80SYamin Friedman struct nvmet_rdma_queue *queue = wc->qp->qp_context; 756b09160c3SIsrael Rukshin u16 status = 0; 7578f000cacSChristoph Hellwig 7588f000cacSChristoph Hellwig WARN_ON(rsp->n_rdma <= 0); 7598f000cacSChristoph Hellwig atomic_add(rsp->n_rdma, &queue->sq_wr_avail); 7608f000cacSChristoph Hellwig rsp->n_rdma = 0; 7618f000cacSChristoph Hellwig 7628f000cacSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS)) { 763b09160c3SIsrael Rukshin nvmet_rdma_rw_ctx_destroy(rsp); 764549f01aeSVijay Immanuel nvmet_req_uninit(&rsp->req); 7658f000cacSChristoph Hellwig nvmet_rdma_release_rsp(rsp); 7668f000cacSChristoph Hellwig if (wc->status != IB_WC_WR_FLUSH_ERR) { 7678f000cacSChristoph Hellwig pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n", 7688f000cacSChristoph Hellwig wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status); 7698f000cacSChristoph Hellwig nvmet_rdma_error_comp(queue); 7708f000cacSChristoph Hellwig } 7718f000cacSChristoph Hellwig return; 7728f000cacSChristoph Hellwig } 7738f000cacSChristoph Hellwig 774b09160c3SIsrael Rukshin if (rsp->req.metadata_len) 775b09160c3SIsrael Rukshin status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr); 776b09160c3SIsrael Rukshin nvmet_rdma_rw_ctx_destroy(rsp); 777b09160c3SIsrael Rukshin 778b09160c3SIsrael Rukshin if (unlikely(status)) 779b09160c3SIsrael Rukshin nvmet_req_complete(&rsp->req, status); 780b09160c3SIsrael Rukshin else 781be3f3114SChristoph Hellwig rsp->req.execute(&rsp->req); 7828f000cacSChristoph Hellwig } 7838f000cacSChristoph Hellwig 784b09160c3SIsrael Rukshin static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc) 785b09160c3SIsrael Rukshin { 786b09160c3SIsrael Rukshin struct nvmet_rdma_rsp *rsp = 787b09160c3SIsrael Rukshin container_of(wc->wr_cqe, struct nvmet_rdma_rsp, write_cqe); 788b09160c3SIsrael Rukshin struct nvmet_rdma_queue *queue = cq->cq_context; 789b09160c3SIsrael Rukshin struct rdma_cm_id *cm_id = rsp->queue->cm_id; 790b09160c3SIsrael Rukshin u16 status; 791b09160c3SIsrael Rukshin 792b09160c3SIsrael Rukshin if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) 793b09160c3SIsrael Rukshin return; 794b09160c3SIsrael Rukshin 795b09160c3SIsrael Rukshin WARN_ON(rsp->n_rdma <= 0); 796b09160c3SIsrael Rukshin atomic_add(rsp->n_rdma, &queue->sq_wr_avail); 797b09160c3SIsrael Rukshin rsp->n_rdma = 0; 798b09160c3SIsrael Rukshin 799b09160c3SIsrael Rukshin if (unlikely(wc->status != IB_WC_SUCCESS)) { 800b09160c3SIsrael Rukshin nvmet_rdma_rw_ctx_destroy(rsp); 801b09160c3SIsrael Rukshin nvmet_req_uninit(&rsp->req); 802b09160c3SIsrael Rukshin nvmet_rdma_release_rsp(rsp); 803b09160c3SIsrael Rukshin if (wc->status != IB_WC_WR_FLUSH_ERR) { 804b09160c3SIsrael Rukshin pr_info("RDMA WRITE for CQE 0x%p failed with status %s (%d).\n", 805b09160c3SIsrael Rukshin wc->wr_cqe, ib_wc_status_msg(wc->status), 806b09160c3SIsrael Rukshin wc->status); 807b09160c3SIsrael Rukshin nvmet_rdma_error_comp(queue); 808b09160c3SIsrael Rukshin } 809b09160c3SIsrael Rukshin return; 810b09160c3SIsrael Rukshin } 811b09160c3SIsrael Rukshin 812b09160c3SIsrael Rukshin /* 813b09160c3SIsrael Rukshin * Upon RDMA completion check the signature status 814b09160c3SIsrael Rukshin * - if succeeded send good NVMe response 815b09160c3SIsrael Rukshin * - if failed send bad NVMe response with appropriate error 816b09160c3SIsrael Rukshin */ 817b09160c3SIsrael Rukshin status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr); 818b09160c3SIsrael Rukshin if (unlikely(status)) 819b09160c3SIsrael Rukshin rsp->req.cqe->status = cpu_to_le16(status << 1); 820b09160c3SIsrael Rukshin nvmet_rdma_rw_ctx_destroy(rsp); 821b09160c3SIsrael Rukshin 822b09160c3SIsrael Rukshin if (unlikely(ib_post_send(cm_id->qp, &rsp->send_wr, NULL))) { 823b09160c3SIsrael Rukshin pr_err("sending cmd response failed\n"); 824b09160c3SIsrael Rukshin nvmet_rdma_release_rsp(rsp); 825b09160c3SIsrael Rukshin } 826b09160c3SIsrael Rukshin } 827b09160c3SIsrael Rukshin 8288f000cacSChristoph Hellwig static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len, 8298f000cacSChristoph Hellwig u64 off) 8308f000cacSChristoph Hellwig { 8310d5ee2b2SSteve Wise int sg_count = num_pages(len); 8320d5ee2b2SSteve Wise struct scatterlist *sg; 8330d5ee2b2SSteve Wise int i; 8340d5ee2b2SSteve Wise 8350d5ee2b2SSteve Wise sg = rsp->cmd->inline_sg; 8360d5ee2b2SSteve Wise for (i = 0; i < sg_count; i++, sg++) { 8370d5ee2b2SSteve Wise if (i < sg_count - 1) 8380d5ee2b2SSteve Wise sg_unmark_end(sg); 8390d5ee2b2SSteve Wise else 8400d5ee2b2SSteve Wise sg_mark_end(sg); 8410d5ee2b2SSteve Wise sg->offset = off; 8420d5ee2b2SSteve Wise sg->length = min_t(int, len, PAGE_SIZE - off); 8430d5ee2b2SSteve Wise len -= sg->length; 8440d5ee2b2SSteve Wise if (!i) 8450d5ee2b2SSteve Wise off = 0; 8460d5ee2b2SSteve Wise } 8470d5ee2b2SSteve Wise 8480d5ee2b2SSteve Wise rsp->req.sg = rsp->cmd->inline_sg; 8490d5ee2b2SSteve Wise rsp->req.sg_cnt = sg_count; 8508f000cacSChristoph Hellwig } 8518f000cacSChristoph Hellwig 8528f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp) 8538f000cacSChristoph Hellwig { 8548f000cacSChristoph Hellwig struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl; 8558f000cacSChristoph Hellwig u64 off = le64_to_cpu(sgl->addr); 8568f000cacSChristoph Hellwig u32 len = le32_to_cpu(sgl->length); 8578f000cacSChristoph Hellwig 858762a11dfSChaitanya Kulkarni if (!nvme_is_write(rsp->req.cmd)) { 859762a11dfSChaitanya Kulkarni rsp->req.error_loc = 860762a11dfSChaitanya Kulkarni offsetof(struct nvme_common_command, opcode); 8618f000cacSChristoph Hellwig return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 862762a11dfSChaitanya Kulkarni } 8638f000cacSChristoph Hellwig 8640d5ee2b2SSteve Wise if (off + len > rsp->queue->dev->inline_data_size) { 8658f000cacSChristoph Hellwig pr_err("invalid inline data offset!\n"); 8668f000cacSChristoph Hellwig return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR; 8678f000cacSChristoph Hellwig } 8688f000cacSChristoph Hellwig 8698f000cacSChristoph Hellwig /* no data command? */ 8708f000cacSChristoph Hellwig if (!len) 8718f000cacSChristoph Hellwig return 0; 8728f000cacSChristoph Hellwig 8738f000cacSChristoph Hellwig nvmet_rdma_use_inline_sg(rsp, len, off); 8748f000cacSChristoph Hellwig rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA; 8755e62d5c9SChristoph Hellwig rsp->req.transfer_len += len; 8768f000cacSChristoph Hellwig return 0; 8778f000cacSChristoph Hellwig } 8788f000cacSChristoph Hellwig 8798f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp, 8808f000cacSChristoph Hellwig struct nvme_keyed_sgl_desc *sgl, bool invalidate) 8818f000cacSChristoph Hellwig { 8828f000cacSChristoph Hellwig u64 addr = le64_to_cpu(sgl->addr); 8838f000cacSChristoph Hellwig u32 key = get_unaligned_le32(sgl->key); 884b09160c3SIsrael Rukshin struct ib_sig_attrs sig_attrs; 8858f000cacSChristoph Hellwig int ret; 8868f000cacSChristoph Hellwig 8875b2322e4SLogan Gunthorpe rsp->req.transfer_len = get_unaligned_le24(sgl->length); 8885b2322e4SLogan Gunthorpe 8898f000cacSChristoph Hellwig /* no data command? */ 8905b2322e4SLogan Gunthorpe if (!rsp->req.transfer_len) 8918f000cacSChristoph Hellwig return 0; 8928f000cacSChristoph Hellwig 893b09160c3SIsrael Rukshin if (rsp->req.metadata_len) 894b09160c3SIsrael Rukshin nvmet_rdma_set_sig_attrs(&rsp->req, &sig_attrs); 895b09160c3SIsrael Rukshin 896c6e3f133SIsrael Rukshin ret = nvmet_req_alloc_sgls(&rsp->req); 89759534b9dSIsrael Rukshin if (unlikely(ret < 0)) 8985b2322e4SLogan Gunthorpe goto error_out; 8998f000cacSChristoph Hellwig 900b09160c3SIsrael Rukshin ret = nvmet_rdma_rw_ctx_init(rsp, addr, key, &sig_attrs); 90159534b9dSIsrael Rukshin if (unlikely(ret < 0)) 9025b2322e4SLogan Gunthorpe goto error_out; 9038f000cacSChristoph Hellwig rsp->n_rdma += ret; 9048f000cacSChristoph Hellwig 9058f000cacSChristoph Hellwig if (invalidate) { 9068f000cacSChristoph Hellwig rsp->invalidate_rkey = key; 9078f000cacSChristoph Hellwig rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY; 9088f000cacSChristoph Hellwig } 9098f000cacSChristoph Hellwig 9108f000cacSChristoph Hellwig return 0; 9115b2322e4SLogan Gunthorpe 9125b2322e4SLogan Gunthorpe error_out: 9135b2322e4SLogan Gunthorpe rsp->req.transfer_len = 0; 9145b2322e4SLogan Gunthorpe return NVME_SC_INTERNAL; 9158f000cacSChristoph Hellwig } 9168f000cacSChristoph Hellwig 9178f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp) 9188f000cacSChristoph Hellwig { 9198f000cacSChristoph Hellwig struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl; 9208f000cacSChristoph Hellwig 9218f000cacSChristoph Hellwig switch (sgl->type >> 4) { 9228f000cacSChristoph Hellwig case NVME_SGL_FMT_DATA_DESC: 9238f000cacSChristoph Hellwig switch (sgl->type & 0xf) { 9248f000cacSChristoph Hellwig case NVME_SGL_FMT_OFFSET: 9258f000cacSChristoph Hellwig return nvmet_rdma_map_sgl_inline(rsp); 9268f000cacSChristoph Hellwig default: 9278f000cacSChristoph Hellwig pr_err("invalid SGL subtype: %#x\n", sgl->type); 928762a11dfSChaitanya Kulkarni rsp->req.error_loc = 929762a11dfSChaitanya Kulkarni offsetof(struct nvme_common_command, dptr); 9308f000cacSChristoph Hellwig return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 9318f000cacSChristoph Hellwig } 9328f000cacSChristoph Hellwig case NVME_KEY_SGL_FMT_DATA_DESC: 9338f000cacSChristoph Hellwig switch (sgl->type & 0xf) { 9348f000cacSChristoph Hellwig case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE: 9358f000cacSChristoph Hellwig return nvmet_rdma_map_sgl_keyed(rsp, sgl, true); 9368f000cacSChristoph Hellwig case NVME_SGL_FMT_ADDRESS: 9378f000cacSChristoph Hellwig return nvmet_rdma_map_sgl_keyed(rsp, sgl, false); 9388f000cacSChristoph Hellwig default: 9398f000cacSChristoph Hellwig pr_err("invalid SGL subtype: %#x\n", sgl->type); 940762a11dfSChaitanya Kulkarni rsp->req.error_loc = 941762a11dfSChaitanya Kulkarni offsetof(struct nvme_common_command, dptr); 9428f000cacSChristoph Hellwig return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 9438f000cacSChristoph Hellwig } 9448f000cacSChristoph Hellwig default: 9458f000cacSChristoph Hellwig pr_err("invalid SGL type: %#x\n", sgl->type); 946762a11dfSChaitanya Kulkarni rsp->req.error_loc = offsetof(struct nvme_common_command, dptr); 9478f000cacSChristoph Hellwig return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR; 9488f000cacSChristoph Hellwig } 9498f000cacSChristoph Hellwig } 9508f000cacSChristoph Hellwig 9518f000cacSChristoph Hellwig static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp) 9528f000cacSChristoph Hellwig { 9538f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = rsp->queue; 9548f000cacSChristoph Hellwig 9558f000cacSChristoph Hellwig if (unlikely(atomic_sub_return(1 + rsp->n_rdma, 9568f000cacSChristoph Hellwig &queue->sq_wr_avail) < 0)) { 9578f000cacSChristoph Hellwig pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n", 9588f000cacSChristoph Hellwig 1 + rsp->n_rdma, queue->idx, 9598f000cacSChristoph Hellwig queue->nvme_sq.ctrl->cntlid); 9608f000cacSChristoph Hellwig atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail); 9618f000cacSChristoph Hellwig return false; 9628f000cacSChristoph Hellwig } 9638f000cacSChristoph Hellwig 9648f000cacSChristoph Hellwig if (nvmet_rdma_need_data_in(rsp)) { 96521f90243SIsrael Rukshin if (rdma_rw_ctx_post(&rsp->rw, queue->qp, 9668f000cacSChristoph Hellwig queue->cm_id->port_num, &rsp->read_cqe, NULL)) 9678f000cacSChristoph Hellwig nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR); 9688f000cacSChristoph Hellwig } else { 969be3f3114SChristoph Hellwig rsp->req.execute(&rsp->req); 9708f000cacSChristoph Hellwig } 9718f000cacSChristoph Hellwig 9728f000cacSChristoph Hellwig return true; 9738f000cacSChristoph Hellwig } 9748f000cacSChristoph Hellwig 9758f000cacSChristoph Hellwig static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue, 9768f000cacSChristoph Hellwig struct nvmet_rdma_rsp *cmd) 9778f000cacSChristoph Hellwig { 9788f000cacSChristoph Hellwig u16 status; 9798f000cacSChristoph Hellwig 980748ff840SParav Pandit ib_dma_sync_single_for_cpu(queue->dev->device, 981748ff840SParav Pandit cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length, 982748ff840SParav Pandit DMA_FROM_DEVICE); 983748ff840SParav Pandit ib_dma_sync_single_for_cpu(queue->dev->device, 984748ff840SParav Pandit cmd->send_sge.addr, cmd->send_sge.length, 985748ff840SParav Pandit DMA_TO_DEVICE); 986748ff840SParav Pandit 9878f000cacSChristoph Hellwig if (!nvmet_req_init(&cmd->req, &queue->nvme_cq, 9888f000cacSChristoph Hellwig &queue->nvme_sq, &nvmet_rdma_ops)) 9898f000cacSChristoph Hellwig return; 9908f000cacSChristoph Hellwig 9918f000cacSChristoph Hellwig status = nvmet_rdma_map_sgl(cmd); 9928f000cacSChristoph Hellwig if (status) 9938f000cacSChristoph Hellwig goto out_err; 9948f000cacSChristoph Hellwig 9958f000cacSChristoph Hellwig if (unlikely(!nvmet_rdma_execute_command(cmd))) { 9968f000cacSChristoph Hellwig spin_lock(&queue->rsp_wr_wait_lock); 9978f000cacSChristoph Hellwig list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list); 9988f000cacSChristoph Hellwig spin_unlock(&queue->rsp_wr_wait_lock); 9998f000cacSChristoph Hellwig } 10008f000cacSChristoph Hellwig 10018f000cacSChristoph Hellwig return; 10028f000cacSChristoph Hellwig 10038f000cacSChristoph Hellwig out_err: 10048f000cacSChristoph Hellwig nvmet_req_complete(&cmd->req, status); 10058f000cacSChristoph Hellwig } 10068f000cacSChristoph Hellwig 10078f000cacSChristoph Hellwig static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 10088f000cacSChristoph Hellwig { 10098f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmd = 10108f000cacSChristoph Hellwig container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe); 1011*ca0f1a80SYamin Friedman struct nvmet_rdma_queue *queue = wc->qp->qp_context; 10128f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp; 10138f000cacSChristoph Hellwig 10148f000cacSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS)) { 10158f000cacSChristoph Hellwig if (wc->status != IB_WC_WR_FLUSH_ERR) { 10168f000cacSChristoph Hellwig pr_err("RECV for CQE 0x%p failed with status %s (%d)\n", 10178f000cacSChristoph Hellwig wc->wr_cqe, ib_wc_status_msg(wc->status), 10188f000cacSChristoph Hellwig wc->status); 10198f000cacSChristoph Hellwig nvmet_rdma_error_comp(queue); 10208f000cacSChristoph Hellwig } 10218f000cacSChristoph Hellwig return; 10228f000cacSChristoph Hellwig } 10238f000cacSChristoph Hellwig 10248f000cacSChristoph Hellwig if (unlikely(wc->byte_len < sizeof(struct nvme_command))) { 10258f000cacSChristoph Hellwig pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n"); 10268f000cacSChristoph Hellwig nvmet_rdma_error_comp(queue); 10278f000cacSChristoph Hellwig return; 10288f000cacSChristoph Hellwig } 10298f000cacSChristoph Hellwig 10308f000cacSChristoph Hellwig cmd->queue = queue; 10318f000cacSChristoph Hellwig rsp = nvmet_rdma_get_rsp(queue); 10328407879cSSagi Grimberg if (unlikely(!rsp)) { 10338407879cSSagi Grimberg /* 10348407879cSSagi Grimberg * we get here only under memory pressure, 10358407879cSSagi Grimberg * silently drop and have the host retry 10368407879cSSagi Grimberg * as we can't even fail it. 10378407879cSSagi Grimberg */ 10388407879cSSagi Grimberg nvmet_rdma_post_recv(queue->dev, cmd); 10398407879cSSagi Grimberg return; 10408407879cSSagi Grimberg } 10418d61413dSSagi Grimberg rsp->queue = queue; 10428f000cacSChristoph Hellwig rsp->cmd = cmd; 10438f000cacSChristoph Hellwig rsp->flags = 0; 10448f000cacSChristoph Hellwig rsp->req.cmd = cmd->nvme_cmd; 10458d61413dSSagi Grimberg rsp->req.port = queue->port; 10468d61413dSSagi Grimberg rsp->n_rdma = 0; 10478f000cacSChristoph Hellwig 10488f000cacSChristoph Hellwig if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) { 10498f000cacSChristoph Hellwig unsigned long flags; 10508f000cacSChristoph Hellwig 10518f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 10528f000cacSChristoph Hellwig if (queue->state == NVMET_RDMA_Q_CONNECTING) 10538f000cacSChristoph Hellwig list_add_tail(&rsp->wait_list, &queue->rsp_wait_list); 10548f000cacSChristoph Hellwig else 10558f000cacSChristoph Hellwig nvmet_rdma_put_rsp(rsp); 10568f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 10578f000cacSChristoph Hellwig return; 10588f000cacSChristoph Hellwig } 10598f000cacSChristoph Hellwig 10608f000cacSChristoph Hellwig nvmet_rdma_handle_command(queue, rsp); 10618f000cacSChristoph Hellwig } 10628f000cacSChristoph Hellwig 1063b0012dd3SMax Gurtovoy static void nvmet_rdma_destroy_srq(struct nvmet_rdma_srq *nsrq) 10648f000cacSChristoph Hellwig { 1065b0012dd3SMax Gurtovoy nvmet_rdma_free_cmds(nsrq->ndev, nsrq->cmds, nsrq->ndev->srq_size, 1066b0012dd3SMax Gurtovoy false); 1067b0012dd3SMax Gurtovoy ib_destroy_srq(nsrq->srq); 10688f000cacSChristoph Hellwig 1069b0012dd3SMax Gurtovoy kfree(nsrq); 10708f000cacSChristoph Hellwig } 10718f000cacSChristoph Hellwig 1072b0012dd3SMax Gurtovoy static void nvmet_rdma_destroy_srqs(struct nvmet_rdma_device *ndev) 1073b0012dd3SMax Gurtovoy { 1074b0012dd3SMax Gurtovoy int i; 1075b0012dd3SMax Gurtovoy 1076b0012dd3SMax Gurtovoy if (!ndev->srqs) 1077b0012dd3SMax Gurtovoy return; 1078b0012dd3SMax Gurtovoy 1079b0012dd3SMax Gurtovoy for (i = 0; i < ndev->srq_count; i++) 1080b0012dd3SMax Gurtovoy nvmet_rdma_destroy_srq(ndev->srqs[i]); 1081b0012dd3SMax Gurtovoy 1082b0012dd3SMax Gurtovoy kfree(ndev->srqs); 1083b0012dd3SMax Gurtovoy } 1084b0012dd3SMax Gurtovoy 1085b0012dd3SMax Gurtovoy static struct nvmet_rdma_srq * 1086b0012dd3SMax Gurtovoy nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev) 10878f000cacSChristoph Hellwig { 10888f000cacSChristoph Hellwig struct ib_srq_init_attr srq_attr = { NULL, }; 1089b0012dd3SMax Gurtovoy size_t srq_size = ndev->srq_size; 1090b0012dd3SMax Gurtovoy struct nvmet_rdma_srq *nsrq; 10918f000cacSChristoph Hellwig struct ib_srq *srq; 10928f000cacSChristoph Hellwig int ret, i; 10938f000cacSChristoph Hellwig 1094b0012dd3SMax Gurtovoy nsrq = kzalloc(sizeof(*nsrq), GFP_KERNEL); 1095b0012dd3SMax Gurtovoy if (!nsrq) 1096b0012dd3SMax Gurtovoy return ERR_PTR(-ENOMEM); 10978f000cacSChristoph Hellwig 10988f000cacSChristoph Hellwig srq_attr.attr.max_wr = srq_size; 10990d5ee2b2SSteve Wise srq_attr.attr.max_sge = 1 + ndev->inline_page_count; 11008f000cacSChristoph Hellwig srq_attr.attr.srq_limit = 0; 11018f000cacSChristoph Hellwig srq_attr.srq_type = IB_SRQT_BASIC; 11028f000cacSChristoph Hellwig srq = ib_create_srq(ndev->pd, &srq_attr); 11038f000cacSChristoph Hellwig if (IS_ERR(srq)) { 1104b0012dd3SMax Gurtovoy ret = PTR_ERR(srq); 1105b0012dd3SMax Gurtovoy goto out_free; 1106b0012dd3SMax Gurtovoy } 1107b0012dd3SMax Gurtovoy 1108b0012dd3SMax Gurtovoy nsrq->cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false); 1109b0012dd3SMax Gurtovoy if (IS_ERR(nsrq->cmds)) { 1110b0012dd3SMax Gurtovoy ret = PTR_ERR(nsrq->cmds); 1111b0012dd3SMax Gurtovoy goto out_destroy_srq; 1112b0012dd3SMax Gurtovoy } 1113b0012dd3SMax Gurtovoy 1114b0012dd3SMax Gurtovoy nsrq->srq = srq; 1115b0012dd3SMax Gurtovoy nsrq->ndev = ndev; 1116b0012dd3SMax Gurtovoy 1117b0012dd3SMax Gurtovoy for (i = 0; i < srq_size; i++) { 1118b0012dd3SMax Gurtovoy nsrq->cmds[i].nsrq = nsrq; 1119b0012dd3SMax Gurtovoy ret = nvmet_rdma_post_recv(ndev, &nsrq->cmds[i]); 1120b0012dd3SMax Gurtovoy if (ret) 1121b0012dd3SMax Gurtovoy goto out_free_cmds; 1122b0012dd3SMax Gurtovoy } 1123b0012dd3SMax Gurtovoy 1124b0012dd3SMax Gurtovoy return nsrq; 1125b0012dd3SMax Gurtovoy 1126b0012dd3SMax Gurtovoy out_free_cmds: 1127b0012dd3SMax Gurtovoy nvmet_rdma_free_cmds(ndev, nsrq->cmds, srq_size, false); 1128b0012dd3SMax Gurtovoy out_destroy_srq: 1129b0012dd3SMax Gurtovoy ib_destroy_srq(srq); 1130b0012dd3SMax Gurtovoy out_free: 1131b0012dd3SMax Gurtovoy kfree(nsrq); 1132b0012dd3SMax Gurtovoy return ERR_PTR(ret); 1133b0012dd3SMax Gurtovoy } 1134b0012dd3SMax Gurtovoy 1135b0012dd3SMax Gurtovoy static int nvmet_rdma_init_srqs(struct nvmet_rdma_device *ndev) 1136b0012dd3SMax Gurtovoy { 1137b0012dd3SMax Gurtovoy int i, ret; 1138b0012dd3SMax Gurtovoy 1139b0012dd3SMax Gurtovoy if (!ndev->device->attrs.max_srq_wr || !ndev->device->attrs.max_srq) { 11408f000cacSChristoph Hellwig /* 11418f000cacSChristoph Hellwig * If SRQs aren't supported we just go ahead and use normal 11428f000cacSChristoph Hellwig * non-shared receive queues. 11438f000cacSChristoph Hellwig */ 11448f000cacSChristoph Hellwig pr_info("SRQ requested but not supported.\n"); 11458f000cacSChristoph Hellwig return 0; 11468f000cacSChristoph Hellwig } 11478f000cacSChristoph Hellwig 1148b0012dd3SMax Gurtovoy ndev->srq_size = min(ndev->device->attrs.max_srq_wr, 1149b0012dd3SMax Gurtovoy nvmet_rdma_srq_size); 1150b0012dd3SMax Gurtovoy ndev->srq_count = min(ndev->device->num_comp_vectors, 1151b0012dd3SMax Gurtovoy ndev->device->attrs.max_srq); 1152b0012dd3SMax Gurtovoy 1153b0012dd3SMax Gurtovoy ndev->srqs = kcalloc(ndev->srq_count, sizeof(*ndev->srqs), GFP_KERNEL); 1154b0012dd3SMax Gurtovoy if (!ndev->srqs) 1155b0012dd3SMax Gurtovoy return -ENOMEM; 1156b0012dd3SMax Gurtovoy 1157b0012dd3SMax Gurtovoy for (i = 0; i < ndev->srq_count; i++) { 1158b0012dd3SMax Gurtovoy ndev->srqs[i] = nvmet_rdma_init_srq(ndev); 1159b0012dd3SMax Gurtovoy if (IS_ERR(ndev->srqs[i])) { 1160b0012dd3SMax Gurtovoy ret = PTR_ERR(ndev->srqs[i]); 1161b0012dd3SMax Gurtovoy goto err_srq; 11628f000cacSChristoph Hellwig } 116320209384SMax Gurtovoy } 11648f000cacSChristoph Hellwig 11658f000cacSChristoph Hellwig return 0; 11668f000cacSChristoph Hellwig 1167b0012dd3SMax Gurtovoy err_srq: 1168b0012dd3SMax Gurtovoy while (--i >= 0) 1169b0012dd3SMax Gurtovoy nvmet_rdma_destroy_srq(ndev->srqs[i]); 1170b0012dd3SMax Gurtovoy kfree(ndev->srqs); 11718f000cacSChristoph Hellwig return ret; 11728f000cacSChristoph Hellwig } 11738f000cacSChristoph Hellwig 11748f000cacSChristoph Hellwig static void nvmet_rdma_free_dev(struct kref *ref) 11758f000cacSChristoph Hellwig { 11768f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = 11778f000cacSChristoph Hellwig container_of(ref, struct nvmet_rdma_device, ref); 11788f000cacSChristoph Hellwig 11798f000cacSChristoph Hellwig mutex_lock(&device_list_mutex); 11808f000cacSChristoph Hellwig list_del(&ndev->entry); 11818f000cacSChristoph Hellwig mutex_unlock(&device_list_mutex); 11828f000cacSChristoph Hellwig 1183b0012dd3SMax Gurtovoy nvmet_rdma_destroy_srqs(ndev); 11848f000cacSChristoph Hellwig ib_dealloc_pd(ndev->pd); 11858f000cacSChristoph Hellwig 11868f000cacSChristoph Hellwig kfree(ndev); 11878f000cacSChristoph Hellwig } 11888f000cacSChristoph Hellwig 11898f000cacSChristoph Hellwig static struct nvmet_rdma_device * 11908f000cacSChristoph Hellwig nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id) 11918f000cacSChristoph Hellwig { 1192a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = cm_id->context; 1193a032e4f6SSagi Grimberg struct nvmet_port *nport = port->nport; 11948f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev; 11950d5ee2b2SSteve Wise int inline_page_count; 11960d5ee2b2SSteve Wise int inline_sge_count; 11978f000cacSChristoph Hellwig int ret; 11988f000cacSChristoph Hellwig 11998f000cacSChristoph Hellwig mutex_lock(&device_list_mutex); 12008f000cacSChristoph Hellwig list_for_each_entry(ndev, &device_list, entry) { 12018f000cacSChristoph Hellwig if (ndev->device->node_guid == cm_id->device->node_guid && 12028f000cacSChristoph Hellwig kref_get_unless_zero(&ndev->ref)) 12038f000cacSChristoph Hellwig goto out_unlock; 12048f000cacSChristoph Hellwig } 12058f000cacSChristoph Hellwig 12068f000cacSChristoph Hellwig ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 12078f000cacSChristoph Hellwig if (!ndev) 12088f000cacSChristoph Hellwig goto out_err; 12098f000cacSChristoph Hellwig 1210a032e4f6SSagi Grimberg inline_page_count = num_pages(nport->inline_data_size); 12110d5ee2b2SSteve Wise inline_sge_count = max(cm_id->device->attrs.max_sge_rd, 12120a3173a5SJason Gunthorpe cm_id->device->attrs.max_recv_sge) - 1; 12130d5ee2b2SSteve Wise if (inline_page_count > inline_sge_count) { 12140d5ee2b2SSteve Wise pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n", 1215a032e4f6SSagi Grimberg nport->inline_data_size, cm_id->device->name, 12160d5ee2b2SSteve Wise inline_sge_count * PAGE_SIZE); 1217a032e4f6SSagi Grimberg nport->inline_data_size = inline_sge_count * PAGE_SIZE; 12180d5ee2b2SSteve Wise inline_page_count = inline_sge_count; 12190d5ee2b2SSteve Wise } 1220a032e4f6SSagi Grimberg ndev->inline_data_size = nport->inline_data_size; 12210d5ee2b2SSteve Wise ndev->inline_page_count = inline_page_count; 12228f000cacSChristoph Hellwig ndev->device = cm_id->device; 12238f000cacSChristoph Hellwig kref_init(&ndev->ref); 12248f000cacSChristoph Hellwig 1225ed082d36SChristoph Hellwig ndev->pd = ib_alloc_pd(ndev->device, 0); 12268f000cacSChristoph Hellwig if (IS_ERR(ndev->pd)) 12278f000cacSChristoph Hellwig goto out_free_dev; 12288f000cacSChristoph Hellwig 12298f000cacSChristoph Hellwig if (nvmet_rdma_use_srq) { 1230b0012dd3SMax Gurtovoy ret = nvmet_rdma_init_srqs(ndev); 12318f000cacSChristoph Hellwig if (ret) 12328f000cacSChristoph Hellwig goto out_free_pd; 12338f000cacSChristoph Hellwig } 12348f000cacSChristoph Hellwig 12358f000cacSChristoph Hellwig list_add(&ndev->entry, &device_list); 12368f000cacSChristoph Hellwig out_unlock: 12378f000cacSChristoph Hellwig mutex_unlock(&device_list_mutex); 12388f000cacSChristoph Hellwig pr_debug("added %s.\n", ndev->device->name); 12398f000cacSChristoph Hellwig return ndev; 12408f000cacSChristoph Hellwig 12418f000cacSChristoph Hellwig out_free_pd: 12428f000cacSChristoph Hellwig ib_dealloc_pd(ndev->pd); 12438f000cacSChristoph Hellwig out_free_dev: 12448f000cacSChristoph Hellwig kfree(ndev); 12458f000cacSChristoph Hellwig out_err: 12468f000cacSChristoph Hellwig mutex_unlock(&device_list_mutex); 12478f000cacSChristoph Hellwig return NULL; 12488f000cacSChristoph Hellwig } 12498f000cacSChristoph Hellwig 12508f000cacSChristoph Hellwig static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue) 12518f000cacSChristoph Hellwig { 12528f000cacSChristoph Hellwig struct ib_qp_init_attr qp_attr; 12538f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = queue->dev; 1254b0012dd3SMax Gurtovoy int nr_cqe, ret, i, factor; 12558f000cacSChristoph Hellwig 12568f000cacSChristoph Hellwig /* 12578f000cacSChristoph Hellwig * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND. 12588f000cacSChristoph Hellwig */ 12598f000cacSChristoph Hellwig nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size; 12608f000cacSChristoph Hellwig 1261*ca0f1a80SYamin Friedman queue->cq = ib_cq_pool_get(ndev->device, nr_cqe + 1, 1262*ca0f1a80SYamin Friedman queue->comp_vector, IB_POLL_WORKQUEUE); 12638f000cacSChristoph Hellwig if (IS_ERR(queue->cq)) { 12648f000cacSChristoph Hellwig ret = PTR_ERR(queue->cq); 12658f000cacSChristoph Hellwig pr_err("failed to create CQ cqe= %d ret= %d\n", 12668f000cacSChristoph Hellwig nr_cqe + 1, ret); 12678f000cacSChristoph Hellwig goto out; 12688f000cacSChristoph Hellwig } 12698f000cacSChristoph Hellwig 12708f000cacSChristoph Hellwig memset(&qp_attr, 0, sizeof(qp_attr)); 12718f000cacSChristoph Hellwig qp_attr.qp_context = queue; 12728f000cacSChristoph Hellwig qp_attr.event_handler = nvmet_rdma_qp_event; 12738f000cacSChristoph Hellwig qp_attr.send_cq = queue->cq; 12748f000cacSChristoph Hellwig qp_attr.recv_cq = queue->cq; 12758f000cacSChristoph Hellwig qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 12768f000cacSChristoph Hellwig qp_attr.qp_type = IB_QPT_RC; 12778f000cacSChristoph Hellwig /* +1 for drain */ 12788f000cacSChristoph Hellwig qp_attr.cap.max_send_wr = queue->send_queue_size + 1; 1279c363f249SMax Gurtovoy factor = rdma_rw_mr_factor(ndev->device, queue->cm_id->port_num, 1280c363f249SMax Gurtovoy 1 << NVMET_RDMA_MAX_MDTS); 1281c363f249SMax Gurtovoy qp_attr.cap.max_rdma_ctxs = queue->send_queue_size * factor; 12828f000cacSChristoph Hellwig qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd, 128333023fb8SSteve Wise ndev->device->attrs.max_send_sge); 12848f000cacSChristoph Hellwig 1285b0012dd3SMax Gurtovoy if (queue->nsrq) { 1286b0012dd3SMax Gurtovoy qp_attr.srq = queue->nsrq->srq; 12878f000cacSChristoph Hellwig } else { 12888f000cacSChristoph Hellwig /* +1 for drain */ 12898f000cacSChristoph Hellwig qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size; 12900d5ee2b2SSteve Wise qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count; 12918f000cacSChristoph Hellwig } 12928f000cacSChristoph Hellwig 1293b09160c3SIsrael Rukshin if (queue->port->pi_enable && queue->host_qid) 1294b09160c3SIsrael Rukshin qp_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 1295b09160c3SIsrael Rukshin 12968f000cacSChristoph Hellwig ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr); 12978f000cacSChristoph Hellwig if (ret) { 12988f000cacSChristoph Hellwig pr_err("failed to create_qp ret= %d\n", ret); 12998f000cacSChristoph Hellwig goto err_destroy_cq; 13008f000cacSChristoph Hellwig } 130121f90243SIsrael Rukshin queue->qp = queue->cm_id->qp; 13028f000cacSChristoph Hellwig 13038f000cacSChristoph Hellwig atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr); 13048f000cacSChristoph Hellwig 13058f000cacSChristoph Hellwig pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n", 13068f000cacSChristoph Hellwig __func__, queue->cq->cqe, qp_attr.cap.max_send_sge, 13078f000cacSChristoph Hellwig qp_attr.cap.max_send_wr, queue->cm_id); 13088f000cacSChristoph Hellwig 1309b0012dd3SMax Gurtovoy if (!queue->nsrq) { 13108f000cacSChristoph Hellwig for (i = 0; i < queue->recv_queue_size; i++) { 13118f000cacSChristoph Hellwig queue->cmds[i].queue = queue; 131220209384SMax Gurtovoy ret = nvmet_rdma_post_recv(ndev, &queue->cmds[i]); 131320209384SMax Gurtovoy if (ret) 131420209384SMax Gurtovoy goto err_destroy_qp; 13158f000cacSChristoph Hellwig } 13168f000cacSChristoph Hellwig } 13178f000cacSChristoph Hellwig 13188f000cacSChristoph Hellwig out: 13198f000cacSChristoph Hellwig return ret; 13208f000cacSChristoph Hellwig 132120209384SMax Gurtovoy err_destroy_qp: 132220209384SMax Gurtovoy rdma_destroy_qp(queue->cm_id); 13238f000cacSChristoph Hellwig err_destroy_cq: 1324*ca0f1a80SYamin Friedman ib_cq_pool_put(queue->cq, nr_cqe + 1); 13258f000cacSChristoph Hellwig goto out; 13268f000cacSChristoph Hellwig } 13278f000cacSChristoph Hellwig 13288f000cacSChristoph Hellwig static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue) 13298f000cacSChristoph Hellwig { 133021f90243SIsrael Rukshin ib_drain_qp(queue->qp); 133121f90243SIsrael Rukshin if (queue->cm_id) 1332e1a2ee24SIsrael Rukshin rdma_destroy_id(queue->cm_id); 133321f90243SIsrael Rukshin ib_destroy_qp(queue->qp); 1334*ca0f1a80SYamin Friedman ib_cq_pool_put(queue->cq, queue->recv_queue_size + 2 * 1335*ca0f1a80SYamin Friedman queue->send_queue_size + 1); 13368f000cacSChristoph Hellwig } 13378f000cacSChristoph Hellwig 13388f000cacSChristoph Hellwig static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue) 13398f000cacSChristoph Hellwig { 1340424125a0SSagi Grimberg pr_debug("freeing queue %d\n", queue->idx); 13418f000cacSChristoph Hellwig 13428f000cacSChristoph Hellwig nvmet_sq_destroy(&queue->nvme_sq); 13438f000cacSChristoph Hellwig 13448f000cacSChristoph Hellwig nvmet_rdma_destroy_queue_ib(queue); 1345b0012dd3SMax Gurtovoy if (!queue->nsrq) { 13468f000cacSChristoph Hellwig nvmet_rdma_free_cmds(queue->dev, queue->cmds, 13478f000cacSChristoph Hellwig queue->recv_queue_size, 13488f000cacSChristoph Hellwig !queue->host_qid); 13498f000cacSChristoph Hellwig } 13508f000cacSChristoph Hellwig nvmet_rdma_free_rsps(queue); 13518f000cacSChristoph Hellwig ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx); 13528f000cacSChristoph Hellwig kfree(queue); 13538f000cacSChristoph Hellwig } 13548f000cacSChristoph Hellwig 13558f000cacSChristoph Hellwig static void nvmet_rdma_release_queue_work(struct work_struct *w) 13568f000cacSChristoph Hellwig { 13578f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = 13588f000cacSChristoph Hellwig container_of(w, struct nvmet_rdma_queue, release_work); 13598f000cacSChristoph Hellwig struct nvmet_rdma_device *dev = queue->dev; 13608f000cacSChristoph Hellwig 13618f000cacSChristoph Hellwig nvmet_rdma_free_queue(queue); 1362d8f7750aSSagi Grimberg 13638f000cacSChristoph Hellwig kref_put(&dev->ref, nvmet_rdma_free_dev); 13648f000cacSChristoph Hellwig } 13658f000cacSChristoph Hellwig 13668f000cacSChristoph Hellwig static int 13678f000cacSChristoph Hellwig nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn, 13688f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue) 13698f000cacSChristoph Hellwig { 13708f000cacSChristoph Hellwig struct nvme_rdma_cm_req *req; 13718f000cacSChristoph Hellwig 13728f000cacSChristoph Hellwig req = (struct nvme_rdma_cm_req *)conn->private_data; 13738f000cacSChristoph Hellwig if (!req || conn->private_data_len == 0) 13748f000cacSChristoph Hellwig return NVME_RDMA_CM_INVALID_LEN; 13758f000cacSChristoph Hellwig 13768f000cacSChristoph Hellwig if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0) 13778f000cacSChristoph Hellwig return NVME_RDMA_CM_INVALID_RECFMT; 13788f000cacSChristoph Hellwig 13798f000cacSChristoph Hellwig queue->host_qid = le16_to_cpu(req->qid); 13808f000cacSChristoph Hellwig 13818f000cacSChristoph Hellwig /* 1382b825b44cSJay Freyensee * req->hsqsize corresponds to our recv queue size plus 1 13838f000cacSChristoph Hellwig * req->hrqsize corresponds to our send queue size 13848f000cacSChristoph Hellwig */ 1385b825b44cSJay Freyensee queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1; 13868f000cacSChristoph Hellwig queue->send_queue_size = le16_to_cpu(req->hrqsize); 13878f000cacSChristoph Hellwig 13887aa1f427SSagi Grimberg if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH) 13898f000cacSChristoph Hellwig return NVME_RDMA_CM_INVALID_HSQSIZE; 13908f000cacSChristoph Hellwig 13918f000cacSChristoph Hellwig /* XXX: Should we enforce some kind of max for IO queues? */ 13928f000cacSChristoph Hellwig 13938f000cacSChristoph Hellwig return 0; 13948f000cacSChristoph Hellwig } 13958f000cacSChristoph Hellwig 13968f000cacSChristoph Hellwig static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id, 13978f000cacSChristoph Hellwig enum nvme_rdma_cm_status status) 13988f000cacSChristoph Hellwig { 13998f000cacSChristoph Hellwig struct nvme_rdma_cm_rej rej; 14008f000cacSChristoph Hellwig 14017a01a6eaSMax Gurtovoy pr_debug("rejecting connect request: status %d (%s)\n", 14027a01a6eaSMax Gurtovoy status, nvme_rdma_cm_msg(status)); 14037a01a6eaSMax Gurtovoy 14048f000cacSChristoph Hellwig rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 14058f000cacSChristoph Hellwig rej.sts = cpu_to_le16(status); 14068f000cacSChristoph Hellwig 14078094ba0aSLeon Romanovsky return rdma_reject(cm_id, (void *)&rej, sizeof(rej), 14088094ba0aSLeon Romanovsky IB_CM_REJ_CONSUMER_DEFINED); 14098f000cacSChristoph Hellwig } 14108f000cacSChristoph Hellwig 14118f000cacSChristoph Hellwig static struct nvmet_rdma_queue * 14128f000cacSChristoph Hellwig nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev, 14138f000cacSChristoph Hellwig struct rdma_cm_id *cm_id, 14148f000cacSChristoph Hellwig struct rdma_cm_event *event) 14158f000cacSChristoph Hellwig { 1416b09160c3SIsrael Rukshin struct nvmet_rdma_port *port = cm_id->context; 14178f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 14188f000cacSChristoph Hellwig int ret; 14198f000cacSChristoph Hellwig 14208f000cacSChristoph Hellwig queue = kzalloc(sizeof(*queue), GFP_KERNEL); 14218f000cacSChristoph Hellwig if (!queue) { 14228f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 14238f000cacSChristoph Hellwig goto out_reject; 14248f000cacSChristoph Hellwig } 14258f000cacSChristoph Hellwig 14268f000cacSChristoph Hellwig ret = nvmet_sq_init(&queue->nvme_sq); 142770d4281cSBart Van Assche if (ret) { 142870d4281cSBart Van Assche ret = NVME_RDMA_CM_NO_RSC; 14298f000cacSChristoph Hellwig goto out_free_queue; 143070d4281cSBart Van Assche } 14318f000cacSChristoph Hellwig 14328f000cacSChristoph Hellwig ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue); 14338f000cacSChristoph Hellwig if (ret) 14348f000cacSChristoph Hellwig goto out_destroy_sq; 14358f000cacSChristoph Hellwig 14368f000cacSChristoph Hellwig /* 14378f000cacSChristoph Hellwig * Schedules the actual release because calling rdma_destroy_id from 14388f000cacSChristoph Hellwig * inside a CM callback would trigger a deadlock. (great API design..) 14398f000cacSChristoph Hellwig */ 14408f000cacSChristoph Hellwig INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work); 14418f000cacSChristoph Hellwig queue->dev = ndev; 14428f000cacSChristoph Hellwig queue->cm_id = cm_id; 1443b09160c3SIsrael Rukshin queue->port = port->nport; 14448f000cacSChristoph Hellwig 14458f000cacSChristoph Hellwig spin_lock_init(&queue->state_lock); 14468f000cacSChristoph Hellwig queue->state = NVMET_RDMA_Q_CONNECTING; 14478f000cacSChristoph Hellwig INIT_LIST_HEAD(&queue->rsp_wait_list); 14488f000cacSChristoph Hellwig INIT_LIST_HEAD(&queue->rsp_wr_wait_list); 14498f000cacSChristoph Hellwig spin_lock_init(&queue->rsp_wr_wait_lock); 14508f000cacSChristoph Hellwig INIT_LIST_HEAD(&queue->free_rsps); 14518f000cacSChristoph Hellwig spin_lock_init(&queue->rsps_lock); 1452766dbb17SSagi Grimberg INIT_LIST_HEAD(&queue->queue_list); 14538f000cacSChristoph Hellwig 14548f000cacSChristoph Hellwig queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL); 14558f000cacSChristoph Hellwig if (queue->idx < 0) { 14568f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 14576ccaeb56SChristophe JAILLET goto out_destroy_sq; 14588f000cacSChristoph Hellwig } 14598f000cacSChristoph Hellwig 1460b0012dd3SMax Gurtovoy /* 1461b0012dd3SMax Gurtovoy * Spread the io queues across completion vectors, 1462b0012dd3SMax Gurtovoy * but still keep all admin queues on vector 0. 1463b0012dd3SMax Gurtovoy */ 1464b0012dd3SMax Gurtovoy queue->comp_vector = !queue->host_qid ? 0 : 1465b0012dd3SMax Gurtovoy queue->idx % ndev->device->num_comp_vectors; 1466b0012dd3SMax Gurtovoy 1467b0012dd3SMax Gurtovoy 14688f000cacSChristoph Hellwig ret = nvmet_rdma_alloc_rsps(queue); 14698f000cacSChristoph Hellwig if (ret) { 14708f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 14718f000cacSChristoph Hellwig goto out_ida_remove; 14728f000cacSChristoph Hellwig } 14738f000cacSChristoph Hellwig 1474b0012dd3SMax Gurtovoy if (ndev->srqs) { 1475b0012dd3SMax Gurtovoy queue->nsrq = ndev->srqs[queue->comp_vector % ndev->srq_count]; 1476b0012dd3SMax Gurtovoy } else { 14778f000cacSChristoph Hellwig queue->cmds = nvmet_rdma_alloc_cmds(ndev, 14788f000cacSChristoph Hellwig queue->recv_queue_size, 14798f000cacSChristoph Hellwig !queue->host_qid); 14808f000cacSChristoph Hellwig if (IS_ERR(queue->cmds)) { 14818f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 14828f000cacSChristoph Hellwig goto out_free_responses; 14838f000cacSChristoph Hellwig } 14848f000cacSChristoph Hellwig } 14858f000cacSChristoph Hellwig 14868f000cacSChristoph Hellwig ret = nvmet_rdma_create_queue_ib(queue); 14878f000cacSChristoph Hellwig if (ret) { 14888f000cacSChristoph Hellwig pr_err("%s: creating RDMA queue failed (%d).\n", 14898f000cacSChristoph Hellwig __func__, ret); 14908f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 14918f000cacSChristoph Hellwig goto out_free_cmds; 14928f000cacSChristoph Hellwig } 14938f000cacSChristoph Hellwig 14948f000cacSChristoph Hellwig return queue; 14958f000cacSChristoph Hellwig 14968f000cacSChristoph Hellwig out_free_cmds: 1497b0012dd3SMax Gurtovoy if (!queue->nsrq) { 14988f000cacSChristoph Hellwig nvmet_rdma_free_cmds(queue->dev, queue->cmds, 14998f000cacSChristoph Hellwig queue->recv_queue_size, 15008f000cacSChristoph Hellwig !queue->host_qid); 15018f000cacSChristoph Hellwig } 15028f000cacSChristoph Hellwig out_free_responses: 15038f000cacSChristoph Hellwig nvmet_rdma_free_rsps(queue); 15048f000cacSChristoph Hellwig out_ida_remove: 15058f000cacSChristoph Hellwig ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx); 15068f000cacSChristoph Hellwig out_destroy_sq: 15078f000cacSChristoph Hellwig nvmet_sq_destroy(&queue->nvme_sq); 15088f000cacSChristoph Hellwig out_free_queue: 15098f000cacSChristoph Hellwig kfree(queue); 15108f000cacSChristoph Hellwig out_reject: 15118f000cacSChristoph Hellwig nvmet_rdma_cm_reject(cm_id, ret); 15128f000cacSChristoph Hellwig return NULL; 15138f000cacSChristoph Hellwig } 15148f000cacSChristoph Hellwig 15158f000cacSChristoph Hellwig static void nvmet_rdma_qp_event(struct ib_event *event, void *priv) 15168f000cacSChristoph Hellwig { 15178f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = priv; 15188f000cacSChristoph Hellwig 15198f000cacSChristoph Hellwig switch (event->event) { 15208f000cacSChristoph Hellwig case IB_EVENT_COMM_EST: 15218f000cacSChristoph Hellwig rdma_notify(queue->cm_id, event->event); 15228f000cacSChristoph Hellwig break; 1523b0012dd3SMax Gurtovoy case IB_EVENT_QP_LAST_WQE_REACHED: 1524b0012dd3SMax Gurtovoy pr_debug("received last WQE reached event for queue=0x%p\n", 1525b0012dd3SMax Gurtovoy queue); 1526b0012dd3SMax Gurtovoy break; 15278f000cacSChristoph Hellwig default: 1528675796beSMax Gurtovoy pr_err("received IB QP event: %s (%d)\n", 1529675796beSMax Gurtovoy ib_event_msg(event->event), event->event); 15308f000cacSChristoph Hellwig break; 15318f000cacSChristoph Hellwig } 15328f000cacSChristoph Hellwig } 15338f000cacSChristoph Hellwig 15348f000cacSChristoph Hellwig static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id, 15358f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue, 15368f000cacSChristoph Hellwig struct rdma_conn_param *p) 15378f000cacSChristoph Hellwig { 15388f000cacSChristoph Hellwig struct rdma_conn_param param = { }; 15398f000cacSChristoph Hellwig struct nvme_rdma_cm_rep priv = { }; 15408f000cacSChristoph Hellwig int ret = -ENOMEM; 15418f000cacSChristoph Hellwig 15428f000cacSChristoph Hellwig param.rnr_retry_count = 7; 15438f000cacSChristoph Hellwig param.flow_control = 1; 15448f000cacSChristoph Hellwig param.initiator_depth = min_t(u8, p->initiator_depth, 15458f000cacSChristoph Hellwig queue->dev->device->attrs.max_qp_init_rd_atom); 15468f000cacSChristoph Hellwig param.private_data = &priv; 15478f000cacSChristoph Hellwig param.private_data_len = sizeof(priv); 15488f000cacSChristoph Hellwig priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 15498f000cacSChristoph Hellwig priv.crqsize = cpu_to_le16(queue->recv_queue_size); 15508f000cacSChristoph Hellwig 15518f000cacSChristoph Hellwig ret = rdma_accept(cm_id, ¶m); 15528f000cacSChristoph Hellwig if (ret) 15538f000cacSChristoph Hellwig pr_err("rdma_accept failed (error code = %d)\n", ret); 15548f000cacSChristoph Hellwig 15558f000cacSChristoph Hellwig return ret; 15568f000cacSChristoph Hellwig } 15578f000cacSChristoph Hellwig 15588f000cacSChristoph Hellwig static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id, 15598f000cacSChristoph Hellwig struct rdma_cm_event *event) 15608f000cacSChristoph Hellwig { 15618f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev; 15628f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 15638f000cacSChristoph Hellwig int ret = -EINVAL; 15648f000cacSChristoph Hellwig 15658f000cacSChristoph Hellwig ndev = nvmet_rdma_find_get_device(cm_id); 15668f000cacSChristoph Hellwig if (!ndev) { 15678f000cacSChristoph Hellwig nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC); 15688f000cacSChristoph Hellwig return -ECONNREFUSED; 15698f000cacSChristoph Hellwig } 15708f000cacSChristoph Hellwig 15718f000cacSChristoph Hellwig queue = nvmet_rdma_alloc_queue(ndev, cm_id, event); 15728f000cacSChristoph Hellwig if (!queue) { 15738f000cacSChristoph Hellwig ret = -ENOMEM; 15748f000cacSChristoph Hellwig goto put_device; 15758f000cacSChristoph Hellwig } 15768f000cacSChristoph Hellwig 1577777dc823SSagi Grimberg if (queue->host_qid == 0) { 1578777dc823SSagi Grimberg /* Let inflight controller teardown complete */ 1579d39aa497SChristoph Hellwig flush_scheduled_work(); 1580777dc823SSagi Grimberg } 1581777dc823SSagi Grimberg 15828f000cacSChristoph Hellwig ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn); 1583e1a2ee24SIsrael Rukshin if (ret) { 158421f90243SIsrael Rukshin /* 158521f90243SIsrael Rukshin * Don't destroy the cm_id in free path, as we implicitly 158621f90243SIsrael Rukshin * destroy the cm_id here with non-zero ret code. 158721f90243SIsrael Rukshin */ 158821f90243SIsrael Rukshin queue->cm_id = NULL; 158921f90243SIsrael Rukshin goto free_queue; 1590e1a2ee24SIsrael Rukshin } 15918f000cacSChristoph Hellwig 15928f000cacSChristoph Hellwig mutex_lock(&nvmet_rdma_queue_mutex); 15938f000cacSChristoph Hellwig list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list); 15948f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 15958f000cacSChristoph Hellwig 15968f000cacSChristoph Hellwig return 0; 15978f000cacSChristoph Hellwig 159821f90243SIsrael Rukshin free_queue: 159921f90243SIsrael Rukshin nvmet_rdma_free_queue(queue); 16008f000cacSChristoph Hellwig put_device: 16018f000cacSChristoph Hellwig kref_put(&ndev->ref, nvmet_rdma_free_dev); 16028f000cacSChristoph Hellwig 16038f000cacSChristoph Hellwig return ret; 16048f000cacSChristoph Hellwig } 16058f000cacSChristoph Hellwig 16068f000cacSChristoph Hellwig static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue) 16078f000cacSChristoph Hellwig { 16088f000cacSChristoph Hellwig unsigned long flags; 16098f000cacSChristoph Hellwig 16108f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 16118f000cacSChristoph Hellwig if (queue->state != NVMET_RDMA_Q_CONNECTING) { 16128f000cacSChristoph Hellwig pr_warn("trying to establish a connected queue\n"); 16138f000cacSChristoph Hellwig goto out_unlock; 16148f000cacSChristoph Hellwig } 16158f000cacSChristoph Hellwig queue->state = NVMET_RDMA_Q_LIVE; 16168f000cacSChristoph Hellwig 16178f000cacSChristoph Hellwig while (!list_empty(&queue->rsp_wait_list)) { 16188f000cacSChristoph Hellwig struct nvmet_rdma_rsp *cmd; 16198f000cacSChristoph Hellwig 16208f000cacSChristoph Hellwig cmd = list_first_entry(&queue->rsp_wait_list, 16218f000cacSChristoph Hellwig struct nvmet_rdma_rsp, wait_list); 16228f000cacSChristoph Hellwig list_del(&cmd->wait_list); 16238f000cacSChristoph Hellwig 16248f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 16258f000cacSChristoph Hellwig nvmet_rdma_handle_command(queue, cmd); 16268f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 16278f000cacSChristoph Hellwig } 16288f000cacSChristoph Hellwig 16298f000cacSChristoph Hellwig out_unlock: 16308f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 16318f000cacSChristoph Hellwig } 16328f000cacSChristoph Hellwig 16338f000cacSChristoph Hellwig static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) 16348f000cacSChristoph Hellwig { 16358f000cacSChristoph Hellwig bool disconnect = false; 16368f000cacSChristoph Hellwig unsigned long flags; 16378f000cacSChristoph Hellwig 16388f000cacSChristoph Hellwig pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state); 16398f000cacSChristoph Hellwig 16408f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 16418f000cacSChristoph Hellwig switch (queue->state) { 16428f000cacSChristoph Hellwig case NVMET_RDMA_Q_CONNECTING: 16438f000cacSChristoph Hellwig case NVMET_RDMA_Q_LIVE: 16448f000cacSChristoph Hellwig queue->state = NVMET_RDMA_Q_DISCONNECTING; 1645d8f7750aSSagi Grimberg disconnect = true; 16468f000cacSChristoph Hellwig break; 16478f000cacSChristoph Hellwig case NVMET_RDMA_Q_DISCONNECTING: 16488f000cacSChristoph Hellwig break; 16498f000cacSChristoph Hellwig } 16508f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 16518f000cacSChristoph Hellwig 16528f000cacSChristoph Hellwig if (disconnect) { 16538f000cacSChristoph Hellwig rdma_disconnect(queue->cm_id); 1654d39aa497SChristoph Hellwig schedule_work(&queue->release_work); 16558f000cacSChristoph Hellwig } 16568f000cacSChristoph Hellwig } 16578f000cacSChristoph Hellwig 16588f000cacSChristoph Hellwig static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) 16598f000cacSChristoph Hellwig { 16608f000cacSChristoph Hellwig bool disconnect = false; 16618f000cacSChristoph Hellwig 16628f000cacSChristoph Hellwig mutex_lock(&nvmet_rdma_queue_mutex); 16638f000cacSChristoph Hellwig if (!list_empty(&queue->queue_list)) { 16648f000cacSChristoph Hellwig list_del_init(&queue->queue_list); 16658f000cacSChristoph Hellwig disconnect = true; 16668f000cacSChristoph Hellwig } 16678f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 16688f000cacSChristoph Hellwig 16698f000cacSChristoph Hellwig if (disconnect) 16708f000cacSChristoph Hellwig __nvmet_rdma_queue_disconnect(queue); 16718f000cacSChristoph Hellwig } 16728f000cacSChristoph Hellwig 16738f000cacSChristoph Hellwig static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id, 16748f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue) 16758f000cacSChristoph Hellwig { 16768f000cacSChristoph Hellwig WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING); 16778f000cacSChristoph Hellwig 1678766dbb17SSagi Grimberg mutex_lock(&nvmet_rdma_queue_mutex); 1679766dbb17SSagi Grimberg if (!list_empty(&queue->queue_list)) 1680766dbb17SSagi Grimberg list_del_init(&queue->queue_list); 1681766dbb17SSagi Grimberg mutex_unlock(&nvmet_rdma_queue_mutex); 1682766dbb17SSagi Grimberg 1683766dbb17SSagi Grimberg pr_err("failed to connect queue %d\n", queue->idx); 1684d39aa497SChristoph Hellwig schedule_work(&queue->release_work); 16858f000cacSChristoph Hellwig } 16868f000cacSChristoph Hellwig 1687d8f7750aSSagi Grimberg /** 1688d8f7750aSSagi Grimberg * nvme_rdma_device_removal() - Handle RDMA device removal 1689f1d4ef7dSSagi Grimberg * @cm_id: rdma_cm id, used for nvmet port 1690d8f7750aSSagi Grimberg * @queue: nvmet rdma queue (cm id qp_context) 1691d8f7750aSSagi Grimberg * 1692d8f7750aSSagi Grimberg * DEVICE_REMOVAL event notifies us that the RDMA device is about 1693f1d4ef7dSSagi Grimberg * to unplug. Note that this event can be generated on a normal 1694f1d4ef7dSSagi Grimberg * queue cm_id and/or a device bound listener cm_id (where in this 1695f1d4ef7dSSagi Grimberg * case queue will be null). 1696d8f7750aSSagi Grimberg * 1697f1d4ef7dSSagi Grimberg * We registered an ib_client to handle device removal for queues, 1698f1d4ef7dSSagi Grimberg * so we only need to handle the listening port cm_ids. In this case 1699d8f7750aSSagi Grimberg * we nullify the priv to prevent double cm_id destruction and destroying 1700d8f7750aSSagi Grimberg * the cm_id implicitely by returning a non-zero rc to the callout. 1701d8f7750aSSagi Grimberg */ 1702d8f7750aSSagi Grimberg static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id, 1703d8f7750aSSagi Grimberg struct nvmet_rdma_queue *queue) 1704d8f7750aSSagi Grimberg { 1705a032e4f6SSagi Grimberg struct nvmet_rdma_port *port; 1706d8f7750aSSagi Grimberg 1707f1d4ef7dSSagi Grimberg if (queue) { 1708f1d4ef7dSSagi Grimberg /* 1709f1d4ef7dSSagi Grimberg * This is a queue cm_id. we have registered 1710f1d4ef7dSSagi Grimberg * an ib_client to handle queues removal 1711f1d4ef7dSSagi Grimberg * so don't interfear and just return. 1712f1d4ef7dSSagi Grimberg */ 1713f1d4ef7dSSagi Grimberg return 0; 1714f1d4ef7dSSagi Grimberg } 1715f1d4ef7dSSagi Grimberg 1716f1d4ef7dSSagi Grimberg port = cm_id->context; 1717d8f7750aSSagi Grimberg 1718d8f7750aSSagi Grimberg /* 1719d8f7750aSSagi Grimberg * This is a listener cm_id. Make sure that 1720d8f7750aSSagi Grimberg * future remove_port won't invoke a double 1721d8f7750aSSagi Grimberg * cm_id destroy. use atomic xchg to make sure 1722d8f7750aSSagi Grimberg * we don't compete with remove_port. 1723d8f7750aSSagi Grimberg */ 1724a032e4f6SSagi Grimberg if (xchg(&port->cm_id, NULL) != cm_id) 1725d8f7750aSSagi Grimberg return 0; 1726d8f7750aSSagi Grimberg 1727d8f7750aSSagi Grimberg /* 1728d8f7750aSSagi Grimberg * We need to return 1 so that the core will destroy 1729d8f7750aSSagi Grimberg * it's own ID. What a great API design.. 1730d8f7750aSSagi Grimberg */ 1731d8f7750aSSagi Grimberg return 1; 1732d8f7750aSSagi Grimberg } 1733d8f7750aSSagi Grimberg 17348f000cacSChristoph Hellwig static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id, 17358f000cacSChristoph Hellwig struct rdma_cm_event *event) 17368f000cacSChristoph Hellwig { 17378f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = NULL; 17388f000cacSChristoph Hellwig int ret = 0; 17398f000cacSChristoph Hellwig 17408f000cacSChristoph Hellwig if (cm_id->qp) 17418f000cacSChristoph Hellwig queue = cm_id->qp->qp_context; 17428f000cacSChristoph Hellwig 17438f000cacSChristoph Hellwig pr_debug("%s (%d): status %d id %p\n", 17448f000cacSChristoph Hellwig rdma_event_msg(event->event), event->event, 17458f000cacSChristoph Hellwig event->status, cm_id); 17468f000cacSChristoph Hellwig 17478f000cacSChristoph Hellwig switch (event->event) { 17488f000cacSChristoph Hellwig case RDMA_CM_EVENT_CONNECT_REQUEST: 17498f000cacSChristoph Hellwig ret = nvmet_rdma_queue_connect(cm_id, event); 17508f000cacSChristoph Hellwig break; 17518f000cacSChristoph Hellwig case RDMA_CM_EVENT_ESTABLISHED: 17528f000cacSChristoph Hellwig nvmet_rdma_queue_established(queue); 17538f000cacSChristoph Hellwig break; 17548f000cacSChristoph Hellwig case RDMA_CM_EVENT_ADDR_CHANGE: 1755a032e4f6SSagi Grimberg if (!queue) { 1756a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = cm_id->context; 1757a032e4f6SSagi Grimberg 1758a032e4f6SSagi Grimberg schedule_delayed_work(&port->repair_work, 0); 1759a032e4f6SSagi Grimberg break; 1760a032e4f6SSagi Grimberg } 1761a032e4f6SSagi Grimberg /* FALLTHROUGH */ 17628f000cacSChristoph Hellwig case RDMA_CM_EVENT_DISCONNECTED: 17638f000cacSChristoph Hellwig case RDMA_CM_EVENT_TIMEWAIT_EXIT: 17648f000cacSChristoph Hellwig nvmet_rdma_queue_disconnect(queue); 1765d8f7750aSSagi Grimberg break; 1766d8f7750aSSagi Grimberg case RDMA_CM_EVENT_DEVICE_REMOVAL: 1767d8f7750aSSagi Grimberg ret = nvmet_rdma_device_removal(cm_id, queue); 17688f000cacSChristoph Hellwig break; 17698f000cacSChristoph Hellwig case RDMA_CM_EVENT_REJECTED: 1770512fb1b3SSteve Wise pr_debug("Connection rejected: %s\n", 1771512fb1b3SSteve Wise rdma_reject_msg(cm_id, event->status)); 1772512fb1b3SSteve Wise /* FALLTHROUGH */ 17738f000cacSChristoph Hellwig case RDMA_CM_EVENT_UNREACHABLE: 17748f000cacSChristoph Hellwig case RDMA_CM_EVENT_CONNECT_ERROR: 17758f000cacSChristoph Hellwig nvmet_rdma_queue_connect_fail(cm_id, queue); 17768f000cacSChristoph Hellwig break; 17778f000cacSChristoph Hellwig default: 17788f000cacSChristoph Hellwig pr_err("received unrecognized RDMA CM event %d\n", 17798f000cacSChristoph Hellwig event->event); 17808f000cacSChristoph Hellwig break; 17818f000cacSChristoph Hellwig } 17828f000cacSChristoph Hellwig 17838f000cacSChristoph Hellwig return ret; 17848f000cacSChristoph Hellwig } 17858f000cacSChristoph Hellwig 17868f000cacSChristoph Hellwig static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl) 17878f000cacSChristoph Hellwig { 17888f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 17898f000cacSChristoph Hellwig 17908f000cacSChristoph Hellwig restart: 17918f000cacSChristoph Hellwig mutex_lock(&nvmet_rdma_queue_mutex); 17928f000cacSChristoph Hellwig list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) { 17938f000cacSChristoph Hellwig if (queue->nvme_sq.ctrl == ctrl) { 17948f000cacSChristoph Hellwig list_del_init(&queue->queue_list); 17958f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 17968f000cacSChristoph Hellwig 17978f000cacSChristoph Hellwig __nvmet_rdma_queue_disconnect(queue); 17988f000cacSChristoph Hellwig goto restart; 17998f000cacSChristoph Hellwig } 18008f000cacSChristoph Hellwig } 18018f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 18028f000cacSChristoph Hellwig } 18038f000cacSChristoph Hellwig 1804a032e4f6SSagi Grimberg static void nvmet_rdma_disable_port(struct nvmet_rdma_port *port) 18058f000cacSChristoph Hellwig { 1806a032e4f6SSagi Grimberg struct rdma_cm_id *cm_id = xchg(&port->cm_id, NULL); 1807a032e4f6SSagi Grimberg 1808a032e4f6SSagi Grimberg if (cm_id) 1809a032e4f6SSagi Grimberg rdma_destroy_id(cm_id); 1810a032e4f6SSagi Grimberg } 1811a032e4f6SSagi Grimberg 1812a032e4f6SSagi Grimberg static int nvmet_rdma_enable_port(struct nvmet_rdma_port *port) 1813a032e4f6SSagi Grimberg { 1814a032e4f6SSagi Grimberg struct sockaddr *addr = (struct sockaddr *)&port->addr; 18158f000cacSChristoph Hellwig struct rdma_cm_id *cm_id; 18168f000cacSChristoph Hellwig int ret; 18178f000cacSChristoph Hellwig 18188f000cacSChristoph Hellwig cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port, 18198f000cacSChristoph Hellwig RDMA_PS_TCP, IB_QPT_RC); 18208f000cacSChristoph Hellwig if (IS_ERR(cm_id)) { 18218f000cacSChristoph Hellwig pr_err("CM ID creation failed\n"); 18228f000cacSChristoph Hellwig return PTR_ERR(cm_id); 18238f000cacSChristoph Hellwig } 18248f000cacSChristoph Hellwig 1825670c2a3aSSagi Grimberg /* 1826670c2a3aSSagi Grimberg * Allow both IPv4 and IPv6 sockets to bind a single port 1827670c2a3aSSagi Grimberg * at the same time. 1828670c2a3aSSagi Grimberg */ 1829670c2a3aSSagi Grimberg ret = rdma_set_afonly(cm_id, 1); 18308f000cacSChristoph Hellwig if (ret) { 1831670c2a3aSSagi Grimberg pr_err("rdma_set_afonly failed (%d)\n", ret); 1832670c2a3aSSagi Grimberg goto out_destroy_id; 1833670c2a3aSSagi Grimberg } 1834670c2a3aSSagi Grimberg 1835a032e4f6SSagi Grimberg ret = rdma_bind_addr(cm_id, addr); 1836670c2a3aSSagi Grimberg if (ret) { 1837a032e4f6SSagi Grimberg pr_err("binding CM ID to %pISpcs failed (%d)\n", addr, ret); 18388f000cacSChristoph Hellwig goto out_destroy_id; 18398f000cacSChristoph Hellwig } 18408f000cacSChristoph Hellwig 18418f000cacSChristoph Hellwig ret = rdma_listen(cm_id, 128); 18428f000cacSChristoph Hellwig if (ret) { 1843a032e4f6SSagi Grimberg pr_err("listening to %pISpcs failed (%d)\n", addr, ret); 18448f000cacSChristoph Hellwig goto out_destroy_id; 18458f000cacSChristoph Hellwig } 18468f000cacSChristoph Hellwig 1847b09160c3SIsrael Rukshin if (port->nport->pi_enable && 1848b09160c3SIsrael Rukshin !(cm_id->device->attrs.device_cap_flags & 1849b09160c3SIsrael Rukshin IB_DEVICE_INTEGRITY_HANDOVER)) { 1850b09160c3SIsrael Rukshin pr_err("T10-PI is not supported for %pISpcs\n", addr); 1851b09160c3SIsrael Rukshin ret = -EINVAL; 1852b09160c3SIsrael Rukshin goto out_destroy_id; 1853b09160c3SIsrael Rukshin } 1854b09160c3SIsrael Rukshin 1855a032e4f6SSagi Grimberg port->cm_id = cm_id; 18568f000cacSChristoph Hellwig return 0; 18578f000cacSChristoph Hellwig 18588f000cacSChristoph Hellwig out_destroy_id: 18598f000cacSChristoph Hellwig rdma_destroy_id(cm_id); 18608f000cacSChristoph Hellwig return ret; 18618f000cacSChristoph Hellwig } 18628f000cacSChristoph Hellwig 1863a032e4f6SSagi Grimberg static void nvmet_rdma_repair_port_work(struct work_struct *w) 18648f000cacSChristoph Hellwig { 1865a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = container_of(to_delayed_work(w), 1866a032e4f6SSagi Grimberg struct nvmet_rdma_port, repair_work); 1867a032e4f6SSagi Grimberg int ret; 18688f000cacSChristoph Hellwig 1869a032e4f6SSagi Grimberg nvmet_rdma_disable_port(port); 1870a032e4f6SSagi Grimberg ret = nvmet_rdma_enable_port(port); 1871a032e4f6SSagi Grimberg if (ret) 1872a032e4f6SSagi Grimberg schedule_delayed_work(&port->repair_work, 5 * HZ); 1873a032e4f6SSagi Grimberg } 1874a032e4f6SSagi Grimberg 1875a032e4f6SSagi Grimberg static int nvmet_rdma_add_port(struct nvmet_port *nport) 1876a032e4f6SSagi Grimberg { 1877a032e4f6SSagi Grimberg struct nvmet_rdma_port *port; 1878a032e4f6SSagi Grimberg __kernel_sa_family_t af; 1879a032e4f6SSagi Grimberg int ret; 1880a032e4f6SSagi Grimberg 1881a032e4f6SSagi Grimberg port = kzalloc(sizeof(*port), GFP_KERNEL); 1882a032e4f6SSagi Grimberg if (!port) 1883a032e4f6SSagi Grimberg return -ENOMEM; 1884a032e4f6SSagi Grimberg 1885a032e4f6SSagi Grimberg nport->priv = port; 1886a032e4f6SSagi Grimberg port->nport = nport; 1887a032e4f6SSagi Grimberg INIT_DELAYED_WORK(&port->repair_work, nvmet_rdma_repair_port_work); 1888a032e4f6SSagi Grimberg 1889a032e4f6SSagi Grimberg switch (nport->disc_addr.adrfam) { 1890a032e4f6SSagi Grimberg case NVMF_ADDR_FAMILY_IP4: 1891a032e4f6SSagi Grimberg af = AF_INET; 1892a032e4f6SSagi Grimberg break; 1893a032e4f6SSagi Grimberg case NVMF_ADDR_FAMILY_IP6: 1894a032e4f6SSagi Grimberg af = AF_INET6; 1895a032e4f6SSagi Grimberg break; 1896a032e4f6SSagi Grimberg default: 1897a032e4f6SSagi Grimberg pr_err("address family %d not supported\n", 1898a032e4f6SSagi Grimberg nport->disc_addr.adrfam); 1899a032e4f6SSagi Grimberg ret = -EINVAL; 1900a032e4f6SSagi Grimberg goto out_free_port; 1901a032e4f6SSagi Grimberg } 1902a032e4f6SSagi Grimberg 1903a032e4f6SSagi Grimberg if (nport->inline_data_size < 0) { 1904a032e4f6SSagi Grimberg nport->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE; 1905a032e4f6SSagi Grimberg } else if (nport->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) { 1906a032e4f6SSagi Grimberg pr_warn("inline_data_size %u is too large, reducing to %u\n", 1907a032e4f6SSagi Grimberg nport->inline_data_size, 1908a032e4f6SSagi Grimberg NVMET_RDMA_MAX_INLINE_DATA_SIZE); 1909a032e4f6SSagi Grimberg nport->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE; 1910a032e4f6SSagi Grimberg } 1911a032e4f6SSagi Grimberg 1912a032e4f6SSagi Grimberg ret = inet_pton_with_scope(&init_net, af, nport->disc_addr.traddr, 1913a032e4f6SSagi Grimberg nport->disc_addr.trsvcid, &port->addr); 1914a032e4f6SSagi Grimberg if (ret) { 1915a032e4f6SSagi Grimberg pr_err("malformed ip/port passed: %s:%s\n", 1916a032e4f6SSagi Grimberg nport->disc_addr.traddr, nport->disc_addr.trsvcid); 1917a032e4f6SSagi Grimberg goto out_free_port; 1918a032e4f6SSagi Grimberg } 1919a032e4f6SSagi Grimberg 1920a032e4f6SSagi Grimberg ret = nvmet_rdma_enable_port(port); 1921a032e4f6SSagi Grimberg if (ret) 1922a032e4f6SSagi Grimberg goto out_free_port; 1923a032e4f6SSagi Grimberg 1924a032e4f6SSagi Grimberg pr_info("enabling port %d (%pISpcs)\n", 1925a032e4f6SSagi Grimberg le16_to_cpu(nport->disc_addr.portid), 1926a032e4f6SSagi Grimberg (struct sockaddr *)&port->addr); 1927a032e4f6SSagi Grimberg 1928a032e4f6SSagi Grimberg return 0; 1929a032e4f6SSagi Grimberg 1930a032e4f6SSagi Grimberg out_free_port: 1931a032e4f6SSagi Grimberg kfree(port); 1932a032e4f6SSagi Grimberg return ret; 1933a032e4f6SSagi Grimberg } 1934a032e4f6SSagi Grimberg 1935a032e4f6SSagi Grimberg static void nvmet_rdma_remove_port(struct nvmet_port *nport) 1936a032e4f6SSagi Grimberg { 1937a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = nport->priv; 1938a032e4f6SSagi Grimberg 1939a032e4f6SSagi Grimberg cancel_delayed_work_sync(&port->repair_work); 1940a032e4f6SSagi Grimberg nvmet_rdma_disable_port(port); 1941a032e4f6SSagi Grimberg kfree(port); 19428f000cacSChristoph Hellwig } 19438f000cacSChristoph Hellwig 19444c652685SSagi Grimberg static void nvmet_rdma_disc_port_addr(struct nvmet_req *req, 1945a032e4f6SSagi Grimberg struct nvmet_port *nport, char *traddr) 19464c652685SSagi Grimberg { 1947a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = nport->priv; 1948a032e4f6SSagi Grimberg struct rdma_cm_id *cm_id = port->cm_id; 19494c652685SSagi Grimberg 19504c652685SSagi Grimberg if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) { 19514c652685SSagi Grimberg struct nvmet_rdma_rsp *rsp = 19524c652685SSagi Grimberg container_of(req, struct nvmet_rdma_rsp, req); 19534c652685SSagi Grimberg struct rdma_cm_id *req_cm_id = rsp->queue->cm_id; 19544c652685SSagi Grimberg struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr; 19554c652685SSagi Grimberg 19564c652685SSagi Grimberg sprintf(traddr, "%pISc", addr); 19574c652685SSagi Grimberg } else { 1958a032e4f6SSagi Grimberg memcpy(traddr, nport->disc_addr.traddr, NVMF_TRADDR_SIZE); 19594c652685SSagi Grimberg } 19604c652685SSagi Grimberg } 19614c652685SSagi Grimberg 1962ec6d20e1SMax Gurtovoy static u8 nvmet_rdma_get_mdts(const struct nvmet_ctrl *ctrl) 1963ec6d20e1SMax Gurtovoy { 1964b09160c3SIsrael Rukshin if (ctrl->pi_support) 1965b09160c3SIsrael Rukshin return NVMET_RDMA_MAX_METADATA_MDTS; 1966ec6d20e1SMax Gurtovoy return NVMET_RDMA_MAX_MDTS; 1967ec6d20e1SMax Gurtovoy } 1968ec6d20e1SMax Gurtovoy 1969e929f06dSChristoph Hellwig static const struct nvmet_fabrics_ops nvmet_rdma_ops = { 19708f000cacSChristoph Hellwig .owner = THIS_MODULE, 19718f000cacSChristoph Hellwig .type = NVMF_TRTYPE_RDMA, 19728f000cacSChristoph Hellwig .msdbd = 1, 19736fa350f7SMax Gurtovoy .flags = NVMF_KEYED_SGLS | NVMF_METADATA_SUPPORTED, 19748f000cacSChristoph Hellwig .add_port = nvmet_rdma_add_port, 19758f000cacSChristoph Hellwig .remove_port = nvmet_rdma_remove_port, 19768f000cacSChristoph Hellwig .queue_response = nvmet_rdma_queue_response, 19778f000cacSChristoph Hellwig .delete_ctrl = nvmet_rdma_delete_ctrl, 19784c652685SSagi Grimberg .disc_traddr = nvmet_rdma_disc_port_addr, 1979ec6d20e1SMax Gurtovoy .get_mdts = nvmet_rdma_get_mdts, 19808f000cacSChristoph Hellwig }; 19818f000cacSChristoph Hellwig 1982f1d4ef7dSSagi Grimberg static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data) 1983f1d4ef7dSSagi Grimberg { 198443b92fd2SIsrael Rukshin struct nvmet_rdma_queue *queue, *tmp; 1985a3dd7d00SMax Gurtovoy struct nvmet_rdma_device *ndev; 1986a3dd7d00SMax Gurtovoy bool found = false; 1987f1d4ef7dSSagi Grimberg 1988a3dd7d00SMax Gurtovoy mutex_lock(&device_list_mutex); 1989a3dd7d00SMax Gurtovoy list_for_each_entry(ndev, &device_list, entry) { 1990a3dd7d00SMax Gurtovoy if (ndev->device == ib_device) { 1991a3dd7d00SMax Gurtovoy found = true; 1992a3dd7d00SMax Gurtovoy break; 1993a3dd7d00SMax Gurtovoy } 1994a3dd7d00SMax Gurtovoy } 1995a3dd7d00SMax Gurtovoy mutex_unlock(&device_list_mutex); 1996a3dd7d00SMax Gurtovoy 1997a3dd7d00SMax Gurtovoy if (!found) 1998a3dd7d00SMax Gurtovoy return; 1999a3dd7d00SMax Gurtovoy 2000a3dd7d00SMax Gurtovoy /* 2001a3dd7d00SMax Gurtovoy * IB Device that is used by nvmet controllers is being removed, 2002a3dd7d00SMax Gurtovoy * delete all queues using this device. 2003a3dd7d00SMax Gurtovoy */ 2004f1d4ef7dSSagi Grimberg mutex_lock(&nvmet_rdma_queue_mutex); 200543b92fd2SIsrael Rukshin list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list, 200643b92fd2SIsrael Rukshin queue_list) { 2007f1d4ef7dSSagi Grimberg if (queue->dev->device != ib_device) 2008f1d4ef7dSSagi Grimberg continue; 2009f1d4ef7dSSagi Grimberg 2010f1d4ef7dSSagi Grimberg pr_info("Removing queue %d\n", queue->idx); 201143b92fd2SIsrael Rukshin list_del_init(&queue->queue_list); 2012f1d4ef7dSSagi Grimberg __nvmet_rdma_queue_disconnect(queue); 2013f1d4ef7dSSagi Grimberg } 2014f1d4ef7dSSagi Grimberg mutex_unlock(&nvmet_rdma_queue_mutex); 2015f1d4ef7dSSagi Grimberg 2016f1d4ef7dSSagi Grimberg flush_scheduled_work(); 2017f1d4ef7dSSagi Grimberg } 2018f1d4ef7dSSagi Grimberg 2019f1d4ef7dSSagi Grimberg static struct ib_client nvmet_rdma_ib_client = { 2020f1d4ef7dSSagi Grimberg .name = "nvmet_rdma", 2021f1d4ef7dSSagi Grimberg .remove = nvmet_rdma_remove_one 2022f1d4ef7dSSagi Grimberg }; 2023f1d4ef7dSSagi Grimberg 20248f000cacSChristoph Hellwig static int __init nvmet_rdma_init(void) 20258f000cacSChristoph Hellwig { 2026f1d4ef7dSSagi Grimberg int ret; 2027f1d4ef7dSSagi Grimberg 2028f1d4ef7dSSagi Grimberg ret = ib_register_client(&nvmet_rdma_ib_client); 2029f1d4ef7dSSagi Grimberg if (ret) 2030f1d4ef7dSSagi Grimberg return ret; 2031f1d4ef7dSSagi Grimberg 2032f1d4ef7dSSagi Grimberg ret = nvmet_register_transport(&nvmet_rdma_ops); 2033f1d4ef7dSSagi Grimberg if (ret) 2034f1d4ef7dSSagi Grimberg goto err_ib_client; 2035f1d4ef7dSSagi Grimberg 2036f1d4ef7dSSagi Grimberg return 0; 2037f1d4ef7dSSagi Grimberg 2038f1d4ef7dSSagi Grimberg err_ib_client: 2039f1d4ef7dSSagi Grimberg ib_unregister_client(&nvmet_rdma_ib_client); 2040f1d4ef7dSSagi Grimberg return ret; 20418f000cacSChristoph Hellwig } 20428f000cacSChristoph Hellwig 20438f000cacSChristoph Hellwig static void __exit nvmet_rdma_exit(void) 20448f000cacSChristoph Hellwig { 20458f000cacSChristoph Hellwig nvmet_unregister_transport(&nvmet_rdma_ops); 2046f1d4ef7dSSagi Grimberg ib_unregister_client(&nvmet_rdma_ib_client); 2047cb4876e8SSagi Grimberg WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list)); 20488f000cacSChristoph Hellwig ida_destroy(&nvmet_rdma_queue_ida); 20498f000cacSChristoph Hellwig } 20508f000cacSChristoph Hellwig 20518f000cacSChristoph Hellwig module_init(nvmet_rdma_init); 20528f000cacSChristoph Hellwig module_exit(nvmet_rdma_exit); 20538f000cacSChristoph Hellwig 20548f000cacSChristoph Hellwig MODULE_LICENSE("GPL v2"); 20558f000cacSChristoph Hellwig MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */ 2056