13641bd32SChristoph Hellwig // SPDX-License-Identifier: GPL-2.0 28f000cacSChristoph Hellwig /* 38f000cacSChristoph Hellwig * NVMe over Fabrics RDMA target. 48f000cacSChristoph Hellwig * Copyright (c) 2015-2016 HGST, a Western Digital Company. 58f000cacSChristoph Hellwig */ 68f000cacSChristoph Hellwig #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 78f000cacSChristoph Hellwig #include <linux/atomic.h> 88f000cacSChristoph Hellwig #include <linux/ctype.h> 98f000cacSChristoph Hellwig #include <linux/delay.h> 108f000cacSChristoph Hellwig #include <linux/err.h> 118f000cacSChristoph Hellwig #include <linux/init.h> 128f000cacSChristoph Hellwig #include <linux/module.h> 138f000cacSChristoph Hellwig #include <linux/nvme.h> 148f000cacSChristoph Hellwig #include <linux/slab.h> 158f000cacSChristoph Hellwig #include <linux/string.h> 168f000cacSChristoph Hellwig #include <linux/wait.h> 178f000cacSChristoph Hellwig #include <linux/inet.h> 188f000cacSChristoph Hellwig #include <asm/unaligned.h> 198f000cacSChristoph Hellwig 208f000cacSChristoph Hellwig #include <rdma/ib_verbs.h> 218f000cacSChristoph Hellwig #include <rdma/rdma_cm.h> 228f000cacSChristoph Hellwig #include <rdma/rw.h> 23*8094ba0aSLeon Romanovsky #include <rdma/ib_cm.h> 248f000cacSChristoph Hellwig 258f000cacSChristoph Hellwig #include <linux/nvme-rdma.h> 268f000cacSChristoph Hellwig #include "nvmet.h" 278f000cacSChristoph Hellwig 288f000cacSChristoph Hellwig /* 290d5ee2b2SSteve Wise * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data 308f000cacSChristoph Hellwig */ 310d5ee2b2SSteve Wise #define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE PAGE_SIZE 320d5ee2b2SSteve Wise #define NVMET_RDMA_MAX_INLINE_SGE 4 330d5ee2b2SSteve Wise #define NVMET_RDMA_MAX_INLINE_DATA_SIZE max_t(int, SZ_16K, PAGE_SIZE) 348f000cacSChristoph Hellwig 35ec6d20e1SMax Gurtovoy /* Assume mpsmin == device_page_size == 4KB */ 36ec6d20e1SMax Gurtovoy #define NVMET_RDMA_MAX_MDTS 8 37ec6d20e1SMax Gurtovoy 388f000cacSChristoph Hellwig struct nvmet_rdma_cmd { 390d5ee2b2SSteve Wise struct ib_sge sge[NVMET_RDMA_MAX_INLINE_SGE + 1]; 408f000cacSChristoph Hellwig struct ib_cqe cqe; 418f000cacSChristoph Hellwig struct ib_recv_wr wr; 420d5ee2b2SSteve Wise struct scatterlist inline_sg[NVMET_RDMA_MAX_INLINE_SGE]; 438f000cacSChristoph Hellwig struct nvme_command *nvme_cmd; 448f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 458f000cacSChristoph Hellwig }; 468f000cacSChristoph Hellwig 478f000cacSChristoph Hellwig enum { 488f000cacSChristoph Hellwig NVMET_RDMA_REQ_INLINE_DATA = (1 << 0), 498f000cacSChristoph Hellwig NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1), 508f000cacSChristoph Hellwig }; 518f000cacSChristoph Hellwig 528f000cacSChristoph Hellwig struct nvmet_rdma_rsp { 538f000cacSChristoph Hellwig struct ib_sge send_sge; 548f000cacSChristoph Hellwig struct ib_cqe send_cqe; 558f000cacSChristoph Hellwig struct ib_send_wr send_wr; 568f000cacSChristoph Hellwig 578f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmd; 588f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 598f000cacSChristoph Hellwig 608f000cacSChristoph Hellwig struct ib_cqe read_cqe; 618f000cacSChristoph Hellwig struct rdma_rw_ctx rw; 628f000cacSChristoph Hellwig 638f000cacSChristoph Hellwig struct nvmet_req req; 648f000cacSChristoph Hellwig 658407879cSSagi Grimberg bool allocated; 668f000cacSChristoph Hellwig u8 n_rdma; 678f000cacSChristoph Hellwig u32 flags; 688f000cacSChristoph Hellwig u32 invalidate_rkey; 698f000cacSChristoph Hellwig 708f000cacSChristoph Hellwig struct list_head wait_list; 718f000cacSChristoph Hellwig struct list_head free_list; 728f000cacSChristoph Hellwig }; 738f000cacSChristoph Hellwig 748f000cacSChristoph Hellwig enum nvmet_rdma_queue_state { 758f000cacSChristoph Hellwig NVMET_RDMA_Q_CONNECTING, 768f000cacSChristoph Hellwig NVMET_RDMA_Q_LIVE, 778f000cacSChristoph Hellwig NVMET_RDMA_Q_DISCONNECTING, 788f000cacSChristoph Hellwig }; 798f000cacSChristoph Hellwig 808f000cacSChristoph Hellwig struct nvmet_rdma_queue { 818f000cacSChristoph Hellwig struct rdma_cm_id *cm_id; 8221f90243SIsrael Rukshin struct ib_qp *qp; 838f000cacSChristoph Hellwig struct nvmet_port *port; 848f000cacSChristoph Hellwig struct ib_cq *cq; 858f000cacSChristoph Hellwig atomic_t sq_wr_avail; 868f000cacSChristoph Hellwig struct nvmet_rdma_device *dev; 878f000cacSChristoph Hellwig spinlock_t state_lock; 888f000cacSChristoph Hellwig enum nvmet_rdma_queue_state state; 898f000cacSChristoph Hellwig struct nvmet_cq nvme_cq; 908f000cacSChristoph Hellwig struct nvmet_sq nvme_sq; 918f000cacSChristoph Hellwig 928f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsps; 938f000cacSChristoph Hellwig struct list_head free_rsps; 948f000cacSChristoph Hellwig spinlock_t rsps_lock; 958f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmds; 968f000cacSChristoph Hellwig 978f000cacSChristoph Hellwig struct work_struct release_work; 988f000cacSChristoph Hellwig struct list_head rsp_wait_list; 998f000cacSChristoph Hellwig struct list_head rsp_wr_wait_list; 1008f000cacSChristoph Hellwig spinlock_t rsp_wr_wait_lock; 1018f000cacSChristoph Hellwig 1028f000cacSChristoph Hellwig int idx; 1038f000cacSChristoph Hellwig int host_qid; 1048f000cacSChristoph Hellwig int recv_queue_size; 1058f000cacSChristoph Hellwig int send_queue_size; 1068f000cacSChristoph Hellwig 1078f000cacSChristoph Hellwig struct list_head queue_list; 1088f000cacSChristoph Hellwig }; 1098f000cacSChristoph Hellwig 110a032e4f6SSagi Grimberg struct nvmet_rdma_port { 111a032e4f6SSagi Grimberg struct nvmet_port *nport; 112a032e4f6SSagi Grimberg struct sockaddr_storage addr; 113a032e4f6SSagi Grimberg struct rdma_cm_id *cm_id; 114a032e4f6SSagi Grimberg struct delayed_work repair_work; 115a032e4f6SSagi Grimberg }; 116a032e4f6SSagi Grimberg 1178f000cacSChristoph Hellwig struct nvmet_rdma_device { 1188f000cacSChristoph Hellwig struct ib_device *device; 1198f000cacSChristoph Hellwig struct ib_pd *pd; 1208f000cacSChristoph Hellwig struct ib_srq *srq; 1218f000cacSChristoph Hellwig struct nvmet_rdma_cmd *srq_cmds; 1228f000cacSChristoph Hellwig size_t srq_size; 1238f000cacSChristoph Hellwig struct kref ref; 1248f000cacSChristoph Hellwig struct list_head entry; 1250d5ee2b2SSteve Wise int inline_data_size; 1260d5ee2b2SSteve Wise int inline_page_count; 1278f000cacSChristoph Hellwig }; 1288f000cacSChristoph Hellwig 1298f000cacSChristoph Hellwig static bool nvmet_rdma_use_srq; 1308f000cacSChristoph Hellwig module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444); 1318f000cacSChristoph Hellwig MODULE_PARM_DESC(use_srq, "Use shared receive queue."); 1328f000cacSChristoph Hellwig 1338f000cacSChristoph Hellwig static DEFINE_IDA(nvmet_rdma_queue_ida); 1348f000cacSChristoph Hellwig static LIST_HEAD(nvmet_rdma_queue_list); 1358f000cacSChristoph Hellwig static DEFINE_MUTEX(nvmet_rdma_queue_mutex); 1368f000cacSChristoph Hellwig 1378f000cacSChristoph Hellwig static LIST_HEAD(device_list); 1388f000cacSChristoph Hellwig static DEFINE_MUTEX(device_list_mutex); 1398f000cacSChristoph Hellwig 1408f000cacSChristoph Hellwig static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp); 1418f000cacSChristoph Hellwig static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc); 1428f000cacSChristoph Hellwig static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 1438f000cacSChristoph Hellwig static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc); 1448f000cacSChristoph Hellwig static void nvmet_rdma_qp_event(struct ib_event *event, void *priv); 1458f000cacSChristoph Hellwig static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue); 1465cbab630SRaju Rangoju static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev, 1475cbab630SRaju Rangoju struct nvmet_rdma_rsp *r); 1485cbab630SRaju Rangoju static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, 1495cbab630SRaju Rangoju struct nvmet_rdma_rsp *r); 1508f000cacSChristoph Hellwig 151e929f06dSChristoph Hellwig static const struct nvmet_fabrics_ops nvmet_rdma_ops; 1528f000cacSChristoph Hellwig 1530d5ee2b2SSteve Wise static int num_pages(int len) 1540d5ee2b2SSteve Wise { 1550d5ee2b2SSteve Wise return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT); 1560d5ee2b2SSteve Wise } 1570d5ee2b2SSteve Wise 1588f000cacSChristoph Hellwig static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp) 1598f000cacSChristoph Hellwig { 1608f000cacSChristoph Hellwig return nvme_is_write(rsp->req.cmd) && 1615e62d5c9SChristoph Hellwig rsp->req.transfer_len && 1628f000cacSChristoph Hellwig !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA); 1638f000cacSChristoph Hellwig } 1648f000cacSChristoph Hellwig 1658f000cacSChristoph Hellwig static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp) 1668f000cacSChristoph Hellwig { 1678f000cacSChristoph Hellwig return !nvme_is_write(rsp->req.cmd) && 1685e62d5c9SChristoph Hellwig rsp->req.transfer_len && 169fc6c9730SMax Gurtovoy !rsp->req.cqe->status && 1708f000cacSChristoph Hellwig !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA); 1718f000cacSChristoph Hellwig } 1728f000cacSChristoph Hellwig 1738f000cacSChristoph Hellwig static inline struct nvmet_rdma_rsp * 1748f000cacSChristoph Hellwig nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue) 1758f000cacSChristoph Hellwig { 1768f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp; 1778f000cacSChristoph Hellwig unsigned long flags; 1788f000cacSChristoph Hellwig 1798f000cacSChristoph Hellwig spin_lock_irqsave(&queue->rsps_lock, flags); 1808407879cSSagi Grimberg rsp = list_first_entry_or_null(&queue->free_rsps, 1818f000cacSChristoph Hellwig struct nvmet_rdma_rsp, free_list); 1828407879cSSagi Grimberg if (likely(rsp)) 1838f000cacSChristoph Hellwig list_del(&rsp->free_list); 1848f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->rsps_lock, flags); 1858f000cacSChristoph Hellwig 1868407879cSSagi Grimberg if (unlikely(!rsp)) { 1875cbab630SRaju Rangoju int ret; 1885cbab630SRaju Rangoju 1895cbab630SRaju Rangoju rsp = kzalloc(sizeof(*rsp), GFP_KERNEL); 1908407879cSSagi Grimberg if (unlikely(!rsp)) 1918407879cSSagi Grimberg return NULL; 1925cbab630SRaju Rangoju ret = nvmet_rdma_alloc_rsp(queue->dev, rsp); 1935cbab630SRaju Rangoju if (unlikely(ret)) { 1945cbab630SRaju Rangoju kfree(rsp); 1955cbab630SRaju Rangoju return NULL; 1965cbab630SRaju Rangoju } 1975cbab630SRaju Rangoju 1988407879cSSagi Grimberg rsp->allocated = true; 1998407879cSSagi Grimberg } 2008407879cSSagi Grimberg 2018f000cacSChristoph Hellwig return rsp; 2028f000cacSChristoph Hellwig } 2038f000cacSChristoph Hellwig 2048f000cacSChristoph Hellwig static inline void 2058f000cacSChristoph Hellwig nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp) 2068f000cacSChristoph Hellwig { 2078f000cacSChristoph Hellwig unsigned long flags; 2088f000cacSChristoph Hellwig 209ad1f8249SIsrael Rukshin if (unlikely(rsp->allocated)) { 2105cbab630SRaju Rangoju nvmet_rdma_free_rsp(rsp->queue->dev, rsp); 2118407879cSSagi Grimberg kfree(rsp); 2128407879cSSagi Grimberg return; 2138407879cSSagi Grimberg } 2148407879cSSagi Grimberg 2158f000cacSChristoph Hellwig spin_lock_irqsave(&rsp->queue->rsps_lock, flags); 2168f000cacSChristoph Hellwig list_add_tail(&rsp->free_list, &rsp->queue->free_rsps); 2178f000cacSChristoph Hellwig spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags); 2188f000cacSChristoph Hellwig } 2198f000cacSChristoph Hellwig 2200d5ee2b2SSteve Wise static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev, 2210d5ee2b2SSteve Wise struct nvmet_rdma_cmd *c) 2220d5ee2b2SSteve Wise { 2230d5ee2b2SSteve Wise struct scatterlist *sg; 2240d5ee2b2SSteve Wise struct ib_sge *sge; 2250d5ee2b2SSteve Wise int i; 2260d5ee2b2SSteve Wise 2270d5ee2b2SSteve Wise if (!ndev->inline_data_size) 2280d5ee2b2SSteve Wise return; 2290d5ee2b2SSteve Wise 2300d5ee2b2SSteve Wise sg = c->inline_sg; 2310d5ee2b2SSteve Wise sge = &c->sge[1]; 2320d5ee2b2SSteve Wise 2330d5ee2b2SSteve Wise for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) { 2340d5ee2b2SSteve Wise if (sge->length) 2350d5ee2b2SSteve Wise ib_dma_unmap_page(ndev->device, sge->addr, 2360d5ee2b2SSteve Wise sge->length, DMA_FROM_DEVICE); 2370d5ee2b2SSteve Wise if (sg_page(sg)) 2380d5ee2b2SSteve Wise __free_page(sg_page(sg)); 2390d5ee2b2SSteve Wise } 2400d5ee2b2SSteve Wise } 2410d5ee2b2SSteve Wise 2420d5ee2b2SSteve Wise static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev, 2430d5ee2b2SSteve Wise struct nvmet_rdma_cmd *c) 2440d5ee2b2SSteve Wise { 2450d5ee2b2SSteve Wise struct scatterlist *sg; 2460d5ee2b2SSteve Wise struct ib_sge *sge; 2470d5ee2b2SSteve Wise struct page *pg; 2480d5ee2b2SSteve Wise int len; 2490d5ee2b2SSteve Wise int i; 2500d5ee2b2SSteve Wise 2510d5ee2b2SSteve Wise if (!ndev->inline_data_size) 2520d5ee2b2SSteve Wise return 0; 2530d5ee2b2SSteve Wise 2540d5ee2b2SSteve Wise sg = c->inline_sg; 2550d5ee2b2SSteve Wise sg_init_table(sg, ndev->inline_page_count); 2560d5ee2b2SSteve Wise sge = &c->sge[1]; 2570d5ee2b2SSteve Wise len = ndev->inline_data_size; 2580d5ee2b2SSteve Wise 2590d5ee2b2SSteve Wise for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) { 2600d5ee2b2SSteve Wise pg = alloc_page(GFP_KERNEL); 2610d5ee2b2SSteve Wise if (!pg) 2620d5ee2b2SSteve Wise goto out_err; 2630d5ee2b2SSteve Wise sg_assign_page(sg, pg); 2640d5ee2b2SSteve Wise sge->addr = ib_dma_map_page(ndev->device, 2650d5ee2b2SSteve Wise pg, 0, PAGE_SIZE, DMA_FROM_DEVICE); 2660d5ee2b2SSteve Wise if (ib_dma_mapping_error(ndev->device, sge->addr)) 2670d5ee2b2SSteve Wise goto out_err; 2680d5ee2b2SSteve Wise sge->length = min_t(int, len, PAGE_SIZE); 2690d5ee2b2SSteve Wise sge->lkey = ndev->pd->local_dma_lkey; 2700d5ee2b2SSteve Wise len -= sge->length; 2710d5ee2b2SSteve Wise } 2720d5ee2b2SSteve Wise 2730d5ee2b2SSteve Wise return 0; 2740d5ee2b2SSteve Wise out_err: 2750d5ee2b2SSteve Wise for (; i >= 0; i--, sg--, sge--) { 2760d5ee2b2SSteve Wise if (sge->length) 2770d5ee2b2SSteve Wise ib_dma_unmap_page(ndev->device, sge->addr, 2780d5ee2b2SSteve Wise sge->length, DMA_FROM_DEVICE); 2790d5ee2b2SSteve Wise if (sg_page(sg)) 2800d5ee2b2SSteve Wise __free_page(sg_page(sg)); 2810d5ee2b2SSteve Wise } 2820d5ee2b2SSteve Wise return -ENOMEM; 2830d5ee2b2SSteve Wise } 2840d5ee2b2SSteve Wise 2858f000cacSChristoph Hellwig static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev, 2868f000cacSChristoph Hellwig struct nvmet_rdma_cmd *c, bool admin) 2878f000cacSChristoph Hellwig { 2888f000cacSChristoph Hellwig /* NVMe command / RDMA RECV */ 2898f000cacSChristoph Hellwig c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL); 2908f000cacSChristoph Hellwig if (!c->nvme_cmd) 2918f000cacSChristoph Hellwig goto out; 2928f000cacSChristoph Hellwig 2938f000cacSChristoph Hellwig c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd, 2948f000cacSChristoph Hellwig sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 2958f000cacSChristoph Hellwig if (ib_dma_mapping_error(ndev->device, c->sge[0].addr)) 2968f000cacSChristoph Hellwig goto out_free_cmd; 2978f000cacSChristoph Hellwig 2988f000cacSChristoph Hellwig c->sge[0].length = sizeof(*c->nvme_cmd); 2998f000cacSChristoph Hellwig c->sge[0].lkey = ndev->pd->local_dma_lkey; 3008f000cacSChristoph Hellwig 3010d5ee2b2SSteve Wise if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c)) 3028f000cacSChristoph Hellwig goto out_unmap_cmd; 3038f000cacSChristoph Hellwig 3048f000cacSChristoph Hellwig c->cqe.done = nvmet_rdma_recv_done; 3058f000cacSChristoph Hellwig 3068f000cacSChristoph Hellwig c->wr.wr_cqe = &c->cqe; 3078f000cacSChristoph Hellwig c->wr.sg_list = c->sge; 3080d5ee2b2SSteve Wise c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1; 3098f000cacSChristoph Hellwig 3108f000cacSChristoph Hellwig return 0; 3118f000cacSChristoph Hellwig 3128f000cacSChristoph Hellwig out_unmap_cmd: 3138f000cacSChristoph Hellwig ib_dma_unmap_single(ndev->device, c->sge[0].addr, 3148f000cacSChristoph Hellwig sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 3158f000cacSChristoph Hellwig out_free_cmd: 3168f000cacSChristoph Hellwig kfree(c->nvme_cmd); 3178f000cacSChristoph Hellwig 3188f000cacSChristoph Hellwig out: 3198f000cacSChristoph Hellwig return -ENOMEM; 3208f000cacSChristoph Hellwig } 3218f000cacSChristoph Hellwig 3228f000cacSChristoph Hellwig static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev, 3238f000cacSChristoph Hellwig struct nvmet_rdma_cmd *c, bool admin) 3248f000cacSChristoph Hellwig { 3250d5ee2b2SSteve Wise if (!admin) 3260d5ee2b2SSteve Wise nvmet_rdma_free_inline_pages(ndev, c); 3278f000cacSChristoph Hellwig ib_dma_unmap_single(ndev->device, c->sge[0].addr, 3288f000cacSChristoph Hellwig sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 3298f000cacSChristoph Hellwig kfree(c->nvme_cmd); 3308f000cacSChristoph Hellwig } 3318f000cacSChristoph Hellwig 3328f000cacSChristoph Hellwig static struct nvmet_rdma_cmd * 3338f000cacSChristoph Hellwig nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev, 3348f000cacSChristoph Hellwig int nr_cmds, bool admin) 3358f000cacSChristoph Hellwig { 3368f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmds; 3378f000cacSChristoph Hellwig int ret = -EINVAL, i; 3388f000cacSChristoph Hellwig 3398f000cacSChristoph Hellwig cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL); 3408f000cacSChristoph Hellwig if (!cmds) 3418f000cacSChristoph Hellwig goto out; 3428f000cacSChristoph Hellwig 3438f000cacSChristoph Hellwig for (i = 0; i < nr_cmds; i++) { 3448f000cacSChristoph Hellwig ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin); 3458f000cacSChristoph Hellwig if (ret) 3468f000cacSChristoph Hellwig goto out_free; 3478f000cacSChristoph Hellwig } 3488f000cacSChristoph Hellwig 3498f000cacSChristoph Hellwig return cmds; 3508f000cacSChristoph Hellwig 3518f000cacSChristoph Hellwig out_free: 3528f000cacSChristoph Hellwig while (--i >= 0) 3538f000cacSChristoph Hellwig nvmet_rdma_free_cmd(ndev, cmds + i, admin); 3548f000cacSChristoph Hellwig kfree(cmds); 3558f000cacSChristoph Hellwig out: 3568f000cacSChristoph Hellwig return ERR_PTR(ret); 3578f000cacSChristoph Hellwig } 3588f000cacSChristoph Hellwig 3598f000cacSChristoph Hellwig static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev, 3608f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin) 3618f000cacSChristoph Hellwig { 3628f000cacSChristoph Hellwig int i; 3638f000cacSChristoph Hellwig 3648f000cacSChristoph Hellwig for (i = 0; i < nr_cmds; i++) 3658f000cacSChristoph Hellwig nvmet_rdma_free_cmd(ndev, cmds + i, admin); 3668f000cacSChristoph Hellwig kfree(cmds); 3678f000cacSChristoph Hellwig } 3688f000cacSChristoph Hellwig 3698f000cacSChristoph Hellwig static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, 3708f000cacSChristoph Hellwig struct nvmet_rdma_rsp *r) 3718f000cacSChristoph Hellwig { 3728f000cacSChristoph Hellwig /* NVMe CQE / RDMA SEND */ 373fc6c9730SMax Gurtovoy r->req.cqe = kmalloc(sizeof(*r->req.cqe), GFP_KERNEL); 374fc6c9730SMax Gurtovoy if (!r->req.cqe) 3758f000cacSChristoph Hellwig goto out; 3768f000cacSChristoph Hellwig 377fc6c9730SMax Gurtovoy r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.cqe, 378fc6c9730SMax Gurtovoy sizeof(*r->req.cqe), DMA_TO_DEVICE); 3798f000cacSChristoph Hellwig if (ib_dma_mapping_error(ndev->device, r->send_sge.addr)) 3808f000cacSChristoph Hellwig goto out_free_rsp; 3818f000cacSChristoph Hellwig 3828dc2ed3fSMax Gurtovoy r->req.p2p_client = &ndev->device->dev; 383fc6c9730SMax Gurtovoy r->send_sge.length = sizeof(*r->req.cqe); 3848f000cacSChristoph Hellwig r->send_sge.lkey = ndev->pd->local_dma_lkey; 3858f000cacSChristoph Hellwig 3868f000cacSChristoph Hellwig r->send_cqe.done = nvmet_rdma_send_done; 3878f000cacSChristoph Hellwig 3888f000cacSChristoph Hellwig r->send_wr.wr_cqe = &r->send_cqe; 3898f000cacSChristoph Hellwig r->send_wr.sg_list = &r->send_sge; 3908f000cacSChristoph Hellwig r->send_wr.num_sge = 1; 3918f000cacSChristoph Hellwig r->send_wr.send_flags = IB_SEND_SIGNALED; 3928f000cacSChristoph Hellwig 3938f000cacSChristoph Hellwig /* Data In / RDMA READ */ 3948f000cacSChristoph Hellwig r->read_cqe.done = nvmet_rdma_read_data_done; 3958f000cacSChristoph Hellwig return 0; 3968f000cacSChristoph Hellwig 3978f000cacSChristoph Hellwig out_free_rsp: 398fc6c9730SMax Gurtovoy kfree(r->req.cqe); 3998f000cacSChristoph Hellwig out: 4008f000cacSChristoph Hellwig return -ENOMEM; 4018f000cacSChristoph Hellwig } 4028f000cacSChristoph Hellwig 4038f000cacSChristoph Hellwig static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev, 4048f000cacSChristoph Hellwig struct nvmet_rdma_rsp *r) 4058f000cacSChristoph Hellwig { 4068f000cacSChristoph Hellwig ib_dma_unmap_single(ndev->device, r->send_sge.addr, 407fc6c9730SMax Gurtovoy sizeof(*r->req.cqe), DMA_TO_DEVICE); 408fc6c9730SMax Gurtovoy kfree(r->req.cqe); 4098f000cacSChristoph Hellwig } 4108f000cacSChristoph Hellwig 4118f000cacSChristoph Hellwig static int 4128f000cacSChristoph Hellwig nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue) 4138f000cacSChristoph Hellwig { 4148f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = queue->dev; 4158f000cacSChristoph Hellwig int nr_rsps = queue->recv_queue_size * 2; 4168f000cacSChristoph Hellwig int ret = -EINVAL, i; 4178f000cacSChristoph Hellwig 4188f000cacSChristoph Hellwig queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp), 4198f000cacSChristoph Hellwig GFP_KERNEL); 4208f000cacSChristoph Hellwig if (!queue->rsps) 4218f000cacSChristoph Hellwig goto out; 4228f000cacSChristoph Hellwig 4238f000cacSChristoph Hellwig for (i = 0; i < nr_rsps; i++) { 4248f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 4258f000cacSChristoph Hellwig 4268f000cacSChristoph Hellwig ret = nvmet_rdma_alloc_rsp(ndev, rsp); 4278f000cacSChristoph Hellwig if (ret) 4288f000cacSChristoph Hellwig goto out_free; 4298f000cacSChristoph Hellwig 4308f000cacSChristoph Hellwig list_add_tail(&rsp->free_list, &queue->free_rsps); 4318f000cacSChristoph Hellwig } 4328f000cacSChristoph Hellwig 4338f000cacSChristoph Hellwig return 0; 4348f000cacSChristoph Hellwig 4358f000cacSChristoph Hellwig out_free: 4368f000cacSChristoph Hellwig while (--i >= 0) { 4378f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 4388f000cacSChristoph Hellwig 4398f000cacSChristoph Hellwig list_del(&rsp->free_list); 4408f000cacSChristoph Hellwig nvmet_rdma_free_rsp(ndev, rsp); 4418f000cacSChristoph Hellwig } 4428f000cacSChristoph Hellwig kfree(queue->rsps); 4438f000cacSChristoph Hellwig out: 4448f000cacSChristoph Hellwig return ret; 4458f000cacSChristoph Hellwig } 4468f000cacSChristoph Hellwig 4478f000cacSChristoph Hellwig static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue) 4488f000cacSChristoph Hellwig { 4498f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = queue->dev; 4508f000cacSChristoph Hellwig int i, nr_rsps = queue->recv_queue_size * 2; 4518f000cacSChristoph Hellwig 4528f000cacSChristoph Hellwig for (i = 0; i < nr_rsps; i++) { 4538f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 4548f000cacSChristoph Hellwig 4558f000cacSChristoph Hellwig list_del(&rsp->free_list); 4568f000cacSChristoph Hellwig nvmet_rdma_free_rsp(ndev, rsp); 4578f000cacSChristoph Hellwig } 4588f000cacSChristoph Hellwig kfree(queue->rsps); 4598f000cacSChristoph Hellwig } 4608f000cacSChristoph Hellwig 4618f000cacSChristoph Hellwig static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev, 4628f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmd) 4638f000cacSChristoph Hellwig { 46420209384SMax Gurtovoy int ret; 4658f000cacSChristoph Hellwig 466748ff840SParav Pandit ib_dma_sync_single_for_device(ndev->device, 467748ff840SParav Pandit cmd->sge[0].addr, cmd->sge[0].length, 468748ff840SParav Pandit DMA_FROM_DEVICE); 469748ff840SParav Pandit 4708f000cacSChristoph Hellwig if (ndev->srq) 4710a3173a5SJason Gunthorpe ret = ib_post_srq_recv(ndev->srq, &cmd->wr, NULL); 47220209384SMax Gurtovoy else 47321f90243SIsrael Rukshin ret = ib_post_recv(cmd->queue->qp, &cmd->wr, NULL); 47420209384SMax Gurtovoy 47520209384SMax Gurtovoy if (unlikely(ret)) 47620209384SMax Gurtovoy pr_err("post_recv cmd failed\n"); 47720209384SMax Gurtovoy 47820209384SMax Gurtovoy return ret; 4798f000cacSChristoph Hellwig } 4808f000cacSChristoph Hellwig 4818f000cacSChristoph Hellwig static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue) 4828f000cacSChristoph Hellwig { 4838f000cacSChristoph Hellwig spin_lock(&queue->rsp_wr_wait_lock); 4848f000cacSChristoph Hellwig while (!list_empty(&queue->rsp_wr_wait_list)) { 4858f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp; 4868f000cacSChristoph Hellwig bool ret; 4878f000cacSChristoph Hellwig 4888f000cacSChristoph Hellwig rsp = list_entry(queue->rsp_wr_wait_list.next, 4898f000cacSChristoph Hellwig struct nvmet_rdma_rsp, wait_list); 4908f000cacSChristoph Hellwig list_del(&rsp->wait_list); 4918f000cacSChristoph Hellwig 4928f000cacSChristoph Hellwig spin_unlock(&queue->rsp_wr_wait_lock); 4938f000cacSChristoph Hellwig ret = nvmet_rdma_execute_command(rsp); 4948f000cacSChristoph Hellwig spin_lock(&queue->rsp_wr_wait_lock); 4958f000cacSChristoph Hellwig 4968f000cacSChristoph Hellwig if (!ret) { 4978f000cacSChristoph Hellwig list_add(&rsp->wait_list, &queue->rsp_wr_wait_list); 4988f000cacSChristoph Hellwig break; 4998f000cacSChristoph Hellwig } 5008f000cacSChristoph Hellwig } 5018f000cacSChristoph Hellwig spin_unlock(&queue->rsp_wr_wait_lock); 5028f000cacSChristoph Hellwig } 5038f000cacSChristoph Hellwig 5048f000cacSChristoph Hellwig 5058f000cacSChristoph Hellwig static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp) 5068f000cacSChristoph Hellwig { 5078f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = rsp->queue; 5088f000cacSChristoph Hellwig 5098f000cacSChristoph Hellwig atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail); 5108f000cacSChristoph Hellwig 5118f000cacSChristoph Hellwig if (rsp->n_rdma) { 51221f90243SIsrael Rukshin rdma_rw_ctx_destroy(&rsp->rw, queue->qp, 5138f000cacSChristoph Hellwig queue->cm_id->port_num, rsp->req.sg, 5148f000cacSChristoph Hellwig rsp->req.sg_cnt, nvmet_data_dir(&rsp->req)); 5158f000cacSChristoph Hellwig } 5168f000cacSChristoph Hellwig 5170d5ee2b2SSteve Wise if (rsp->req.sg != rsp->cmd->inline_sg) 5185b2322e4SLogan Gunthorpe nvmet_req_free_sgl(&rsp->req); 5198f000cacSChristoph Hellwig 5208f000cacSChristoph Hellwig if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list))) 5218f000cacSChristoph Hellwig nvmet_rdma_process_wr_wait_list(queue); 5228f000cacSChristoph Hellwig 5238f000cacSChristoph Hellwig nvmet_rdma_put_rsp(rsp); 5248f000cacSChristoph Hellwig } 5258f000cacSChristoph Hellwig 5268f000cacSChristoph Hellwig static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue) 5278f000cacSChristoph Hellwig { 5288f000cacSChristoph Hellwig if (queue->nvme_sq.ctrl) { 5298f000cacSChristoph Hellwig nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl); 5308f000cacSChristoph Hellwig } else { 5318f000cacSChristoph Hellwig /* 5328f000cacSChristoph Hellwig * we didn't setup the controller yet in case 5338f000cacSChristoph Hellwig * of admin connect error, just disconnect and 5348f000cacSChristoph Hellwig * cleanup the queue 5358f000cacSChristoph Hellwig */ 5368f000cacSChristoph Hellwig nvmet_rdma_queue_disconnect(queue); 5378f000cacSChristoph Hellwig } 5388f000cacSChristoph Hellwig } 5398f000cacSChristoph Hellwig 5408f000cacSChristoph Hellwig static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 5418f000cacSChristoph Hellwig { 5428f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = 5438f000cacSChristoph Hellwig container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe); 544d7dcdf9dSIsrael Rukshin struct nvmet_rdma_queue *queue = cq->cq_context; 5458f000cacSChristoph Hellwig 5468f000cacSChristoph Hellwig nvmet_rdma_release_rsp(rsp); 5478f000cacSChristoph Hellwig 5488f000cacSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS && 5498f000cacSChristoph Hellwig wc->status != IB_WC_WR_FLUSH_ERR)) { 5508f000cacSChristoph Hellwig pr_err("SEND for CQE 0x%p failed with status %s (%d).\n", 5518f000cacSChristoph Hellwig wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status); 552d7dcdf9dSIsrael Rukshin nvmet_rdma_error_comp(queue); 5538f000cacSChristoph Hellwig } 5548f000cacSChristoph Hellwig } 5558f000cacSChristoph Hellwig 5568f000cacSChristoph Hellwig static void nvmet_rdma_queue_response(struct nvmet_req *req) 5578f000cacSChristoph Hellwig { 5588f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = 5598f000cacSChristoph Hellwig container_of(req, struct nvmet_rdma_rsp, req); 5608f000cacSChristoph Hellwig struct rdma_cm_id *cm_id = rsp->queue->cm_id; 56123f96d1fSBart Van Assche struct ib_send_wr *first_wr; 5628f000cacSChristoph Hellwig 5638f000cacSChristoph Hellwig if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) { 5648f000cacSChristoph Hellwig rsp->send_wr.opcode = IB_WR_SEND_WITH_INV; 5658f000cacSChristoph Hellwig rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey; 5668f000cacSChristoph Hellwig } else { 5678f000cacSChristoph Hellwig rsp->send_wr.opcode = IB_WR_SEND; 5688f000cacSChristoph Hellwig } 5698f000cacSChristoph Hellwig 5708f000cacSChristoph Hellwig if (nvmet_rdma_need_data_out(rsp)) 5718f000cacSChristoph Hellwig first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp, 5728f000cacSChristoph Hellwig cm_id->port_num, NULL, &rsp->send_wr); 5738f000cacSChristoph Hellwig else 5748f000cacSChristoph Hellwig first_wr = &rsp->send_wr; 5758f000cacSChristoph Hellwig 5768f000cacSChristoph Hellwig nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd); 577748ff840SParav Pandit 578748ff840SParav Pandit ib_dma_sync_single_for_device(rsp->queue->dev->device, 579748ff840SParav Pandit rsp->send_sge.addr, rsp->send_sge.length, 580748ff840SParav Pandit DMA_TO_DEVICE); 581748ff840SParav Pandit 5820a3173a5SJason Gunthorpe if (unlikely(ib_post_send(cm_id->qp, first_wr, NULL))) { 5838f000cacSChristoph Hellwig pr_err("sending cmd response failed\n"); 5848f000cacSChristoph Hellwig nvmet_rdma_release_rsp(rsp); 5858f000cacSChristoph Hellwig } 5868f000cacSChristoph Hellwig } 5878f000cacSChristoph Hellwig 5888f000cacSChristoph Hellwig static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc) 5898f000cacSChristoph Hellwig { 5908f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp = 5918f000cacSChristoph Hellwig container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe); 5928f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = cq->cq_context; 5938f000cacSChristoph Hellwig 5948f000cacSChristoph Hellwig WARN_ON(rsp->n_rdma <= 0); 5958f000cacSChristoph Hellwig atomic_add(rsp->n_rdma, &queue->sq_wr_avail); 59621f90243SIsrael Rukshin rdma_rw_ctx_destroy(&rsp->rw, queue->qp, 5978f000cacSChristoph Hellwig queue->cm_id->port_num, rsp->req.sg, 5988f000cacSChristoph Hellwig rsp->req.sg_cnt, nvmet_data_dir(&rsp->req)); 5998f000cacSChristoph Hellwig rsp->n_rdma = 0; 6008f000cacSChristoph Hellwig 6018f000cacSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS)) { 602549f01aeSVijay Immanuel nvmet_req_uninit(&rsp->req); 6038f000cacSChristoph Hellwig nvmet_rdma_release_rsp(rsp); 6048f000cacSChristoph Hellwig if (wc->status != IB_WC_WR_FLUSH_ERR) { 6058f000cacSChristoph Hellwig pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n", 6068f000cacSChristoph Hellwig wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status); 6078f000cacSChristoph Hellwig nvmet_rdma_error_comp(queue); 6088f000cacSChristoph Hellwig } 6098f000cacSChristoph Hellwig return; 6108f000cacSChristoph Hellwig } 6118f000cacSChristoph Hellwig 612be3f3114SChristoph Hellwig rsp->req.execute(&rsp->req); 6138f000cacSChristoph Hellwig } 6148f000cacSChristoph Hellwig 6158f000cacSChristoph Hellwig static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len, 6168f000cacSChristoph Hellwig u64 off) 6178f000cacSChristoph Hellwig { 6180d5ee2b2SSteve Wise int sg_count = num_pages(len); 6190d5ee2b2SSteve Wise struct scatterlist *sg; 6200d5ee2b2SSteve Wise int i; 6210d5ee2b2SSteve Wise 6220d5ee2b2SSteve Wise sg = rsp->cmd->inline_sg; 6230d5ee2b2SSteve Wise for (i = 0; i < sg_count; i++, sg++) { 6240d5ee2b2SSteve Wise if (i < sg_count - 1) 6250d5ee2b2SSteve Wise sg_unmark_end(sg); 6260d5ee2b2SSteve Wise else 6270d5ee2b2SSteve Wise sg_mark_end(sg); 6280d5ee2b2SSteve Wise sg->offset = off; 6290d5ee2b2SSteve Wise sg->length = min_t(int, len, PAGE_SIZE - off); 6300d5ee2b2SSteve Wise len -= sg->length; 6310d5ee2b2SSteve Wise if (!i) 6320d5ee2b2SSteve Wise off = 0; 6330d5ee2b2SSteve Wise } 6340d5ee2b2SSteve Wise 6350d5ee2b2SSteve Wise rsp->req.sg = rsp->cmd->inline_sg; 6360d5ee2b2SSteve Wise rsp->req.sg_cnt = sg_count; 6378f000cacSChristoph Hellwig } 6388f000cacSChristoph Hellwig 6398f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp) 6408f000cacSChristoph Hellwig { 6418f000cacSChristoph Hellwig struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl; 6428f000cacSChristoph Hellwig u64 off = le64_to_cpu(sgl->addr); 6438f000cacSChristoph Hellwig u32 len = le32_to_cpu(sgl->length); 6448f000cacSChristoph Hellwig 645762a11dfSChaitanya Kulkarni if (!nvme_is_write(rsp->req.cmd)) { 646762a11dfSChaitanya Kulkarni rsp->req.error_loc = 647762a11dfSChaitanya Kulkarni offsetof(struct nvme_common_command, opcode); 6488f000cacSChristoph Hellwig return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 649762a11dfSChaitanya Kulkarni } 6508f000cacSChristoph Hellwig 6510d5ee2b2SSteve Wise if (off + len > rsp->queue->dev->inline_data_size) { 6528f000cacSChristoph Hellwig pr_err("invalid inline data offset!\n"); 6538f000cacSChristoph Hellwig return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR; 6548f000cacSChristoph Hellwig } 6558f000cacSChristoph Hellwig 6568f000cacSChristoph Hellwig /* no data command? */ 6578f000cacSChristoph Hellwig if (!len) 6588f000cacSChristoph Hellwig return 0; 6598f000cacSChristoph Hellwig 6608f000cacSChristoph Hellwig nvmet_rdma_use_inline_sg(rsp, len, off); 6618f000cacSChristoph Hellwig rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA; 6625e62d5c9SChristoph Hellwig rsp->req.transfer_len += len; 6638f000cacSChristoph Hellwig return 0; 6648f000cacSChristoph Hellwig } 6658f000cacSChristoph Hellwig 6668f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp, 6678f000cacSChristoph Hellwig struct nvme_keyed_sgl_desc *sgl, bool invalidate) 6688f000cacSChristoph Hellwig { 6698f000cacSChristoph Hellwig struct rdma_cm_id *cm_id = rsp->queue->cm_id; 6708f000cacSChristoph Hellwig u64 addr = le64_to_cpu(sgl->addr); 6718f000cacSChristoph Hellwig u32 key = get_unaligned_le32(sgl->key); 6728f000cacSChristoph Hellwig int ret; 6738f000cacSChristoph Hellwig 6745b2322e4SLogan Gunthorpe rsp->req.transfer_len = get_unaligned_le24(sgl->length); 6755b2322e4SLogan Gunthorpe 6768f000cacSChristoph Hellwig /* no data command? */ 6775b2322e4SLogan Gunthorpe if (!rsp->req.transfer_len) 6788f000cacSChristoph Hellwig return 0; 6798f000cacSChristoph Hellwig 6805b2322e4SLogan Gunthorpe ret = nvmet_req_alloc_sgl(&rsp->req); 68159534b9dSIsrael Rukshin if (unlikely(ret < 0)) 6825b2322e4SLogan Gunthorpe goto error_out; 6838f000cacSChristoph Hellwig 6848f000cacSChristoph Hellwig ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num, 6858f000cacSChristoph Hellwig rsp->req.sg, rsp->req.sg_cnt, 0, addr, key, 6868f000cacSChristoph Hellwig nvmet_data_dir(&rsp->req)); 68759534b9dSIsrael Rukshin if (unlikely(ret < 0)) 6885b2322e4SLogan Gunthorpe goto error_out; 6898f000cacSChristoph Hellwig rsp->n_rdma += ret; 6908f000cacSChristoph Hellwig 6918f000cacSChristoph Hellwig if (invalidate) { 6928f000cacSChristoph Hellwig rsp->invalidate_rkey = key; 6938f000cacSChristoph Hellwig rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY; 6948f000cacSChristoph Hellwig } 6958f000cacSChristoph Hellwig 6968f000cacSChristoph Hellwig return 0; 6975b2322e4SLogan Gunthorpe 6985b2322e4SLogan Gunthorpe error_out: 6995b2322e4SLogan Gunthorpe rsp->req.transfer_len = 0; 7005b2322e4SLogan Gunthorpe return NVME_SC_INTERNAL; 7018f000cacSChristoph Hellwig } 7028f000cacSChristoph Hellwig 7038f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp) 7048f000cacSChristoph Hellwig { 7058f000cacSChristoph Hellwig struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl; 7068f000cacSChristoph Hellwig 7078f000cacSChristoph Hellwig switch (sgl->type >> 4) { 7088f000cacSChristoph Hellwig case NVME_SGL_FMT_DATA_DESC: 7098f000cacSChristoph Hellwig switch (sgl->type & 0xf) { 7108f000cacSChristoph Hellwig case NVME_SGL_FMT_OFFSET: 7118f000cacSChristoph Hellwig return nvmet_rdma_map_sgl_inline(rsp); 7128f000cacSChristoph Hellwig default: 7138f000cacSChristoph Hellwig pr_err("invalid SGL subtype: %#x\n", sgl->type); 714762a11dfSChaitanya Kulkarni rsp->req.error_loc = 715762a11dfSChaitanya Kulkarni offsetof(struct nvme_common_command, dptr); 7168f000cacSChristoph Hellwig return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 7178f000cacSChristoph Hellwig } 7188f000cacSChristoph Hellwig case NVME_KEY_SGL_FMT_DATA_DESC: 7198f000cacSChristoph Hellwig switch (sgl->type & 0xf) { 7208f000cacSChristoph Hellwig case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE: 7218f000cacSChristoph Hellwig return nvmet_rdma_map_sgl_keyed(rsp, sgl, true); 7228f000cacSChristoph Hellwig case NVME_SGL_FMT_ADDRESS: 7238f000cacSChristoph Hellwig return nvmet_rdma_map_sgl_keyed(rsp, sgl, false); 7248f000cacSChristoph Hellwig default: 7258f000cacSChristoph Hellwig pr_err("invalid SGL subtype: %#x\n", sgl->type); 726762a11dfSChaitanya Kulkarni rsp->req.error_loc = 727762a11dfSChaitanya Kulkarni offsetof(struct nvme_common_command, dptr); 7288f000cacSChristoph Hellwig return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 7298f000cacSChristoph Hellwig } 7308f000cacSChristoph Hellwig default: 7318f000cacSChristoph Hellwig pr_err("invalid SGL type: %#x\n", sgl->type); 732762a11dfSChaitanya Kulkarni rsp->req.error_loc = offsetof(struct nvme_common_command, dptr); 7338f000cacSChristoph Hellwig return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR; 7348f000cacSChristoph Hellwig } 7358f000cacSChristoph Hellwig } 7368f000cacSChristoph Hellwig 7378f000cacSChristoph Hellwig static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp) 7388f000cacSChristoph Hellwig { 7398f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = rsp->queue; 7408f000cacSChristoph Hellwig 7418f000cacSChristoph Hellwig if (unlikely(atomic_sub_return(1 + rsp->n_rdma, 7428f000cacSChristoph Hellwig &queue->sq_wr_avail) < 0)) { 7438f000cacSChristoph Hellwig pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n", 7448f000cacSChristoph Hellwig 1 + rsp->n_rdma, queue->idx, 7458f000cacSChristoph Hellwig queue->nvme_sq.ctrl->cntlid); 7468f000cacSChristoph Hellwig atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail); 7478f000cacSChristoph Hellwig return false; 7488f000cacSChristoph Hellwig } 7498f000cacSChristoph Hellwig 7508f000cacSChristoph Hellwig if (nvmet_rdma_need_data_in(rsp)) { 75121f90243SIsrael Rukshin if (rdma_rw_ctx_post(&rsp->rw, queue->qp, 7528f000cacSChristoph Hellwig queue->cm_id->port_num, &rsp->read_cqe, NULL)) 7538f000cacSChristoph Hellwig nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR); 7548f000cacSChristoph Hellwig } else { 755be3f3114SChristoph Hellwig rsp->req.execute(&rsp->req); 7568f000cacSChristoph Hellwig } 7578f000cacSChristoph Hellwig 7588f000cacSChristoph Hellwig return true; 7598f000cacSChristoph Hellwig } 7608f000cacSChristoph Hellwig 7618f000cacSChristoph Hellwig static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue, 7628f000cacSChristoph Hellwig struct nvmet_rdma_rsp *cmd) 7638f000cacSChristoph Hellwig { 7648f000cacSChristoph Hellwig u16 status; 7658f000cacSChristoph Hellwig 766748ff840SParav Pandit ib_dma_sync_single_for_cpu(queue->dev->device, 767748ff840SParav Pandit cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length, 768748ff840SParav Pandit DMA_FROM_DEVICE); 769748ff840SParav Pandit ib_dma_sync_single_for_cpu(queue->dev->device, 770748ff840SParav Pandit cmd->send_sge.addr, cmd->send_sge.length, 771748ff840SParav Pandit DMA_TO_DEVICE); 772748ff840SParav Pandit 7738f000cacSChristoph Hellwig if (!nvmet_req_init(&cmd->req, &queue->nvme_cq, 7748f000cacSChristoph Hellwig &queue->nvme_sq, &nvmet_rdma_ops)) 7758f000cacSChristoph Hellwig return; 7768f000cacSChristoph Hellwig 7778f000cacSChristoph Hellwig status = nvmet_rdma_map_sgl(cmd); 7788f000cacSChristoph Hellwig if (status) 7798f000cacSChristoph Hellwig goto out_err; 7808f000cacSChristoph Hellwig 7818f000cacSChristoph Hellwig if (unlikely(!nvmet_rdma_execute_command(cmd))) { 7828f000cacSChristoph Hellwig spin_lock(&queue->rsp_wr_wait_lock); 7838f000cacSChristoph Hellwig list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list); 7848f000cacSChristoph Hellwig spin_unlock(&queue->rsp_wr_wait_lock); 7858f000cacSChristoph Hellwig } 7868f000cacSChristoph Hellwig 7878f000cacSChristoph Hellwig return; 7888f000cacSChristoph Hellwig 7898f000cacSChristoph Hellwig out_err: 7908f000cacSChristoph Hellwig nvmet_req_complete(&cmd->req, status); 7918f000cacSChristoph Hellwig } 7928f000cacSChristoph Hellwig 7938f000cacSChristoph Hellwig static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 7948f000cacSChristoph Hellwig { 7958f000cacSChristoph Hellwig struct nvmet_rdma_cmd *cmd = 7968f000cacSChristoph Hellwig container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe); 7978f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = cq->cq_context; 7988f000cacSChristoph Hellwig struct nvmet_rdma_rsp *rsp; 7998f000cacSChristoph Hellwig 8008f000cacSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS)) { 8018f000cacSChristoph Hellwig if (wc->status != IB_WC_WR_FLUSH_ERR) { 8028f000cacSChristoph Hellwig pr_err("RECV for CQE 0x%p failed with status %s (%d)\n", 8038f000cacSChristoph Hellwig wc->wr_cqe, ib_wc_status_msg(wc->status), 8048f000cacSChristoph Hellwig wc->status); 8058f000cacSChristoph Hellwig nvmet_rdma_error_comp(queue); 8068f000cacSChristoph Hellwig } 8078f000cacSChristoph Hellwig return; 8088f000cacSChristoph Hellwig } 8098f000cacSChristoph Hellwig 8108f000cacSChristoph Hellwig if (unlikely(wc->byte_len < sizeof(struct nvme_command))) { 8118f000cacSChristoph Hellwig pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n"); 8128f000cacSChristoph Hellwig nvmet_rdma_error_comp(queue); 8138f000cacSChristoph Hellwig return; 8148f000cacSChristoph Hellwig } 8158f000cacSChristoph Hellwig 8168f000cacSChristoph Hellwig cmd->queue = queue; 8178f000cacSChristoph Hellwig rsp = nvmet_rdma_get_rsp(queue); 8188407879cSSagi Grimberg if (unlikely(!rsp)) { 8198407879cSSagi Grimberg /* 8208407879cSSagi Grimberg * we get here only under memory pressure, 8218407879cSSagi Grimberg * silently drop and have the host retry 8228407879cSSagi Grimberg * as we can't even fail it. 8238407879cSSagi Grimberg */ 8248407879cSSagi Grimberg nvmet_rdma_post_recv(queue->dev, cmd); 8258407879cSSagi Grimberg return; 8268407879cSSagi Grimberg } 8278d61413dSSagi Grimberg rsp->queue = queue; 8288f000cacSChristoph Hellwig rsp->cmd = cmd; 8298f000cacSChristoph Hellwig rsp->flags = 0; 8308f000cacSChristoph Hellwig rsp->req.cmd = cmd->nvme_cmd; 8318d61413dSSagi Grimberg rsp->req.port = queue->port; 8328d61413dSSagi Grimberg rsp->n_rdma = 0; 8338f000cacSChristoph Hellwig 8348f000cacSChristoph Hellwig if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) { 8358f000cacSChristoph Hellwig unsigned long flags; 8368f000cacSChristoph Hellwig 8378f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 8388f000cacSChristoph Hellwig if (queue->state == NVMET_RDMA_Q_CONNECTING) 8398f000cacSChristoph Hellwig list_add_tail(&rsp->wait_list, &queue->rsp_wait_list); 8408f000cacSChristoph Hellwig else 8418f000cacSChristoph Hellwig nvmet_rdma_put_rsp(rsp); 8428f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 8438f000cacSChristoph Hellwig return; 8448f000cacSChristoph Hellwig } 8458f000cacSChristoph Hellwig 8468f000cacSChristoph Hellwig nvmet_rdma_handle_command(queue, rsp); 8478f000cacSChristoph Hellwig } 8488f000cacSChristoph Hellwig 8498f000cacSChristoph Hellwig static void nvmet_rdma_destroy_srq(struct nvmet_rdma_device *ndev) 8508f000cacSChristoph Hellwig { 8518f000cacSChristoph Hellwig if (!ndev->srq) 8528f000cacSChristoph Hellwig return; 8538f000cacSChristoph Hellwig 8548f000cacSChristoph Hellwig nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false); 8558f000cacSChristoph Hellwig ib_destroy_srq(ndev->srq); 8568f000cacSChristoph Hellwig } 8578f000cacSChristoph Hellwig 8588f000cacSChristoph Hellwig static int nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev) 8598f000cacSChristoph Hellwig { 8608f000cacSChristoph Hellwig struct ib_srq_init_attr srq_attr = { NULL, }; 8618f000cacSChristoph Hellwig struct ib_srq *srq; 8628f000cacSChristoph Hellwig size_t srq_size; 8638f000cacSChristoph Hellwig int ret, i; 8648f000cacSChristoph Hellwig 8658f000cacSChristoph Hellwig srq_size = 4095; /* XXX: tune */ 8668f000cacSChristoph Hellwig 8678f000cacSChristoph Hellwig srq_attr.attr.max_wr = srq_size; 8680d5ee2b2SSteve Wise srq_attr.attr.max_sge = 1 + ndev->inline_page_count; 8698f000cacSChristoph Hellwig srq_attr.attr.srq_limit = 0; 8708f000cacSChristoph Hellwig srq_attr.srq_type = IB_SRQT_BASIC; 8718f000cacSChristoph Hellwig srq = ib_create_srq(ndev->pd, &srq_attr); 8728f000cacSChristoph Hellwig if (IS_ERR(srq)) { 8738f000cacSChristoph Hellwig /* 8748f000cacSChristoph Hellwig * If SRQs aren't supported we just go ahead and use normal 8758f000cacSChristoph Hellwig * non-shared receive queues. 8768f000cacSChristoph Hellwig */ 8778f000cacSChristoph Hellwig pr_info("SRQ requested but not supported.\n"); 8788f000cacSChristoph Hellwig return 0; 8798f000cacSChristoph Hellwig } 8808f000cacSChristoph Hellwig 8818f000cacSChristoph Hellwig ndev->srq_cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false); 8828f000cacSChristoph Hellwig if (IS_ERR(ndev->srq_cmds)) { 8838f000cacSChristoph Hellwig ret = PTR_ERR(ndev->srq_cmds); 8848f000cacSChristoph Hellwig goto out_destroy_srq; 8858f000cacSChristoph Hellwig } 8868f000cacSChristoph Hellwig 8878f000cacSChristoph Hellwig ndev->srq = srq; 8888f000cacSChristoph Hellwig ndev->srq_size = srq_size; 8898f000cacSChristoph Hellwig 89020209384SMax Gurtovoy for (i = 0; i < srq_size; i++) { 89120209384SMax Gurtovoy ret = nvmet_rdma_post_recv(ndev, &ndev->srq_cmds[i]); 89220209384SMax Gurtovoy if (ret) 89320209384SMax Gurtovoy goto out_free_cmds; 89420209384SMax Gurtovoy } 8958f000cacSChristoph Hellwig 8968f000cacSChristoph Hellwig return 0; 8978f000cacSChristoph Hellwig 89820209384SMax Gurtovoy out_free_cmds: 89920209384SMax Gurtovoy nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false); 9008f000cacSChristoph Hellwig out_destroy_srq: 9018f000cacSChristoph Hellwig ib_destroy_srq(srq); 9028f000cacSChristoph Hellwig return ret; 9038f000cacSChristoph Hellwig } 9048f000cacSChristoph Hellwig 9058f000cacSChristoph Hellwig static void nvmet_rdma_free_dev(struct kref *ref) 9068f000cacSChristoph Hellwig { 9078f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = 9088f000cacSChristoph Hellwig container_of(ref, struct nvmet_rdma_device, ref); 9098f000cacSChristoph Hellwig 9108f000cacSChristoph Hellwig mutex_lock(&device_list_mutex); 9118f000cacSChristoph Hellwig list_del(&ndev->entry); 9128f000cacSChristoph Hellwig mutex_unlock(&device_list_mutex); 9138f000cacSChristoph Hellwig 9148f000cacSChristoph Hellwig nvmet_rdma_destroy_srq(ndev); 9158f000cacSChristoph Hellwig ib_dealloc_pd(ndev->pd); 9168f000cacSChristoph Hellwig 9178f000cacSChristoph Hellwig kfree(ndev); 9188f000cacSChristoph Hellwig } 9198f000cacSChristoph Hellwig 9208f000cacSChristoph Hellwig static struct nvmet_rdma_device * 9218f000cacSChristoph Hellwig nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id) 9228f000cacSChristoph Hellwig { 923a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = cm_id->context; 924a032e4f6SSagi Grimberg struct nvmet_port *nport = port->nport; 9258f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev; 9260d5ee2b2SSteve Wise int inline_page_count; 9270d5ee2b2SSteve Wise int inline_sge_count; 9288f000cacSChristoph Hellwig int ret; 9298f000cacSChristoph Hellwig 9308f000cacSChristoph Hellwig mutex_lock(&device_list_mutex); 9318f000cacSChristoph Hellwig list_for_each_entry(ndev, &device_list, entry) { 9328f000cacSChristoph Hellwig if (ndev->device->node_guid == cm_id->device->node_guid && 9338f000cacSChristoph Hellwig kref_get_unless_zero(&ndev->ref)) 9348f000cacSChristoph Hellwig goto out_unlock; 9358f000cacSChristoph Hellwig } 9368f000cacSChristoph Hellwig 9378f000cacSChristoph Hellwig ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 9388f000cacSChristoph Hellwig if (!ndev) 9398f000cacSChristoph Hellwig goto out_err; 9408f000cacSChristoph Hellwig 941a032e4f6SSagi Grimberg inline_page_count = num_pages(nport->inline_data_size); 9420d5ee2b2SSteve Wise inline_sge_count = max(cm_id->device->attrs.max_sge_rd, 9430a3173a5SJason Gunthorpe cm_id->device->attrs.max_recv_sge) - 1; 9440d5ee2b2SSteve Wise if (inline_page_count > inline_sge_count) { 9450d5ee2b2SSteve Wise pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n", 946a032e4f6SSagi Grimberg nport->inline_data_size, cm_id->device->name, 9470d5ee2b2SSteve Wise inline_sge_count * PAGE_SIZE); 948a032e4f6SSagi Grimberg nport->inline_data_size = inline_sge_count * PAGE_SIZE; 9490d5ee2b2SSteve Wise inline_page_count = inline_sge_count; 9500d5ee2b2SSteve Wise } 951a032e4f6SSagi Grimberg ndev->inline_data_size = nport->inline_data_size; 9520d5ee2b2SSteve Wise ndev->inline_page_count = inline_page_count; 9538f000cacSChristoph Hellwig ndev->device = cm_id->device; 9548f000cacSChristoph Hellwig kref_init(&ndev->ref); 9558f000cacSChristoph Hellwig 956ed082d36SChristoph Hellwig ndev->pd = ib_alloc_pd(ndev->device, 0); 9578f000cacSChristoph Hellwig if (IS_ERR(ndev->pd)) 9588f000cacSChristoph Hellwig goto out_free_dev; 9598f000cacSChristoph Hellwig 9608f000cacSChristoph Hellwig if (nvmet_rdma_use_srq) { 9618f000cacSChristoph Hellwig ret = nvmet_rdma_init_srq(ndev); 9628f000cacSChristoph Hellwig if (ret) 9638f000cacSChristoph Hellwig goto out_free_pd; 9648f000cacSChristoph Hellwig } 9658f000cacSChristoph Hellwig 9668f000cacSChristoph Hellwig list_add(&ndev->entry, &device_list); 9678f000cacSChristoph Hellwig out_unlock: 9688f000cacSChristoph Hellwig mutex_unlock(&device_list_mutex); 9698f000cacSChristoph Hellwig pr_debug("added %s.\n", ndev->device->name); 9708f000cacSChristoph Hellwig return ndev; 9718f000cacSChristoph Hellwig 9728f000cacSChristoph Hellwig out_free_pd: 9738f000cacSChristoph Hellwig ib_dealloc_pd(ndev->pd); 9748f000cacSChristoph Hellwig out_free_dev: 9758f000cacSChristoph Hellwig kfree(ndev); 9768f000cacSChristoph Hellwig out_err: 9778f000cacSChristoph Hellwig mutex_unlock(&device_list_mutex); 9788f000cacSChristoph Hellwig return NULL; 9798f000cacSChristoph Hellwig } 9808f000cacSChristoph Hellwig 9818f000cacSChristoph Hellwig static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue) 9828f000cacSChristoph Hellwig { 9838f000cacSChristoph Hellwig struct ib_qp_init_attr qp_attr; 9848f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev = queue->dev; 985c363f249SMax Gurtovoy int comp_vector, nr_cqe, ret, i, factor; 9868f000cacSChristoph Hellwig 9878f000cacSChristoph Hellwig /* 9888f000cacSChristoph Hellwig * Spread the io queues across completion vectors, 9898f000cacSChristoph Hellwig * but still keep all admin queues on vector 0. 9908f000cacSChristoph Hellwig */ 9918f000cacSChristoph Hellwig comp_vector = !queue->host_qid ? 0 : 9928f000cacSChristoph Hellwig queue->idx % ndev->device->num_comp_vectors; 9938f000cacSChristoph Hellwig 9948f000cacSChristoph Hellwig /* 9958f000cacSChristoph Hellwig * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND. 9968f000cacSChristoph Hellwig */ 9978f000cacSChristoph Hellwig nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size; 9988f000cacSChristoph Hellwig 9998f000cacSChristoph Hellwig queue->cq = ib_alloc_cq(ndev->device, queue, 10008f000cacSChristoph Hellwig nr_cqe + 1, comp_vector, 10018f000cacSChristoph Hellwig IB_POLL_WORKQUEUE); 10028f000cacSChristoph Hellwig if (IS_ERR(queue->cq)) { 10038f000cacSChristoph Hellwig ret = PTR_ERR(queue->cq); 10048f000cacSChristoph Hellwig pr_err("failed to create CQ cqe= %d ret= %d\n", 10058f000cacSChristoph Hellwig nr_cqe + 1, ret); 10068f000cacSChristoph Hellwig goto out; 10078f000cacSChristoph Hellwig } 10088f000cacSChristoph Hellwig 10098f000cacSChristoph Hellwig memset(&qp_attr, 0, sizeof(qp_attr)); 10108f000cacSChristoph Hellwig qp_attr.qp_context = queue; 10118f000cacSChristoph Hellwig qp_attr.event_handler = nvmet_rdma_qp_event; 10128f000cacSChristoph Hellwig qp_attr.send_cq = queue->cq; 10138f000cacSChristoph Hellwig qp_attr.recv_cq = queue->cq; 10148f000cacSChristoph Hellwig qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 10158f000cacSChristoph Hellwig qp_attr.qp_type = IB_QPT_RC; 10168f000cacSChristoph Hellwig /* +1 for drain */ 10178f000cacSChristoph Hellwig qp_attr.cap.max_send_wr = queue->send_queue_size + 1; 1018c363f249SMax Gurtovoy factor = rdma_rw_mr_factor(ndev->device, queue->cm_id->port_num, 1019c363f249SMax Gurtovoy 1 << NVMET_RDMA_MAX_MDTS); 1020c363f249SMax Gurtovoy qp_attr.cap.max_rdma_ctxs = queue->send_queue_size * factor; 10218f000cacSChristoph Hellwig qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd, 102233023fb8SSteve Wise ndev->device->attrs.max_send_sge); 10238f000cacSChristoph Hellwig 10248f000cacSChristoph Hellwig if (ndev->srq) { 10258f000cacSChristoph Hellwig qp_attr.srq = ndev->srq; 10268f000cacSChristoph Hellwig } else { 10278f000cacSChristoph Hellwig /* +1 for drain */ 10288f000cacSChristoph Hellwig qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size; 10290d5ee2b2SSteve Wise qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count; 10308f000cacSChristoph Hellwig } 10318f000cacSChristoph Hellwig 10328f000cacSChristoph Hellwig ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr); 10338f000cacSChristoph Hellwig if (ret) { 10348f000cacSChristoph Hellwig pr_err("failed to create_qp ret= %d\n", ret); 10358f000cacSChristoph Hellwig goto err_destroy_cq; 10368f000cacSChristoph Hellwig } 103721f90243SIsrael Rukshin queue->qp = queue->cm_id->qp; 10388f000cacSChristoph Hellwig 10398f000cacSChristoph Hellwig atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr); 10408f000cacSChristoph Hellwig 10418f000cacSChristoph Hellwig pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n", 10428f000cacSChristoph Hellwig __func__, queue->cq->cqe, qp_attr.cap.max_send_sge, 10438f000cacSChristoph Hellwig qp_attr.cap.max_send_wr, queue->cm_id); 10448f000cacSChristoph Hellwig 10458f000cacSChristoph Hellwig if (!ndev->srq) { 10468f000cacSChristoph Hellwig for (i = 0; i < queue->recv_queue_size; i++) { 10478f000cacSChristoph Hellwig queue->cmds[i].queue = queue; 104820209384SMax Gurtovoy ret = nvmet_rdma_post_recv(ndev, &queue->cmds[i]); 104920209384SMax Gurtovoy if (ret) 105020209384SMax Gurtovoy goto err_destroy_qp; 10518f000cacSChristoph Hellwig } 10528f000cacSChristoph Hellwig } 10538f000cacSChristoph Hellwig 10548f000cacSChristoph Hellwig out: 10558f000cacSChristoph Hellwig return ret; 10568f000cacSChristoph Hellwig 105720209384SMax Gurtovoy err_destroy_qp: 105820209384SMax Gurtovoy rdma_destroy_qp(queue->cm_id); 10598f000cacSChristoph Hellwig err_destroy_cq: 10608f000cacSChristoph Hellwig ib_free_cq(queue->cq); 10618f000cacSChristoph Hellwig goto out; 10628f000cacSChristoph Hellwig } 10638f000cacSChristoph Hellwig 10648f000cacSChristoph Hellwig static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue) 10658f000cacSChristoph Hellwig { 106621f90243SIsrael Rukshin ib_drain_qp(queue->qp); 106721f90243SIsrael Rukshin if (queue->cm_id) 1068e1a2ee24SIsrael Rukshin rdma_destroy_id(queue->cm_id); 106921f90243SIsrael Rukshin ib_destroy_qp(queue->qp); 10708f000cacSChristoph Hellwig ib_free_cq(queue->cq); 10718f000cacSChristoph Hellwig } 10728f000cacSChristoph Hellwig 10738f000cacSChristoph Hellwig static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue) 10748f000cacSChristoph Hellwig { 1075424125a0SSagi Grimberg pr_debug("freeing queue %d\n", queue->idx); 10768f000cacSChristoph Hellwig 10778f000cacSChristoph Hellwig nvmet_sq_destroy(&queue->nvme_sq); 10788f000cacSChristoph Hellwig 10798f000cacSChristoph Hellwig nvmet_rdma_destroy_queue_ib(queue); 10808f000cacSChristoph Hellwig if (!queue->dev->srq) { 10818f000cacSChristoph Hellwig nvmet_rdma_free_cmds(queue->dev, queue->cmds, 10828f000cacSChristoph Hellwig queue->recv_queue_size, 10838f000cacSChristoph Hellwig !queue->host_qid); 10848f000cacSChristoph Hellwig } 10858f000cacSChristoph Hellwig nvmet_rdma_free_rsps(queue); 10868f000cacSChristoph Hellwig ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx); 10878f000cacSChristoph Hellwig kfree(queue); 10888f000cacSChristoph Hellwig } 10898f000cacSChristoph Hellwig 10908f000cacSChristoph Hellwig static void nvmet_rdma_release_queue_work(struct work_struct *w) 10918f000cacSChristoph Hellwig { 10928f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = 10938f000cacSChristoph Hellwig container_of(w, struct nvmet_rdma_queue, release_work); 10948f000cacSChristoph Hellwig struct nvmet_rdma_device *dev = queue->dev; 10958f000cacSChristoph Hellwig 10968f000cacSChristoph Hellwig nvmet_rdma_free_queue(queue); 1097d8f7750aSSagi Grimberg 10988f000cacSChristoph Hellwig kref_put(&dev->ref, nvmet_rdma_free_dev); 10998f000cacSChristoph Hellwig } 11008f000cacSChristoph Hellwig 11018f000cacSChristoph Hellwig static int 11028f000cacSChristoph Hellwig nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn, 11038f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue) 11048f000cacSChristoph Hellwig { 11058f000cacSChristoph Hellwig struct nvme_rdma_cm_req *req; 11068f000cacSChristoph Hellwig 11078f000cacSChristoph Hellwig req = (struct nvme_rdma_cm_req *)conn->private_data; 11088f000cacSChristoph Hellwig if (!req || conn->private_data_len == 0) 11098f000cacSChristoph Hellwig return NVME_RDMA_CM_INVALID_LEN; 11108f000cacSChristoph Hellwig 11118f000cacSChristoph Hellwig if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0) 11128f000cacSChristoph Hellwig return NVME_RDMA_CM_INVALID_RECFMT; 11138f000cacSChristoph Hellwig 11148f000cacSChristoph Hellwig queue->host_qid = le16_to_cpu(req->qid); 11158f000cacSChristoph Hellwig 11168f000cacSChristoph Hellwig /* 1117b825b44cSJay Freyensee * req->hsqsize corresponds to our recv queue size plus 1 11188f000cacSChristoph Hellwig * req->hrqsize corresponds to our send queue size 11198f000cacSChristoph Hellwig */ 1120b825b44cSJay Freyensee queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1; 11218f000cacSChristoph Hellwig queue->send_queue_size = le16_to_cpu(req->hrqsize); 11228f000cacSChristoph Hellwig 11237aa1f427SSagi Grimberg if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH) 11248f000cacSChristoph Hellwig return NVME_RDMA_CM_INVALID_HSQSIZE; 11258f000cacSChristoph Hellwig 11268f000cacSChristoph Hellwig /* XXX: Should we enforce some kind of max for IO queues? */ 11278f000cacSChristoph Hellwig 11288f000cacSChristoph Hellwig return 0; 11298f000cacSChristoph Hellwig } 11308f000cacSChristoph Hellwig 11318f000cacSChristoph Hellwig static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id, 11328f000cacSChristoph Hellwig enum nvme_rdma_cm_status status) 11338f000cacSChristoph Hellwig { 11348f000cacSChristoph Hellwig struct nvme_rdma_cm_rej rej; 11358f000cacSChristoph Hellwig 11367a01a6eaSMax Gurtovoy pr_debug("rejecting connect request: status %d (%s)\n", 11377a01a6eaSMax Gurtovoy status, nvme_rdma_cm_msg(status)); 11387a01a6eaSMax Gurtovoy 11398f000cacSChristoph Hellwig rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 11408f000cacSChristoph Hellwig rej.sts = cpu_to_le16(status); 11418f000cacSChristoph Hellwig 1142*8094ba0aSLeon Romanovsky return rdma_reject(cm_id, (void *)&rej, sizeof(rej), 1143*8094ba0aSLeon Romanovsky IB_CM_REJ_CONSUMER_DEFINED); 11448f000cacSChristoph Hellwig } 11458f000cacSChristoph Hellwig 11468f000cacSChristoph Hellwig static struct nvmet_rdma_queue * 11478f000cacSChristoph Hellwig nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev, 11488f000cacSChristoph Hellwig struct rdma_cm_id *cm_id, 11498f000cacSChristoph Hellwig struct rdma_cm_event *event) 11508f000cacSChristoph Hellwig { 11518f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 11528f000cacSChristoph Hellwig int ret; 11538f000cacSChristoph Hellwig 11548f000cacSChristoph Hellwig queue = kzalloc(sizeof(*queue), GFP_KERNEL); 11558f000cacSChristoph Hellwig if (!queue) { 11568f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 11578f000cacSChristoph Hellwig goto out_reject; 11588f000cacSChristoph Hellwig } 11598f000cacSChristoph Hellwig 11608f000cacSChristoph Hellwig ret = nvmet_sq_init(&queue->nvme_sq); 116170d4281cSBart Van Assche if (ret) { 116270d4281cSBart Van Assche ret = NVME_RDMA_CM_NO_RSC; 11638f000cacSChristoph Hellwig goto out_free_queue; 116470d4281cSBart Van Assche } 11658f000cacSChristoph Hellwig 11668f000cacSChristoph Hellwig ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue); 11678f000cacSChristoph Hellwig if (ret) 11688f000cacSChristoph Hellwig goto out_destroy_sq; 11698f000cacSChristoph Hellwig 11708f000cacSChristoph Hellwig /* 11718f000cacSChristoph Hellwig * Schedules the actual release because calling rdma_destroy_id from 11728f000cacSChristoph Hellwig * inside a CM callback would trigger a deadlock. (great API design..) 11738f000cacSChristoph Hellwig */ 11748f000cacSChristoph Hellwig INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work); 11758f000cacSChristoph Hellwig queue->dev = ndev; 11768f000cacSChristoph Hellwig queue->cm_id = cm_id; 11778f000cacSChristoph Hellwig 11788f000cacSChristoph Hellwig spin_lock_init(&queue->state_lock); 11798f000cacSChristoph Hellwig queue->state = NVMET_RDMA_Q_CONNECTING; 11808f000cacSChristoph Hellwig INIT_LIST_HEAD(&queue->rsp_wait_list); 11818f000cacSChristoph Hellwig INIT_LIST_HEAD(&queue->rsp_wr_wait_list); 11828f000cacSChristoph Hellwig spin_lock_init(&queue->rsp_wr_wait_lock); 11838f000cacSChristoph Hellwig INIT_LIST_HEAD(&queue->free_rsps); 11848f000cacSChristoph Hellwig spin_lock_init(&queue->rsps_lock); 1185766dbb17SSagi Grimberg INIT_LIST_HEAD(&queue->queue_list); 11868f000cacSChristoph Hellwig 11878f000cacSChristoph Hellwig queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL); 11888f000cacSChristoph Hellwig if (queue->idx < 0) { 11898f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 11906ccaeb56SChristophe JAILLET goto out_destroy_sq; 11918f000cacSChristoph Hellwig } 11928f000cacSChristoph Hellwig 11938f000cacSChristoph Hellwig ret = nvmet_rdma_alloc_rsps(queue); 11948f000cacSChristoph Hellwig if (ret) { 11958f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 11968f000cacSChristoph Hellwig goto out_ida_remove; 11978f000cacSChristoph Hellwig } 11988f000cacSChristoph Hellwig 11998f000cacSChristoph Hellwig if (!ndev->srq) { 12008f000cacSChristoph Hellwig queue->cmds = nvmet_rdma_alloc_cmds(ndev, 12018f000cacSChristoph Hellwig queue->recv_queue_size, 12028f000cacSChristoph Hellwig !queue->host_qid); 12038f000cacSChristoph Hellwig if (IS_ERR(queue->cmds)) { 12048f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 12058f000cacSChristoph Hellwig goto out_free_responses; 12068f000cacSChristoph Hellwig } 12078f000cacSChristoph Hellwig } 12088f000cacSChristoph Hellwig 12098f000cacSChristoph Hellwig ret = nvmet_rdma_create_queue_ib(queue); 12108f000cacSChristoph Hellwig if (ret) { 12118f000cacSChristoph Hellwig pr_err("%s: creating RDMA queue failed (%d).\n", 12128f000cacSChristoph Hellwig __func__, ret); 12138f000cacSChristoph Hellwig ret = NVME_RDMA_CM_NO_RSC; 12148f000cacSChristoph Hellwig goto out_free_cmds; 12158f000cacSChristoph Hellwig } 12168f000cacSChristoph Hellwig 12178f000cacSChristoph Hellwig return queue; 12188f000cacSChristoph Hellwig 12198f000cacSChristoph Hellwig out_free_cmds: 12208f000cacSChristoph Hellwig if (!ndev->srq) { 12218f000cacSChristoph Hellwig nvmet_rdma_free_cmds(queue->dev, queue->cmds, 12228f000cacSChristoph Hellwig queue->recv_queue_size, 12238f000cacSChristoph Hellwig !queue->host_qid); 12248f000cacSChristoph Hellwig } 12258f000cacSChristoph Hellwig out_free_responses: 12268f000cacSChristoph Hellwig nvmet_rdma_free_rsps(queue); 12278f000cacSChristoph Hellwig out_ida_remove: 12288f000cacSChristoph Hellwig ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx); 12298f000cacSChristoph Hellwig out_destroy_sq: 12308f000cacSChristoph Hellwig nvmet_sq_destroy(&queue->nvme_sq); 12318f000cacSChristoph Hellwig out_free_queue: 12328f000cacSChristoph Hellwig kfree(queue); 12338f000cacSChristoph Hellwig out_reject: 12348f000cacSChristoph Hellwig nvmet_rdma_cm_reject(cm_id, ret); 12358f000cacSChristoph Hellwig return NULL; 12368f000cacSChristoph Hellwig } 12378f000cacSChristoph Hellwig 12388f000cacSChristoph Hellwig static void nvmet_rdma_qp_event(struct ib_event *event, void *priv) 12398f000cacSChristoph Hellwig { 12408f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = priv; 12418f000cacSChristoph Hellwig 12428f000cacSChristoph Hellwig switch (event->event) { 12438f000cacSChristoph Hellwig case IB_EVENT_COMM_EST: 12448f000cacSChristoph Hellwig rdma_notify(queue->cm_id, event->event); 12458f000cacSChristoph Hellwig break; 12468f000cacSChristoph Hellwig default: 1247675796beSMax Gurtovoy pr_err("received IB QP event: %s (%d)\n", 1248675796beSMax Gurtovoy ib_event_msg(event->event), event->event); 12498f000cacSChristoph Hellwig break; 12508f000cacSChristoph Hellwig } 12518f000cacSChristoph Hellwig } 12528f000cacSChristoph Hellwig 12538f000cacSChristoph Hellwig static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id, 12548f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue, 12558f000cacSChristoph Hellwig struct rdma_conn_param *p) 12568f000cacSChristoph Hellwig { 12578f000cacSChristoph Hellwig struct rdma_conn_param param = { }; 12588f000cacSChristoph Hellwig struct nvme_rdma_cm_rep priv = { }; 12598f000cacSChristoph Hellwig int ret = -ENOMEM; 12608f000cacSChristoph Hellwig 12618f000cacSChristoph Hellwig param.rnr_retry_count = 7; 12628f000cacSChristoph Hellwig param.flow_control = 1; 12638f000cacSChristoph Hellwig param.initiator_depth = min_t(u8, p->initiator_depth, 12648f000cacSChristoph Hellwig queue->dev->device->attrs.max_qp_init_rd_atom); 12658f000cacSChristoph Hellwig param.private_data = &priv; 12668f000cacSChristoph Hellwig param.private_data_len = sizeof(priv); 12678f000cacSChristoph Hellwig priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 12688f000cacSChristoph Hellwig priv.crqsize = cpu_to_le16(queue->recv_queue_size); 12698f000cacSChristoph Hellwig 12708f000cacSChristoph Hellwig ret = rdma_accept(cm_id, ¶m); 12718f000cacSChristoph Hellwig if (ret) 12728f000cacSChristoph Hellwig pr_err("rdma_accept failed (error code = %d)\n", ret); 12738f000cacSChristoph Hellwig 12748f000cacSChristoph Hellwig return ret; 12758f000cacSChristoph Hellwig } 12768f000cacSChristoph Hellwig 12778f000cacSChristoph Hellwig static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id, 12788f000cacSChristoph Hellwig struct rdma_cm_event *event) 12798f000cacSChristoph Hellwig { 1280a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = cm_id->context; 12818f000cacSChristoph Hellwig struct nvmet_rdma_device *ndev; 12828f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 12838f000cacSChristoph Hellwig int ret = -EINVAL; 12848f000cacSChristoph Hellwig 12858f000cacSChristoph Hellwig ndev = nvmet_rdma_find_get_device(cm_id); 12868f000cacSChristoph Hellwig if (!ndev) { 12878f000cacSChristoph Hellwig nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC); 12888f000cacSChristoph Hellwig return -ECONNREFUSED; 12898f000cacSChristoph Hellwig } 12908f000cacSChristoph Hellwig 12918f000cacSChristoph Hellwig queue = nvmet_rdma_alloc_queue(ndev, cm_id, event); 12928f000cacSChristoph Hellwig if (!queue) { 12938f000cacSChristoph Hellwig ret = -ENOMEM; 12948f000cacSChristoph Hellwig goto put_device; 12958f000cacSChristoph Hellwig } 1296a032e4f6SSagi Grimberg queue->port = port->nport; 12978f000cacSChristoph Hellwig 1298777dc823SSagi Grimberg if (queue->host_qid == 0) { 1299777dc823SSagi Grimberg /* Let inflight controller teardown complete */ 1300d39aa497SChristoph Hellwig flush_scheduled_work(); 1301777dc823SSagi Grimberg } 1302777dc823SSagi Grimberg 13038f000cacSChristoph Hellwig ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn); 1304e1a2ee24SIsrael Rukshin if (ret) { 130521f90243SIsrael Rukshin /* 130621f90243SIsrael Rukshin * Don't destroy the cm_id in free path, as we implicitly 130721f90243SIsrael Rukshin * destroy the cm_id here with non-zero ret code. 130821f90243SIsrael Rukshin */ 130921f90243SIsrael Rukshin queue->cm_id = NULL; 131021f90243SIsrael Rukshin goto free_queue; 1311e1a2ee24SIsrael Rukshin } 13128f000cacSChristoph Hellwig 13138f000cacSChristoph Hellwig mutex_lock(&nvmet_rdma_queue_mutex); 13148f000cacSChristoph Hellwig list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list); 13158f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 13168f000cacSChristoph Hellwig 13178f000cacSChristoph Hellwig return 0; 13188f000cacSChristoph Hellwig 131921f90243SIsrael Rukshin free_queue: 132021f90243SIsrael Rukshin nvmet_rdma_free_queue(queue); 13218f000cacSChristoph Hellwig put_device: 13228f000cacSChristoph Hellwig kref_put(&ndev->ref, nvmet_rdma_free_dev); 13238f000cacSChristoph Hellwig 13248f000cacSChristoph Hellwig return ret; 13258f000cacSChristoph Hellwig } 13268f000cacSChristoph Hellwig 13278f000cacSChristoph Hellwig static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue) 13288f000cacSChristoph Hellwig { 13298f000cacSChristoph Hellwig unsigned long flags; 13308f000cacSChristoph Hellwig 13318f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 13328f000cacSChristoph Hellwig if (queue->state != NVMET_RDMA_Q_CONNECTING) { 13338f000cacSChristoph Hellwig pr_warn("trying to establish a connected queue\n"); 13348f000cacSChristoph Hellwig goto out_unlock; 13358f000cacSChristoph Hellwig } 13368f000cacSChristoph Hellwig queue->state = NVMET_RDMA_Q_LIVE; 13378f000cacSChristoph Hellwig 13388f000cacSChristoph Hellwig while (!list_empty(&queue->rsp_wait_list)) { 13398f000cacSChristoph Hellwig struct nvmet_rdma_rsp *cmd; 13408f000cacSChristoph Hellwig 13418f000cacSChristoph Hellwig cmd = list_first_entry(&queue->rsp_wait_list, 13428f000cacSChristoph Hellwig struct nvmet_rdma_rsp, wait_list); 13438f000cacSChristoph Hellwig list_del(&cmd->wait_list); 13448f000cacSChristoph Hellwig 13458f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 13468f000cacSChristoph Hellwig nvmet_rdma_handle_command(queue, cmd); 13478f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 13488f000cacSChristoph Hellwig } 13498f000cacSChristoph Hellwig 13508f000cacSChristoph Hellwig out_unlock: 13518f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 13528f000cacSChristoph Hellwig } 13538f000cacSChristoph Hellwig 13548f000cacSChristoph Hellwig static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) 13558f000cacSChristoph Hellwig { 13568f000cacSChristoph Hellwig bool disconnect = false; 13578f000cacSChristoph Hellwig unsigned long flags; 13588f000cacSChristoph Hellwig 13598f000cacSChristoph Hellwig pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state); 13608f000cacSChristoph Hellwig 13618f000cacSChristoph Hellwig spin_lock_irqsave(&queue->state_lock, flags); 13628f000cacSChristoph Hellwig switch (queue->state) { 13638f000cacSChristoph Hellwig case NVMET_RDMA_Q_CONNECTING: 13648f000cacSChristoph Hellwig case NVMET_RDMA_Q_LIVE: 13658f000cacSChristoph Hellwig queue->state = NVMET_RDMA_Q_DISCONNECTING; 1366d8f7750aSSagi Grimberg disconnect = true; 13678f000cacSChristoph Hellwig break; 13688f000cacSChristoph Hellwig case NVMET_RDMA_Q_DISCONNECTING: 13698f000cacSChristoph Hellwig break; 13708f000cacSChristoph Hellwig } 13718f000cacSChristoph Hellwig spin_unlock_irqrestore(&queue->state_lock, flags); 13728f000cacSChristoph Hellwig 13738f000cacSChristoph Hellwig if (disconnect) { 13748f000cacSChristoph Hellwig rdma_disconnect(queue->cm_id); 1375d39aa497SChristoph Hellwig schedule_work(&queue->release_work); 13768f000cacSChristoph Hellwig } 13778f000cacSChristoph Hellwig } 13788f000cacSChristoph Hellwig 13798f000cacSChristoph Hellwig static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) 13808f000cacSChristoph Hellwig { 13818f000cacSChristoph Hellwig bool disconnect = false; 13828f000cacSChristoph Hellwig 13838f000cacSChristoph Hellwig mutex_lock(&nvmet_rdma_queue_mutex); 13848f000cacSChristoph Hellwig if (!list_empty(&queue->queue_list)) { 13858f000cacSChristoph Hellwig list_del_init(&queue->queue_list); 13868f000cacSChristoph Hellwig disconnect = true; 13878f000cacSChristoph Hellwig } 13888f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 13898f000cacSChristoph Hellwig 13908f000cacSChristoph Hellwig if (disconnect) 13918f000cacSChristoph Hellwig __nvmet_rdma_queue_disconnect(queue); 13928f000cacSChristoph Hellwig } 13938f000cacSChristoph Hellwig 13948f000cacSChristoph Hellwig static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id, 13958f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue) 13968f000cacSChristoph Hellwig { 13978f000cacSChristoph Hellwig WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING); 13988f000cacSChristoph Hellwig 1399766dbb17SSagi Grimberg mutex_lock(&nvmet_rdma_queue_mutex); 1400766dbb17SSagi Grimberg if (!list_empty(&queue->queue_list)) 1401766dbb17SSagi Grimberg list_del_init(&queue->queue_list); 1402766dbb17SSagi Grimberg mutex_unlock(&nvmet_rdma_queue_mutex); 1403766dbb17SSagi Grimberg 1404766dbb17SSagi Grimberg pr_err("failed to connect queue %d\n", queue->idx); 1405d39aa497SChristoph Hellwig schedule_work(&queue->release_work); 14068f000cacSChristoph Hellwig } 14078f000cacSChristoph Hellwig 1408d8f7750aSSagi Grimberg /** 1409d8f7750aSSagi Grimberg * nvme_rdma_device_removal() - Handle RDMA device removal 1410f1d4ef7dSSagi Grimberg * @cm_id: rdma_cm id, used for nvmet port 1411d8f7750aSSagi Grimberg * @queue: nvmet rdma queue (cm id qp_context) 1412d8f7750aSSagi Grimberg * 1413d8f7750aSSagi Grimberg * DEVICE_REMOVAL event notifies us that the RDMA device is about 1414f1d4ef7dSSagi Grimberg * to unplug. Note that this event can be generated on a normal 1415f1d4ef7dSSagi Grimberg * queue cm_id and/or a device bound listener cm_id (where in this 1416f1d4ef7dSSagi Grimberg * case queue will be null). 1417d8f7750aSSagi Grimberg * 1418f1d4ef7dSSagi Grimberg * We registered an ib_client to handle device removal for queues, 1419f1d4ef7dSSagi Grimberg * so we only need to handle the listening port cm_ids. In this case 1420d8f7750aSSagi Grimberg * we nullify the priv to prevent double cm_id destruction and destroying 1421d8f7750aSSagi Grimberg * the cm_id implicitely by returning a non-zero rc to the callout. 1422d8f7750aSSagi Grimberg */ 1423d8f7750aSSagi Grimberg static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id, 1424d8f7750aSSagi Grimberg struct nvmet_rdma_queue *queue) 1425d8f7750aSSagi Grimberg { 1426a032e4f6SSagi Grimberg struct nvmet_rdma_port *port; 1427d8f7750aSSagi Grimberg 1428f1d4ef7dSSagi Grimberg if (queue) { 1429f1d4ef7dSSagi Grimberg /* 1430f1d4ef7dSSagi Grimberg * This is a queue cm_id. we have registered 1431f1d4ef7dSSagi Grimberg * an ib_client to handle queues removal 1432f1d4ef7dSSagi Grimberg * so don't interfear and just return. 1433f1d4ef7dSSagi Grimberg */ 1434f1d4ef7dSSagi Grimberg return 0; 1435f1d4ef7dSSagi Grimberg } 1436f1d4ef7dSSagi Grimberg 1437f1d4ef7dSSagi Grimberg port = cm_id->context; 1438d8f7750aSSagi Grimberg 1439d8f7750aSSagi Grimberg /* 1440d8f7750aSSagi Grimberg * This is a listener cm_id. Make sure that 1441d8f7750aSSagi Grimberg * future remove_port won't invoke a double 1442d8f7750aSSagi Grimberg * cm_id destroy. use atomic xchg to make sure 1443d8f7750aSSagi Grimberg * we don't compete with remove_port. 1444d8f7750aSSagi Grimberg */ 1445a032e4f6SSagi Grimberg if (xchg(&port->cm_id, NULL) != cm_id) 1446d8f7750aSSagi Grimberg return 0; 1447d8f7750aSSagi Grimberg 1448d8f7750aSSagi Grimberg /* 1449d8f7750aSSagi Grimberg * We need to return 1 so that the core will destroy 1450d8f7750aSSagi Grimberg * it's own ID. What a great API design.. 1451d8f7750aSSagi Grimberg */ 1452d8f7750aSSagi Grimberg return 1; 1453d8f7750aSSagi Grimberg } 1454d8f7750aSSagi Grimberg 14558f000cacSChristoph Hellwig static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id, 14568f000cacSChristoph Hellwig struct rdma_cm_event *event) 14578f000cacSChristoph Hellwig { 14588f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue = NULL; 14598f000cacSChristoph Hellwig int ret = 0; 14608f000cacSChristoph Hellwig 14618f000cacSChristoph Hellwig if (cm_id->qp) 14628f000cacSChristoph Hellwig queue = cm_id->qp->qp_context; 14638f000cacSChristoph Hellwig 14648f000cacSChristoph Hellwig pr_debug("%s (%d): status %d id %p\n", 14658f000cacSChristoph Hellwig rdma_event_msg(event->event), event->event, 14668f000cacSChristoph Hellwig event->status, cm_id); 14678f000cacSChristoph Hellwig 14688f000cacSChristoph Hellwig switch (event->event) { 14698f000cacSChristoph Hellwig case RDMA_CM_EVENT_CONNECT_REQUEST: 14708f000cacSChristoph Hellwig ret = nvmet_rdma_queue_connect(cm_id, event); 14718f000cacSChristoph Hellwig break; 14728f000cacSChristoph Hellwig case RDMA_CM_EVENT_ESTABLISHED: 14738f000cacSChristoph Hellwig nvmet_rdma_queue_established(queue); 14748f000cacSChristoph Hellwig break; 14758f000cacSChristoph Hellwig case RDMA_CM_EVENT_ADDR_CHANGE: 1476a032e4f6SSagi Grimberg if (!queue) { 1477a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = cm_id->context; 1478a032e4f6SSagi Grimberg 1479a032e4f6SSagi Grimberg schedule_delayed_work(&port->repair_work, 0); 1480a032e4f6SSagi Grimberg break; 1481a032e4f6SSagi Grimberg } 1482a032e4f6SSagi Grimberg /* FALLTHROUGH */ 14838f000cacSChristoph Hellwig case RDMA_CM_EVENT_DISCONNECTED: 14848f000cacSChristoph Hellwig case RDMA_CM_EVENT_TIMEWAIT_EXIT: 14858f000cacSChristoph Hellwig nvmet_rdma_queue_disconnect(queue); 1486d8f7750aSSagi Grimberg break; 1487d8f7750aSSagi Grimberg case RDMA_CM_EVENT_DEVICE_REMOVAL: 1488d8f7750aSSagi Grimberg ret = nvmet_rdma_device_removal(cm_id, queue); 14898f000cacSChristoph Hellwig break; 14908f000cacSChristoph Hellwig case RDMA_CM_EVENT_REJECTED: 1491512fb1b3SSteve Wise pr_debug("Connection rejected: %s\n", 1492512fb1b3SSteve Wise rdma_reject_msg(cm_id, event->status)); 1493512fb1b3SSteve Wise /* FALLTHROUGH */ 14948f000cacSChristoph Hellwig case RDMA_CM_EVENT_UNREACHABLE: 14958f000cacSChristoph Hellwig case RDMA_CM_EVENT_CONNECT_ERROR: 14968f000cacSChristoph Hellwig nvmet_rdma_queue_connect_fail(cm_id, queue); 14978f000cacSChristoph Hellwig break; 14988f000cacSChristoph Hellwig default: 14998f000cacSChristoph Hellwig pr_err("received unrecognized RDMA CM event %d\n", 15008f000cacSChristoph Hellwig event->event); 15018f000cacSChristoph Hellwig break; 15028f000cacSChristoph Hellwig } 15038f000cacSChristoph Hellwig 15048f000cacSChristoph Hellwig return ret; 15058f000cacSChristoph Hellwig } 15068f000cacSChristoph Hellwig 15078f000cacSChristoph Hellwig static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl) 15088f000cacSChristoph Hellwig { 15098f000cacSChristoph Hellwig struct nvmet_rdma_queue *queue; 15108f000cacSChristoph Hellwig 15118f000cacSChristoph Hellwig restart: 15128f000cacSChristoph Hellwig mutex_lock(&nvmet_rdma_queue_mutex); 15138f000cacSChristoph Hellwig list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) { 15148f000cacSChristoph Hellwig if (queue->nvme_sq.ctrl == ctrl) { 15158f000cacSChristoph Hellwig list_del_init(&queue->queue_list); 15168f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 15178f000cacSChristoph Hellwig 15188f000cacSChristoph Hellwig __nvmet_rdma_queue_disconnect(queue); 15198f000cacSChristoph Hellwig goto restart; 15208f000cacSChristoph Hellwig } 15218f000cacSChristoph Hellwig } 15228f000cacSChristoph Hellwig mutex_unlock(&nvmet_rdma_queue_mutex); 15238f000cacSChristoph Hellwig } 15248f000cacSChristoph Hellwig 1525a032e4f6SSagi Grimberg static void nvmet_rdma_disable_port(struct nvmet_rdma_port *port) 15268f000cacSChristoph Hellwig { 1527a032e4f6SSagi Grimberg struct rdma_cm_id *cm_id = xchg(&port->cm_id, NULL); 1528a032e4f6SSagi Grimberg 1529a032e4f6SSagi Grimberg if (cm_id) 1530a032e4f6SSagi Grimberg rdma_destroy_id(cm_id); 1531a032e4f6SSagi Grimberg } 1532a032e4f6SSagi Grimberg 1533a032e4f6SSagi Grimberg static int nvmet_rdma_enable_port(struct nvmet_rdma_port *port) 1534a032e4f6SSagi Grimberg { 1535a032e4f6SSagi Grimberg struct sockaddr *addr = (struct sockaddr *)&port->addr; 15368f000cacSChristoph Hellwig struct rdma_cm_id *cm_id; 15378f000cacSChristoph Hellwig int ret; 15388f000cacSChristoph Hellwig 15398f000cacSChristoph Hellwig cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port, 15408f000cacSChristoph Hellwig RDMA_PS_TCP, IB_QPT_RC); 15418f000cacSChristoph Hellwig if (IS_ERR(cm_id)) { 15428f000cacSChristoph Hellwig pr_err("CM ID creation failed\n"); 15438f000cacSChristoph Hellwig return PTR_ERR(cm_id); 15448f000cacSChristoph Hellwig } 15458f000cacSChristoph Hellwig 1546670c2a3aSSagi Grimberg /* 1547670c2a3aSSagi Grimberg * Allow both IPv4 and IPv6 sockets to bind a single port 1548670c2a3aSSagi Grimberg * at the same time. 1549670c2a3aSSagi Grimberg */ 1550670c2a3aSSagi Grimberg ret = rdma_set_afonly(cm_id, 1); 15518f000cacSChristoph Hellwig if (ret) { 1552670c2a3aSSagi Grimberg pr_err("rdma_set_afonly failed (%d)\n", ret); 1553670c2a3aSSagi Grimberg goto out_destroy_id; 1554670c2a3aSSagi Grimberg } 1555670c2a3aSSagi Grimberg 1556a032e4f6SSagi Grimberg ret = rdma_bind_addr(cm_id, addr); 1557670c2a3aSSagi Grimberg if (ret) { 1558a032e4f6SSagi Grimberg pr_err("binding CM ID to %pISpcs failed (%d)\n", addr, ret); 15598f000cacSChristoph Hellwig goto out_destroy_id; 15608f000cacSChristoph Hellwig } 15618f000cacSChristoph Hellwig 15628f000cacSChristoph Hellwig ret = rdma_listen(cm_id, 128); 15638f000cacSChristoph Hellwig if (ret) { 1564a032e4f6SSagi Grimberg pr_err("listening to %pISpcs failed (%d)\n", addr, ret); 15658f000cacSChristoph Hellwig goto out_destroy_id; 15668f000cacSChristoph Hellwig } 15678f000cacSChristoph Hellwig 1568a032e4f6SSagi Grimberg port->cm_id = cm_id; 15698f000cacSChristoph Hellwig return 0; 15708f000cacSChristoph Hellwig 15718f000cacSChristoph Hellwig out_destroy_id: 15728f000cacSChristoph Hellwig rdma_destroy_id(cm_id); 15738f000cacSChristoph Hellwig return ret; 15748f000cacSChristoph Hellwig } 15758f000cacSChristoph Hellwig 1576a032e4f6SSagi Grimberg static void nvmet_rdma_repair_port_work(struct work_struct *w) 15778f000cacSChristoph Hellwig { 1578a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = container_of(to_delayed_work(w), 1579a032e4f6SSagi Grimberg struct nvmet_rdma_port, repair_work); 1580a032e4f6SSagi Grimberg int ret; 15818f000cacSChristoph Hellwig 1582a032e4f6SSagi Grimberg nvmet_rdma_disable_port(port); 1583a032e4f6SSagi Grimberg ret = nvmet_rdma_enable_port(port); 1584a032e4f6SSagi Grimberg if (ret) 1585a032e4f6SSagi Grimberg schedule_delayed_work(&port->repair_work, 5 * HZ); 1586a032e4f6SSagi Grimberg } 1587a032e4f6SSagi Grimberg 1588a032e4f6SSagi Grimberg static int nvmet_rdma_add_port(struct nvmet_port *nport) 1589a032e4f6SSagi Grimberg { 1590a032e4f6SSagi Grimberg struct nvmet_rdma_port *port; 1591a032e4f6SSagi Grimberg __kernel_sa_family_t af; 1592a032e4f6SSagi Grimberg int ret; 1593a032e4f6SSagi Grimberg 1594a032e4f6SSagi Grimberg port = kzalloc(sizeof(*port), GFP_KERNEL); 1595a032e4f6SSagi Grimberg if (!port) 1596a032e4f6SSagi Grimberg return -ENOMEM; 1597a032e4f6SSagi Grimberg 1598a032e4f6SSagi Grimberg nport->priv = port; 1599a032e4f6SSagi Grimberg port->nport = nport; 1600a032e4f6SSagi Grimberg INIT_DELAYED_WORK(&port->repair_work, nvmet_rdma_repair_port_work); 1601a032e4f6SSagi Grimberg 1602a032e4f6SSagi Grimberg switch (nport->disc_addr.adrfam) { 1603a032e4f6SSagi Grimberg case NVMF_ADDR_FAMILY_IP4: 1604a032e4f6SSagi Grimberg af = AF_INET; 1605a032e4f6SSagi Grimberg break; 1606a032e4f6SSagi Grimberg case NVMF_ADDR_FAMILY_IP6: 1607a032e4f6SSagi Grimberg af = AF_INET6; 1608a032e4f6SSagi Grimberg break; 1609a032e4f6SSagi Grimberg default: 1610a032e4f6SSagi Grimberg pr_err("address family %d not supported\n", 1611a032e4f6SSagi Grimberg nport->disc_addr.adrfam); 1612a032e4f6SSagi Grimberg ret = -EINVAL; 1613a032e4f6SSagi Grimberg goto out_free_port; 1614a032e4f6SSagi Grimberg } 1615a032e4f6SSagi Grimberg 1616a032e4f6SSagi Grimberg if (nport->inline_data_size < 0) { 1617a032e4f6SSagi Grimberg nport->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE; 1618a032e4f6SSagi Grimberg } else if (nport->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) { 1619a032e4f6SSagi Grimberg pr_warn("inline_data_size %u is too large, reducing to %u\n", 1620a032e4f6SSagi Grimberg nport->inline_data_size, 1621a032e4f6SSagi Grimberg NVMET_RDMA_MAX_INLINE_DATA_SIZE); 1622a032e4f6SSagi Grimberg nport->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE; 1623a032e4f6SSagi Grimberg } 1624a032e4f6SSagi Grimberg 1625a032e4f6SSagi Grimberg ret = inet_pton_with_scope(&init_net, af, nport->disc_addr.traddr, 1626a032e4f6SSagi Grimberg nport->disc_addr.trsvcid, &port->addr); 1627a032e4f6SSagi Grimberg if (ret) { 1628a032e4f6SSagi Grimberg pr_err("malformed ip/port passed: %s:%s\n", 1629a032e4f6SSagi Grimberg nport->disc_addr.traddr, nport->disc_addr.trsvcid); 1630a032e4f6SSagi Grimberg goto out_free_port; 1631a032e4f6SSagi Grimberg } 1632a032e4f6SSagi Grimberg 1633a032e4f6SSagi Grimberg ret = nvmet_rdma_enable_port(port); 1634a032e4f6SSagi Grimberg if (ret) 1635a032e4f6SSagi Grimberg goto out_free_port; 1636a032e4f6SSagi Grimberg 1637a032e4f6SSagi Grimberg pr_info("enabling port %d (%pISpcs)\n", 1638a032e4f6SSagi Grimberg le16_to_cpu(nport->disc_addr.portid), 1639a032e4f6SSagi Grimberg (struct sockaddr *)&port->addr); 1640a032e4f6SSagi Grimberg 1641a032e4f6SSagi Grimberg return 0; 1642a032e4f6SSagi Grimberg 1643a032e4f6SSagi Grimberg out_free_port: 1644a032e4f6SSagi Grimberg kfree(port); 1645a032e4f6SSagi Grimberg return ret; 1646a032e4f6SSagi Grimberg } 1647a032e4f6SSagi Grimberg 1648a032e4f6SSagi Grimberg static void nvmet_rdma_remove_port(struct nvmet_port *nport) 1649a032e4f6SSagi Grimberg { 1650a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = nport->priv; 1651a032e4f6SSagi Grimberg 1652a032e4f6SSagi Grimberg cancel_delayed_work_sync(&port->repair_work); 1653a032e4f6SSagi Grimberg nvmet_rdma_disable_port(port); 1654a032e4f6SSagi Grimberg kfree(port); 16558f000cacSChristoph Hellwig } 16568f000cacSChristoph Hellwig 16574c652685SSagi Grimberg static void nvmet_rdma_disc_port_addr(struct nvmet_req *req, 1658a032e4f6SSagi Grimberg struct nvmet_port *nport, char *traddr) 16594c652685SSagi Grimberg { 1660a032e4f6SSagi Grimberg struct nvmet_rdma_port *port = nport->priv; 1661a032e4f6SSagi Grimberg struct rdma_cm_id *cm_id = port->cm_id; 16624c652685SSagi Grimberg 16634c652685SSagi Grimberg if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) { 16644c652685SSagi Grimberg struct nvmet_rdma_rsp *rsp = 16654c652685SSagi Grimberg container_of(req, struct nvmet_rdma_rsp, req); 16664c652685SSagi Grimberg struct rdma_cm_id *req_cm_id = rsp->queue->cm_id; 16674c652685SSagi Grimberg struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr; 16684c652685SSagi Grimberg 16694c652685SSagi Grimberg sprintf(traddr, "%pISc", addr); 16704c652685SSagi Grimberg } else { 1671a032e4f6SSagi Grimberg memcpy(traddr, nport->disc_addr.traddr, NVMF_TRADDR_SIZE); 16724c652685SSagi Grimberg } 16734c652685SSagi Grimberg } 16744c652685SSagi Grimberg 1675ec6d20e1SMax Gurtovoy static u8 nvmet_rdma_get_mdts(const struct nvmet_ctrl *ctrl) 1676ec6d20e1SMax Gurtovoy { 1677ec6d20e1SMax Gurtovoy return NVMET_RDMA_MAX_MDTS; 1678ec6d20e1SMax Gurtovoy } 1679ec6d20e1SMax Gurtovoy 1680e929f06dSChristoph Hellwig static const struct nvmet_fabrics_ops nvmet_rdma_ops = { 16818f000cacSChristoph Hellwig .owner = THIS_MODULE, 16828f000cacSChristoph Hellwig .type = NVMF_TRTYPE_RDMA, 16838f000cacSChristoph Hellwig .msdbd = 1, 16848f000cacSChristoph Hellwig .has_keyed_sgls = 1, 16858f000cacSChristoph Hellwig .add_port = nvmet_rdma_add_port, 16868f000cacSChristoph Hellwig .remove_port = nvmet_rdma_remove_port, 16878f000cacSChristoph Hellwig .queue_response = nvmet_rdma_queue_response, 16888f000cacSChristoph Hellwig .delete_ctrl = nvmet_rdma_delete_ctrl, 16894c652685SSagi Grimberg .disc_traddr = nvmet_rdma_disc_port_addr, 1690ec6d20e1SMax Gurtovoy .get_mdts = nvmet_rdma_get_mdts, 16918f000cacSChristoph Hellwig }; 16928f000cacSChristoph Hellwig 1693f1d4ef7dSSagi Grimberg static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data) 1694f1d4ef7dSSagi Grimberg { 169543b92fd2SIsrael Rukshin struct nvmet_rdma_queue *queue, *tmp; 1696a3dd7d00SMax Gurtovoy struct nvmet_rdma_device *ndev; 1697a3dd7d00SMax Gurtovoy bool found = false; 1698f1d4ef7dSSagi Grimberg 1699a3dd7d00SMax Gurtovoy mutex_lock(&device_list_mutex); 1700a3dd7d00SMax Gurtovoy list_for_each_entry(ndev, &device_list, entry) { 1701a3dd7d00SMax Gurtovoy if (ndev->device == ib_device) { 1702a3dd7d00SMax Gurtovoy found = true; 1703a3dd7d00SMax Gurtovoy break; 1704a3dd7d00SMax Gurtovoy } 1705a3dd7d00SMax Gurtovoy } 1706a3dd7d00SMax Gurtovoy mutex_unlock(&device_list_mutex); 1707a3dd7d00SMax Gurtovoy 1708a3dd7d00SMax Gurtovoy if (!found) 1709a3dd7d00SMax Gurtovoy return; 1710a3dd7d00SMax Gurtovoy 1711a3dd7d00SMax Gurtovoy /* 1712a3dd7d00SMax Gurtovoy * IB Device that is used by nvmet controllers is being removed, 1713a3dd7d00SMax Gurtovoy * delete all queues using this device. 1714a3dd7d00SMax Gurtovoy */ 1715f1d4ef7dSSagi Grimberg mutex_lock(&nvmet_rdma_queue_mutex); 171643b92fd2SIsrael Rukshin list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list, 171743b92fd2SIsrael Rukshin queue_list) { 1718f1d4ef7dSSagi Grimberg if (queue->dev->device != ib_device) 1719f1d4ef7dSSagi Grimberg continue; 1720f1d4ef7dSSagi Grimberg 1721f1d4ef7dSSagi Grimberg pr_info("Removing queue %d\n", queue->idx); 172243b92fd2SIsrael Rukshin list_del_init(&queue->queue_list); 1723f1d4ef7dSSagi Grimberg __nvmet_rdma_queue_disconnect(queue); 1724f1d4ef7dSSagi Grimberg } 1725f1d4ef7dSSagi Grimberg mutex_unlock(&nvmet_rdma_queue_mutex); 1726f1d4ef7dSSagi Grimberg 1727f1d4ef7dSSagi Grimberg flush_scheduled_work(); 1728f1d4ef7dSSagi Grimberg } 1729f1d4ef7dSSagi Grimberg 1730f1d4ef7dSSagi Grimberg static struct ib_client nvmet_rdma_ib_client = { 1731f1d4ef7dSSagi Grimberg .name = "nvmet_rdma", 1732f1d4ef7dSSagi Grimberg .remove = nvmet_rdma_remove_one 1733f1d4ef7dSSagi Grimberg }; 1734f1d4ef7dSSagi Grimberg 17358f000cacSChristoph Hellwig static int __init nvmet_rdma_init(void) 17368f000cacSChristoph Hellwig { 1737f1d4ef7dSSagi Grimberg int ret; 1738f1d4ef7dSSagi Grimberg 1739f1d4ef7dSSagi Grimberg ret = ib_register_client(&nvmet_rdma_ib_client); 1740f1d4ef7dSSagi Grimberg if (ret) 1741f1d4ef7dSSagi Grimberg return ret; 1742f1d4ef7dSSagi Grimberg 1743f1d4ef7dSSagi Grimberg ret = nvmet_register_transport(&nvmet_rdma_ops); 1744f1d4ef7dSSagi Grimberg if (ret) 1745f1d4ef7dSSagi Grimberg goto err_ib_client; 1746f1d4ef7dSSagi Grimberg 1747f1d4ef7dSSagi Grimberg return 0; 1748f1d4ef7dSSagi Grimberg 1749f1d4ef7dSSagi Grimberg err_ib_client: 1750f1d4ef7dSSagi Grimberg ib_unregister_client(&nvmet_rdma_ib_client); 1751f1d4ef7dSSagi Grimberg return ret; 17528f000cacSChristoph Hellwig } 17538f000cacSChristoph Hellwig 17548f000cacSChristoph Hellwig static void __exit nvmet_rdma_exit(void) 17558f000cacSChristoph Hellwig { 17568f000cacSChristoph Hellwig nvmet_unregister_transport(&nvmet_rdma_ops); 1757f1d4ef7dSSagi Grimberg ib_unregister_client(&nvmet_rdma_ib_client); 1758cb4876e8SSagi Grimberg WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list)); 17598f000cacSChristoph Hellwig ida_destroy(&nvmet_rdma_queue_ida); 17608f000cacSChristoph Hellwig } 17618f000cacSChristoph Hellwig 17628f000cacSChristoph Hellwig module_init(nvmet_rdma_init); 17638f000cacSChristoph Hellwig module_exit(nvmet_rdma_exit); 17648f000cacSChristoph Hellwig 17658f000cacSChristoph Hellwig MODULE_LICENSE("GPL v2"); 17668f000cacSChristoph Hellwig MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */ 1767