xref: /openbmc/linux/drivers/nvme/target/rdma.c (revision 0d5ee2b2ab4f6776c361bc975c2323bc8b5cf349)
18f000cacSChristoph Hellwig /*
28f000cacSChristoph Hellwig  * NVMe over Fabrics RDMA target.
38f000cacSChristoph Hellwig  * Copyright (c) 2015-2016 HGST, a Western Digital Company.
48f000cacSChristoph Hellwig  *
58f000cacSChristoph Hellwig  * This program is free software; you can redistribute it and/or modify it
68f000cacSChristoph Hellwig  * under the terms and conditions of the GNU General Public License,
78f000cacSChristoph Hellwig  * version 2, as published by the Free Software Foundation.
88f000cacSChristoph Hellwig  *
98f000cacSChristoph Hellwig  * This program is distributed in the hope it will be useful, but WITHOUT
108f000cacSChristoph Hellwig  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
118f000cacSChristoph Hellwig  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
128f000cacSChristoph Hellwig  * more details.
138f000cacSChristoph Hellwig  */
148f000cacSChristoph Hellwig #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
158f000cacSChristoph Hellwig #include <linux/atomic.h>
168f000cacSChristoph Hellwig #include <linux/ctype.h>
178f000cacSChristoph Hellwig #include <linux/delay.h>
188f000cacSChristoph Hellwig #include <linux/err.h>
198f000cacSChristoph Hellwig #include <linux/init.h>
208f000cacSChristoph Hellwig #include <linux/module.h>
218f000cacSChristoph Hellwig #include <linux/nvme.h>
228f000cacSChristoph Hellwig #include <linux/slab.h>
238f000cacSChristoph Hellwig #include <linux/string.h>
248f000cacSChristoph Hellwig #include <linux/wait.h>
258f000cacSChristoph Hellwig #include <linux/inet.h>
268f000cacSChristoph Hellwig #include <asm/unaligned.h>
278f000cacSChristoph Hellwig 
288f000cacSChristoph Hellwig #include <rdma/ib_verbs.h>
298f000cacSChristoph Hellwig #include <rdma/rdma_cm.h>
308f000cacSChristoph Hellwig #include <rdma/rw.h>
318f000cacSChristoph Hellwig 
328f000cacSChristoph Hellwig #include <linux/nvme-rdma.h>
338f000cacSChristoph Hellwig #include "nvmet.h"
348f000cacSChristoph Hellwig 
358f000cacSChristoph Hellwig /*
36*0d5ee2b2SSteve Wise  * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data
378f000cacSChristoph Hellwig  */
38*0d5ee2b2SSteve Wise #define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE	PAGE_SIZE
39*0d5ee2b2SSteve Wise #define NVMET_RDMA_MAX_INLINE_SGE		4
40*0d5ee2b2SSteve Wise #define NVMET_RDMA_MAX_INLINE_DATA_SIZE		max_t(int, SZ_16K, PAGE_SIZE)
418f000cacSChristoph Hellwig 
428f000cacSChristoph Hellwig struct nvmet_rdma_cmd {
43*0d5ee2b2SSteve Wise 	struct ib_sge		sge[NVMET_RDMA_MAX_INLINE_SGE + 1];
448f000cacSChristoph Hellwig 	struct ib_cqe		cqe;
458f000cacSChristoph Hellwig 	struct ib_recv_wr	wr;
46*0d5ee2b2SSteve Wise 	struct scatterlist	inline_sg[NVMET_RDMA_MAX_INLINE_SGE];
478f000cacSChristoph Hellwig 	struct nvme_command     *nvme_cmd;
488f000cacSChristoph Hellwig 	struct nvmet_rdma_queue	*queue;
498f000cacSChristoph Hellwig };
508f000cacSChristoph Hellwig 
518f000cacSChristoph Hellwig enum {
528f000cacSChristoph Hellwig 	NVMET_RDMA_REQ_INLINE_DATA	= (1 << 0),
538f000cacSChristoph Hellwig 	NVMET_RDMA_REQ_INVALIDATE_RKEY	= (1 << 1),
548f000cacSChristoph Hellwig };
558f000cacSChristoph Hellwig 
568f000cacSChristoph Hellwig struct nvmet_rdma_rsp {
578f000cacSChristoph Hellwig 	struct ib_sge		send_sge;
588f000cacSChristoph Hellwig 	struct ib_cqe		send_cqe;
598f000cacSChristoph Hellwig 	struct ib_send_wr	send_wr;
608f000cacSChristoph Hellwig 
618f000cacSChristoph Hellwig 	struct nvmet_rdma_cmd	*cmd;
628f000cacSChristoph Hellwig 	struct nvmet_rdma_queue	*queue;
638f000cacSChristoph Hellwig 
648f000cacSChristoph Hellwig 	struct ib_cqe		read_cqe;
658f000cacSChristoph Hellwig 	struct rdma_rw_ctx	rw;
668f000cacSChristoph Hellwig 
678f000cacSChristoph Hellwig 	struct nvmet_req	req;
688f000cacSChristoph Hellwig 
698f000cacSChristoph Hellwig 	u8			n_rdma;
708f000cacSChristoph Hellwig 	u32			flags;
718f000cacSChristoph Hellwig 	u32			invalidate_rkey;
728f000cacSChristoph Hellwig 
738f000cacSChristoph Hellwig 	struct list_head	wait_list;
748f000cacSChristoph Hellwig 	struct list_head	free_list;
758f000cacSChristoph Hellwig };
768f000cacSChristoph Hellwig 
778f000cacSChristoph Hellwig enum nvmet_rdma_queue_state {
788f000cacSChristoph Hellwig 	NVMET_RDMA_Q_CONNECTING,
798f000cacSChristoph Hellwig 	NVMET_RDMA_Q_LIVE,
808f000cacSChristoph Hellwig 	NVMET_RDMA_Q_DISCONNECTING,
818f000cacSChristoph Hellwig };
828f000cacSChristoph Hellwig 
838f000cacSChristoph Hellwig struct nvmet_rdma_queue {
848f000cacSChristoph Hellwig 	struct rdma_cm_id	*cm_id;
858f000cacSChristoph Hellwig 	struct nvmet_port	*port;
868f000cacSChristoph Hellwig 	struct ib_cq		*cq;
878f000cacSChristoph Hellwig 	atomic_t		sq_wr_avail;
888f000cacSChristoph Hellwig 	struct nvmet_rdma_device *dev;
898f000cacSChristoph Hellwig 	spinlock_t		state_lock;
908f000cacSChristoph Hellwig 	enum nvmet_rdma_queue_state state;
918f000cacSChristoph Hellwig 	struct nvmet_cq		nvme_cq;
928f000cacSChristoph Hellwig 	struct nvmet_sq		nvme_sq;
938f000cacSChristoph Hellwig 
948f000cacSChristoph Hellwig 	struct nvmet_rdma_rsp	*rsps;
958f000cacSChristoph Hellwig 	struct list_head	free_rsps;
968f000cacSChristoph Hellwig 	spinlock_t		rsps_lock;
978f000cacSChristoph Hellwig 	struct nvmet_rdma_cmd	*cmds;
988f000cacSChristoph Hellwig 
998f000cacSChristoph Hellwig 	struct work_struct	release_work;
1008f000cacSChristoph Hellwig 	struct list_head	rsp_wait_list;
1018f000cacSChristoph Hellwig 	struct list_head	rsp_wr_wait_list;
1028f000cacSChristoph Hellwig 	spinlock_t		rsp_wr_wait_lock;
1038f000cacSChristoph Hellwig 
1048f000cacSChristoph Hellwig 	int			idx;
1058f000cacSChristoph Hellwig 	int			host_qid;
1068f000cacSChristoph Hellwig 	int			recv_queue_size;
1078f000cacSChristoph Hellwig 	int			send_queue_size;
1088f000cacSChristoph Hellwig 
1098f000cacSChristoph Hellwig 	struct list_head	queue_list;
1108f000cacSChristoph Hellwig };
1118f000cacSChristoph Hellwig 
1128f000cacSChristoph Hellwig struct nvmet_rdma_device {
1138f000cacSChristoph Hellwig 	struct ib_device	*device;
1148f000cacSChristoph Hellwig 	struct ib_pd		*pd;
1158f000cacSChristoph Hellwig 	struct ib_srq		*srq;
1168f000cacSChristoph Hellwig 	struct nvmet_rdma_cmd	*srq_cmds;
1178f000cacSChristoph Hellwig 	size_t			srq_size;
1188f000cacSChristoph Hellwig 	struct kref		ref;
1198f000cacSChristoph Hellwig 	struct list_head	entry;
120*0d5ee2b2SSteve Wise 	int			inline_data_size;
121*0d5ee2b2SSteve Wise 	int			inline_page_count;
1228f000cacSChristoph Hellwig };
1238f000cacSChristoph Hellwig 
1248f000cacSChristoph Hellwig static bool nvmet_rdma_use_srq;
1258f000cacSChristoph Hellwig module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444);
1268f000cacSChristoph Hellwig MODULE_PARM_DESC(use_srq, "Use shared receive queue.");
1278f000cacSChristoph Hellwig 
1288f000cacSChristoph Hellwig static DEFINE_IDA(nvmet_rdma_queue_ida);
1298f000cacSChristoph Hellwig static LIST_HEAD(nvmet_rdma_queue_list);
1308f000cacSChristoph Hellwig static DEFINE_MUTEX(nvmet_rdma_queue_mutex);
1318f000cacSChristoph Hellwig 
1328f000cacSChristoph Hellwig static LIST_HEAD(device_list);
1338f000cacSChristoph Hellwig static DEFINE_MUTEX(device_list_mutex);
1348f000cacSChristoph Hellwig 
1358f000cacSChristoph Hellwig static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp);
1368f000cacSChristoph Hellwig static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc);
1378f000cacSChristoph Hellwig static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
1388f000cacSChristoph Hellwig static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc);
1398f000cacSChristoph Hellwig static void nvmet_rdma_qp_event(struct ib_event *event, void *priv);
1408f000cacSChristoph Hellwig static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue);
1418f000cacSChristoph Hellwig 
142e929f06dSChristoph Hellwig static const struct nvmet_fabrics_ops nvmet_rdma_ops;
1438f000cacSChristoph Hellwig 
144*0d5ee2b2SSteve Wise static int num_pages(int len)
145*0d5ee2b2SSteve Wise {
146*0d5ee2b2SSteve Wise 	return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT);
147*0d5ee2b2SSteve Wise }
148*0d5ee2b2SSteve Wise 
1498f000cacSChristoph Hellwig /* XXX: really should move to a generic header sooner or later.. */
1508f000cacSChristoph Hellwig static inline u32 get_unaligned_le24(const u8 *p)
1518f000cacSChristoph Hellwig {
1528f000cacSChristoph Hellwig 	return (u32)p[0] | (u32)p[1] << 8 | (u32)p[2] << 16;
1538f000cacSChristoph Hellwig }
1548f000cacSChristoph Hellwig 
1558f000cacSChristoph Hellwig static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp)
1568f000cacSChristoph Hellwig {
1578f000cacSChristoph Hellwig 	return nvme_is_write(rsp->req.cmd) &&
1585e62d5c9SChristoph Hellwig 		rsp->req.transfer_len &&
1598f000cacSChristoph Hellwig 		!(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
1608f000cacSChristoph Hellwig }
1618f000cacSChristoph Hellwig 
1628f000cacSChristoph Hellwig static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp)
1638f000cacSChristoph Hellwig {
1648f000cacSChristoph Hellwig 	return !nvme_is_write(rsp->req.cmd) &&
1655e62d5c9SChristoph Hellwig 		rsp->req.transfer_len &&
1668f000cacSChristoph Hellwig 		!rsp->req.rsp->status &&
1678f000cacSChristoph Hellwig 		!(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
1688f000cacSChristoph Hellwig }
1698f000cacSChristoph Hellwig 
1708f000cacSChristoph Hellwig static inline struct nvmet_rdma_rsp *
1718f000cacSChristoph Hellwig nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue)
1728f000cacSChristoph Hellwig {
1738f000cacSChristoph Hellwig 	struct nvmet_rdma_rsp *rsp;
1748f000cacSChristoph Hellwig 	unsigned long flags;
1758f000cacSChristoph Hellwig 
1768f000cacSChristoph Hellwig 	spin_lock_irqsave(&queue->rsps_lock, flags);
1778f000cacSChristoph Hellwig 	rsp = list_first_entry(&queue->free_rsps,
1788f000cacSChristoph Hellwig 				struct nvmet_rdma_rsp, free_list);
1798f000cacSChristoph Hellwig 	list_del(&rsp->free_list);
1808f000cacSChristoph Hellwig 	spin_unlock_irqrestore(&queue->rsps_lock, flags);
1818f000cacSChristoph Hellwig 
1828f000cacSChristoph Hellwig 	return rsp;
1838f000cacSChristoph Hellwig }
1848f000cacSChristoph Hellwig 
1858f000cacSChristoph Hellwig static inline void
1868f000cacSChristoph Hellwig nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp)
1878f000cacSChristoph Hellwig {
1888f000cacSChristoph Hellwig 	unsigned long flags;
1898f000cacSChristoph Hellwig 
1908f000cacSChristoph Hellwig 	spin_lock_irqsave(&rsp->queue->rsps_lock, flags);
1918f000cacSChristoph Hellwig 	list_add_tail(&rsp->free_list, &rsp->queue->free_rsps);
1928f000cacSChristoph Hellwig 	spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags);
1938f000cacSChristoph Hellwig }
1948f000cacSChristoph Hellwig 
195*0d5ee2b2SSteve Wise static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev,
196*0d5ee2b2SSteve Wise 				struct nvmet_rdma_cmd *c)
197*0d5ee2b2SSteve Wise {
198*0d5ee2b2SSteve Wise 	struct scatterlist *sg;
199*0d5ee2b2SSteve Wise 	struct ib_sge *sge;
200*0d5ee2b2SSteve Wise 	int i;
201*0d5ee2b2SSteve Wise 
202*0d5ee2b2SSteve Wise 	if (!ndev->inline_data_size)
203*0d5ee2b2SSteve Wise 		return;
204*0d5ee2b2SSteve Wise 
205*0d5ee2b2SSteve Wise 	sg = c->inline_sg;
206*0d5ee2b2SSteve Wise 	sge = &c->sge[1];
207*0d5ee2b2SSteve Wise 
208*0d5ee2b2SSteve Wise 	for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
209*0d5ee2b2SSteve Wise 		if (sge->length)
210*0d5ee2b2SSteve Wise 			ib_dma_unmap_page(ndev->device, sge->addr,
211*0d5ee2b2SSteve Wise 					sge->length, DMA_FROM_DEVICE);
212*0d5ee2b2SSteve Wise 		if (sg_page(sg))
213*0d5ee2b2SSteve Wise 			__free_page(sg_page(sg));
214*0d5ee2b2SSteve Wise 	}
215*0d5ee2b2SSteve Wise }
216*0d5ee2b2SSteve Wise 
217*0d5ee2b2SSteve Wise static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev,
218*0d5ee2b2SSteve Wise 				struct nvmet_rdma_cmd *c)
219*0d5ee2b2SSteve Wise {
220*0d5ee2b2SSteve Wise 	struct scatterlist *sg;
221*0d5ee2b2SSteve Wise 	struct ib_sge *sge;
222*0d5ee2b2SSteve Wise 	struct page *pg;
223*0d5ee2b2SSteve Wise 	int len;
224*0d5ee2b2SSteve Wise 	int i;
225*0d5ee2b2SSteve Wise 
226*0d5ee2b2SSteve Wise 	if (!ndev->inline_data_size)
227*0d5ee2b2SSteve Wise 		return 0;
228*0d5ee2b2SSteve Wise 
229*0d5ee2b2SSteve Wise 	sg = c->inline_sg;
230*0d5ee2b2SSteve Wise 	sg_init_table(sg, ndev->inline_page_count);
231*0d5ee2b2SSteve Wise 	sge = &c->sge[1];
232*0d5ee2b2SSteve Wise 	len = ndev->inline_data_size;
233*0d5ee2b2SSteve Wise 
234*0d5ee2b2SSteve Wise 	for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
235*0d5ee2b2SSteve Wise 		pg = alloc_page(GFP_KERNEL);
236*0d5ee2b2SSteve Wise 		if (!pg)
237*0d5ee2b2SSteve Wise 			goto out_err;
238*0d5ee2b2SSteve Wise 		sg_assign_page(sg, pg);
239*0d5ee2b2SSteve Wise 		sge->addr = ib_dma_map_page(ndev->device,
240*0d5ee2b2SSteve Wise 			pg, 0, PAGE_SIZE, DMA_FROM_DEVICE);
241*0d5ee2b2SSteve Wise 		if (ib_dma_mapping_error(ndev->device, sge->addr))
242*0d5ee2b2SSteve Wise 			goto out_err;
243*0d5ee2b2SSteve Wise 		sge->length = min_t(int, len, PAGE_SIZE);
244*0d5ee2b2SSteve Wise 		sge->lkey = ndev->pd->local_dma_lkey;
245*0d5ee2b2SSteve Wise 		len -= sge->length;
246*0d5ee2b2SSteve Wise 	}
247*0d5ee2b2SSteve Wise 
248*0d5ee2b2SSteve Wise 	return 0;
249*0d5ee2b2SSteve Wise out_err:
250*0d5ee2b2SSteve Wise 	for (; i >= 0; i--, sg--, sge--) {
251*0d5ee2b2SSteve Wise 		if (sge->length)
252*0d5ee2b2SSteve Wise 			ib_dma_unmap_page(ndev->device, sge->addr,
253*0d5ee2b2SSteve Wise 					sge->length, DMA_FROM_DEVICE);
254*0d5ee2b2SSteve Wise 		if (sg_page(sg))
255*0d5ee2b2SSteve Wise 			__free_page(sg_page(sg));
256*0d5ee2b2SSteve Wise 	}
257*0d5ee2b2SSteve Wise 	return -ENOMEM;
258*0d5ee2b2SSteve Wise }
259*0d5ee2b2SSteve Wise 
2608f000cacSChristoph Hellwig static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev,
2618f000cacSChristoph Hellwig 			struct nvmet_rdma_cmd *c, bool admin)
2628f000cacSChristoph Hellwig {
2638f000cacSChristoph Hellwig 	/* NVMe command / RDMA RECV */
2648f000cacSChristoph Hellwig 	c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL);
2658f000cacSChristoph Hellwig 	if (!c->nvme_cmd)
2668f000cacSChristoph Hellwig 		goto out;
2678f000cacSChristoph Hellwig 
2688f000cacSChristoph Hellwig 	c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd,
2698f000cacSChristoph Hellwig 			sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
2708f000cacSChristoph Hellwig 	if (ib_dma_mapping_error(ndev->device, c->sge[0].addr))
2718f000cacSChristoph Hellwig 		goto out_free_cmd;
2728f000cacSChristoph Hellwig 
2738f000cacSChristoph Hellwig 	c->sge[0].length = sizeof(*c->nvme_cmd);
2748f000cacSChristoph Hellwig 	c->sge[0].lkey = ndev->pd->local_dma_lkey;
2758f000cacSChristoph Hellwig 
276*0d5ee2b2SSteve Wise 	if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c))
2778f000cacSChristoph Hellwig 		goto out_unmap_cmd;
2788f000cacSChristoph Hellwig 
2798f000cacSChristoph Hellwig 	c->cqe.done = nvmet_rdma_recv_done;
2808f000cacSChristoph Hellwig 
2818f000cacSChristoph Hellwig 	c->wr.wr_cqe = &c->cqe;
2828f000cacSChristoph Hellwig 	c->wr.sg_list = c->sge;
283*0d5ee2b2SSteve Wise 	c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1;
2848f000cacSChristoph Hellwig 
2858f000cacSChristoph Hellwig 	return 0;
2868f000cacSChristoph Hellwig 
2878f000cacSChristoph Hellwig out_unmap_cmd:
2888f000cacSChristoph Hellwig 	ib_dma_unmap_single(ndev->device, c->sge[0].addr,
2898f000cacSChristoph Hellwig 			sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
2908f000cacSChristoph Hellwig out_free_cmd:
2918f000cacSChristoph Hellwig 	kfree(c->nvme_cmd);
2928f000cacSChristoph Hellwig 
2938f000cacSChristoph Hellwig out:
2948f000cacSChristoph Hellwig 	return -ENOMEM;
2958f000cacSChristoph Hellwig }
2968f000cacSChristoph Hellwig 
2978f000cacSChristoph Hellwig static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev,
2988f000cacSChristoph Hellwig 		struct nvmet_rdma_cmd *c, bool admin)
2998f000cacSChristoph Hellwig {
300*0d5ee2b2SSteve Wise 	if (!admin)
301*0d5ee2b2SSteve Wise 		nvmet_rdma_free_inline_pages(ndev, c);
3028f000cacSChristoph Hellwig 	ib_dma_unmap_single(ndev->device, c->sge[0].addr,
3038f000cacSChristoph Hellwig 				sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
3048f000cacSChristoph Hellwig 	kfree(c->nvme_cmd);
3058f000cacSChristoph Hellwig }
3068f000cacSChristoph Hellwig 
3078f000cacSChristoph Hellwig static struct nvmet_rdma_cmd *
3088f000cacSChristoph Hellwig nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev,
3098f000cacSChristoph Hellwig 		int nr_cmds, bool admin)
3108f000cacSChristoph Hellwig {
3118f000cacSChristoph Hellwig 	struct nvmet_rdma_cmd *cmds;
3128f000cacSChristoph Hellwig 	int ret = -EINVAL, i;
3138f000cacSChristoph Hellwig 
3148f000cacSChristoph Hellwig 	cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL);
3158f000cacSChristoph Hellwig 	if (!cmds)
3168f000cacSChristoph Hellwig 		goto out;
3178f000cacSChristoph Hellwig 
3188f000cacSChristoph Hellwig 	for (i = 0; i < nr_cmds; i++) {
3198f000cacSChristoph Hellwig 		ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin);
3208f000cacSChristoph Hellwig 		if (ret)
3218f000cacSChristoph Hellwig 			goto out_free;
3228f000cacSChristoph Hellwig 	}
3238f000cacSChristoph Hellwig 
3248f000cacSChristoph Hellwig 	return cmds;
3258f000cacSChristoph Hellwig 
3268f000cacSChristoph Hellwig out_free:
3278f000cacSChristoph Hellwig 	while (--i >= 0)
3288f000cacSChristoph Hellwig 		nvmet_rdma_free_cmd(ndev, cmds + i, admin);
3298f000cacSChristoph Hellwig 	kfree(cmds);
3308f000cacSChristoph Hellwig out:
3318f000cacSChristoph Hellwig 	return ERR_PTR(ret);
3328f000cacSChristoph Hellwig }
3338f000cacSChristoph Hellwig 
3348f000cacSChristoph Hellwig static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev,
3358f000cacSChristoph Hellwig 		struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin)
3368f000cacSChristoph Hellwig {
3378f000cacSChristoph Hellwig 	int i;
3388f000cacSChristoph Hellwig 
3398f000cacSChristoph Hellwig 	for (i = 0; i < nr_cmds; i++)
3408f000cacSChristoph Hellwig 		nvmet_rdma_free_cmd(ndev, cmds + i, admin);
3418f000cacSChristoph Hellwig 	kfree(cmds);
3428f000cacSChristoph Hellwig }
3438f000cacSChristoph Hellwig 
3448f000cacSChristoph Hellwig static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
3458f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *r)
3468f000cacSChristoph Hellwig {
3478f000cacSChristoph Hellwig 	/* NVMe CQE / RDMA SEND */
3488f000cacSChristoph Hellwig 	r->req.rsp = kmalloc(sizeof(*r->req.rsp), GFP_KERNEL);
3498f000cacSChristoph Hellwig 	if (!r->req.rsp)
3508f000cacSChristoph Hellwig 		goto out;
3518f000cacSChristoph Hellwig 
3528f000cacSChristoph Hellwig 	r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.rsp,
3538f000cacSChristoph Hellwig 			sizeof(*r->req.rsp), DMA_TO_DEVICE);
3548f000cacSChristoph Hellwig 	if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
3558f000cacSChristoph Hellwig 		goto out_free_rsp;
3568f000cacSChristoph Hellwig 
3578f000cacSChristoph Hellwig 	r->send_sge.length = sizeof(*r->req.rsp);
3588f000cacSChristoph Hellwig 	r->send_sge.lkey = ndev->pd->local_dma_lkey;
3598f000cacSChristoph Hellwig 
3608f000cacSChristoph Hellwig 	r->send_cqe.done = nvmet_rdma_send_done;
3618f000cacSChristoph Hellwig 
3628f000cacSChristoph Hellwig 	r->send_wr.wr_cqe = &r->send_cqe;
3638f000cacSChristoph Hellwig 	r->send_wr.sg_list = &r->send_sge;
3648f000cacSChristoph Hellwig 	r->send_wr.num_sge = 1;
3658f000cacSChristoph Hellwig 	r->send_wr.send_flags = IB_SEND_SIGNALED;
3668f000cacSChristoph Hellwig 
3678f000cacSChristoph Hellwig 	/* Data In / RDMA READ */
3688f000cacSChristoph Hellwig 	r->read_cqe.done = nvmet_rdma_read_data_done;
3698f000cacSChristoph Hellwig 	return 0;
3708f000cacSChristoph Hellwig 
3718f000cacSChristoph Hellwig out_free_rsp:
3728f000cacSChristoph Hellwig 	kfree(r->req.rsp);
3738f000cacSChristoph Hellwig out:
3748f000cacSChristoph Hellwig 	return -ENOMEM;
3758f000cacSChristoph Hellwig }
3768f000cacSChristoph Hellwig 
3778f000cacSChristoph Hellwig static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
3788f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *r)
3798f000cacSChristoph Hellwig {
3808f000cacSChristoph Hellwig 	ib_dma_unmap_single(ndev->device, r->send_sge.addr,
3818f000cacSChristoph Hellwig 				sizeof(*r->req.rsp), DMA_TO_DEVICE);
3828f000cacSChristoph Hellwig 	kfree(r->req.rsp);
3838f000cacSChristoph Hellwig }
3848f000cacSChristoph Hellwig 
3858f000cacSChristoph Hellwig static int
3868f000cacSChristoph Hellwig nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue)
3878f000cacSChristoph Hellwig {
3888f000cacSChristoph Hellwig 	struct nvmet_rdma_device *ndev = queue->dev;
3898f000cacSChristoph Hellwig 	int nr_rsps = queue->recv_queue_size * 2;
3908f000cacSChristoph Hellwig 	int ret = -EINVAL, i;
3918f000cacSChristoph Hellwig 
3928f000cacSChristoph Hellwig 	queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp),
3938f000cacSChristoph Hellwig 			GFP_KERNEL);
3948f000cacSChristoph Hellwig 	if (!queue->rsps)
3958f000cacSChristoph Hellwig 		goto out;
3968f000cacSChristoph Hellwig 
3978f000cacSChristoph Hellwig 	for (i = 0; i < nr_rsps; i++) {
3988f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
3998f000cacSChristoph Hellwig 
4008f000cacSChristoph Hellwig 		ret = nvmet_rdma_alloc_rsp(ndev, rsp);
4018f000cacSChristoph Hellwig 		if (ret)
4028f000cacSChristoph Hellwig 			goto out_free;
4038f000cacSChristoph Hellwig 
4048f000cacSChristoph Hellwig 		list_add_tail(&rsp->free_list, &queue->free_rsps);
4058f000cacSChristoph Hellwig 	}
4068f000cacSChristoph Hellwig 
4078f000cacSChristoph Hellwig 	return 0;
4088f000cacSChristoph Hellwig 
4098f000cacSChristoph Hellwig out_free:
4108f000cacSChristoph Hellwig 	while (--i >= 0) {
4118f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
4128f000cacSChristoph Hellwig 
4138f000cacSChristoph Hellwig 		list_del(&rsp->free_list);
4148f000cacSChristoph Hellwig 		nvmet_rdma_free_rsp(ndev, rsp);
4158f000cacSChristoph Hellwig 	}
4168f000cacSChristoph Hellwig 	kfree(queue->rsps);
4178f000cacSChristoph Hellwig out:
4188f000cacSChristoph Hellwig 	return ret;
4198f000cacSChristoph Hellwig }
4208f000cacSChristoph Hellwig 
4218f000cacSChristoph Hellwig static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue)
4228f000cacSChristoph Hellwig {
4238f000cacSChristoph Hellwig 	struct nvmet_rdma_device *ndev = queue->dev;
4248f000cacSChristoph Hellwig 	int i, nr_rsps = queue->recv_queue_size * 2;
4258f000cacSChristoph Hellwig 
4268f000cacSChristoph Hellwig 	for (i = 0; i < nr_rsps; i++) {
4278f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
4288f000cacSChristoph Hellwig 
4298f000cacSChristoph Hellwig 		list_del(&rsp->free_list);
4308f000cacSChristoph Hellwig 		nvmet_rdma_free_rsp(ndev, rsp);
4318f000cacSChristoph Hellwig 	}
4328f000cacSChristoph Hellwig 	kfree(queue->rsps);
4338f000cacSChristoph Hellwig }
4348f000cacSChristoph Hellwig 
4358f000cacSChristoph Hellwig static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev,
4368f000cacSChristoph Hellwig 		struct nvmet_rdma_cmd *cmd)
4378f000cacSChristoph Hellwig {
4388f000cacSChristoph Hellwig 	struct ib_recv_wr *bad_wr;
4398f000cacSChristoph Hellwig 
440748ff840SParav Pandit 	ib_dma_sync_single_for_device(ndev->device,
441748ff840SParav Pandit 		cmd->sge[0].addr, cmd->sge[0].length,
442748ff840SParav Pandit 		DMA_FROM_DEVICE);
443748ff840SParav Pandit 
4448f000cacSChristoph Hellwig 	if (ndev->srq)
4458f000cacSChristoph Hellwig 		return ib_post_srq_recv(ndev->srq, &cmd->wr, &bad_wr);
4468f000cacSChristoph Hellwig 	return ib_post_recv(cmd->queue->cm_id->qp, &cmd->wr, &bad_wr);
4478f000cacSChristoph Hellwig }
4488f000cacSChristoph Hellwig 
4498f000cacSChristoph Hellwig static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue)
4508f000cacSChristoph Hellwig {
4518f000cacSChristoph Hellwig 	spin_lock(&queue->rsp_wr_wait_lock);
4528f000cacSChristoph Hellwig 	while (!list_empty(&queue->rsp_wr_wait_list)) {
4538f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *rsp;
4548f000cacSChristoph Hellwig 		bool ret;
4558f000cacSChristoph Hellwig 
4568f000cacSChristoph Hellwig 		rsp = list_entry(queue->rsp_wr_wait_list.next,
4578f000cacSChristoph Hellwig 				struct nvmet_rdma_rsp, wait_list);
4588f000cacSChristoph Hellwig 		list_del(&rsp->wait_list);
4598f000cacSChristoph Hellwig 
4608f000cacSChristoph Hellwig 		spin_unlock(&queue->rsp_wr_wait_lock);
4618f000cacSChristoph Hellwig 		ret = nvmet_rdma_execute_command(rsp);
4628f000cacSChristoph Hellwig 		spin_lock(&queue->rsp_wr_wait_lock);
4638f000cacSChristoph Hellwig 
4648f000cacSChristoph Hellwig 		if (!ret) {
4658f000cacSChristoph Hellwig 			list_add(&rsp->wait_list, &queue->rsp_wr_wait_list);
4668f000cacSChristoph Hellwig 			break;
4678f000cacSChristoph Hellwig 		}
4688f000cacSChristoph Hellwig 	}
4698f000cacSChristoph Hellwig 	spin_unlock(&queue->rsp_wr_wait_lock);
4708f000cacSChristoph Hellwig }
4718f000cacSChristoph Hellwig 
4728f000cacSChristoph Hellwig 
4738f000cacSChristoph Hellwig static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp)
4748f000cacSChristoph Hellwig {
4758f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue = rsp->queue;
4768f000cacSChristoph Hellwig 
4778f000cacSChristoph Hellwig 	atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
4788f000cacSChristoph Hellwig 
4798f000cacSChristoph Hellwig 	if (rsp->n_rdma) {
4808f000cacSChristoph Hellwig 		rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
4818f000cacSChristoph Hellwig 				queue->cm_id->port_num, rsp->req.sg,
4828f000cacSChristoph Hellwig 				rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
4838f000cacSChristoph Hellwig 	}
4848f000cacSChristoph Hellwig 
485*0d5ee2b2SSteve Wise 	if (rsp->req.sg != rsp->cmd->inline_sg)
48668c6e9cdSBart Van Assche 		sgl_free(rsp->req.sg);
4878f000cacSChristoph Hellwig 
4888f000cacSChristoph Hellwig 	if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list)))
4898f000cacSChristoph Hellwig 		nvmet_rdma_process_wr_wait_list(queue);
4908f000cacSChristoph Hellwig 
4918f000cacSChristoph Hellwig 	nvmet_rdma_put_rsp(rsp);
4928f000cacSChristoph Hellwig }
4938f000cacSChristoph Hellwig 
4948f000cacSChristoph Hellwig static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue)
4958f000cacSChristoph Hellwig {
4968f000cacSChristoph Hellwig 	if (queue->nvme_sq.ctrl) {
4978f000cacSChristoph Hellwig 		nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl);
4988f000cacSChristoph Hellwig 	} else {
4998f000cacSChristoph Hellwig 		/*
5008f000cacSChristoph Hellwig 		 * we didn't setup the controller yet in case
5018f000cacSChristoph Hellwig 		 * of admin connect error, just disconnect and
5028f000cacSChristoph Hellwig 		 * cleanup the queue
5038f000cacSChristoph Hellwig 		 */
5048f000cacSChristoph Hellwig 		nvmet_rdma_queue_disconnect(queue);
5058f000cacSChristoph Hellwig 	}
5068f000cacSChristoph Hellwig }
5078f000cacSChristoph Hellwig 
5088f000cacSChristoph Hellwig static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
5098f000cacSChristoph Hellwig {
5108f000cacSChristoph Hellwig 	struct nvmet_rdma_rsp *rsp =
5118f000cacSChristoph Hellwig 		container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe);
5128f000cacSChristoph Hellwig 
5138f000cacSChristoph Hellwig 	nvmet_rdma_release_rsp(rsp);
5148f000cacSChristoph Hellwig 
5158f000cacSChristoph Hellwig 	if (unlikely(wc->status != IB_WC_SUCCESS &&
5168f000cacSChristoph Hellwig 		     wc->status != IB_WC_WR_FLUSH_ERR)) {
5178f000cacSChristoph Hellwig 		pr_err("SEND for CQE 0x%p failed with status %s (%d).\n",
5188f000cacSChristoph Hellwig 			wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
5198f000cacSChristoph Hellwig 		nvmet_rdma_error_comp(rsp->queue);
5208f000cacSChristoph Hellwig 	}
5218f000cacSChristoph Hellwig }
5228f000cacSChristoph Hellwig 
5238f000cacSChristoph Hellwig static void nvmet_rdma_queue_response(struct nvmet_req *req)
5248f000cacSChristoph Hellwig {
5258f000cacSChristoph Hellwig 	struct nvmet_rdma_rsp *rsp =
5268f000cacSChristoph Hellwig 		container_of(req, struct nvmet_rdma_rsp, req);
5278f000cacSChristoph Hellwig 	struct rdma_cm_id *cm_id = rsp->queue->cm_id;
5288f000cacSChristoph Hellwig 	struct ib_send_wr *first_wr, *bad_wr;
5298f000cacSChristoph Hellwig 
5308f000cacSChristoph Hellwig 	if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) {
5318f000cacSChristoph Hellwig 		rsp->send_wr.opcode = IB_WR_SEND_WITH_INV;
5328f000cacSChristoph Hellwig 		rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey;
5338f000cacSChristoph Hellwig 	} else {
5348f000cacSChristoph Hellwig 		rsp->send_wr.opcode = IB_WR_SEND;
5358f000cacSChristoph Hellwig 	}
5368f000cacSChristoph Hellwig 
5378f000cacSChristoph Hellwig 	if (nvmet_rdma_need_data_out(rsp))
5388f000cacSChristoph Hellwig 		first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
5398f000cacSChristoph Hellwig 				cm_id->port_num, NULL, &rsp->send_wr);
5408f000cacSChristoph Hellwig 	else
5418f000cacSChristoph Hellwig 		first_wr = &rsp->send_wr;
5428f000cacSChristoph Hellwig 
5438f000cacSChristoph Hellwig 	nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd);
544748ff840SParav Pandit 
545748ff840SParav Pandit 	ib_dma_sync_single_for_device(rsp->queue->dev->device,
546748ff840SParav Pandit 		rsp->send_sge.addr, rsp->send_sge.length,
547748ff840SParav Pandit 		DMA_TO_DEVICE);
548748ff840SParav Pandit 
5498f000cacSChristoph Hellwig 	if (ib_post_send(cm_id->qp, first_wr, &bad_wr)) {
5508f000cacSChristoph Hellwig 		pr_err("sending cmd response failed\n");
5518f000cacSChristoph Hellwig 		nvmet_rdma_release_rsp(rsp);
5528f000cacSChristoph Hellwig 	}
5538f000cacSChristoph Hellwig }
5548f000cacSChristoph Hellwig 
5558f000cacSChristoph Hellwig static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc)
5568f000cacSChristoph Hellwig {
5578f000cacSChristoph Hellwig 	struct nvmet_rdma_rsp *rsp =
5588f000cacSChristoph Hellwig 		container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe);
5598f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue = cq->cq_context;
5608f000cacSChristoph Hellwig 
5618f000cacSChristoph Hellwig 	WARN_ON(rsp->n_rdma <= 0);
5628f000cacSChristoph Hellwig 	atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
5638f000cacSChristoph Hellwig 	rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
5648f000cacSChristoph Hellwig 			queue->cm_id->port_num, rsp->req.sg,
5658f000cacSChristoph Hellwig 			rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
5668f000cacSChristoph Hellwig 	rsp->n_rdma = 0;
5678f000cacSChristoph Hellwig 
5688f000cacSChristoph Hellwig 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
569549f01aeSVijay Immanuel 		nvmet_req_uninit(&rsp->req);
5708f000cacSChristoph Hellwig 		nvmet_rdma_release_rsp(rsp);
5718f000cacSChristoph Hellwig 		if (wc->status != IB_WC_WR_FLUSH_ERR) {
5728f000cacSChristoph Hellwig 			pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n",
5738f000cacSChristoph Hellwig 				wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
5748f000cacSChristoph Hellwig 			nvmet_rdma_error_comp(queue);
5758f000cacSChristoph Hellwig 		}
5768f000cacSChristoph Hellwig 		return;
5778f000cacSChristoph Hellwig 	}
5788f000cacSChristoph Hellwig 
5795e62d5c9SChristoph Hellwig 	nvmet_req_execute(&rsp->req);
5808f000cacSChristoph Hellwig }
5818f000cacSChristoph Hellwig 
5828f000cacSChristoph Hellwig static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len,
5838f000cacSChristoph Hellwig 		u64 off)
5848f000cacSChristoph Hellwig {
585*0d5ee2b2SSteve Wise 	int sg_count = num_pages(len);
586*0d5ee2b2SSteve Wise 	struct scatterlist *sg;
587*0d5ee2b2SSteve Wise 	int i;
588*0d5ee2b2SSteve Wise 
589*0d5ee2b2SSteve Wise 	sg = rsp->cmd->inline_sg;
590*0d5ee2b2SSteve Wise 	for (i = 0; i < sg_count; i++, sg++) {
591*0d5ee2b2SSteve Wise 		if (i < sg_count - 1)
592*0d5ee2b2SSteve Wise 			sg_unmark_end(sg);
593*0d5ee2b2SSteve Wise 		else
594*0d5ee2b2SSteve Wise 			sg_mark_end(sg);
595*0d5ee2b2SSteve Wise 		sg->offset = off;
596*0d5ee2b2SSteve Wise 		sg->length = min_t(int, len, PAGE_SIZE - off);
597*0d5ee2b2SSteve Wise 		len -= sg->length;
598*0d5ee2b2SSteve Wise 		if (!i)
599*0d5ee2b2SSteve Wise 			off = 0;
600*0d5ee2b2SSteve Wise 	}
601*0d5ee2b2SSteve Wise 
602*0d5ee2b2SSteve Wise 	rsp->req.sg = rsp->cmd->inline_sg;
603*0d5ee2b2SSteve Wise 	rsp->req.sg_cnt = sg_count;
6048f000cacSChristoph Hellwig }
6058f000cacSChristoph Hellwig 
6068f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp)
6078f000cacSChristoph Hellwig {
6088f000cacSChristoph Hellwig 	struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl;
6098f000cacSChristoph Hellwig 	u64 off = le64_to_cpu(sgl->addr);
6108f000cacSChristoph Hellwig 	u32 len = le32_to_cpu(sgl->length);
6118f000cacSChristoph Hellwig 
6128f000cacSChristoph Hellwig 	if (!nvme_is_write(rsp->req.cmd))
6138f000cacSChristoph Hellwig 		return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
6148f000cacSChristoph Hellwig 
615*0d5ee2b2SSteve Wise 	if (off + len > rsp->queue->dev->inline_data_size) {
6168f000cacSChristoph Hellwig 		pr_err("invalid inline data offset!\n");
6178f000cacSChristoph Hellwig 		return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR;
6188f000cacSChristoph Hellwig 	}
6198f000cacSChristoph Hellwig 
6208f000cacSChristoph Hellwig 	/* no data command? */
6218f000cacSChristoph Hellwig 	if (!len)
6228f000cacSChristoph Hellwig 		return 0;
6238f000cacSChristoph Hellwig 
6248f000cacSChristoph Hellwig 	nvmet_rdma_use_inline_sg(rsp, len, off);
6258f000cacSChristoph Hellwig 	rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA;
6265e62d5c9SChristoph Hellwig 	rsp->req.transfer_len += len;
6278f000cacSChristoph Hellwig 	return 0;
6288f000cacSChristoph Hellwig }
6298f000cacSChristoph Hellwig 
6308f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp,
6318f000cacSChristoph Hellwig 		struct nvme_keyed_sgl_desc *sgl, bool invalidate)
6328f000cacSChristoph Hellwig {
6338f000cacSChristoph Hellwig 	struct rdma_cm_id *cm_id = rsp->queue->cm_id;
6348f000cacSChristoph Hellwig 	u64 addr = le64_to_cpu(sgl->addr);
6358f000cacSChristoph Hellwig 	u32 len = get_unaligned_le24(sgl->length);
6368f000cacSChristoph Hellwig 	u32 key = get_unaligned_le32(sgl->key);
6378f000cacSChristoph Hellwig 	int ret;
6388f000cacSChristoph Hellwig 
6398f000cacSChristoph Hellwig 	/* no data command? */
6408f000cacSChristoph Hellwig 	if (!len)
6418f000cacSChristoph Hellwig 		return 0;
6428f000cacSChristoph Hellwig 
64368c6e9cdSBart Van Assche 	rsp->req.sg = sgl_alloc(len, GFP_KERNEL, &rsp->req.sg_cnt);
64468c6e9cdSBart Van Assche 	if (!rsp->req.sg)
64568c6e9cdSBart Van Assche 		return NVME_SC_INTERNAL;
6468f000cacSChristoph Hellwig 
6478f000cacSChristoph Hellwig 	ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num,
6488f000cacSChristoph Hellwig 			rsp->req.sg, rsp->req.sg_cnt, 0, addr, key,
6498f000cacSChristoph Hellwig 			nvmet_data_dir(&rsp->req));
6508f000cacSChristoph Hellwig 	if (ret < 0)
6518f000cacSChristoph Hellwig 		return NVME_SC_INTERNAL;
6525e62d5c9SChristoph Hellwig 	rsp->req.transfer_len += len;
6538f000cacSChristoph Hellwig 	rsp->n_rdma += ret;
6548f000cacSChristoph Hellwig 
6558f000cacSChristoph Hellwig 	if (invalidate) {
6568f000cacSChristoph Hellwig 		rsp->invalidate_rkey = key;
6578f000cacSChristoph Hellwig 		rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY;
6588f000cacSChristoph Hellwig 	}
6598f000cacSChristoph Hellwig 
6608f000cacSChristoph Hellwig 	return 0;
6618f000cacSChristoph Hellwig }
6628f000cacSChristoph Hellwig 
6638f000cacSChristoph Hellwig static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp)
6648f000cacSChristoph Hellwig {
6658f000cacSChristoph Hellwig 	struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl;
6668f000cacSChristoph Hellwig 
6678f000cacSChristoph Hellwig 	switch (sgl->type >> 4) {
6688f000cacSChristoph Hellwig 	case NVME_SGL_FMT_DATA_DESC:
6698f000cacSChristoph Hellwig 		switch (sgl->type & 0xf) {
6708f000cacSChristoph Hellwig 		case NVME_SGL_FMT_OFFSET:
6718f000cacSChristoph Hellwig 			return nvmet_rdma_map_sgl_inline(rsp);
6728f000cacSChristoph Hellwig 		default:
6738f000cacSChristoph Hellwig 			pr_err("invalid SGL subtype: %#x\n", sgl->type);
6748f000cacSChristoph Hellwig 			return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
6758f000cacSChristoph Hellwig 		}
6768f000cacSChristoph Hellwig 	case NVME_KEY_SGL_FMT_DATA_DESC:
6778f000cacSChristoph Hellwig 		switch (sgl->type & 0xf) {
6788f000cacSChristoph Hellwig 		case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE:
6798f000cacSChristoph Hellwig 			return nvmet_rdma_map_sgl_keyed(rsp, sgl, true);
6808f000cacSChristoph Hellwig 		case NVME_SGL_FMT_ADDRESS:
6818f000cacSChristoph Hellwig 			return nvmet_rdma_map_sgl_keyed(rsp, sgl, false);
6828f000cacSChristoph Hellwig 		default:
6838f000cacSChristoph Hellwig 			pr_err("invalid SGL subtype: %#x\n", sgl->type);
6848f000cacSChristoph Hellwig 			return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
6858f000cacSChristoph Hellwig 		}
6868f000cacSChristoph Hellwig 	default:
6878f000cacSChristoph Hellwig 		pr_err("invalid SGL type: %#x\n", sgl->type);
6888f000cacSChristoph Hellwig 		return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR;
6898f000cacSChristoph Hellwig 	}
6908f000cacSChristoph Hellwig }
6918f000cacSChristoph Hellwig 
6928f000cacSChristoph Hellwig static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp)
6938f000cacSChristoph Hellwig {
6948f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue = rsp->queue;
6958f000cacSChristoph Hellwig 
6968f000cacSChristoph Hellwig 	if (unlikely(atomic_sub_return(1 + rsp->n_rdma,
6978f000cacSChristoph Hellwig 			&queue->sq_wr_avail) < 0)) {
6988f000cacSChristoph Hellwig 		pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n",
6998f000cacSChristoph Hellwig 				1 + rsp->n_rdma, queue->idx,
7008f000cacSChristoph Hellwig 				queue->nvme_sq.ctrl->cntlid);
7018f000cacSChristoph Hellwig 		atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
7028f000cacSChristoph Hellwig 		return false;
7038f000cacSChristoph Hellwig 	}
7048f000cacSChristoph Hellwig 
7058f000cacSChristoph Hellwig 	if (nvmet_rdma_need_data_in(rsp)) {
7068f000cacSChristoph Hellwig 		if (rdma_rw_ctx_post(&rsp->rw, queue->cm_id->qp,
7078f000cacSChristoph Hellwig 				queue->cm_id->port_num, &rsp->read_cqe, NULL))
7088f000cacSChristoph Hellwig 			nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR);
7098f000cacSChristoph Hellwig 	} else {
7105e62d5c9SChristoph Hellwig 		nvmet_req_execute(&rsp->req);
7118f000cacSChristoph Hellwig 	}
7128f000cacSChristoph Hellwig 
7138f000cacSChristoph Hellwig 	return true;
7148f000cacSChristoph Hellwig }
7158f000cacSChristoph Hellwig 
7168f000cacSChristoph Hellwig static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue,
7178f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *cmd)
7188f000cacSChristoph Hellwig {
7198f000cacSChristoph Hellwig 	u16 status;
7208f000cacSChristoph Hellwig 
721748ff840SParav Pandit 	ib_dma_sync_single_for_cpu(queue->dev->device,
722748ff840SParav Pandit 		cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length,
723748ff840SParav Pandit 		DMA_FROM_DEVICE);
724748ff840SParav Pandit 	ib_dma_sync_single_for_cpu(queue->dev->device,
725748ff840SParav Pandit 		cmd->send_sge.addr, cmd->send_sge.length,
726748ff840SParav Pandit 		DMA_TO_DEVICE);
727748ff840SParav Pandit 
7288f000cacSChristoph Hellwig 	if (!nvmet_req_init(&cmd->req, &queue->nvme_cq,
7298f000cacSChristoph Hellwig 			&queue->nvme_sq, &nvmet_rdma_ops))
7308f000cacSChristoph Hellwig 		return;
7318f000cacSChristoph Hellwig 
7328f000cacSChristoph Hellwig 	status = nvmet_rdma_map_sgl(cmd);
7338f000cacSChristoph Hellwig 	if (status)
7348f000cacSChristoph Hellwig 		goto out_err;
7358f000cacSChristoph Hellwig 
7368f000cacSChristoph Hellwig 	if (unlikely(!nvmet_rdma_execute_command(cmd))) {
7378f000cacSChristoph Hellwig 		spin_lock(&queue->rsp_wr_wait_lock);
7388f000cacSChristoph Hellwig 		list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list);
7398f000cacSChristoph Hellwig 		spin_unlock(&queue->rsp_wr_wait_lock);
7408f000cacSChristoph Hellwig 	}
7418f000cacSChristoph Hellwig 
7428f000cacSChristoph Hellwig 	return;
7438f000cacSChristoph Hellwig 
7448f000cacSChristoph Hellwig out_err:
7458f000cacSChristoph Hellwig 	nvmet_req_complete(&cmd->req, status);
7468f000cacSChristoph Hellwig }
7478f000cacSChristoph Hellwig 
7488f000cacSChristoph Hellwig static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
7498f000cacSChristoph Hellwig {
7508f000cacSChristoph Hellwig 	struct nvmet_rdma_cmd *cmd =
7518f000cacSChristoph Hellwig 		container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe);
7528f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue = cq->cq_context;
7538f000cacSChristoph Hellwig 	struct nvmet_rdma_rsp *rsp;
7548f000cacSChristoph Hellwig 
7558f000cacSChristoph Hellwig 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
7568f000cacSChristoph Hellwig 		if (wc->status != IB_WC_WR_FLUSH_ERR) {
7578f000cacSChristoph Hellwig 			pr_err("RECV for CQE 0x%p failed with status %s (%d)\n",
7588f000cacSChristoph Hellwig 				wc->wr_cqe, ib_wc_status_msg(wc->status),
7598f000cacSChristoph Hellwig 				wc->status);
7608f000cacSChristoph Hellwig 			nvmet_rdma_error_comp(queue);
7618f000cacSChristoph Hellwig 		}
7628f000cacSChristoph Hellwig 		return;
7638f000cacSChristoph Hellwig 	}
7648f000cacSChristoph Hellwig 
7658f000cacSChristoph Hellwig 	if (unlikely(wc->byte_len < sizeof(struct nvme_command))) {
7668f000cacSChristoph Hellwig 		pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n");
7678f000cacSChristoph Hellwig 		nvmet_rdma_error_comp(queue);
7688f000cacSChristoph Hellwig 		return;
7698f000cacSChristoph Hellwig 	}
7708f000cacSChristoph Hellwig 
7718f000cacSChristoph Hellwig 	cmd->queue = queue;
7728f000cacSChristoph Hellwig 	rsp = nvmet_rdma_get_rsp(queue);
7738d61413dSSagi Grimberg 	rsp->queue = queue;
7748f000cacSChristoph Hellwig 	rsp->cmd = cmd;
7758f000cacSChristoph Hellwig 	rsp->flags = 0;
7768f000cacSChristoph Hellwig 	rsp->req.cmd = cmd->nvme_cmd;
7778d61413dSSagi Grimberg 	rsp->req.port = queue->port;
7788d61413dSSagi Grimberg 	rsp->n_rdma = 0;
7798f000cacSChristoph Hellwig 
7808f000cacSChristoph Hellwig 	if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) {
7818f000cacSChristoph Hellwig 		unsigned long flags;
7828f000cacSChristoph Hellwig 
7838f000cacSChristoph Hellwig 		spin_lock_irqsave(&queue->state_lock, flags);
7848f000cacSChristoph Hellwig 		if (queue->state == NVMET_RDMA_Q_CONNECTING)
7858f000cacSChristoph Hellwig 			list_add_tail(&rsp->wait_list, &queue->rsp_wait_list);
7868f000cacSChristoph Hellwig 		else
7878f000cacSChristoph Hellwig 			nvmet_rdma_put_rsp(rsp);
7888f000cacSChristoph Hellwig 		spin_unlock_irqrestore(&queue->state_lock, flags);
7898f000cacSChristoph Hellwig 		return;
7908f000cacSChristoph Hellwig 	}
7918f000cacSChristoph Hellwig 
7928f000cacSChristoph Hellwig 	nvmet_rdma_handle_command(queue, rsp);
7938f000cacSChristoph Hellwig }
7948f000cacSChristoph Hellwig 
7958f000cacSChristoph Hellwig static void nvmet_rdma_destroy_srq(struct nvmet_rdma_device *ndev)
7968f000cacSChristoph Hellwig {
7978f000cacSChristoph Hellwig 	if (!ndev->srq)
7988f000cacSChristoph Hellwig 		return;
7998f000cacSChristoph Hellwig 
8008f000cacSChristoph Hellwig 	nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false);
8018f000cacSChristoph Hellwig 	ib_destroy_srq(ndev->srq);
8028f000cacSChristoph Hellwig }
8038f000cacSChristoph Hellwig 
8048f000cacSChristoph Hellwig static int nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev)
8058f000cacSChristoph Hellwig {
8068f000cacSChristoph Hellwig 	struct ib_srq_init_attr srq_attr = { NULL, };
8078f000cacSChristoph Hellwig 	struct ib_srq *srq;
8088f000cacSChristoph Hellwig 	size_t srq_size;
8098f000cacSChristoph Hellwig 	int ret, i;
8108f000cacSChristoph Hellwig 
8118f000cacSChristoph Hellwig 	srq_size = 4095;	/* XXX: tune */
8128f000cacSChristoph Hellwig 
8138f000cacSChristoph Hellwig 	srq_attr.attr.max_wr = srq_size;
814*0d5ee2b2SSteve Wise 	srq_attr.attr.max_sge = 1 + ndev->inline_page_count;
8158f000cacSChristoph Hellwig 	srq_attr.attr.srq_limit = 0;
8168f000cacSChristoph Hellwig 	srq_attr.srq_type = IB_SRQT_BASIC;
8178f000cacSChristoph Hellwig 	srq = ib_create_srq(ndev->pd, &srq_attr);
8188f000cacSChristoph Hellwig 	if (IS_ERR(srq)) {
8198f000cacSChristoph Hellwig 		/*
8208f000cacSChristoph Hellwig 		 * If SRQs aren't supported we just go ahead and use normal
8218f000cacSChristoph Hellwig 		 * non-shared receive queues.
8228f000cacSChristoph Hellwig 		 */
8238f000cacSChristoph Hellwig 		pr_info("SRQ requested but not supported.\n");
8248f000cacSChristoph Hellwig 		return 0;
8258f000cacSChristoph Hellwig 	}
8268f000cacSChristoph Hellwig 
8278f000cacSChristoph Hellwig 	ndev->srq_cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false);
8288f000cacSChristoph Hellwig 	if (IS_ERR(ndev->srq_cmds)) {
8298f000cacSChristoph Hellwig 		ret = PTR_ERR(ndev->srq_cmds);
8308f000cacSChristoph Hellwig 		goto out_destroy_srq;
8318f000cacSChristoph Hellwig 	}
8328f000cacSChristoph Hellwig 
8338f000cacSChristoph Hellwig 	ndev->srq = srq;
8348f000cacSChristoph Hellwig 	ndev->srq_size = srq_size;
8358f000cacSChristoph Hellwig 
8368f000cacSChristoph Hellwig 	for (i = 0; i < srq_size; i++)
8378f000cacSChristoph Hellwig 		nvmet_rdma_post_recv(ndev, &ndev->srq_cmds[i]);
8388f000cacSChristoph Hellwig 
8398f000cacSChristoph Hellwig 	return 0;
8408f000cacSChristoph Hellwig 
8418f000cacSChristoph Hellwig out_destroy_srq:
8428f000cacSChristoph Hellwig 	ib_destroy_srq(srq);
8438f000cacSChristoph Hellwig 	return ret;
8448f000cacSChristoph Hellwig }
8458f000cacSChristoph Hellwig 
8468f000cacSChristoph Hellwig static void nvmet_rdma_free_dev(struct kref *ref)
8478f000cacSChristoph Hellwig {
8488f000cacSChristoph Hellwig 	struct nvmet_rdma_device *ndev =
8498f000cacSChristoph Hellwig 		container_of(ref, struct nvmet_rdma_device, ref);
8508f000cacSChristoph Hellwig 
8518f000cacSChristoph Hellwig 	mutex_lock(&device_list_mutex);
8528f000cacSChristoph Hellwig 	list_del(&ndev->entry);
8538f000cacSChristoph Hellwig 	mutex_unlock(&device_list_mutex);
8548f000cacSChristoph Hellwig 
8558f000cacSChristoph Hellwig 	nvmet_rdma_destroy_srq(ndev);
8568f000cacSChristoph Hellwig 	ib_dealloc_pd(ndev->pd);
8578f000cacSChristoph Hellwig 
8588f000cacSChristoph Hellwig 	kfree(ndev);
8598f000cacSChristoph Hellwig }
8608f000cacSChristoph Hellwig 
8618f000cacSChristoph Hellwig static struct nvmet_rdma_device *
8628f000cacSChristoph Hellwig nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id)
8638f000cacSChristoph Hellwig {
864*0d5ee2b2SSteve Wise 	struct nvmet_port *port = cm_id->context;
8658f000cacSChristoph Hellwig 	struct nvmet_rdma_device *ndev;
866*0d5ee2b2SSteve Wise 	int inline_page_count;
867*0d5ee2b2SSteve Wise 	int inline_sge_count;
8688f000cacSChristoph Hellwig 	int ret;
8698f000cacSChristoph Hellwig 
8708f000cacSChristoph Hellwig 	mutex_lock(&device_list_mutex);
8718f000cacSChristoph Hellwig 	list_for_each_entry(ndev, &device_list, entry) {
8728f000cacSChristoph Hellwig 		if (ndev->device->node_guid == cm_id->device->node_guid &&
8738f000cacSChristoph Hellwig 		    kref_get_unless_zero(&ndev->ref))
8748f000cacSChristoph Hellwig 			goto out_unlock;
8758f000cacSChristoph Hellwig 	}
8768f000cacSChristoph Hellwig 
8778f000cacSChristoph Hellwig 	ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
8788f000cacSChristoph Hellwig 	if (!ndev)
8798f000cacSChristoph Hellwig 		goto out_err;
8808f000cacSChristoph Hellwig 
881*0d5ee2b2SSteve Wise 	inline_page_count = num_pages(port->inline_data_size);
882*0d5ee2b2SSteve Wise 	inline_sge_count = max(cm_id->device->attrs.max_sge_rd,
883*0d5ee2b2SSteve Wise 				cm_id->device->attrs.max_sge) - 1;
884*0d5ee2b2SSteve Wise 	if (inline_page_count > inline_sge_count) {
885*0d5ee2b2SSteve Wise 		pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n",
886*0d5ee2b2SSteve Wise 			port->inline_data_size, cm_id->device->name,
887*0d5ee2b2SSteve Wise 			inline_sge_count * PAGE_SIZE);
888*0d5ee2b2SSteve Wise 		port->inline_data_size = inline_sge_count * PAGE_SIZE;
889*0d5ee2b2SSteve Wise 		inline_page_count = inline_sge_count;
890*0d5ee2b2SSteve Wise 	}
891*0d5ee2b2SSteve Wise 	ndev->inline_data_size = port->inline_data_size;
892*0d5ee2b2SSteve Wise 	ndev->inline_page_count = inline_page_count;
8938f000cacSChristoph Hellwig 	ndev->device = cm_id->device;
8948f000cacSChristoph Hellwig 	kref_init(&ndev->ref);
8958f000cacSChristoph Hellwig 
896ed082d36SChristoph Hellwig 	ndev->pd = ib_alloc_pd(ndev->device, 0);
8978f000cacSChristoph Hellwig 	if (IS_ERR(ndev->pd))
8988f000cacSChristoph Hellwig 		goto out_free_dev;
8998f000cacSChristoph Hellwig 
9008f000cacSChristoph Hellwig 	if (nvmet_rdma_use_srq) {
9018f000cacSChristoph Hellwig 		ret = nvmet_rdma_init_srq(ndev);
9028f000cacSChristoph Hellwig 		if (ret)
9038f000cacSChristoph Hellwig 			goto out_free_pd;
9048f000cacSChristoph Hellwig 	}
9058f000cacSChristoph Hellwig 
9068f000cacSChristoph Hellwig 	list_add(&ndev->entry, &device_list);
9078f000cacSChristoph Hellwig out_unlock:
9088f000cacSChristoph Hellwig 	mutex_unlock(&device_list_mutex);
9098f000cacSChristoph Hellwig 	pr_debug("added %s.\n", ndev->device->name);
9108f000cacSChristoph Hellwig 	return ndev;
9118f000cacSChristoph Hellwig 
9128f000cacSChristoph Hellwig out_free_pd:
9138f000cacSChristoph Hellwig 	ib_dealloc_pd(ndev->pd);
9148f000cacSChristoph Hellwig out_free_dev:
9158f000cacSChristoph Hellwig 	kfree(ndev);
9168f000cacSChristoph Hellwig out_err:
9178f000cacSChristoph Hellwig 	mutex_unlock(&device_list_mutex);
9188f000cacSChristoph Hellwig 	return NULL;
9198f000cacSChristoph Hellwig }
9208f000cacSChristoph Hellwig 
9218f000cacSChristoph Hellwig static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue)
9228f000cacSChristoph Hellwig {
9238f000cacSChristoph Hellwig 	struct ib_qp_init_attr qp_attr;
9248f000cacSChristoph Hellwig 	struct nvmet_rdma_device *ndev = queue->dev;
9258f000cacSChristoph Hellwig 	int comp_vector, nr_cqe, ret, i;
9268f000cacSChristoph Hellwig 
9278f000cacSChristoph Hellwig 	/*
9288f000cacSChristoph Hellwig 	 * Spread the io queues across completion vectors,
9298f000cacSChristoph Hellwig 	 * but still keep all admin queues on vector 0.
9308f000cacSChristoph Hellwig 	 */
9318f000cacSChristoph Hellwig 	comp_vector = !queue->host_qid ? 0 :
9328f000cacSChristoph Hellwig 		queue->idx % ndev->device->num_comp_vectors;
9338f000cacSChristoph Hellwig 
9348f000cacSChristoph Hellwig 	/*
9358f000cacSChristoph Hellwig 	 * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND.
9368f000cacSChristoph Hellwig 	 */
9378f000cacSChristoph Hellwig 	nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size;
9388f000cacSChristoph Hellwig 
9398f000cacSChristoph Hellwig 	queue->cq = ib_alloc_cq(ndev->device, queue,
9408f000cacSChristoph Hellwig 			nr_cqe + 1, comp_vector,
9418f000cacSChristoph Hellwig 			IB_POLL_WORKQUEUE);
9428f000cacSChristoph Hellwig 	if (IS_ERR(queue->cq)) {
9438f000cacSChristoph Hellwig 		ret = PTR_ERR(queue->cq);
9448f000cacSChristoph Hellwig 		pr_err("failed to create CQ cqe= %d ret= %d\n",
9458f000cacSChristoph Hellwig 		       nr_cqe + 1, ret);
9468f000cacSChristoph Hellwig 		goto out;
9478f000cacSChristoph Hellwig 	}
9488f000cacSChristoph Hellwig 
9498f000cacSChristoph Hellwig 	memset(&qp_attr, 0, sizeof(qp_attr));
9508f000cacSChristoph Hellwig 	qp_attr.qp_context = queue;
9518f000cacSChristoph Hellwig 	qp_attr.event_handler = nvmet_rdma_qp_event;
9528f000cacSChristoph Hellwig 	qp_attr.send_cq = queue->cq;
9538f000cacSChristoph Hellwig 	qp_attr.recv_cq = queue->cq;
9548f000cacSChristoph Hellwig 	qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
9558f000cacSChristoph Hellwig 	qp_attr.qp_type = IB_QPT_RC;
9568f000cacSChristoph Hellwig 	/* +1 for drain */
9578f000cacSChristoph Hellwig 	qp_attr.cap.max_send_wr = queue->send_queue_size + 1;
9588f000cacSChristoph Hellwig 	qp_attr.cap.max_rdma_ctxs = queue->send_queue_size;
9598f000cacSChristoph Hellwig 	qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd,
9608f000cacSChristoph Hellwig 					ndev->device->attrs.max_sge);
9618f000cacSChristoph Hellwig 
9628f000cacSChristoph Hellwig 	if (ndev->srq) {
9638f000cacSChristoph Hellwig 		qp_attr.srq = ndev->srq;
9648f000cacSChristoph Hellwig 	} else {
9658f000cacSChristoph Hellwig 		/* +1 for drain */
9668f000cacSChristoph Hellwig 		qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size;
967*0d5ee2b2SSteve Wise 		qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count;
9688f000cacSChristoph Hellwig 	}
9698f000cacSChristoph Hellwig 
9708f000cacSChristoph Hellwig 	ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr);
9718f000cacSChristoph Hellwig 	if (ret) {
9728f000cacSChristoph Hellwig 		pr_err("failed to create_qp ret= %d\n", ret);
9738f000cacSChristoph Hellwig 		goto err_destroy_cq;
9748f000cacSChristoph Hellwig 	}
9758f000cacSChristoph Hellwig 
9768f000cacSChristoph Hellwig 	atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr);
9778f000cacSChristoph Hellwig 
9788f000cacSChristoph Hellwig 	pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n",
9798f000cacSChristoph Hellwig 		 __func__, queue->cq->cqe, qp_attr.cap.max_send_sge,
9808f000cacSChristoph Hellwig 		 qp_attr.cap.max_send_wr, queue->cm_id);
9818f000cacSChristoph Hellwig 
9828f000cacSChristoph Hellwig 	if (!ndev->srq) {
9838f000cacSChristoph Hellwig 		for (i = 0; i < queue->recv_queue_size; i++) {
9848f000cacSChristoph Hellwig 			queue->cmds[i].queue = queue;
9858f000cacSChristoph Hellwig 			nvmet_rdma_post_recv(ndev, &queue->cmds[i]);
9868f000cacSChristoph Hellwig 		}
9878f000cacSChristoph Hellwig 	}
9888f000cacSChristoph Hellwig 
9898f000cacSChristoph Hellwig out:
9908f000cacSChristoph Hellwig 	return ret;
9918f000cacSChristoph Hellwig 
9928f000cacSChristoph Hellwig err_destroy_cq:
9938f000cacSChristoph Hellwig 	ib_free_cq(queue->cq);
9948f000cacSChristoph Hellwig 	goto out;
9958f000cacSChristoph Hellwig }
9968f000cacSChristoph Hellwig 
9978f000cacSChristoph Hellwig static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
9988f000cacSChristoph Hellwig {
999e1a2ee24SIsrael Rukshin 	struct ib_qp *qp = queue->cm_id->qp;
1000e1a2ee24SIsrael Rukshin 
1001e1a2ee24SIsrael Rukshin 	ib_drain_qp(qp);
1002e1a2ee24SIsrael Rukshin 	rdma_destroy_id(queue->cm_id);
1003e1a2ee24SIsrael Rukshin 	ib_destroy_qp(qp);
10048f000cacSChristoph Hellwig 	ib_free_cq(queue->cq);
10058f000cacSChristoph Hellwig }
10068f000cacSChristoph Hellwig 
10078f000cacSChristoph Hellwig static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue)
10088f000cacSChristoph Hellwig {
1009424125a0SSagi Grimberg 	pr_debug("freeing queue %d\n", queue->idx);
10108f000cacSChristoph Hellwig 
10118f000cacSChristoph Hellwig 	nvmet_sq_destroy(&queue->nvme_sq);
10128f000cacSChristoph Hellwig 
10138f000cacSChristoph Hellwig 	nvmet_rdma_destroy_queue_ib(queue);
10148f000cacSChristoph Hellwig 	if (!queue->dev->srq) {
10158f000cacSChristoph Hellwig 		nvmet_rdma_free_cmds(queue->dev, queue->cmds,
10168f000cacSChristoph Hellwig 				queue->recv_queue_size,
10178f000cacSChristoph Hellwig 				!queue->host_qid);
10188f000cacSChristoph Hellwig 	}
10198f000cacSChristoph Hellwig 	nvmet_rdma_free_rsps(queue);
10208f000cacSChristoph Hellwig 	ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
10218f000cacSChristoph Hellwig 	kfree(queue);
10228f000cacSChristoph Hellwig }
10238f000cacSChristoph Hellwig 
10248f000cacSChristoph Hellwig static void nvmet_rdma_release_queue_work(struct work_struct *w)
10258f000cacSChristoph Hellwig {
10268f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue =
10278f000cacSChristoph Hellwig 		container_of(w, struct nvmet_rdma_queue, release_work);
10288f000cacSChristoph Hellwig 	struct nvmet_rdma_device *dev = queue->dev;
10298f000cacSChristoph Hellwig 
10308f000cacSChristoph Hellwig 	nvmet_rdma_free_queue(queue);
1031d8f7750aSSagi Grimberg 
10328f000cacSChristoph Hellwig 	kref_put(&dev->ref, nvmet_rdma_free_dev);
10338f000cacSChristoph Hellwig }
10348f000cacSChristoph Hellwig 
10358f000cacSChristoph Hellwig static int
10368f000cacSChristoph Hellwig nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn,
10378f000cacSChristoph Hellwig 				struct nvmet_rdma_queue *queue)
10388f000cacSChristoph Hellwig {
10398f000cacSChristoph Hellwig 	struct nvme_rdma_cm_req *req;
10408f000cacSChristoph Hellwig 
10418f000cacSChristoph Hellwig 	req = (struct nvme_rdma_cm_req *)conn->private_data;
10428f000cacSChristoph Hellwig 	if (!req || conn->private_data_len == 0)
10438f000cacSChristoph Hellwig 		return NVME_RDMA_CM_INVALID_LEN;
10448f000cacSChristoph Hellwig 
10458f000cacSChristoph Hellwig 	if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0)
10468f000cacSChristoph Hellwig 		return NVME_RDMA_CM_INVALID_RECFMT;
10478f000cacSChristoph Hellwig 
10488f000cacSChristoph Hellwig 	queue->host_qid = le16_to_cpu(req->qid);
10498f000cacSChristoph Hellwig 
10508f000cacSChristoph Hellwig 	/*
1051b825b44cSJay Freyensee 	 * req->hsqsize corresponds to our recv queue size plus 1
10528f000cacSChristoph Hellwig 	 * req->hrqsize corresponds to our send queue size
10538f000cacSChristoph Hellwig 	 */
1054b825b44cSJay Freyensee 	queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1;
10558f000cacSChristoph Hellwig 	queue->send_queue_size = le16_to_cpu(req->hrqsize);
10568f000cacSChristoph Hellwig 
10577aa1f427SSagi Grimberg 	if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH)
10588f000cacSChristoph Hellwig 		return NVME_RDMA_CM_INVALID_HSQSIZE;
10598f000cacSChristoph Hellwig 
10608f000cacSChristoph Hellwig 	/* XXX: Should we enforce some kind of max for IO queues? */
10618f000cacSChristoph Hellwig 
10628f000cacSChristoph Hellwig 	return 0;
10638f000cacSChristoph Hellwig }
10648f000cacSChristoph Hellwig 
10658f000cacSChristoph Hellwig static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id,
10668f000cacSChristoph Hellwig 				enum nvme_rdma_cm_status status)
10678f000cacSChristoph Hellwig {
10688f000cacSChristoph Hellwig 	struct nvme_rdma_cm_rej rej;
10698f000cacSChristoph Hellwig 
10707a01a6eaSMax Gurtovoy 	pr_debug("rejecting connect request: status %d (%s)\n",
10717a01a6eaSMax Gurtovoy 		 status, nvme_rdma_cm_msg(status));
10727a01a6eaSMax Gurtovoy 
10738f000cacSChristoph Hellwig 	rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
10748f000cacSChristoph Hellwig 	rej.sts = cpu_to_le16(status);
10758f000cacSChristoph Hellwig 
10768f000cacSChristoph Hellwig 	return rdma_reject(cm_id, (void *)&rej, sizeof(rej));
10778f000cacSChristoph Hellwig }
10788f000cacSChristoph Hellwig 
10798f000cacSChristoph Hellwig static struct nvmet_rdma_queue *
10808f000cacSChristoph Hellwig nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev,
10818f000cacSChristoph Hellwig 		struct rdma_cm_id *cm_id,
10828f000cacSChristoph Hellwig 		struct rdma_cm_event *event)
10838f000cacSChristoph Hellwig {
10848f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue;
10858f000cacSChristoph Hellwig 	int ret;
10868f000cacSChristoph Hellwig 
10878f000cacSChristoph Hellwig 	queue = kzalloc(sizeof(*queue), GFP_KERNEL);
10888f000cacSChristoph Hellwig 	if (!queue) {
10898f000cacSChristoph Hellwig 		ret = NVME_RDMA_CM_NO_RSC;
10908f000cacSChristoph Hellwig 		goto out_reject;
10918f000cacSChristoph Hellwig 	}
10928f000cacSChristoph Hellwig 
10938f000cacSChristoph Hellwig 	ret = nvmet_sq_init(&queue->nvme_sq);
109470d4281cSBart Van Assche 	if (ret) {
109570d4281cSBart Van Assche 		ret = NVME_RDMA_CM_NO_RSC;
10968f000cacSChristoph Hellwig 		goto out_free_queue;
109770d4281cSBart Van Assche 	}
10988f000cacSChristoph Hellwig 
10998f000cacSChristoph Hellwig 	ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue);
11008f000cacSChristoph Hellwig 	if (ret)
11018f000cacSChristoph Hellwig 		goto out_destroy_sq;
11028f000cacSChristoph Hellwig 
11038f000cacSChristoph Hellwig 	/*
11048f000cacSChristoph Hellwig 	 * Schedules the actual release because calling rdma_destroy_id from
11058f000cacSChristoph Hellwig 	 * inside a CM callback would trigger a deadlock. (great API design..)
11068f000cacSChristoph Hellwig 	 */
11078f000cacSChristoph Hellwig 	INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work);
11088f000cacSChristoph Hellwig 	queue->dev = ndev;
11098f000cacSChristoph Hellwig 	queue->cm_id = cm_id;
11108f000cacSChristoph Hellwig 
11118f000cacSChristoph Hellwig 	spin_lock_init(&queue->state_lock);
11128f000cacSChristoph Hellwig 	queue->state = NVMET_RDMA_Q_CONNECTING;
11138f000cacSChristoph Hellwig 	INIT_LIST_HEAD(&queue->rsp_wait_list);
11148f000cacSChristoph Hellwig 	INIT_LIST_HEAD(&queue->rsp_wr_wait_list);
11158f000cacSChristoph Hellwig 	spin_lock_init(&queue->rsp_wr_wait_lock);
11168f000cacSChristoph Hellwig 	INIT_LIST_HEAD(&queue->free_rsps);
11178f000cacSChristoph Hellwig 	spin_lock_init(&queue->rsps_lock);
1118766dbb17SSagi Grimberg 	INIT_LIST_HEAD(&queue->queue_list);
11198f000cacSChristoph Hellwig 
11208f000cacSChristoph Hellwig 	queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL);
11218f000cacSChristoph Hellwig 	if (queue->idx < 0) {
11228f000cacSChristoph Hellwig 		ret = NVME_RDMA_CM_NO_RSC;
11236ccaeb56SChristophe JAILLET 		goto out_destroy_sq;
11248f000cacSChristoph Hellwig 	}
11258f000cacSChristoph Hellwig 
11268f000cacSChristoph Hellwig 	ret = nvmet_rdma_alloc_rsps(queue);
11278f000cacSChristoph Hellwig 	if (ret) {
11288f000cacSChristoph Hellwig 		ret = NVME_RDMA_CM_NO_RSC;
11298f000cacSChristoph Hellwig 		goto out_ida_remove;
11308f000cacSChristoph Hellwig 	}
11318f000cacSChristoph Hellwig 
11328f000cacSChristoph Hellwig 	if (!ndev->srq) {
11338f000cacSChristoph Hellwig 		queue->cmds = nvmet_rdma_alloc_cmds(ndev,
11348f000cacSChristoph Hellwig 				queue->recv_queue_size,
11358f000cacSChristoph Hellwig 				!queue->host_qid);
11368f000cacSChristoph Hellwig 		if (IS_ERR(queue->cmds)) {
11378f000cacSChristoph Hellwig 			ret = NVME_RDMA_CM_NO_RSC;
11388f000cacSChristoph Hellwig 			goto out_free_responses;
11398f000cacSChristoph Hellwig 		}
11408f000cacSChristoph Hellwig 	}
11418f000cacSChristoph Hellwig 
11428f000cacSChristoph Hellwig 	ret = nvmet_rdma_create_queue_ib(queue);
11438f000cacSChristoph Hellwig 	if (ret) {
11448f000cacSChristoph Hellwig 		pr_err("%s: creating RDMA queue failed (%d).\n",
11458f000cacSChristoph Hellwig 			__func__, ret);
11468f000cacSChristoph Hellwig 		ret = NVME_RDMA_CM_NO_RSC;
11478f000cacSChristoph Hellwig 		goto out_free_cmds;
11488f000cacSChristoph Hellwig 	}
11498f000cacSChristoph Hellwig 
11508f000cacSChristoph Hellwig 	return queue;
11518f000cacSChristoph Hellwig 
11528f000cacSChristoph Hellwig out_free_cmds:
11538f000cacSChristoph Hellwig 	if (!ndev->srq) {
11548f000cacSChristoph Hellwig 		nvmet_rdma_free_cmds(queue->dev, queue->cmds,
11558f000cacSChristoph Hellwig 				queue->recv_queue_size,
11568f000cacSChristoph Hellwig 				!queue->host_qid);
11578f000cacSChristoph Hellwig 	}
11588f000cacSChristoph Hellwig out_free_responses:
11598f000cacSChristoph Hellwig 	nvmet_rdma_free_rsps(queue);
11608f000cacSChristoph Hellwig out_ida_remove:
11618f000cacSChristoph Hellwig 	ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
11628f000cacSChristoph Hellwig out_destroy_sq:
11638f000cacSChristoph Hellwig 	nvmet_sq_destroy(&queue->nvme_sq);
11648f000cacSChristoph Hellwig out_free_queue:
11658f000cacSChristoph Hellwig 	kfree(queue);
11668f000cacSChristoph Hellwig out_reject:
11678f000cacSChristoph Hellwig 	nvmet_rdma_cm_reject(cm_id, ret);
11688f000cacSChristoph Hellwig 	return NULL;
11698f000cacSChristoph Hellwig }
11708f000cacSChristoph Hellwig 
11718f000cacSChristoph Hellwig static void nvmet_rdma_qp_event(struct ib_event *event, void *priv)
11728f000cacSChristoph Hellwig {
11738f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue = priv;
11748f000cacSChristoph Hellwig 
11758f000cacSChristoph Hellwig 	switch (event->event) {
11768f000cacSChristoph Hellwig 	case IB_EVENT_COMM_EST:
11778f000cacSChristoph Hellwig 		rdma_notify(queue->cm_id, event->event);
11788f000cacSChristoph Hellwig 		break;
11798f000cacSChristoph Hellwig 	default:
1180675796beSMax Gurtovoy 		pr_err("received IB QP event: %s (%d)\n",
1181675796beSMax Gurtovoy 		       ib_event_msg(event->event), event->event);
11828f000cacSChristoph Hellwig 		break;
11838f000cacSChristoph Hellwig 	}
11848f000cacSChristoph Hellwig }
11858f000cacSChristoph Hellwig 
11868f000cacSChristoph Hellwig static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id,
11878f000cacSChristoph Hellwig 		struct nvmet_rdma_queue *queue,
11888f000cacSChristoph Hellwig 		struct rdma_conn_param *p)
11898f000cacSChristoph Hellwig {
11908f000cacSChristoph Hellwig 	struct rdma_conn_param  param = { };
11918f000cacSChristoph Hellwig 	struct nvme_rdma_cm_rep priv = { };
11928f000cacSChristoph Hellwig 	int ret = -ENOMEM;
11938f000cacSChristoph Hellwig 
11948f000cacSChristoph Hellwig 	param.rnr_retry_count = 7;
11958f000cacSChristoph Hellwig 	param.flow_control = 1;
11968f000cacSChristoph Hellwig 	param.initiator_depth = min_t(u8, p->initiator_depth,
11978f000cacSChristoph Hellwig 		queue->dev->device->attrs.max_qp_init_rd_atom);
11988f000cacSChristoph Hellwig 	param.private_data = &priv;
11998f000cacSChristoph Hellwig 	param.private_data_len = sizeof(priv);
12008f000cacSChristoph Hellwig 	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
12018f000cacSChristoph Hellwig 	priv.crqsize = cpu_to_le16(queue->recv_queue_size);
12028f000cacSChristoph Hellwig 
12038f000cacSChristoph Hellwig 	ret = rdma_accept(cm_id, &param);
12048f000cacSChristoph Hellwig 	if (ret)
12058f000cacSChristoph Hellwig 		pr_err("rdma_accept failed (error code = %d)\n", ret);
12068f000cacSChristoph Hellwig 
12078f000cacSChristoph Hellwig 	return ret;
12088f000cacSChristoph Hellwig }
12098f000cacSChristoph Hellwig 
12108f000cacSChristoph Hellwig static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id,
12118f000cacSChristoph Hellwig 		struct rdma_cm_event *event)
12128f000cacSChristoph Hellwig {
12138f000cacSChristoph Hellwig 	struct nvmet_rdma_device *ndev;
12148f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue;
12158f000cacSChristoph Hellwig 	int ret = -EINVAL;
12168f000cacSChristoph Hellwig 
12178f000cacSChristoph Hellwig 	ndev = nvmet_rdma_find_get_device(cm_id);
12188f000cacSChristoph Hellwig 	if (!ndev) {
12198f000cacSChristoph Hellwig 		nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC);
12208f000cacSChristoph Hellwig 		return -ECONNREFUSED;
12218f000cacSChristoph Hellwig 	}
12228f000cacSChristoph Hellwig 
12238f000cacSChristoph Hellwig 	queue = nvmet_rdma_alloc_queue(ndev, cm_id, event);
12248f000cacSChristoph Hellwig 	if (!queue) {
12258f000cacSChristoph Hellwig 		ret = -ENOMEM;
12268f000cacSChristoph Hellwig 		goto put_device;
12278f000cacSChristoph Hellwig 	}
12288f000cacSChristoph Hellwig 	queue->port = cm_id->context;
12298f000cacSChristoph Hellwig 
1230777dc823SSagi Grimberg 	if (queue->host_qid == 0) {
1231777dc823SSagi Grimberg 		/* Let inflight controller teardown complete */
1232777dc823SSagi Grimberg 		flush_scheduled_work();
1233777dc823SSagi Grimberg 	}
1234777dc823SSagi Grimberg 
12358f000cacSChristoph Hellwig 	ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn);
1236e1a2ee24SIsrael Rukshin 	if (ret) {
1237e1a2ee24SIsrael Rukshin 		schedule_work(&queue->release_work);
1238e1a2ee24SIsrael Rukshin 		/* Destroying rdma_cm id is not needed here */
1239e1a2ee24SIsrael Rukshin 		return 0;
1240e1a2ee24SIsrael Rukshin 	}
12418f000cacSChristoph Hellwig 
12428f000cacSChristoph Hellwig 	mutex_lock(&nvmet_rdma_queue_mutex);
12438f000cacSChristoph Hellwig 	list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list);
12448f000cacSChristoph Hellwig 	mutex_unlock(&nvmet_rdma_queue_mutex);
12458f000cacSChristoph Hellwig 
12468f000cacSChristoph Hellwig 	return 0;
12478f000cacSChristoph Hellwig 
12488f000cacSChristoph Hellwig put_device:
12498f000cacSChristoph Hellwig 	kref_put(&ndev->ref, nvmet_rdma_free_dev);
12508f000cacSChristoph Hellwig 
12518f000cacSChristoph Hellwig 	return ret;
12528f000cacSChristoph Hellwig }
12538f000cacSChristoph Hellwig 
12548f000cacSChristoph Hellwig static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue)
12558f000cacSChristoph Hellwig {
12568f000cacSChristoph Hellwig 	unsigned long flags;
12578f000cacSChristoph Hellwig 
12588f000cacSChristoph Hellwig 	spin_lock_irqsave(&queue->state_lock, flags);
12598f000cacSChristoph Hellwig 	if (queue->state != NVMET_RDMA_Q_CONNECTING) {
12608f000cacSChristoph Hellwig 		pr_warn("trying to establish a connected queue\n");
12618f000cacSChristoph Hellwig 		goto out_unlock;
12628f000cacSChristoph Hellwig 	}
12638f000cacSChristoph Hellwig 	queue->state = NVMET_RDMA_Q_LIVE;
12648f000cacSChristoph Hellwig 
12658f000cacSChristoph Hellwig 	while (!list_empty(&queue->rsp_wait_list)) {
12668f000cacSChristoph Hellwig 		struct nvmet_rdma_rsp *cmd;
12678f000cacSChristoph Hellwig 
12688f000cacSChristoph Hellwig 		cmd = list_first_entry(&queue->rsp_wait_list,
12698f000cacSChristoph Hellwig 					struct nvmet_rdma_rsp, wait_list);
12708f000cacSChristoph Hellwig 		list_del(&cmd->wait_list);
12718f000cacSChristoph Hellwig 
12728f000cacSChristoph Hellwig 		spin_unlock_irqrestore(&queue->state_lock, flags);
12738f000cacSChristoph Hellwig 		nvmet_rdma_handle_command(queue, cmd);
12748f000cacSChristoph Hellwig 		spin_lock_irqsave(&queue->state_lock, flags);
12758f000cacSChristoph Hellwig 	}
12768f000cacSChristoph Hellwig 
12778f000cacSChristoph Hellwig out_unlock:
12788f000cacSChristoph Hellwig 	spin_unlock_irqrestore(&queue->state_lock, flags);
12798f000cacSChristoph Hellwig }
12808f000cacSChristoph Hellwig 
12818f000cacSChristoph Hellwig static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
12828f000cacSChristoph Hellwig {
12838f000cacSChristoph Hellwig 	bool disconnect = false;
12848f000cacSChristoph Hellwig 	unsigned long flags;
12858f000cacSChristoph Hellwig 
12868f000cacSChristoph Hellwig 	pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state);
12878f000cacSChristoph Hellwig 
12888f000cacSChristoph Hellwig 	spin_lock_irqsave(&queue->state_lock, flags);
12898f000cacSChristoph Hellwig 	switch (queue->state) {
12908f000cacSChristoph Hellwig 	case NVMET_RDMA_Q_CONNECTING:
12918f000cacSChristoph Hellwig 	case NVMET_RDMA_Q_LIVE:
12928f000cacSChristoph Hellwig 		queue->state = NVMET_RDMA_Q_DISCONNECTING;
1293d8f7750aSSagi Grimberg 		disconnect = true;
12948f000cacSChristoph Hellwig 		break;
12958f000cacSChristoph Hellwig 	case NVMET_RDMA_Q_DISCONNECTING:
12968f000cacSChristoph Hellwig 		break;
12978f000cacSChristoph Hellwig 	}
12988f000cacSChristoph Hellwig 	spin_unlock_irqrestore(&queue->state_lock, flags);
12998f000cacSChristoph Hellwig 
13008f000cacSChristoph Hellwig 	if (disconnect) {
13018f000cacSChristoph Hellwig 		rdma_disconnect(queue->cm_id);
13028f000cacSChristoph Hellwig 		schedule_work(&queue->release_work);
13038f000cacSChristoph Hellwig 	}
13048f000cacSChristoph Hellwig }
13058f000cacSChristoph Hellwig 
13068f000cacSChristoph Hellwig static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
13078f000cacSChristoph Hellwig {
13088f000cacSChristoph Hellwig 	bool disconnect = false;
13098f000cacSChristoph Hellwig 
13108f000cacSChristoph Hellwig 	mutex_lock(&nvmet_rdma_queue_mutex);
13118f000cacSChristoph Hellwig 	if (!list_empty(&queue->queue_list)) {
13128f000cacSChristoph Hellwig 		list_del_init(&queue->queue_list);
13138f000cacSChristoph Hellwig 		disconnect = true;
13148f000cacSChristoph Hellwig 	}
13158f000cacSChristoph Hellwig 	mutex_unlock(&nvmet_rdma_queue_mutex);
13168f000cacSChristoph Hellwig 
13178f000cacSChristoph Hellwig 	if (disconnect)
13188f000cacSChristoph Hellwig 		__nvmet_rdma_queue_disconnect(queue);
13198f000cacSChristoph Hellwig }
13208f000cacSChristoph Hellwig 
13218f000cacSChristoph Hellwig static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id,
13228f000cacSChristoph Hellwig 		struct nvmet_rdma_queue *queue)
13238f000cacSChristoph Hellwig {
13248f000cacSChristoph Hellwig 	WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
13258f000cacSChristoph Hellwig 
1326766dbb17SSagi Grimberg 	mutex_lock(&nvmet_rdma_queue_mutex);
1327766dbb17SSagi Grimberg 	if (!list_empty(&queue->queue_list))
1328766dbb17SSagi Grimberg 		list_del_init(&queue->queue_list);
1329766dbb17SSagi Grimberg 	mutex_unlock(&nvmet_rdma_queue_mutex);
1330766dbb17SSagi Grimberg 
1331766dbb17SSagi Grimberg 	pr_err("failed to connect queue %d\n", queue->idx);
13328f000cacSChristoph Hellwig 	schedule_work(&queue->release_work);
13338f000cacSChristoph Hellwig }
13348f000cacSChristoph Hellwig 
1335d8f7750aSSagi Grimberg /**
1336d8f7750aSSagi Grimberg  * nvme_rdma_device_removal() - Handle RDMA device removal
1337f1d4ef7dSSagi Grimberg  * @cm_id:	rdma_cm id, used for nvmet port
1338d8f7750aSSagi Grimberg  * @queue:      nvmet rdma queue (cm id qp_context)
1339d8f7750aSSagi Grimberg  *
1340d8f7750aSSagi Grimberg  * DEVICE_REMOVAL event notifies us that the RDMA device is about
1341f1d4ef7dSSagi Grimberg  * to unplug. Note that this event can be generated on a normal
1342f1d4ef7dSSagi Grimberg  * queue cm_id and/or a device bound listener cm_id (where in this
1343f1d4ef7dSSagi Grimberg  * case queue will be null).
1344d8f7750aSSagi Grimberg  *
1345f1d4ef7dSSagi Grimberg  * We registered an ib_client to handle device removal for queues,
1346f1d4ef7dSSagi Grimberg  * so we only need to handle the listening port cm_ids. In this case
1347d8f7750aSSagi Grimberg  * we nullify the priv to prevent double cm_id destruction and destroying
1348d8f7750aSSagi Grimberg  * the cm_id implicitely by returning a non-zero rc to the callout.
1349d8f7750aSSagi Grimberg  */
1350d8f7750aSSagi Grimberg static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id,
1351d8f7750aSSagi Grimberg 		struct nvmet_rdma_queue *queue)
1352d8f7750aSSagi Grimberg {
1353f1d4ef7dSSagi Grimberg 	struct nvmet_port *port;
1354d8f7750aSSagi Grimberg 
1355f1d4ef7dSSagi Grimberg 	if (queue) {
1356f1d4ef7dSSagi Grimberg 		/*
1357f1d4ef7dSSagi Grimberg 		 * This is a queue cm_id. we have registered
1358f1d4ef7dSSagi Grimberg 		 * an ib_client to handle queues removal
1359f1d4ef7dSSagi Grimberg 		 * so don't interfear and just return.
1360f1d4ef7dSSagi Grimberg 		 */
1361f1d4ef7dSSagi Grimberg 		return 0;
1362f1d4ef7dSSagi Grimberg 	}
1363f1d4ef7dSSagi Grimberg 
1364f1d4ef7dSSagi Grimberg 	port = cm_id->context;
1365d8f7750aSSagi Grimberg 
1366d8f7750aSSagi Grimberg 	/*
1367d8f7750aSSagi Grimberg 	 * This is a listener cm_id. Make sure that
1368d8f7750aSSagi Grimberg 	 * future remove_port won't invoke a double
1369d8f7750aSSagi Grimberg 	 * cm_id destroy. use atomic xchg to make sure
1370d8f7750aSSagi Grimberg 	 * we don't compete with remove_port.
1371d8f7750aSSagi Grimberg 	 */
1372d8f7750aSSagi Grimberg 	if (xchg(&port->priv, NULL) != cm_id)
1373d8f7750aSSagi Grimberg 		return 0;
1374d8f7750aSSagi Grimberg 
1375d8f7750aSSagi Grimberg 	/*
1376d8f7750aSSagi Grimberg 	 * We need to return 1 so that the core will destroy
1377d8f7750aSSagi Grimberg 	 * it's own ID.  What a great API design..
1378d8f7750aSSagi Grimberg 	 */
1379d8f7750aSSagi Grimberg 	return 1;
1380d8f7750aSSagi Grimberg }
1381d8f7750aSSagi Grimberg 
13828f000cacSChristoph Hellwig static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id,
13838f000cacSChristoph Hellwig 		struct rdma_cm_event *event)
13848f000cacSChristoph Hellwig {
13858f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue = NULL;
13868f000cacSChristoph Hellwig 	int ret = 0;
13878f000cacSChristoph Hellwig 
13888f000cacSChristoph Hellwig 	if (cm_id->qp)
13898f000cacSChristoph Hellwig 		queue = cm_id->qp->qp_context;
13908f000cacSChristoph Hellwig 
13918f000cacSChristoph Hellwig 	pr_debug("%s (%d): status %d id %p\n",
13928f000cacSChristoph Hellwig 		rdma_event_msg(event->event), event->event,
13938f000cacSChristoph Hellwig 		event->status, cm_id);
13948f000cacSChristoph Hellwig 
13958f000cacSChristoph Hellwig 	switch (event->event) {
13968f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_CONNECT_REQUEST:
13978f000cacSChristoph Hellwig 		ret = nvmet_rdma_queue_connect(cm_id, event);
13988f000cacSChristoph Hellwig 		break;
13998f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_ESTABLISHED:
14008f000cacSChristoph Hellwig 		nvmet_rdma_queue_established(queue);
14018f000cacSChristoph Hellwig 		break;
14028f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_ADDR_CHANGE:
14038f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_DISCONNECTED:
14048f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
14058f000cacSChristoph Hellwig 		nvmet_rdma_queue_disconnect(queue);
1406d8f7750aSSagi Grimberg 		break;
1407d8f7750aSSagi Grimberg 	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1408d8f7750aSSagi Grimberg 		ret = nvmet_rdma_device_removal(cm_id, queue);
14098f000cacSChristoph Hellwig 		break;
14108f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_REJECTED:
1411512fb1b3SSteve Wise 		pr_debug("Connection rejected: %s\n",
1412512fb1b3SSteve Wise 			 rdma_reject_msg(cm_id, event->status));
1413512fb1b3SSteve Wise 		/* FALLTHROUGH */
14148f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_UNREACHABLE:
14158f000cacSChristoph Hellwig 	case RDMA_CM_EVENT_CONNECT_ERROR:
14168f000cacSChristoph Hellwig 		nvmet_rdma_queue_connect_fail(cm_id, queue);
14178f000cacSChristoph Hellwig 		break;
14188f000cacSChristoph Hellwig 	default:
14198f000cacSChristoph Hellwig 		pr_err("received unrecognized RDMA CM event %d\n",
14208f000cacSChristoph Hellwig 			event->event);
14218f000cacSChristoph Hellwig 		break;
14228f000cacSChristoph Hellwig 	}
14238f000cacSChristoph Hellwig 
14248f000cacSChristoph Hellwig 	return ret;
14258f000cacSChristoph Hellwig }
14268f000cacSChristoph Hellwig 
14278f000cacSChristoph Hellwig static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl)
14288f000cacSChristoph Hellwig {
14298f000cacSChristoph Hellwig 	struct nvmet_rdma_queue *queue;
14308f000cacSChristoph Hellwig 
14318f000cacSChristoph Hellwig restart:
14328f000cacSChristoph Hellwig 	mutex_lock(&nvmet_rdma_queue_mutex);
14338f000cacSChristoph Hellwig 	list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) {
14348f000cacSChristoph Hellwig 		if (queue->nvme_sq.ctrl == ctrl) {
14358f000cacSChristoph Hellwig 			list_del_init(&queue->queue_list);
14368f000cacSChristoph Hellwig 			mutex_unlock(&nvmet_rdma_queue_mutex);
14378f000cacSChristoph Hellwig 
14388f000cacSChristoph Hellwig 			__nvmet_rdma_queue_disconnect(queue);
14398f000cacSChristoph Hellwig 			goto restart;
14408f000cacSChristoph Hellwig 		}
14418f000cacSChristoph Hellwig 	}
14428f000cacSChristoph Hellwig 	mutex_unlock(&nvmet_rdma_queue_mutex);
14438f000cacSChristoph Hellwig }
14448f000cacSChristoph Hellwig 
14458f000cacSChristoph Hellwig static int nvmet_rdma_add_port(struct nvmet_port *port)
14468f000cacSChristoph Hellwig {
14478f000cacSChristoph Hellwig 	struct rdma_cm_id *cm_id;
1448670c2a3aSSagi Grimberg 	struct sockaddr_storage addr = { };
1449670c2a3aSSagi Grimberg 	__kernel_sa_family_t af;
14508f000cacSChristoph Hellwig 	int ret;
14518f000cacSChristoph Hellwig 
14528f000cacSChristoph Hellwig 	switch (port->disc_addr.adrfam) {
14538f000cacSChristoph Hellwig 	case NVMF_ADDR_FAMILY_IP4:
1454670c2a3aSSagi Grimberg 		af = AF_INET;
1455670c2a3aSSagi Grimberg 		break;
1456670c2a3aSSagi Grimberg 	case NVMF_ADDR_FAMILY_IP6:
1457670c2a3aSSagi Grimberg 		af = AF_INET6;
14588f000cacSChristoph Hellwig 		break;
14598f000cacSChristoph Hellwig 	default:
14608f000cacSChristoph Hellwig 		pr_err("address family %d not supported\n",
14618f000cacSChristoph Hellwig 				port->disc_addr.adrfam);
14628f000cacSChristoph Hellwig 		return -EINVAL;
14638f000cacSChristoph Hellwig 	}
14648f000cacSChristoph Hellwig 
1465*0d5ee2b2SSteve Wise 	if (port->inline_data_size < 0) {
1466*0d5ee2b2SSteve Wise 		port->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE;
1467*0d5ee2b2SSteve Wise 	} else if (port->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) {
1468*0d5ee2b2SSteve Wise 		pr_warn("inline_data_size %u is too large, reducing to %u\n",
1469*0d5ee2b2SSteve Wise 			port->inline_data_size,
1470*0d5ee2b2SSteve Wise 			NVMET_RDMA_MAX_INLINE_DATA_SIZE);
1471*0d5ee2b2SSteve Wise 		port->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE;
1472*0d5ee2b2SSteve Wise 	}
1473*0d5ee2b2SSteve Wise 
1474670c2a3aSSagi Grimberg 	ret = inet_pton_with_scope(&init_net, af, port->disc_addr.traddr,
1475670c2a3aSSagi Grimberg 			port->disc_addr.trsvcid, &addr);
1476670c2a3aSSagi Grimberg 	if (ret) {
1477670c2a3aSSagi Grimberg 		pr_err("malformed ip/port passed: %s:%s\n",
1478670c2a3aSSagi Grimberg 			port->disc_addr.traddr, port->disc_addr.trsvcid);
14798f000cacSChristoph Hellwig 		return ret;
1480670c2a3aSSagi Grimberg 	}
14818f000cacSChristoph Hellwig 
14828f000cacSChristoph Hellwig 	cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port,
14838f000cacSChristoph Hellwig 			RDMA_PS_TCP, IB_QPT_RC);
14848f000cacSChristoph Hellwig 	if (IS_ERR(cm_id)) {
14858f000cacSChristoph Hellwig 		pr_err("CM ID creation failed\n");
14868f000cacSChristoph Hellwig 		return PTR_ERR(cm_id);
14878f000cacSChristoph Hellwig 	}
14888f000cacSChristoph Hellwig 
1489670c2a3aSSagi Grimberg 	/*
1490670c2a3aSSagi Grimberg 	 * Allow both IPv4 and IPv6 sockets to bind a single port
1491670c2a3aSSagi Grimberg 	 * at the same time.
1492670c2a3aSSagi Grimberg 	 */
1493670c2a3aSSagi Grimberg 	ret = rdma_set_afonly(cm_id, 1);
14948f000cacSChristoph Hellwig 	if (ret) {
1495670c2a3aSSagi Grimberg 		pr_err("rdma_set_afonly failed (%d)\n", ret);
1496670c2a3aSSagi Grimberg 		goto out_destroy_id;
1497670c2a3aSSagi Grimberg 	}
1498670c2a3aSSagi Grimberg 
1499670c2a3aSSagi Grimberg 	ret = rdma_bind_addr(cm_id, (struct sockaddr *)&addr);
1500670c2a3aSSagi Grimberg 	if (ret) {
1501670c2a3aSSagi Grimberg 		pr_err("binding CM ID to %pISpcs failed (%d)\n",
1502670c2a3aSSagi Grimberg 			(struct sockaddr *)&addr, ret);
15038f000cacSChristoph Hellwig 		goto out_destroy_id;
15048f000cacSChristoph Hellwig 	}
15058f000cacSChristoph Hellwig 
15068f000cacSChristoph Hellwig 	ret = rdma_listen(cm_id, 128);
15078f000cacSChristoph Hellwig 	if (ret) {
1508670c2a3aSSagi Grimberg 		pr_err("listening to %pISpcs failed (%d)\n",
1509670c2a3aSSagi Grimberg 			(struct sockaddr *)&addr, ret);
15108f000cacSChristoph Hellwig 		goto out_destroy_id;
15118f000cacSChristoph Hellwig 	}
15128f000cacSChristoph Hellwig 
1513670c2a3aSSagi Grimberg 	pr_info("enabling port %d (%pISpcs)\n",
1514670c2a3aSSagi Grimberg 		le16_to_cpu(port->disc_addr.portid), (struct sockaddr *)&addr);
15158f000cacSChristoph Hellwig 	port->priv = cm_id;
15168f000cacSChristoph Hellwig 	return 0;
15178f000cacSChristoph Hellwig 
15188f000cacSChristoph Hellwig out_destroy_id:
15198f000cacSChristoph Hellwig 	rdma_destroy_id(cm_id);
15208f000cacSChristoph Hellwig 	return ret;
15218f000cacSChristoph Hellwig }
15228f000cacSChristoph Hellwig 
15238f000cacSChristoph Hellwig static void nvmet_rdma_remove_port(struct nvmet_port *port)
15248f000cacSChristoph Hellwig {
1525d8f7750aSSagi Grimberg 	struct rdma_cm_id *cm_id = xchg(&port->priv, NULL);
15268f000cacSChristoph Hellwig 
1527d8f7750aSSagi Grimberg 	if (cm_id)
15288f000cacSChristoph Hellwig 		rdma_destroy_id(cm_id);
15298f000cacSChristoph Hellwig }
15308f000cacSChristoph Hellwig 
15314c652685SSagi Grimberg static void nvmet_rdma_disc_port_addr(struct nvmet_req *req,
15324c652685SSagi Grimberg 		struct nvmet_port *port, char *traddr)
15334c652685SSagi Grimberg {
15344c652685SSagi Grimberg 	struct rdma_cm_id *cm_id = port->priv;
15354c652685SSagi Grimberg 
15364c652685SSagi Grimberg 	if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) {
15374c652685SSagi Grimberg 		struct nvmet_rdma_rsp *rsp =
15384c652685SSagi Grimberg 			container_of(req, struct nvmet_rdma_rsp, req);
15394c652685SSagi Grimberg 		struct rdma_cm_id *req_cm_id = rsp->queue->cm_id;
15404c652685SSagi Grimberg 		struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr;
15414c652685SSagi Grimberg 
15424c652685SSagi Grimberg 		sprintf(traddr, "%pISc", addr);
15434c652685SSagi Grimberg 	} else {
15444c652685SSagi Grimberg 		memcpy(traddr, port->disc_addr.traddr, NVMF_TRADDR_SIZE);
15454c652685SSagi Grimberg 	}
15464c652685SSagi Grimberg }
15474c652685SSagi Grimberg 
1548e929f06dSChristoph Hellwig static const struct nvmet_fabrics_ops nvmet_rdma_ops = {
15498f000cacSChristoph Hellwig 	.owner			= THIS_MODULE,
15508f000cacSChristoph Hellwig 	.type			= NVMF_TRTYPE_RDMA,
15518f000cacSChristoph Hellwig 	.msdbd			= 1,
15528f000cacSChristoph Hellwig 	.has_keyed_sgls		= 1,
15538f000cacSChristoph Hellwig 	.add_port		= nvmet_rdma_add_port,
15548f000cacSChristoph Hellwig 	.remove_port		= nvmet_rdma_remove_port,
15558f000cacSChristoph Hellwig 	.queue_response		= nvmet_rdma_queue_response,
15568f000cacSChristoph Hellwig 	.delete_ctrl		= nvmet_rdma_delete_ctrl,
15574c652685SSagi Grimberg 	.disc_traddr		= nvmet_rdma_disc_port_addr,
15588f000cacSChristoph Hellwig };
15598f000cacSChristoph Hellwig 
1560f1d4ef7dSSagi Grimberg static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data)
1561f1d4ef7dSSagi Grimberg {
156243b92fd2SIsrael Rukshin 	struct nvmet_rdma_queue *queue, *tmp;
1563a3dd7d00SMax Gurtovoy 	struct nvmet_rdma_device *ndev;
1564a3dd7d00SMax Gurtovoy 	bool found = false;
1565f1d4ef7dSSagi Grimberg 
1566a3dd7d00SMax Gurtovoy 	mutex_lock(&device_list_mutex);
1567a3dd7d00SMax Gurtovoy 	list_for_each_entry(ndev, &device_list, entry) {
1568a3dd7d00SMax Gurtovoy 		if (ndev->device == ib_device) {
1569a3dd7d00SMax Gurtovoy 			found = true;
1570a3dd7d00SMax Gurtovoy 			break;
1571a3dd7d00SMax Gurtovoy 		}
1572a3dd7d00SMax Gurtovoy 	}
1573a3dd7d00SMax Gurtovoy 	mutex_unlock(&device_list_mutex);
1574a3dd7d00SMax Gurtovoy 
1575a3dd7d00SMax Gurtovoy 	if (!found)
1576a3dd7d00SMax Gurtovoy 		return;
1577a3dd7d00SMax Gurtovoy 
1578a3dd7d00SMax Gurtovoy 	/*
1579a3dd7d00SMax Gurtovoy 	 * IB Device that is used by nvmet controllers is being removed,
1580a3dd7d00SMax Gurtovoy 	 * delete all queues using this device.
1581a3dd7d00SMax Gurtovoy 	 */
1582f1d4ef7dSSagi Grimberg 	mutex_lock(&nvmet_rdma_queue_mutex);
158343b92fd2SIsrael Rukshin 	list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list,
158443b92fd2SIsrael Rukshin 				 queue_list) {
1585f1d4ef7dSSagi Grimberg 		if (queue->dev->device != ib_device)
1586f1d4ef7dSSagi Grimberg 			continue;
1587f1d4ef7dSSagi Grimberg 
1588f1d4ef7dSSagi Grimberg 		pr_info("Removing queue %d\n", queue->idx);
158943b92fd2SIsrael Rukshin 		list_del_init(&queue->queue_list);
1590f1d4ef7dSSagi Grimberg 		__nvmet_rdma_queue_disconnect(queue);
1591f1d4ef7dSSagi Grimberg 	}
1592f1d4ef7dSSagi Grimberg 	mutex_unlock(&nvmet_rdma_queue_mutex);
1593f1d4ef7dSSagi Grimberg 
1594f1d4ef7dSSagi Grimberg 	flush_scheduled_work();
1595f1d4ef7dSSagi Grimberg }
1596f1d4ef7dSSagi Grimberg 
1597f1d4ef7dSSagi Grimberg static struct ib_client nvmet_rdma_ib_client = {
1598f1d4ef7dSSagi Grimberg 	.name   = "nvmet_rdma",
1599f1d4ef7dSSagi Grimberg 	.remove = nvmet_rdma_remove_one
1600f1d4ef7dSSagi Grimberg };
1601f1d4ef7dSSagi Grimberg 
16028f000cacSChristoph Hellwig static int __init nvmet_rdma_init(void)
16038f000cacSChristoph Hellwig {
1604f1d4ef7dSSagi Grimberg 	int ret;
1605f1d4ef7dSSagi Grimberg 
1606f1d4ef7dSSagi Grimberg 	ret = ib_register_client(&nvmet_rdma_ib_client);
1607f1d4ef7dSSagi Grimberg 	if (ret)
1608f1d4ef7dSSagi Grimberg 		return ret;
1609f1d4ef7dSSagi Grimberg 
1610f1d4ef7dSSagi Grimberg 	ret = nvmet_register_transport(&nvmet_rdma_ops);
1611f1d4ef7dSSagi Grimberg 	if (ret)
1612f1d4ef7dSSagi Grimberg 		goto err_ib_client;
1613f1d4ef7dSSagi Grimberg 
1614f1d4ef7dSSagi Grimberg 	return 0;
1615f1d4ef7dSSagi Grimberg 
1616f1d4ef7dSSagi Grimberg err_ib_client:
1617f1d4ef7dSSagi Grimberg 	ib_unregister_client(&nvmet_rdma_ib_client);
1618f1d4ef7dSSagi Grimberg 	return ret;
16198f000cacSChristoph Hellwig }
16208f000cacSChristoph Hellwig 
16218f000cacSChristoph Hellwig static void __exit nvmet_rdma_exit(void)
16228f000cacSChristoph Hellwig {
16238f000cacSChristoph Hellwig 	nvmet_unregister_transport(&nvmet_rdma_ops);
1624f1d4ef7dSSagi Grimberg 	ib_unregister_client(&nvmet_rdma_ib_client);
1625cb4876e8SSagi Grimberg 	WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list));
16268f000cacSChristoph Hellwig 	ida_destroy(&nvmet_rdma_queue_ida);
16278f000cacSChristoph Hellwig }
16288f000cacSChristoph Hellwig 
16298f000cacSChristoph Hellwig module_init(nvmet_rdma_init);
16308f000cacSChristoph Hellwig module_exit(nvmet_rdma_exit);
16318f000cacSChristoph Hellwig 
16328f000cacSChristoph Hellwig MODULE_LICENSE("GPL v2");
16338f000cacSChristoph Hellwig MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */
1634