xref: /openbmc/linux/drivers/nvme/host/rdma.c (revision fe45e630a1035aea94c29016f2598bbde149bbe3)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVMe over Fabrics RDMA host code.
4  * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5  */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <rdma/mr_pool.h>
11 #include <linux/err.h>
12 #include <linux/string.h>
13 #include <linux/atomic.h>
14 #include <linux/blk-mq.h>
15 #include <linux/blk-mq-rdma.h>
16 #include <linux/blk-integrity.h>
17 #include <linux/types.h>
18 #include <linux/list.h>
19 #include <linux/mutex.h>
20 #include <linux/scatterlist.h>
21 #include <linux/nvme.h>
22 #include <asm/unaligned.h>
23 
24 #include <rdma/ib_verbs.h>
25 #include <rdma/rdma_cm.h>
26 #include <linux/nvme-rdma.h>
27 
28 #include "nvme.h"
29 #include "fabrics.h"
30 
31 
32 #define NVME_RDMA_CONNECT_TIMEOUT_MS	3000		/* 3 second */
33 
34 #define NVME_RDMA_MAX_SEGMENTS		256
35 
36 #define NVME_RDMA_MAX_INLINE_SEGMENTS	4
37 
38 #define NVME_RDMA_DATA_SGL_SIZE \
39 	(sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
40 #define NVME_RDMA_METADATA_SGL_SIZE \
41 	(sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
42 
43 struct nvme_rdma_device {
44 	struct ib_device	*dev;
45 	struct ib_pd		*pd;
46 	struct kref		ref;
47 	struct list_head	entry;
48 	unsigned int		num_inline_segments;
49 };
50 
51 struct nvme_rdma_qe {
52 	struct ib_cqe		cqe;
53 	void			*data;
54 	u64			dma;
55 };
56 
57 struct nvme_rdma_sgl {
58 	int			nents;
59 	struct sg_table		sg_table;
60 };
61 
62 struct nvme_rdma_queue;
63 struct nvme_rdma_request {
64 	struct nvme_request	req;
65 	struct ib_mr		*mr;
66 	struct nvme_rdma_qe	sqe;
67 	union nvme_result	result;
68 	__le16			status;
69 	refcount_t		ref;
70 	struct ib_sge		sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
71 	u32			num_sge;
72 	struct ib_reg_wr	reg_wr;
73 	struct ib_cqe		reg_cqe;
74 	struct nvme_rdma_queue  *queue;
75 	struct nvme_rdma_sgl	data_sgl;
76 	struct nvme_rdma_sgl	*metadata_sgl;
77 	bool			use_sig_mr;
78 };
79 
80 enum nvme_rdma_queue_flags {
81 	NVME_RDMA_Q_ALLOCATED		= 0,
82 	NVME_RDMA_Q_LIVE		= 1,
83 	NVME_RDMA_Q_TR_READY		= 2,
84 };
85 
86 struct nvme_rdma_queue {
87 	struct nvme_rdma_qe	*rsp_ring;
88 	int			queue_size;
89 	size_t			cmnd_capsule_len;
90 	struct nvme_rdma_ctrl	*ctrl;
91 	struct nvme_rdma_device	*device;
92 	struct ib_cq		*ib_cq;
93 	struct ib_qp		*qp;
94 
95 	unsigned long		flags;
96 	struct rdma_cm_id	*cm_id;
97 	int			cm_error;
98 	struct completion	cm_done;
99 	bool			pi_support;
100 	int			cq_size;
101 	struct mutex		queue_lock;
102 };
103 
104 struct nvme_rdma_ctrl {
105 	/* read only in the hot path */
106 	struct nvme_rdma_queue	*queues;
107 
108 	/* other member variables */
109 	struct blk_mq_tag_set	tag_set;
110 	struct work_struct	err_work;
111 
112 	struct nvme_rdma_qe	async_event_sqe;
113 
114 	struct delayed_work	reconnect_work;
115 
116 	struct list_head	list;
117 
118 	struct blk_mq_tag_set	admin_tag_set;
119 	struct nvme_rdma_device	*device;
120 
121 	u32			max_fr_pages;
122 
123 	struct sockaddr_storage addr;
124 	struct sockaddr_storage src_addr;
125 
126 	struct nvme_ctrl	ctrl;
127 	bool			use_inline_data;
128 	u32			io_queues[HCTX_MAX_TYPES];
129 };
130 
131 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
132 {
133 	return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
134 }
135 
136 static LIST_HEAD(device_list);
137 static DEFINE_MUTEX(device_list_mutex);
138 
139 static LIST_HEAD(nvme_rdma_ctrl_list);
140 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
141 
142 /*
143  * Disabling this option makes small I/O goes faster, but is fundamentally
144  * unsafe.  With it turned off we will have to register a global rkey that
145  * allows read and write access to all physical memory.
146  */
147 static bool register_always = true;
148 module_param(register_always, bool, 0444);
149 MODULE_PARM_DESC(register_always,
150 	 "Use memory registration even for contiguous memory regions");
151 
152 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
153 		struct rdma_cm_event *event);
154 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
155 static void nvme_rdma_complete_rq(struct request *rq);
156 
157 static const struct blk_mq_ops nvme_rdma_mq_ops;
158 static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
159 
160 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
161 {
162 	return queue - queue->ctrl->queues;
163 }
164 
165 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
166 {
167 	return nvme_rdma_queue_idx(queue) >
168 		queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
169 		queue->ctrl->io_queues[HCTX_TYPE_READ];
170 }
171 
172 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
173 {
174 	return queue->cmnd_capsule_len - sizeof(struct nvme_command);
175 }
176 
177 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 		size_t capsule_size, enum dma_data_direction dir)
179 {
180 	ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
181 	kfree(qe->data);
182 }
183 
184 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
185 		size_t capsule_size, enum dma_data_direction dir)
186 {
187 	qe->data = kzalloc(capsule_size, GFP_KERNEL);
188 	if (!qe->data)
189 		return -ENOMEM;
190 
191 	qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
192 	if (ib_dma_mapping_error(ibdev, qe->dma)) {
193 		kfree(qe->data);
194 		qe->data = NULL;
195 		return -ENOMEM;
196 	}
197 
198 	return 0;
199 }
200 
201 static void nvme_rdma_free_ring(struct ib_device *ibdev,
202 		struct nvme_rdma_qe *ring, size_t ib_queue_size,
203 		size_t capsule_size, enum dma_data_direction dir)
204 {
205 	int i;
206 
207 	for (i = 0; i < ib_queue_size; i++)
208 		nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
209 	kfree(ring);
210 }
211 
212 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
213 		size_t ib_queue_size, size_t capsule_size,
214 		enum dma_data_direction dir)
215 {
216 	struct nvme_rdma_qe *ring;
217 	int i;
218 
219 	ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
220 	if (!ring)
221 		return NULL;
222 
223 	/*
224 	 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
225 	 * lifetime. It's safe, since any chage in the underlying RDMA device
226 	 * will issue error recovery and queue re-creation.
227 	 */
228 	for (i = 0; i < ib_queue_size; i++) {
229 		if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
230 			goto out_free_ring;
231 	}
232 
233 	return ring;
234 
235 out_free_ring:
236 	nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
237 	return NULL;
238 }
239 
240 static void nvme_rdma_qp_event(struct ib_event *event, void *context)
241 {
242 	pr_debug("QP event %s (%d)\n",
243 		 ib_event_msg(event->event), event->event);
244 
245 }
246 
247 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
248 {
249 	int ret;
250 
251 	ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
252 			msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
253 	if (ret < 0)
254 		return ret;
255 	if (ret == 0)
256 		return -ETIMEDOUT;
257 	WARN_ON_ONCE(queue->cm_error > 0);
258 	return queue->cm_error;
259 }
260 
261 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
262 {
263 	struct nvme_rdma_device *dev = queue->device;
264 	struct ib_qp_init_attr init_attr;
265 	int ret;
266 
267 	memset(&init_attr, 0, sizeof(init_attr));
268 	init_attr.event_handler = nvme_rdma_qp_event;
269 	/* +1 for drain */
270 	init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
271 	/* +1 for drain */
272 	init_attr.cap.max_recv_wr = queue->queue_size + 1;
273 	init_attr.cap.max_recv_sge = 1;
274 	init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
275 	init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
276 	init_attr.qp_type = IB_QPT_RC;
277 	init_attr.send_cq = queue->ib_cq;
278 	init_attr.recv_cq = queue->ib_cq;
279 	if (queue->pi_support)
280 		init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
281 	init_attr.qp_context = queue;
282 
283 	ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
284 
285 	queue->qp = queue->cm_id->qp;
286 	return ret;
287 }
288 
289 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
290 		struct request *rq, unsigned int hctx_idx)
291 {
292 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
293 
294 	kfree(req->sqe.data);
295 }
296 
297 static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
298 		struct request *rq, unsigned int hctx_idx,
299 		unsigned int numa_node)
300 {
301 	struct nvme_rdma_ctrl *ctrl = set->driver_data;
302 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
303 	int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
304 	struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
305 
306 	nvme_req(rq)->ctrl = &ctrl->ctrl;
307 	req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
308 	if (!req->sqe.data)
309 		return -ENOMEM;
310 
311 	/* metadata nvme_rdma_sgl struct is located after command's data SGL */
312 	if (queue->pi_support)
313 		req->metadata_sgl = (void *)nvme_req(rq) +
314 			sizeof(struct nvme_rdma_request) +
315 			NVME_RDMA_DATA_SGL_SIZE;
316 
317 	req->queue = queue;
318 	nvme_req(rq)->cmd = req->sqe.data;
319 
320 	return 0;
321 }
322 
323 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
324 		unsigned int hctx_idx)
325 {
326 	struct nvme_rdma_ctrl *ctrl = data;
327 	struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
328 
329 	BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
330 
331 	hctx->driver_data = queue;
332 	return 0;
333 }
334 
335 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
336 		unsigned int hctx_idx)
337 {
338 	struct nvme_rdma_ctrl *ctrl = data;
339 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
340 
341 	BUG_ON(hctx_idx != 0);
342 
343 	hctx->driver_data = queue;
344 	return 0;
345 }
346 
347 static void nvme_rdma_free_dev(struct kref *ref)
348 {
349 	struct nvme_rdma_device *ndev =
350 		container_of(ref, struct nvme_rdma_device, ref);
351 
352 	mutex_lock(&device_list_mutex);
353 	list_del(&ndev->entry);
354 	mutex_unlock(&device_list_mutex);
355 
356 	ib_dealloc_pd(ndev->pd);
357 	kfree(ndev);
358 }
359 
360 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
361 {
362 	kref_put(&dev->ref, nvme_rdma_free_dev);
363 }
364 
365 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
366 {
367 	return kref_get_unless_zero(&dev->ref);
368 }
369 
370 static struct nvme_rdma_device *
371 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
372 {
373 	struct nvme_rdma_device *ndev;
374 
375 	mutex_lock(&device_list_mutex);
376 	list_for_each_entry(ndev, &device_list, entry) {
377 		if (ndev->dev->node_guid == cm_id->device->node_guid &&
378 		    nvme_rdma_dev_get(ndev))
379 			goto out_unlock;
380 	}
381 
382 	ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
383 	if (!ndev)
384 		goto out_err;
385 
386 	ndev->dev = cm_id->device;
387 	kref_init(&ndev->ref);
388 
389 	ndev->pd = ib_alloc_pd(ndev->dev,
390 		register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
391 	if (IS_ERR(ndev->pd))
392 		goto out_free_dev;
393 
394 	if (!(ndev->dev->attrs.device_cap_flags &
395 	      IB_DEVICE_MEM_MGT_EXTENSIONS)) {
396 		dev_err(&ndev->dev->dev,
397 			"Memory registrations not supported.\n");
398 		goto out_free_pd;
399 	}
400 
401 	ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
402 					ndev->dev->attrs.max_send_sge - 1);
403 	list_add(&ndev->entry, &device_list);
404 out_unlock:
405 	mutex_unlock(&device_list_mutex);
406 	return ndev;
407 
408 out_free_pd:
409 	ib_dealloc_pd(ndev->pd);
410 out_free_dev:
411 	kfree(ndev);
412 out_err:
413 	mutex_unlock(&device_list_mutex);
414 	return NULL;
415 }
416 
417 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
418 {
419 	if (nvme_rdma_poll_queue(queue))
420 		ib_free_cq(queue->ib_cq);
421 	else
422 		ib_cq_pool_put(queue->ib_cq, queue->cq_size);
423 }
424 
425 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
426 {
427 	struct nvme_rdma_device *dev;
428 	struct ib_device *ibdev;
429 
430 	if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
431 		return;
432 
433 	dev = queue->device;
434 	ibdev = dev->dev;
435 
436 	if (queue->pi_support)
437 		ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
438 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
439 
440 	/*
441 	 * The cm_id object might have been destroyed during RDMA connection
442 	 * establishment error flow to avoid getting other cma events, thus
443 	 * the destruction of the QP shouldn't use rdma_cm API.
444 	 */
445 	ib_destroy_qp(queue->qp);
446 	nvme_rdma_free_cq(queue);
447 
448 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
449 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
450 
451 	nvme_rdma_dev_put(dev);
452 }
453 
454 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
455 {
456 	u32 max_page_list_len;
457 
458 	if (pi_support)
459 		max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
460 	else
461 		max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
462 
463 	return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
464 }
465 
466 static int nvme_rdma_create_cq(struct ib_device *ibdev,
467 		struct nvme_rdma_queue *queue)
468 {
469 	int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
470 	enum ib_poll_context poll_ctx;
471 
472 	/*
473 	 * Spread I/O queues completion vectors according their queue index.
474 	 * Admin queues can always go on completion vector 0.
475 	 */
476 	comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
477 
478 	/* Polling queues need direct cq polling context */
479 	if (nvme_rdma_poll_queue(queue)) {
480 		poll_ctx = IB_POLL_DIRECT;
481 		queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
482 					   comp_vector, poll_ctx);
483 	} else {
484 		poll_ctx = IB_POLL_SOFTIRQ;
485 		queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
486 					      comp_vector, poll_ctx);
487 	}
488 
489 	if (IS_ERR(queue->ib_cq)) {
490 		ret = PTR_ERR(queue->ib_cq);
491 		return ret;
492 	}
493 
494 	return 0;
495 }
496 
497 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
498 {
499 	struct ib_device *ibdev;
500 	const int send_wr_factor = 3;			/* MR, SEND, INV */
501 	const int cq_factor = send_wr_factor + 1;	/* + RECV */
502 	int ret, pages_per_mr;
503 
504 	queue->device = nvme_rdma_find_get_device(queue->cm_id);
505 	if (!queue->device) {
506 		dev_err(queue->cm_id->device->dev.parent,
507 			"no client data found!\n");
508 		return -ECONNREFUSED;
509 	}
510 	ibdev = queue->device->dev;
511 
512 	/* +1 for ib_stop_cq */
513 	queue->cq_size = cq_factor * queue->queue_size + 1;
514 
515 	ret = nvme_rdma_create_cq(ibdev, queue);
516 	if (ret)
517 		goto out_put_dev;
518 
519 	ret = nvme_rdma_create_qp(queue, send_wr_factor);
520 	if (ret)
521 		goto out_destroy_ib_cq;
522 
523 	queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
524 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
525 	if (!queue->rsp_ring) {
526 		ret = -ENOMEM;
527 		goto out_destroy_qp;
528 	}
529 
530 	/*
531 	 * Currently we don't use SG_GAPS MR's so if the first entry is
532 	 * misaligned we'll end up using two entries for a single data page,
533 	 * so one additional entry is required.
534 	 */
535 	pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
536 	ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
537 			      queue->queue_size,
538 			      IB_MR_TYPE_MEM_REG,
539 			      pages_per_mr, 0);
540 	if (ret) {
541 		dev_err(queue->ctrl->ctrl.device,
542 			"failed to initialize MR pool sized %d for QID %d\n",
543 			queue->queue_size, nvme_rdma_queue_idx(queue));
544 		goto out_destroy_ring;
545 	}
546 
547 	if (queue->pi_support) {
548 		ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
549 				      queue->queue_size, IB_MR_TYPE_INTEGRITY,
550 				      pages_per_mr, pages_per_mr);
551 		if (ret) {
552 			dev_err(queue->ctrl->ctrl.device,
553 				"failed to initialize PI MR pool sized %d for QID %d\n",
554 				queue->queue_size, nvme_rdma_queue_idx(queue));
555 			goto out_destroy_mr_pool;
556 		}
557 	}
558 
559 	set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
560 
561 	return 0;
562 
563 out_destroy_mr_pool:
564 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
565 out_destroy_ring:
566 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
567 			    sizeof(struct nvme_completion), DMA_FROM_DEVICE);
568 out_destroy_qp:
569 	rdma_destroy_qp(queue->cm_id);
570 out_destroy_ib_cq:
571 	nvme_rdma_free_cq(queue);
572 out_put_dev:
573 	nvme_rdma_dev_put(queue->device);
574 	return ret;
575 }
576 
577 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
578 		int idx, size_t queue_size)
579 {
580 	struct nvme_rdma_queue *queue;
581 	struct sockaddr *src_addr = NULL;
582 	int ret;
583 
584 	queue = &ctrl->queues[idx];
585 	mutex_init(&queue->queue_lock);
586 	queue->ctrl = ctrl;
587 	if (idx && ctrl->ctrl.max_integrity_segments)
588 		queue->pi_support = true;
589 	else
590 		queue->pi_support = false;
591 	init_completion(&queue->cm_done);
592 
593 	if (idx > 0)
594 		queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
595 	else
596 		queue->cmnd_capsule_len = sizeof(struct nvme_command);
597 
598 	queue->queue_size = queue_size;
599 
600 	queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
601 			RDMA_PS_TCP, IB_QPT_RC);
602 	if (IS_ERR(queue->cm_id)) {
603 		dev_info(ctrl->ctrl.device,
604 			"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
605 		ret = PTR_ERR(queue->cm_id);
606 		goto out_destroy_mutex;
607 	}
608 
609 	if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
610 		src_addr = (struct sockaddr *)&ctrl->src_addr;
611 
612 	queue->cm_error = -ETIMEDOUT;
613 	ret = rdma_resolve_addr(queue->cm_id, src_addr,
614 			(struct sockaddr *)&ctrl->addr,
615 			NVME_RDMA_CONNECT_TIMEOUT_MS);
616 	if (ret) {
617 		dev_info(ctrl->ctrl.device,
618 			"rdma_resolve_addr failed (%d).\n", ret);
619 		goto out_destroy_cm_id;
620 	}
621 
622 	ret = nvme_rdma_wait_for_cm(queue);
623 	if (ret) {
624 		dev_info(ctrl->ctrl.device,
625 			"rdma connection establishment failed (%d)\n", ret);
626 		goto out_destroy_cm_id;
627 	}
628 
629 	set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
630 
631 	return 0;
632 
633 out_destroy_cm_id:
634 	rdma_destroy_id(queue->cm_id);
635 	nvme_rdma_destroy_queue_ib(queue);
636 out_destroy_mutex:
637 	mutex_destroy(&queue->queue_lock);
638 	return ret;
639 }
640 
641 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
642 {
643 	rdma_disconnect(queue->cm_id);
644 	ib_drain_qp(queue->qp);
645 }
646 
647 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
648 {
649 	mutex_lock(&queue->queue_lock);
650 	if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
651 		__nvme_rdma_stop_queue(queue);
652 	mutex_unlock(&queue->queue_lock);
653 }
654 
655 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
656 {
657 	if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
658 		return;
659 
660 	rdma_destroy_id(queue->cm_id);
661 	nvme_rdma_destroy_queue_ib(queue);
662 	mutex_destroy(&queue->queue_lock);
663 }
664 
665 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
666 {
667 	int i;
668 
669 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
670 		nvme_rdma_free_queue(&ctrl->queues[i]);
671 }
672 
673 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
674 {
675 	int i;
676 
677 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
678 		nvme_rdma_stop_queue(&ctrl->queues[i]);
679 }
680 
681 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
682 {
683 	struct nvme_rdma_queue *queue = &ctrl->queues[idx];
684 	int ret;
685 
686 	if (idx)
687 		ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
688 	else
689 		ret = nvmf_connect_admin_queue(&ctrl->ctrl);
690 
691 	if (!ret) {
692 		set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
693 	} else {
694 		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
695 			__nvme_rdma_stop_queue(queue);
696 		dev_info(ctrl->ctrl.device,
697 			"failed to connect queue: %d ret=%d\n", idx, ret);
698 	}
699 	return ret;
700 }
701 
702 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
703 {
704 	int i, ret = 0;
705 
706 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
707 		ret = nvme_rdma_start_queue(ctrl, i);
708 		if (ret)
709 			goto out_stop_queues;
710 	}
711 
712 	return 0;
713 
714 out_stop_queues:
715 	for (i--; i >= 1; i--)
716 		nvme_rdma_stop_queue(&ctrl->queues[i]);
717 	return ret;
718 }
719 
720 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
721 {
722 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
723 	struct ib_device *ibdev = ctrl->device->dev;
724 	unsigned int nr_io_queues, nr_default_queues;
725 	unsigned int nr_read_queues, nr_poll_queues;
726 	int i, ret;
727 
728 	nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
729 				min(opts->nr_io_queues, num_online_cpus()));
730 	nr_default_queues =  min_t(unsigned int, ibdev->num_comp_vectors,
731 				min(opts->nr_write_queues, num_online_cpus()));
732 	nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
733 	nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
734 
735 	ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
736 	if (ret)
737 		return ret;
738 
739 	if (nr_io_queues == 0) {
740 		dev_err(ctrl->ctrl.device,
741 			"unable to set any I/O queues\n");
742 		return -ENOMEM;
743 	}
744 
745 	ctrl->ctrl.queue_count = nr_io_queues + 1;
746 	dev_info(ctrl->ctrl.device,
747 		"creating %d I/O queues.\n", nr_io_queues);
748 
749 	if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
750 		/*
751 		 * separate read/write queues
752 		 * hand out dedicated default queues only after we have
753 		 * sufficient read queues.
754 		 */
755 		ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
756 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
757 		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
758 			min(nr_default_queues, nr_io_queues);
759 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
760 	} else {
761 		/*
762 		 * shared read/write queues
763 		 * either no write queues were requested, or we don't have
764 		 * sufficient queue count to have dedicated default queues.
765 		 */
766 		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
767 			min(nr_read_queues, nr_io_queues);
768 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
769 	}
770 
771 	if (opts->nr_poll_queues && nr_io_queues) {
772 		/* map dedicated poll queues only if we have queues left */
773 		ctrl->io_queues[HCTX_TYPE_POLL] =
774 			min(nr_poll_queues, nr_io_queues);
775 	}
776 
777 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
778 		ret = nvme_rdma_alloc_queue(ctrl, i,
779 				ctrl->ctrl.sqsize + 1);
780 		if (ret)
781 			goto out_free_queues;
782 	}
783 
784 	return 0;
785 
786 out_free_queues:
787 	for (i--; i >= 1; i--)
788 		nvme_rdma_free_queue(&ctrl->queues[i]);
789 
790 	return ret;
791 }
792 
793 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
794 		bool admin)
795 {
796 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
797 	struct blk_mq_tag_set *set;
798 	int ret;
799 
800 	if (admin) {
801 		set = &ctrl->admin_tag_set;
802 		memset(set, 0, sizeof(*set));
803 		set->ops = &nvme_rdma_admin_mq_ops;
804 		set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
805 		set->reserved_tags = NVMF_RESERVED_TAGS;
806 		set->numa_node = nctrl->numa_node;
807 		set->cmd_size = sizeof(struct nvme_rdma_request) +
808 				NVME_RDMA_DATA_SGL_SIZE;
809 		set->driver_data = ctrl;
810 		set->nr_hw_queues = 1;
811 		set->timeout = NVME_ADMIN_TIMEOUT;
812 		set->flags = BLK_MQ_F_NO_SCHED;
813 	} else {
814 		set = &ctrl->tag_set;
815 		memset(set, 0, sizeof(*set));
816 		set->ops = &nvme_rdma_mq_ops;
817 		set->queue_depth = nctrl->sqsize + 1;
818 		set->reserved_tags = NVMF_RESERVED_TAGS;
819 		set->numa_node = nctrl->numa_node;
820 		set->flags = BLK_MQ_F_SHOULD_MERGE;
821 		set->cmd_size = sizeof(struct nvme_rdma_request) +
822 				NVME_RDMA_DATA_SGL_SIZE;
823 		if (nctrl->max_integrity_segments)
824 			set->cmd_size += sizeof(struct nvme_rdma_sgl) +
825 					 NVME_RDMA_METADATA_SGL_SIZE;
826 		set->driver_data = ctrl;
827 		set->nr_hw_queues = nctrl->queue_count - 1;
828 		set->timeout = NVME_IO_TIMEOUT;
829 		set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
830 	}
831 
832 	ret = blk_mq_alloc_tag_set(set);
833 	if (ret)
834 		return ERR_PTR(ret);
835 
836 	return set;
837 }
838 
839 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
840 		bool remove)
841 {
842 	if (remove) {
843 		blk_cleanup_queue(ctrl->ctrl.admin_q);
844 		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
845 		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
846 	}
847 	if (ctrl->async_event_sqe.data) {
848 		cancel_work_sync(&ctrl->ctrl.async_event_work);
849 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
850 				sizeof(struct nvme_command), DMA_TO_DEVICE);
851 		ctrl->async_event_sqe.data = NULL;
852 	}
853 	nvme_rdma_free_queue(&ctrl->queues[0]);
854 }
855 
856 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
857 		bool new)
858 {
859 	bool pi_capable = false;
860 	int error;
861 
862 	error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
863 	if (error)
864 		return error;
865 
866 	ctrl->device = ctrl->queues[0].device;
867 	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
868 
869 	/* T10-PI support */
870 	if (ctrl->device->dev->attrs.device_cap_flags &
871 	    IB_DEVICE_INTEGRITY_HANDOVER)
872 		pi_capable = true;
873 
874 	ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
875 							pi_capable);
876 
877 	/*
878 	 * Bind the async event SQE DMA mapping to the admin queue lifetime.
879 	 * It's safe, since any chage in the underlying RDMA device will issue
880 	 * error recovery and queue re-creation.
881 	 */
882 	error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
883 			sizeof(struct nvme_command), DMA_TO_DEVICE);
884 	if (error)
885 		goto out_free_queue;
886 
887 	if (new) {
888 		ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
889 		if (IS_ERR(ctrl->ctrl.admin_tagset)) {
890 			error = PTR_ERR(ctrl->ctrl.admin_tagset);
891 			goto out_free_async_qe;
892 		}
893 
894 		ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
895 		if (IS_ERR(ctrl->ctrl.fabrics_q)) {
896 			error = PTR_ERR(ctrl->ctrl.fabrics_q);
897 			goto out_free_tagset;
898 		}
899 
900 		ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
901 		if (IS_ERR(ctrl->ctrl.admin_q)) {
902 			error = PTR_ERR(ctrl->ctrl.admin_q);
903 			goto out_cleanup_fabrics_q;
904 		}
905 	}
906 
907 	error = nvme_rdma_start_queue(ctrl, 0);
908 	if (error)
909 		goto out_cleanup_queue;
910 
911 	error = nvme_enable_ctrl(&ctrl->ctrl);
912 	if (error)
913 		goto out_stop_queue;
914 
915 	ctrl->ctrl.max_segments = ctrl->max_fr_pages;
916 	ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
917 	if (pi_capable)
918 		ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
919 	else
920 		ctrl->ctrl.max_integrity_segments = 0;
921 
922 	blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
923 
924 	error = nvme_init_ctrl_finish(&ctrl->ctrl);
925 	if (error)
926 		goto out_quiesce_queue;
927 
928 	return 0;
929 
930 out_quiesce_queue:
931 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
932 	blk_sync_queue(ctrl->ctrl.admin_q);
933 out_stop_queue:
934 	nvme_rdma_stop_queue(&ctrl->queues[0]);
935 	nvme_cancel_admin_tagset(&ctrl->ctrl);
936 out_cleanup_queue:
937 	if (new)
938 		blk_cleanup_queue(ctrl->ctrl.admin_q);
939 out_cleanup_fabrics_q:
940 	if (new)
941 		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
942 out_free_tagset:
943 	if (new)
944 		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
945 out_free_async_qe:
946 	if (ctrl->async_event_sqe.data) {
947 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
948 			sizeof(struct nvme_command), DMA_TO_DEVICE);
949 		ctrl->async_event_sqe.data = NULL;
950 	}
951 out_free_queue:
952 	nvme_rdma_free_queue(&ctrl->queues[0]);
953 	return error;
954 }
955 
956 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
957 		bool remove)
958 {
959 	if (remove) {
960 		blk_cleanup_queue(ctrl->ctrl.connect_q);
961 		blk_mq_free_tag_set(ctrl->ctrl.tagset);
962 	}
963 	nvme_rdma_free_io_queues(ctrl);
964 }
965 
966 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
967 {
968 	int ret;
969 
970 	ret = nvme_rdma_alloc_io_queues(ctrl);
971 	if (ret)
972 		return ret;
973 
974 	if (new) {
975 		ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
976 		if (IS_ERR(ctrl->ctrl.tagset)) {
977 			ret = PTR_ERR(ctrl->ctrl.tagset);
978 			goto out_free_io_queues;
979 		}
980 
981 		ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
982 		if (IS_ERR(ctrl->ctrl.connect_q)) {
983 			ret = PTR_ERR(ctrl->ctrl.connect_q);
984 			goto out_free_tag_set;
985 		}
986 	}
987 
988 	ret = nvme_rdma_start_io_queues(ctrl);
989 	if (ret)
990 		goto out_cleanup_connect_q;
991 
992 	if (!new) {
993 		nvme_start_queues(&ctrl->ctrl);
994 		if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
995 			/*
996 			 * If we timed out waiting for freeze we are likely to
997 			 * be stuck.  Fail the controller initialization just
998 			 * to be safe.
999 			 */
1000 			ret = -ENODEV;
1001 			goto out_wait_freeze_timed_out;
1002 		}
1003 		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
1004 			ctrl->ctrl.queue_count - 1);
1005 		nvme_unfreeze(&ctrl->ctrl);
1006 	}
1007 
1008 	return 0;
1009 
1010 out_wait_freeze_timed_out:
1011 	nvme_stop_queues(&ctrl->ctrl);
1012 	nvme_sync_io_queues(&ctrl->ctrl);
1013 	nvme_rdma_stop_io_queues(ctrl);
1014 out_cleanup_connect_q:
1015 	nvme_cancel_tagset(&ctrl->ctrl);
1016 	if (new)
1017 		blk_cleanup_queue(ctrl->ctrl.connect_q);
1018 out_free_tag_set:
1019 	if (new)
1020 		blk_mq_free_tag_set(ctrl->ctrl.tagset);
1021 out_free_io_queues:
1022 	nvme_rdma_free_io_queues(ctrl);
1023 	return ret;
1024 }
1025 
1026 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
1027 		bool remove)
1028 {
1029 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
1030 	blk_sync_queue(ctrl->ctrl.admin_q);
1031 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1032 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1033 	if (remove)
1034 		blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
1035 	nvme_rdma_destroy_admin_queue(ctrl, remove);
1036 }
1037 
1038 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
1039 		bool remove)
1040 {
1041 	if (ctrl->ctrl.queue_count > 1) {
1042 		nvme_start_freeze(&ctrl->ctrl);
1043 		nvme_stop_queues(&ctrl->ctrl);
1044 		nvme_sync_io_queues(&ctrl->ctrl);
1045 		nvme_rdma_stop_io_queues(ctrl);
1046 		nvme_cancel_tagset(&ctrl->ctrl);
1047 		if (remove)
1048 			nvme_start_queues(&ctrl->ctrl);
1049 		nvme_rdma_destroy_io_queues(ctrl, remove);
1050 	}
1051 }
1052 
1053 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
1054 {
1055 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1056 
1057 	if (list_empty(&ctrl->list))
1058 		goto free_ctrl;
1059 
1060 	mutex_lock(&nvme_rdma_ctrl_mutex);
1061 	list_del(&ctrl->list);
1062 	mutex_unlock(&nvme_rdma_ctrl_mutex);
1063 
1064 	nvmf_free_options(nctrl->opts);
1065 free_ctrl:
1066 	kfree(ctrl->queues);
1067 	kfree(ctrl);
1068 }
1069 
1070 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
1071 {
1072 	/* If we are resetting/deleting then do nothing */
1073 	if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
1074 		WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
1075 			ctrl->ctrl.state == NVME_CTRL_LIVE);
1076 		return;
1077 	}
1078 
1079 	if (nvmf_should_reconnect(&ctrl->ctrl)) {
1080 		dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
1081 			ctrl->ctrl.opts->reconnect_delay);
1082 		queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
1083 				ctrl->ctrl.opts->reconnect_delay * HZ);
1084 	} else {
1085 		nvme_delete_ctrl(&ctrl->ctrl);
1086 	}
1087 }
1088 
1089 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
1090 {
1091 	int ret;
1092 	bool changed;
1093 
1094 	ret = nvme_rdma_configure_admin_queue(ctrl, new);
1095 	if (ret)
1096 		return ret;
1097 
1098 	if (ctrl->ctrl.icdoff) {
1099 		dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1100 		goto destroy_admin;
1101 	}
1102 
1103 	if (!(ctrl->ctrl.sgls & (1 << 2))) {
1104 		dev_err(ctrl->ctrl.device,
1105 			"Mandatory keyed sgls are not supported!\n");
1106 		goto destroy_admin;
1107 	}
1108 
1109 	if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1110 		dev_warn(ctrl->ctrl.device,
1111 			"queue_size %zu > ctrl sqsize %u, clamping down\n",
1112 			ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1113 	}
1114 
1115 	if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1116 		dev_warn(ctrl->ctrl.device,
1117 			"sqsize %u > ctrl maxcmd %u, clamping down\n",
1118 			ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1119 		ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1120 	}
1121 
1122 	if (ctrl->ctrl.sgls & (1 << 20))
1123 		ctrl->use_inline_data = true;
1124 
1125 	if (ctrl->ctrl.queue_count > 1) {
1126 		ret = nvme_rdma_configure_io_queues(ctrl, new);
1127 		if (ret)
1128 			goto destroy_admin;
1129 	}
1130 
1131 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
1132 	if (!changed) {
1133 		/*
1134 		 * state change failure is ok if we started ctrl delete,
1135 		 * unless we're during creation of a new controller to
1136 		 * avoid races with teardown flow.
1137 		 */
1138 		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1139 			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1140 		WARN_ON_ONCE(new);
1141 		ret = -EINVAL;
1142 		goto destroy_io;
1143 	}
1144 
1145 	nvme_start_ctrl(&ctrl->ctrl);
1146 	return 0;
1147 
1148 destroy_io:
1149 	if (ctrl->ctrl.queue_count > 1) {
1150 		nvme_stop_queues(&ctrl->ctrl);
1151 		nvme_sync_io_queues(&ctrl->ctrl);
1152 		nvme_rdma_stop_io_queues(ctrl);
1153 		nvme_cancel_tagset(&ctrl->ctrl);
1154 		nvme_rdma_destroy_io_queues(ctrl, new);
1155 	}
1156 destroy_admin:
1157 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
1158 	blk_sync_queue(ctrl->ctrl.admin_q);
1159 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1160 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1161 	nvme_rdma_destroy_admin_queue(ctrl, new);
1162 	return ret;
1163 }
1164 
1165 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1166 {
1167 	struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1168 			struct nvme_rdma_ctrl, reconnect_work);
1169 
1170 	++ctrl->ctrl.nr_reconnects;
1171 
1172 	if (nvme_rdma_setup_ctrl(ctrl, false))
1173 		goto requeue;
1174 
1175 	dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1176 			ctrl->ctrl.nr_reconnects);
1177 
1178 	ctrl->ctrl.nr_reconnects = 0;
1179 
1180 	return;
1181 
1182 requeue:
1183 	dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
1184 			ctrl->ctrl.nr_reconnects);
1185 	nvme_rdma_reconnect_or_remove(ctrl);
1186 }
1187 
1188 static void nvme_rdma_error_recovery_work(struct work_struct *work)
1189 {
1190 	struct nvme_rdma_ctrl *ctrl = container_of(work,
1191 			struct nvme_rdma_ctrl, err_work);
1192 
1193 	nvme_stop_keep_alive(&ctrl->ctrl);
1194 	nvme_rdma_teardown_io_queues(ctrl, false);
1195 	nvme_start_queues(&ctrl->ctrl);
1196 	nvme_rdma_teardown_admin_queue(ctrl, false);
1197 	blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
1198 
1199 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1200 		/* state change failure is ok if we started ctrl delete */
1201 		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1202 			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1203 		return;
1204 	}
1205 
1206 	nvme_rdma_reconnect_or_remove(ctrl);
1207 }
1208 
1209 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1210 {
1211 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
1212 		return;
1213 
1214 	dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1215 	queue_work(nvme_reset_wq, &ctrl->err_work);
1216 }
1217 
1218 static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1219 {
1220 	struct request *rq = blk_mq_rq_from_pdu(req);
1221 
1222 	if (!refcount_dec_and_test(&req->ref))
1223 		return;
1224 	if (!nvme_try_complete_req(rq, req->status, req->result))
1225 		nvme_rdma_complete_rq(rq);
1226 }
1227 
1228 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1229 		const char *op)
1230 {
1231 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1232 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1233 
1234 	if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1235 		dev_info(ctrl->ctrl.device,
1236 			     "%s for CQE 0x%p failed with status %s (%d)\n",
1237 			     op, wc->wr_cqe,
1238 			     ib_wc_status_msg(wc->status), wc->status);
1239 	nvme_rdma_error_recovery(ctrl);
1240 }
1241 
1242 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1243 {
1244 	if (unlikely(wc->status != IB_WC_SUCCESS))
1245 		nvme_rdma_wr_error(cq, wc, "MEMREG");
1246 }
1247 
1248 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1249 {
1250 	struct nvme_rdma_request *req =
1251 		container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1252 
1253 	if (unlikely(wc->status != IB_WC_SUCCESS))
1254 		nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
1255 	else
1256 		nvme_rdma_end_request(req);
1257 }
1258 
1259 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1260 		struct nvme_rdma_request *req)
1261 {
1262 	struct ib_send_wr wr = {
1263 		.opcode		    = IB_WR_LOCAL_INV,
1264 		.next		    = NULL,
1265 		.num_sge	    = 0,
1266 		.send_flags	    = IB_SEND_SIGNALED,
1267 		.ex.invalidate_rkey = req->mr->rkey,
1268 	};
1269 
1270 	req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1271 	wr.wr_cqe = &req->reg_cqe;
1272 
1273 	return ib_post_send(queue->qp, &wr, NULL);
1274 }
1275 
1276 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1277 		struct request *rq)
1278 {
1279 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1280 	struct nvme_rdma_device *dev = queue->device;
1281 	struct ib_device *ibdev = dev->dev;
1282 	struct list_head *pool = &queue->qp->rdma_mrs;
1283 
1284 	if (!blk_rq_nr_phys_segments(rq))
1285 		return;
1286 
1287 	if (blk_integrity_rq(rq)) {
1288 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1289 				req->metadata_sgl->nents, rq_dma_dir(rq));
1290 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1291 				      NVME_INLINE_METADATA_SG_CNT);
1292 	}
1293 
1294 	if (req->use_sig_mr)
1295 		pool = &queue->qp->sig_mrs;
1296 
1297 	if (req->mr) {
1298 		ib_mr_pool_put(queue->qp, pool, req->mr);
1299 		req->mr = NULL;
1300 	}
1301 
1302 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1303 			rq_dma_dir(rq));
1304 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1305 }
1306 
1307 static int nvme_rdma_set_sg_null(struct nvme_command *c)
1308 {
1309 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1310 
1311 	sg->addr = 0;
1312 	put_unaligned_le24(0, sg->length);
1313 	put_unaligned_le32(0, sg->key);
1314 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1315 	return 0;
1316 }
1317 
1318 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
1319 		struct nvme_rdma_request *req, struct nvme_command *c,
1320 		int count)
1321 {
1322 	struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
1323 	struct ib_sge *sge = &req->sge[1];
1324 	struct scatterlist *sgl;
1325 	u32 len = 0;
1326 	int i;
1327 
1328 	for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
1329 		sge->addr = sg_dma_address(sgl);
1330 		sge->length = sg_dma_len(sgl);
1331 		sge->lkey = queue->device->pd->local_dma_lkey;
1332 		len += sge->length;
1333 		sge++;
1334 	}
1335 
1336 	sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
1337 	sg->length = cpu_to_le32(len);
1338 	sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1339 
1340 	req->num_sge += count;
1341 	return 0;
1342 }
1343 
1344 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1345 		struct nvme_rdma_request *req, struct nvme_command *c)
1346 {
1347 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1348 
1349 	sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1350 	put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
1351 	put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
1352 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1353 	return 0;
1354 }
1355 
1356 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1357 		struct nvme_rdma_request *req, struct nvme_command *c,
1358 		int count)
1359 {
1360 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1361 	int nr;
1362 
1363 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1364 	if (WARN_ON_ONCE(!req->mr))
1365 		return -EAGAIN;
1366 
1367 	/*
1368 	 * Align the MR to a 4K page size to match the ctrl page size and
1369 	 * the block virtual boundary.
1370 	 */
1371 	nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1372 			  SZ_4K);
1373 	if (unlikely(nr < count)) {
1374 		ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1375 		req->mr = NULL;
1376 		if (nr < 0)
1377 			return nr;
1378 		return -EINVAL;
1379 	}
1380 
1381 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1382 
1383 	req->reg_cqe.done = nvme_rdma_memreg_done;
1384 	memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1385 	req->reg_wr.wr.opcode = IB_WR_REG_MR;
1386 	req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1387 	req->reg_wr.wr.num_sge = 0;
1388 	req->reg_wr.mr = req->mr;
1389 	req->reg_wr.key = req->mr->rkey;
1390 	req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1391 			     IB_ACCESS_REMOTE_READ |
1392 			     IB_ACCESS_REMOTE_WRITE;
1393 
1394 	sg->addr = cpu_to_le64(req->mr->iova);
1395 	put_unaligned_le24(req->mr->length, sg->length);
1396 	put_unaligned_le32(req->mr->rkey, sg->key);
1397 	sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1398 			NVME_SGL_FMT_INVALIDATE;
1399 
1400 	return 0;
1401 }
1402 
1403 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1404 		struct nvme_command *cmd, struct ib_sig_domain *domain,
1405 		u16 control, u8 pi_type)
1406 {
1407 	domain->sig_type = IB_SIG_TYPE_T10_DIF;
1408 	domain->sig.dif.bg_type = IB_T10DIF_CRC;
1409 	domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1410 	domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1411 	if (control & NVME_RW_PRINFO_PRCHK_REF)
1412 		domain->sig.dif.ref_remap = true;
1413 
1414 	domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
1415 	domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
1416 	domain->sig.dif.app_escape = true;
1417 	if (pi_type == NVME_NS_DPS_PI_TYPE3)
1418 		domain->sig.dif.ref_escape = true;
1419 }
1420 
1421 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1422 		struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1423 		u8 pi_type)
1424 {
1425 	u16 control = le16_to_cpu(cmd->rw.control);
1426 
1427 	memset(sig_attrs, 0, sizeof(*sig_attrs));
1428 	if (control & NVME_RW_PRINFO_PRACT) {
1429 		/* for WRITE_INSERT/READ_STRIP no memory domain */
1430 		sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1431 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1432 					 pi_type);
1433 		/* Clear the PRACT bit since HCA will generate/verify the PI */
1434 		control &= ~NVME_RW_PRINFO_PRACT;
1435 		cmd->rw.control = cpu_to_le16(control);
1436 	} else {
1437 		/* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1438 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1439 					 pi_type);
1440 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1441 					 pi_type);
1442 	}
1443 }
1444 
1445 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1446 {
1447 	*mask = 0;
1448 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1449 		*mask |= IB_SIG_CHECK_REFTAG;
1450 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1451 		*mask |= IB_SIG_CHECK_GUARD;
1452 }
1453 
1454 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1455 {
1456 	if (unlikely(wc->status != IB_WC_SUCCESS))
1457 		nvme_rdma_wr_error(cq, wc, "SIG");
1458 }
1459 
1460 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1461 		struct nvme_rdma_request *req, struct nvme_command *c,
1462 		int count, int pi_count)
1463 {
1464 	struct nvme_rdma_sgl *sgl = &req->data_sgl;
1465 	struct ib_reg_wr *wr = &req->reg_wr;
1466 	struct request *rq = blk_mq_rq_from_pdu(req);
1467 	struct nvme_ns *ns = rq->q->queuedata;
1468 	struct bio *bio = rq->bio;
1469 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1470 	int nr;
1471 
1472 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1473 	if (WARN_ON_ONCE(!req->mr))
1474 		return -EAGAIN;
1475 
1476 	nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1477 			     req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1478 			     SZ_4K);
1479 	if (unlikely(nr))
1480 		goto mr_put;
1481 
1482 	nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
1483 				req->mr->sig_attrs, ns->pi_type);
1484 	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1485 
1486 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1487 
1488 	req->reg_cqe.done = nvme_rdma_sig_done;
1489 	memset(wr, 0, sizeof(*wr));
1490 	wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1491 	wr->wr.wr_cqe = &req->reg_cqe;
1492 	wr->wr.num_sge = 0;
1493 	wr->wr.send_flags = 0;
1494 	wr->mr = req->mr;
1495 	wr->key = req->mr->rkey;
1496 	wr->access = IB_ACCESS_LOCAL_WRITE |
1497 		     IB_ACCESS_REMOTE_READ |
1498 		     IB_ACCESS_REMOTE_WRITE;
1499 
1500 	sg->addr = cpu_to_le64(req->mr->iova);
1501 	put_unaligned_le24(req->mr->length, sg->length);
1502 	put_unaligned_le32(req->mr->rkey, sg->key);
1503 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1504 
1505 	return 0;
1506 
1507 mr_put:
1508 	ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1509 	req->mr = NULL;
1510 	if (nr < 0)
1511 		return nr;
1512 	return -EINVAL;
1513 }
1514 
1515 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
1516 		struct request *rq, struct nvme_command *c)
1517 {
1518 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1519 	struct nvme_rdma_device *dev = queue->device;
1520 	struct ib_device *ibdev = dev->dev;
1521 	int pi_count = 0;
1522 	int count, ret;
1523 
1524 	req->num_sge = 1;
1525 	refcount_set(&req->ref, 2); /* send and recv completions */
1526 
1527 	c->common.flags |= NVME_CMD_SGL_METABUF;
1528 
1529 	if (!blk_rq_nr_phys_segments(rq))
1530 		return nvme_rdma_set_sg_null(c);
1531 
1532 	req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1533 	ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1534 			blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
1535 			NVME_INLINE_SG_CNT);
1536 	if (ret)
1537 		return -ENOMEM;
1538 
1539 	req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1540 					    req->data_sgl.sg_table.sgl);
1541 
1542 	count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1543 			      req->data_sgl.nents, rq_dma_dir(rq));
1544 	if (unlikely(count <= 0)) {
1545 		ret = -EIO;
1546 		goto out_free_table;
1547 	}
1548 
1549 	if (blk_integrity_rq(rq)) {
1550 		req->metadata_sgl->sg_table.sgl =
1551 			(struct scatterlist *)(req->metadata_sgl + 1);
1552 		ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1553 				blk_rq_count_integrity_sg(rq->q, rq->bio),
1554 				req->metadata_sgl->sg_table.sgl,
1555 				NVME_INLINE_METADATA_SG_CNT);
1556 		if (unlikely(ret)) {
1557 			ret = -ENOMEM;
1558 			goto out_unmap_sg;
1559 		}
1560 
1561 		req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
1562 				rq->bio, req->metadata_sgl->sg_table.sgl);
1563 		pi_count = ib_dma_map_sg(ibdev,
1564 					 req->metadata_sgl->sg_table.sgl,
1565 					 req->metadata_sgl->nents,
1566 					 rq_dma_dir(rq));
1567 		if (unlikely(pi_count <= 0)) {
1568 			ret = -EIO;
1569 			goto out_free_pi_table;
1570 		}
1571 	}
1572 
1573 	if (req->use_sig_mr) {
1574 		ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1575 		goto out;
1576 	}
1577 
1578 	if (count <= dev->num_inline_segments) {
1579 		if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
1580 		    queue->ctrl->use_inline_data &&
1581 		    blk_rq_payload_bytes(rq) <=
1582 				nvme_rdma_inline_data_size(queue)) {
1583 			ret = nvme_rdma_map_sg_inline(queue, req, c, count);
1584 			goto out;
1585 		}
1586 
1587 		if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
1588 			ret = nvme_rdma_map_sg_single(queue, req, c);
1589 			goto out;
1590 		}
1591 	}
1592 
1593 	ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1594 out:
1595 	if (unlikely(ret))
1596 		goto out_unmap_pi_sg;
1597 
1598 	return 0;
1599 
1600 out_unmap_pi_sg:
1601 	if (blk_integrity_rq(rq))
1602 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1603 				req->metadata_sgl->nents, rq_dma_dir(rq));
1604 out_free_pi_table:
1605 	if (blk_integrity_rq(rq))
1606 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1607 				      NVME_INLINE_METADATA_SG_CNT);
1608 out_unmap_sg:
1609 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1610 			rq_dma_dir(rq));
1611 out_free_table:
1612 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1613 	return ret;
1614 }
1615 
1616 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1617 {
1618 	struct nvme_rdma_qe *qe =
1619 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1620 	struct nvme_rdma_request *req =
1621 		container_of(qe, struct nvme_rdma_request, sqe);
1622 
1623 	if (unlikely(wc->status != IB_WC_SUCCESS))
1624 		nvme_rdma_wr_error(cq, wc, "SEND");
1625 	else
1626 		nvme_rdma_end_request(req);
1627 }
1628 
1629 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1630 		struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1631 		struct ib_send_wr *first)
1632 {
1633 	struct ib_send_wr wr;
1634 	int ret;
1635 
1636 	sge->addr   = qe->dma;
1637 	sge->length = sizeof(struct nvme_command);
1638 	sge->lkey   = queue->device->pd->local_dma_lkey;
1639 
1640 	wr.next       = NULL;
1641 	wr.wr_cqe     = &qe->cqe;
1642 	wr.sg_list    = sge;
1643 	wr.num_sge    = num_sge;
1644 	wr.opcode     = IB_WR_SEND;
1645 	wr.send_flags = IB_SEND_SIGNALED;
1646 
1647 	if (first)
1648 		first->next = &wr;
1649 	else
1650 		first = &wr;
1651 
1652 	ret = ib_post_send(queue->qp, first, NULL);
1653 	if (unlikely(ret)) {
1654 		dev_err(queue->ctrl->ctrl.device,
1655 			     "%s failed with error code %d\n", __func__, ret);
1656 	}
1657 	return ret;
1658 }
1659 
1660 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1661 		struct nvme_rdma_qe *qe)
1662 {
1663 	struct ib_recv_wr wr;
1664 	struct ib_sge list;
1665 	int ret;
1666 
1667 	list.addr   = qe->dma;
1668 	list.length = sizeof(struct nvme_completion);
1669 	list.lkey   = queue->device->pd->local_dma_lkey;
1670 
1671 	qe->cqe.done = nvme_rdma_recv_done;
1672 
1673 	wr.next     = NULL;
1674 	wr.wr_cqe   = &qe->cqe;
1675 	wr.sg_list  = &list;
1676 	wr.num_sge  = 1;
1677 
1678 	ret = ib_post_recv(queue->qp, &wr, NULL);
1679 	if (unlikely(ret)) {
1680 		dev_err(queue->ctrl->ctrl.device,
1681 			"%s failed with error code %d\n", __func__, ret);
1682 	}
1683 	return ret;
1684 }
1685 
1686 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1687 {
1688 	u32 queue_idx = nvme_rdma_queue_idx(queue);
1689 
1690 	if (queue_idx == 0)
1691 		return queue->ctrl->admin_tag_set.tags[queue_idx];
1692 	return queue->ctrl->tag_set.tags[queue_idx - 1];
1693 }
1694 
1695 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1696 {
1697 	if (unlikely(wc->status != IB_WC_SUCCESS))
1698 		nvme_rdma_wr_error(cq, wc, "ASYNC");
1699 }
1700 
1701 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
1702 {
1703 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1704 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
1705 	struct ib_device *dev = queue->device->dev;
1706 	struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1707 	struct nvme_command *cmd = sqe->data;
1708 	struct ib_sge sge;
1709 	int ret;
1710 
1711 	ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1712 
1713 	memset(cmd, 0, sizeof(*cmd));
1714 	cmd->common.opcode = nvme_admin_async_event;
1715 	cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
1716 	cmd->common.flags |= NVME_CMD_SGL_METABUF;
1717 	nvme_rdma_set_sg_null(cmd);
1718 
1719 	sqe->cqe.done = nvme_rdma_async_done;
1720 
1721 	ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1722 			DMA_TO_DEVICE);
1723 
1724 	ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
1725 	WARN_ON_ONCE(ret);
1726 }
1727 
1728 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1729 		struct nvme_completion *cqe, struct ib_wc *wc)
1730 {
1731 	struct request *rq;
1732 	struct nvme_rdma_request *req;
1733 
1734 	rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
1735 	if (!rq) {
1736 		dev_err(queue->ctrl->ctrl.device,
1737 			"got bad command_id %#x on QP %#x\n",
1738 			cqe->command_id, queue->qp->qp_num);
1739 		nvme_rdma_error_recovery(queue->ctrl);
1740 		return;
1741 	}
1742 	req = blk_mq_rq_to_pdu(rq);
1743 
1744 	req->status = cqe->status;
1745 	req->result = cqe->result;
1746 
1747 	if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1748 		if (unlikely(!req->mr ||
1749 			     wc->ex.invalidate_rkey != req->mr->rkey)) {
1750 			dev_err(queue->ctrl->ctrl.device,
1751 				"Bogus remote invalidation for rkey %#x\n",
1752 				req->mr ? req->mr->rkey : 0);
1753 			nvme_rdma_error_recovery(queue->ctrl);
1754 		}
1755 	} else if (req->mr) {
1756 		int ret;
1757 
1758 		ret = nvme_rdma_inv_rkey(queue, req);
1759 		if (unlikely(ret < 0)) {
1760 			dev_err(queue->ctrl->ctrl.device,
1761 				"Queueing INV WR for rkey %#x failed (%d)\n",
1762 				req->mr->rkey, ret);
1763 			nvme_rdma_error_recovery(queue->ctrl);
1764 		}
1765 		/* the local invalidation completion will end the request */
1766 		return;
1767 	}
1768 
1769 	nvme_rdma_end_request(req);
1770 }
1771 
1772 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1773 {
1774 	struct nvme_rdma_qe *qe =
1775 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1776 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1777 	struct ib_device *ibdev = queue->device->dev;
1778 	struct nvme_completion *cqe = qe->data;
1779 	const size_t len = sizeof(struct nvme_completion);
1780 
1781 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
1782 		nvme_rdma_wr_error(cq, wc, "RECV");
1783 		return;
1784 	}
1785 
1786 	/* sanity checking for received data length */
1787 	if (unlikely(wc->byte_len < len)) {
1788 		dev_err(queue->ctrl->ctrl.device,
1789 			"Unexpected nvme completion length(%d)\n", wc->byte_len);
1790 		nvme_rdma_error_recovery(queue->ctrl);
1791 		return;
1792 	}
1793 
1794 	ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1795 	/*
1796 	 * AEN requests are special as they don't time out and can
1797 	 * survive any kind of queue freeze and often don't respond to
1798 	 * aborts.  We don't even bother to allocate a struct request
1799 	 * for them but rather special case them here.
1800 	 */
1801 	if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1802 				     cqe->command_id)))
1803 		nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1804 				&cqe->result);
1805 	else
1806 		nvme_rdma_process_nvme_rsp(queue, cqe, wc);
1807 	ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1808 
1809 	nvme_rdma_post_recv(queue, qe);
1810 }
1811 
1812 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1813 {
1814 	int ret, i;
1815 
1816 	for (i = 0; i < queue->queue_size; i++) {
1817 		ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1818 		if (ret)
1819 			return ret;
1820 	}
1821 
1822 	return 0;
1823 }
1824 
1825 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1826 		struct rdma_cm_event *ev)
1827 {
1828 	struct rdma_cm_id *cm_id = queue->cm_id;
1829 	int status = ev->status;
1830 	const char *rej_msg;
1831 	const struct nvme_rdma_cm_rej *rej_data;
1832 	u8 rej_data_len;
1833 
1834 	rej_msg = rdma_reject_msg(cm_id, status);
1835 	rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1836 
1837 	if (rej_data && rej_data_len >= sizeof(u16)) {
1838 		u16 sts = le16_to_cpu(rej_data->sts);
1839 
1840 		dev_err(queue->ctrl->ctrl.device,
1841 		      "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1842 		      status, rej_msg, sts, nvme_rdma_cm_msg(sts));
1843 	} else {
1844 		dev_err(queue->ctrl->ctrl.device,
1845 			"Connect rejected: status %d (%s).\n", status, rej_msg);
1846 	}
1847 
1848 	return -ECONNRESET;
1849 }
1850 
1851 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1852 {
1853 	struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
1854 	int ret;
1855 
1856 	ret = nvme_rdma_create_queue_ib(queue);
1857 	if (ret)
1858 		return ret;
1859 
1860 	if (ctrl->opts->tos >= 0)
1861 		rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
1862 	ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1863 	if (ret) {
1864 		dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
1865 			queue->cm_error);
1866 		goto out_destroy_queue;
1867 	}
1868 
1869 	return 0;
1870 
1871 out_destroy_queue:
1872 	nvme_rdma_destroy_queue_ib(queue);
1873 	return ret;
1874 }
1875 
1876 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1877 {
1878 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1879 	struct rdma_conn_param param = { };
1880 	struct nvme_rdma_cm_req priv = { };
1881 	int ret;
1882 
1883 	param.qp_num = queue->qp->qp_num;
1884 	param.flow_control = 1;
1885 
1886 	param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
1887 	/* maximum retry count */
1888 	param.retry_count = 7;
1889 	param.rnr_retry_count = 7;
1890 	param.private_data = &priv;
1891 	param.private_data_len = sizeof(priv);
1892 
1893 	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1894 	priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1895 	/*
1896 	 * set the admin queue depth to the minimum size
1897 	 * specified by the Fabrics standard.
1898 	 */
1899 	if (priv.qid == 0) {
1900 		priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1901 		priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1902 	} else {
1903 		/*
1904 		 * current interpretation of the fabrics spec
1905 		 * is at minimum you make hrqsize sqsize+1, or a
1906 		 * 1's based representation of sqsize.
1907 		 */
1908 		priv.hrqsize = cpu_to_le16(queue->queue_size);
1909 		priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1910 	}
1911 
1912 	ret = rdma_connect_locked(queue->cm_id, &param);
1913 	if (ret) {
1914 		dev_err(ctrl->ctrl.device,
1915 			"rdma_connect_locked failed (%d).\n", ret);
1916 		return ret;
1917 	}
1918 
1919 	return 0;
1920 }
1921 
1922 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1923 		struct rdma_cm_event *ev)
1924 {
1925 	struct nvme_rdma_queue *queue = cm_id->context;
1926 	int cm_error = 0;
1927 
1928 	dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1929 		rdma_event_msg(ev->event), ev->event,
1930 		ev->status, cm_id);
1931 
1932 	switch (ev->event) {
1933 	case RDMA_CM_EVENT_ADDR_RESOLVED:
1934 		cm_error = nvme_rdma_addr_resolved(queue);
1935 		break;
1936 	case RDMA_CM_EVENT_ROUTE_RESOLVED:
1937 		cm_error = nvme_rdma_route_resolved(queue);
1938 		break;
1939 	case RDMA_CM_EVENT_ESTABLISHED:
1940 		queue->cm_error = nvme_rdma_conn_established(queue);
1941 		/* complete cm_done regardless of success/failure */
1942 		complete(&queue->cm_done);
1943 		return 0;
1944 	case RDMA_CM_EVENT_REJECTED:
1945 		cm_error = nvme_rdma_conn_rejected(queue, ev);
1946 		break;
1947 	case RDMA_CM_EVENT_ROUTE_ERROR:
1948 	case RDMA_CM_EVENT_CONNECT_ERROR:
1949 	case RDMA_CM_EVENT_UNREACHABLE:
1950 	case RDMA_CM_EVENT_ADDR_ERROR:
1951 		dev_dbg(queue->ctrl->ctrl.device,
1952 			"CM error event %d\n", ev->event);
1953 		cm_error = -ECONNRESET;
1954 		break;
1955 	case RDMA_CM_EVENT_DISCONNECTED:
1956 	case RDMA_CM_EVENT_ADDR_CHANGE:
1957 	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1958 		dev_dbg(queue->ctrl->ctrl.device,
1959 			"disconnect received - connection closed\n");
1960 		nvme_rdma_error_recovery(queue->ctrl);
1961 		break;
1962 	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1963 		/* device removal is handled via the ib_client API */
1964 		break;
1965 	default:
1966 		dev_err(queue->ctrl->ctrl.device,
1967 			"Unexpected RDMA CM event (%d)\n", ev->event);
1968 		nvme_rdma_error_recovery(queue->ctrl);
1969 		break;
1970 	}
1971 
1972 	if (cm_error) {
1973 		queue->cm_error = cm_error;
1974 		complete(&queue->cm_done);
1975 	}
1976 
1977 	return 0;
1978 }
1979 
1980 static void nvme_rdma_complete_timed_out(struct request *rq)
1981 {
1982 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1983 	struct nvme_rdma_queue *queue = req->queue;
1984 
1985 	nvme_rdma_stop_queue(queue);
1986 	if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) {
1987 		nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
1988 		blk_mq_complete_request(rq);
1989 	}
1990 }
1991 
1992 static enum blk_eh_timer_return
1993 nvme_rdma_timeout(struct request *rq, bool reserved)
1994 {
1995 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1996 	struct nvme_rdma_queue *queue = req->queue;
1997 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1998 
1999 	dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
2000 		 rq->tag, nvme_rdma_queue_idx(queue));
2001 
2002 	if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
2003 		/*
2004 		 * If we are resetting, connecting or deleting we should
2005 		 * complete immediately because we may block controller
2006 		 * teardown or setup sequence
2007 		 * - ctrl disable/shutdown fabrics requests
2008 		 * - connect requests
2009 		 * - initialization admin requests
2010 		 * - I/O requests that entered after unquiescing and
2011 		 *   the controller stopped responding
2012 		 *
2013 		 * All other requests should be cancelled by the error
2014 		 * recovery work, so it's fine that we fail it here.
2015 		 */
2016 		nvme_rdma_complete_timed_out(rq);
2017 		return BLK_EH_DONE;
2018 	}
2019 
2020 	/*
2021 	 * LIVE state should trigger the normal error recovery which will
2022 	 * handle completing this request.
2023 	 */
2024 	nvme_rdma_error_recovery(ctrl);
2025 	return BLK_EH_RESET_TIMER;
2026 }
2027 
2028 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
2029 		const struct blk_mq_queue_data *bd)
2030 {
2031 	struct nvme_ns *ns = hctx->queue->queuedata;
2032 	struct nvme_rdma_queue *queue = hctx->driver_data;
2033 	struct request *rq = bd->rq;
2034 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2035 	struct nvme_rdma_qe *sqe = &req->sqe;
2036 	struct nvme_command *c = nvme_req(rq)->cmd;
2037 	struct ib_device *dev;
2038 	bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
2039 	blk_status_t ret;
2040 	int err;
2041 
2042 	WARN_ON_ONCE(rq->tag < 0);
2043 
2044 	if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2045 		return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq);
2046 
2047 	dev = queue->device->dev;
2048 
2049 	req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2050 					 sizeof(struct nvme_command),
2051 					 DMA_TO_DEVICE);
2052 	err = ib_dma_mapping_error(dev, req->sqe.dma);
2053 	if (unlikely(err))
2054 		return BLK_STS_RESOURCE;
2055 
2056 	ib_dma_sync_single_for_cpu(dev, sqe->dma,
2057 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2058 
2059 	ret = nvme_setup_cmd(ns, rq);
2060 	if (ret)
2061 		goto unmap_qe;
2062 
2063 	blk_mq_start_request(rq);
2064 
2065 	if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2066 	    queue->pi_support &&
2067 	    (c->common.opcode == nvme_cmd_write ||
2068 	     c->common.opcode == nvme_cmd_read) &&
2069 	    nvme_ns_has_pi(ns))
2070 		req->use_sig_mr = true;
2071 	else
2072 		req->use_sig_mr = false;
2073 
2074 	err = nvme_rdma_map_data(queue, rq, c);
2075 	if (unlikely(err < 0)) {
2076 		dev_err(queue->ctrl->ctrl.device,
2077 			     "Failed to map data (%d)\n", err);
2078 		goto err;
2079 	}
2080 
2081 	sqe->cqe.done = nvme_rdma_send_done;
2082 
2083 	ib_dma_sync_single_for_device(dev, sqe->dma,
2084 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2085 
2086 	err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2087 			req->mr ? &req->reg_wr.wr : NULL);
2088 	if (unlikely(err))
2089 		goto err_unmap;
2090 
2091 	return BLK_STS_OK;
2092 
2093 err_unmap:
2094 	nvme_rdma_unmap_data(queue, rq);
2095 err:
2096 	if (err == -EIO)
2097 		ret = nvme_host_path_error(rq);
2098 	else if (err == -ENOMEM || err == -EAGAIN)
2099 		ret = BLK_STS_RESOURCE;
2100 	else
2101 		ret = BLK_STS_IOERR;
2102 	nvme_cleanup_cmd(rq);
2103 unmap_qe:
2104 	ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2105 			    DMA_TO_DEVICE);
2106 	return ret;
2107 }
2108 
2109 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
2110 {
2111 	struct nvme_rdma_queue *queue = hctx->driver_data;
2112 
2113 	return ib_process_cq_direct(queue->ib_cq, -1);
2114 }
2115 
2116 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2117 {
2118 	struct request *rq = blk_mq_rq_from_pdu(req);
2119 	struct ib_mr_status mr_status;
2120 	int ret;
2121 
2122 	ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2123 	if (ret) {
2124 		pr_err("ib_check_mr_status failed, ret %d\n", ret);
2125 		nvme_req(rq)->status = NVME_SC_INVALID_PI;
2126 		return;
2127 	}
2128 
2129 	if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2130 		switch (mr_status.sig_err.err_type) {
2131 		case IB_SIG_BAD_GUARD:
2132 			nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2133 			break;
2134 		case IB_SIG_BAD_REFTAG:
2135 			nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2136 			break;
2137 		case IB_SIG_BAD_APPTAG:
2138 			nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2139 			break;
2140 		}
2141 		pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2142 		       mr_status.sig_err.err_type, mr_status.sig_err.expected,
2143 		       mr_status.sig_err.actual);
2144 	}
2145 }
2146 
2147 static void nvme_rdma_complete_rq(struct request *rq)
2148 {
2149 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2150 	struct nvme_rdma_queue *queue = req->queue;
2151 	struct ib_device *ibdev = queue->device->dev;
2152 
2153 	if (req->use_sig_mr)
2154 		nvme_rdma_check_pi_status(req);
2155 
2156 	nvme_rdma_unmap_data(queue, rq);
2157 	ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2158 			    DMA_TO_DEVICE);
2159 	nvme_complete_rq(rq);
2160 }
2161 
2162 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2163 {
2164 	struct nvme_rdma_ctrl *ctrl = set->driver_data;
2165 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
2166 
2167 	if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
2168 		/* separate read/write queues */
2169 		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2170 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2171 		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2172 		set->map[HCTX_TYPE_READ].nr_queues =
2173 			ctrl->io_queues[HCTX_TYPE_READ];
2174 		set->map[HCTX_TYPE_READ].queue_offset =
2175 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2176 	} else {
2177 		/* shared read/write queues */
2178 		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2179 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2180 		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2181 		set->map[HCTX_TYPE_READ].nr_queues =
2182 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2183 		set->map[HCTX_TYPE_READ].queue_offset = 0;
2184 	}
2185 	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
2186 			ctrl->device->dev, 0);
2187 	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
2188 			ctrl->device->dev, 0);
2189 
2190 	if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
2191 		/* map dedicated poll queues only if we have queues left */
2192 		set->map[HCTX_TYPE_POLL].nr_queues =
2193 				ctrl->io_queues[HCTX_TYPE_POLL];
2194 		set->map[HCTX_TYPE_POLL].queue_offset =
2195 			ctrl->io_queues[HCTX_TYPE_DEFAULT] +
2196 			ctrl->io_queues[HCTX_TYPE_READ];
2197 		blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
2198 	}
2199 
2200 	dev_info(ctrl->ctrl.device,
2201 		"mapped %d/%d/%d default/read/poll queues.\n",
2202 		ctrl->io_queues[HCTX_TYPE_DEFAULT],
2203 		ctrl->io_queues[HCTX_TYPE_READ],
2204 		ctrl->io_queues[HCTX_TYPE_POLL]);
2205 
2206 	return 0;
2207 }
2208 
2209 static const struct blk_mq_ops nvme_rdma_mq_ops = {
2210 	.queue_rq	= nvme_rdma_queue_rq,
2211 	.complete	= nvme_rdma_complete_rq,
2212 	.init_request	= nvme_rdma_init_request,
2213 	.exit_request	= nvme_rdma_exit_request,
2214 	.init_hctx	= nvme_rdma_init_hctx,
2215 	.timeout	= nvme_rdma_timeout,
2216 	.map_queues	= nvme_rdma_map_queues,
2217 	.poll		= nvme_rdma_poll,
2218 };
2219 
2220 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
2221 	.queue_rq	= nvme_rdma_queue_rq,
2222 	.complete	= nvme_rdma_complete_rq,
2223 	.init_request	= nvme_rdma_init_request,
2224 	.exit_request	= nvme_rdma_exit_request,
2225 	.init_hctx	= nvme_rdma_init_admin_hctx,
2226 	.timeout	= nvme_rdma_timeout,
2227 };
2228 
2229 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
2230 {
2231 	cancel_work_sync(&ctrl->err_work);
2232 	cancel_delayed_work_sync(&ctrl->reconnect_work);
2233 
2234 	nvme_rdma_teardown_io_queues(ctrl, shutdown);
2235 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
2236 	if (shutdown)
2237 		nvme_shutdown_ctrl(&ctrl->ctrl);
2238 	else
2239 		nvme_disable_ctrl(&ctrl->ctrl);
2240 	nvme_rdma_teardown_admin_queue(ctrl, shutdown);
2241 }
2242 
2243 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2244 {
2245 	nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
2246 }
2247 
2248 static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2249 {
2250 	struct nvme_rdma_ctrl *ctrl =
2251 		container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
2252 
2253 	nvme_stop_ctrl(&ctrl->ctrl);
2254 	nvme_rdma_shutdown_ctrl(ctrl, false);
2255 
2256 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2257 		/* state change failure should never happen */
2258 		WARN_ON_ONCE(1);
2259 		return;
2260 	}
2261 
2262 	if (nvme_rdma_setup_ctrl(ctrl, false))
2263 		goto out_fail;
2264 
2265 	return;
2266 
2267 out_fail:
2268 	++ctrl->ctrl.nr_reconnects;
2269 	nvme_rdma_reconnect_or_remove(ctrl);
2270 }
2271 
2272 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2273 	.name			= "rdma",
2274 	.module			= THIS_MODULE,
2275 	.flags			= NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
2276 	.reg_read32		= nvmf_reg_read32,
2277 	.reg_read64		= nvmf_reg_read64,
2278 	.reg_write32		= nvmf_reg_write32,
2279 	.free_ctrl		= nvme_rdma_free_ctrl,
2280 	.submit_async_event	= nvme_rdma_submit_async_event,
2281 	.delete_ctrl		= nvme_rdma_delete_ctrl,
2282 	.get_address		= nvmf_get_address,
2283 };
2284 
2285 /*
2286  * Fails a connection request if it matches an existing controller
2287  * (association) with the same tuple:
2288  * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2289  *
2290  * if local address is not specified in the request, it will match an
2291  * existing controller with all the other parameters the same and no
2292  * local port address specified as well.
2293  *
2294  * The ports don't need to be compared as they are intrinsically
2295  * already matched by the port pointers supplied.
2296  */
2297 static bool
2298 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2299 {
2300 	struct nvme_rdma_ctrl *ctrl;
2301 	bool found = false;
2302 
2303 	mutex_lock(&nvme_rdma_ctrl_mutex);
2304 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2305 		found = nvmf_ip_options_match(&ctrl->ctrl, opts);
2306 		if (found)
2307 			break;
2308 	}
2309 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2310 
2311 	return found;
2312 }
2313 
2314 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2315 		struct nvmf_ctrl_options *opts)
2316 {
2317 	struct nvme_rdma_ctrl *ctrl;
2318 	int ret;
2319 	bool changed;
2320 
2321 	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
2322 	if (!ctrl)
2323 		return ERR_PTR(-ENOMEM);
2324 	ctrl->ctrl.opts = opts;
2325 	INIT_LIST_HEAD(&ctrl->list);
2326 
2327 	if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2328 		opts->trsvcid =
2329 			kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2330 		if (!opts->trsvcid) {
2331 			ret = -ENOMEM;
2332 			goto out_free_ctrl;
2333 		}
2334 		opts->mask |= NVMF_OPT_TRSVCID;
2335 	}
2336 
2337 	ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2338 			opts->traddr, opts->trsvcid, &ctrl->addr);
2339 	if (ret) {
2340 		pr_err("malformed address passed: %s:%s\n",
2341 			opts->traddr, opts->trsvcid);
2342 		goto out_free_ctrl;
2343 	}
2344 
2345 	if (opts->mask & NVMF_OPT_HOST_TRADDR) {
2346 		ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2347 			opts->host_traddr, NULL, &ctrl->src_addr);
2348 		if (ret) {
2349 			pr_err("malformed src address passed: %s\n",
2350 			       opts->host_traddr);
2351 			goto out_free_ctrl;
2352 		}
2353 	}
2354 
2355 	if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2356 		ret = -EALREADY;
2357 		goto out_free_ctrl;
2358 	}
2359 
2360 	INIT_DELAYED_WORK(&ctrl->reconnect_work,
2361 			nvme_rdma_reconnect_ctrl_work);
2362 	INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2363 	INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
2364 
2365 	ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2366 				opts->nr_poll_queues + 1;
2367 	ctrl->ctrl.sqsize = opts->queue_size - 1;
2368 	ctrl->ctrl.kato = opts->kato;
2369 
2370 	ret = -ENOMEM;
2371 	ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
2372 				GFP_KERNEL);
2373 	if (!ctrl->queues)
2374 		goto out_free_ctrl;
2375 
2376 	ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2377 				0 /* no quirks, we're perfect! */);
2378 	if (ret)
2379 		goto out_kfree_queues;
2380 
2381 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2382 	WARN_ON_ONCE(!changed);
2383 
2384 	ret = nvme_rdma_setup_ctrl(ctrl, true);
2385 	if (ret)
2386 		goto out_uninit_ctrl;
2387 
2388 	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
2389 		ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2390 
2391 	mutex_lock(&nvme_rdma_ctrl_mutex);
2392 	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2393 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2394 
2395 	return &ctrl->ctrl;
2396 
2397 out_uninit_ctrl:
2398 	nvme_uninit_ctrl(&ctrl->ctrl);
2399 	nvme_put_ctrl(&ctrl->ctrl);
2400 	if (ret > 0)
2401 		ret = -EIO;
2402 	return ERR_PTR(ret);
2403 out_kfree_queues:
2404 	kfree(ctrl->queues);
2405 out_free_ctrl:
2406 	kfree(ctrl);
2407 	return ERR_PTR(ret);
2408 }
2409 
2410 static struct nvmf_transport_ops nvme_rdma_transport = {
2411 	.name		= "rdma",
2412 	.module		= THIS_MODULE,
2413 	.required_opts	= NVMF_OPT_TRADDR,
2414 	.allowed_opts	= NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2415 			  NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2416 			  NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2417 			  NVMF_OPT_TOS,
2418 	.create_ctrl	= nvme_rdma_create_ctrl,
2419 };
2420 
2421 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2422 {
2423 	struct nvme_rdma_ctrl *ctrl;
2424 	struct nvme_rdma_device *ndev;
2425 	bool found = false;
2426 
2427 	mutex_lock(&device_list_mutex);
2428 	list_for_each_entry(ndev, &device_list, entry) {
2429 		if (ndev->dev == ib_device) {
2430 			found = true;
2431 			break;
2432 		}
2433 	}
2434 	mutex_unlock(&device_list_mutex);
2435 
2436 	if (!found)
2437 		return;
2438 
2439 	/* Delete all controllers using this device */
2440 	mutex_lock(&nvme_rdma_ctrl_mutex);
2441 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2442 		if (ctrl->device->dev != ib_device)
2443 			continue;
2444 		nvme_delete_ctrl(&ctrl->ctrl);
2445 	}
2446 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2447 
2448 	flush_workqueue(nvme_delete_wq);
2449 }
2450 
2451 static struct ib_client nvme_rdma_ib_client = {
2452 	.name   = "nvme_rdma",
2453 	.remove = nvme_rdma_remove_one
2454 };
2455 
2456 static int __init nvme_rdma_init_module(void)
2457 {
2458 	int ret;
2459 
2460 	ret = ib_register_client(&nvme_rdma_ib_client);
2461 	if (ret)
2462 		return ret;
2463 
2464 	ret = nvmf_register_transport(&nvme_rdma_transport);
2465 	if (ret)
2466 		goto err_unreg_client;
2467 
2468 	return 0;
2469 
2470 err_unreg_client:
2471 	ib_unregister_client(&nvme_rdma_ib_client);
2472 	return ret;
2473 }
2474 
2475 static void __exit nvme_rdma_cleanup_module(void)
2476 {
2477 	struct nvme_rdma_ctrl *ctrl;
2478 
2479 	nvmf_unregister_transport(&nvme_rdma_transport);
2480 	ib_unregister_client(&nvme_rdma_ib_client);
2481 
2482 	mutex_lock(&nvme_rdma_ctrl_mutex);
2483 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2484 		nvme_delete_ctrl(&ctrl->ctrl);
2485 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2486 	flush_workqueue(nvme_delete_wq);
2487 }
2488 
2489 module_init(nvme_rdma_init_module);
2490 module_exit(nvme_rdma_cleanup_module);
2491 
2492 MODULE_LICENSE("GPL v2");
2493