1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA host code. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/init.h> 9 #include <linux/slab.h> 10 #include <rdma/mr_pool.h> 11 #include <linux/err.h> 12 #include <linux/string.h> 13 #include <linux/atomic.h> 14 #include <linux/blk-mq.h> 15 #include <linux/blk-mq-rdma.h> 16 #include <linux/blk-integrity.h> 17 #include <linux/types.h> 18 #include <linux/list.h> 19 #include <linux/mutex.h> 20 #include <linux/scatterlist.h> 21 #include <linux/nvme.h> 22 #include <asm/unaligned.h> 23 24 #include <rdma/ib_verbs.h> 25 #include <rdma/rdma_cm.h> 26 #include <linux/nvme-rdma.h> 27 28 #include "nvme.h" 29 #include "fabrics.h" 30 31 32 #define NVME_RDMA_CM_TIMEOUT_MS 3000 /* 3 second */ 33 34 #define NVME_RDMA_MAX_SEGMENTS 256 35 36 #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 37 38 #define NVME_RDMA_DATA_SGL_SIZE \ 39 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) 40 #define NVME_RDMA_METADATA_SGL_SIZE \ 41 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) 42 43 struct nvme_rdma_device { 44 struct ib_device *dev; 45 struct ib_pd *pd; 46 struct kref ref; 47 struct list_head entry; 48 unsigned int num_inline_segments; 49 }; 50 51 struct nvme_rdma_qe { 52 struct ib_cqe cqe; 53 void *data; 54 u64 dma; 55 }; 56 57 struct nvme_rdma_sgl { 58 int nents; 59 struct sg_table sg_table; 60 }; 61 62 struct nvme_rdma_queue; 63 struct nvme_rdma_request { 64 struct nvme_request req; 65 struct ib_mr *mr; 66 struct nvme_rdma_qe sqe; 67 union nvme_result result; 68 __le16 status; 69 refcount_t ref; 70 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; 71 u32 num_sge; 72 struct ib_reg_wr reg_wr; 73 struct ib_cqe reg_cqe; 74 struct nvme_rdma_queue *queue; 75 struct nvme_rdma_sgl data_sgl; 76 struct nvme_rdma_sgl *metadata_sgl; 77 bool use_sig_mr; 78 }; 79 80 enum nvme_rdma_queue_flags { 81 NVME_RDMA_Q_ALLOCATED = 0, 82 NVME_RDMA_Q_LIVE = 1, 83 NVME_RDMA_Q_TR_READY = 2, 84 }; 85 86 struct nvme_rdma_queue { 87 struct nvme_rdma_qe *rsp_ring; 88 int queue_size; 89 size_t cmnd_capsule_len; 90 struct nvme_rdma_ctrl *ctrl; 91 struct nvme_rdma_device *device; 92 struct ib_cq *ib_cq; 93 struct ib_qp *qp; 94 95 unsigned long flags; 96 struct rdma_cm_id *cm_id; 97 int cm_error; 98 struct completion cm_done; 99 bool pi_support; 100 int cq_size; 101 struct mutex queue_lock; 102 }; 103 104 struct nvme_rdma_ctrl { 105 /* read only in the hot path */ 106 struct nvme_rdma_queue *queues; 107 108 /* other member variables */ 109 struct blk_mq_tag_set tag_set; 110 struct work_struct err_work; 111 112 struct nvme_rdma_qe async_event_sqe; 113 114 struct delayed_work reconnect_work; 115 116 struct list_head list; 117 118 struct blk_mq_tag_set admin_tag_set; 119 struct nvme_rdma_device *device; 120 121 u32 max_fr_pages; 122 123 struct sockaddr_storage addr; 124 struct sockaddr_storage src_addr; 125 126 struct nvme_ctrl ctrl; 127 bool use_inline_data; 128 u32 io_queues[HCTX_MAX_TYPES]; 129 }; 130 131 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) 132 { 133 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); 134 } 135 136 static LIST_HEAD(device_list); 137 static DEFINE_MUTEX(device_list_mutex); 138 139 static LIST_HEAD(nvme_rdma_ctrl_list); 140 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); 141 142 /* 143 * Disabling this option makes small I/O goes faster, but is fundamentally 144 * unsafe. With it turned off we will have to register a global rkey that 145 * allows read and write access to all physical memory. 146 */ 147 static bool register_always = true; 148 module_param(register_always, bool, 0444); 149 MODULE_PARM_DESC(register_always, 150 "Use memory registration even for contiguous memory regions"); 151 152 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 153 struct rdma_cm_event *event); 154 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 155 static void nvme_rdma_complete_rq(struct request *rq); 156 157 static const struct blk_mq_ops nvme_rdma_mq_ops; 158 static const struct blk_mq_ops nvme_rdma_admin_mq_ops; 159 160 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) 161 { 162 return queue - queue->ctrl->queues; 163 } 164 165 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) 166 { 167 return nvme_rdma_queue_idx(queue) > 168 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + 169 queue->ctrl->io_queues[HCTX_TYPE_READ]; 170 } 171 172 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) 173 { 174 return queue->cmnd_capsule_len - sizeof(struct nvme_command); 175 } 176 177 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 178 size_t capsule_size, enum dma_data_direction dir) 179 { 180 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); 181 kfree(qe->data); 182 } 183 184 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 185 size_t capsule_size, enum dma_data_direction dir) 186 { 187 qe->data = kzalloc(capsule_size, GFP_KERNEL); 188 if (!qe->data) 189 return -ENOMEM; 190 191 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); 192 if (ib_dma_mapping_error(ibdev, qe->dma)) { 193 kfree(qe->data); 194 qe->data = NULL; 195 return -ENOMEM; 196 } 197 198 return 0; 199 } 200 201 static void nvme_rdma_free_ring(struct ib_device *ibdev, 202 struct nvme_rdma_qe *ring, size_t ib_queue_size, 203 size_t capsule_size, enum dma_data_direction dir) 204 { 205 int i; 206 207 for (i = 0; i < ib_queue_size; i++) 208 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); 209 kfree(ring); 210 } 211 212 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, 213 size_t ib_queue_size, size_t capsule_size, 214 enum dma_data_direction dir) 215 { 216 struct nvme_rdma_qe *ring; 217 int i; 218 219 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); 220 if (!ring) 221 return NULL; 222 223 /* 224 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue 225 * lifetime. It's safe, since any chage in the underlying RDMA device 226 * will issue error recovery and queue re-creation. 227 */ 228 for (i = 0; i < ib_queue_size; i++) { 229 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) 230 goto out_free_ring; 231 } 232 233 return ring; 234 235 out_free_ring: 236 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); 237 return NULL; 238 } 239 240 static void nvme_rdma_qp_event(struct ib_event *event, void *context) 241 { 242 pr_debug("QP event %s (%d)\n", 243 ib_event_msg(event->event), event->event); 244 245 } 246 247 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) 248 { 249 int ret; 250 251 ret = wait_for_completion_interruptible(&queue->cm_done); 252 if (ret) 253 return ret; 254 WARN_ON_ONCE(queue->cm_error > 0); 255 return queue->cm_error; 256 } 257 258 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) 259 { 260 struct nvme_rdma_device *dev = queue->device; 261 struct ib_qp_init_attr init_attr; 262 int ret; 263 264 memset(&init_attr, 0, sizeof(init_attr)); 265 init_attr.event_handler = nvme_rdma_qp_event; 266 /* +1 for drain */ 267 init_attr.cap.max_send_wr = factor * queue->queue_size + 1; 268 /* +1 for drain */ 269 init_attr.cap.max_recv_wr = queue->queue_size + 1; 270 init_attr.cap.max_recv_sge = 1; 271 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; 272 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 273 init_attr.qp_type = IB_QPT_RC; 274 init_attr.send_cq = queue->ib_cq; 275 init_attr.recv_cq = queue->ib_cq; 276 if (queue->pi_support) 277 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 278 init_attr.qp_context = queue; 279 280 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); 281 282 queue->qp = queue->cm_id->qp; 283 return ret; 284 } 285 286 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, 287 struct request *rq, unsigned int hctx_idx) 288 { 289 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 290 291 kfree(req->sqe.data); 292 } 293 294 static int nvme_rdma_init_request(struct blk_mq_tag_set *set, 295 struct request *rq, unsigned int hctx_idx, 296 unsigned int numa_node) 297 { 298 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data); 299 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 300 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; 301 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; 302 303 nvme_req(rq)->ctrl = &ctrl->ctrl; 304 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); 305 if (!req->sqe.data) 306 return -ENOMEM; 307 308 /* metadata nvme_rdma_sgl struct is located after command's data SGL */ 309 if (queue->pi_support) 310 req->metadata_sgl = (void *)nvme_req(rq) + 311 sizeof(struct nvme_rdma_request) + 312 NVME_RDMA_DATA_SGL_SIZE; 313 314 req->queue = queue; 315 nvme_req(rq)->cmd = req->sqe.data; 316 317 return 0; 318 } 319 320 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 321 unsigned int hctx_idx) 322 { 323 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data); 324 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; 325 326 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); 327 328 hctx->driver_data = queue; 329 return 0; 330 } 331 332 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, 333 unsigned int hctx_idx) 334 { 335 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data); 336 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 337 338 BUG_ON(hctx_idx != 0); 339 340 hctx->driver_data = queue; 341 return 0; 342 } 343 344 static void nvme_rdma_free_dev(struct kref *ref) 345 { 346 struct nvme_rdma_device *ndev = 347 container_of(ref, struct nvme_rdma_device, ref); 348 349 mutex_lock(&device_list_mutex); 350 list_del(&ndev->entry); 351 mutex_unlock(&device_list_mutex); 352 353 ib_dealloc_pd(ndev->pd); 354 kfree(ndev); 355 } 356 357 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) 358 { 359 kref_put(&dev->ref, nvme_rdma_free_dev); 360 } 361 362 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) 363 { 364 return kref_get_unless_zero(&dev->ref); 365 } 366 367 static struct nvme_rdma_device * 368 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) 369 { 370 struct nvme_rdma_device *ndev; 371 372 mutex_lock(&device_list_mutex); 373 list_for_each_entry(ndev, &device_list, entry) { 374 if (ndev->dev->node_guid == cm_id->device->node_guid && 375 nvme_rdma_dev_get(ndev)) 376 goto out_unlock; 377 } 378 379 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 380 if (!ndev) 381 goto out_err; 382 383 ndev->dev = cm_id->device; 384 kref_init(&ndev->ref); 385 386 ndev->pd = ib_alloc_pd(ndev->dev, 387 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); 388 if (IS_ERR(ndev->pd)) 389 goto out_free_dev; 390 391 if (!(ndev->dev->attrs.device_cap_flags & 392 IB_DEVICE_MEM_MGT_EXTENSIONS)) { 393 dev_err(&ndev->dev->dev, 394 "Memory registrations not supported.\n"); 395 goto out_free_pd; 396 } 397 398 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, 399 ndev->dev->attrs.max_send_sge - 1); 400 list_add(&ndev->entry, &device_list); 401 out_unlock: 402 mutex_unlock(&device_list_mutex); 403 return ndev; 404 405 out_free_pd: 406 ib_dealloc_pd(ndev->pd); 407 out_free_dev: 408 kfree(ndev); 409 out_err: 410 mutex_unlock(&device_list_mutex); 411 return NULL; 412 } 413 414 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue) 415 { 416 if (nvme_rdma_poll_queue(queue)) 417 ib_free_cq(queue->ib_cq); 418 else 419 ib_cq_pool_put(queue->ib_cq, queue->cq_size); 420 } 421 422 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) 423 { 424 struct nvme_rdma_device *dev; 425 struct ib_device *ibdev; 426 427 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) 428 return; 429 430 dev = queue->device; 431 ibdev = dev->dev; 432 433 if (queue->pi_support) 434 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); 435 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 436 437 /* 438 * The cm_id object might have been destroyed during RDMA connection 439 * establishment error flow to avoid getting other cma events, thus 440 * the destruction of the QP shouldn't use rdma_cm API. 441 */ 442 ib_destroy_qp(queue->qp); 443 nvme_rdma_free_cq(queue); 444 445 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 446 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 447 448 nvme_rdma_dev_put(dev); 449 } 450 451 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) 452 { 453 u32 max_page_list_len; 454 455 if (pi_support) 456 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; 457 else 458 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; 459 460 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); 461 } 462 463 static int nvme_rdma_create_cq(struct ib_device *ibdev, 464 struct nvme_rdma_queue *queue) 465 { 466 int ret, comp_vector, idx = nvme_rdma_queue_idx(queue); 467 enum ib_poll_context poll_ctx; 468 469 /* 470 * Spread I/O queues completion vectors according their queue index. 471 * Admin queues can always go on completion vector 0. 472 */ 473 comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; 474 475 /* Polling queues need direct cq polling context */ 476 if (nvme_rdma_poll_queue(queue)) { 477 poll_ctx = IB_POLL_DIRECT; 478 queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size, 479 comp_vector, poll_ctx); 480 } else { 481 poll_ctx = IB_POLL_SOFTIRQ; 482 queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size, 483 comp_vector, poll_ctx); 484 } 485 486 if (IS_ERR(queue->ib_cq)) { 487 ret = PTR_ERR(queue->ib_cq); 488 return ret; 489 } 490 491 return 0; 492 } 493 494 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) 495 { 496 struct ib_device *ibdev; 497 const int send_wr_factor = 3; /* MR, SEND, INV */ 498 const int cq_factor = send_wr_factor + 1; /* + RECV */ 499 int ret, pages_per_mr; 500 501 queue->device = nvme_rdma_find_get_device(queue->cm_id); 502 if (!queue->device) { 503 dev_err(queue->cm_id->device->dev.parent, 504 "no client data found!\n"); 505 return -ECONNREFUSED; 506 } 507 ibdev = queue->device->dev; 508 509 /* +1 for ib_stop_cq */ 510 queue->cq_size = cq_factor * queue->queue_size + 1; 511 512 ret = nvme_rdma_create_cq(ibdev, queue); 513 if (ret) 514 goto out_put_dev; 515 516 ret = nvme_rdma_create_qp(queue, send_wr_factor); 517 if (ret) 518 goto out_destroy_ib_cq; 519 520 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, 521 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 522 if (!queue->rsp_ring) { 523 ret = -ENOMEM; 524 goto out_destroy_qp; 525 } 526 527 /* 528 * Currently we don't use SG_GAPS MR's so if the first entry is 529 * misaligned we'll end up using two entries for a single data page, 530 * so one additional entry is required. 531 */ 532 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; 533 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, 534 queue->queue_size, 535 IB_MR_TYPE_MEM_REG, 536 pages_per_mr, 0); 537 if (ret) { 538 dev_err(queue->ctrl->ctrl.device, 539 "failed to initialize MR pool sized %d for QID %d\n", 540 queue->queue_size, nvme_rdma_queue_idx(queue)); 541 goto out_destroy_ring; 542 } 543 544 if (queue->pi_support) { 545 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, 546 queue->queue_size, IB_MR_TYPE_INTEGRITY, 547 pages_per_mr, pages_per_mr); 548 if (ret) { 549 dev_err(queue->ctrl->ctrl.device, 550 "failed to initialize PI MR pool sized %d for QID %d\n", 551 queue->queue_size, nvme_rdma_queue_idx(queue)); 552 goto out_destroy_mr_pool; 553 } 554 } 555 556 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); 557 558 return 0; 559 560 out_destroy_mr_pool: 561 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 562 out_destroy_ring: 563 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 564 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 565 out_destroy_qp: 566 rdma_destroy_qp(queue->cm_id); 567 out_destroy_ib_cq: 568 nvme_rdma_free_cq(queue); 569 out_put_dev: 570 nvme_rdma_dev_put(queue->device); 571 return ret; 572 } 573 574 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, 575 int idx, size_t queue_size) 576 { 577 struct nvme_rdma_queue *queue; 578 struct sockaddr *src_addr = NULL; 579 int ret; 580 581 queue = &ctrl->queues[idx]; 582 mutex_init(&queue->queue_lock); 583 queue->ctrl = ctrl; 584 if (idx && ctrl->ctrl.max_integrity_segments) 585 queue->pi_support = true; 586 else 587 queue->pi_support = false; 588 init_completion(&queue->cm_done); 589 590 if (idx > 0) 591 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; 592 else 593 queue->cmnd_capsule_len = sizeof(struct nvme_command); 594 595 queue->queue_size = queue_size; 596 597 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, 598 RDMA_PS_TCP, IB_QPT_RC); 599 if (IS_ERR(queue->cm_id)) { 600 dev_info(ctrl->ctrl.device, 601 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); 602 ret = PTR_ERR(queue->cm_id); 603 goto out_destroy_mutex; 604 } 605 606 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) 607 src_addr = (struct sockaddr *)&ctrl->src_addr; 608 609 queue->cm_error = -ETIMEDOUT; 610 ret = rdma_resolve_addr(queue->cm_id, src_addr, 611 (struct sockaddr *)&ctrl->addr, 612 NVME_RDMA_CM_TIMEOUT_MS); 613 if (ret) { 614 dev_info(ctrl->ctrl.device, 615 "rdma_resolve_addr failed (%d).\n", ret); 616 goto out_destroy_cm_id; 617 } 618 619 ret = nvme_rdma_wait_for_cm(queue); 620 if (ret) { 621 dev_info(ctrl->ctrl.device, 622 "rdma connection establishment failed (%d)\n", ret); 623 goto out_destroy_cm_id; 624 } 625 626 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); 627 628 return 0; 629 630 out_destroy_cm_id: 631 rdma_destroy_id(queue->cm_id); 632 nvme_rdma_destroy_queue_ib(queue); 633 out_destroy_mutex: 634 mutex_destroy(&queue->queue_lock); 635 return ret; 636 } 637 638 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 639 { 640 rdma_disconnect(queue->cm_id); 641 ib_drain_qp(queue->qp); 642 } 643 644 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 645 { 646 mutex_lock(&queue->queue_lock); 647 if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) 648 __nvme_rdma_stop_queue(queue); 649 mutex_unlock(&queue->queue_lock); 650 } 651 652 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) 653 { 654 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 655 return; 656 657 rdma_destroy_id(queue->cm_id); 658 nvme_rdma_destroy_queue_ib(queue); 659 mutex_destroy(&queue->queue_lock); 660 } 661 662 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) 663 { 664 int i; 665 666 for (i = 1; i < ctrl->ctrl.queue_count; i++) 667 nvme_rdma_free_queue(&ctrl->queues[i]); 668 } 669 670 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) 671 { 672 int i; 673 674 for (i = 1; i < ctrl->ctrl.queue_count; i++) 675 nvme_rdma_stop_queue(&ctrl->queues[i]); 676 } 677 678 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) 679 { 680 struct nvme_rdma_queue *queue = &ctrl->queues[idx]; 681 int ret; 682 683 if (idx) 684 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx); 685 else 686 ret = nvmf_connect_admin_queue(&ctrl->ctrl); 687 688 if (!ret) { 689 set_bit(NVME_RDMA_Q_LIVE, &queue->flags); 690 } else { 691 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 692 __nvme_rdma_stop_queue(queue); 693 dev_info(ctrl->ctrl.device, 694 "failed to connect queue: %d ret=%d\n", idx, ret); 695 } 696 return ret; 697 } 698 699 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl, 700 int first, int last) 701 { 702 int i, ret = 0; 703 704 for (i = first; i < last; i++) { 705 ret = nvme_rdma_start_queue(ctrl, i); 706 if (ret) 707 goto out_stop_queues; 708 } 709 710 return 0; 711 712 out_stop_queues: 713 for (i--; i >= first; i--) 714 nvme_rdma_stop_queue(&ctrl->queues[i]); 715 return ret; 716 } 717 718 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) 719 { 720 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 721 struct ib_device *ibdev = ctrl->device->dev; 722 unsigned int nr_io_queues, nr_default_queues; 723 unsigned int nr_read_queues, nr_poll_queues; 724 int i, ret; 725 726 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, 727 min(opts->nr_io_queues, num_online_cpus())); 728 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, 729 min(opts->nr_write_queues, num_online_cpus())); 730 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); 731 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; 732 733 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); 734 if (ret) 735 return ret; 736 737 if (nr_io_queues == 0) { 738 dev_err(ctrl->ctrl.device, 739 "unable to set any I/O queues\n"); 740 return -ENOMEM; 741 } 742 743 ctrl->ctrl.queue_count = nr_io_queues + 1; 744 dev_info(ctrl->ctrl.device, 745 "creating %d I/O queues.\n", nr_io_queues); 746 747 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { 748 /* 749 * separate read/write queues 750 * hand out dedicated default queues only after we have 751 * sufficient read queues. 752 */ 753 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; 754 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; 755 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 756 min(nr_default_queues, nr_io_queues); 757 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 758 } else { 759 /* 760 * shared read/write queues 761 * either no write queues were requested, or we don't have 762 * sufficient queue count to have dedicated default queues. 763 */ 764 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 765 min(nr_read_queues, nr_io_queues); 766 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 767 } 768 769 if (opts->nr_poll_queues && nr_io_queues) { 770 /* map dedicated poll queues only if we have queues left */ 771 ctrl->io_queues[HCTX_TYPE_POLL] = 772 min(nr_poll_queues, nr_io_queues); 773 } 774 775 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 776 ret = nvme_rdma_alloc_queue(ctrl, i, 777 ctrl->ctrl.sqsize + 1); 778 if (ret) 779 goto out_free_queues; 780 } 781 782 return 0; 783 784 out_free_queues: 785 for (i--; i >= 1; i--) 786 nvme_rdma_free_queue(&ctrl->queues[i]); 787 788 return ret; 789 } 790 791 static int nvme_rdma_alloc_tag_set(struct nvme_ctrl *ctrl) 792 { 793 unsigned int cmd_size = sizeof(struct nvme_rdma_request) + 794 NVME_RDMA_DATA_SGL_SIZE; 795 796 if (ctrl->max_integrity_segments) 797 cmd_size += sizeof(struct nvme_rdma_sgl) + 798 NVME_RDMA_METADATA_SGL_SIZE; 799 800 return nvme_alloc_io_tag_set(ctrl, &to_rdma_ctrl(ctrl)->tag_set, 801 &nvme_rdma_mq_ops, BLK_MQ_F_SHOULD_MERGE, 802 ctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2, 803 cmd_size); 804 } 805 806 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl) 807 { 808 if (ctrl->async_event_sqe.data) { 809 cancel_work_sync(&ctrl->ctrl.async_event_work); 810 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 811 sizeof(struct nvme_command), DMA_TO_DEVICE); 812 ctrl->async_event_sqe.data = NULL; 813 } 814 nvme_rdma_free_queue(&ctrl->queues[0]); 815 } 816 817 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, 818 bool new) 819 { 820 bool pi_capable = false; 821 int error; 822 823 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); 824 if (error) 825 return error; 826 827 ctrl->device = ctrl->queues[0].device; 828 ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev); 829 830 /* T10-PI support */ 831 if (ctrl->device->dev->attrs.kernel_cap_flags & 832 IBK_INTEGRITY_HANDOVER) 833 pi_capable = true; 834 835 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, 836 pi_capable); 837 838 /* 839 * Bind the async event SQE DMA mapping to the admin queue lifetime. 840 * It's safe, since any chage in the underlying RDMA device will issue 841 * error recovery and queue re-creation. 842 */ 843 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, 844 sizeof(struct nvme_command), DMA_TO_DEVICE); 845 if (error) 846 goto out_free_queue; 847 848 if (new) { 849 error = nvme_alloc_admin_tag_set(&ctrl->ctrl, 850 &ctrl->admin_tag_set, &nvme_rdma_admin_mq_ops, 851 BLK_MQ_F_NO_SCHED, 852 sizeof(struct nvme_rdma_request) + 853 NVME_RDMA_DATA_SGL_SIZE); 854 if (error) 855 goto out_free_async_qe; 856 857 } 858 859 error = nvme_rdma_start_queue(ctrl, 0); 860 if (error) 861 goto out_remove_admin_tag_set; 862 863 error = nvme_enable_ctrl(&ctrl->ctrl); 864 if (error) 865 goto out_stop_queue; 866 867 ctrl->ctrl.max_segments = ctrl->max_fr_pages; 868 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); 869 if (pi_capable) 870 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; 871 else 872 ctrl->ctrl.max_integrity_segments = 0; 873 874 nvme_unquiesce_admin_queue(&ctrl->ctrl); 875 876 error = nvme_init_ctrl_finish(&ctrl->ctrl, false); 877 if (error) 878 goto out_quiesce_queue; 879 880 return 0; 881 882 out_quiesce_queue: 883 nvme_quiesce_admin_queue(&ctrl->ctrl); 884 blk_sync_queue(ctrl->ctrl.admin_q); 885 out_stop_queue: 886 nvme_rdma_stop_queue(&ctrl->queues[0]); 887 nvme_cancel_admin_tagset(&ctrl->ctrl); 888 out_remove_admin_tag_set: 889 if (new) 890 nvme_remove_admin_tag_set(&ctrl->ctrl); 891 out_free_async_qe: 892 if (ctrl->async_event_sqe.data) { 893 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 894 sizeof(struct nvme_command), DMA_TO_DEVICE); 895 ctrl->async_event_sqe.data = NULL; 896 } 897 out_free_queue: 898 nvme_rdma_free_queue(&ctrl->queues[0]); 899 return error; 900 } 901 902 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) 903 { 904 int ret, nr_queues; 905 906 ret = nvme_rdma_alloc_io_queues(ctrl); 907 if (ret) 908 return ret; 909 910 if (new) { 911 ret = nvme_rdma_alloc_tag_set(&ctrl->ctrl); 912 if (ret) 913 goto out_free_io_queues; 914 } 915 916 /* 917 * Only start IO queues for which we have allocated the tagset 918 * and limitted it to the available queues. On reconnects, the 919 * queue number might have changed. 920 */ 921 nr_queues = min(ctrl->tag_set.nr_hw_queues + 1, ctrl->ctrl.queue_count); 922 ret = nvme_rdma_start_io_queues(ctrl, 1, nr_queues); 923 if (ret) 924 goto out_cleanup_tagset; 925 926 if (!new) { 927 nvme_unquiesce_io_queues(&ctrl->ctrl); 928 if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) { 929 /* 930 * If we timed out waiting for freeze we are likely to 931 * be stuck. Fail the controller initialization just 932 * to be safe. 933 */ 934 ret = -ENODEV; 935 goto out_wait_freeze_timed_out; 936 } 937 blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset, 938 ctrl->ctrl.queue_count - 1); 939 nvme_unfreeze(&ctrl->ctrl); 940 } 941 942 /* 943 * If the number of queues has increased (reconnect case) 944 * start all new queues now. 945 */ 946 ret = nvme_rdma_start_io_queues(ctrl, nr_queues, 947 ctrl->tag_set.nr_hw_queues + 1); 948 if (ret) 949 goto out_wait_freeze_timed_out; 950 951 return 0; 952 953 out_wait_freeze_timed_out: 954 nvme_quiesce_io_queues(&ctrl->ctrl); 955 nvme_sync_io_queues(&ctrl->ctrl); 956 nvme_rdma_stop_io_queues(ctrl); 957 out_cleanup_tagset: 958 nvme_cancel_tagset(&ctrl->ctrl); 959 if (new) 960 nvme_remove_io_tag_set(&ctrl->ctrl); 961 out_free_io_queues: 962 nvme_rdma_free_io_queues(ctrl); 963 return ret; 964 } 965 966 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, 967 bool remove) 968 { 969 nvme_quiesce_admin_queue(&ctrl->ctrl); 970 blk_sync_queue(ctrl->ctrl.admin_q); 971 nvme_rdma_stop_queue(&ctrl->queues[0]); 972 nvme_cancel_admin_tagset(&ctrl->ctrl); 973 if (remove) { 974 nvme_unquiesce_admin_queue(&ctrl->ctrl); 975 nvme_remove_admin_tag_set(&ctrl->ctrl); 976 } 977 nvme_rdma_destroy_admin_queue(ctrl); 978 } 979 980 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, 981 bool remove) 982 { 983 if (ctrl->ctrl.queue_count > 1) { 984 nvme_start_freeze(&ctrl->ctrl); 985 nvme_quiesce_io_queues(&ctrl->ctrl); 986 nvme_sync_io_queues(&ctrl->ctrl); 987 nvme_rdma_stop_io_queues(ctrl); 988 nvme_cancel_tagset(&ctrl->ctrl); 989 if (remove) { 990 nvme_unquiesce_io_queues(&ctrl->ctrl); 991 nvme_remove_io_tag_set(&ctrl->ctrl); 992 } 993 nvme_rdma_free_io_queues(ctrl); 994 } 995 } 996 997 static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl) 998 { 999 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1000 1001 flush_work(&ctrl->err_work); 1002 cancel_delayed_work_sync(&ctrl->reconnect_work); 1003 } 1004 1005 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) 1006 { 1007 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1008 1009 if (list_empty(&ctrl->list)) 1010 goto free_ctrl; 1011 1012 mutex_lock(&nvme_rdma_ctrl_mutex); 1013 list_del(&ctrl->list); 1014 mutex_unlock(&nvme_rdma_ctrl_mutex); 1015 1016 nvmf_free_options(nctrl->opts); 1017 free_ctrl: 1018 kfree(ctrl->queues); 1019 kfree(ctrl); 1020 } 1021 1022 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) 1023 { 1024 /* If we are resetting/deleting then do nothing */ 1025 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { 1026 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || 1027 ctrl->ctrl.state == NVME_CTRL_LIVE); 1028 return; 1029 } 1030 1031 if (nvmf_should_reconnect(&ctrl->ctrl)) { 1032 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", 1033 ctrl->ctrl.opts->reconnect_delay); 1034 queue_delayed_work(nvme_wq, &ctrl->reconnect_work, 1035 ctrl->ctrl.opts->reconnect_delay * HZ); 1036 } else { 1037 nvme_delete_ctrl(&ctrl->ctrl); 1038 } 1039 } 1040 1041 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) 1042 { 1043 int ret; 1044 bool changed; 1045 1046 ret = nvme_rdma_configure_admin_queue(ctrl, new); 1047 if (ret) 1048 return ret; 1049 1050 if (ctrl->ctrl.icdoff) { 1051 ret = -EOPNOTSUPP; 1052 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); 1053 goto destroy_admin; 1054 } 1055 1056 if (!(ctrl->ctrl.sgls & (1 << 2))) { 1057 ret = -EOPNOTSUPP; 1058 dev_err(ctrl->ctrl.device, 1059 "Mandatory keyed sgls are not supported!\n"); 1060 goto destroy_admin; 1061 } 1062 1063 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { 1064 dev_warn(ctrl->ctrl.device, 1065 "queue_size %zu > ctrl sqsize %u, clamping down\n", 1066 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); 1067 } 1068 1069 if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) { 1070 dev_warn(ctrl->ctrl.device, 1071 "ctrl sqsize %u > max queue size %u, clamping down\n", 1072 ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE); 1073 ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1; 1074 } 1075 1076 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { 1077 dev_warn(ctrl->ctrl.device, 1078 "sqsize %u > ctrl maxcmd %u, clamping down\n", 1079 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); 1080 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; 1081 } 1082 1083 if (ctrl->ctrl.sgls & (1 << 20)) 1084 ctrl->use_inline_data = true; 1085 1086 if (ctrl->ctrl.queue_count > 1) { 1087 ret = nvme_rdma_configure_io_queues(ctrl, new); 1088 if (ret) 1089 goto destroy_admin; 1090 } 1091 1092 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); 1093 if (!changed) { 1094 /* 1095 * state change failure is ok if we started ctrl delete, 1096 * unless we're during creation of a new controller to 1097 * avoid races with teardown flow. 1098 */ 1099 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1100 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1101 WARN_ON_ONCE(new); 1102 ret = -EINVAL; 1103 goto destroy_io; 1104 } 1105 1106 nvme_start_ctrl(&ctrl->ctrl); 1107 return 0; 1108 1109 destroy_io: 1110 if (ctrl->ctrl.queue_count > 1) { 1111 nvme_quiesce_io_queues(&ctrl->ctrl); 1112 nvme_sync_io_queues(&ctrl->ctrl); 1113 nvme_rdma_stop_io_queues(ctrl); 1114 nvme_cancel_tagset(&ctrl->ctrl); 1115 if (new) 1116 nvme_remove_io_tag_set(&ctrl->ctrl); 1117 nvme_rdma_free_io_queues(ctrl); 1118 } 1119 destroy_admin: 1120 nvme_quiesce_admin_queue(&ctrl->ctrl); 1121 blk_sync_queue(ctrl->ctrl.admin_q); 1122 nvme_rdma_stop_queue(&ctrl->queues[0]); 1123 nvme_cancel_admin_tagset(&ctrl->ctrl); 1124 if (new) 1125 nvme_remove_admin_tag_set(&ctrl->ctrl); 1126 nvme_rdma_destroy_admin_queue(ctrl); 1127 return ret; 1128 } 1129 1130 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 1131 { 1132 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), 1133 struct nvme_rdma_ctrl, reconnect_work); 1134 1135 ++ctrl->ctrl.nr_reconnects; 1136 1137 if (nvme_rdma_setup_ctrl(ctrl, false)) 1138 goto requeue; 1139 1140 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", 1141 ctrl->ctrl.nr_reconnects); 1142 1143 ctrl->ctrl.nr_reconnects = 0; 1144 1145 return; 1146 1147 requeue: 1148 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", 1149 ctrl->ctrl.nr_reconnects); 1150 nvme_rdma_reconnect_or_remove(ctrl); 1151 } 1152 1153 static void nvme_rdma_error_recovery_work(struct work_struct *work) 1154 { 1155 struct nvme_rdma_ctrl *ctrl = container_of(work, 1156 struct nvme_rdma_ctrl, err_work); 1157 1158 nvme_stop_keep_alive(&ctrl->ctrl); 1159 flush_work(&ctrl->ctrl.async_event_work); 1160 nvme_rdma_teardown_io_queues(ctrl, false); 1161 nvme_unquiesce_io_queues(&ctrl->ctrl); 1162 nvme_rdma_teardown_admin_queue(ctrl, false); 1163 nvme_unquiesce_admin_queue(&ctrl->ctrl); 1164 nvme_auth_stop(&ctrl->ctrl); 1165 1166 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 1167 /* state change failure is ok if we started ctrl delete */ 1168 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1169 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1170 return; 1171 } 1172 1173 nvme_rdma_reconnect_or_remove(ctrl); 1174 } 1175 1176 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) 1177 { 1178 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) 1179 return; 1180 1181 dev_warn(ctrl->ctrl.device, "starting error recovery\n"); 1182 queue_work(nvme_reset_wq, &ctrl->err_work); 1183 } 1184 1185 static void nvme_rdma_end_request(struct nvme_rdma_request *req) 1186 { 1187 struct request *rq = blk_mq_rq_from_pdu(req); 1188 1189 if (!refcount_dec_and_test(&req->ref)) 1190 return; 1191 if (!nvme_try_complete_req(rq, req->status, req->result)) 1192 nvme_rdma_complete_rq(rq); 1193 } 1194 1195 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, 1196 const char *op) 1197 { 1198 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1199 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1200 1201 if (ctrl->ctrl.state == NVME_CTRL_LIVE) 1202 dev_info(ctrl->ctrl.device, 1203 "%s for CQE 0x%p failed with status %s (%d)\n", 1204 op, wc->wr_cqe, 1205 ib_wc_status_msg(wc->status), wc->status); 1206 nvme_rdma_error_recovery(ctrl); 1207 } 1208 1209 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) 1210 { 1211 if (unlikely(wc->status != IB_WC_SUCCESS)) 1212 nvme_rdma_wr_error(cq, wc, "MEMREG"); 1213 } 1214 1215 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) 1216 { 1217 struct nvme_rdma_request *req = 1218 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); 1219 1220 if (unlikely(wc->status != IB_WC_SUCCESS)) 1221 nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); 1222 else 1223 nvme_rdma_end_request(req); 1224 } 1225 1226 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, 1227 struct nvme_rdma_request *req) 1228 { 1229 struct ib_send_wr wr = { 1230 .opcode = IB_WR_LOCAL_INV, 1231 .next = NULL, 1232 .num_sge = 0, 1233 .send_flags = IB_SEND_SIGNALED, 1234 .ex.invalidate_rkey = req->mr->rkey, 1235 }; 1236 1237 req->reg_cqe.done = nvme_rdma_inv_rkey_done; 1238 wr.wr_cqe = &req->reg_cqe; 1239 1240 return ib_post_send(queue->qp, &wr, NULL); 1241 } 1242 1243 static void nvme_rdma_dma_unmap_req(struct ib_device *ibdev, struct request *rq) 1244 { 1245 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1246 1247 if (blk_integrity_rq(rq)) { 1248 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1249 req->metadata_sgl->nents, rq_dma_dir(rq)); 1250 sg_free_table_chained(&req->metadata_sgl->sg_table, 1251 NVME_INLINE_METADATA_SG_CNT); 1252 } 1253 1254 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1255 rq_dma_dir(rq)); 1256 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1257 } 1258 1259 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, 1260 struct request *rq) 1261 { 1262 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1263 struct nvme_rdma_device *dev = queue->device; 1264 struct ib_device *ibdev = dev->dev; 1265 struct list_head *pool = &queue->qp->rdma_mrs; 1266 1267 if (!blk_rq_nr_phys_segments(rq)) 1268 return; 1269 1270 if (req->use_sig_mr) 1271 pool = &queue->qp->sig_mrs; 1272 1273 if (req->mr) { 1274 ib_mr_pool_put(queue->qp, pool, req->mr); 1275 req->mr = NULL; 1276 } 1277 1278 nvme_rdma_dma_unmap_req(ibdev, rq); 1279 } 1280 1281 static int nvme_rdma_set_sg_null(struct nvme_command *c) 1282 { 1283 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1284 1285 sg->addr = 0; 1286 put_unaligned_le24(0, sg->length); 1287 put_unaligned_le32(0, sg->key); 1288 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1289 return 0; 1290 } 1291 1292 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, 1293 struct nvme_rdma_request *req, struct nvme_command *c, 1294 int count) 1295 { 1296 struct nvme_sgl_desc *sg = &c->common.dptr.sgl; 1297 struct ib_sge *sge = &req->sge[1]; 1298 struct scatterlist *sgl; 1299 u32 len = 0; 1300 int i; 1301 1302 for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) { 1303 sge->addr = sg_dma_address(sgl); 1304 sge->length = sg_dma_len(sgl); 1305 sge->lkey = queue->device->pd->local_dma_lkey; 1306 len += sge->length; 1307 sge++; 1308 } 1309 1310 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); 1311 sg->length = cpu_to_le32(len); 1312 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; 1313 1314 req->num_sge += count; 1315 return 0; 1316 } 1317 1318 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, 1319 struct nvme_rdma_request *req, struct nvme_command *c) 1320 { 1321 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1322 1323 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); 1324 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); 1325 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); 1326 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1327 return 0; 1328 } 1329 1330 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, 1331 struct nvme_rdma_request *req, struct nvme_command *c, 1332 int count) 1333 { 1334 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1335 int nr; 1336 1337 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); 1338 if (WARN_ON_ONCE(!req->mr)) 1339 return -EAGAIN; 1340 1341 /* 1342 * Align the MR to a 4K page size to match the ctrl page size and 1343 * the block virtual boundary. 1344 */ 1345 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, 1346 SZ_4K); 1347 if (unlikely(nr < count)) { 1348 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); 1349 req->mr = NULL; 1350 if (nr < 0) 1351 return nr; 1352 return -EINVAL; 1353 } 1354 1355 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1356 1357 req->reg_cqe.done = nvme_rdma_memreg_done; 1358 memset(&req->reg_wr, 0, sizeof(req->reg_wr)); 1359 req->reg_wr.wr.opcode = IB_WR_REG_MR; 1360 req->reg_wr.wr.wr_cqe = &req->reg_cqe; 1361 req->reg_wr.wr.num_sge = 0; 1362 req->reg_wr.mr = req->mr; 1363 req->reg_wr.key = req->mr->rkey; 1364 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | 1365 IB_ACCESS_REMOTE_READ | 1366 IB_ACCESS_REMOTE_WRITE; 1367 1368 sg->addr = cpu_to_le64(req->mr->iova); 1369 put_unaligned_le24(req->mr->length, sg->length); 1370 put_unaligned_le32(req->mr->rkey, sg->key); 1371 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | 1372 NVME_SGL_FMT_INVALIDATE; 1373 1374 return 0; 1375 } 1376 1377 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, 1378 struct nvme_command *cmd, struct ib_sig_domain *domain, 1379 u16 control, u8 pi_type) 1380 { 1381 domain->sig_type = IB_SIG_TYPE_T10_DIF; 1382 domain->sig.dif.bg_type = IB_T10DIF_CRC; 1383 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 1384 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 1385 if (control & NVME_RW_PRINFO_PRCHK_REF) 1386 domain->sig.dif.ref_remap = true; 1387 1388 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 1389 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 1390 domain->sig.dif.app_escape = true; 1391 if (pi_type == NVME_NS_DPS_PI_TYPE3) 1392 domain->sig.dif.ref_escape = true; 1393 } 1394 1395 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, 1396 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, 1397 u8 pi_type) 1398 { 1399 u16 control = le16_to_cpu(cmd->rw.control); 1400 1401 memset(sig_attrs, 0, sizeof(*sig_attrs)); 1402 if (control & NVME_RW_PRINFO_PRACT) { 1403 /* for WRITE_INSERT/READ_STRIP no memory domain */ 1404 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; 1405 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1406 pi_type); 1407 /* Clear the PRACT bit since HCA will generate/verify the PI */ 1408 control &= ~NVME_RW_PRINFO_PRACT; 1409 cmd->rw.control = cpu_to_le16(control); 1410 } else { 1411 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 1412 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1413 pi_type); 1414 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 1415 pi_type); 1416 } 1417 } 1418 1419 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) 1420 { 1421 *mask = 0; 1422 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) 1423 *mask |= IB_SIG_CHECK_REFTAG; 1424 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) 1425 *mask |= IB_SIG_CHECK_GUARD; 1426 } 1427 1428 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) 1429 { 1430 if (unlikely(wc->status != IB_WC_SUCCESS)) 1431 nvme_rdma_wr_error(cq, wc, "SIG"); 1432 } 1433 1434 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, 1435 struct nvme_rdma_request *req, struct nvme_command *c, 1436 int count, int pi_count) 1437 { 1438 struct nvme_rdma_sgl *sgl = &req->data_sgl; 1439 struct ib_reg_wr *wr = &req->reg_wr; 1440 struct request *rq = blk_mq_rq_from_pdu(req); 1441 struct nvme_ns *ns = rq->q->queuedata; 1442 struct bio *bio = rq->bio; 1443 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1444 int nr; 1445 1446 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); 1447 if (WARN_ON_ONCE(!req->mr)) 1448 return -EAGAIN; 1449 1450 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, 1451 req->metadata_sgl->sg_table.sgl, pi_count, NULL, 1452 SZ_4K); 1453 if (unlikely(nr)) 1454 goto mr_put; 1455 1456 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c, 1457 req->mr->sig_attrs, ns->pi_type); 1458 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); 1459 1460 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1461 1462 req->reg_cqe.done = nvme_rdma_sig_done; 1463 memset(wr, 0, sizeof(*wr)); 1464 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; 1465 wr->wr.wr_cqe = &req->reg_cqe; 1466 wr->wr.num_sge = 0; 1467 wr->wr.send_flags = 0; 1468 wr->mr = req->mr; 1469 wr->key = req->mr->rkey; 1470 wr->access = IB_ACCESS_LOCAL_WRITE | 1471 IB_ACCESS_REMOTE_READ | 1472 IB_ACCESS_REMOTE_WRITE; 1473 1474 sg->addr = cpu_to_le64(req->mr->iova); 1475 put_unaligned_le24(req->mr->length, sg->length); 1476 put_unaligned_le32(req->mr->rkey, sg->key); 1477 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1478 1479 return 0; 1480 1481 mr_put: 1482 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); 1483 req->mr = NULL; 1484 if (nr < 0) 1485 return nr; 1486 return -EINVAL; 1487 } 1488 1489 static int nvme_rdma_dma_map_req(struct ib_device *ibdev, struct request *rq, 1490 int *count, int *pi_count) 1491 { 1492 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1493 int ret; 1494 1495 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); 1496 ret = sg_alloc_table_chained(&req->data_sgl.sg_table, 1497 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, 1498 NVME_INLINE_SG_CNT); 1499 if (ret) 1500 return -ENOMEM; 1501 1502 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, 1503 req->data_sgl.sg_table.sgl); 1504 1505 *count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, 1506 req->data_sgl.nents, rq_dma_dir(rq)); 1507 if (unlikely(*count <= 0)) { 1508 ret = -EIO; 1509 goto out_free_table; 1510 } 1511 1512 if (blk_integrity_rq(rq)) { 1513 req->metadata_sgl->sg_table.sgl = 1514 (struct scatterlist *)(req->metadata_sgl + 1); 1515 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, 1516 blk_rq_count_integrity_sg(rq->q, rq->bio), 1517 req->metadata_sgl->sg_table.sgl, 1518 NVME_INLINE_METADATA_SG_CNT); 1519 if (unlikely(ret)) { 1520 ret = -ENOMEM; 1521 goto out_unmap_sg; 1522 } 1523 1524 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, 1525 rq->bio, req->metadata_sgl->sg_table.sgl); 1526 *pi_count = ib_dma_map_sg(ibdev, 1527 req->metadata_sgl->sg_table.sgl, 1528 req->metadata_sgl->nents, 1529 rq_dma_dir(rq)); 1530 if (unlikely(*pi_count <= 0)) { 1531 ret = -EIO; 1532 goto out_free_pi_table; 1533 } 1534 } 1535 1536 return 0; 1537 1538 out_free_pi_table: 1539 sg_free_table_chained(&req->metadata_sgl->sg_table, 1540 NVME_INLINE_METADATA_SG_CNT); 1541 out_unmap_sg: 1542 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1543 rq_dma_dir(rq)); 1544 out_free_table: 1545 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1546 return ret; 1547 } 1548 1549 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, 1550 struct request *rq, struct nvme_command *c) 1551 { 1552 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1553 struct nvme_rdma_device *dev = queue->device; 1554 struct ib_device *ibdev = dev->dev; 1555 int pi_count = 0; 1556 int count, ret; 1557 1558 req->num_sge = 1; 1559 refcount_set(&req->ref, 2); /* send and recv completions */ 1560 1561 c->common.flags |= NVME_CMD_SGL_METABUF; 1562 1563 if (!blk_rq_nr_phys_segments(rq)) 1564 return nvme_rdma_set_sg_null(c); 1565 1566 ret = nvme_rdma_dma_map_req(ibdev, rq, &count, &pi_count); 1567 if (unlikely(ret)) 1568 return ret; 1569 1570 if (req->use_sig_mr) { 1571 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); 1572 goto out; 1573 } 1574 1575 if (count <= dev->num_inline_segments) { 1576 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && 1577 queue->ctrl->use_inline_data && 1578 blk_rq_payload_bytes(rq) <= 1579 nvme_rdma_inline_data_size(queue)) { 1580 ret = nvme_rdma_map_sg_inline(queue, req, c, count); 1581 goto out; 1582 } 1583 1584 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 1585 ret = nvme_rdma_map_sg_single(queue, req, c); 1586 goto out; 1587 } 1588 } 1589 1590 ret = nvme_rdma_map_sg_fr(queue, req, c, count); 1591 out: 1592 if (unlikely(ret)) 1593 goto out_dma_unmap_req; 1594 1595 return 0; 1596 1597 out_dma_unmap_req: 1598 nvme_rdma_dma_unmap_req(ibdev, rq); 1599 return ret; 1600 } 1601 1602 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 1603 { 1604 struct nvme_rdma_qe *qe = 1605 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1606 struct nvme_rdma_request *req = 1607 container_of(qe, struct nvme_rdma_request, sqe); 1608 1609 if (unlikely(wc->status != IB_WC_SUCCESS)) 1610 nvme_rdma_wr_error(cq, wc, "SEND"); 1611 else 1612 nvme_rdma_end_request(req); 1613 } 1614 1615 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, 1616 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, 1617 struct ib_send_wr *first) 1618 { 1619 struct ib_send_wr wr; 1620 int ret; 1621 1622 sge->addr = qe->dma; 1623 sge->length = sizeof(struct nvme_command); 1624 sge->lkey = queue->device->pd->local_dma_lkey; 1625 1626 wr.next = NULL; 1627 wr.wr_cqe = &qe->cqe; 1628 wr.sg_list = sge; 1629 wr.num_sge = num_sge; 1630 wr.opcode = IB_WR_SEND; 1631 wr.send_flags = IB_SEND_SIGNALED; 1632 1633 if (first) 1634 first->next = ≀ 1635 else 1636 first = ≀ 1637 1638 ret = ib_post_send(queue->qp, first, NULL); 1639 if (unlikely(ret)) { 1640 dev_err(queue->ctrl->ctrl.device, 1641 "%s failed with error code %d\n", __func__, ret); 1642 } 1643 return ret; 1644 } 1645 1646 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, 1647 struct nvme_rdma_qe *qe) 1648 { 1649 struct ib_recv_wr wr; 1650 struct ib_sge list; 1651 int ret; 1652 1653 list.addr = qe->dma; 1654 list.length = sizeof(struct nvme_completion); 1655 list.lkey = queue->device->pd->local_dma_lkey; 1656 1657 qe->cqe.done = nvme_rdma_recv_done; 1658 1659 wr.next = NULL; 1660 wr.wr_cqe = &qe->cqe; 1661 wr.sg_list = &list; 1662 wr.num_sge = 1; 1663 1664 ret = ib_post_recv(queue->qp, &wr, NULL); 1665 if (unlikely(ret)) { 1666 dev_err(queue->ctrl->ctrl.device, 1667 "%s failed with error code %d\n", __func__, ret); 1668 } 1669 return ret; 1670 } 1671 1672 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) 1673 { 1674 u32 queue_idx = nvme_rdma_queue_idx(queue); 1675 1676 if (queue_idx == 0) 1677 return queue->ctrl->admin_tag_set.tags[queue_idx]; 1678 return queue->ctrl->tag_set.tags[queue_idx - 1]; 1679 } 1680 1681 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) 1682 { 1683 if (unlikely(wc->status != IB_WC_SUCCESS)) 1684 nvme_rdma_wr_error(cq, wc, "ASYNC"); 1685 } 1686 1687 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) 1688 { 1689 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); 1690 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 1691 struct ib_device *dev = queue->device->dev; 1692 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; 1693 struct nvme_command *cmd = sqe->data; 1694 struct ib_sge sge; 1695 int ret; 1696 1697 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); 1698 1699 memset(cmd, 0, sizeof(*cmd)); 1700 cmd->common.opcode = nvme_admin_async_event; 1701 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; 1702 cmd->common.flags |= NVME_CMD_SGL_METABUF; 1703 nvme_rdma_set_sg_null(cmd); 1704 1705 sqe->cqe.done = nvme_rdma_async_done; 1706 1707 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), 1708 DMA_TO_DEVICE); 1709 1710 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); 1711 WARN_ON_ONCE(ret); 1712 } 1713 1714 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, 1715 struct nvme_completion *cqe, struct ib_wc *wc) 1716 { 1717 struct request *rq; 1718 struct nvme_rdma_request *req; 1719 1720 rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id); 1721 if (!rq) { 1722 dev_err(queue->ctrl->ctrl.device, 1723 "got bad command_id %#x on QP %#x\n", 1724 cqe->command_id, queue->qp->qp_num); 1725 nvme_rdma_error_recovery(queue->ctrl); 1726 return; 1727 } 1728 req = blk_mq_rq_to_pdu(rq); 1729 1730 req->status = cqe->status; 1731 req->result = cqe->result; 1732 1733 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { 1734 if (unlikely(!req->mr || 1735 wc->ex.invalidate_rkey != req->mr->rkey)) { 1736 dev_err(queue->ctrl->ctrl.device, 1737 "Bogus remote invalidation for rkey %#x\n", 1738 req->mr ? req->mr->rkey : 0); 1739 nvme_rdma_error_recovery(queue->ctrl); 1740 } 1741 } else if (req->mr) { 1742 int ret; 1743 1744 ret = nvme_rdma_inv_rkey(queue, req); 1745 if (unlikely(ret < 0)) { 1746 dev_err(queue->ctrl->ctrl.device, 1747 "Queueing INV WR for rkey %#x failed (%d)\n", 1748 req->mr->rkey, ret); 1749 nvme_rdma_error_recovery(queue->ctrl); 1750 } 1751 /* the local invalidation completion will end the request */ 1752 return; 1753 } 1754 1755 nvme_rdma_end_request(req); 1756 } 1757 1758 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1759 { 1760 struct nvme_rdma_qe *qe = 1761 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1762 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1763 struct ib_device *ibdev = queue->device->dev; 1764 struct nvme_completion *cqe = qe->data; 1765 const size_t len = sizeof(struct nvme_completion); 1766 1767 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1768 nvme_rdma_wr_error(cq, wc, "RECV"); 1769 return; 1770 } 1771 1772 /* sanity checking for received data length */ 1773 if (unlikely(wc->byte_len < len)) { 1774 dev_err(queue->ctrl->ctrl.device, 1775 "Unexpected nvme completion length(%d)\n", wc->byte_len); 1776 nvme_rdma_error_recovery(queue->ctrl); 1777 return; 1778 } 1779 1780 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1781 /* 1782 * AEN requests are special as they don't time out and can 1783 * survive any kind of queue freeze and often don't respond to 1784 * aborts. We don't even bother to allocate a struct request 1785 * for them but rather special case them here. 1786 */ 1787 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), 1788 cqe->command_id))) 1789 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, 1790 &cqe->result); 1791 else 1792 nvme_rdma_process_nvme_rsp(queue, cqe, wc); 1793 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1794 1795 nvme_rdma_post_recv(queue, qe); 1796 } 1797 1798 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) 1799 { 1800 int ret, i; 1801 1802 for (i = 0; i < queue->queue_size; i++) { 1803 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); 1804 if (ret) 1805 return ret; 1806 } 1807 1808 return 0; 1809 } 1810 1811 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, 1812 struct rdma_cm_event *ev) 1813 { 1814 struct rdma_cm_id *cm_id = queue->cm_id; 1815 int status = ev->status; 1816 const char *rej_msg; 1817 const struct nvme_rdma_cm_rej *rej_data; 1818 u8 rej_data_len; 1819 1820 rej_msg = rdma_reject_msg(cm_id, status); 1821 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); 1822 1823 if (rej_data && rej_data_len >= sizeof(u16)) { 1824 u16 sts = le16_to_cpu(rej_data->sts); 1825 1826 dev_err(queue->ctrl->ctrl.device, 1827 "Connect rejected: status %d (%s) nvme status %d (%s).\n", 1828 status, rej_msg, sts, nvme_rdma_cm_msg(sts)); 1829 } else { 1830 dev_err(queue->ctrl->ctrl.device, 1831 "Connect rejected: status %d (%s).\n", status, rej_msg); 1832 } 1833 1834 return -ECONNRESET; 1835 } 1836 1837 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) 1838 { 1839 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; 1840 int ret; 1841 1842 ret = nvme_rdma_create_queue_ib(queue); 1843 if (ret) 1844 return ret; 1845 1846 if (ctrl->opts->tos >= 0) 1847 rdma_set_service_type(queue->cm_id, ctrl->opts->tos); 1848 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CM_TIMEOUT_MS); 1849 if (ret) { 1850 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", 1851 queue->cm_error); 1852 goto out_destroy_queue; 1853 } 1854 1855 return 0; 1856 1857 out_destroy_queue: 1858 nvme_rdma_destroy_queue_ib(queue); 1859 return ret; 1860 } 1861 1862 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) 1863 { 1864 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1865 struct rdma_conn_param param = { }; 1866 struct nvme_rdma_cm_req priv = { }; 1867 int ret; 1868 1869 param.qp_num = queue->qp->qp_num; 1870 param.flow_control = 1; 1871 1872 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; 1873 /* maximum retry count */ 1874 param.retry_count = 7; 1875 param.rnr_retry_count = 7; 1876 param.private_data = &priv; 1877 param.private_data_len = sizeof(priv); 1878 1879 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1880 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); 1881 /* 1882 * set the admin queue depth to the minimum size 1883 * specified by the Fabrics standard. 1884 */ 1885 if (priv.qid == 0) { 1886 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); 1887 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); 1888 } else { 1889 /* 1890 * current interpretation of the fabrics spec 1891 * is at minimum you make hrqsize sqsize+1, or a 1892 * 1's based representation of sqsize. 1893 */ 1894 priv.hrqsize = cpu_to_le16(queue->queue_size); 1895 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); 1896 } 1897 1898 ret = rdma_connect_locked(queue->cm_id, ¶m); 1899 if (ret) { 1900 dev_err(ctrl->ctrl.device, 1901 "rdma_connect_locked failed (%d).\n", ret); 1902 return ret; 1903 } 1904 1905 return 0; 1906 } 1907 1908 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 1909 struct rdma_cm_event *ev) 1910 { 1911 struct nvme_rdma_queue *queue = cm_id->context; 1912 int cm_error = 0; 1913 1914 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", 1915 rdma_event_msg(ev->event), ev->event, 1916 ev->status, cm_id); 1917 1918 switch (ev->event) { 1919 case RDMA_CM_EVENT_ADDR_RESOLVED: 1920 cm_error = nvme_rdma_addr_resolved(queue); 1921 break; 1922 case RDMA_CM_EVENT_ROUTE_RESOLVED: 1923 cm_error = nvme_rdma_route_resolved(queue); 1924 break; 1925 case RDMA_CM_EVENT_ESTABLISHED: 1926 queue->cm_error = nvme_rdma_conn_established(queue); 1927 /* complete cm_done regardless of success/failure */ 1928 complete(&queue->cm_done); 1929 return 0; 1930 case RDMA_CM_EVENT_REJECTED: 1931 cm_error = nvme_rdma_conn_rejected(queue, ev); 1932 break; 1933 case RDMA_CM_EVENT_ROUTE_ERROR: 1934 case RDMA_CM_EVENT_CONNECT_ERROR: 1935 case RDMA_CM_EVENT_UNREACHABLE: 1936 case RDMA_CM_EVENT_ADDR_ERROR: 1937 dev_dbg(queue->ctrl->ctrl.device, 1938 "CM error event %d\n", ev->event); 1939 cm_error = -ECONNRESET; 1940 break; 1941 case RDMA_CM_EVENT_DISCONNECTED: 1942 case RDMA_CM_EVENT_ADDR_CHANGE: 1943 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1944 dev_dbg(queue->ctrl->ctrl.device, 1945 "disconnect received - connection closed\n"); 1946 nvme_rdma_error_recovery(queue->ctrl); 1947 break; 1948 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1949 /* device removal is handled via the ib_client API */ 1950 break; 1951 default: 1952 dev_err(queue->ctrl->ctrl.device, 1953 "Unexpected RDMA CM event (%d)\n", ev->event); 1954 nvme_rdma_error_recovery(queue->ctrl); 1955 break; 1956 } 1957 1958 if (cm_error) { 1959 queue->cm_error = cm_error; 1960 complete(&queue->cm_done); 1961 } 1962 1963 return 0; 1964 } 1965 1966 static void nvme_rdma_complete_timed_out(struct request *rq) 1967 { 1968 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1969 struct nvme_rdma_queue *queue = req->queue; 1970 1971 nvme_rdma_stop_queue(queue); 1972 nvmf_complete_timed_out_request(rq); 1973 } 1974 1975 static enum blk_eh_timer_return nvme_rdma_timeout(struct request *rq) 1976 { 1977 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1978 struct nvme_rdma_queue *queue = req->queue; 1979 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1980 1981 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", 1982 rq->tag, nvme_rdma_queue_idx(queue)); 1983 1984 if (ctrl->ctrl.state != NVME_CTRL_LIVE) { 1985 /* 1986 * If we are resetting, connecting or deleting we should 1987 * complete immediately because we may block controller 1988 * teardown or setup sequence 1989 * - ctrl disable/shutdown fabrics requests 1990 * - connect requests 1991 * - initialization admin requests 1992 * - I/O requests that entered after unquiescing and 1993 * the controller stopped responding 1994 * 1995 * All other requests should be cancelled by the error 1996 * recovery work, so it's fine that we fail it here. 1997 */ 1998 nvme_rdma_complete_timed_out(rq); 1999 return BLK_EH_DONE; 2000 } 2001 2002 /* 2003 * LIVE state should trigger the normal error recovery which will 2004 * handle completing this request. 2005 */ 2006 nvme_rdma_error_recovery(ctrl); 2007 return BLK_EH_RESET_TIMER; 2008 } 2009 2010 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, 2011 const struct blk_mq_queue_data *bd) 2012 { 2013 struct nvme_ns *ns = hctx->queue->queuedata; 2014 struct nvme_rdma_queue *queue = hctx->driver_data; 2015 struct request *rq = bd->rq; 2016 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2017 struct nvme_rdma_qe *sqe = &req->sqe; 2018 struct nvme_command *c = nvme_req(rq)->cmd; 2019 struct ib_device *dev; 2020 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); 2021 blk_status_t ret; 2022 int err; 2023 2024 WARN_ON_ONCE(rq->tag < 0); 2025 2026 if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) 2027 return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq); 2028 2029 dev = queue->device->dev; 2030 2031 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, 2032 sizeof(struct nvme_command), 2033 DMA_TO_DEVICE); 2034 err = ib_dma_mapping_error(dev, req->sqe.dma); 2035 if (unlikely(err)) 2036 return BLK_STS_RESOURCE; 2037 2038 ib_dma_sync_single_for_cpu(dev, sqe->dma, 2039 sizeof(struct nvme_command), DMA_TO_DEVICE); 2040 2041 ret = nvme_setup_cmd(ns, rq); 2042 if (ret) 2043 goto unmap_qe; 2044 2045 nvme_start_request(rq); 2046 2047 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 2048 queue->pi_support && 2049 (c->common.opcode == nvme_cmd_write || 2050 c->common.opcode == nvme_cmd_read) && 2051 nvme_ns_has_pi(ns)) 2052 req->use_sig_mr = true; 2053 else 2054 req->use_sig_mr = false; 2055 2056 err = nvme_rdma_map_data(queue, rq, c); 2057 if (unlikely(err < 0)) { 2058 dev_err(queue->ctrl->ctrl.device, 2059 "Failed to map data (%d)\n", err); 2060 goto err; 2061 } 2062 2063 sqe->cqe.done = nvme_rdma_send_done; 2064 2065 ib_dma_sync_single_for_device(dev, sqe->dma, 2066 sizeof(struct nvme_command), DMA_TO_DEVICE); 2067 2068 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, 2069 req->mr ? &req->reg_wr.wr : NULL); 2070 if (unlikely(err)) 2071 goto err_unmap; 2072 2073 return BLK_STS_OK; 2074 2075 err_unmap: 2076 nvme_rdma_unmap_data(queue, rq); 2077 err: 2078 if (err == -EIO) 2079 ret = nvme_host_path_error(rq); 2080 else if (err == -ENOMEM || err == -EAGAIN) 2081 ret = BLK_STS_RESOURCE; 2082 else 2083 ret = BLK_STS_IOERR; 2084 nvme_cleanup_cmd(rq); 2085 unmap_qe: 2086 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), 2087 DMA_TO_DEVICE); 2088 return ret; 2089 } 2090 2091 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob) 2092 { 2093 struct nvme_rdma_queue *queue = hctx->driver_data; 2094 2095 return ib_process_cq_direct(queue->ib_cq, -1); 2096 } 2097 2098 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) 2099 { 2100 struct request *rq = blk_mq_rq_from_pdu(req); 2101 struct ib_mr_status mr_status; 2102 int ret; 2103 2104 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 2105 if (ret) { 2106 pr_err("ib_check_mr_status failed, ret %d\n", ret); 2107 nvme_req(rq)->status = NVME_SC_INVALID_PI; 2108 return; 2109 } 2110 2111 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 2112 switch (mr_status.sig_err.err_type) { 2113 case IB_SIG_BAD_GUARD: 2114 nvme_req(rq)->status = NVME_SC_GUARD_CHECK; 2115 break; 2116 case IB_SIG_BAD_REFTAG: 2117 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; 2118 break; 2119 case IB_SIG_BAD_APPTAG: 2120 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; 2121 break; 2122 } 2123 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 2124 mr_status.sig_err.err_type, mr_status.sig_err.expected, 2125 mr_status.sig_err.actual); 2126 } 2127 } 2128 2129 static void nvme_rdma_complete_rq(struct request *rq) 2130 { 2131 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2132 struct nvme_rdma_queue *queue = req->queue; 2133 struct ib_device *ibdev = queue->device->dev; 2134 2135 if (req->use_sig_mr) 2136 nvme_rdma_check_pi_status(req); 2137 2138 nvme_rdma_unmap_data(queue, rq); 2139 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), 2140 DMA_TO_DEVICE); 2141 nvme_complete_rq(rq); 2142 } 2143 2144 static void nvme_rdma_map_queues(struct blk_mq_tag_set *set) 2145 { 2146 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data); 2147 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 2148 2149 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { 2150 /* separate read/write queues */ 2151 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2152 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2153 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2154 set->map[HCTX_TYPE_READ].nr_queues = 2155 ctrl->io_queues[HCTX_TYPE_READ]; 2156 set->map[HCTX_TYPE_READ].queue_offset = 2157 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2158 } else { 2159 /* shared read/write queues */ 2160 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2161 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2162 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2163 set->map[HCTX_TYPE_READ].nr_queues = 2164 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2165 set->map[HCTX_TYPE_READ].queue_offset = 0; 2166 } 2167 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], 2168 ctrl->device->dev, 0); 2169 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], 2170 ctrl->device->dev, 0); 2171 2172 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { 2173 /* map dedicated poll queues only if we have queues left */ 2174 set->map[HCTX_TYPE_POLL].nr_queues = 2175 ctrl->io_queues[HCTX_TYPE_POLL]; 2176 set->map[HCTX_TYPE_POLL].queue_offset = 2177 ctrl->io_queues[HCTX_TYPE_DEFAULT] + 2178 ctrl->io_queues[HCTX_TYPE_READ]; 2179 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); 2180 } 2181 2182 dev_info(ctrl->ctrl.device, 2183 "mapped %d/%d/%d default/read/poll queues.\n", 2184 ctrl->io_queues[HCTX_TYPE_DEFAULT], 2185 ctrl->io_queues[HCTX_TYPE_READ], 2186 ctrl->io_queues[HCTX_TYPE_POLL]); 2187 } 2188 2189 static const struct blk_mq_ops nvme_rdma_mq_ops = { 2190 .queue_rq = nvme_rdma_queue_rq, 2191 .complete = nvme_rdma_complete_rq, 2192 .init_request = nvme_rdma_init_request, 2193 .exit_request = nvme_rdma_exit_request, 2194 .init_hctx = nvme_rdma_init_hctx, 2195 .timeout = nvme_rdma_timeout, 2196 .map_queues = nvme_rdma_map_queues, 2197 .poll = nvme_rdma_poll, 2198 }; 2199 2200 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { 2201 .queue_rq = nvme_rdma_queue_rq, 2202 .complete = nvme_rdma_complete_rq, 2203 .init_request = nvme_rdma_init_request, 2204 .exit_request = nvme_rdma_exit_request, 2205 .init_hctx = nvme_rdma_init_admin_hctx, 2206 .timeout = nvme_rdma_timeout, 2207 }; 2208 2209 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) 2210 { 2211 nvme_rdma_teardown_io_queues(ctrl, shutdown); 2212 nvme_quiesce_admin_queue(&ctrl->ctrl); 2213 nvme_disable_ctrl(&ctrl->ctrl, shutdown); 2214 nvme_rdma_teardown_admin_queue(ctrl, shutdown); 2215 } 2216 2217 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) 2218 { 2219 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); 2220 } 2221 2222 static void nvme_rdma_reset_ctrl_work(struct work_struct *work) 2223 { 2224 struct nvme_rdma_ctrl *ctrl = 2225 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); 2226 2227 nvme_stop_ctrl(&ctrl->ctrl); 2228 nvme_rdma_shutdown_ctrl(ctrl, false); 2229 2230 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 2231 /* state change failure should never happen */ 2232 WARN_ON_ONCE(1); 2233 return; 2234 } 2235 2236 if (nvme_rdma_setup_ctrl(ctrl, false)) 2237 goto out_fail; 2238 2239 return; 2240 2241 out_fail: 2242 ++ctrl->ctrl.nr_reconnects; 2243 nvme_rdma_reconnect_or_remove(ctrl); 2244 } 2245 2246 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { 2247 .name = "rdma", 2248 .module = THIS_MODULE, 2249 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, 2250 .reg_read32 = nvmf_reg_read32, 2251 .reg_read64 = nvmf_reg_read64, 2252 .reg_write32 = nvmf_reg_write32, 2253 .free_ctrl = nvme_rdma_free_ctrl, 2254 .submit_async_event = nvme_rdma_submit_async_event, 2255 .delete_ctrl = nvme_rdma_delete_ctrl, 2256 .get_address = nvmf_get_address, 2257 .stop_ctrl = nvme_rdma_stop_ctrl, 2258 }; 2259 2260 /* 2261 * Fails a connection request if it matches an existing controller 2262 * (association) with the same tuple: 2263 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> 2264 * 2265 * if local address is not specified in the request, it will match an 2266 * existing controller with all the other parameters the same and no 2267 * local port address specified as well. 2268 * 2269 * The ports don't need to be compared as they are intrinsically 2270 * already matched by the port pointers supplied. 2271 */ 2272 static bool 2273 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) 2274 { 2275 struct nvme_rdma_ctrl *ctrl; 2276 bool found = false; 2277 2278 mutex_lock(&nvme_rdma_ctrl_mutex); 2279 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2280 found = nvmf_ip_options_match(&ctrl->ctrl, opts); 2281 if (found) 2282 break; 2283 } 2284 mutex_unlock(&nvme_rdma_ctrl_mutex); 2285 2286 return found; 2287 } 2288 2289 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, 2290 struct nvmf_ctrl_options *opts) 2291 { 2292 struct nvme_rdma_ctrl *ctrl; 2293 int ret; 2294 bool changed; 2295 2296 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 2297 if (!ctrl) 2298 return ERR_PTR(-ENOMEM); 2299 ctrl->ctrl.opts = opts; 2300 INIT_LIST_HEAD(&ctrl->list); 2301 2302 if (!(opts->mask & NVMF_OPT_TRSVCID)) { 2303 opts->trsvcid = 2304 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); 2305 if (!opts->trsvcid) { 2306 ret = -ENOMEM; 2307 goto out_free_ctrl; 2308 } 2309 opts->mask |= NVMF_OPT_TRSVCID; 2310 } 2311 2312 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2313 opts->traddr, opts->trsvcid, &ctrl->addr); 2314 if (ret) { 2315 pr_err("malformed address passed: %s:%s\n", 2316 opts->traddr, opts->trsvcid); 2317 goto out_free_ctrl; 2318 } 2319 2320 if (opts->mask & NVMF_OPT_HOST_TRADDR) { 2321 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2322 opts->host_traddr, NULL, &ctrl->src_addr); 2323 if (ret) { 2324 pr_err("malformed src address passed: %s\n", 2325 opts->host_traddr); 2326 goto out_free_ctrl; 2327 } 2328 } 2329 2330 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { 2331 ret = -EALREADY; 2332 goto out_free_ctrl; 2333 } 2334 2335 INIT_DELAYED_WORK(&ctrl->reconnect_work, 2336 nvme_rdma_reconnect_ctrl_work); 2337 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); 2338 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); 2339 2340 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + 2341 opts->nr_poll_queues + 1; 2342 ctrl->ctrl.sqsize = opts->queue_size - 1; 2343 ctrl->ctrl.kato = opts->kato; 2344 2345 ret = -ENOMEM; 2346 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), 2347 GFP_KERNEL); 2348 if (!ctrl->queues) 2349 goto out_free_ctrl; 2350 2351 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, 2352 0 /* no quirks, we're perfect! */); 2353 if (ret) 2354 goto out_kfree_queues; 2355 2356 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); 2357 WARN_ON_ONCE(!changed); 2358 2359 ret = nvme_rdma_setup_ctrl(ctrl, true); 2360 if (ret) 2361 goto out_uninit_ctrl; 2362 2363 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", 2364 nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr); 2365 2366 mutex_lock(&nvme_rdma_ctrl_mutex); 2367 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); 2368 mutex_unlock(&nvme_rdma_ctrl_mutex); 2369 2370 return &ctrl->ctrl; 2371 2372 out_uninit_ctrl: 2373 nvme_uninit_ctrl(&ctrl->ctrl); 2374 nvme_put_ctrl(&ctrl->ctrl); 2375 if (ret > 0) 2376 ret = -EIO; 2377 return ERR_PTR(ret); 2378 out_kfree_queues: 2379 kfree(ctrl->queues); 2380 out_free_ctrl: 2381 kfree(ctrl); 2382 return ERR_PTR(ret); 2383 } 2384 2385 static struct nvmf_transport_ops nvme_rdma_transport = { 2386 .name = "rdma", 2387 .module = THIS_MODULE, 2388 .required_opts = NVMF_OPT_TRADDR, 2389 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | 2390 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | 2391 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | 2392 NVMF_OPT_TOS, 2393 .create_ctrl = nvme_rdma_create_ctrl, 2394 }; 2395 2396 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) 2397 { 2398 struct nvme_rdma_ctrl *ctrl; 2399 struct nvme_rdma_device *ndev; 2400 bool found = false; 2401 2402 mutex_lock(&device_list_mutex); 2403 list_for_each_entry(ndev, &device_list, entry) { 2404 if (ndev->dev == ib_device) { 2405 found = true; 2406 break; 2407 } 2408 } 2409 mutex_unlock(&device_list_mutex); 2410 2411 if (!found) 2412 return; 2413 2414 /* Delete all controllers using this device */ 2415 mutex_lock(&nvme_rdma_ctrl_mutex); 2416 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2417 if (ctrl->device->dev != ib_device) 2418 continue; 2419 nvme_delete_ctrl(&ctrl->ctrl); 2420 } 2421 mutex_unlock(&nvme_rdma_ctrl_mutex); 2422 2423 flush_workqueue(nvme_delete_wq); 2424 } 2425 2426 static struct ib_client nvme_rdma_ib_client = { 2427 .name = "nvme_rdma", 2428 .remove = nvme_rdma_remove_one 2429 }; 2430 2431 static int __init nvme_rdma_init_module(void) 2432 { 2433 int ret; 2434 2435 ret = ib_register_client(&nvme_rdma_ib_client); 2436 if (ret) 2437 return ret; 2438 2439 ret = nvmf_register_transport(&nvme_rdma_transport); 2440 if (ret) 2441 goto err_unreg_client; 2442 2443 return 0; 2444 2445 err_unreg_client: 2446 ib_unregister_client(&nvme_rdma_ib_client); 2447 return ret; 2448 } 2449 2450 static void __exit nvme_rdma_cleanup_module(void) 2451 { 2452 struct nvme_rdma_ctrl *ctrl; 2453 2454 nvmf_unregister_transport(&nvme_rdma_transport); 2455 ib_unregister_client(&nvme_rdma_ib_client); 2456 2457 mutex_lock(&nvme_rdma_ctrl_mutex); 2458 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2459 nvme_delete_ctrl(&ctrl->ctrl); 2460 mutex_unlock(&nvme_rdma_ctrl_mutex); 2461 flush_workqueue(nvme_delete_wq); 2462 } 2463 2464 module_init(nvme_rdma_init_module); 2465 module_exit(nvme_rdma_cleanup_module); 2466 2467 MODULE_LICENSE("GPL v2"); 2468