15d8762d5SChristoph Hellwig // SPDX-License-Identifier: GPL-2.0
271102307SChristoph Hellwig /*
371102307SChristoph Hellwig * NVMe over Fabrics RDMA host code.
471102307SChristoph Hellwig * Copyright (c) 2015-2016 HGST, a Western Digital Company.
571102307SChristoph Hellwig */
671102307SChristoph Hellwig #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
771102307SChristoph Hellwig #include <linux/module.h>
871102307SChristoph Hellwig #include <linux/init.h>
971102307SChristoph Hellwig #include <linux/slab.h>
10f41725bbSIsrael Rukshin #include <rdma/mr_pool.h>
1171102307SChristoph Hellwig #include <linux/err.h>
1271102307SChristoph Hellwig #include <linux/string.h>
1371102307SChristoph Hellwig #include <linux/atomic.h>
1471102307SChristoph Hellwig #include <linux/blk-mq.h>
15fe45e630SChristoph Hellwig #include <linux/blk-integrity.h>
1671102307SChristoph Hellwig #include <linux/types.h>
1771102307SChristoph Hellwig #include <linux/list.h>
1871102307SChristoph Hellwig #include <linux/mutex.h>
1971102307SChristoph Hellwig #include <linux/scatterlist.h>
2071102307SChristoph Hellwig #include <linux/nvme.h>
2171102307SChristoph Hellwig #include <asm/unaligned.h>
2271102307SChristoph Hellwig
2371102307SChristoph Hellwig #include <rdma/ib_verbs.h>
2471102307SChristoph Hellwig #include <rdma/rdma_cm.h>
2571102307SChristoph Hellwig #include <linux/nvme-rdma.h>
2671102307SChristoph Hellwig
2771102307SChristoph Hellwig #include "nvme.h"
2871102307SChristoph Hellwig #include "fabrics.h"
2971102307SChristoph Hellwig
3071102307SChristoph Hellwig
310525af71SIsrael Rukshin #define NVME_RDMA_CM_TIMEOUT_MS 3000 /* 3 second */
3271102307SChristoph Hellwig
3371102307SChristoph Hellwig #define NVME_RDMA_MAX_SEGMENTS 256
3471102307SChristoph Hellwig
3564a741c1SSteve Wise #define NVME_RDMA_MAX_INLINE_SEGMENTS 4
3671102307SChristoph Hellwig
375ec5d3bdSMax Gurtovoy #define NVME_RDMA_DATA_SGL_SIZE \
385ec5d3bdSMax Gurtovoy (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
395ec5d3bdSMax Gurtovoy #define NVME_RDMA_METADATA_SGL_SIZE \
405ec5d3bdSMax Gurtovoy (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
415ec5d3bdSMax Gurtovoy
4271102307SChristoph Hellwig struct nvme_rdma_device {
4371102307SChristoph Hellwig struct ib_device *dev;
4471102307SChristoph Hellwig struct ib_pd *pd;
4571102307SChristoph Hellwig struct kref ref;
4671102307SChristoph Hellwig struct list_head entry;
4764a741c1SSteve Wise unsigned int num_inline_segments;
4871102307SChristoph Hellwig };
4971102307SChristoph Hellwig
5071102307SChristoph Hellwig struct nvme_rdma_qe {
5171102307SChristoph Hellwig struct ib_cqe cqe;
5271102307SChristoph Hellwig void *data;
5371102307SChristoph Hellwig u64 dma;
5471102307SChristoph Hellwig };
5571102307SChristoph Hellwig
56324d9e78SIsrael Rukshin struct nvme_rdma_sgl {
57324d9e78SIsrael Rukshin int nents;
58324d9e78SIsrael Rukshin struct sg_table sg_table;
59324d9e78SIsrael Rukshin };
60324d9e78SIsrael Rukshin
6171102307SChristoph Hellwig struct nvme_rdma_queue;
6271102307SChristoph Hellwig struct nvme_rdma_request {
63d49187e9SChristoph Hellwig struct nvme_request req;
6471102307SChristoph Hellwig struct ib_mr *mr;
6571102307SChristoph Hellwig struct nvme_rdma_qe sqe;
664af7f7ffSSagi Grimberg union nvme_result result;
674af7f7ffSSagi Grimberg __le16 status;
684af7f7ffSSagi Grimberg refcount_t ref;
6971102307SChristoph Hellwig struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
7071102307SChristoph Hellwig u32 num_sge;
7171102307SChristoph Hellwig struct ib_reg_wr reg_wr;
7271102307SChristoph Hellwig struct ib_cqe reg_cqe;
7371102307SChristoph Hellwig struct nvme_rdma_queue *queue;
74324d9e78SIsrael Rukshin struct nvme_rdma_sgl data_sgl;
755ec5d3bdSMax Gurtovoy struct nvme_rdma_sgl *metadata_sgl;
765ec5d3bdSMax Gurtovoy bool use_sig_mr;
7771102307SChristoph Hellwig };
7871102307SChristoph Hellwig
7971102307SChristoph Hellwig enum nvme_rdma_queue_flags {
805013e98bSSagi Grimberg NVME_RDMA_Q_ALLOCATED = 0,
815013e98bSSagi Grimberg NVME_RDMA_Q_LIVE = 1,
82eb1bd249SMax Gurtovoy NVME_RDMA_Q_TR_READY = 2,
8371102307SChristoph Hellwig };
8471102307SChristoph Hellwig
8571102307SChristoph Hellwig struct nvme_rdma_queue {
8671102307SChristoph Hellwig struct nvme_rdma_qe *rsp_ring;
8771102307SChristoph Hellwig int queue_size;
8871102307SChristoph Hellwig size_t cmnd_capsule_len;
8971102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl;
9071102307SChristoph Hellwig struct nvme_rdma_device *device;
9171102307SChristoph Hellwig struct ib_cq *ib_cq;
9271102307SChristoph Hellwig struct ib_qp *qp;
9371102307SChristoph Hellwig
9471102307SChristoph Hellwig unsigned long flags;
9571102307SChristoph Hellwig struct rdma_cm_id *cm_id;
9671102307SChristoph Hellwig int cm_error;
9771102307SChristoph Hellwig struct completion cm_done;
985ec5d3bdSMax Gurtovoy bool pi_support;
99287f329eSYamin Friedman int cq_size;
1007674073bSChao Leng struct mutex queue_lock;
10171102307SChristoph Hellwig };
10271102307SChristoph Hellwig
10371102307SChristoph Hellwig struct nvme_rdma_ctrl {
10471102307SChristoph Hellwig /* read only in the hot path */
10571102307SChristoph Hellwig struct nvme_rdma_queue *queues;
10671102307SChristoph Hellwig
10771102307SChristoph Hellwig /* other member variables */
10871102307SChristoph Hellwig struct blk_mq_tag_set tag_set;
10971102307SChristoph Hellwig struct work_struct err_work;
11071102307SChristoph Hellwig
11171102307SChristoph Hellwig struct nvme_rdma_qe async_event_sqe;
11271102307SChristoph Hellwig
11371102307SChristoph Hellwig struct delayed_work reconnect_work;
11471102307SChristoph Hellwig
11571102307SChristoph Hellwig struct list_head list;
11671102307SChristoph Hellwig
11771102307SChristoph Hellwig struct blk_mq_tag_set admin_tag_set;
11871102307SChristoph Hellwig struct nvme_rdma_device *device;
11971102307SChristoph Hellwig
12071102307SChristoph Hellwig u32 max_fr_pages;
12171102307SChristoph Hellwig
1220928f9b4SSagi Grimberg struct sockaddr_storage addr;
1230928f9b4SSagi Grimberg struct sockaddr_storage src_addr;
12471102307SChristoph Hellwig
12571102307SChristoph Hellwig struct nvme_ctrl ctrl;
12664a741c1SSteve Wise bool use_inline_data;
127b1064d3eSSagi Grimberg u32 io_queues[HCTX_MAX_TYPES];
12871102307SChristoph Hellwig };
12971102307SChristoph Hellwig
to_rdma_ctrl(struct nvme_ctrl * ctrl)13071102307SChristoph Hellwig static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
13171102307SChristoph Hellwig {
13271102307SChristoph Hellwig return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
13371102307SChristoph Hellwig }
13471102307SChristoph Hellwig
13571102307SChristoph Hellwig static LIST_HEAD(device_list);
13671102307SChristoph Hellwig static DEFINE_MUTEX(device_list_mutex);
13771102307SChristoph Hellwig
13871102307SChristoph Hellwig static LIST_HEAD(nvme_rdma_ctrl_list);
13971102307SChristoph Hellwig static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
14071102307SChristoph Hellwig
14171102307SChristoph Hellwig /*
14271102307SChristoph Hellwig * Disabling this option makes small I/O goes faster, but is fundamentally
14371102307SChristoph Hellwig * unsafe. With it turned off we will have to register a global rkey that
14471102307SChristoph Hellwig * allows read and write access to all physical memory.
14571102307SChristoph Hellwig */
14671102307SChristoph Hellwig static bool register_always = true;
14771102307SChristoph Hellwig module_param(register_always, bool, 0444);
14871102307SChristoph Hellwig MODULE_PARM_DESC(register_always,
14971102307SChristoph Hellwig "Use memory registration even for contiguous memory regions");
15071102307SChristoph Hellwig
15171102307SChristoph Hellwig static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
15271102307SChristoph Hellwig struct rdma_cm_event *event);
15371102307SChristoph Hellwig static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
154ff029451SChristoph Hellwig static void nvme_rdma_complete_rq(struct request *rq);
15571102307SChristoph Hellwig
15690af3512SSagi Grimberg static const struct blk_mq_ops nvme_rdma_mq_ops;
15790af3512SSagi Grimberg static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
15890af3512SSagi Grimberg
nvme_rdma_queue_idx(struct nvme_rdma_queue * queue)15971102307SChristoph Hellwig static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
16071102307SChristoph Hellwig {
16171102307SChristoph Hellwig return queue - queue->ctrl->queues;
16271102307SChristoph Hellwig }
16371102307SChristoph Hellwig
nvme_rdma_poll_queue(struct nvme_rdma_queue * queue)164ff8519f9SSagi Grimberg static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
165ff8519f9SSagi Grimberg {
166ff8519f9SSagi Grimberg return nvme_rdma_queue_idx(queue) >
167b1064d3eSSagi Grimberg queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
168b1064d3eSSagi Grimberg queue->ctrl->io_queues[HCTX_TYPE_READ];
169ff8519f9SSagi Grimberg }
170ff8519f9SSagi Grimberg
nvme_rdma_inline_data_size(struct nvme_rdma_queue * queue)17171102307SChristoph Hellwig static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
17271102307SChristoph Hellwig {
17371102307SChristoph Hellwig return queue->cmnd_capsule_len - sizeof(struct nvme_command);
17471102307SChristoph Hellwig }
17571102307SChristoph Hellwig
nvme_rdma_free_qe(struct ib_device * ibdev,struct nvme_rdma_qe * qe,size_t capsule_size,enum dma_data_direction dir)17671102307SChristoph Hellwig static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
17771102307SChristoph Hellwig size_t capsule_size, enum dma_data_direction dir)
17871102307SChristoph Hellwig {
17971102307SChristoph Hellwig ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
18071102307SChristoph Hellwig kfree(qe->data);
18171102307SChristoph Hellwig }
18271102307SChristoph Hellwig
nvme_rdma_alloc_qe(struct ib_device * ibdev,struct nvme_rdma_qe * qe,size_t capsule_size,enum dma_data_direction dir)18371102307SChristoph Hellwig static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
18471102307SChristoph Hellwig size_t capsule_size, enum dma_data_direction dir)
18571102307SChristoph Hellwig {
18671102307SChristoph Hellwig qe->data = kzalloc(capsule_size, GFP_KERNEL);
18771102307SChristoph Hellwig if (!qe->data)
18871102307SChristoph Hellwig return -ENOMEM;
18971102307SChristoph Hellwig
19071102307SChristoph Hellwig qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
19171102307SChristoph Hellwig if (ib_dma_mapping_error(ibdev, qe->dma)) {
19271102307SChristoph Hellwig kfree(qe->data);
1936344d02dSPrabhath Sajeepa qe->data = NULL;
19471102307SChristoph Hellwig return -ENOMEM;
19571102307SChristoph Hellwig }
19671102307SChristoph Hellwig
19771102307SChristoph Hellwig return 0;
19871102307SChristoph Hellwig }
19971102307SChristoph Hellwig
nvme_rdma_free_ring(struct ib_device * ibdev,struct nvme_rdma_qe * ring,size_t ib_queue_size,size_t capsule_size,enum dma_data_direction dir)20071102307SChristoph Hellwig static void nvme_rdma_free_ring(struct ib_device *ibdev,
20171102307SChristoph Hellwig struct nvme_rdma_qe *ring, size_t ib_queue_size,
20271102307SChristoph Hellwig size_t capsule_size, enum dma_data_direction dir)
20371102307SChristoph Hellwig {
20471102307SChristoph Hellwig int i;
20571102307SChristoph Hellwig
20671102307SChristoph Hellwig for (i = 0; i < ib_queue_size; i++)
20771102307SChristoph Hellwig nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
20871102307SChristoph Hellwig kfree(ring);
20971102307SChristoph Hellwig }
21071102307SChristoph Hellwig
nvme_rdma_alloc_ring(struct ib_device * ibdev,size_t ib_queue_size,size_t capsule_size,enum dma_data_direction dir)21171102307SChristoph Hellwig static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
21271102307SChristoph Hellwig size_t ib_queue_size, size_t capsule_size,
21371102307SChristoph Hellwig enum dma_data_direction dir)
21471102307SChristoph Hellwig {
21571102307SChristoph Hellwig struct nvme_rdma_qe *ring;
21671102307SChristoph Hellwig int i;
21771102307SChristoph Hellwig
21871102307SChristoph Hellwig ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
21971102307SChristoph Hellwig if (!ring)
22071102307SChristoph Hellwig return NULL;
22171102307SChristoph Hellwig
22262f99b62SMax Gurtovoy /*
22362f99b62SMax Gurtovoy * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
22462f99b62SMax Gurtovoy * lifetime. It's safe, since any chage in the underlying RDMA device
22562f99b62SMax Gurtovoy * will issue error recovery and queue re-creation.
22662f99b62SMax Gurtovoy */
22771102307SChristoph Hellwig for (i = 0; i < ib_queue_size; i++) {
22871102307SChristoph Hellwig if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
22971102307SChristoph Hellwig goto out_free_ring;
23071102307SChristoph Hellwig }
23171102307SChristoph Hellwig
23271102307SChristoph Hellwig return ring;
23371102307SChristoph Hellwig
23471102307SChristoph Hellwig out_free_ring:
23571102307SChristoph Hellwig nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
23671102307SChristoph Hellwig return NULL;
23771102307SChristoph Hellwig }
23871102307SChristoph Hellwig
nvme_rdma_qp_event(struct ib_event * event,void * context)23971102307SChristoph Hellwig static void nvme_rdma_qp_event(struct ib_event *event, void *context)
24071102307SChristoph Hellwig {
24127a4beefSMax Gurtovoy pr_debug("QP event %s (%d)\n",
24227a4beefSMax Gurtovoy ib_event_msg(event->event), event->event);
24327a4beefSMax Gurtovoy
24471102307SChristoph Hellwig }
24571102307SChristoph Hellwig
nvme_rdma_wait_for_cm(struct nvme_rdma_queue * queue)24671102307SChristoph Hellwig static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
24771102307SChristoph Hellwig {
24835da77d5SBart Van Assche int ret;
24935da77d5SBart Van Assche
2500525af71SIsrael Rukshin ret = wait_for_completion_interruptible(&queue->cm_done);
2510525af71SIsrael Rukshin if (ret)
25235da77d5SBart Van Assche return ret;
25335da77d5SBart Van Assche WARN_ON_ONCE(queue->cm_error > 0);
25471102307SChristoph Hellwig return queue->cm_error;
25571102307SChristoph Hellwig }
25671102307SChristoph Hellwig
nvme_rdma_create_qp(struct nvme_rdma_queue * queue,const int factor)25771102307SChristoph Hellwig static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
25871102307SChristoph Hellwig {
25971102307SChristoph Hellwig struct nvme_rdma_device *dev = queue->device;
26071102307SChristoph Hellwig struct ib_qp_init_attr init_attr;
26171102307SChristoph Hellwig int ret;
26271102307SChristoph Hellwig
26371102307SChristoph Hellwig memset(&init_attr, 0, sizeof(init_attr));
26471102307SChristoph Hellwig init_attr.event_handler = nvme_rdma_qp_event;
26571102307SChristoph Hellwig /* +1 for drain */
26671102307SChristoph Hellwig init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
26771102307SChristoph Hellwig /* +1 for drain */
26871102307SChristoph Hellwig init_attr.cap.max_recv_wr = queue->queue_size + 1;
26971102307SChristoph Hellwig init_attr.cap.max_recv_sge = 1;
27064a741c1SSteve Wise init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
27171102307SChristoph Hellwig init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
27271102307SChristoph Hellwig init_attr.qp_type = IB_QPT_RC;
27371102307SChristoph Hellwig init_attr.send_cq = queue->ib_cq;
27471102307SChristoph Hellwig init_attr.recv_cq = queue->ib_cq;
2755ec5d3bdSMax Gurtovoy if (queue->pi_support)
2765ec5d3bdSMax Gurtovoy init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
277287f329eSYamin Friedman init_attr.qp_context = queue;
27871102307SChristoph Hellwig
27971102307SChristoph Hellwig ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
28071102307SChristoph Hellwig
28171102307SChristoph Hellwig queue->qp = queue->cm_id->qp;
28271102307SChristoph Hellwig return ret;
28371102307SChristoph Hellwig }
28471102307SChristoph Hellwig
nvme_rdma_exit_request(struct blk_mq_tag_set * set,struct request * rq,unsigned int hctx_idx)285385475eeSChristoph Hellwig static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
286385475eeSChristoph Hellwig struct request *rq, unsigned int hctx_idx)
28771102307SChristoph Hellwig {
28871102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
28971102307SChristoph Hellwig
29062f99b62SMax Gurtovoy kfree(req->sqe.data);
29171102307SChristoph Hellwig }
29271102307SChristoph Hellwig
nvme_rdma_init_request(struct blk_mq_tag_set * set,struct request * rq,unsigned int hctx_idx,unsigned int numa_node)293385475eeSChristoph Hellwig static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
294385475eeSChristoph Hellwig struct request *rq, unsigned int hctx_idx,
295385475eeSChristoph Hellwig unsigned int numa_node)
29671102307SChristoph Hellwig {
2972d60738cSChristoph Hellwig struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data);
29871102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
299385475eeSChristoph Hellwig int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
30071102307SChristoph Hellwig struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
30171102307SChristoph Hellwig
30259e29ce6SSagi Grimberg nvme_req(rq)->ctrl = &ctrl->ctrl;
30362f99b62SMax Gurtovoy req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
30462f99b62SMax Gurtovoy if (!req->sqe.data)
30562f99b62SMax Gurtovoy return -ENOMEM;
30671102307SChristoph Hellwig
3075ec5d3bdSMax Gurtovoy /* metadata nvme_rdma_sgl struct is located after command's data SGL */
3085ec5d3bdSMax Gurtovoy if (queue->pi_support)
3095ec5d3bdSMax Gurtovoy req->metadata_sgl = (void *)nvme_req(rq) +
3105ec5d3bdSMax Gurtovoy sizeof(struct nvme_rdma_request) +
3115ec5d3bdSMax Gurtovoy NVME_RDMA_DATA_SGL_SIZE;
3125ec5d3bdSMax Gurtovoy
31371102307SChristoph Hellwig req->queue = queue;
314f4b9e6c9SKeith Busch nvme_req(rq)->cmd = req->sqe.data;
31571102307SChristoph Hellwig
31671102307SChristoph Hellwig return 0;
31771102307SChristoph Hellwig }
31871102307SChristoph Hellwig
nvme_rdma_init_hctx(struct blk_mq_hw_ctx * hctx,void * data,unsigned int hctx_idx)31971102307SChristoph Hellwig static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
32071102307SChristoph Hellwig unsigned int hctx_idx)
32171102307SChristoph Hellwig {
3222d60738cSChristoph Hellwig struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data);
32371102307SChristoph Hellwig struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
32471102307SChristoph Hellwig
325d858e5f0SSagi Grimberg BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
32671102307SChristoph Hellwig
32771102307SChristoph Hellwig hctx->driver_data = queue;
32871102307SChristoph Hellwig return 0;
32971102307SChristoph Hellwig }
33071102307SChristoph Hellwig
nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx * hctx,void * data,unsigned int hctx_idx)33171102307SChristoph Hellwig static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
33271102307SChristoph Hellwig unsigned int hctx_idx)
33371102307SChristoph Hellwig {
3342d60738cSChristoph Hellwig struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data);
33571102307SChristoph Hellwig struct nvme_rdma_queue *queue = &ctrl->queues[0];
33671102307SChristoph Hellwig
33771102307SChristoph Hellwig BUG_ON(hctx_idx != 0);
33871102307SChristoph Hellwig
33971102307SChristoph Hellwig hctx->driver_data = queue;
34071102307SChristoph Hellwig return 0;
34171102307SChristoph Hellwig }
34271102307SChristoph Hellwig
nvme_rdma_free_dev(struct kref * ref)34371102307SChristoph Hellwig static void nvme_rdma_free_dev(struct kref *ref)
34471102307SChristoph Hellwig {
34571102307SChristoph Hellwig struct nvme_rdma_device *ndev =
34671102307SChristoph Hellwig container_of(ref, struct nvme_rdma_device, ref);
34771102307SChristoph Hellwig
34871102307SChristoph Hellwig mutex_lock(&device_list_mutex);
34971102307SChristoph Hellwig list_del(&ndev->entry);
35071102307SChristoph Hellwig mutex_unlock(&device_list_mutex);
35171102307SChristoph Hellwig
35271102307SChristoph Hellwig ib_dealloc_pd(ndev->pd);
35371102307SChristoph Hellwig kfree(ndev);
35471102307SChristoph Hellwig }
35571102307SChristoph Hellwig
nvme_rdma_dev_put(struct nvme_rdma_device * dev)35671102307SChristoph Hellwig static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
35771102307SChristoph Hellwig {
35871102307SChristoph Hellwig kref_put(&dev->ref, nvme_rdma_free_dev);
35971102307SChristoph Hellwig }
36071102307SChristoph Hellwig
nvme_rdma_dev_get(struct nvme_rdma_device * dev)36171102307SChristoph Hellwig static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
36271102307SChristoph Hellwig {
36371102307SChristoph Hellwig return kref_get_unless_zero(&dev->ref);
36471102307SChristoph Hellwig }
36571102307SChristoph Hellwig
36671102307SChristoph Hellwig static struct nvme_rdma_device *
nvme_rdma_find_get_device(struct rdma_cm_id * cm_id)36771102307SChristoph Hellwig nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
36871102307SChristoph Hellwig {
36971102307SChristoph Hellwig struct nvme_rdma_device *ndev;
37071102307SChristoph Hellwig
37171102307SChristoph Hellwig mutex_lock(&device_list_mutex);
37271102307SChristoph Hellwig list_for_each_entry(ndev, &device_list, entry) {
37371102307SChristoph Hellwig if (ndev->dev->node_guid == cm_id->device->node_guid &&
37471102307SChristoph Hellwig nvme_rdma_dev_get(ndev))
37571102307SChristoph Hellwig goto out_unlock;
37671102307SChristoph Hellwig }
37771102307SChristoph Hellwig
37871102307SChristoph Hellwig ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
37971102307SChristoph Hellwig if (!ndev)
38071102307SChristoph Hellwig goto out_err;
38171102307SChristoph Hellwig
38271102307SChristoph Hellwig ndev->dev = cm_id->device;
38371102307SChristoph Hellwig kref_init(&ndev->ref);
38471102307SChristoph Hellwig
38511975e01SChristoph Hellwig ndev->pd = ib_alloc_pd(ndev->dev,
38611975e01SChristoph Hellwig register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
38771102307SChristoph Hellwig if (IS_ERR(ndev->pd))
38871102307SChristoph Hellwig goto out_free_dev;
38971102307SChristoph Hellwig
39071102307SChristoph Hellwig if (!(ndev->dev->attrs.device_cap_flags &
39171102307SChristoph Hellwig IB_DEVICE_MEM_MGT_EXTENSIONS)) {
39271102307SChristoph Hellwig dev_err(&ndev->dev->dev,
39371102307SChristoph Hellwig "Memory registrations not supported.\n");
39411975e01SChristoph Hellwig goto out_free_pd;
39571102307SChristoph Hellwig }
39671102307SChristoph Hellwig
39764a741c1SSteve Wise ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
3980a3173a5SJason Gunthorpe ndev->dev->attrs.max_send_sge - 1);
39971102307SChristoph Hellwig list_add(&ndev->entry, &device_list);
40071102307SChristoph Hellwig out_unlock:
40171102307SChristoph Hellwig mutex_unlock(&device_list_mutex);
40271102307SChristoph Hellwig return ndev;
40371102307SChristoph Hellwig
40471102307SChristoph Hellwig out_free_pd:
40571102307SChristoph Hellwig ib_dealloc_pd(ndev->pd);
40671102307SChristoph Hellwig out_free_dev:
40771102307SChristoph Hellwig kfree(ndev);
40871102307SChristoph Hellwig out_err:
40971102307SChristoph Hellwig mutex_unlock(&device_list_mutex);
41071102307SChristoph Hellwig return NULL;
41171102307SChristoph Hellwig }
41271102307SChristoph Hellwig
nvme_rdma_free_cq(struct nvme_rdma_queue * queue)413287f329eSYamin Friedman static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
414287f329eSYamin Friedman {
415287f329eSYamin Friedman if (nvme_rdma_poll_queue(queue))
416287f329eSYamin Friedman ib_free_cq(queue->ib_cq);
417287f329eSYamin Friedman else
418287f329eSYamin Friedman ib_cq_pool_put(queue->ib_cq, queue->cq_size);
419287f329eSYamin Friedman }
420287f329eSYamin Friedman
nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue * queue)42171102307SChristoph Hellwig static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
42271102307SChristoph Hellwig {
423eb1bd249SMax Gurtovoy struct nvme_rdma_device *dev;
424eb1bd249SMax Gurtovoy struct ib_device *ibdev;
425eb1bd249SMax Gurtovoy
426eb1bd249SMax Gurtovoy if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
427eb1bd249SMax Gurtovoy return;
428eb1bd249SMax Gurtovoy
429eb1bd249SMax Gurtovoy dev = queue->device;
430eb1bd249SMax Gurtovoy ibdev = dev->dev;
43171102307SChristoph Hellwig
4325ec5d3bdSMax Gurtovoy if (queue->pi_support)
4335ec5d3bdSMax Gurtovoy ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
434f41725bbSIsrael Rukshin ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
435f41725bbSIsrael Rukshin
436eb1bd249SMax Gurtovoy /*
437eb1bd249SMax Gurtovoy * The cm_id object might have been destroyed during RDMA connection
438eb1bd249SMax Gurtovoy * establishment error flow to avoid getting other cma events, thus
439eb1bd249SMax Gurtovoy * the destruction of the QP shouldn't use rdma_cm API.
440eb1bd249SMax Gurtovoy */
441eb1bd249SMax Gurtovoy ib_destroy_qp(queue->qp);
442287f329eSYamin Friedman nvme_rdma_free_cq(queue);
44371102307SChristoph Hellwig
44471102307SChristoph Hellwig nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
44571102307SChristoph Hellwig sizeof(struct nvme_completion), DMA_FROM_DEVICE);
44671102307SChristoph Hellwig
44771102307SChristoph Hellwig nvme_rdma_dev_put(dev);
44871102307SChristoph Hellwig }
44971102307SChristoph Hellwig
nvme_rdma_get_max_fr_pages(struct ib_device * ibdev,bool pi_support)4505ec5d3bdSMax Gurtovoy static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
451f41725bbSIsrael Rukshin {
4525ec5d3bdSMax Gurtovoy u32 max_page_list_len;
4535ec5d3bdSMax Gurtovoy
4545ec5d3bdSMax Gurtovoy if (pi_support)
4555ec5d3bdSMax Gurtovoy max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
4565ec5d3bdSMax Gurtovoy else
4575ec5d3bdSMax Gurtovoy max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
4585ec5d3bdSMax Gurtovoy
4595ec5d3bdSMax Gurtovoy return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
460f41725bbSIsrael Rukshin }
461f41725bbSIsrael Rukshin
nvme_rdma_create_cq(struct ib_device * ibdev,struct nvme_rdma_queue * queue)462287f329eSYamin Friedman static int nvme_rdma_create_cq(struct ib_device *ibdev,
463287f329eSYamin Friedman struct nvme_rdma_queue *queue)
464287f329eSYamin Friedman {
465287f329eSYamin Friedman int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
466287f329eSYamin Friedman
467287f329eSYamin Friedman /*
468287f329eSYamin Friedman * Spread I/O queues completion vectors according their queue index.
469287f329eSYamin Friedman * Admin queues can always go on completion vector 0.
470287f329eSYamin Friedman */
471287f329eSYamin Friedman comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
472287f329eSYamin Friedman
473287f329eSYamin Friedman /* Polling queues need direct cq polling context */
474015ad2b1Szhenwei pi if (nvme_rdma_poll_queue(queue))
475287f329eSYamin Friedman queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
476015ad2b1Szhenwei pi comp_vector, IB_POLL_DIRECT);
477015ad2b1Szhenwei pi else
478287f329eSYamin Friedman queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
479015ad2b1Szhenwei pi comp_vector, IB_POLL_SOFTIRQ);
480287f329eSYamin Friedman
481287f329eSYamin Friedman if (IS_ERR(queue->ib_cq)) {
482287f329eSYamin Friedman ret = PTR_ERR(queue->ib_cq);
483287f329eSYamin Friedman return ret;
484287f329eSYamin Friedman }
485287f329eSYamin Friedman
486287f329eSYamin Friedman return 0;
487287f329eSYamin Friedman }
488287f329eSYamin Friedman
nvme_rdma_create_queue_ib(struct nvme_rdma_queue * queue)489ca6e95bbSSagi Grimberg static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
49071102307SChristoph Hellwig {
491ca6e95bbSSagi Grimberg struct ib_device *ibdev;
49271102307SChristoph Hellwig const int send_wr_factor = 3; /* MR, SEND, INV */
49371102307SChristoph Hellwig const int cq_factor = send_wr_factor + 1; /* + RECV */
494ff13c1b8SMax Gurtovoy int ret, pages_per_mr;
49571102307SChristoph Hellwig
496ca6e95bbSSagi Grimberg queue->device = nvme_rdma_find_get_device(queue->cm_id);
497ca6e95bbSSagi Grimberg if (!queue->device) {
498ca6e95bbSSagi Grimberg dev_err(queue->cm_id->device->dev.parent,
499ca6e95bbSSagi Grimberg "no client data found!\n");
500ca6e95bbSSagi Grimberg return -ECONNREFUSED;
501ca6e95bbSSagi Grimberg }
502ca6e95bbSSagi Grimberg ibdev = queue->device->dev;
50371102307SChristoph Hellwig
504f3f28373SMax Gurtovoy /* +1 for ib_drain_qp */
505287f329eSYamin Friedman queue->cq_size = cq_factor * queue->queue_size + 1;
506287f329eSYamin Friedman
507287f329eSYamin Friedman ret = nvme_rdma_create_cq(ibdev, queue);
508287f329eSYamin Friedman if (ret)
509ca6e95bbSSagi Grimberg goto out_put_dev;
51071102307SChristoph Hellwig
51171102307SChristoph Hellwig ret = nvme_rdma_create_qp(queue, send_wr_factor);
51271102307SChristoph Hellwig if (ret)
51371102307SChristoph Hellwig goto out_destroy_ib_cq;
51471102307SChristoph Hellwig
51571102307SChristoph Hellwig queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
51671102307SChristoph Hellwig sizeof(struct nvme_completion), DMA_FROM_DEVICE);
51771102307SChristoph Hellwig if (!queue->rsp_ring) {
51871102307SChristoph Hellwig ret = -ENOMEM;
51971102307SChristoph Hellwig goto out_destroy_qp;
52071102307SChristoph Hellwig }
52171102307SChristoph Hellwig
522ff13c1b8SMax Gurtovoy /*
523ff13c1b8SMax Gurtovoy * Currently we don't use SG_GAPS MR's so if the first entry is
524ff13c1b8SMax Gurtovoy * misaligned we'll end up using two entries for a single data page,
525ff13c1b8SMax Gurtovoy * so one additional entry is required.
526ff13c1b8SMax Gurtovoy */
5275ec5d3bdSMax Gurtovoy pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
528f41725bbSIsrael Rukshin ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
529f41725bbSIsrael Rukshin queue->queue_size,
530f41725bbSIsrael Rukshin IB_MR_TYPE_MEM_REG,
531ff13c1b8SMax Gurtovoy pages_per_mr, 0);
532f41725bbSIsrael Rukshin if (ret) {
533f41725bbSIsrael Rukshin dev_err(queue->ctrl->ctrl.device,
534f41725bbSIsrael Rukshin "failed to initialize MR pool sized %d for QID %d\n",
535287f329eSYamin Friedman queue->queue_size, nvme_rdma_queue_idx(queue));
536f41725bbSIsrael Rukshin goto out_destroy_ring;
537f41725bbSIsrael Rukshin }
538f41725bbSIsrael Rukshin
5395ec5d3bdSMax Gurtovoy if (queue->pi_support) {
5405ec5d3bdSMax Gurtovoy ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
5415ec5d3bdSMax Gurtovoy queue->queue_size, IB_MR_TYPE_INTEGRITY,
5425ec5d3bdSMax Gurtovoy pages_per_mr, pages_per_mr);
5435ec5d3bdSMax Gurtovoy if (ret) {
5445ec5d3bdSMax Gurtovoy dev_err(queue->ctrl->ctrl.device,
5455ec5d3bdSMax Gurtovoy "failed to initialize PI MR pool sized %d for QID %d\n",
546287f329eSYamin Friedman queue->queue_size, nvme_rdma_queue_idx(queue));
5475ec5d3bdSMax Gurtovoy goto out_destroy_mr_pool;
5485ec5d3bdSMax Gurtovoy }
5495ec5d3bdSMax Gurtovoy }
5505ec5d3bdSMax Gurtovoy
551eb1bd249SMax Gurtovoy set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
552eb1bd249SMax Gurtovoy
55371102307SChristoph Hellwig return 0;
55471102307SChristoph Hellwig
5555ec5d3bdSMax Gurtovoy out_destroy_mr_pool:
5565ec5d3bdSMax Gurtovoy ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
557f41725bbSIsrael Rukshin out_destroy_ring:
558f41725bbSIsrael Rukshin nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
559f41725bbSIsrael Rukshin sizeof(struct nvme_completion), DMA_FROM_DEVICE);
56071102307SChristoph Hellwig out_destroy_qp:
5611f61def9SMax Gurtovoy rdma_destroy_qp(queue->cm_id);
56271102307SChristoph Hellwig out_destroy_ib_cq:
563287f329eSYamin Friedman nvme_rdma_free_cq(queue);
564ca6e95bbSSagi Grimberg out_put_dev:
565ca6e95bbSSagi Grimberg nvme_rdma_dev_put(queue->device);
56671102307SChristoph Hellwig return ret;
56771102307SChristoph Hellwig }
56871102307SChristoph Hellwig
nvme_rdma_alloc_queue(struct nvme_rdma_ctrl * ctrl,int idx,size_t queue_size)56941e8cfa1SSagi Grimberg static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
57071102307SChristoph Hellwig int idx, size_t queue_size)
57171102307SChristoph Hellwig {
57271102307SChristoph Hellwig struct nvme_rdma_queue *queue;
5738f4e8dacSMax Gurtovoy struct sockaddr *src_addr = NULL;
57471102307SChristoph Hellwig int ret;
57571102307SChristoph Hellwig
57671102307SChristoph Hellwig queue = &ctrl->queues[idx];
5777674073bSChao Leng mutex_init(&queue->queue_lock);
57871102307SChristoph Hellwig queue->ctrl = ctrl;
5795ec5d3bdSMax Gurtovoy if (idx && ctrl->ctrl.max_integrity_segments)
5805ec5d3bdSMax Gurtovoy queue->pi_support = true;
5815ec5d3bdSMax Gurtovoy else
5825ec5d3bdSMax Gurtovoy queue->pi_support = false;
58371102307SChristoph Hellwig init_completion(&queue->cm_done);
58471102307SChristoph Hellwig
58571102307SChristoph Hellwig if (idx > 0)
58671102307SChristoph Hellwig queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
58771102307SChristoph Hellwig else
58871102307SChristoph Hellwig queue->cmnd_capsule_len = sizeof(struct nvme_command);
58971102307SChristoph Hellwig
59071102307SChristoph Hellwig queue->queue_size = queue_size;
59171102307SChristoph Hellwig
59271102307SChristoph Hellwig queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
59371102307SChristoph Hellwig RDMA_PS_TCP, IB_QPT_RC);
59471102307SChristoph Hellwig if (IS_ERR(queue->cm_id)) {
59571102307SChristoph Hellwig dev_info(ctrl->ctrl.device,
59671102307SChristoph Hellwig "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
5977674073bSChao Leng ret = PTR_ERR(queue->cm_id);
5987674073bSChao Leng goto out_destroy_mutex;
59971102307SChristoph Hellwig }
60071102307SChristoph Hellwig
6018f4e8dacSMax Gurtovoy if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
6020928f9b4SSagi Grimberg src_addr = (struct sockaddr *)&ctrl->src_addr;
6038f4e8dacSMax Gurtovoy
6040928f9b4SSagi Grimberg queue->cm_error = -ETIMEDOUT;
6050928f9b4SSagi Grimberg ret = rdma_resolve_addr(queue->cm_id, src_addr,
6060928f9b4SSagi Grimberg (struct sockaddr *)&ctrl->addr,
6070525af71SIsrael Rukshin NVME_RDMA_CM_TIMEOUT_MS);
60871102307SChristoph Hellwig if (ret) {
60971102307SChristoph Hellwig dev_info(ctrl->ctrl.device,
61071102307SChristoph Hellwig "rdma_resolve_addr failed (%d).\n", ret);
61171102307SChristoph Hellwig goto out_destroy_cm_id;
61271102307SChristoph Hellwig }
61371102307SChristoph Hellwig
61471102307SChristoph Hellwig ret = nvme_rdma_wait_for_cm(queue);
61571102307SChristoph Hellwig if (ret) {
61671102307SChristoph Hellwig dev_info(ctrl->ctrl.device,
617d8bfceebSSagi Grimberg "rdma connection establishment failed (%d)\n", ret);
61871102307SChristoph Hellwig goto out_destroy_cm_id;
61971102307SChristoph Hellwig }
62071102307SChristoph Hellwig
6215013e98bSSagi Grimberg set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
62271102307SChristoph Hellwig
62371102307SChristoph Hellwig return 0;
62471102307SChristoph Hellwig
62571102307SChristoph Hellwig out_destroy_cm_id:
62671102307SChristoph Hellwig rdma_destroy_id(queue->cm_id);
627eb1bd249SMax Gurtovoy nvme_rdma_destroy_queue_ib(queue);
6287674073bSChao Leng out_destroy_mutex:
6297674073bSChao Leng mutex_destroy(&queue->queue_lock);
63071102307SChristoph Hellwig return ret;
63171102307SChristoph Hellwig }
63271102307SChristoph Hellwig
__nvme_rdma_stop_queue(struct nvme_rdma_queue * queue)633d94211b8SSagi Grimberg static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
634d94211b8SSagi Grimberg {
635d94211b8SSagi Grimberg rdma_disconnect(queue->cm_id);
636d94211b8SSagi Grimberg ib_drain_qp(queue->qp);
637d94211b8SSagi Grimberg }
638d94211b8SSagi Grimberg
nvme_rdma_stop_queue(struct nvme_rdma_queue * queue)63971102307SChristoph Hellwig static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
64071102307SChristoph Hellwig {
6413820c4fdSMaurizio Lombardi if (!test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
6423820c4fdSMaurizio Lombardi return;
6433820c4fdSMaurizio Lombardi
6447674073bSChao Leng mutex_lock(&queue->queue_lock);
6457674073bSChao Leng if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
646d94211b8SSagi Grimberg __nvme_rdma_stop_queue(queue);
6477674073bSChao Leng mutex_unlock(&queue->queue_lock);
64871102307SChristoph Hellwig }
64971102307SChristoph Hellwig
nvme_rdma_free_queue(struct nvme_rdma_queue * queue)65071102307SChristoph Hellwig static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
65171102307SChristoph Hellwig {
6525013e98bSSagi Grimberg if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
65371102307SChristoph Hellwig return;
654a57bd541SSagi Grimberg
655a57bd541SSagi Grimberg rdma_destroy_id(queue->cm_id);
6569817d763SRuozhu Li nvme_rdma_destroy_queue_ib(queue);
6577674073bSChao Leng mutex_destroy(&queue->queue_lock);
65871102307SChristoph Hellwig }
65971102307SChristoph Hellwig
nvme_rdma_free_io_queues(struct nvme_rdma_ctrl * ctrl)66071102307SChristoph Hellwig static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
66171102307SChristoph Hellwig {
66271102307SChristoph Hellwig int i;
66371102307SChristoph Hellwig
664d858e5f0SSagi Grimberg for (i = 1; i < ctrl->ctrl.queue_count; i++)
665a57bd541SSagi Grimberg nvme_rdma_free_queue(&ctrl->queues[i]);
66671102307SChristoph Hellwig }
66771102307SChristoph Hellwig
nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl * ctrl)668a57bd541SSagi Grimberg static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
669a57bd541SSagi Grimberg {
670a57bd541SSagi Grimberg int i;
671a57bd541SSagi Grimberg
672a57bd541SSagi Grimberg for (i = 1; i < ctrl->ctrl.queue_count; i++)
673a57bd541SSagi Grimberg nvme_rdma_stop_queue(&ctrl->queues[i]);
67471102307SChristoph Hellwig }
67571102307SChristoph Hellwig
nvme_rdma_start_queue(struct nvme_rdma_ctrl * ctrl,int idx)67668e16fcfSSagi Grimberg static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
67768e16fcfSSagi Grimberg {
678ff8519f9SSagi Grimberg struct nvme_rdma_queue *queue = &ctrl->queues[idx];
67968e16fcfSSagi Grimberg int ret;
68068e16fcfSSagi Grimberg
68168e16fcfSSagi Grimberg if (idx)
682be42a33bSKeith Busch ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
68368e16fcfSSagi Grimberg else
68468e16fcfSSagi Grimberg ret = nvmf_connect_admin_queue(&ctrl->ctrl);
68568e16fcfSSagi Grimberg
686d94211b8SSagi Grimberg if (!ret) {
687ff8519f9SSagi Grimberg set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
688d94211b8SSagi Grimberg } else {
68967b483ddSSagi Grimberg if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
690d94211b8SSagi Grimberg __nvme_rdma_stop_queue(queue);
69168e16fcfSSagi Grimberg dev_info(ctrl->ctrl.device,
69268e16fcfSSagi Grimberg "failed to connect queue: %d ret=%d\n", idx, ret);
693d94211b8SSagi Grimberg }
69468e16fcfSSagi Grimberg return ret;
69568e16fcfSSagi Grimberg }
69668e16fcfSSagi Grimberg
nvme_rdma_start_io_queues(struct nvme_rdma_ctrl * ctrl,int first,int last)6971c467e25SDaniel Wagner static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl,
6981c467e25SDaniel Wagner int first, int last)
69971102307SChristoph Hellwig {
70071102307SChristoph Hellwig int i, ret = 0;
70171102307SChristoph Hellwig
7021c467e25SDaniel Wagner for (i = first; i < last; i++) {
70368e16fcfSSagi Grimberg ret = nvme_rdma_start_queue(ctrl, i);
70468e16fcfSSagi Grimberg if (ret)
705a57bd541SSagi Grimberg goto out_stop_queues;
70671102307SChristoph Hellwig }
70771102307SChristoph Hellwig
708c8dbc37cSSteve Wise return 0;
709c8dbc37cSSteve Wise
710a57bd541SSagi Grimberg out_stop_queues:
7111c467e25SDaniel Wagner for (i--; i >= first; i--)
71268e16fcfSSagi Grimberg nvme_rdma_stop_queue(&ctrl->queues[i]);
71371102307SChristoph Hellwig return ret;
71471102307SChristoph Hellwig }
71571102307SChristoph Hellwig
nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl * ctrl)71641e8cfa1SSagi Grimberg static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
71771102307SChristoph Hellwig {
718c248c643SSagi Grimberg struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
719a249d306SKeith Busch unsigned int nr_io_queues;
72071102307SChristoph Hellwig int i, ret;
72171102307SChristoph Hellwig
722a249d306SKeith Busch nr_io_queues = nvmf_nr_io_queues(opts);
723c248c643SSagi Grimberg ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
724c248c643SSagi Grimberg if (ret)
725c248c643SSagi Grimberg return ret;
726c248c643SSagi Grimberg
72785032874SRuozhu Li if (nr_io_queues == 0) {
728c4c6df5fSSagi Grimberg dev_err(ctrl->ctrl.device,
729c4c6df5fSSagi Grimberg "unable to set any I/O queues\n");
730c4c6df5fSSagi Grimberg return -ENOMEM;
731c4c6df5fSSagi Grimberg }
732c248c643SSagi Grimberg
73385032874SRuozhu Li ctrl->ctrl.queue_count = nr_io_queues + 1;
734c248c643SSagi Grimberg dev_info(ctrl->ctrl.device,
735c248c643SSagi Grimberg "creating %d I/O queues.\n", nr_io_queues);
736c248c643SSagi Grimberg
737a249d306SKeith Busch nvmf_set_io_queues(opts, nr_io_queues, ctrl->io_queues);
738d858e5f0SSagi Grimberg for (i = 1; i < ctrl->ctrl.queue_count; i++) {
73941e8cfa1SSagi Grimberg ret = nvme_rdma_alloc_queue(ctrl, i,
74041e8cfa1SSagi Grimberg ctrl->ctrl.sqsize + 1);
74141e8cfa1SSagi Grimberg if (ret)
74271102307SChristoph Hellwig goto out_free_queues;
74371102307SChristoph Hellwig }
74471102307SChristoph Hellwig
74571102307SChristoph Hellwig return 0;
74671102307SChristoph Hellwig
74771102307SChristoph Hellwig out_free_queues:
748f361e5a0SSteve Wise for (i--; i >= 1; i--)
749a57bd541SSagi Grimberg nvme_rdma_free_queue(&ctrl->queues[i]);
75071102307SChristoph Hellwig
75171102307SChristoph Hellwig return ret;
75271102307SChristoph Hellwig }
75371102307SChristoph Hellwig
nvme_rdma_alloc_tag_set(struct nvme_ctrl * ctrl)754cefa1032SChristoph Hellwig static int nvme_rdma_alloc_tag_set(struct nvme_ctrl *ctrl)
755b28a308eSSagi Grimberg {
756cefa1032SChristoph Hellwig unsigned int cmd_size = sizeof(struct nvme_rdma_request) +
7575ec5d3bdSMax Gurtovoy NVME_RDMA_DATA_SGL_SIZE;
758a7f7b711SChristoph Hellwig
759cefa1032SChristoph Hellwig if (ctrl->max_integrity_segments)
760cefa1032SChristoph Hellwig cmd_size += sizeof(struct nvme_rdma_sgl) +
7615ec5d3bdSMax Gurtovoy NVME_RDMA_METADATA_SGL_SIZE;
762cefa1032SChristoph Hellwig
763cefa1032SChristoph Hellwig return nvme_alloc_io_tag_set(ctrl, &to_rdma_ctrl(ctrl)->tag_set,
764db45e1a5SChristoph Hellwig &nvme_rdma_mq_ops,
765dcef7727SChristoph Hellwig ctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2,
766dcef7727SChristoph Hellwig cmd_size);
767b28a308eSSagi Grimberg }
768b28a308eSSagi Grimberg
nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl * ctrl)769cefa1032SChristoph Hellwig static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl)
77071102307SChristoph Hellwig {
771682630f0SSagi Grimberg if (ctrl->async_event_sqe.data) {
772925dd04cSDavid Milburn cancel_work_sync(&ctrl->ctrl.async_event_work);
77394e42213SSagi Grimberg nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
77494e42213SSagi Grimberg sizeof(struct nvme_command), DMA_TO_DEVICE);
775682630f0SSagi Grimberg ctrl->async_event_sqe.data = NULL;
776682630f0SSagi Grimberg }
777a57bd541SSagi Grimberg nvme_rdma_free_queue(&ctrl->queues[0]);
7783f02fffbSSagi Grimberg }
77971102307SChristoph Hellwig
nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl * ctrl,bool new)7803f02fffbSSagi Grimberg static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
7813f02fffbSSagi Grimberg bool new)
78290af3512SSagi Grimberg {
7835ec5d3bdSMax Gurtovoy bool pi_capable = false;
78490af3512SSagi Grimberg int error;
78590af3512SSagi Grimberg
78641e8cfa1SSagi Grimberg error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
78790af3512SSagi Grimberg if (error)
78890af3512SSagi Grimberg return error;
78990af3512SSagi Grimberg
79090af3512SSagi Grimberg ctrl->device = ctrl->queues[0].device;
79122dd4c70SChristoph Hellwig ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
79290af3512SSagi Grimberg
7935ec5d3bdSMax Gurtovoy /* T10-PI support */
794e945c653SJason Gunthorpe if (ctrl->device->dev->attrs.kernel_cap_flags &
795e945c653SJason Gunthorpe IBK_INTEGRITY_HANDOVER)
7965ec5d3bdSMax Gurtovoy pi_capable = true;
7975ec5d3bdSMax Gurtovoy
7985ec5d3bdSMax Gurtovoy ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
7995ec5d3bdSMax Gurtovoy pi_capable);
80090af3512SSagi Grimberg
80162f99b62SMax Gurtovoy /*
80262f99b62SMax Gurtovoy * Bind the async event SQE DMA mapping to the admin queue lifetime.
80362f99b62SMax Gurtovoy * It's safe, since any chage in the underlying RDMA device will issue
80462f99b62SMax Gurtovoy * error recovery and queue re-creation.
80562f99b62SMax Gurtovoy */
80694e42213SSagi Grimberg error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
80794e42213SSagi Grimberg sizeof(struct nvme_command), DMA_TO_DEVICE);
80894e42213SSagi Grimberg if (error)
80994e42213SSagi Grimberg goto out_free_queue;
81094e42213SSagi Grimberg
8113f02fffbSSagi Grimberg if (new) {
812cefa1032SChristoph Hellwig error = nvme_alloc_admin_tag_set(&ctrl->ctrl,
813cefa1032SChristoph Hellwig &ctrl->admin_tag_set, &nvme_rdma_admin_mq_ops,
814cefa1032SChristoph Hellwig sizeof(struct nvme_rdma_request) +
815cefa1032SChristoph Hellwig NVME_RDMA_DATA_SGL_SIZE);
816a7f7b711SChristoph Hellwig if (error)
81794e42213SSagi Grimberg goto out_free_async_qe;
81890af3512SSagi Grimberg
8193f02fffbSSagi Grimberg }
82090af3512SSagi Grimberg
82168e16fcfSSagi Grimberg error = nvme_rdma_start_queue(ctrl, 0);
82290af3512SSagi Grimberg if (error)
823cefa1032SChristoph Hellwig goto out_remove_admin_tag_set;
82490af3512SSagi Grimberg
825c0f2f45bSSagi Grimberg error = nvme_enable_ctrl(&ctrl->ctrl);
82690af3512SSagi Grimberg if (error)
8272e050f00SJianchao Wang goto out_stop_queue;
82890af3512SSagi Grimberg
829ff13c1b8SMax Gurtovoy ctrl->ctrl.max_segments = ctrl->max_fr_pages;
830ff13c1b8SMax Gurtovoy ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
8315ec5d3bdSMax Gurtovoy if (pi_capable)
8325ec5d3bdSMax Gurtovoy ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
8335ec5d3bdSMax Gurtovoy else
8345ec5d3bdSMax Gurtovoy ctrl->ctrl.max_integrity_segments = 0;
83590af3512SSagi Grimberg
8369f27bd70SChristoph Hellwig nvme_unquiesce_admin_queue(&ctrl->ctrl);
837e7832cb4SSagi Grimberg
83894cc781fSChristoph Hellwig error = nvme_init_ctrl_finish(&ctrl->ctrl, false);
83990af3512SSagi Grimberg if (error)
840958dc1d3SChao Leng goto out_quiesce_queue;
84190af3512SSagi Grimberg
84290af3512SSagi Grimberg return 0;
84390af3512SSagi Grimberg
844958dc1d3SChao Leng out_quiesce_queue:
8459f27bd70SChristoph Hellwig nvme_quiesce_admin_queue(&ctrl->ctrl);
846958dc1d3SChao Leng blk_sync_queue(ctrl->ctrl.admin_q);
8472e050f00SJianchao Wang out_stop_queue:
8482e050f00SJianchao Wang nvme_rdma_stop_queue(&ctrl->queues[0]);
849958dc1d3SChao Leng nvme_cancel_admin_tagset(&ctrl->ctrl);
850cefa1032SChristoph Hellwig out_remove_admin_tag_set:
8513f02fffbSSagi Grimberg if (new)
852cefa1032SChristoph Hellwig nvme_remove_admin_tag_set(&ctrl->ctrl);
85394e42213SSagi Grimberg out_free_async_qe:
8549134ae2aSPrabhath Sajeepa if (ctrl->async_event_sqe.data) {
85594e42213SSagi Grimberg nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
85694e42213SSagi Grimberg sizeof(struct nvme_command), DMA_TO_DEVICE);
8576344d02dSPrabhath Sajeepa ctrl->async_event_sqe.data = NULL;
8589134ae2aSPrabhath Sajeepa }
85990af3512SSagi Grimberg out_free_queue:
86090af3512SSagi Grimberg nvme_rdma_free_queue(&ctrl->queues[0]);
86190af3512SSagi Grimberg return error;
86290af3512SSagi Grimberg }
86390af3512SSagi Grimberg
nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl * ctrl,bool new)864a57bd541SSagi Grimberg static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
865a57bd541SSagi Grimberg {
8661c467e25SDaniel Wagner int ret, nr_queues;
867a57bd541SSagi Grimberg
86841e8cfa1SSagi Grimberg ret = nvme_rdma_alloc_io_queues(ctrl);
869a57bd541SSagi Grimberg if (ret)
870a57bd541SSagi Grimberg return ret;
871a57bd541SSagi Grimberg
872a57bd541SSagi Grimberg if (new) {
873a7f7b711SChristoph Hellwig ret = nvme_rdma_alloc_tag_set(&ctrl->ctrl);
874a7f7b711SChristoph Hellwig if (ret)
875a57bd541SSagi Grimberg goto out_free_io_queues;
876a57bd541SSagi Grimberg }
877a57bd541SSagi Grimberg
8781c467e25SDaniel Wagner /*
8791c467e25SDaniel Wagner * Only start IO queues for which we have allocated the tagset
8801c467e25SDaniel Wagner * and limitted it to the available queues. On reconnects, the
8811c467e25SDaniel Wagner * queue number might have changed.
8821c467e25SDaniel Wagner */
8831c467e25SDaniel Wagner nr_queues = min(ctrl->tag_set.nr_hw_queues + 1, ctrl->ctrl.queue_count);
8841c467e25SDaniel Wagner ret = nvme_rdma_start_io_queues(ctrl, 1, nr_queues);
885a57bd541SSagi Grimberg if (ret)
886cefa1032SChristoph Hellwig goto out_cleanup_tagset;
887a57bd541SSagi Grimberg
8889f98772bSSagi Grimberg if (!new) {
88929b434d1SMing Lei nvme_start_freeze(&ctrl->ctrl);
8909f27bd70SChristoph Hellwig nvme_unquiesce_io_queues(&ctrl->ctrl);
8912362acb6SSagi Grimberg if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
8922362acb6SSagi Grimberg /*
8932362acb6SSagi Grimberg * If we timed out waiting for freeze we are likely to
8942362acb6SSagi Grimberg * be stuck. Fail the controller initialization just
8952362acb6SSagi Grimberg * to be safe.
8962362acb6SSagi Grimberg */
8972362acb6SSagi Grimberg ret = -ENODEV;
89829b434d1SMing Lei nvme_unfreeze(&ctrl->ctrl);
8992362acb6SSagi Grimberg goto out_wait_freeze_timed_out;
9002362acb6SSagi Grimberg }
9019f98772bSSagi Grimberg blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
9029f98772bSSagi Grimberg ctrl->ctrl.queue_count - 1);
9039f98772bSSagi Grimberg nvme_unfreeze(&ctrl->ctrl);
9049f98772bSSagi Grimberg }
9059f98772bSSagi Grimberg
9061c467e25SDaniel Wagner /*
9071c467e25SDaniel Wagner * If the number of queues has increased (reconnect case)
9081c467e25SDaniel Wagner * start all new queues now.
9091c467e25SDaniel Wagner */
9101c467e25SDaniel Wagner ret = nvme_rdma_start_io_queues(ctrl, nr_queues,
9111c467e25SDaniel Wagner ctrl->tag_set.nr_hw_queues + 1);
9121c467e25SDaniel Wagner if (ret)
9131c467e25SDaniel Wagner goto out_wait_freeze_timed_out;
9141c467e25SDaniel Wagner
915a57bd541SSagi Grimberg return 0;
916a57bd541SSagi Grimberg
9172362acb6SSagi Grimberg out_wait_freeze_timed_out:
9189f27bd70SChristoph Hellwig nvme_quiesce_io_queues(&ctrl->ctrl);
919958dc1d3SChao Leng nvme_sync_io_queues(&ctrl->ctrl);
9202362acb6SSagi Grimberg nvme_rdma_stop_io_queues(ctrl);
921cefa1032SChristoph Hellwig out_cleanup_tagset:
922958dc1d3SChao Leng nvme_cancel_tagset(&ctrl->ctrl);
923a57bd541SSagi Grimberg if (new)
924cefa1032SChristoph Hellwig nvme_remove_io_tag_set(&ctrl->ctrl);
925a57bd541SSagi Grimberg out_free_io_queues:
926a57bd541SSagi Grimberg nvme_rdma_free_io_queues(ctrl);
927a57bd541SSagi Grimberg return ret;
92871102307SChristoph Hellwig }
92971102307SChristoph Hellwig
nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl * ctrl,bool remove)93075862c72SSagi Grimberg static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
93175862c72SSagi Grimberg bool remove)
93275862c72SSagi Grimberg {
9339f27bd70SChristoph Hellwig nvme_quiesce_admin_queue(&ctrl->ctrl);
9343017013dSChao Leng blk_sync_queue(ctrl->ctrl.admin_q);
93575862c72SSagi Grimberg nvme_rdma_stop_queue(&ctrl->queues[0]);
936c4189d68SChao Leng nvme_cancel_admin_tagset(&ctrl->ctrl);
937cefa1032SChristoph Hellwig if (remove) {
9389f27bd70SChristoph Hellwig nvme_unquiesce_admin_queue(&ctrl->ctrl);
939cefa1032SChristoph Hellwig nvme_remove_admin_tag_set(&ctrl->ctrl);
940cefa1032SChristoph Hellwig }
941cefa1032SChristoph Hellwig nvme_rdma_destroy_admin_queue(ctrl);
94275862c72SSagi Grimberg }
94375862c72SSagi Grimberg
nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl * ctrl,bool remove)94475862c72SSagi Grimberg static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
94575862c72SSagi Grimberg bool remove)
94675862c72SSagi Grimberg {
94775862c72SSagi Grimberg if (ctrl->ctrl.queue_count > 1) {
9489f27bd70SChristoph Hellwig nvme_quiesce_io_queues(&ctrl->ctrl);
9493017013dSChao Leng nvme_sync_io_queues(&ctrl->ctrl);
95075862c72SSagi Grimberg nvme_rdma_stop_io_queues(ctrl);
951c4189d68SChao Leng nvme_cancel_tagset(&ctrl->ctrl);
952cefa1032SChristoph Hellwig if (remove) {
9539f27bd70SChristoph Hellwig nvme_unquiesce_io_queues(&ctrl->ctrl);
954cefa1032SChristoph Hellwig nvme_remove_io_tag_set(&ctrl->ctrl);
955cefa1032SChristoph Hellwig }
956cefa1032SChristoph Hellwig nvme_rdma_free_io_queues(ctrl);
95775862c72SSagi Grimberg }
95875862c72SSagi Grimberg }
95975862c72SSagi Grimberg
nvme_rdma_stop_ctrl(struct nvme_ctrl * nctrl)960f7f70f4aSRuozhu Li static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
961f7f70f4aSRuozhu Li {
962f7f70f4aSRuozhu Li struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
963f7f70f4aSRuozhu Li
964a1ae8d4dSSagi Grimberg flush_work(&ctrl->err_work);
965f7f70f4aSRuozhu Li cancel_delayed_work_sync(&ctrl->reconnect_work);
966f7f70f4aSRuozhu Li }
967f7f70f4aSRuozhu Li
nvme_rdma_free_ctrl(struct nvme_ctrl * nctrl)96871102307SChristoph Hellwig static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
96971102307SChristoph Hellwig {
97071102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
97171102307SChristoph Hellwig
97271102307SChristoph Hellwig if (list_empty(&ctrl->list))
97371102307SChristoph Hellwig goto free_ctrl;
97471102307SChristoph Hellwig
97571102307SChristoph Hellwig mutex_lock(&nvme_rdma_ctrl_mutex);
97671102307SChristoph Hellwig list_del(&ctrl->list);
97771102307SChristoph Hellwig mutex_unlock(&nvme_rdma_ctrl_mutex);
97871102307SChristoph Hellwig
97971102307SChristoph Hellwig nvmf_free_options(nctrl->opts);
98071102307SChristoph Hellwig free_ctrl:
9813d064101SSagi Grimberg kfree(ctrl->queues);
98271102307SChristoph Hellwig kfree(ctrl);
98371102307SChristoph Hellwig }
98471102307SChristoph Hellwig
nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl * ctrl)985fd8563ceSSagi Grimberg static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
986fd8563ceSSagi Grimberg {
987*8884a56dSKeith Busch enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
988*8884a56dSKeith Busch
989fd8563ceSSagi Grimberg /* If we are resetting/deleting then do nothing */
990*8884a56dSKeith Busch if (state != NVME_CTRL_CONNECTING) {
991*8884a56dSKeith Busch WARN_ON_ONCE(state == NVME_CTRL_NEW || state == NVME_CTRL_LIVE);
992fd8563ceSSagi Grimberg return;
993fd8563ceSSagi Grimberg }
994fd8563ceSSagi Grimberg
995fd8563ceSSagi Grimberg if (nvmf_should_reconnect(&ctrl->ctrl)) {
996fd8563ceSSagi Grimberg dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
997fd8563ceSSagi Grimberg ctrl->ctrl.opts->reconnect_delay);
9989a6327d2SSagi Grimberg queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
999fd8563ceSSagi Grimberg ctrl->ctrl.opts->reconnect_delay * HZ);
1000fd8563ceSSagi Grimberg } else {
100112fa1304SSagi Grimberg nvme_delete_ctrl(&ctrl->ctrl);
1002fd8563ceSSagi Grimberg }
1003fd8563ceSSagi Grimberg }
1004fd8563ceSSagi Grimberg
nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl * ctrl,bool new)1005c66e2998SSagi Grimberg static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
100671102307SChristoph Hellwig {
100713ce7e62SColin Ian King int ret;
100871102307SChristoph Hellwig bool changed;
100971102307SChristoph Hellwig
1010c66e2998SSagi Grimberg ret = nvme_rdma_configure_admin_queue(ctrl, new);
101171102307SChristoph Hellwig if (ret)
1012c66e2998SSagi Grimberg return ret;
1013c66e2998SSagi Grimberg
1014c66e2998SSagi Grimberg if (ctrl->ctrl.icdoff) {
101509748122SMax Gurtovoy ret = -EOPNOTSUPP;
1016c66e2998SSagi Grimberg dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1017c66e2998SSagi Grimberg goto destroy_admin;
1018c66e2998SSagi Grimberg }
1019c66e2998SSagi Grimberg
1020c66e2998SSagi Grimberg if (!(ctrl->ctrl.sgls & (1 << 2))) {
102109748122SMax Gurtovoy ret = -EOPNOTSUPP;
1022c66e2998SSagi Grimberg dev_err(ctrl->ctrl.device,
1023c66e2998SSagi Grimberg "Mandatory keyed sgls are not supported!\n");
1024c66e2998SSagi Grimberg goto destroy_admin;
1025c66e2998SSagi Grimberg }
1026c66e2998SSagi Grimberg
1027c66e2998SSagi Grimberg if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1028c66e2998SSagi Grimberg dev_warn(ctrl->ctrl.device,
1029c66e2998SSagi Grimberg "queue_size %zu > ctrl sqsize %u, clamping down\n",
1030c66e2998SSagi Grimberg ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1031c66e2998SSagi Grimberg }
1032c66e2998SSagi Grimberg
103344c3c625SMax Gurtovoy if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) {
103444c3c625SMax Gurtovoy dev_warn(ctrl->ctrl.device,
103544c3c625SMax Gurtovoy "ctrl sqsize %u > max queue size %u, clamping down\n",
103644c3c625SMax Gurtovoy ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE);
103744c3c625SMax Gurtovoy ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1;
103844c3c625SMax Gurtovoy }
103944c3c625SMax Gurtovoy
1040c66e2998SSagi Grimberg if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1041c66e2998SSagi Grimberg dev_warn(ctrl->ctrl.device,
1042c66e2998SSagi Grimberg "sqsize %u > ctrl maxcmd %u, clamping down\n",
1043c66e2998SSagi Grimberg ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1044c66e2998SSagi Grimberg ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1045c66e2998SSagi Grimberg }
104671102307SChristoph Hellwig
104764a741c1SSteve Wise if (ctrl->ctrl.sgls & (1 << 20))
104864a741c1SSteve Wise ctrl->use_inline_data = true;
104971102307SChristoph Hellwig
1050d858e5f0SSagi Grimberg if (ctrl->ctrl.queue_count > 1) {
1051c66e2998SSagi Grimberg ret = nvme_rdma_configure_io_queues(ctrl, new);
105271102307SChristoph Hellwig if (ret)
10535e1fe61dSSagi Grimberg goto destroy_admin;
105471102307SChristoph Hellwig }
105571102307SChristoph Hellwig
105671102307SChristoph Hellwig changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
10570a960afdSSagi Grimberg if (!changed) {
105896135862SIsrael Rukshin /*
1059ecca390eSSagi Grimberg * state change failure is ok if we started ctrl delete,
106096135862SIsrael Rukshin * unless we're during creation of a new controller to
106196135862SIsrael Rukshin * avoid races with teardown flow.
106296135862SIsrael Rukshin */
1063*8884a56dSKeith Busch enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1064*8884a56dSKeith Busch
1065*8884a56dSKeith Busch WARN_ON_ONCE(state != NVME_CTRL_DELETING &&
1066*8884a56dSKeith Busch state != NVME_CTRL_DELETING_NOIO);
106796135862SIsrael Rukshin WARN_ON_ONCE(new);
1068c66e2998SSagi Grimberg ret = -EINVAL;
1069c66e2998SSagi Grimberg goto destroy_io;
10700a960afdSSagi Grimberg }
10710a960afdSSagi Grimberg
1072d09f2b45SSagi Grimberg nvme_start_ctrl(&ctrl->ctrl);
1073c66e2998SSagi Grimberg return 0;
1074c66e2998SSagi Grimberg
1075c66e2998SSagi Grimberg destroy_io:
1076958dc1d3SChao Leng if (ctrl->ctrl.queue_count > 1) {
10779f27bd70SChristoph Hellwig nvme_quiesce_io_queues(&ctrl->ctrl);
1078958dc1d3SChao Leng nvme_sync_io_queues(&ctrl->ctrl);
1079958dc1d3SChao Leng nvme_rdma_stop_io_queues(ctrl);
1080958dc1d3SChao Leng nvme_cancel_tagset(&ctrl->ctrl);
1081cefa1032SChristoph Hellwig if (new)
1082cefa1032SChristoph Hellwig nvme_remove_io_tag_set(&ctrl->ctrl);
1083cefa1032SChristoph Hellwig nvme_rdma_free_io_queues(ctrl);
1084958dc1d3SChao Leng }
1085c66e2998SSagi Grimberg destroy_admin:
10869f27bd70SChristoph Hellwig nvme_quiesce_admin_queue(&ctrl->ctrl);
1087958dc1d3SChao Leng blk_sync_queue(ctrl->ctrl.admin_q);
1088c66e2998SSagi Grimberg nvme_rdma_stop_queue(&ctrl->queues[0]);
1089958dc1d3SChao Leng nvme_cancel_admin_tagset(&ctrl->ctrl);
1090cefa1032SChristoph Hellwig if (new)
1091cefa1032SChristoph Hellwig nvme_remove_admin_tag_set(&ctrl->ctrl);
1092cefa1032SChristoph Hellwig nvme_rdma_destroy_admin_queue(ctrl);
1093c66e2998SSagi Grimberg return ret;
1094c66e2998SSagi Grimberg }
1095c66e2998SSagi Grimberg
nvme_rdma_reconnect_ctrl_work(struct work_struct * work)1096c66e2998SSagi Grimberg static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1097c66e2998SSagi Grimberg {
1098c66e2998SSagi Grimberg struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1099c66e2998SSagi Grimberg struct nvme_rdma_ctrl, reconnect_work);
1100c66e2998SSagi Grimberg
1101c66e2998SSagi Grimberg ++ctrl->ctrl.nr_reconnects;
1102c66e2998SSagi Grimberg
1103c66e2998SSagi Grimberg if (nvme_rdma_setup_ctrl(ctrl, false))
1104c66e2998SSagi Grimberg goto requeue;
110571102307SChristoph Hellwig
11065e1fe61dSSagi Grimberg dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
11075e1fe61dSSagi Grimberg ctrl->ctrl.nr_reconnects);
11085e1fe61dSSagi Grimberg
11095e1fe61dSSagi Grimberg ctrl->ctrl.nr_reconnects = 0;
111071102307SChristoph Hellwig
111171102307SChristoph Hellwig return;
111271102307SChristoph Hellwig
111371102307SChristoph Hellwig requeue:
1114fd8563ceSSagi Grimberg dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
1115fdf9dfa8SSagi Grimberg ctrl->ctrl.nr_reconnects);
1116fd8563ceSSagi Grimberg nvme_rdma_reconnect_or_remove(ctrl);
111771102307SChristoph Hellwig }
111871102307SChristoph Hellwig
nvme_rdma_error_recovery_work(struct work_struct * work)111971102307SChristoph Hellwig static void nvme_rdma_error_recovery_work(struct work_struct *work)
112071102307SChristoph Hellwig {
112171102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl = container_of(work,
112271102307SChristoph Hellwig struct nvme_rdma_ctrl, err_work);
112371102307SChristoph Hellwig
1124e4d753d7SSagi Grimberg nvme_stop_keep_alive(&ctrl->ctrl);
1125b6bb1722SSagi Grimberg flush_work(&ctrl->ctrl.async_event_work);
112675862c72SSagi Grimberg nvme_rdma_teardown_io_queues(ctrl, false);
11279f27bd70SChristoph Hellwig nvme_unquiesce_io_queues(&ctrl->ctrl);
112875862c72SSagi Grimberg nvme_rdma_teardown_admin_queue(ctrl, false);
11299f27bd70SChristoph Hellwig nvme_unquiesce_admin_queue(&ctrl->ctrl);
113091c11d5fSSagi Grimberg nvme_auth_stop(&ctrl->ctrl);
1131e818a5b4SSagi Grimberg
1132ad6a0a52SMax Gurtovoy if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1133ecca390eSSagi Grimberg /* state change failure is ok if we started ctrl delete */
1134*8884a56dSKeith Busch enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1135*8884a56dSKeith Busch
1136*8884a56dSKeith Busch WARN_ON_ONCE(state != NVME_CTRL_DELETING &&
1137*8884a56dSKeith Busch state != NVME_CTRL_DELETING_NOIO);
1138d5bf4b7fSSagi Grimberg return;
1139d5bf4b7fSSagi Grimberg }
1140d5bf4b7fSSagi Grimberg
1141fd8563ceSSagi Grimberg nvme_rdma_reconnect_or_remove(ctrl);
114271102307SChristoph Hellwig }
114371102307SChristoph Hellwig
nvme_rdma_error_recovery(struct nvme_rdma_ctrl * ctrl)114471102307SChristoph Hellwig static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
114571102307SChristoph Hellwig {
1146d5bf4b7fSSagi Grimberg if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
114771102307SChristoph Hellwig return;
114871102307SChristoph Hellwig
11490475a8dcSSagi Grimberg dev_warn(ctrl->ctrl.device, "starting error recovery\n");
115097b2512aSNigel Kirkland queue_work(nvme_reset_wq, &ctrl->err_work);
115171102307SChristoph Hellwig }
115271102307SChristoph Hellwig
nvme_rdma_end_request(struct nvme_rdma_request * req)11538446546cSChristoph Hellwig static void nvme_rdma_end_request(struct nvme_rdma_request *req)
11548446546cSChristoph Hellwig {
11558446546cSChristoph Hellwig struct request *rq = blk_mq_rq_from_pdu(req);
11568446546cSChristoph Hellwig
11578446546cSChristoph Hellwig if (!refcount_dec_and_test(&req->ref))
11588446546cSChristoph Hellwig return;
11592eb81a33SChristoph Hellwig if (!nvme_try_complete_req(rq, req->status, req->result))
1160ff029451SChristoph Hellwig nvme_rdma_complete_rq(rq);
11618446546cSChristoph Hellwig }
11628446546cSChristoph Hellwig
nvme_rdma_wr_error(struct ib_cq * cq,struct ib_wc * wc,const char * op)116371102307SChristoph Hellwig static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
116471102307SChristoph Hellwig const char *op)
116571102307SChristoph Hellwig {
1166287f329eSYamin Friedman struct nvme_rdma_queue *queue = wc->qp->qp_context;
116771102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl = queue->ctrl;
116871102307SChristoph Hellwig
1169*8884a56dSKeith Busch if (nvme_ctrl_state(&ctrl->ctrl) == NVME_CTRL_LIVE)
117071102307SChristoph Hellwig dev_info(ctrl->ctrl.device,
117171102307SChristoph Hellwig "%s for CQE 0x%p failed with status %s (%d)\n",
117271102307SChristoph Hellwig op, wc->wr_cqe,
117371102307SChristoph Hellwig ib_wc_status_msg(wc->status), wc->status);
117471102307SChristoph Hellwig nvme_rdma_error_recovery(ctrl);
117571102307SChristoph Hellwig }
117671102307SChristoph Hellwig
nvme_rdma_memreg_done(struct ib_cq * cq,struct ib_wc * wc)117771102307SChristoph Hellwig static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
117871102307SChristoph Hellwig {
117971102307SChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS))
118071102307SChristoph Hellwig nvme_rdma_wr_error(cq, wc, "MEMREG");
118171102307SChristoph Hellwig }
118271102307SChristoph Hellwig
nvme_rdma_inv_rkey_done(struct ib_cq * cq,struct ib_wc * wc)118371102307SChristoph Hellwig static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
118471102307SChristoph Hellwig {
11852f122e4fSSagi Grimberg struct nvme_rdma_request *req =
11862f122e4fSSagi Grimberg container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
11872f122e4fSSagi Grimberg
11888446546cSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS))
118971102307SChristoph Hellwig nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
11908446546cSChristoph Hellwig else
11918446546cSChristoph Hellwig nvme_rdma_end_request(req);
119271102307SChristoph Hellwig }
119371102307SChristoph Hellwig
nvme_rdma_inv_rkey(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req)119471102307SChristoph Hellwig static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
119571102307SChristoph Hellwig struct nvme_rdma_request *req)
119671102307SChristoph Hellwig {
119771102307SChristoph Hellwig struct ib_send_wr wr = {
119871102307SChristoph Hellwig .opcode = IB_WR_LOCAL_INV,
119971102307SChristoph Hellwig .next = NULL,
120071102307SChristoph Hellwig .num_sge = 0,
12012f122e4fSSagi Grimberg .send_flags = IB_SEND_SIGNALED,
120271102307SChristoph Hellwig .ex.invalidate_rkey = req->mr->rkey,
120371102307SChristoph Hellwig };
120471102307SChristoph Hellwig
120571102307SChristoph Hellwig req->reg_cqe.done = nvme_rdma_inv_rkey_done;
120671102307SChristoph Hellwig wr.wr_cqe = &req->reg_cqe;
120771102307SChristoph Hellwig
120845e3cc1aSBart Van Assche return ib_post_send(queue->qp, &wr, NULL);
120971102307SChristoph Hellwig }
121071102307SChristoph Hellwig
nvme_rdma_dma_unmap_req(struct ib_device * ibdev,struct request * rq)12114686af88SMax Gurtovoy static void nvme_rdma_dma_unmap_req(struct ib_device *ibdev, struct request *rq)
12124686af88SMax Gurtovoy {
12134686af88SMax Gurtovoy struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
12144686af88SMax Gurtovoy
12154686af88SMax Gurtovoy if (blk_integrity_rq(rq)) {
12164686af88SMax Gurtovoy ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
12174686af88SMax Gurtovoy req->metadata_sgl->nents, rq_dma_dir(rq));
12184686af88SMax Gurtovoy sg_free_table_chained(&req->metadata_sgl->sg_table,
12194686af88SMax Gurtovoy NVME_INLINE_METADATA_SG_CNT);
12204686af88SMax Gurtovoy }
12214686af88SMax Gurtovoy
12224686af88SMax Gurtovoy ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
12234686af88SMax Gurtovoy rq_dma_dir(rq));
12244686af88SMax Gurtovoy sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
12254686af88SMax Gurtovoy }
12264686af88SMax Gurtovoy
nvme_rdma_unmap_data(struct nvme_rdma_queue * queue,struct request * rq)122771102307SChristoph Hellwig static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
122871102307SChristoph Hellwig struct request *rq)
122971102307SChristoph Hellwig {
123071102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
123171102307SChristoph Hellwig struct nvme_rdma_device *dev = queue->device;
123271102307SChristoph Hellwig struct ib_device *ibdev = dev->dev;
12335ec5d3bdSMax Gurtovoy struct list_head *pool = &queue->qp->rdma_mrs;
123471102307SChristoph Hellwig
123534e08191SChaitanya Kulkarni if (!blk_rq_nr_phys_segments(rq))
123671102307SChristoph Hellwig return;
123771102307SChristoph Hellwig
12385ec5d3bdSMax Gurtovoy if (req->use_sig_mr)
12395ec5d3bdSMax Gurtovoy pool = &queue->qp->sig_mrs;
12405ec5d3bdSMax Gurtovoy
1241f41725bbSIsrael Rukshin if (req->mr) {
12425ec5d3bdSMax Gurtovoy ib_mr_pool_put(queue->qp, pool, req->mr);
1243f41725bbSIsrael Rukshin req->mr = NULL;
1244f41725bbSIsrael Rukshin }
1245f41725bbSIsrael Rukshin
12464686af88SMax Gurtovoy nvme_rdma_dma_unmap_req(ibdev, rq);
124771102307SChristoph Hellwig }
124871102307SChristoph Hellwig
nvme_rdma_set_sg_null(struct nvme_command * c)124971102307SChristoph Hellwig static int nvme_rdma_set_sg_null(struct nvme_command *c)
125071102307SChristoph Hellwig {
125171102307SChristoph Hellwig struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
125271102307SChristoph Hellwig
125371102307SChristoph Hellwig sg->addr = 0;
125471102307SChristoph Hellwig put_unaligned_le24(0, sg->length);
125571102307SChristoph Hellwig put_unaligned_le32(0, sg->key);
125671102307SChristoph Hellwig sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
125771102307SChristoph Hellwig return 0;
125871102307SChristoph Hellwig }
125971102307SChristoph Hellwig
nvme_rdma_map_sg_inline(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c,int count)126071102307SChristoph Hellwig static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
126164a741c1SSteve Wise struct nvme_rdma_request *req, struct nvme_command *c,
126264a741c1SSteve Wise int count)
126371102307SChristoph Hellwig {
126471102307SChristoph Hellwig struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
126564a741c1SSteve Wise struct ib_sge *sge = &req->sge[1];
126612b2aaadSSagi Grimberg struct scatterlist *sgl;
126764a741c1SSteve Wise u32 len = 0;
126864a741c1SSteve Wise int i;
126971102307SChristoph Hellwig
127012b2aaadSSagi Grimberg for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
127164a741c1SSteve Wise sge->addr = sg_dma_address(sgl);
127264a741c1SSteve Wise sge->length = sg_dma_len(sgl);
127364a741c1SSteve Wise sge->lkey = queue->device->pd->local_dma_lkey;
127464a741c1SSteve Wise len += sge->length;
127512b2aaadSSagi Grimberg sge++;
127664a741c1SSteve Wise }
127771102307SChristoph Hellwig
127871102307SChristoph Hellwig sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
127964a741c1SSteve Wise sg->length = cpu_to_le32(len);
128071102307SChristoph Hellwig sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
128171102307SChristoph Hellwig
128264a741c1SSteve Wise req->num_sge += count;
128371102307SChristoph Hellwig return 0;
128471102307SChristoph Hellwig }
128571102307SChristoph Hellwig
nvme_rdma_map_sg_single(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c)128671102307SChristoph Hellwig static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
128771102307SChristoph Hellwig struct nvme_rdma_request *req, struct nvme_command *c)
128871102307SChristoph Hellwig {
128971102307SChristoph Hellwig struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
129071102307SChristoph Hellwig
1291324d9e78SIsrael Rukshin sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1292324d9e78SIsrael Rukshin put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
129311975e01SChristoph Hellwig put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
129471102307SChristoph Hellwig sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
129571102307SChristoph Hellwig return 0;
129671102307SChristoph Hellwig }
129771102307SChristoph Hellwig
nvme_rdma_map_sg_fr(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c,int count)129871102307SChristoph Hellwig static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
129971102307SChristoph Hellwig struct nvme_rdma_request *req, struct nvme_command *c,
130071102307SChristoph Hellwig int count)
130171102307SChristoph Hellwig {
130271102307SChristoph Hellwig struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
130371102307SChristoph Hellwig int nr;
130471102307SChristoph Hellwig
1305f41725bbSIsrael Rukshin req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1306f41725bbSIsrael Rukshin if (WARN_ON_ONCE(!req->mr))
1307f41725bbSIsrael Rukshin return -EAGAIN;
1308f41725bbSIsrael Rukshin
1309b925a2dcSMax Gurtovoy /*
1310b925a2dcSMax Gurtovoy * Align the MR to a 4K page size to match the ctrl page size and
1311b925a2dcSMax Gurtovoy * the block virtual boundary.
1312b925a2dcSMax Gurtovoy */
1313324d9e78SIsrael Rukshin nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1314324d9e78SIsrael Rukshin SZ_4K);
1315a7b7c7a1SMax Gurtovoy if (unlikely(nr < count)) {
1316f41725bbSIsrael Rukshin ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1317f41725bbSIsrael Rukshin req->mr = NULL;
131871102307SChristoph Hellwig if (nr < 0)
131971102307SChristoph Hellwig return nr;
132071102307SChristoph Hellwig return -EINVAL;
132171102307SChristoph Hellwig }
132271102307SChristoph Hellwig
132371102307SChristoph Hellwig ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
132471102307SChristoph Hellwig
132571102307SChristoph Hellwig req->reg_cqe.done = nvme_rdma_memreg_done;
132671102307SChristoph Hellwig memset(&req->reg_wr, 0, sizeof(req->reg_wr));
132771102307SChristoph Hellwig req->reg_wr.wr.opcode = IB_WR_REG_MR;
132871102307SChristoph Hellwig req->reg_wr.wr.wr_cqe = &req->reg_cqe;
132971102307SChristoph Hellwig req->reg_wr.wr.num_sge = 0;
133071102307SChristoph Hellwig req->reg_wr.mr = req->mr;
133171102307SChristoph Hellwig req->reg_wr.key = req->mr->rkey;
133271102307SChristoph Hellwig req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
133371102307SChristoph Hellwig IB_ACCESS_REMOTE_READ |
133471102307SChristoph Hellwig IB_ACCESS_REMOTE_WRITE;
133571102307SChristoph Hellwig
133671102307SChristoph Hellwig sg->addr = cpu_to_le64(req->mr->iova);
133771102307SChristoph Hellwig put_unaligned_le24(req->mr->length, sg->length);
133871102307SChristoph Hellwig put_unaligned_le32(req->mr->rkey, sg->key);
133971102307SChristoph Hellwig sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
134071102307SChristoph Hellwig NVME_SGL_FMT_INVALIDATE;
134171102307SChristoph Hellwig
134271102307SChristoph Hellwig return 0;
134371102307SChristoph Hellwig }
134471102307SChristoph Hellwig
nvme_rdma_set_sig_domain(struct blk_integrity * bi,struct nvme_command * cmd,struct ib_sig_domain * domain,u16 control,u8 pi_type)13455ec5d3bdSMax Gurtovoy static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
13465ec5d3bdSMax Gurtovoy struct nvme_command *cmd, struct ib_sig_domain *domain,
13475ec5d3bdSMax Gurtovoy u16 control, u8 pi_type)
13485ec5d3bdSMax Gurtovoy {
13495ec5d3bdSMax Gurtovoy domain->sig_type = IB_SIG_TYPE_T10_DIF;
13505ec5d3bdSMax Gurtovoy domain->sig.dif.bg_type = IB_T10DIF_CRC;
13515ec5d3bdSMax Gurtovoy domain->sig.dif.pi_interval = 1 << bi->interval_exp;
13525ec5d3bdSMax Gurtovoy domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
13535ec5d3bdSMax Gurtovoy if (control & NVME_RW_PRINFO_PRCHK_REF)
13545ec5d3bdSMax Gurtovoy domain->sig.dif.ref_remap = true;
13555ec5d3bdSMax Gurtovoy
13565ec5d3bdSMax Gurtovoy domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
13575ec5d3bdSMax Gurtovoy domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
13585ec5d3bdSMax Gurtovoy domain->sig.dif.app_escape = true;
13595ec5d3bdSMax Gurtovoy if (pi_type == NVME_NS_DPS_PI_TYPE3)
13605ec5d3bdSMax Gurtovoy domain->sig.dif.ref_escape = true;
13615ec5d3bdSMax Gurtovoy }
13625ec5d3bdSMax Gurtovoy
nvme_rdma_set_sig_attrs(struct blk_integrity * bi,struct nvme_command * cmd,struct ib_sig_attrs * sig_attrs,u8 pi_type)13635ec5d3bdSMax Gurtovoy static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
13645ec5d3bdSMax Gurtovoy struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
13655ec5d3bdSMax Gurtovoy u8 pi_type)
13665ec5d3bdSMax Gurtovoy {
13675ec5d3bdSMax Gurtovoy u16 control = le16_to_cpu(cmd->rw.control);
13685ec5d3bdSMax Gurtovoy
13695ec5d3bdSMax Gurtovoy memset(sig_attrs, 0, sizeof(*sig_attrs));
13705ec5d3bdSMax Gurtovoy if (control & NVME_RW_PRINFO_PRACT) {
13715ec5d3bdSMax Gurtovoy /* for WRITE_INSERT/READ_STRIP no memory domain */
13725ec5d3bdSMax Gurtovoy sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
13735ec5d3bdSMax Gurtovoy nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
13745ec5d3bdSMax Gurtovoy pi_type);
13755ec5d3bdSMax Gurtovoy /* Clear the PRACT bit since HCA will generate/verify the PI */
13765ec5d3bdSMax Gurtovoy control &= ~NVME_RW_PRINFO_PRACT;
13775ec5d3bdSMax Gurtovoy cmd->rw.control = cpu_to_le16(control);
13785ec5d3bdSMax Gurtovoy } else {
13795ec5d3bdSMax Gurtovoy /* for WRITE_PASS/READ_PASS both wire/memory domains exist */
13805ec5d3bdSMax Gurtovoy nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
13815ec5d3bdSMax Gurtovoy pi_type);
13825ec5d3bdSMax Gurtovoy nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
13835ec5d3bdSMax Gurtovoy pi_type);
13845ec5d3bdSMax Gurtovoy }
13855ec5d3bdSMax Gurtovoy }
13865ec5d3bdSMax Gurtovoy
nvme_rdma_set_prot_checks(struct nvme_command * cmd,u8 * mask)13875ec5d3bdSMax Gurtovoy static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
13885ec5d3bdSMax Gurtovoy {
13895ec5d3bdSMax Gurtovoy *mask = 0;
13905ec5d3bdSMax Gurtovoy if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
13915ec5d3bdSMax Gurtovoy *mask |= IB_SIG_CHECK_REFTAG;
13925ec5d3bdSMax Gurtovoy if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
13935ec5d3bdSMax Gurtovoy *mask |= IB_SIG_CHECK_GUARD;
13945ec5d3bdSMax Gurtovoy }
13955ec5d3bdSMax Gurtovoy
nvme_rdma_sig_done(struct ib_cq * cq,struct ib_wc * wc)13965ec5d3bdSMax Gurtovoy static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
13975ec5d3bdSMax Gurtovoy {
13985ec5d3bdSMax Gurtovoy if (unlikely(wc->status != IB_WC_SUCCESS))
13995ec5d3bdSMax Gurtovoy nvme_rdma_wr_error(cq, wc, "SIG");
14005ec5d3bdSMax Gurtovoy }
14015ec5d3bdSMax Gurtovoy
nvme_rdma_map_sg_pi(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c,int count,int pi_count)14025ec5d3bdSMax Gurtovoy static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
14035ec5d3bdSMax Gurtovoy struct nvme_rdma_request *req, struct nvme_command *c,
14045ec5d3bdSMax Gurtovoy int count, int pi_count)
14055ec5d3bdSMax Gurtovoy {
14065ec5d3bdSMax Gurtovoy struct nvme_rdma_sgl *sgl = &req->data_sgl;
14075ec5d3bdSMax Gurtovoy struct ib_reg_wr *wr = &req->reg_wr;
14085ec5d3bdSMax Gurtovoy struct request *rq = blk_mq_rq_from_pdu(req);
14095ec5d3bdSMax Gurtovoy struct nvme_ns *ns = rq->q->queuedata;
14105ec5d3bdSMax Gurtovoy struct bio *bio = rq->bio;
14115ec5d3bdSMax Gurtovoy struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
14125ec5d3bdSMax Gurtovoy int nr;
14135ec5d3bdSMax Gurtovoy
14145ec5d3bdSMax Gurtovoy req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
14155ec5d3bdSMax Gurtovoy if (WARN_ON_ONCE(!req->mr))
14165ec5d3bdSMax Gurtovoy return -EAGAIN;
14175ec5d3bdSMax Gurtovoy
14185ec5d3bdSMax Gurtovoy nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
14195ec5d3bdSMax Gurtovoy req->metadata_sgl->sg_table.sgl, pi_count, NULL,
14205ec5d3bdSMax Gurtovoy SZ_4K);
14215ec5d3bdSMax Gurtovoy if (unlikely(nr))
14225ec5d3bdSMax Gurtovoy goto mr_put;
14235ec5d3bdSMax Gurtovoy
1424309dca30SChristoph Hellwig nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
14255ec5d3bdSMax Gurtovoy req->mr->sig_attrs, ns->pi_type);
14265ec5d3bdSMax Gurtovoy nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
14275ec5d3bdSMax Gurtovoy
14285ec5d3bdSMax Gurtovoy ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
14295ec5d3bdSMax Gurtovoy
14305ec5d3bdSMax Gurtovoy req->reg_cqe.done = nvme_rdma_sig_done;
14315ec5d3bdSMax Gurtovoy memset(wr, 0, sizeof(*wr));
14325ec5d3bdSMax Gurtovoy wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
14335ec5d3bdSMax Gurtovoy wr->wr.wr_cqe = &req->reg_cqe;
14345ec5d3bdSMax Gurtovoy wr->wr.num_sge = 0;
14355ec5d3bdSMax Gurtovoy wr->wr.send_flags = 0;
14365ec5d3bdSMax Gurtovoy wr->mr = req->mr;
14375ec5d3bdSMax Gurtovoy wr->key = req->mr->rkey;
14385ec5d3bdSMax Gurtovoy wr->access = IB_ACCESS_LOCAL_WRITE |
14395ec5d3bdSMax Gurtovoy IB_ACCESS_REMOTE_READ |
14405ec5d3bdSMax Gurtovoy IB_ACCESS_REMOTE_WRITE;
14415ec5d3bdSMax Gurtovoy
14425ec5d3bdSMax Gurtovoy sg->addr = cpu_to_le64(req->mr->iova);
14435ec5d3bdSMax Gurtovoy put_unaligned_le24(req->mr->length, sg->length);
14445ec5d3bdSMax Gurtovoy put_unaligned_le32(req->mr->rkey, sg->key);
14455ec5d3bdSMax Gurtovoy sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
14465ec5d3bdSMax Gurtovoy
14475ec5d3bdSMax Gurtovoy return 0;
14485ec5d3bdSMax Gurtovoy
14495ec5d3bdSMax Gurtovoy mr_put:
14505ec5d3bdSMax Gurtovoy ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
14515ec5d3bdSMax Gurtovoy req->mr = NULL;
14525ec5d3bdSMax Gurtovoy if (nr < 0)
14535ec5d3bdSMax Gurtovoy return nr;
14545ec5d3bdSMax Gurtovoy return -EINVAL;
14555ec5d3bdSMax Gurtovoy }
14565ec5d3bdSMax Gurtovoy
nvme_rdma_dma_map_req(struct ib_device * ibdev,struct request * rq,int * count,int * pi_count)14574686af88SMax Gurtovoy static int nvme_rdma_dma_map_req(struct ib_device *ibdev, struct request *rq,
14584686af88SMax Gurtovoy int *count, int *pi_count)
145971102307SChristoph Hellwig {
146071102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
14614686af88SMax Gurtovoy int ret;
146271102307SChristoph Hellwig
1463324d9e78SIsrael Rukshin req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1464324d9e78SIsrael Rukshin ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1465324d9e78SIsrael Rukshin blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
146638e18002SIsrael Rukshin NVME_INLINE_SG_CNT);
146771102307SChristoph Hellwig if (ret)
146871102307SChristoph Hellwig return -ENOMEM;
146971102307SChristoph Hellwig
1470324d9e78SIsrael Rukshin req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1471324d9e78SIsrael Rukshin req->data_sgl.sg_table.sgl);
147271102307SChristoph Hellwig
14734686af88SMax Gurtovoy *count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1474324d9e78SIsrael Rukshin req->data_sgl.nents, rq_dma_dir(rq));
14754686af88SMax Gurtovoy if (unlikely(*count <= 0)) {
147694423a8fSMax Gurtovoy ret = -EIO;
147794423a8fSMax Gurtovoy goto out_free_table;
147871102307SChristoph Hellwig }
147971102307SChristoph Hellwig
14805ec5d3bdSMax Gurtovoy if (blk_integrity_rq(rq)) {
14815ec5d3bdSMax Gurtovoy req->metadata_sgl->sg_table.sgl =
14825ec5d3bdSMax Gurtovoy (struct scatterlist *)(req->metadata_sgl + 1);
14835ec5d3bdSMax Gurtovoy ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
14845ec5d3bdSMax Gurtovoy blk_rq_count_integrity_sg(rq->q, rq->bio),
14855ec5d3bdSMax Gurtovoy req->metadata_sgl->sg_table.sgl,
14865ec5d3bdSMax Gurtovoy NVME_INLINE_METADATA_SG_CNT);
14875ec5d3bdSMax Gurtovoy if (unlikely(ret)) {
14885ec5d3bdSMax Gurtovoy ret = -ENOMEM;
14895ec5d3bdSMax Gurtovoy goto out_unmap_sg;
14905ec5d3bdSMax Gurtovoy }
14915ec5d3bdSMax Gurtovoy
14925ec5d3bdSMax Gurtovoy req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
14935ec5d3bdSMax Gurtovoy rq->bio, req->metadata_sgl->sg_table.sgl);
14944686af88SMax Gurtovoy *pi_count = ib_dma_map_sg(ibdev,
14955ec5d3bdSMax Gurtovoy req->metadata_sgl->sg_table.sgl,
14965ec5d3bdSMax Gurtovoy req->metadata_sgl->nents,
14975ec5d3bdSMax Gurtovoy rq_dma_dir(rq));
14984686af88SMax Gurtovoy if (unlikely(*pi_count <= 0)) {
14995ec5d3bdSMax Gurtovoy ret = -EIO;
15005ec5d3bdSMax Gurtovoy goto out_free_pi_table;
15015ec5d3bdSMax Gurtovoy }
15025ec5d3bdSMax Gurtovoy }
15035ec5d3bdSMax Gurtovoy
15044686af88SMax Gurtovoy return 0;
15054686af88SMax Gurtovoy
15064686af88SMax Gurtovoy out_free_pi_table:
15074686af88SMax Gurtovoy sg_free_table_chained(&req->metadata_sgl->sg_table,
15084686af88SMax Gurtovoy NVME_INLINE_METADATA_SG_CNT);
15094686af88SMax Gurtovoy out_unmap_sg:
15104686af88SMax Gurtovoy ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
15114686af88SMax Gurtovoy rq_dma_dir(rq));
15124686af88SMax Gurtovoy out_free_table:
15134686af88SMax Gurtovoy sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
15144686af88SMax Gurtovoy return ret;
15154686af88SMax Gurtovoy }
15164686af88SMax Gurtovoy
nvme_rdma_map_data(struct nvme_rdma_queue * queue,struct request * rq,struct nvme_command * c)15174686af88SMax Gurtovoy static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
15184686af88SMax Gurtovoy struct request *rq, struct nvme_command *c)
15194686af88SMax Gurtovoy {
15204686af88SMax Gurtovoy struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
15214686af88SMax Gurtovoy struct nvme_rdma_device *dev = queue->device;
15224686af88SMax Gurtovoy struct ib_device *ibdev = dev->dev;
15234686af88SMax Gurtovoy int pi_count = 0;
15244686af88SMax Gurtovoy int count, ret;
15254686af88SMax Gurtovoy
15264686af88SMax Gurtovoy req->num_sge = 1;
15274686af88SMax Gurtovoy refcount_set(&req->ref, 2); /* send and recv completions */
15284686af88SMax Gurtovoy
15294686af88SMax Gurtovoy c->common.flags |= NVME_CMD_SGL_METABUF;
15304686af88SMax Gurtovoy
15314686af88SMax Gurtovoy if (!blk_rq_nr_phys_segments(rq))
15324686af88SMax Gurtovoy return nvme_rdma_set_sg_null(c);
15334686af88SMax Gurtovoy
15344686af88SMax Gurtovoy ret = nvme_rdma_dma_map_req(ibdev, rq, &count, &pi_count);
15354686af88SMax Gurtovoy if (unlikely(ret))
15364686af88SMax Gurtovoy return ret;
15374686af88SMax Gurtovoy
15385ec5d3bdSMax Gurtovoy if (req->use_sig_mr) {
15395ec5d3bdSMax Gurtovoy ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
15405ec5d3bdSMax Gurtovoy goto out;
15415ec5d3bdSMax Gurtovoy }
15425ec5d3bdSMax Gurtovoy
154364a741c1SSteve Wise if (count <= dev->num_inline_segments) {
1544b131c61dSChristoph Hellwig if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
154564a741c1SSteve Wise queue->ctrl->use_inline_data &&
1546b131c61dSChristoph Hellwig blk_rq_payload_bytes(rq) <=
154794423a8fSMax Gurtovoy nvme_rdma_inline_data_size(queue)) {
154864a741c1SSteve Wise ret = nvme_rdma_map_sg_inline(queue, req, c, count);
154994423a8fSMax Gurtovoy goto out;
155071102307SChristoph Hellwig }
155171102307SChristoph Hellwig
155264a741c1SSteve Wise if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
155394423a8fSMax Gurtovoy ret = nvme_rdma_map_sg_single(queue, req, c);
155494423a8fSMax Gurtovoy goto out;
155594423a8fSMax Gurtovoy }
155694423a8fSMax Gurtovoy }
155794423a8fSMax Gurtovoy
155894423a8fSMax Gurtovoy ret = nvme_rdma_map_sg_fr(queue, req, c, count);
155994423a8fSMax Gurtovoy out:
156094423a8fSMax Gurtovoy if (unlikely(ret))
15614686af88SMax Gurtovoy goto out_dma_unmap_req;
156294423a8fSMax Gurtovoy
156394423a8fSMax Gurtovoy return 0;
156494423a8fSMax Gurtovoy
15654686af88SMax Gurtovoy out_dma_unmap_req:
15664686af88SMax Gurtovoy nvme_rdma_dma_unmap_req(ibdev, rq);
156794423a8fSMax Gurtovoy return ret;
156871102307SChristoph Hellwig }
156971102307SChristoph Hellwig
nvme_rdma_send_done(struct ib_cq * cq,struct ib_wc * wc)157071102307SChristoph Hellwig static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
157171102307SChristoph Hellwig {
15724af7f7ffSSagi Grimberg struct nvme_rdma_qe *qe =
15734af7f7ffSSagi Grimberg container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
15744af7f7ffSSagi Grimberg struct nvme_rdma_request *req =
15754af7f7ffSSagi Grimberg container_of(qe, struct nvme_rdma_request, sqe);
15764af7f7ffSSagi Grimberg
15778446546cSChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS))
157871102307SChristoph Hellwig nvme_rdma_wr_error(cq, wc, "SEND");
15798446546cSChristoph Hellwig else
15808446546cSChristoph Hellwig nvme_rdma_end_request(req);
158171102307SChristoph Hellwig }
158271102307SChristoph Hellwig
nvme_rdma_post_send(struct nvme_rdma_queue * queue,struct nvme_rdma_qe * qe,struct ib_sge * sge,u32 num_sge,struct ib_send_wr * first)158371102307SChristoph Hellwig static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
158471102307SChristoph Hellwig struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1585b4b591c8SSagi Grimberg struct ib_send_wr *first)
158671102307SChristoph Hellwig {
158745e3cc1aSBart Van Assche struct ib_send_wr wr;
158871102307SChristoph Hellwig int ret;
158971102307SChristoph Hellwig
159071102307SChristoph Hellwig sge->addr = qe->dma;
1591a62315b8SIsrael Rukshin sge->length = sizeof(struct nvme_command);
159271102307SChristoph Hellwig sge->lkey = queue->device->pd->local_dma_lkey;
159371102307SChristoph Hellwig
159471102307SChristoph Hellwig wr.next = NULL;
159571102307SChristoph Hellwig wr.wr_cqe = &qe->cqe;
159671102307SChristoph Hellwig wr.sg_list = sge;
159771102307SChristoph Hellwig wr.num_sge = num_sge;
159871102307SChristoph Hellwig wr.opcode = IB_WR_SEND;
1599b4b591c8SSagi Grimberg wr.send_flags = IB_SEND_SIGNALED;
160071102307SChristoph Hellwig
160171102307SChristoph Hellwig if (first)
160271102307SChristoph Hellwig first->next = ≀
160371102307SChristoph Hellwig else
160471102307SChristoph Hellwig first = ≀
160571102307SChristoph Hellwig
160645e3cc1aSBart Van Assche ret = ib_post_send(queue->qp, first, NULL);
1607a7b7c7a1SMax Gurtovoy if (unlikely(ret)) {
160871102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
160971102307SChristoph Hellwig "%s failed with error code %d\n", __func__, ret);
161071102307SChristoph Hellwig }
161171102307SChristoph Hellwig return ret;
161271102307SChristoph Hellwig }
161371102307SChristoph Hellwig
nvme_rdma_post_recv(struct nvme_rdma_queue * queue,struct nvme_rdma_qe * qe)161471102307SChristoph Hellwig static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
161571102307SChristoph Hellwig struct nvme_rdma_qe *qe)
161671102307SChristoph Hellwig {
161745e3cc1aSBart Van Assche struct ib_recv_wr wr;
161871102307SChristoph Hellwig struct ib_sge list;
161971102307SChristoph Hellwig int ret;
162071102307SChristoph Hellwig
162171102307SChristoph Hellwig list.addr = qe->dma;
162271102307SChristoph Hellwig list.length = sizeof(struct nvme_completion);
162371102307SChristoph Hellwig list.lkey = queue->device->pd->local_dma_lkey;
162471102307SChristoph Hellwig
162571102307SChristoph Hellwig qe->cqe.done = nvme_rdma_recv_done;
162671102307SChristoph Hellwig
162771102307SChristoph Hellwig wr.next = NULL;
162871102307SChristoph Hellwig wr.wr_cqe = &qe->cqe;
162971102307SChristoph Hellwig wr.sg_list = &list;
163071102307SChristoph Hellwig wr.num_sge = 1;
163171102307SChristoph Hellwig
163245e3cc1aSBart Van Assche ret = ib_post_recv(queue->qp, &wr, NULL);
1633a7b7c7a1SMax Gurtovoy if (unlikely(ret)) {
163471102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
163571102307SChristoph Hellwig "%s failed with error code %d\n", __func__, ret);
163671102307SChristoph Hellwig }
163771102307SChristoph Hellwig return ret;
163871102307SChristoph Hellwig }
163971102307SChristoph Hellwig
nvme_rdma_tagset(struct nvme_rdma_queue * queue)164071102307SChristoph Hellwig static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
164171102307SChristoph Hellwig {
164271102307SChristoph Hellwig u32 queue_idx = nvme_rdma_queue_idx(queue);
164371102307SChristoph Hellwig
164471102307SChristoph Hellwig if (queue_idx == 0)
164571102307SChristoph Hellwig return queue->ctrl->admin_tag_set.tags[queue_idx];
164671102307SChristoph Hellwig return queue->ctrl->tag_set.tags[queue_idx - 1];
164771102307SChristoph Hellwig }
164871102307SChristoph Hellwig
nvme_rdma_async_done(struct ib_cq * cq,struct ib_wc * wc)1649b4b591c8SSagi Grimberg static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1650b4b591c8SSagi Grimberg {
1651b4b591c8SSagi Grimberg if (unlikely(wc->status != IB_WC_SUCCESS))
1652b4b591c8SSagi Grimberg nvme_rdma_wr_error(cq, wc, "ASYNC");
1653b4b591c8SSagi Grimberg }
1654b4b591c8SSagi Grimberg
nvme_rdma_submit_async_event(struct nvme_ctrl * arg)1655ad22c355SKeith Busch static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
165671102307SChristoph Hellwig {
165771102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
165871102307SChristoph Hellwig struct nvme_rdma_queue *queue = &ctrl->queues[0];
165971102307SChristoph Hellwig struct ib_device *dev = queue->device->dev;
166071102307SChristoph Hellwig struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
166171102307SChristoph Hellwig struct nvme_command *cmd = sqe->data;
166271102307SChristoph Hellwig struct ib_sge sge;
166371102307SChristoph Hellwig int ret;
166471102307SChristoph Hellwig
166571102307SChristoph Hellwig ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
166671102307SChristoph Hellwig
166771102307SChristoph Hellwig memset(cmd, 0, sizeof(*cmd));
166871102307SChristoph Hellwig cmd->common.opcode = nvme_admin_async_event;
166938dabe21SKeith Busch cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
167071102307SChristoph Hellwig cmd->common.flags |= NVME_CMD_SGL_METABUF;
167171102307SChristoph Hellwig nvme_rdma_set_sg_null(cmd);
167271102307SChristoph Hellwig
1673b4b591c8SSagi Grimberg sqe->cqe.done = nvme_rdma_async_done;
1674b4b591c8SSagi Grimberg
167571102307SChristoph Hellwig ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
167671102307SChristoph Hellwig DMA_TO_DEVICE);
167771102307SChristoph Hellwig
1678b4b591c8SSagi Grimberg ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
167971102307SChristoph Hellwig WARN_ON_ONCE(ret);
168071102307SChristoph Hellwig }
168171102307SChristoph Hellwig
nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue * queue,struct nvme_completion * cqe,struct ib_wc * wc)16821052b8acSJens Axboe static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
16831052b8acSJens Axboe struct nvme_completion *cqe, struct ib_wc *wc)
168471102307SChristoph Hellwig {
168571102307SChristoph Hellwig struct request *rq;
168671102307SChristoph Hellwig struct nvme_rdma_request *req;
168771102307SChristoph Hellwig
1688e7006de6SSagi Grimberg rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
168971102307SChristoph Hellwig if (!rq) {
169071102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
1691e7006de6SSagi Grimberg "got bad command_id %#x on QP %#x\n",
169271102307SChristoph Hellwig cqe->command_id, queue->qp->qp_num);
169371102307SChristoph Hellwig nvme_rdma_error_recovery(queue->ctrl);
16941052b8acSJens Axboe return;
169571102307SChristoph Hellwig }
169671102307SChristoph Hellwig req = blk_mq_rq_to_pdu(rq);
169771102307SChristoph Hellwig
16984af7f7ffSSagi Grimberg req->status = cqe->status;
16994af7f7ffSSagi Grimberg req->result = cqe->result;
170071102307SChristoph Hellwig
17013ef0279bSSagi Grimberg if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1702a87da50fSChao Leng if (unlikely(!req->mr ||
1703a87da50fSChao Leng wc->ex.invalidate_rkey != req->mr->rkey)) {
17043ef0279bSSagi Grimberg dev_err(queue->ctrl->ctrl.device,
17053ef0279bSSagi Grimberg "Bogus remote invalidation for rkey %#x\n",
1706a87da50fSChao Leng req->mr ? req->mr->rkey : 0);
17073ef0279bSSagi Grimberg nvme_rdma_error_recovery(queue->ctrl);
17083ef0279bSSagi Grimberg }
1709f41725bbSIsrael Rukshin } else if (req->mr) {
17101052b8acSJens Axboe int ret;
17111052b8acSJens Axboe
17122f122e4fSSagi Grimberg ret = nvme_rdma_inv_rkey(queue, req);
17132f122e4fSSagi Grimberg if (unlikely(ret < 0)) {
17142f122e4fSSagi Grimberg dev_err(queue->ctrl->ctrl.device,
17152f122e4fSSagi Grimberg "Queueing INV WR for rkey %#x failed (%d)\n",
17162f122e4fSSagi Grimberg req->mr->rkey, ret);
17172f122e4fSSagi Grimberg nvme_rdma_error_recovery(queue->ctrl);
17182f122e4fSSagi Grimberg }
17192f122e4fSSagi Grimberg /* the local invalidation completion will end the request */
17207a804c34SChristoph Hellwig return;
17212f122e4fSSagi Grimberg }
17227a804c34SChristoph Hellwig
17237a804c34SChristoph Hellwig nvme_rdma_end_request(req);
17244af7f7ffSSagi Grimberg }
17254af7f7ffSSagi Grimberg
nvme_rdma_recv_done(struct ib_cq * cq,struct ib_wc * wc)17261052b8acSJens Axboe static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
172771102307SChristoph Hellwig {
172871102307SChristoph Hellwig struct nvme_rdma_qe *qe =
172971102307SChristoph Hellwig container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1730287f329eSYamin Friedman struct nvme_rdma_queue *queue = wc->qp->qp_context;
173171102307SChristoph Hellwig struct ib_device *ibdev = queue->device->dev;
173271102307SChristoph Hellwig struct nvme_completion *cqe = qe->data;
173371102307SChristoph Hellwig const size_t len = sizeof(struct nvme_completion);
173471102307SChristoph Hellwig
173571102307SChristoph Hellwig if (unlikely(wc->status != IB_WC_SUCCESS)) {
173671102307SChristoph Hellwig nvme_rdma_wr_error(cq, wc, "RECV");
17371052b8acSJens Axboe return;
173871102307SChristoph Hellwig }
173971102307SChristoph Hellwig
174025c1ca6eSzhenwei pi /* sanity checking for received data length */
174125c1ca6eSzhenwei pi if (unlikely(wc->byte_len < len)) {
174225c1ca6eSzhenwei pi dev_err(queue->ctrl->ctrl.device,
174325c1ca6eSzhenwei pi "Unexpected nvme completion length(%d)\n", wc->byte_len);
174425c1ca6eSzhenwei pi nvme_rdma_error_recovery(queue->ctrl);
174525c1ca6eSzhenwei pi return;
174625c1ca6eSzhenwei pi }
174725c1ca6eSzhenwei pi
174871102307SChristoph Hellwig ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
174971102307SChristoph Hellwig /*
175071102307SChristoph Hellwig * AEN requests are special as they don't time out and can
175171102307SChristoph Hellwig * survive any kind of queue freeze and often don't respond to
175271102307SChristoph Hellwig * aborts. We don't even bother to allocate a struct request
175371102307SChristoph Hellwig * for them but rather special case them here.
175471102307SChristoph Hellwig */
175558a8df67SIsrael Rukshin if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
175658a8df67SIsrael Rukshin cqe->command_id)))
17577bf58533SChristoph Hellwig nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
17587bf58533SChristoph Hellwig &cqe->result);
175971102307SChristoph Hellwig else
17601052b8acSJens Axboe nvme_rdma_process_nvme_rsp(queue, cqe, wc);
176171102307SChristoph Hellwig ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
176271102307SChristoph Hellwig
176371102307SChristoph Hellwig nvme_rdma_post_recv(queue, qe);
176471102307SChristoph Hellwig }
176571102307SChristoph Hellwig
nvme_rdma_conn_established(struct nvme_rdma_queue * queue)176671102307SChristoph Hellwig static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
176771102307SChristoph Hellwig {
176871102307SChristoph Hellwig int ret, i;
176971102307SChristoph Hellwig
177071102307SChristoph Hellwig for (i = 0; i < queue->queue_size; i++) {
177171102307SChristoph Hellwig ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
177271102307SChristoph Hellwig if (ret)
17739817d763SRuozhu Li return ret;
177471102307SChristoph Hellwig }
177571102307SChristoph Hellwig
177671102307SChristoph Hellwig return 0;
177771102307SChristoph Hellwig }
177871102307SChristoph Hellwig
nvme_rdma_conn_rejected(struct nvme_rdma_queue * queue,struct rdma_cm_event * ev)177971102307SChristoph Hellwig static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
178071102307SChristoph Hellwig struct rdma_cm_event *ev)
178171102307SChristoph Hellwig {
17827f03953cSSteve Wise struct rdma_cm_id *cm_id = queue->cm_id;
17837f03953cSSteve Wise int status = ev->status;
17847f03953cSSteve Wise const char *rej_msg;
17857f03953cSSteve Wise const struct nvme_rdma_cm_rej *rej_data;
17867f03953cSSteve Wise u8 rej_data_len;
17877f03953cSSteve Wise
17887f03953cSSteve Wise rej_msg = rdma_reject_msg(cm_id, status);
17897f03953cSSteve Wise rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
17907f03953cSSteve Wise
17917f03953cSSteve Wise if (rej_data && rej_data_len >= sizeof(u16)) {
17927f03953cSSteve Wise u16 sts = le16_to_cpu(rej_data->sts);
179371102307SChristoph Hellwig
179471102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
17957f03953cSSteve Wise "Connect rejected: status %d (%s) nvme status %d (%s).\n",
17967f03953cSSteve Wise status, rej_msg, sts, nvme_rdma_cm_msg(sts));
179771102307SChristoph Hellwig } else {
179871102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
17997f03953cSSteve Wise "Connect rejected: status %d (%s).\n", status, rej_msg);
180071102307SChristoph Hellwig }
180171102307SChristoph Hellwig
180271102307SChristoph Hellwig return -ECONNRESET;
180371102307SChristoph Hellwig }
180471102307SChristoph Hellwig
nvme_rdma_addr_resolved(struct nvme_rdma_queue * queue)180571102307SChristoph Hellwig static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
180671102307SChristoph Hellwig {
1807e63440d6SIsrael Rukshin struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
180871102307SChristoph Hellwig int ret;
180971102307SChristoph Hellwig
1810ca6e95bbSSagi Grimberg ret = nvme_rdma_create_queue_ib(queue);
1811ca6e95bbSSagi Grimberg if (ret)
1812ca6e95bbSSagi Grimberg return ret;
181371102307SChristoph Hellwig
1814e63440d6SIsrael Rukshin if (ctrl->opts->tos >= 0)
1815e63440d6SIsrael Rukshin rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
18160525af71SIsrael Rukshin ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CM_TIMEOUT_MS);
181771102307SChristoph Hellwig if (ret) {
1818e63440d6SIsrael Rukshin dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
181971102307SChristoph Hellwig queue->cm_error);
182071102307SChristoph Hellwig goto out_destroy_queue;
182171102307SChristoph Hellwig }
182271102307SChristoph Hellwig
182371102307SChristoph Hellwig return 0;
182471102307SChristoph Hellwig
182571102307SChristoph Hellwig out_destroy_queue:
182671102307SChristoph Hellwig nvme_rdma_destroy_queue_ib(queue);
182771102307SChristoph Hellwig return ret;
182871102307SChristoph Hellwig }
182971102307SChristoph Hellwig
nvme_rdma_route_resolved(struct nvme_rdma_queue * queue)183071102307SChristoph Hellwig static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
183171102307SChristoph Hellwig {
183271102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl = queue->ctrl;
183371102307SChristoph Hellwig struct rdma_conn_param param = { };
18340b857b44SRoland Dreier struct nvme_rdma_cm_req priv = { };
183571102307SChristoph Hellwig int ret;
183671102307SChristoph Hellwig
183771102307SChristoph Hellwig param.qp_num = queue->qp->qp_num;
183871102307SChristoph Hellwig param.flow_control = 1;
183971102307SChristoph Hellwig
184071102307SChristoph Hellwig param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
18412ac17c28SSagi Grimberg /* maximum retry count */
18422ac17c28SSagi Grimberg param.retry_count = 7;
184371102307SChristoph Hellwig param.rnr_retry_count = 7;
184471102307SChristoph Hellwig param.private_data = &priv;
184571102307SChristoph Hellwig param.private_data_len = sizeof(priv);
184671102307SChristoph Hellwig
184771102307SChristoph Hellwig priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
184871102307SChristoph Hellwig priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1849f994d9dcSJay Freyensee /*
1850f994d9dcSJay Freyensee * set the admin queue depth to the minimum size
1851f994d9dcSJay Freyensee * specified by the Fabrics standard.
1852f994d9dcSJay Freyensee */
1853f994d9dcSJay Freyensee if (priv.qid == 0) {
18547aa1f427SSagi Grimberg priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
18557aa1f427SSagi Grimberg priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1856f994d9dcSJay Freyensee } else {
1857c5af8654SJay Freyensee /*
1858c5af8654SJay Freyensee * current interpretation of the fabrics spec
1859c5af8654SJay Freyensee * is at minimum you make hrqsize sqsize+1, or a
1860c5af8654SJay Freyensee * 1's based representation of sqsize.
1861c5af8654SJay Freyensee */
186271102307SChristoph Hellwig priv.hrqsize = cpu_to_le16(queue->queue_size);
1863c5af8654SJay Freyensee priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1864f994d9dcSJay Freyensee }
186571102307SChristoph Hellwig
1866071ba4ccSJason Gunthorpe ret = rdma_connect_locked(queue->cm_id, ¶m);
186771102307SChristoph Hellwig if (ret) {
186871102307SChristoph Hellwig dev_err(ctrl->ctrl.device,
1869071ba4ccSJason Gunthorpe "rdma_connect_locked failed (%d).\n", ret);
18709817d763SRuozhu Li return ret;
187171102307SChristoph Hellwig }
187271102307SChristoph Hellwig
187371102307SChristoph Hellwig return 0;
187471102307SChristoph Hellwig }
187571102307SChristoph Hellwig
nvme_rdma_cm_handler(struct rdma_cm_id * cm_id,struct rdma_cm_event * ev)187671102307SChristoph Hellwig static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
187771102307SChristoph Hellwig struct rdma_cm_event *ev)
187871102307SChristoph Hellwig {
187971102307SChristoph Hellwig struct nvme_rdma_queue *queue = cm_id->context;
188071102307SChristoph Hellwig int cm_error = 0;
188171102307SChristoph Hellwig
188271102307SChristoph Hellwig dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
188371102307SChristoph Hellwig rdma_event_msg(ev->event), ev->event,
188471102307SChristoph Hellwig ev->status, cm_id);
188571102307SChristoph Hellwig
188671102307SChristoph Hellwig switch (ev->event) {
188771102307SChristoph Hellwig case RDMA_CM_EVENT_ADDR_RESOLVED:
188871102307SChristoph Hellwig cm_error = nvme_rdma_addr_resolved(queue);
188971102307SChristoph Hellwig break;
189071102307SChristoph Hellwig case RDMA_CM_EVENT_ROUTE_RESOLVED:
189171102307SChristoph Hellwig cm_error = nvme_rdma_route_resolved(queue);
189271102307SChristoph Hellwig break;
189371102307SChristoph Hellwig case RDMA_CM_EVENT_ESTABLISHED:
189471102307SChristoph Hellwig queue->cm_error = nvme_rdma_conn_established(queue);
189571102307SChristoph Hellwig /* complete cm_done regardless of success/failure */
189671102307SChristoph Hellwig complete(&queue->cm_done);
189771102307SChristoph Hellwig return 0;
189871102307SChristoph Hellwig case RDMA_CM_EVENT_REJECTED:
189971102307SChristoph Hellwig cm_error = nvme_rdma_conn_rejected(queue, ev);
190071102307SChristoph Hellwig break;
190171102307SChristoph Hellwig case RDMA_CM_EVENT_ROUTE_ERROR:
190271102307SChristoph Hellwig case RDMA_CM_EVENT_CONNECT_ERROR:
190371102307SChristoph Hellwig case RDMA_CM_EVENT_UNREACHABLE:
1904abf87d5eSSagi Grimberg case RDMA_CM_EVENT_ADDR_ERROR:
190571102307SChristoph Hellwig dev_dbg(queue->ctrl->ctrl.device,
190671102307SChristoph Hellwig "CM error event %d\n", ev->event);
190771102307SChristoph Hellwig cm_error = -ECONNRESET;
190871102307SChristoph Hellwig break;
190971102307SChristoph Hellwig case RDMA_CM_EVENT_DISCONNECTED:
191071102307SChristoph Hellwig case RDMA_CM_EVENT_ADDR_CHANGE:
191171102307SChristoph Hellwig case RDMA_CM_EVENT_TIMEWAIT_EXIT:
191271102307SChristoph Hellwig dev_dbg(queue->ctrl->ctrl.device,
191371102307SChristoph Hellwig "disconnect received - connection closed\n");
191471102307SChristoph Hellwig nvme_rdma_error_recovery(queue->ctrl);
191571102307SChristoph Hellwig break;
191671102307SChristoph Hellwig case RDMA_CM_EVENT_DEVICE_REMOVAL:
1917e87a911fSSteve Wise /* device removal is handled via the ib_client API */
1918e87a911fSSteve Wise break;
191971102307SChristoph Hellwig default:
192071102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
192171102307SChristoph Hellwig "Unexpected RDMA CM event (%d)\n", ev->event);
192271102307SChristoph Hellwig nvme_rdma_error_recovery(queue->ctrl);
192371102307SChristoph Hellwig break;
192471102307SChristoph Hellwig }
192571102307SChristoph Hellwig
192671102307SChristoph Hellwig if (cm_error) {
192771102307SChristoph Hellwig queue->cm_error = cm_error;
192871102307SChristoph Hellwig complete(&queue->cm_done);
192971102307SChristoph Hellwig }
193071102307SChristoph Hellwig
193171102307SChristoph Hellwig return 0;
193271102307SChristoph Hellwig }
193371102307SChristoph Hellwig
nvme_rdma_complete_timed_out(struct request * rq)19340475a8dcSSagi Grimberg static void nvme_rdma_complete_timed_out(struct request *rq)
19350475a8dcSSagi Grimberg {
19360475a8dcSSagi Grimberg struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
19370475a8dcSSagi Grimberg struct nvme_rdma_queue *queue = req->queue;
19380475a8dcSSagi Grimberg
19390475a8dcSSagi Grimberg nvme_rdma_stop_queue(queue);
194093ba75c9SChaitanya Kulkarni nvmf_complete_timed_out_request(rq);
19410475a8dcSSagi Grimberg }
19420475a8dcSSagi Grimberg
nvme_rdma_timeout(struct request * rq)19439bdb4833SJohn Garry static enum blk_eh_timer_return nvme_rdma_timeout(struct request *rq)
194471102307SChristoph Hellwig {
194571102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
19464c174e63SSagi Grimberg struct nvme_rdma_queue *queue = req->queue;
19474c174e63SSagi Grimberg struct nvme_rdma_ctrl *ctrl = queue->ctrl;
194871102307SChristoph Hellwig
19494c174e63SSagi Grimberg dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
19504c174e63SSagi Grimberg rq->tag, nvme_rdma_queue_idx(queue));
1951e62a538dSNitzan Carmi
1952*8884a56dSKeith Busch if (nvme_ctrl_state(&ctrl->ctrl) != NVME_CTRL_LIVE) {
19534c174e63SSagi Grimberg /*
19540475a8dcSSagi Grimberg * If we are resetting, connecting or deleting we should
19550475a8dcSSagi Grimberg * complete immediately because we may block controller
19560475a8dcSSagi Grimberg * teardown or setup sequence
19570475a8dcSSagi Grimberg * - ctrl disable/shutdown fabrics requests
19580475a8dcSSagi Grimberg * - connect requests
19590475a8dcSSagi Grimberg * - initialization admin requests
19600475a8dcSSagi Grimberg * - I/O requests that entered after unquiescing and
19610475a8dcSSagi Grimberg * the controller stopped responding
19620475a8dcSSagi Grimberg *
19630475a8dcSSagi Grimberg * All other requests should be cancelled by the error
19640475a8dcSSagi Grimberg * recovery work, so it's fine that we fail it here.
19654c174e63SSagi Grimberg */
19660475a8dcSSagi Grimberg nvme_rdma_complete_timed_out(rq);
1967db8c48e4SChristoph Hellwig return BLK_EH_DONE;
196871102307SChristoph Hellwig }
196971102307SChristoph Hellwig
19700475a8dcSSagi Grimberg /*
19710475a8dcSSagi Grimberg * LIVE state should trigger the normal error recovery which will
19720475a8dcSSagi Grimberg * handle completing this request.
19730475a8dcSSagi Grimberg */
19744c174e63SSagi Grimberg nvme_rdma_error_recovery(ctrl);
19754c174e63SSagi Grimberg return BLK_EH_RESET_TIMER;
19764c174e63SSagi Grimberg }
19774c174e63SSagi Grimberg
nvme_rdma_queue_rq(struct blk_mq_hw_ctx * hctx,const struct blk_mq_queue_data * bd)1978fc17b653SChristoph Hellwig static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
197971102307SChristoph Hellwig const struct blk_mq_queue_data *bd)
198071102307SChristoph Hellwig {
198171102307SChristoph Hellwig struct nvme_ns *ns = hctx->queue->queuedata;
198271102307SChristoph Hellwig struct nvme_rdma_queue *queue = hctx->driver_data;
198371102307SChristoph Hellwig struct request *rq = bd->rq;
198471102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
198571102307SChristoph Hellwig struct nvme_rdma_qe *sqe = &req->sqe;
1986f4b9e6c9SKeith Busch struct nvme_command *c = nvme_req(rq)->cmd;
198771102307SChristoph Hellwig struct ib_device *dev;
19883bc32bb1SChristoph Hellwig bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
1989fc17b653SChristoph Hellwig blk_status_t ret;
1990fc17b653SChristoph Hellwig int err;
199171102307SChristoph Hellwig
199271102307SChristoph Hellwig WARN_ON_ONCE(rq->tag < 0);
199371102307SChristoph Hellwig
1994a9715744STao Chiu if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
1995a9715744STao Chiu return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq);
1996553cd9efSChristoph Hellwig
199771102307SChristoph Hellwig dev = queue->device->dev;
199862f99b62SMax Gurtovoy
199962f99b62SMax Gurtovoy req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
200062f99b62SMax Gurtovoy sizeof(struct nvme_command),
200162f99b62SMax Gurtovoy DMA_TO_DEVICE);
200262f99b62SMax Gurtovoy err = ib_dma_mapping_error(dev, req->sqe.dma);
200362f99b62SMax Gurtovoy if (unlikely(err))
200462f99b62SMax Gurtovoy return BLK_STS_RESOURCE;
200562f99b62SMax Gurtovoy
200671102307SChristoph Hellwig ib_dma_sync_single_for_cpu(dev, sqe->dma,
200771102307SChristoph Hellwig sizeof(struct nvme_command), DMA_TO_DEVICE);
200871102307SChristoph Hellwig
2009f4b9e6c9SKeith Busch ret = nvme_setup_cmd(ns, rq);
2010fc17b653SChristoph Hellwig if (ret)
201162f99b62SMax Gurtovoy goto unmap_qe;
201271102307SChristoph Hellwig
20136887fc64SSagi Grimberg nvme_start_request(rq);
201471102307SChristoph Hellwig
20155ec5d3bdSMax Gurtovoy if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
20165ec5d3bdSMax Gurtovoy queue->pi_support &&
20175ec5d3bdSMax Gurtovoy (c->common.opcode == nvme_cmd_write ||
20185ec5d3bdSMax Gurtovoy c->common.opcode == nvme_cmd_read) &&
20195ec5d3bdSMax Gurtovoy nvme_ns_has_pi(ns))
20205ec5d3bdSMax Gurtovoy req->use_sig_mr = true;
20215ec5d3bdSMax Gurtovoy else
20225ec5d3bdSMax Gurtovoy req->use_sig_mr = false;
20235ec5d3bdSMax Gurtovoy
2024fc17b653SChristoph Hellwig err = nvme_rdma_map_data(queue, rq, c);
2025a7b7c7a1SMax Gurtovoy if (unlikely(err < 0)) {
202671102307SChristoph Hellwig dev_err(queue->ctrl->ctrl.device,
2027fc17b653SChristoph Hellwig "Failed to map data (%d)\n", err);
202871102307SChristoph Hellwig goto err;
202971102307SChristoph Hellwig }
203071102307SChristoph Hellwig
2031b4b591c8SSagi Grimberg sqe->cqe.done = nvme_rdma_send_done;
2032b4b591c8SSagi Grimberg
203371102307SChristoph Hellwig ib_dma_sync_single_for_device(dev, sqe->dma,
203471102307SChristoph Hellwig sizeof(struct nvme_command), DMA_TO_DEVICE);
203571102307SChristoph Hellwig
2036fc17b653SChristoph Hellwig err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2037f41725bbSIsrael Rukshin req->mr ? &req->reg_wr.wr : NULL);
203816686f3aSMax Gurtovoy if (unlikely(err))
203916686f3aSMax Gurtovoy goto err_unmap;
204071102307SChristoph Hellwig
2041fc17b653SChristoph Hellwig return BLK_STS_OK;
204262f99b62SMax Gurtovoy
204316686f3aSMax Gurtovoy err_unmap:
204416686f3aSMax Gurtovoy nvme_rdma_unmap_data(queue, rq);
204571102307SChristoph Hellwig err:
204662eca397SChao Leng if (err == -EIO)
204762eca397SChao Leng ret = nvme_host_path_error(rq);
204862eca397SChao Leng else if (err == -ENOMEM || err == -EAGAIN)
204962f99b62SMax Gurtovoy ret = BLK_STS_RESOURCE;
205062f99b62SMax Gurtovoy else
205162f99b62SMax Gurtovoy ret = BLK_STS_IOERR;
205216686f3aSMax Gurtovoy nvme_cleanup_cmd(rq);
205362f99b62SMax Gurtovoy unmap_qe:
205462f99b62SMax Gurtovoy ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
205562f99b62SMax Gurtovoy DMA_TO_DEVICE);
205662f99b62SMax Gurtovoy return ret;
205771102307SChristoph Hellwig }
205871102307SChristoph Hellwig
nvme_rdma_poll(struct blk_mq_hw_ctx * hctx,struct io_comp_batch * iob)20595a72e899SJens Axboe static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob)
2060ff8519f9SSagi Grimberg {
2061ff8519f9SSagi Grimberg struct nvme_rdma_queue *queue = hctx->driver_data;
2062ff8519f9SSagi Grimberg
2063ff8519f9SSagi Grimberg return ib_process_cq_direct(queue->ib_cq, -1);
2064ff8519f9SSagi Grimberg }
2065ff8519f9SSagi Grimberg
nvme_rdma_check_pi_status(struct nvme_rdma_request * req)20665ec5d3bdSMax Gurtovoy static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
20675ec5d3bdSMax Gurtovoy {
20685ec5d3bdSMax Gurtovoy struct request *rq = blk_mq_rq_from_pdu(req);
20695ec5d3bdSMax Gurtovoy struct ib_mr_status mr_status;
20705ec5d3bdSMax Gurtovoy int ret;
20715ec5d3bdSMax Gurtovoy
20725ec5d3bdSMax Gurtovoy ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
20735ec5d3bdSMax Gurtovoy if (ret) {
20745ec5d3bdSMax Gurtovoy pr_err("ib_check_mr_status failed, ret %d\n", ret);
20755ec5d3bdSMax Gurtovoy nvme_req(rq)->status = NVME_SC_INVALID_PI;
20765ec5d3bdSMax Gurtovoy return;
20775ec5d3bdSMax Gurtovoy }
20785ec5d3bdSMax Gurtovoy
20795ec5d3bdSMax Gurtovoy if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
20805ec5d3bdSMax Gurtovoy switch (mr_status.sig_err.err_type) {
20815ec5d3bdSMax Gurtovoy case IB_SIG_BAD_GUARD:
20825ec5d3bdSMax Gurtovoy nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
20835ec5d3bdSMax Gurtovoy break;
20845ec5d3bdSMax Gurtovoy case IB_SIG_BAD_REFTAG:
20855ec5d3bdSMax Gurtovoy nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
20865ec5d3bdSMax Gurtovoy break;
20875ec5d3bdSMax Gurtovoy case IB_SIG_BAD_APPTAG:
20885ec5d3bdSMax Gurtovoy nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
20895ec5d3bdSMax Gurtovoy break;
20905ec5d3bdSMax Gurtovoy }
20915ec5d3bdSMax Gurtovoy pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
20925ec5d3bdSMax Gurtovoy mr_status.sig_err.err_type, mr_status.sig_err.expected,
20935ec5d3bdSMax Gurtovoy mr_status.sig_err.actual);
20945ec5d3bdSMax Gurtovoy }
20955ec5d3bdSMax Gurtovoy }
20965ec5d3bdSMax Gurtovoy
nvme_rdma_complete_rq(struct request * rq)209771102307SChristoph Hellwig static void nvme_rdma_complete_rq(struct request *rq)
209871102307SChristoph Hellwig {
209971102307SChristoph Hellwig struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
210062f99b62SMax Gurtovoy struct nvme_rdma_queue *queue = req->queue;
210162f99b62SMax Gurtovoy struct ib_device *ibdev = queue->device->dev;
210271102307SChristoph Hellwig
21035ec5d3bdSMax Gurtovoy if (req->use_sig_mr)
21045ec5d3bdSMax Gurtovoy nvme_rdma_check_pi_status(req);
21055ec5d3bdSMax Gurtovoy
210662f99b62SMax Gurtovoy nvme_rdma_unmap_data(queue, rq);
210762f99b62SMax Gurtovoy ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
210862f99b62SMax Gurtovoy DMA_TO_DEVICE);
210977f02a7aSChristoph Hellwig nvme_complete_rq(rq);
211071102307SChristoph Hellwig }
211171102307SChristoph Hellwig
nvme_rdma_map_queues(struct blk_mq_tag_set * set)2112a4e1d0b7SBart Van Assche static void nvme_rdma_map_queues(struct blk_mq_tag_set *set)
21130b36658cSSagi Grimberg {
21142d60738cSChristoph Hellwig struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data);
21150b36658cSSagi Grimberg
2116a249d306SKeith Busch nvmf_map_queues(set, &ctrl->ctrl, ctrl->io_queues);
21170b36658cSSagi Grimberg }
21180b36658cSSagi Grimberg
2119f363b089SEric Biggers static const struct blk_mq_ops nvme_rdma_mq_ops = {
212071102307SChristoph Hellwig .queue_rq = nvme_rdma_queue_rq,
212171102307SChristoph Hellwig .complete = nvme_rdma_complete_rq,
212271102307SChristoph Hellwig .init_request = nvme_rdma_init_request,
212371102307SChristoph Hellwig .exit_request = nvme_rdma_exit_request,
212471102307SChristoph Hellwig .init_hctx = nvme_rdma_init_hctx,
212571102307SChristoph Hellwig .timeout = nvme_rdma_timeout,
21260b36658cSSagi Grimberg .map_queues = nvme_rdma_map_queues,
2127ff8519f9SSagi Grimberg .poll = nvme_rdma_poll,
212871102307SChristoph Hellwig };
212971102307SChristoph Hellwig
2130f363b089SEric Biggers static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
213171102307SChristoph Hellwig .queue_rq = nvme_rdma_queue_rq,
213271102307SChristoph Hellwig .complete = nvme_rdma_complete_rq,
2133385475eeSChristoph Hellwig .init_request = nvme_rdma_init_request,
2134385475eeSChristoph Hellwig .exit_request = nvme_rdma_exit_request,
213571102307SChristoph Hellwig .init_hctx = nvme_rdma_init_admin_hctx,
213671102307SChristoph Hellwig .timeout = nvme_rdma_timeout,
213771102307SChristoph Hellwig };
213871102307SChristoph Hellwig
nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl * ctrl,bool shutdown)213918398af2SSagi Grimberg static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
214071102307SChristoph Hellwig {
214175862c72SSagi Grimberg nvme_rdma_teardown_io_queues(ctrl, shutdown);
21429f27bd70SChristoph Hellwig nvme_quiesce_admin_queue(&ctrl->ctrl);
2143285b6e9bSChristoph Hellwig nvme_disable_ctrl(&ctrl->ctrl, shutdown);
214475862c72SSagi Grimberg nvme_rdma_teardown_admin_queue(ctrl, shutdown);
214571102307SChristoph Hellwig }
214671102307SChristoph Hellwig
nvme_rdma_delete_ctrl(struct nvme_ctrl * ctrl)2147c5017e85SChristoph Hellwig static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
21482461a8ddSSagi Grimberg {
2149e9bc2587SChristoph Hellwig nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
215071102307SChristoph Hellwig }
215171102307SChristoph Hellwig
nvme_rdma_reset_ctrl_work(struct work_struct * work)215271102307SChristoph Hellwig static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
215371102307SChristoph Hellwig {
2154d86c4d8eSChristoph Hellwig struct nvme_rdma_ctrl *ctrl =
2155d86c4d8eSChristoph Hellwig container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
215671102307SChristoph Hellwig
2157d09f2b45SSagi Grimberg nvme_stop_ctrl(&ctrl->ctrl);
215818398af2SSagi Grimberg nvme_rdma_shutdown_ctrl(ctrl, false);
215971102307SChristoph Hellwig
2160ad6a0a52SMax Gurtovoy if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2161d5bf4b7fSSagi Grimberg /* state change failure should never happen */
2162d5bf4b7fSSagi Grimberg WARN_ON_ONCE(1);
2163d5bf4b7fSSagi Grimberg return;
2164d5bf4b7fSSagi Grimberg }
2165d5bf4b7fSSagi Grimberg
2166c66e2998SSagi Grimberg if (nvme_rdma_setup_ctrl(ctrl, false))
2167370ae6e4SSagi Grimberg goto out_fail;
216871102307SChristoph Hellwig
216971102307SChristoph Hellwig return;
217071102307SChristoph Hellwig
2171370ae6e4SSagi Grimberg out_fail:
21728000d1fdSNitzan Carmi ++ctrl->ctrl.nr_reconnects;
21738000d1fdSNitzan Carmi nvme_rdma_reconnect_or_remove(ctrl);
217471102307SChristoph Hellwig }
217571102307SChristoph Hellwig
217671102307SChristoph Hellwig static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
217771102307SChristoph Hellwig .name = "rdma",
217871102307SChristoph Hellwig .module = THIS_MODULE,
21795ec5d3bdSMax Gurtovoy .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
218071102307SChristoph Hellwig .reg_read32 = nvmf_reg_read32,
218171102307SChristoph Hellwig .reg_read64 = nvmf_reg_read64,
218271102307SChristoph Hellwig .reg_write32 = nvmf_reg_write32,
218371102307SChristoph Hellwig .free_ctrl = nvme_rdma_free_ctrl,
218471102307SChristoph Hellwig .submit_async_event = nvme_rdma_submit_async_event,
2185c5017e85SChristoph Hellwig .delete_ctrl = nvme_rdma_delete_ctrl,
218671102307SChristoph Hellwig .get_address = nvmf_get_address,
2187f7f70f4aSRuozhu Li .stop_ctrl = nvme_rdma_stop_ctrl,
218871102307SChristoph Hellwig };
218971102307SChristoph Hellwig
219036e835f2SJames Smart /*
219136e835f2SJames Smart * Fails a connection request if it matches an existing controller
219236e835f2SJames Smart * (association) with the same tuple:
219336e835f2SJames Smart * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
219436e835f2SJames Smart *
219536e835f2SJames Smart * if local address is not specified in the request, it will match an
219636e835f2SJames Smart * existing controller with all the other parameters the same and no
219736e835f2SJames Smart * local port address specified as well.
219836e835f2SJames Smart *
219936e835f2SJames Smart * The ports don't need to be compared as they are intrinsically
220036e835f2SJames Smart * already matched by the port pointers supplied.
220136e835f2SJames Smart */
220236e835f2SJames Smart static bool
nvme_rdma_existing_controller(struct nvmf_ctrl_options * opts)220336e835f2SJames Smart nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
220436e835f2SJames Smart {
220536e835f2SJames Smart struct nvme_rdma_ctrl *ctrl;
220636e835f2SJames Smart bool found = false;
220736e835f2SJames Smart
220836e835f2SJames Smart mutex_lock(&nvme_rdma_ctrl_mutex);
220936e835f2SJames Smart list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2210b7c7be6fSSagi Grimberg found = nvmf_ip_options_match(&ctrl->ctrl, opts);
221136e835f2SJames Smart if (found)
221236e835f2SJames Smart break;
221336e835f2SJames Smart }
221436e835f2SJames Smart mutex_unlock(&nvme_rdma_ctrl_mutex);
221536e835f2SJames Smart
221636e835f2SJames Smart return found;
221736e835f2SJames Smart }
221836e835f2SJames Smart
nvme_rdma_create_ctrl(struct device * dev,struct nvmf_ctrl_options * opts)221971102307SChristoph Hellwig static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
222071102307SChristoph Hellwig struct nvmf_ctrl_options *opts)
222171102307SChristoph Hellwig {
222271102307SChristoph Hellwig struct nvme_rdma_ctrl *ctrl;
222371102307SChristoph Hellwig int ret;
222471102307SChristoph Hellwig bool changed;
222571102307SChristoph Hellwig
222671102307SChristoph Hellwig ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
222771102307SChristoph Hellwig if (!ctrl)
222871102307SChristoph Hellwig return ERR_PTR(-ENOMEM);
222971102307SChristoph Hellwig ctrl->ctrl.opts = opts;
223071102307SChristoph Hellwig INIT_LIST_HEAD(&ctrl->list);
223171102307SChristoph Hellwig
2232bb59b8e5SSagi Grimberg if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2233bb59b8e5SSagi Grimberg opts->trsvcid =
2234bb59b8e5SSagi Grimberg kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2235bb59b8e5SSagi Grimberg if (!opts->trsvcid) {
2236bb59b8e5SSagi Grimberg ret = -ENOMEM;
2237bb59b8e5SSagi Grimberg goto out_free_ctrl;
2238bb59b8e5SSagi Grimberg }
2239bb59b8e5SSagi Grimberg opts->mask |= NVMF_OPT_TRSVCID;
2240bb59b8e5SSagi Grimberg }
22410928f9b4SSagi Grimberg
22420928f9b4SSagi Grimberg ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2243bb59b8e5SSagi Grimberg opts->traddr, opts->trsvcid, &ctrl->addr);
224471102307SChristoph Hellwig if (ret) {
2245bb59b8e5SSagi Grimberg pr_err("malformed address passed: %s:%s\n",
2246bb59b8e5SSagi Grimberg opts->traddr, opts->trsvcid);
224771102307SChristoph Hellwig goto out_free_ctrl;
224871102307SChristoph Hellwig }
224971102307SChristoph Hellwig
22508f4e8dacSMax Gurtovoy if (opts->mask & NVMF_OPT_HOST_TRADDR) {
22510928f9b4SSagi Grimberg ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
22520928f9b4SSagi Grimberg opts->host_traddr, NULL, &ctrl->src_addr);
22538f4e8dacSMax Gurtovoy if (ret) {
22540928f9b4SSagi Grimberg pr_err("malformed src address passed: %s\n",
22558f4e8dacSMax Gurtovoy opts->host_traddr);
22568f4e8dacSMax Gurtovoy goto out_free_ctrl;
22578f4e8dacSMax Gurtovoy }
22588f4e8dacSMax Gurtovoy }
22598f4e8dacSMax Gurtovoy
226036e835f2SJames Smart if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
226136e835f2SJames Smart ret = -EALREADY;
226236e835f2SJames Smart goto out_free_ctrl;
226336e835f2SJames Smart }
226436e835f2SJames Smart
226571102307SChristoph Hellwig INIT_DELAYED_WORK(&ctrl->reconnect_work,
226671102307SChristoph Hellwig nvme_rdma_reconnect_ctrl_work);
226771102307SChristoph Hellwig INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2268d86c4d8eSChristoph Hellwig INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
226971102307SChristoph Hellwig
2270ff8519f9SSagi Grimberg ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2271ff8519f9SSagi Grimberg opts->nr_poll_queues + 1;
2272c5af8654SJay Freyensee ctrl->ctrl.sqsize = opts->queue_size - 1;
227371102307SChristoph Hellwig ctrl->ctrl.kato = opts->kato;
227471102307SChristoph Hellwig
227571102307SChristoph Hellwig ret = -ENOMEM;
2276d858e5f0SSagi Grimberg ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
227771102307SChristoph Hellwig GFP_KERNEL);
227871102307SChristoph Hellwig if (!ctrl->queues)
22793d064101SSagi Grimberg goto out_free_ctrl;
22803d064101SSagi Grimberg
22813d064101SSagi Grimberg ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
22823d064101SSagi Grimberg 0 /* no quirks, we're perfect! */);
22833d064101SSagi Grimberg if (ret)
22843d064101SSagi Grimberg goto out_kfree_queues;
228571102307SChristoph Hellwig
2286b754a32cSMax Gurtovoy changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2287b754a32cSMax Gurtovoy WARN_ON_ONCE(!changed);
2288b754a32cSMax Gurtovoy
2289c66e2998SSagi Grimberg ret = nvme_rdma_setup_ctrl(ctrl, true);
229071102307SChristoph Hellwig if (ret)
22913d064101SSagi Grimberg goto out_uninit_ctrl;
229271102307SChristoph Hellwig
22930928f9b4SSagi Grimberg dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
2294e5ea42faSHannes Reinecke nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
229571102307SChristoph Hellwig
229671102307SChristoph Hellwig mutex_lock(&nvme_rdma_ctrl_mutex);
229771102307SChristoph Hellwig list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
229871102307SChristoph Hellwig mutex_unlock(&nvme_rdma_ctrl_mutex);
229971102307SChristoph Hellwig
230071102307SChristoph Hellwig return &ctrl->ctrl;
230171102307SChristoph Hellwig
230271102307SChristoph Hellwig out_uninit_ctrl:
230371102307SChristoph Hellwig nvme_uninit_ctrl(&ctrl->ctrl);
230471102307SChristoph Hellwig nvme_put_ctrl(&ctrl->ctrl);
230571102307SChristoph Hellwig if (ret > 0)
230671102307SChristoph Hellwig ret = -EIO;
230771102307SChristoph Hellwig return ERR_PTR(ret);
23083d064101SSagi Grimberg out_kfree_queues:
23093d064101SSagi Grimberg kfree(ctrl->queues);
231071102307SChristoph Hellwig out_free_ctrl:
231171102307SChristoph Hellwig kfree(ctrl);
231271102307SChristoph Hellwig return ERR_PTR(ret);
231371102307SChristoph Hellwig }
231471102307SChristoph Hellwig
231571102307SChristoph Hellwig static struct nvmf_transport_ops nvme_rdma_transport = {
231671102307SChristoph Hellwig .name = "rdma",
23170de5cd36SRoy Shterman .module = THIS_MODULE,
231871102307SChristoph Hellwig .required_opts = NVMF_OPT_TRADDR,
23198f4e8dacSMax Gurtovoy .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2320b65bb777SSagi Grimberg NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2321e63440d6SIsrael Rukshin NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2322e63440d6SIsrael Rukshin NVMF_OPT_TOS,
232371102307SChristoph Hellwig .create_ctrl = nvme_rdma_create_ctrl,
232471102307SChristoph Hellwig };
232571102307SChristoph Hellwig
nvme_rdma_remove_one(struct ib_device * ib_device,void * client_data)2326e87a911fSSteve Wise static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2327e87a911fSSteve Wise {
2328e87a911fSSteve Wise struct nvme_rdma_ctrl *ctrl;
23299bad0404SMax Gurtovoy struct nvme_rdma_device *ndev;
23309bad0404SMax Gurtovoy bool found = false;
23319bad0404SMax Gurtovoy
23329bad0404SMax Gurtovoy mutex_lock(&device_list_mutex);
23339bad0404SMax Gurtovoy list_for_each_entry(ndev, &device_list, entry) {
23349bad0404SMax Gurtovoy if (ndev->dev == ib_device) {
23359bad0404SMax Gurtovoy found = true;
23369bad0404SMax Gurtovoy break;
23379bad0404SMax Gurtovoy }
23389bad0404SMax Gurtovoy }
23399bad0404SMax Gurtovoy mutex_unlock(&device_list_mutex);
23409bad0404SMax Gurtovoy
23419bad0404SMax Gurtovoy if (!found)
23429bad0404SMax Gurtovoy return;
2343e87a911fSSteve Wise
2344e87a911fSSteve Wise /* Delete all controllers using this device */
2345e87a911fSSteve Wise mutex_lock(&nvme_rdma_ctrl_mutex);
2346e87a911fSSteve Wise list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2347e87a911fSSteve Wise if (ctrl->device->dev != ib_device)
2348e87a911fSSteve Wise continue;
2349c5017e85SChristoph Hellwig nvme_delete_ctrl(&ctrl->ctrl);
2350e87a911fSSteve Wise }
2351e87a911fSSteve Wise mutex_unlock(&nvme_rdma_ctrl_mutex);
2352e87a911fSSteve Wise
2353b227c59bSRoy Shterman flush_workqueue(nvme_delete_wq);
2354e87a911fSSteve Wise }
2355e87a911fSSteve Wise
2356e87a911fSSteve Wise static struct ib_client nvme_rdma_ib_client = {
2357e87a911fSSteve Wise .name = "nvme_rdma",
2358e87a911fSSteve Wise .remove = nvme_rdma_remove_one
2359e87a911fSSteve Wise };
2360e87a911fSSteve Wise
nvme_rdma_init_module(void)236171102307SChristoph Hellwig static int __init nvme_rdma_init_module(void)
236271102307SChristoph Hellwig {
2363e87a911fSSteve Wise int ret;
2364e87a911fSSteve Wise
2365e87a911fSSteve Wise ret = ib_register_client(&nvme_rdma_ib_client);
2366a56c79cfSSagi Grimberg if (ret)
23679a6327d2SSagi Grimberg return ret;
2368a56c79cfSSagi Grimberg
2369a56c79cfSSagi Grimberg ret = nvmf_register_transport(&nvme_rdma_transport);
2370a56c79cfSSagi Grimberg if (ret)
2371a56c79cfSSagi Grimberg goto err_unreg_client;
2372a56c79cfSSagi Grimberg
2373a56c79cfSSagi Grimberg return 0;
2374a56c79cfSSagi Grimberg
2375a56c79cfSSagi Grimberg err_unreg_client:
2376a56c79cfSSagi Grimberg ib_unregister_client(&nvme_rdma_ib_client);
2377e87a911fSSteve Wise return ret;
2378e87a911fSSteve Wise }
2379e87a911fSSteve Wise
nvme_rdma_cleanup_module(void)238071102307SChristoph Hellwig static void __exit nvme_rdma_cleanup_module(void)
238171102307SChristoph Hellwig {
23829ad9e8d6SMax Gurtovoy struct nvme_rdma_ctrl *ctrl;
23839ad9e8d6SMax Gurtovoy
238471102307SChristoph Hellwig nvmf_unregister_transport(&nvme_rdma_transport);
2385e87a911fSSteve Wise ib_unregister_client(&nvme_rdma_ib_client);
23869ad9e8d6SMax Gurtovoy
23879ad9e8d6SMax Gurtovoy mutex_lock(&nvme_rdma_ctrl_mutex);
23889ad9e8d6SMax Gurtovoy list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
23899ad9e8d6SMax Gurtovoy nvme_delete_ctrl(&ctrl->ctrl);
23909ad9e8d6SMax Gurtovoy mutex_unlock(&nvme_rdma_ctrl_mutex);
23919ad9e8d6SMax Gurtovoy flush_workqueue(nvme_delete_wq);
239271102307SChristoph Hellwig }
239371102307SChristoph Hellwig
239471102307SChristoph Hellwig module_init(nvme_rdma_init_module);
239571102307SChristoph Hellwig module_exit(nvme_rdma_cleanup_module);
239671102307SChristoph Hellwig
239771102307SChristoph Hellwig MODULE_LICENSE("GPL v2");
2398