1*1ccea77eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
26948300cSKalle Valo /* ZD1211 USB-WLAN driver for Linux
36948300cSKalle Valo *
46948300cSKalle Valo * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
56948300cSKalle Valo * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
66948300cSKalle Valo */
76948300cSKalle Valo
86948300cSKalle Valo #include <linux/kernel.h>
96948300cSKalle Valo
106948300cSKalle Valo #include "zd_rf.h"
116948300cSKalle Valo #include "zd_usb.h"
126948300cSKalle Valo #include "zd_chip.h"
136948300cSKalle Valo
146948300cSKalle Valo static const u32 chan_rv[][2] = {
156948300cSKalle Valo RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
166948300cSKalle Valo RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
176948300cSKalle Valo RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
186948300cSKalle Valo RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
196948300cSKalle Valo RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
206948300cSKalle Valo RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
216948300cSKalle Valo RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
226948300cSKalle Valo RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
236948300cSKalle Valo RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
246948300cSKalle Valo RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
256948300cSKalle Valo RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
266948300cSKalle Valo RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
276948300cSKalle Valo RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
286948300cSKalle Valo RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
296948300cSKalle Valo };
306948300cSKalle Valo
316948300cSKalle Valo static const u32 std_rv[] = {
326948300cSKalle Valo 0x4ff821,
336948300cSKalle Valo 0xc5fbfc,
346948300cSKalle Valo 0x21ebfe,
356948300cSKalle Valo 0xafd401, /* freq shift 0xaad401 */
366948300cSKalle Valo 0x6cf56a,
376948300cSKalle Valo 0xe04073,
386948300cSKalle Valo 0x193d76,
396948300cSKalle Valo 0x9dd844,
406948300cSKalle Valo 0x500007,
416948300cSKalle Valo 0xd8c010,
426948300cSKalle Valo };
436948300cSKalle Valo
446948300cSKalle Valo static const u32 rv_init1[] = {
456948300cSKalle Valo 0x3c9000,
466948300cSKalle Valo 0xbfffff,
476948300cSKalle Valo 0x700000,
486948300cSKalle Valo 0xf15d58,
496948300cSKalle Valo };
506948300cSKalle Valo
516948300cSKalle Valo static const u32 rv_init2[] = {
526948300cSKalle Valo 0xf15d59,
536948300cSKalle Valo 0xf15d5c,
546948300cSKalle Valo 0xf15d58,
556948300cSKalle Valo };
566948300cSKalle Valo
576948300cSKalle Valo static const struct zd_ioreq16 ioreqs_sw[] = {
586948300cSKalle Valo { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
596948300cSKalle Valo { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
606948300cSKalle Valo };
616948300cSKalle Valo
zd1211b_al7230b_finalize(struct zd_chip * chip)626948300cSKalle Valo static int zd1211b_al7230b_finalize(struct zd_chip *chip)
636948300cSKalle Valo {
646948300cSKalle Valo int r;
656948300cSKalle Valo static const struct zd_ioreq16 ioreqs[] = {
666948300cSKalle Valo { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
676948300cSKalle Valo { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
686948300cSKalle Valo { ZD_CR203, 0x04 },
696948300cSKalle Valo { },
706948300cSKalle Valo { ZD_CR240, 0x80 },
716948300cSKalle Valo };
726948300cSKalle Valo
736948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
746948300cSKalle Valo if (r)
756948300cSKalle Valo return r;
766948300cSKalle Valo
776948300cSKalle Valo if (chip->new_phy_layout) {
786948300cSKalle Valo /* antenna selection? */
796948300cSKalle Valo r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9);
806948300cSKalle Valo if (r)
816948300cSKalle Valo return r;
826948300cSKalle Valo }
836948300cSKalle Valo
846948300cSKalle Valo return zd_iowrite16_locked(chip, 0x04, ZD_CR203);
856948300cSKalle Valo }
866948300cSKalle Valo
zd1211_al7230b_init_hw(struct zd_rf * rf)876948300cSKalle Valo static int zd1211_al7230b_init_hw(struct zd_rf *rf)
886948300cSKalle Valo {
896948300cSKalle Valo int r;
906948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
916948300cSKalle Valo
926948300cSKalle Valo /* All of these writes are identical to AL2230 unless otherwise
936948300cSKalle Valo * specified */
946948300cSKalle Valo static const struct zd_ioreq16 ioreqs_1[] = {
956948300cSKalle Valo /* This one is 7230-specific, and happens before the rest */
966948300cSKalle Valo { ZD_CR240, 0x57 },
976948300cSKalle Valo { },
986948300cSKalle Valo
996948300cSKalle Valo { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
1006948300cSKalle Valo { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
1016948300cSKalle Valo { ZD_CR44, 0x33 },
1026948300cSKalle Valo /* This value is different for 7230 (was: 0x2a) */
1036948300cSKalle Valo { ZD_CR106, 0x22 },
1046948300cSKalle Valo { ZD_CR107, 0x1a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 },
1056948300cSKalle Valo { ZD_CR111, 0x2b }, { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a },
1066948300cSKalle Valo /* This happened further down in AL2230,
1076948300cSKalle Valo * and the value changed (was: 0xe0) */
1086948300cSKalle Valo { ZD_CR122, 0xfc },
1096948300cSKalle Valo { ZD_CR10, 0x89 },
1106948300cSKalle Valo /* for newest (3rd cut) AL2300 */
1116948300cSKalle Valo { ZD_CR17, 0x28 },
1126948300cSKalle Valo { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
1136948300cSKalle Valo /* for newest (3rd cut) AL2300 */
1146948300cSKalle Valo { ZD_CR35, 0x3e },
1156948300cSKalle Valo { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
1166948300cSKalle Valo /* for newest (3rd cut) AL2300 */
1176948300cSKalle Valo { ZD_CR46, 0x96 },
1186948300cSKalle Valo { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
1196948300cSKalle Valo { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
1206948300cSKalle Valo { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 },
1216948300cSKalle Valo /* This value is different for 7230 (was: 0x00) */
1226948300cSKalle Valo { ZD_CR100, 0x02 },
1236948300cSKalle Valo { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
1246948300cSKalle Valo /* This value is different for 7230 (was: 0x24) */
1256948300cSKalle Valo { ZD_CR106, 0x22 },
1266948300cSKalle Valo /* This value is different for 7230 (was: 0x2a) */
1276948300cSKalle Valo { ZD_CR107, 0x3f },
1286948300cSKalle Valo { ZD_CR109, 0x09 },
1296948300cSKalle Valo /* This value is different for 7230 (was: 0x13) */
1306948300cSKalle Valo { ZD_CR110, 0x1f },
1316948300cSKalle Valo { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
1326948300cSKalle Valo { ZD_CR114, 0x27 },
1336948300cSKalle Valo /* for newest (3rd cut) AL2300 */
1346948300cSKalle Valo { ZD_CR115, 0x24 },
1356948300cSKalle Valo /* This value is different for 7230 (was: 0x24) */
1366948300cSKalle Valo { ZD_CR116, 0x3f },
1376948300cSKalle Valo /* This value is different for 7230 (was: 0xf4) */
1386948300cSKalle Valo { ZD_CR117, 0xfa },
1396948300cSKalle Valo { ZD_CR118, 0xfc }, { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f },
1406948300cSKalle Valo { ZD_CR121, 0x77 }, { ZD_CR137, 0x88 },
1416948300cSKalle Valo /* This one is 7230-specific */
1426948300cSKalle Valo { ZD_CR138, 0xa8 },
1436948300cSKalle Valo /* This value is different for 7230 (was: 0xff) */
1446948300cSKalle Valo { ZD_CR252, 0x34 },
1456948300cSKalle Valo /* This value is different for 7230 (was: 0xff) */
1466948300cSKalle Valo { ZD_CR253, 0x34 },
1476948300cSKalle Valo
1486948300cSKalle Valo /* PLL_OFF */
1496948300cSKalle Valo { ZD_CR251, 0x2f },
1506948300cSKalle Valo };
1516948300cSKalle Valo
1526948300cSKalle Valo static const struct zd_ioreq16 ioreqs_2[] = {
1536948300cSKalle Valo { ZD_CR251, 0x3f }, /* PLL_ON */
1546948300cSKalle Valo { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
1556948300cSKalle Valo { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
1566948300cSKalle Valo };
1576948300cSKalle Valo
1586948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
1596948300cSKalle Valo if (r)
1606948300cSKalle Valo return r;
1616948300cSKalle Valo
1626948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
1636948300cSKalle Valo if (r)
1646948300cSKalle Valo return r;
1656948300cSKalle Valo
1666948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
1676948300cSKalle Valo if (r)
1686948300cSKalle Valo return r;
1696948300cSKalle Valo
1706948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
1716948300cSKalle Valo if (r)
1726948300cSKalle Valo return r;
1736948300cSKalle Valo
1746948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
1756948300cSKalle Valo if (r)
1766948300cSKalle Valo return r;
1776948300cSKalle Valo
1786948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
1796948300cSKalle Valo if (r)
1806948300cSKalle Valo return r;
1816948300cSKalle Valo
1826948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x06, ZD_CR203);
1836948300cSKalle Valo if (r)
1846948300cSKalle Valo return r;
1856948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x80, ZD_CR240);
1866948300cSKalle Valo if (r)
1876948300cSKalle Valo return r;
1886948300cSKalle Valo
1896948300cSKalle Valo return 0;
1906948300cSKalle Valo }
1916948300cSKalle Valo
zd1211b_al7230b_init_hw(struct zd_rf * rf)1926948300cSKalle Valo static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
1936948300cSKalle Valo {
1946948300cSKalle Valo int r;
1956948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
1966948300cSKalle Valo
1976948300cSKalle Valo static const struct zd_ioreq16 ioreqs_1[] = {
1986948300cSKalle Valo { ZD_CR240, 0x57 }, { ZD_CR9, 0x9 },
1996948300cSKalle Valo { },
2006948300cSKalle Valo { ZD_CR10, 0x8b }, { ZD_CR15, 0x20 },
2016948300cSKalle Valo { ZD_CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
2026948300cSKalle Valo { ZD_CR20, 0x10 }, /* 4N25->Stone Request */
2036948300cSKalle Valo { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
2046948300cSKalle Valo { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
2056948300cSKalle Valo { ZD_CR33, 0x28 }, /* 5613 */
2066948300cSKalle Valo { ZD_CR34, 0x30 },
2076948300cSKalle Valo { ZD_CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
2086948300cSKalle Valo { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
2096948300cSKalle Valo { ZD_CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
2106948300cSKalle Valo { ZD_CR47, 0x1e },
2116948300cSKalle Valo
2126948300cSKalle Valo /* ZD1215 5610 */
2136948300cSKalle Valo { ZD_CR48, 0x00 }, { ZD_CR49, 0x00 }, { ZD_CR51, 0x01 },
2146948300cSKalle Valo { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
2156948300cSKalle Valo { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
2166948300cSKalle Valo { ZD_CR69, 0x28 },
2176948300cSKalle Valo
2186948300cSKalle Valo { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
2196948300cSKalle Valo { ZD_CR87, 0x0A }, { ZD_CR89, 0x04 },
2206948300cSKalle Valo { ZD_CR90, 0x58 }, /* 5112 */
2216948300cSKalle Valo { ZD_CR91, 0x00 }, /* 5613 */
2226948300cSKalle Valo { ZD_CR92, 0x0a },
2236948300cSKalle Valo { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
2246948300cSKalle Valo { ZD_CR99, 0x00 }, { ZD_CR100, 0x02 }, { ZD_CR101, 0x13 },
2256948300cSKalle Valo { ZD_CR102, 0x27 },
2266948300cSKalle Valo { ZD_CR106, 0x20 }, /* change to 0x24 for AL7230B */
2276948300cSKalle Valo { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
2286948300cSKalle Valo { ZD_CR112, 0x1f },
2296948300cSKalle Valo };
2306948300cSKalle Valo
2316948300cSKalle Valo static const struct zd_ioreq16 ioreqs_new_phy[] = {
2326948300cSKalle Valo { ZD_CR107, 0x28 },
2336948300cSKalle Valo { ZD_CR110, 0x1f }, /* 5127, 0x13->0x1f */
2346948300cSKalle Valo { ZD_CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
2356948300cSKalle Valo { ZD_CR116, 0x2a }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x12 },
2366948300cSKalle Valo { ZD_CR121, 0x6c }, /* 5613 */
2376948300cSKalle Valo };
2386948300cSKalle Valo
2396948300cSKalle Valo static const struct zd_ioreq16 ioreqs_old_phy[] = {
2406948300cSKalle Valo { ZD_CR107, 0x24 },
2416948300cSKalle Valo { ZD_CR110, 0x13 }, /* 5127, 0x13->0x1f */
2426948300cSKalle Valo { ZD_CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
2436948300cSKalle Valo { ZD_CR116, 0x24 }, { ZD_CR118, 0xfc }, { ZD_CR119, 0x11 },
2446948300cSKalle Valo { ZD_CR121, 0x6a }, /* 5613 */
2456948300cSKalle Valo };
2466948300cSKalle Valo
2476948300cSKalle Valo static const struct zd_ioreq16 ioreqs_2[] = {
2486948300cSKalle Valo { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x24 },
2496948300cSKalle Valo { ZD_CR117, 0xfa }, { ZD_CR120, 0x4f },
2506948300cSKalle Valo { ZD_CR122, 0xfc }, /* E0->FCh at 4901 */
2516948300cSKalle Valo { ZD_CR123, 0x57 }, /* 5613 */
2526948300cSKalle Valo { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
2536948300cSKalle Valo { ZD_CR126, 0x6c }, /* 5613 */
2546948300cSKalle Valo { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
2556948300cSKalle Valo { ZD_CR130, 0x10 },
2566948300cSKalle Valo { ZD_CR131, 0x00 }, /* 5112 */
2576948300cSKalle Valo { ZD_CR137, 0x50 }, /* 5613 */
2586948300cSKalle Valo { ZD_CR138, 0xa8 }, /* 5112 */
2596948300cSKalle Valo { ZD_CR144, 0xac }, /* 5613 */
2606948300cSKalle Valo { ZD_CR148, 0x40 }, /* 5112 */
2616948300cSKalle Valo { ZD_CR149, 0x40 }, /* 4O07, 50->40 */
2626948300cSKalle Valo { ZD_CR150, 0x1a }, /* 5112, 0C->1A */
2636948300cSKalle Valo { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
2646948300cSKalle Valo { ZD_CR251, 0x2f }, /* PLL_OFF */
2656948300cSKalle Valo };
2666948300cSKalle Valo
2676948300cSKalle Valo static const struct zd_ioreq16 ioreqs_3[] = {
2686948300cSKalle Valo { ZD_CR251, 0x7f }, /* PLL_ON */
2696948300cSKalle Valo { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
2706948300cSKalle Valo { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
2716948300cSKalle Valo };
2726948300cSKalle Valo
2736948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
2746948300cSKalle Valo if (r)
2756948300cSKalle Valo return r;
2766948300cSKalle Valo
2776948300cSKalle Valo if (chip->new_phy_layout)
2786948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
2796948300cSKalle Valo ARRAY_SIZE(ioreqs_new_phy));
2806948300cSKalle Valo else
2816948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
2826948300cSKalle Valo ARRAY_SIZE(ioreqs_old_phy));
2836948300cSKalle Valo if (r)
2846948300cSKalle Valo return r;
2856948300cSKalle Valo
2866948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
2876948300cSKalle Valo if (r)
2886948300cSKalle Valo return r;
2896948300cSKalle Valo
2906948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
2916948300cSKalle Valo if (r)
2926948300cSKalle Valo return r;
2936948300cSKalle Valo
2946948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
2956948300cSKalle Valo if (r)
2966948300cSKalle Valo return r;
2976948300cSKalle Valo
2986948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
2996948300cSKalle Valo if (r)
3006948300cSKalle Valo return r;
3016948300cSKalle Valo
3026948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
3036948300cSKalle Valo if (r)
3046948300cSKalle Valo return r;
3056948300cSKalle Valo
3066948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
3076948300cSKalle Valo if (r)
3086948300cSKalle Valo return r;
3096948300cSKalle Valo
3106948300cSKalle Valo return zd1211b_al7230b_finalize(chip);
3116948300cSKalle Valo }
3126948300cSKalle Valo
zd1211_al7230b_set_channel(struct zd_rf * rf,u8 channel)3136948300cSKalle Valo static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
3146948300cSKalle Valo {
3156948300cSKalle Valo int r;
3166948300cSKalle Valo const u32 *rv = chan_rv[channel-1];
3176948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
3186948300cSKalle Valo
3196948300cSKalle Valo static const struct zd_ioreq16 ioreqs[] = {
3206948300cSKalle Valo /* PLL_ON */
3216948300cSKalle Valo { ZD_CR251, 0x3f },
3226948300cSKalle Valo { ZD_CR203, 0x06 }, { ZD_CR240, 0x08 },
3236948300cSKalle Valo };
3246948300cSKalle Valo
3256948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
3266948300cSKalle Valo if (r)
3276948300cSKalle Valo return r;
3286948300cSKalle Valo
3296948300cSKalle Valo /* PLL_OFF */
3306948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
3316948300cSKalle Valo if (r)
3326948300cSKalle Valo return r;
3336948300cSKalle Valo
3346948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
3356948300cSKalle Valo if (r)
3366948300cSKalle Valo return r;
3376948300cSKalle Valo
3386948300cSKalle Valo r = zd_rfwrite_cr_locked(chip, 0x3c9000);
3396948300cSKalle Valo if (r)
3406948300cSKalle Valo return r;
3416948300cSKalle Valo r = zd_rfwrite_cr_locked(chip, 0xf15d58);
3426948300cSKalle Valo if (r)
3436948300cSKalle Valo return r;
3446948300cSKalle Valo
3456948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
3466948300cSKalle Valo if (r)
3476948300cSKalle Valo return r;
3486948300cSKalle Valo
3496948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, rv, 2);
3506948300cSKalle Valo if (r)
3516948300cSKalle Valo return r;
3526948300cSKalle Valo
3536948300cSKalle Valo r = zd_rfwrite_cr_locked(chip, 0x3c9000);
3546948300cSKalle Valo if (r)
3556948300cSKalle Valo return r;
3566948300cSKalle Valo
3576948300cSKalle Valo return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
3586948300cSKalle Valo }
3596948300cSKalle Valo
zd1211b_al7230b_set_channel(struct zd_rf * rf,u8 channel)3606948300cSKalle Valo static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
3616948300cSKalle Valo {
3626948300cSKalle Valo int r;
3636948300cSKalle Valo const u32 *rv = chan_rv[channel-1];
3646948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
3656948300cSKalle Valo
3666948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
3676948300cSKalle Valo if (r)
3686948300cSKalle Valo return r;
3696948300cSKalle Valo r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9);
3706948300cSKalle Valo if (r)
3716948300cSKalle Valo return r;
3726948300cSKalle Valo
3736948300cSKalle Valo /* PLL_OFF */
3746948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
3756948300cSKalle Valo if (r)
3766948300cSKalle Valo return r;
3776948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
3786948300cSKalle Valo if (r)
3796948300cSKalle Valo return r;
3806948300cSKalle Valo
3816948300cSKalle Valo r = zd_rfwrite_cr_locked(chip, 0x3c9000);
3826948300cSKalle Valo if (r)
3836948300cSKalle Valo return r;
3846948300cSKalle Valo r = zd_rfwrite_cr_locked(chip, 0xf15d58);
3856948300cSKalle Valo if (r)
3866948300cSKalle Valo return r;
3876948300cSKalle Valo
3886948300cSKalle Valo r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
3896948300cSKalle Valo if (r)
3906948300cSKalle Valo return r;
3916948300cSKalle Valo
3926948300cSKalle Valo r = zd_rfwritev_cr_locked(chip, rv, 2);
3936948300cSKalle Valo if (r)
3946948300cSKalle Valo return r;
3956948300cSKalle Valo
3966948300cSKalle Valo r = zd_rfwrite_cr_locked(chip, 0x3c9000);
3976948300cSKalle Valo if (r)
3986948300cSKalle Valo return r;
3996948300cSKalle Valo
4006948300cSKalle Valo r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251);
4016948300cSKalle Valo if (r)
4026948300cSKalle Valo return r;
4036948300cSKalle Valo
4046948300cSKalle Valo return zd1211b_al7230b_finalize(chip);
4056948300cSKalle Valo }
4066948300cSKalle Valo
zd1211_al7230b_switch_radio_on(struct zd_rf * rf)4076948300cSKalle Valo static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
4086948300cSKalle Valo {
4096948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
4106948300cSKalle Valo static const struct zd_ioreq16 ioreqs[] = {
4116948300cSKalle Valo { ZD_CR11, 0x00 },
4126948300cSKalle Valo { ZD_CR251, 0x3f },
4136948300cSKalle Valo };
4146948300cSKalle Valo
4156948300cSKalle Valo return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
4166948300cSKalle Valo }
4176948300cSKalle Valo
zd1211b_al7230b_switch_radio_on(struct zd_rf * rf)4186948300cSKalle Valo static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
4196948300cSKalle Valo {
4206948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
4216948300cSKalle Valo static const struct zd_ioreq16 ioreqs[] = {
4226948300cSKalle Valo { ZD_CR11, 0x00 },
4236948300cSKalle Valo { ZD_CR251, 0x7f },
4246948300cSKalle Valo };
4256948300cSKalle Valo
4266948300cSKalle Valo return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
4276948300cSKalle Valo }
4286948300cSKalle Valo
al7230b_switch_radio_off(struct zd_rf * rf)4296948300cSKalle Valo static int al7230b_switch_radio_off(struct zd_rf *rf)
4306948300cSKalle Valo {
4316948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
4326948300cSKalle Valo static const struct zd_ioreq16 ioreqs[] = {
4336948300cSKalle Valo { ZD_CR11, 0x04 },
4346948300cSKalle Valo { ZD_CR251, 0x2f },
4356948300cSKalle Valo };
4366948300cSKalle Valo
4376948300cSKalle Valo return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
4386948300cSKalle Valo }
4396948300cSKalle Valo
4406948300cSKalle Valo /* ZD1211B+AL7230B 6m band edge patching differs slightly from other
4416948300cSKalle Valo * configurations */
zd1211b_al7230b_patch_6m(struct zd_rf * rf,u8 channel)4426948300cSKalle Valo static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
4436948300cSKalle Valo {
4446948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
4456948300cSKalle Valo struct zd_ioreq16 ioreqs[] = {
4466948300cSKalle Valo { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 },
4476948300cSKalle Valo };
4486948300cSKalle Valo
4496948300cSKalle Valo /* FIXME: Channel 11 is not the edge for all regulatory domains. */
4506948300cSKalle Valo if (channel == 1) {
4516948300cSKalle Valo ioreqs[0].value = 0x0e;
4526948300cSKalle Valo ioreqs[1].value = 0x10;
4536948300cSKalle Valo } else if (channel == 11) {
4546948300cSKalle Valo ioreqs[0].value = 0x10;
4556948300cSKalle Valo ioreqs[1].value = 0x10;
4566948300cSKalle Valo }
4576948300cSKalle Valo
4586948300cSKalle Valo dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
4596948300cSKalle Valo return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
4606948300cSKalle Valo }
4616948300cSKalle Valo
zd_rf_init_al7230b(struct zd_rf * rf)4626948300cSKalle Valo int zd_rf_init_al7230b(struct zd_rf *rf)
4636948300cSKalle Valo {
4646948300cSKalle Valo struct zd_chip *chip = zd_rf_to_chip(rf);
4656948300cSKalle Valo
4666948300cSKalle Valo if (zd_chip_is_zd1211b(chip)) {
4676948300cSKalle Valo rf->init_hw = zd1211b_al7230b_init_hw;
4686948300cSKalle Valo rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
4696948300cSKalle Valo rf->set_channel = zd1211b_al7230b_set_channel;
4706948300cSKalle Valo rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
4716948300cSKalle Valo } else {
4726948300cSKalle Valo rf->init_hw = zd1211_al7230b_init_hw;
4736948300cSKalle Valo rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
4746948300cSKalle Valo rf->set_channel = zd1211_al7230b_set_channel;
4756948300cSKalle Valo rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
4766948300cSKalle Valo rf->patch_cck_gain = 1;
4776948300cSKalle Valo }
4786948300cSKalle Valo
4796948300cSKalle Valo rf->switch_radio_off = al7230b_switch_radio_off;
4806948300cSKalle Valo
4816948300cSKalle Valo return 0;
4826948300cSKalle Valo }
483