xref: /openbmc/linux/drivers/net/wireless/ti/wl18xx/conf.h (revision d61c6b5550c759728e702e68c8423a23a6991fc3)
146a1d512SLuciano Coelho /*
246a1d512SLuciano Coelho  * This file is part of wl18xx
346a1d512SLuciano Coelho  *
446a1d512SLuciano Coelho  * Copyright (C) 2011 Texas Instruments Inc.
546a1d512SLuciano Coelho  *
646a1d512SLuciano Coelho  * This program is free software; you can redistribute it and/or
746a1d512SLuciano Coelho  * modify it under the terms of the GNU General Public License
846a1d512SLuciano Coelho  * version 2 as published by the Free Software Foundation.
946a1d512SLuciano Coelho  *
1046a1d512SLuciano Coelho  * This program is distributed in the hope that it will be useful, but
1146a1d512SLuciano Coelho  * WITHOUT ANY WARRANTY; without even the implied warranty of
1246a1d512SLuciano Coelho  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
1346a1d512SLuciano Coelho  * General Public License for more details.
1446a1d512SLuciano Coelho  *
1546a1d512SLuciano Coelho  * You should have received a copy of the GNU General Public License
1646a1d512SLuciano Coelho  * along with this program; if not, write to the Free Software
1746a1d512SLuciano Coelho  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
1846a1d512SLuciano Coelho  * 02110-1301 USA
1946a1d512SLuciano Coelho  *
2046a1d512SLuciano Coelho  */
2146a1d512SLuciano Coelho 
2246a1d512SLuciano Coelho #ifndef __WL18XX_CONF_H__
2346a1d512SLuciano Coelho #define __WL18XX_CONF_H__
2446a1d512SLuciano Coelho 
2518b70ac9SLuciano Coelho #define WL18XX_CONF_MAGIC	0x10e100ca
26*d61c6b55SArik Nemtsov #define WL18XX_CONF_VERSION	(WLCORE_CONF_VERSION | 0x0002)
2718b70ac9SLuciano Coelho #define WL18XX_CONF_MASK	0x0000ffff
2818b70ac9SLuciano Coelho #define WL18XX_CONF_SIZE	(WLCORE_CONF_SIZE + \
2918b70ac9SLuciano Coelho 				 sizeof(struct wl18xx_priv_conf))
3018b70ac9SLuciano Coelho 
31*d61c6b55SArik Nemtsov #define NUM_OF_CHANNELS_11_ABG 150
32*d61c6b55SArik Nemtsov #define NUM_OF_CHANNELS_11_P 7
33*d61c6b55SArik Nemtsov #define WL18XX_NUM_OF_SUB_BANDS 9
34*d61c6b55SArik Nemtsov #define SRF_TABLE_LEN 16
35*d61c6b55SArik Nemtsov #define PIN_MUXING_SIZE 2
36*d61c6b55SArik Nemtsov 
37*d61c6b55SArik Nemtsov struct wl18xx_mac_and_phy_params {
3846a1d512SLuciano Coelho 	u8 phy_standalone;
3946a1d512SLuciano Coelho 	u8 rdl;
4046a1d512SLuciano Coelho 	u8 enable_clpc;
4146a1d512SLuciano Coelho 	u8 enable_tx_low_pwr_on_siso_rdl;
4246a1d512SLuciano Coelho 	u8 auto_detect;
4346a1d512SLuciano Coelho 	u8 dedicated_fem;
44*d61c6b55SArik Nemtsov 
4546a1d512SLuciano Coelho 	u8 low_band_component;
46*d61c6b55SArik Nemtsov 
47*d61c6b55SArik Nemtsov 	/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
4846a1d512SLuciano Coelho 	u8 low_band_component_type;
49*d61c6b55SArik Nemtsov 
5046a1d512SLuciano Coelho 	u8 high_band_component;
51*d61c6b55SArik Nemtsov 
52*d61c6b55SArik Nemtsov 	/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
5346a1d512SLuciano Coelho 	u8 high_band_component_type;
54*d61c6b55SArik Nemtsov 	u8 number_of_assembled_ant2_4;
55*d61c6b55SArik Nemtsov 	u8 number_of_assembled_ant5;
56*d61c6b55SArik Nemtsov 	u8 pin_muxing_platform_options[PIN_MUXING_SIZE];
57*d61c6b55SArik Nemtsov 	u8 external_pa_dc2dc;
5846a1d512SLuciano Coelho 	u8 tcxo_ldo_voltage;
5946a1d512SLuciano Coelho 	u8 xtal_itrim_val;
6046a1d512SLuciano Coelho 	u8 srf_state;
61*d61c6b55SArik Nemtsov 	u8 srf1[SRF_TABLE_LEN];
62*d61c6b55SArik Nemtsov 	u8 srf2[SRF_TABLE_LEN];
63*d61c6b55SArik Nemtsov 	u8 srf3[SRF_TABLE_LEN];
6446a1d512SLuciano Coelho 	u8 io_configuration;
6546a1d512SLuciano Coelho 	u8 sdio_configuration;
6646a1d512SLuciano Coelho 	u8 settings;
6746a1d512SLuciano Coelho 	u8 rx_profile;
68*d61c6b55SArik Nemtsov 	u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG];
69*d61c6b55SArik Nemtsov 	u8 pwr_limit_reference_11_abg;
70*d61c6b55SArik Nemtsov 	u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P];
71*d61c6b55SArik Nemtsov 	u8 pwr_limit_reference_11p;
72*d61c6b55SArik Nemtsov 	u8 per_sub_band_tx_trace_loss[WL18XX_NUM_OF_SUB_BANDS];
73*d61c6b55SArik Nemtsov 	u8 per_sub_band_rx_trace_loss[WL18XX_NUM_OF_SUB_BANDS];
7446a1d512SLuciano Coelho 	u8 primary_clock_setting_time;
7546a1d512SLuciano Coelho 	u8 clock_valid_on_wake_up;
7646a1d512SLuciano Coelho 	u8 secondary_clock_setting_time;
77*d61c6b55SArik Nemtsov 	u8 board_type;
78*d61c6b55SArik Nemtsov 	/* enable point saturation */
7916ea4733SIdo Reis 	u8 psat;
80*d61c6b55SArik Nemtsov 	/* low/medium/high Tx power in dBm */
8116ea4733SIdo Reis 	s8 low_power_val;
8216ea4733SIdo Reis 	s8 med_power_val;
8316ea4733SIdo Reis 	s8 high_power_val;
84*d61c6b55SArik Nemtsov 	u8 padding[1];
8534bacf73SLuciano Coelho } __packed;
8646a1d512SLuciano Coelho 
8723ee9bf8SLuciano Coelho struct wl18xx_priv_conf {
88*d61c6b55SArik Nemtsov 	/* this structure is copied wholesale to FW */
89*d61c6b55SArik Nemtsov 	struct wl18xx_mac_and_phy_params phy;
9034bacf73SLuciano Coelho } __packed;
9146a1d512SLuciano Coelho 
9246a1d512SLuciano Coelho #endif /* __WL18XX_CONF_H__ */
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