146a1d512SLuciano Coelho /* 246a1d512SLuciano Coelho * This file is part of wl18xx 346a1d512SLuciano Coelho * 446a1d512SLuciano Coelho * Copyright (C) 2011 Texas Instruments Inc. 546a1d512SLuciano Coelho * 646a1d512SLuciano Coelho * This program is free software; you can redistribute it and/or 746a1d512SLuciano Coelho * modify it under the terms of the GNU General Public License 846a1d512SLuciano Coelho * version 2 as published by the Free Software Foundation. 946a1d512SLuciano Coelho * 1046a1d512SLuciano Coelho * This program is distributed in the hope that it will be useful, but 1146a1d512SLuciano Coelho * WITHOUT ANY WARRANTY; without even the implied warranty of 1246a1d512SLuciano Coelho * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1346a1d512SLuciano Coelho * General Public License for more details. 1446a1d512SLuciano Coelho * 1546a1d512SLuciano Coelho * You should have received a copy of the GNU General Public License 1646a1d512SLuciano Coelho * along with this program; if not, write to the Free Software 1746a1d512SLuciano Coelho * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 1846a1d512SLuciano Coelho * 02110-1301 USA 1946a1d512SLuciano Coelho * 2046a1d512SLuciano Coelho */ 2146a1d512SLuciano Coelho 2246a1d512SLuciano Coelho #ifndef __WL18XX_CONF_H__ 2346a1d512SLuciano Coelho #define __WL18XX_CONF_H__ 2446a1d512SLuciano Coelho 2518b70ac9SLuciano Coelho #define WL18XX_CONF_MAGIC 0x10e100ca 26e2f1e50fSKobi L #define WL18XX_CONF_VERSION (WLCORE_CONF_VERSION | 0x0007) 2718b70ac9SLuciano Coelho #define WL18XX_CONF_MASK 0x0000ffff 2818b70ac9SLuciano Coelho #define WL18XX_CONF_SIZE (WLCORE_CONF_SIZE + \ 2918b70ac9SLuciano Coelho sizeof(struct wl18xx_priv_conf)) 3018b70ac9SLuciano Coelho 31d61c6b55SArik Nemtsov #define NUM_OF_CHANNELS_11_ABG 150 32d61c6b55SArik Nemtsov #define NUM_OF_CHANNELS_11_P 7 33d61c6b55SArik Nemtsov #define SRF_TABLE_LEN 16 34d61c6b55SArik Nemtsov #define PIN_MUXING_SIZE 2 35ec4f4b76SIdo Reis #define WL18XX_TRACE_LOSS_GAPS_TX 10 36ec4f4b76SIdo Reis #define WL18XX_TRACE_LOSS_GAPS_RX 18 37d61c6b55SArik Nemtsov 38d61c6b55SArik Nemtsov struct wl18xx_mac_and_phy_params { 3946a1d512SLuciano Coelho u8 phy_standalone; 40ec4f4b76SIdo Reis u8 spare0; 4146a1d512SLuciano Coelho u8 enable_clpc; 4246a1d512SLuciano Coelho u8 enable_tx_low_pwr_on_siso_rdl; 4346a1d512SLuciano Coelho u8 auto_detect; 4446a1d512SLuciano Coelho u8 dedicated_fem; 45d61c6b55SArik Nemtsov 4646a1d512SLuciano Coelho u8 low_band_component; 47d61c6b55SArik Nemtsov 48d61c6b55SArik Nemtsov /* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */ 4946a1d512SLuciano Coelho u8 low_band_component_type; 50d61c6b55SArik Nemtsov 5146a1d512SLuciano Coelho u8 high_band_component; 52d61c6b55SArik Nemtsov 53d61c6b55SArik Nemtsov /* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */ 5446a1d512SLuciano Coelho u8 high_band_component_type; 55d61c6b55SArik Nemtsov u8 number_of_assembled_ant2_4; 56d61c6b55SArik Nemtsov u8 number_of_assembled_ant5; 57d61c6b55SArik Nemtsov u8 pin_muxing_platform_options[PIN_MUXING_SIZE]; 58d61c6b55SArik Nemtsov u8 external_pa_dc2dc; 5946a1d512SLuciano Coelho u8 tcxo_ldo_voltage; 6046a1d512SLuciano Coelho u8 xtal_itrim_val; 6146a1d512SLuciano Coelho u8 srf_state; 62d61c6b55SArik Nemtsov u8 srf1[SRF_TABLE_LEN]; 63d61c6b55SArik Nemtsov u8 srf2[SRF_TABLE_LEN]; 64d61c6b55SArik Nemtsov u8 srf3[SRF_TABLE_LEN]; 6546a1d512SLuciano Coelho u8 io_configuration; 6646a1d512SLuciano Coelho u8 sdio_configuration; 6746a1d512SLuciano Coelho u8 settings; 6846a1d512SLuciano Coelho u8 rx_profile; 69d61c6b55SArik Nemtsov u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG]; 70d61c6b55SArik Nemtsov u8 pwr_limit_reference_11_abg; 71d61c6b55SArik Nemtsov u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P]; 72d61c6b55SArik Nemtsov u8 pwr_limit_reference_11p; 731d614665SVictor Goldenshtein u8 spare1; 741d614665SVictor Goldenshtein u8 per_chan_bo_mode_11_abg[13]; 751d614665SVictor Goldenshtein u8 per_chan_bo_mode_11_p[4]; 7646a1d512SLuciano Coelho u8 primary_clock_setting_time; 7746a1d512SLuciano Coelho u8 clock_valid_on_wake_up; 7846a1d512SLuciano Coelho u8 secondary_clock_setting_time; 79d61c6b55SArik Nemtsov u8 board_type; 80d61c6b55SArik Nemtsov /* enable point saturation */ 8116ea4733SIdo Reis u8 psat; 82d88949b7SYair Shapira /* low/medium/high Tx power in dBm for STA-HP BG */ 8316ea4733SIdo Reis s8 low_power_val; 8416ea4733SIdo Reis s8 med_power_val; 8516ea4733SIdo Reis s8 high_power_val; 86ec4f4b76SIdo Reis s8 per_sub_band_tx_trace_loss[WL18XX_TRACE_LOSS_GAPS_TX]; 87ec4f4b76SIdo Reis s8 per_sub_band_rx_trace_loss[WL18XX_TRACE_LOSS_GAPS_RX]; 88ec4f4b76SIdo Reis u8 tx_rf_margin; 89d88949b7SYair Shapira /* low/medium/high Tx power in dBm for other role */ 90d88949b7SYair Shapira s8 low_power_val_2nd; 91d88949b7SYair Shapira s8 med_power_val_2nd; 92d88949b7SYair Shapira s8 high_power_val_2nd; 93ec4f4b76SIdo Reis 94d88949b7SYair Shapira u8 padding[1]; 9534bacf73SLuciano Coelho } __packed; 9646a1d512SLuciano Coelho 97c68cc0f6SYair Shapira enum wl18xx_ht_mode { 98c68cc0f6SYair Shapira /* Default - use MIMO, fallback to SISO20 */ 99c68cc0f6SYair Shapira HT_MODE_DEFAULT = 0, 100c68cc0f6SYair Shapira 101c68cc0f6SYair Shapira /* Wide - use SISO40 */ 102c68cc0f6SYair Shapira HT_MODE_WIDE = 1, 103c68cc0f6SYair Shapira 104c68cc0f6SYair Shapira /* Use SISO20 */ 105c68cc0f6SYair Shapira HT_MODE_SISO20 = 2, 106c68cc0f6SYair Shapira }; 107c68cc0f6SYair Shapira 108c68cc0f6SYair Shapira struct wl18xx_ht_settings { 109c68cc0f6SYair Shapira /* DEFAULT / WIDE / SISO20 */ 110c68cc0f6SYair Shapira u8 mode; 111c68cc0f6SYair Shapira } __packed; 112c68cc0f6SYair Shapira 113e2f1e50fSKobi L struct conf_ap_sleep_settings { 114e2f1e50fSKobi L /* Duty Cycle (20-80% of staying Awake) for IDLE AP 115e2f1e50fSKobi L * (0: disable) 116e2f1e50fSKobi L */ 117e2f1e50fSKobi L u8 idle_duty_cycle; 118e2f1e50fSKobi L /* Duty Cycle (20-80% of staying Awake) for Connected AP 119e2f1e50fSKobi L * (0: disable) 120e2f1e50fSKobi L */ 121e2f1e50fSKobi L u8 connected_duty_cycle; 122e2f1e50fSKobi L /* Maximum stations that are allowed to be connected to AP 123e2f1e50fSKobi L * (255: no limit) 124e2f1e50fSKobi L */ 125e2f1e50fSKobi L u8 max_stations_thresh; 126e2f1e50fSKobi L /* Timeout till enabling the Sleep Mechanism after data stops 127e2f1e50fSKobi L * [unit: 100 msec] 128e2f1e50fSKobi L */ 129e2f1e50fSKobi L u8 idle_conn_thresh; 130e2f1e50fSKobi L } __packed; 131e2f1e50fSKobi L 13223ee9bf8SLuciano Coelho struct wl18xx_priv_conf { 133c68cc0f6SYair Shapira /* Module params structures */ 134c68cc0f6SYair Shapira struct wl18xx_ht_settings ht; 135c68cc0f6SYair Shapira 136d61c6b55SArik Nemtsov /* this structure is copied wholesale to FW */ 137d61c6b55SArik Nemtsov struct wl18xx_mac_and_phy_params phy; 138e2f1e50fSKobi L 139e2f1e50fSKobi L struct conf_ap_sleep_settings ap_sleep; 14034bacf73SLuciano Coelho } __packed; 14146a1d512SLuciano Coelho 142*133b7326SGuy Mishol enum wl18xx_sg_params { 143*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_0 = 0, 144*133b7326SGuy Mishol 145*133b7326SGuy Mishol /* Configuration Parameters */ 146*133b7326SGuy Mishol WL18XX_CONF_SG_ANTENNA_CONFIGURATION, 147*133b7326SGuy Mishol WL18XX_CONF_SG_ZIGBEE_COEX, 148*133b7326SGuy Mishol WL18XX_CONF_SG_TIME_SYNC, 149*133b7326SGuy Mishol 150*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_4, 151*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_5, 152*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_6, 153*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_7, 154*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_8, 155*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_9, 156*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_10, 157*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_11, 158*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_12, 159*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_13, 160*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_14, 161*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_15, 162*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_16, 163*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_17, 164*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_18, 165*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_19, 166*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_20, 167*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_21, 168*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_22, 169*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_23, 170*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_24, 171*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_25, 172*133b7326SGuy Mishol 173*133b7326SGuy Mishol /* Active Scan Parameters */ 174*133b7326SGuy Mishol WL18XX_CONF_SG_AUTO_SCAN_PROBE_REQ, 175*133b7326SGuy Mishol WL18XX_CONF_SG_ACTIVE_SCAN_DURATION_FACTOR_HV3, 176*133b7326SGuy Mishol 177*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_28, 178*133b7326SGuy Mishol 179*133b7326SGuy Mishol /* Passive Scan Parameters */ 180*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_29, 181*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_30, 182*133b7326SGuy Mishol WL18XX_CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_HV3, 183*133b7326SGuy Mishol 184*133b7326SGuy Mishol /* Passive Scan in Dual Antenna Parameters */ 185*133b7326SGuy Mishol WL18XX_CONF_SG_CONSECUTIVE_HV3_IN_PASSIVE_SCAN, 186*133b7326SGuy Mishol WL18XX_CONF_SG_BEACON_HV3_COLL_TH_IN_PASSIVE_SCAN, 187*133b7326SGuy Mishol WL18XX_CONF_SG_TX_RX_PROTECT_BW_IN_PASSIVE_SCAN, 188*133b7326SGuy Mishol 189*133b7326SGuy Mishol /* General Parameters */ 190*133b7326SGuy Mishol WL18XX_CONF_SG_STA_FORCE_PS_IN_BT_SCO, 191*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_36, 192*133b7326SGuy Mishol WL18XX_CONF_SG_BEACON_MISS_PERCENT, 193*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_38, 194*133b7326SGuy Mishol WL18XX_CONF_SG_RXT, 195*133b7326SGuy Mishol WL18XX_CONF_SG_UNUSED, 196*133b7326SGuy Mishol WL18XX_CONF_SG_ADAPTIVE_RXT_TXT, 197*133b7326SGuy Mishol WL18XX_CONF_SG_GENERAL_USAGE_BIT_MAP, 198*133b7326SGuy Mishol WL18XX_CONF_SG_HV3_MAX_SERVED, 199*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_44, 200*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_45, 201*133b7326SGuy Mishol WL18XX_CONF_SG_CONSECUTIVE_CTS_THRESHOLD, 202*133b7326SGuy Mishol WL18XX_CONF_SG_GEMINI_PARAM_47, 203*133b7326SGuy Mishol WL18XX_CONF_SG_STA_CONNECTION_PROTECTION_TIME, 204*133b7326SGuy Mishol 205*133b7326SGuy Mishol /* AP Parameters */ 206*133b7326SGuy Mishol WL18XX_CONF_SG_AP_BEACON_MISS_TX, 207*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_50, 208*133b7326SGuy Mishol WL18XX_CONF_SG_AP_BEACON_WINDOW_INTERVAL, 209*133b7326SGuy Mishol WL18XX_CONF_SG_AP_CONNECTION_PROTECTION_TIME, 210*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_53, 211*133b7326SGuy Mishol WL18XX_CONF_SG_PARAM_54, 212*133b7326SGuy Mishol 213*133b7326SGuy Mishol /* CTS Diluting Parameters */ 214*133b7326SGuy Mishol WL18XX_CONF_SG_CTS_DILUTED_BAD_RX_PACKETS_TH, 215*133b7326SGuy Mishol WL18XX_CONF_SG_CTS_CHOP_IN_DUAL_ANT_SCO_MASTER, 216*133b7326SGuy Mishol 217*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_1, 218*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_2, 219*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_3, 220*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_4, 221*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_5, 222*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_6, 223*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_7, 224*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_8, 225*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_9, 226*133b7326SGuy Mishol WL18XX_CONF_SG_TEMP_PARAM_10, 227*133b7326SGuy Mishol 228*133b7326SGuy Mishol WL18XX_CONF_SG_PARAMS_MAX, 229*133b7326SGuy Mishol WL18XX_CONF_SG_PARAMS_ALL = 0xff 230*133b7326SGuy Mishol }; 231*133b7326SGuy Mishol 23246a1d512SLuciano Coelho #endif /* __WL18XX_CONF_H__ */ 233