108484e1fSPing-Ke Shih /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 208484e1fSPing-Ke Shih /* Copyright(c) 2019-2022 Realtek Corporation 308484e1fSPing-Ke Shih */ 408484e1fSPing-Ke Shih 508484e1fSPing-Ke Shih #ifndef __RTW89_8852B_H__ 608484e1fSPing-Ke Shih #define __RTW89_8852B_H__ 708484e1fSPing-Ke Shih 808484e1fSPing-Ke Shih #include "core.h" 908484e1fSPing-Ke Shih 1008484e1fSPing-Ke Shih #define RF_PATH_NUM_8852B 2 1108484e1fSPing-Ke Shih #define BB_PATH_NUM_8852B 2 1208484e1fSPing-Ke Shih 13*132dc4feSPing-Ke Shih struct rtw8852b_u_efuse { 14*132dc4feSPing-Ke Shih u8 rsvd[0x88]; 15*132dc4feSPing-Ke Shih u8 mac_addr[ETH_ALEN]; 16*132dc4feSPing-Ke Shih }; 17*132dc4feSPing-Ke Shih 18*132dc4feSPing-Ke Shih struct rtw8852b_e_efuse { 19*132dc4feSPing-Ke Shih u8 mac_addr[ETH_ALEN]; 20*132dc4feSPing-Ke Shih }; 21*132dc4feSPing-Ke Shih 22*132dc4feSPing-Ke Shih struct rtw8852b_tssi_offset { 23*132dc4feSPing-Ke Shih u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; 24*132dc4feSPing-Ke Shih u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; 25*132dc4feSPing-Ke Shih u8 rsvd[7]; 26*132dc4feSPing-Ke Shih u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; 27*132dc4feSPing-Ke Shih } __packed; 28*132dc4feSPing-Ke Shih 29*132dc4feSPing-Ke Shih struct rtw8852b_efuse { 30*132dc4feSPing-Ke Shih u8 rsvd[0x210]; 31*132dc4feSPing-Ke Shih struct rtw8852b_tssi_offset path_a_tssi; 32*132dc4feSPing-Ke Shih u8 rsvd1[10]; 33*132dc4feSPing-Ke Shih struct rtw8852b_tssi_offset path_b_tssi; 34*132dc4feSPing-Ke Shih u8 rsvd2[94]; 35*132dc4feSPing-Ke Shih u8 channel_plan; 36*132dc4feSPing-Ke Shih u8 xtal_k; 37*132dc4feSPing-Ke Shih u8 rsvd3; 38*132dc4feSPing-Ke Shih u8 iqk_lck; 39*132dc4feSPing-Ke Shih u8 rsvd4[5]; 40*132dc4feSPing-Ke Shih u8 reg_setting:2; 41*132dc4feSPing-Ke Shih u8 tx_diversity:1; 42*132dc4feSPing-Ke Shih u8 rx_diversity:2; 43*132dc4feSPing-Ke Shih u8 ac_mode:1; 44*132dc4feSPing-Ke Shih u8 module_type:2; 45*132dc4feSPing-Ke Shih u8 rsvd5; 46*132dc4feSPing-Ke Shih u8 shared_ant:1; 47*132dc4feSPing-Ke Shih u8 coex_type:3; 48*132dc4feSPing-Ke Shih u8 ant_iso:1; 49*132dc4feSPing-Ke Shih u8 radio_on_off:1; 50*132dc4feSPing-Ke Shih u8 rsvd6:2; 51*132dc4feSPing-Ke Shih u8 eeprom_version; 52*132dc4feSPing-Ke Shih u8 customer_id; 53*132dc4feSPing-Ke Shih u8 tx_bb_swing_2g; 54*132dc4feSPing-Ke Shih u8 tx_bb_swing_5g; 55*132dc4feSPing-Ke Shih u8 tx_cali_pwr_trk_mode; 56*132dc4feSPing-Ke Shih u8 trx_path_selection; 57*132dc4feSPing-Ke Shih u8 rfe_type; 58*132dc4feSPing-Ke Shih u8 country_code[2]; 59*132dc4feSPing-Ke Shih u8 rsvd7[3]; 60*132dc4feSPing-Ke Shih u8 path_a_therm; 61*132dc4feSPing-Ke Shih u8 path_b_therm; 62*132dc4feSPing-Ke Shih u8 rsvd8[2]; 63*132dc4feSPing-Ke Shih u8 rx_gain_2g_ofdm; 64*132dc4feSPing-Ke Shih u8 rsvd9; 65*132dc4feSPing-Ke Shih u8 rx_gain_2g_cck; 66*132dc4feSPing-Ke Shih u8 rsvd10; 67*132dc4feSPing-Ke Shih u8 rx_gain_5g_low; 68*132dc4feSPing-Ke Shih u8 rsvd11; 69*132dc4feSPing-Ke Shih u8 rx_gain_5g_mid; 70*132dc4feSPing-Ke Shih u8 rsvd12; 71*132dc4feSPing-Ke Shih u8 rx_gain_5g_high; 72*132dc4feSPing-Ke Shih u8 rsvd13[35]; 73*132dc4feSPing-Ke Shih u8 path_a_cck_pwr_idx[6]; 74*132dc4feSPing-Ke Shih u8 path_a_bw40_1tx_pwr_idx[5]; 75*132dc4feSPing-Ke Shih u8 path_a_ofdm_1tx_pwr_idx_diff:4; 76*132dc4feSPing-Ke Shih u8 path_a_bw20_1tx_pwr_idx_diff:4; 77*132dc4feSPing-Ke Shih u8 path_a_bw20_2tx_pwr_idx_diff:4; 78*132dc4feSPing-Ke Shih u8 path_a_bw40_2tx_pwr_idx_diff:4; 79*132dc4feSPing-Ke Shih u8 path_a_cck_2tx_pwr_idx_diff:4; 80*132dc4feSPing-Ke Shih u8 path_a_ofdm_2tx_pwr_idx_diff:4; 81*132dc4feSPing-Ke Shih u8 rsvd14[0xf2]; 82*132dc4feSPing-Ke Shih union { 83*132dc4feSPing-Ke Shih struct rtw8852b_u_efuse u; 84*132dc4feSPing-Ke Shih struct rtw8852b_e_efuse e; 85*132dc4feSPing-Ke Shih }; 86*132dc4feSPing-Ke Shih } __packed; 87*132dc4feSPing-Ke Shih 8808484e1fSPing-Ke Shih #endif 89