103f3dd37SLarry Finger /* SPDX-License-Identifier: GPL-2.0 */ 203f3dd37SLarry Finger /* Copyright(c) 2009-2010 Realtek Corporation.*/ 3f1d2b4d3SLarry Finger 4f1d2b4d3SLarry Finger #ifndef __RTL8821AE_PHY_H__ 5f1d2b4d3SLarry Finger #define __RTL8821AE_PHY_H__ 6f1d2b4d3SLarry Finger 7f1d2b4d3SLarry Finger /* MAX_TX_COUNT must always be set to 4, otherwise read 8f1d2b4d3SLarry Finger * efuse table sequence will be wrong. 9f1d2b4d3SLarry Finger */ 10f1d2b4d3SLarry Finger #define MAX_TX_COUNT 4 11f1d2b4d3SLarry Finger #define TX_1S 0 12f1d2b4d3SLarry Finger #define TX_2S 1 13f1d2b4d3SLarry Finger #define TX_3S 2 14f1d2b4d3SLarry Finger #define TX_4S 3 15f1d2b4d3SLarry Finger 16f1d2b4d3SLarry Finger #define MAX_POWER_INDEX 0x3F 17f1d2b4d3SLarry Finger 18f1d2b4d3SLarry Finger #define MAX_PRECMD_CNT 16 19f1d2b4d3SLarry Finger #define MAX_RFDEPENDCMD_CNT 16 20f1d2b4d3SLarry Finger #define MAX_POSTCMD_CNT 16 21f1d2b4d3SLarry Finger 22f1d2b4d3SLarry Finger #define MAX_DOZE_WAITING_TIMES_9x 64 23f1d2b4d3SLarry Finger 24f1d2b4d3SLarry Finger #define RT_CANNOT_IO(hw) false 25f1d2b4d3SLarry Finger #define HIGHPOWER_RADIOA_ARRAYLEN 22 26f1d2b4d3SLarry Finger 27f1d2b4d3SLarry Finger #define IQK_ADDA_REG_NUM 16 28f1d2b4d3SLarry Finger #define IQK_BB_REG_NUM 9 29f1d2b4d3SLarry Finger #define MAX_TOLERANCE 5 30f1d2b4d3SLarry Finger #define IQK_DELAY_TIME 10 31f1d2b4d3SLarry Finger #define index_mapping_NUM 15 32f1d2b4d3SLarry Finger 33f1d2b4d3SLarry Finger #define APK_BB_REG_NUM 5 34f1d2b4d3SLarry Finger #define APK_AFE_REG_NUM 16 35f1d2b4d3SLarry Finger #define APK_CURVE_REG_NUM 4 36f1d2b4d3SLarry Finger #define PATH_NUM 2 37f1d2b4d3SLarry Finger 38f1d2b4d3SLarry Finger #define LOOP_LIMIT 5 39f1d2b4d3SLarry Finger #define MAX_STALL_TIME 50 40*9c66a7e5SLarry Finger #define ANTENNADIVERSITYVALUE 0x80 41f1d2b4d3SLarry Finger #define MAX_TXPWR_IDX_NMODE_92S 63 42*9c66a7e5SLarry Finger #define RESET_CNT_LIMIT 3 43f1d2b4d3SLarry Finger 44f1d2b4d3SLarry Finger #define IQK_ADDA_REG_NUM 16 45f1d2b4d3SLarry Finger #define IQK_MAC_REG_NUM 4 46f1d2b4d3SLarry Finger 47f1d2b4d3SLarry Finger #define RF6052_MAX_PATH 2 48f1d2b4d3SLarry Finger 49f1d2b4d3SLarry Finger #define CT_OFFSET_MAC_ADDR 0X16 50f1d2b4d3SLarry Finger 51f1d2b4d3SLarry Finger #define CT_OFFSET_CCK_TX_PWR_IDX 0x5A 52f1d2b4d3SLarry Finger #define CT_OFFSET_HT401S_TX_PWR_IDX 0x60 53f1d2b4d3SLarry Finger #define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF 0x66 54f1d2b4d3SLarry Finger #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69 55f1d2b4d3SLarry Finger #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C 56f1d2b4d3SLarry Finger 57f1d2b4d3SLarry Finger #define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F 58f1d2b4d3SLarry Finger #define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72 59f1d2b4d3SLarry Finger 60f1d2b4d3SLarry Finger #define CT_OFFSET_CHANNEL_PLAH 0x75 61f1d2b4d3SLarry Finger #define CT_OFFSET_THERMAL_METER 0x78 62f1d2b4d3SLarry Finger #define CT_OFFSET_RF_OPTION 0x79 63f1d2b4d3SLarry Finger #define CT_OFFSET_VERSION 0x7E 64f1d2b4d3SLarry Finger #define CT_OFFSET_CUSTOMER_ID 0x7F 65f1d2b4d3SLarry Finger 66f1d2b4d3SLarry Finger #define RTL8821AE_MAX_PATH_NUM 2 67f1d2b4d3SLarry Finger 68f1d2b4d3SLarry Finger #define TARGET_CHNL_NUM_2G_5G_8812 59 69f1d2b4d3SLarry Finger 70f1d2b4d3SLarry Finger enum swchnlcmd_id { 71f1d2b4d3SLarry Finger CMDID_END, 72f1d2b4d3SLarry Finger CMDID_SET_TXPOWEROWER_LEVEL, 73f1d2b4d3SLarry Finger CMDID_BBREGWRITE10, 74f1d2b4d3SLarry Finger CMDID_WRITEPORT_ULONG, 75f1d2b4d3SLarry Finger CMDID_WRITEPORT_USHORT, 76f1d2b4d3SLarry Finger CMDID_WRITEPORT_UCHAR, 77f1d2b4d3SLarry Finger CMDID_RF_WRITEREG, 78f1d2b4d3SLarry Finger }; 79f1d2b4d3SLarry Finger 80f1d2b4d3SLarry Finger struct swchnlcmd { 81f1d2b4d3SLarry Finger enum swchnlcmd_id cmdid; 82f1d2b4d3SLarry Finger u32 para1; 83f1d2b4d3SLarry Finger u32 para2; 84f1d2b4d3SLarry Finger u32 msdelay; 85f1d2b4d3SLarry Finger }; 86f1d2b4d3SLarry Finger 87f1d2b4d3SLarry Finger enum hw90_block_e { 88f1d2b4d3SLarry Finger HW90_BLOCK_MAC = 0, 89f1d2b4d3SLarry Finger HW90_BLOCK_PHY0 = 1, 90f1d2b4d3SLarry Finger HW90_BLOCK_PHY1 = 2, 91f1d2b4d3SLarry Finger HW90_BLOCK_RF = 3, 92f1d2b4d3SLarry Finger HW90_BLOCK_MAXIMUM = 4, 93f1d2b4d3SLarry Finger }; 94f1d2b4d3SLarry Finger 95f1d2b4d3SLarry Finger enum baseband_config_type { 96f1d2b4d3SLarry Finger BASEBAND_CONFIG_PHY_REG = 0, 97f1d2b4d3SLarry Finger BASEBAND_CONFIG_AGC_TAB = 1, 98f1d2b4d3SLarry Finger }; 99f1d2b4d3SLarry Finger 100f1d2b4d3SLarry Finger enum ra_offset_area { 101f1d2b4d3SLarry Finger RA_OFFSET_LEGACY_OFDM1, 102f1d2b4d3SLarry Finger RA_OFFSET_LEGACY_OFDM2, 103f1d2b4d3SLarry Finger RA_OFFSET_HT_OFDM1, 104f1d2b4d3SLarry Finger RA_OFFSET_HT_OFDM2, 105f1d2b4d3SLarry Finger RA_OFFSET_HT_OFDM3, 106f1d2b4d3SLarry Finger RA_OFFSET_HT_OFDM4, 107f1d2b4d3SLarry Finger RA_OFFSET_HT_CCK, 108f1d2b4d3SLarry Finger }; 109f1d2b4d3SLarry Finger 110f1d2b4d3SLarry Finger enum antenna_path { 111f1d2b4d3SLarry Finger ANTENNA_NONE, 112f1d2b4d3SLarry Finger ANTENNA_D, 113f1d2b4d3SLarry Finger ANTENNA_C, 114f1d2b4d3SLarry Finger ANTENNA_CD, 115f1d2b4d3SLarry Finger ANTENNA_B, 116f1d2b4d3SLarry Finger ANTENNA_BD, 117f1d2b4d3SLarry Finger ANTENNA_BC, 118f1d2b4d3SLarry Finger ANTENNA_BCD, 119f1d2b4d3SLarry Finger ANTENNA_A, 120f1d2b4d3SLarry Finger ANTENNA_AD, 121f1d2b4d3SLarry Finger ANTENNA_AC, 122f1d2b4d3SLarry Finger ANTENNA_ACD, 123f1d2b4d3SLarry Finger ANTENNA_AB, 124f1d2b4d3SLarry Finger ANTENNA_ABD, 125f1d2b4d3SLarry Finger ANTENNA_ABC, 126f1d2b4d3SLarry Finger ANTENNA_ABCD 127f1d2b4d3SLarry Finger }; 128f1d2b4d3SLarry Finger 129f1d2b4d3SLarry Finger struct r_antenna_select_ofdm { 130f1d2b4d3SLarry Finger u32 r_tx_antenna:4; 131f1d2b4d3SLarry Finger u32 r_ant_l:4; 132f1d2b4d3SLarry Finger u32 r_ant_non_ht:4; 133f1d2b4d3SLarry Finger u32 r_ant_ht1:4; 134f1d2b4d3SLarry Finger u32 r_ant_ht2:4; 135f1d2b4d3SLarry Finger u32 r_ant_ht_s1:4; 136f1d2b4d3SLarry Finger u32 r_ant_non_ht_s1:4; 137f1d2b4d3SLarry Finger u32 ofdm_txsc:2; 138f1d2b4d3SLarry Finger u32 reserved:2; 139f1d2b4d3SLarry Finger }; 140f1d2b4d3SLarry Finger 141f1d2b4d3SLarry Finger struct r_antenna_select_cck { 142f1d2b4d3SLarry Finger u8 r_cckrx_enable_2:2; 143f1d2b4d3SLarry Finger u8 r_cckrx_enable:2; 144f1d2b4d3SLarry Finger u8 r_ccktx_enable:4; 145f1d2b4d3SLarry Finger }; 146f1d2b4d3SLarry Finger 147f1d2b4d3SLarry Finger struct efuse_contents { 148f1d2b4d3SLarry Finger u8 mac_addr[ETH_ALEN]; 149f1d2b4d3SLarry Finger u8 cck_tx_power_idx[6]; 150f1d2b4d3SLarry Finger u8 ht40_1s_tx_power_idx[6]; 151f1d2b4d3SLarry Finger u8 ht40_2s_tx_power_idx_diff[3]; 152f1d2b4d3SLarry Finger u8 ht20_tx_power_idx_diff[3]; 153f1d2b4d3SLarry Finger u8 ofdm_tx_power_idx_diff[3]; 154f1d2b4d3SLarry Finger u8 ht40_max_power_offset[3]; 155f1d2b4d3SLarry Finger u8 ht20_max_power_offset[3]; 156f1d2b4d3SLarry Finger u8 channel_plan; 157f1d2b4d3SLarry Finger u8 thermal_meter; 158f1d2b4d3SLarry Finger u8 rf_option[5]; 159f1d2b4d3SLarry Finger u8 version; 160f1d2b4d3SLarry Finger u8 oem_id; 161f1d2b4d3SLarry Finger u8 regulatory; 162f1d2b4d3SLarry Finger }; 163f1d2b4d3SLarry Finger 164f1d2b4d3SLarry Finger struct tx_power_struct { 165f1d2b4d3SLarry Finger u8 cck[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 166f1d2b4d3SLarry Finger u8 ht40_1s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 167f1d2b4d3SLarry Finger u8 ht40_2s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 168f1d2b4d3SLarry Finger u8 ht20_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 169f1d2b4d3SLarry Finger u8 legacy_ht_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 170f1d2b4d3SLarry Finger u8 legacy_ht_txpowerdiff; 171f1d2b4d3SLarry Finger u8 groupht20[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 172f1d2b4d3SLarry Finger u8 groupht40[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 173f1d2b4d3SLarry Finger u8 pwrgroup_cnt; 174f1d2b4d3SLarry Finger u32 mcs_original_offset[4][16]; 175f1d2b4d3SLarry Finger }; 176f1d2b4d3SLarry Finger enum _ANT_DIV_TYPE { 177f1d2b4d3SLarry Finger NO_ANTDIV = 0xFF, 178f1d2b4d3SLarry Finger CG_TRX_HW_ANTDIV = 0x01, 179f1d2b4d3SLarry Finger CGCS_RX_HW_ANTDIV = 0x02, 180f1d2b4d3SLarry Finger FIXED_HW_ANTDIV = 0x03, 181f1d2b4d3SLarry Finger CG_TRX_SMART_ANTDIV = 0x04, 182f1d2b4d3SLarry Finger CGCS_RX_SW_ANTDIV = 0x05, 183f1d2b4d3SLarry Finger 184f1d2b4d3SLarry Finger }; 185f1d2b4d3SLarry Finger 186f1d2b4d3SLarry Finger u32 rtl8821ae_phy_query_bb_reg(struct ieee80211_hw *hw, 187f1d2b4d3SLarry Finger u32 regaddr, u32 bitmask); 188f1d2b4d3SLarry Finger void rtl8821ae_phy_set_bb_reg(struct ieee80211_hw *hw, 189f1d2b4d3SLarry Finger u32 regaddr, u32 bitmask, u32 data); 190f1d2b4d3SLarry Finger u32 rtl8821ae_phy_query_rf_reg(struct ieee80211_hw *hw, 191f1d2b4d3SLarry Finger enum radio_path rfpath, u32 regaddr, 192f1d2b4d3SLarry Finger u32 bitmask); 193f1d2b4d3SLarry Finger void rtl8821ae_phy_set_rf_reg(struct ieee80211_hw *hw, 194f1d2b4d3SLarry Finger enum radio_path rfpath, u32 regaddr, 195f1d2b4d3SLarry Finger u32 bitmask, u32 data); 196f1d2b4d3SLarry Finger bool rtl8821ae_phy_mac_config(struct ieee80211_hw *hw); 197f1d2b4d3SLarry Finger bool rtl8821ae_phy_bb_config(struct ieee80211_hw *hw); 198f1d2b4d3SLarry Finger bool rtl8821ae_phy_rf_config(struct ieee80211_hw *hw); 199f1d2b4d3SLarry Finger void rtl8821ae_phy_switch_wirelessband(struct ieee80211_hw *hw, 200f1d2b4d3SLarry Finger u8 band); 201f1d2b4d3SLarry Finger void rtl8821ae_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw); 202f1d2b4d3SLarry Finger void rtl8821ae_phy_get_txpower_level(struct ieee80211_hw *hw, 203f1d2b4d3SLarry Finger long *powerlevel); 204f1d2b4d3SLarry Finger void rtl8821ae_phy_set_txpower_level(struct ieee80211_hw *hw, 205f1d2b4d3SLarry Finger u8 channel); 206f1d2b4d3SLarry Finger void rtl8821ae_phy_scan_operation_backup(struct ieee80211_hw *hw, 207f1d2b4d3SLarry Finger u8 operation); 208f1d2b4d3SLarry Finger void rtl8821ae_phy_set_bw_mode_callback(struct ieee80211_hw *hw); 209f1d2b4d3SLarry Finger void rtl8821ae_phy_set_bw_mode(struct ieee80211_hw *hw, 210f1d2b4d3SLarry Finger enum nl80211_channel_type ch_type); 211f1d2b4d3SLarry Finger void rtl8821ae_phy_sw_chnl_callback(struct ieee80211_hw *hw); 212f1d2b4d3SLarry Finger u8 rtl8821ae_phy_sw_chnl(struct ieee80211_hw *hw); 213f1d2b4d3SLarry Finger void rtl8821ae_phy_iq_calibrate(struct ieee80211_hw *hw, 214f1d2b4d3SLarry Finger bool b_recovery); 215f1d2b4d3SLarry Finger void rtl8812ae_phy_iq_calibrate(struct ieee80211_hw *hw, 216f1d2b4d3SLarry Finger bool b_recovery); 21708aba42fSArnd Bergmann void rtl8821ae_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta); 218f1d2b4d3SLarry Finger void rtl8821ae_phy_lc_calibrate(struct ieee80211_hw *hw); 219f1d2b4d3SLarry Finger void rtl8821ae_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain); 220f1d2b4d3SLarry Finger bool rtl8812ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, 221f1d2b4d3SLarry Finger enum radio_path rfpath); 222f1d2b4d3SLarry Finger bool rtl8821ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, 223f1d2b4d3SLarry Finger enum radio_path rfpath); 224f1d2b4d3SLarry Finger bool rtl8821ae_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype); 225f1d2b4d3SLarry Finger bool rtl8821ae_phy_set_rf_power_state(struct ieee80211_hw *hw, 226f1d2b4d3SLarry Finger enum rf_pwrstate rfpwr_state); 227f1d2b4d3SLarry Finger u8 _rtl8812ae_get_right_chnl_place_for_iqk(u8 chnl); 228f1d2b4d3SLarry Finger void rtl8821ae_phy_set_txpower_level_by_path(struct ieee80211_hw *hw, 229f1d2b4d3SLarry Finger u8 channel, u8 path); 230f1d2b4d3SLarry Finger void rtl8812ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index, 231f1d2b4d3SLarry Finger u8 thermal_value, u8 threshold); 232f1d2b4d3SLarry Finger void rtl8821ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index, 233f1d2b4d3SLarry Finger u8 thermal_value, u8 threshold); 234f1d2b4d3SLarry Finger void rtl8821ae_reset_iqk_result(struct ieee80211_hw *hw); 235f1d2b4d3SLarry Finger u32 phy_get_tx_swing_8812A(struct ieee80211_hw *hw, u8 band, u8 rf_path); 236f1d2b4d3SLarry Finger 237f1d2b4d3SLarry Finger #endif 238