1*48fa0b4dSLarry Finger /* SPDX-License-Identifier: GPL-2.0 */ 2*48fa0b4dSLarry Finger /* Copyright(c) 2009-2012 Realtek Corporation.*/ 3f1d2b4d3SLarry Finger 4f1d2b4d3SLarry Finger #ifndef __RTL8723E_DM_H__ 5f1d2b4d3SLarry Finger #define __RTL8723E_DM_H__ 6f1d2b4d3SLarry Finger 7f1d2b4d3SLarry Finger #define HAL_DM_DIG_DISABLE BIT(0) 8f1d2b4d3SLarry Finger #define HAL_DM_HIPWR_DISABLE BIT(1) 9f1d2b4d3SLarry Finger 10f1d2b4d3SLarry Finger #define OFDM_TABLE_LENGTH 37 11f1d2b4d3SLarry Finger #define CCK_TABLE_LENGTH 33 12f1d2b4d3SLarry Finger 13f1d2b4d3SLarry Finger #define OFDM_TABLE_SIZE 37 14f1d2b4d3SLarry Finger #define CCK_TABLE_SIZE 33 15f1d2b4d3SLarry Finger 16f1d2b4d3SLarry Finger #define BW_AUTO_SWITCH_HIGH_LOW 25 17f1d2b4d3SLarry Finger #define BW_AUTO_SWITCH_LOW_HIGH 30 18f1d2b4d3SLarry Finger 19f1d2b4d3SLarry Finger #define DM_DIG_FA_UPPER 0x32 20f1d2b4d3SLarry Finger #define DM_DIG_FA_LOWER 0x20 21f1d2b4d3SLarry Finger #define DM_DIG_FA_TH0 0x20 22f1d2b4d3SLarry Finger #define DM_DIG_FA_TH1 0x100 23f1d2b4d3SLarry Finger #define DM_DIG_FA_TH2 0x200 24f1d2b4d3SLarry Finger 25f1d2b4d3SLarry Finger #define RXPATHSELECTION_SS_TH_LOW 30 26f1d2b4d3SLarry Finger #define RXPATHSELECTION_DIFF_TH 18 27f1d2b4d3SLarry Finger 28f1d2b4d3SLarry Finger #define DM_RATR_STA_INIT 0 29f1d2b4d3SLarry Finger #define DM_RATR_STA_HIGH 1 30f1d2b4d3SLarry Finger #define DM_RATR_STA_MIDDLE 2 31f1d2b4d3SLarry Finger #define DM_RATR_STA_LOW 3 32f1d2b4d3SLarry Finger 33f1d2b4d3SLarry Finger #define CTS2SELF_THVAL 30 34f1d2b4d3SLarry Finger #define REGC38_TH 20 35f1d2b4d3SLarry Finger 36f1d2b4d3SLarry Finger #define WAIOTTHVAL 25 37f1d2b4d3SLarry Finger 38f1d2b4d3SLarry Finger #define TXHIGHPWRLEVEL_NORMAL 0 39f1d2b4d3SLarry Finger #define TXHIGHPWRLEVEL_LEVEL1 1 40f1d2b4d3SLarry Finger #define TXHIGHPWRLEVEL_LEVEL2 2 41f1d2b4d3SLarry Finger #define TXHIGHPWRLEVEL_BT1 3 42f1d2b4d3SLarry Finger #define TXHIGHPWRLEVEL_BT2 4 43f1d2b4d3SLarry Finger 44f1d2b4d3SLarry Finger #define DM_TYPE_BYFW 0 45f1d2b4d3SLarry Finger #define DM_TYPE_BYDRIVER 1 46f1d2b4d3SLarry Finger 47f1d2b4d3SLarry Finger #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 48f1d2b4d3SLarry Finger #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 49f1d2b4d3SLarry Finger 50f1d2b4d3SLarry Finger struct swat_t { 51f1d2b4d3SLarry Finger u8 failure_cnt; 52f1d2b4d3SLarry Finger u8 try_flag; 53f1d2b4d3SLarry Finger u8 stop_trying; 54f1d2b4d3SLarry Finger long pre_rssi; 55f1d2b4d3SLarry Finger long trying_threshold; 56f1d2b4d3SLarry Finger u8 cur_antenna; 57f1d2b4d3SLarry Finger u8 pre_antenna; 58f1d2b4d3SLarry Finger 59f1d2b4d3SLarry Finger }; 60f1d2b4d3SLarry Finger 61f1d2b4d3SLarry Finger enum tag_dynamic_init_gain_operation_type_definition { 62f1d2b4d3SLarry Finger DIG_TYPE_THRESH_HIGH = 0, 63f1d2b4d3SLarry Finger DIG_TYPE_THRESH_LOW = 1, 64f1d2b4d3SLarry Finger DIG_TYPE_BACKOFF = 2, 65f1d2b4d3SLarry Finger DIG_TYPE_RX_GAIN_MIN = 3, 66f1d2b4d3SLarry Finger DIG_TYPE_RX_GAIN_MAX = 4, 67f1d2b4d3SLarry Finger DIG_TYPE_ENABLE = 5, 68f1d2b4d3SLarry Finger DIG_TYPE_DISABLE = 6, 69f1d2b4d3SLarry Finger DIG_OP_TYPE_MAX 70f1d2b4d3SLarry Finger }; 71f1d2b4d3SLarry Finger 72f1d2b4d3SLarry Finger enum dm_1r_cca_e { 73f1d2b4d3SLarry Finger CCA_1R = 0, 74f1d2b4d3SLarry Finger CCA_2R = 1, 75f1d2b4d3SLarry Finger CCA_MAX = 2, 76f1d2b4d3SLarry Finger }; 77f1d2b4d3SLarry Finger 78f1d2b4d3SLarry Finger enum dm_rf_e { 79f1d2b4d3SLarry Finger RF_SAVE = 0, 80f1d2b4d3SLarry Finger RF_NORMAL = 1, 81f1d2b4d3SLarry Finger RF_MAX = 2, 82f1d2b4d3SLarry Finger }; 83f1d2b4d3SLarry Finger 84f1d2b4d3SLarry Finger enum dm_sw_ant_switch_e { 85f1d2b4d3SLarry Finger ANS_ANTENNA_B = 1, 86f1d2b4d3SLarry Finger ANS_ANTENNA_A = 2, 87f1d2b4d3SLarry Finger ANS_ANTENNA_MAX = 3, 88f1d2b4d3SLarry Finger }; 89f1d2b4d3SLarry Finger 90f1d2b4d3SLarry Finger #define BT_RSSI_STATE_NORMAL_POWER BIT_OFFSET_LEN_MASK_32(0, 1) 91f1d2b4d3SLarry Finger #define BT_RSSI_STATE_AMDPU_OFF BIT_OFFSET_LEN_MASK_32(1, 1) 92f1d2b4d3SLarry Finger #define BT_RSSI_STATE_SPECIAL_LOW BIT_OFFSET_LEN_MASK_32(2, 1) 93f1d2b4d3SLarry Finger #define BT_RSSI_STATE_BG_EDCA_LOW BIT_OFFSET_LEN_MASK_32(3, 1) 94f1d2b4d3SLarry Finger #define BT_RSSI_STATE_TXPOWER_LOW BIT_OFFSET_LEN_MASK_32(4, 1) 95f1d2b4d3SLarry Finger #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \ 96f1d2b4d3SLarry Finger ( \ 97f1d2b4d3SLarry Finger (((struct rtl_priv *)(_priv))->mac80211.opmode == \ 98f1d2b4d3SLarry Finger NL80211_IFTYPE_ADHOC) ? \ 99f1d2b4d3SLarry Finger (((struct rtl_priv *)(_priv))->dm.entry_min_undec_sm_pwdb) : \ 100f1d2b4d3SLarry Finger (((struct rtl_priv *)(_priv))->dm.undec_sm_pwdb) \ 101f1d2b4d3SLarry Finger ) 102f1d2b4d3SLarry Finger 103f1d2b4d3SLarry Finger void rtl8723e_dm_init(struct ieee80211_hw *hw); 104f1d2b4d3SLarry Finger void rtl8723e_dm_watchdog(struct ieee80211_hw *hw); 105f1d2b4d3SLarry Finger void rtl8723e_dm_write_dig(struct ieee80211_hw *hw); 106f1d2b4d3SLarry Finger void rtl8723e_dm_check_txpower_tracking(struct ieee80211_hw *hw); 107f1d2b4d3SLarry Finger void rtl8723e_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw); 108f1d2b4d3SLarry Finger void rtl8723e_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal); 109f1d2b4d3SLarry Finger void rtl8723e_dm_bt_coexist(struct ieee80211_hw *hw); 110f1d2b4d3SLarry Finger #endif 111